2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
10 * Handle hardware traps and faults.
12 #include <linux/interrupt.h>
13 #include <linux/kallsyms.h>
14 #include <linux/spinlock.h>
15 #include <linux/kprobes.h>
16 #include <linux/uaccess.h>
17 #include <linux/kdebug.h>
18 #include <linux/kgdb.h>
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/ptrace.h>
22 #include <linux/string.h>
23 #include <linux/delay.h>
24 #include <linux/errno.h>
25 #include <linux/kexec.h>
26 #include <linux/sched.h>
27 #include <linux/timer.h>
28 #include <linux/init.h>
29 #include <linux/bug.h>
30 #include <linux/nmi.h>
32 #include <linux/smp.h>
36 #include <linux/ioport.h>
37 #include <linux/eisa.h>
41 #include <linux/mca.h>
44 #if defined(CONFIG_EDAC)
45 #include <linux/edac.h>
48 #include <asm/kmemcheck.h>
49 #include <asm/stacktrace.h>
50 #include <asm/processor.h>
51 #include <asm/debugreg.h>
52 #include <asm/atomic.h>
53 #include <asm/system.h>
54 #include <asm/traps.h>
59 #include <asm/mach_traps.h>
62 #include <asm/x86_init.h>
63 #include <asm/pgalloc.h>
64 #include <asm/proto.h>
66 #include <asm/processor-flags.h>
67 #include <asm/setup.h>
69 asmlinkage int system_call(void);
71 /* Do we ignore FPU interrupts ? */
75 * The IDT has to be page-aligned to simplify the Pentium
76 * F0 0F bug workaround.
78 gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
81 DECLARE_BITMAP(used_vectors, NR_VECTORS);
82 EXPORT_SYMBOL_GPL(used_vectors);
84 static int ignore_nmis;
86 int unknown_nmi_panic;
88 * Prevent NMI reason port (0x61) being accessed simultaneously, can
89 * only be used in NMI handler.
91 static DEFINE_RAW_SPINLOCK(nmi_reason_lock);
93 static inline void conditional_sti(struct pt_regs *regs)
95 if (regs->flags & X86_EFLAGS_IF)
99 static inline void preempt_conditional_sti(struct pt_regs *regs)
102 if (regs->flags & X86_EFLAGS_IF)
106 static inline void conditional_cli(struct pt_regs *regs)
108 if (regs->flags & X86_EFLAGS_IF)
112 static inline void preempt_conditional_cli(struct pt_regs *regs)
114 if (regs->flags & X86_EFLAGS_IF)
119 static void __kprobes
120 do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
121 long error_code, siginfo_t *info)
123 struct task_struct *tsk = current;
126 if (regs->flags & X86_VM_MASK) {
128 * traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
129 * On nmi (interrupt 2), do_trap should not be called.
137 if (!user_mode(regs))
144 * We want error_code and trap_no set for userspace faults and
145 * kernelspace faults which result in die(), but not
146 * kernelspace faults which are fixed up. die() gives the
147 * process no chance to handle the signal and notice the
148 * kernel fault information, so that won't result in polluting
149 * the information about previously queued, but not yet
150 * delivered, faults. See also do_general_protection below.
152 tsk->thread.error_code = error_code;
153 tsk->thread.trap_no = trapnr;
156 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
157 printk_ratelimit()) {
159 "%s[%d] trap %s ip:%lx sp:%lx error:%lx",
160 tsk->comm, tsk->pid, str,
161 regs->ip, regs->sp, error_code);
162 print_vma_addr(" in ", regs->ip);
168 force_sig_info(signr, info, tsk);
170 force_sig(signr, tsk);
174 if (!fixup_exception(regs)) {
175 tsk->thread.error_code = error_code;
176 tsk->thread.trap_no = trapnr;
177 die(str, regs, error_code);
183 if (handle_vm86_trap((struct kernel_vm86_regs *) regs,
190 #define DO_ERROR(trapnr, signr, str, name) \
191 dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
193 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
196 conditional_sti(regs); \
197 do_trap(trapnr, signr, str, regs, error_code, NULL); \
200 #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
201 dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
204 info.si_signo = signr; \
206 info.si_code = sicode; \
207 info.si_addr = (void __user *)siaddr; \
208 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
211 conditional_sti(regs); \
212 do_trap(trapnr, signr, str, regs, error_code, &info); \
215 DO_ERROR_INFO(0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->ip)
216 DO_ERROR(4, SIGSEGV, "overflow", overflow)
217 DO_ERROR(5, SIGSEGV, "bounds", bounds)
218 DO_ERROR_INFO(6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->ip)
219 DO_ERROR(9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
220 DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
221 DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
223 DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
225 DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
228 /* Runs on IST stack */
229 dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code)
231 if (notify_die(DIE_TRAP, "stack segment", regs, error_code,
232 12, SIGBUS) == NOTIFY_STOP)
234 preempt_conditional_sti(regs);
235 do_trap(12, SIGBUS, "stack segment", regs, error_code, NULL);
236 preempt_conditional_cli(regs);
239 dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
241 static const char str[] = "double fault";
242 struct task_struct *tsk = current;
244 /* Return not checked because double check cannot be ignored */
245 notify_die(DIE_TRAP, str, regs, error_code, 8, SIGSEGV);
247 tsk->thread.error_code = error_code;
248 tsk->thread.trap_no = 8;
251 * This is always a kernel trap and never fixable (and thus must
255 die(str, regs, error_code);
259 dotraplinkage void __kprobes
260 do_general_protection(struct pt_regs *regs, long error_code)
262 struct task_struct *tsk;
264 conditional_sti(regs);
267 if (regs->flags & X86_VM_MASK)
272 if (!user_mode(regs))
275 tsk->thread.error_code = error_code;
276 tsk->thread.trap_no = 13;
278 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
279 printk_ratelimit()) {
281 "%s[%d] general protection ip:%lx sp:%lx error:%lx",
282 tsk->comm, task_pid_nr(tsk),
283 regs->ip, regs->sp, error_code);
284 print_vma_addr(" in ", regs->ip);
288 force_sig(SIGSEGV, tsk);
294 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
299 if (fixup_exception(regs))
302 tsk->thread.error_code = error_code;
303 tsk->thread.trap_no = 13;
304 if (notify_die(DIE_GPF, "general protection fault", regs,
305 error_code, 13, SIGSEGV) == NOTIFY_STOP)
307 die("general protection fault", regs, error_code);
310 static int __init setup_unknown_nmi_panic(char *str)
312 unknown_nmi_panic = 1;
315 __setup("unknown_nmi_panic", setup_unknown_nmi_panic);
317 static notrace __kprobes void
318 pci_serr_error(unsigned char reason, struct pt_regs *regs)
320 pr_emerg("NMI: PCI system error (SERR) for reason %02x on CPU %d.\n",
321 reason, smp_processor_id());
324 * On some machines, PCI SERR line is used to report memory
325 * errors. EDAC makes use of it.
327 #if defined(CONFIG_EDAC)
328 if (edac_handler_set()) {
329 edac_atomic_assert_error();
334 if (panic_on_unrecovered_nmi)
335 panic("NMI: Not continuing");
337 pr_emerg("Dazed and confused, but trying to continue\n");
339 /* Clear and disable the PCI SERR error line. */
340 reason = (reason & NMI_REASON_CLEAR_MASK) | NMI_REASON_CLEAR_SERR;
341 outb(reason, NMI_REASON_PORT);
344 static notrace __kprobes void
345 io_check_error(unsigned char reason, struct pt_regs *regs)
350 "NMI: IOCK error (debug interrupt?) for reason %02x on CPU %d.\n",
351 reason, smp_processor_id());
352 show_registers(regs);
355 panic("NMI IOCK error: Not continuing");
357 /* Re-enable the IOCK line, wait for a few seconds */
358 reason = (reason & NMI_REASON_CLEAR_MASK) | NMI_REASON_CLEAR_IOCHK;
359 outb(reason, NMI_REASON_PORT);
363 touch_nmi_watchdog();
367 reason &= ~NMI_REASON_CLEAR_IOCHK;
368 outb(reason, NMI_REASON_PORT);
371 static notrace __kprobes void
372 unknown_nmi_error(unsigned char reason, struct pt_regs *regs)
374 if (notify_die(DIE_NMIUNKNOWN, "nmi", regs, reason, 2, SIGINT) ==
379 * Might actually be able to figure out what the guilty party
387 pr_emerg("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
388 reason, smp_processor_id());
390 pr_emerg("Do you have a strange power saving mode enabled?\n");
391 if (unknown_nmi_panic || panic_on_unrecovered_nmi)
392 panic("NMI: Not continuing");
394 pr_emerg("Dazed and confused, but trying to continue\n");
397 static notrace __kprobes void default_do_nmi(struct pt_regs *regs)
399 unsigned char reason = 0;
402 * CPU-specific NMI must be processed before non-CPU-specific
403 * NMI, otherwise we may lose it, because the CPU-specific
404 * NMI can not be detected/processed on other CPUs.
406 if (notify_die(DIE_NMI, "nmi", regs, 0, 2, SIGINT) == NOTIFY_STOP)
409 /* Non-CPU-specific NMI: NMI sources can be processed on any CPU */
410 raw_spin_lock(&nmi_reason_lock);
411 reason = get_nmi_reason();
413 if (reason & NMI_REASON_MASK) {
414 if (reason & NMI_REASON_SERR)
415 pci_serr_error(reason, regs);
416 else if (reason & NMI_REASON_IOCHK)
417 io_check_error(reason, regs);
420 * Reassert NMI in case it became active
421 * meanwhile as it's edge-triggered:
425 raw_spin_unlock(&nmi_reason_lock);
428 raw_spin_unlock(&nmi_reason_lock);
430 unknown_nmi_error(reason, regs);
433 dotraplinkage notrace __kprobes void
434 do_nmi(struct pt_regs *regs, long error_code)
438 inc_irq_stat(__nmi_count);
441 default_do_nmi(regs);
451 void restart_nmi(void)
456 /* May run on IST stack. */
457 dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code)
459 #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
460 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
463 #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
464 #ifdef CONFIG_KPROBES
465 if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
469 if (notify_die(DIE_TRAP, "int3", regs, error_code, 3, SIGTRAP)
474 preempt_conditional_sti(regs);
475 do_trap(3, SIGTRAP, "int3", regs, error_code, NULL);
476 preempt_conditional_cli(regs);
481 * Help handler running on IST stack to switch back to user stack
482 * for scheduling or signal handling. The actual stack switch is done in
485 asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
487 struct pt_regs *regs = eregs;
488 /* Did already sync */
489 if (eregs == (struct pt_regs *)eregs->sp)
491 /* Exception from user space */
492 else if (user_mode(eregs))
493 regs = task_pt_regs(current);
495 * Exception from kernel and interrupts are enabled. Move to
496 * kernel process stack.
498 else if (eregs->flags & X86_EFLAGS_IF)
499 regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs));
507 * Our handling of the processor debug registers is non-trivial.
508 * We do not clear them on entry and exit from the kernel. Therefore
509 * it is possible to get a watchpoint trap here from inside the kernel.
510 * However, the code in ./ptrace.c has ensured that the user can
511 * only set watchpoints on userspace addresses. Therefore the in-kernel
512 * watchpoint trap can only occur in code which is reading/writing
513 * from user space. Such code must not hold kernel locks (since it
514 * can equally take a page fault), therefore it is safe to call
515 * force_sig_info even though that claims and releases locks.
517 * Code in ./signal.c ensures that the debug control register
518 * is restored before we deliver any signal, and therefore that
519 * user code runs with the correct debug control register even though
522 * Being careful here means that we don't have to be as careful in a
523 * lot of more complicated places (task switching can be a bit lazy
524 * about restoring all the debug state, and ptrace doesn't have to
525 * find every occurrence of the TF bit that could be saved away even
528 * May run on IST stack.
530 dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
532 struct task_struct *tsk = current;
537 get_debugreg(dr6, 6);
539 /* Filter out all the reserved bits which are preset to 1 */
540 dr6 &= ~DR6_RESERVED;
543 * If dr6 has no reason to give us about the origin of this trap,
544 * then it's very likely the result of an icebp/int01 trap.
545 * User wants a sigtrap for that.
547 if (!dr6 && user_mode(regs))
550 /* Catch kmemcheck conditions first of all! */
551 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
554 /* DR6 may or may not be cleared by the CPU */
558 * The processor cleared BTF, so don't mark that we need it set.
560 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
562 /* Store the virtualized DR6 value */
563 tsk->thread.debugreg6 = dr6;
565 if (notify_die(DIE_DEBUG, "debug", regs, PTR_ERR(&dr6), error_code,
566 SIGTRAP) == NOTIFY_STOP)
569 /* It's safe to allow irq's after DR6 has been saved */
570 preempt_conditional_sti(regs);
572 if (regs->flags & X86_VM_MASK) {
573 handle_vm86_trap((struct kernel_vm86_regs *) regs,
575 preempt_conditional_cli(regs);
580 * Single-stepping through system calls: ignore any exceptions in
581 * kernel space, but re-enable TF when returning to user mode.
583 * We already checked v86 mode above, so we can check for kernel mode
584 * by just checking the CPL of CS.
586 if ((dr6 & DR_STEP) && !user_mode(regs)) {
587 tsk->thread.debugreg6 &= ~DR_STEP;
588 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
589 regs->flags &= ~X86_EFLAGS_TF;
591 si_code = get_si_code(tsk->thread.debugreg6);
592 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
593 send_sigtrap(tsk, regs, error_code, si_code);
594 preempt_conditional_cli(regs);
600 * Note that we play around with the 'TS' bit in an attempt to get
601 * the correct behaviour even in the presence of the asynchronous
604 void math_error(struct pt_regs *regs, int error_code, int trapnr)
606 struct task_struct *task = current;
609 char *str = (trapnr == 16) ? "fpu exception" : "simd exception";
611 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
613 conditional_sti(regs);
615 if (!user_mode_vm(regs))
617 if (!fixup_exception(regs)) {
618 task->thread.error_code = error_code;
619 task->thread.trap_no = trapnr;
620 die(str, regs, error_code);
626 * Save the info for the exception handler and clear the error.
629 task->thread.trap_no = trapnr;
630 task->thread.error_code = error_code;
631 info.si_signo = SIGFPE;
633 info.si_addr = (void __user *)regs->ip;
635 unsigned short cwd, swd;
637 * (~cwd & swd) will mask out exceptions that are not set to unmasked
638 * status. 0x3f is the exception bits in these regs, 0x200 is the
639 * C1 reg you need in case of a stack fault, 0x040 is the stack
640 * fault bit. We should only be taking one exception at a time,
641 * so if this combination doesn't produce any single exception,
642 * then we have a bad program that isn't synchronizing its FPU usage
643 * and it will suffer the consequences since we won't be able to
644 * fully reproduce the context of the exception
646 cwd = get_fpu_cwd(task);
647 swd = get_fpu_swd(task);
652 * The SIMD FPU exceptions are handled a little differently, as there
653 * is only a single status/control register. Thus, to determine which
654 * unmasked exception was caught we must mask the exception mask bits
655 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
657 unsigned short mxcsr = get_fpu_mxcsr(task);
658 err = ~(mxcsr >> 7) & mxcsr;
661 if (err & 0x001) { /* Invalid op */
663 * swd & 0x240 == 0x040: Stack Underflow
664 * swd & 0x240 == 0x240: Stack Overflow
665 * User must clear the SF bit (0x40) if set
667 info.si_code = FPE_FLTINV;
668 } else if (err & 0x004) { /* Divide by Zero */
669 info.si_code = FPE_FLTDIV;
670 } else if (err & 0x008) { /* Overflow */
671 info.si_code = FPE_FLTOVF;
672 } else if (err & 0x012) { /* Denormal, Underflow */
673 info.si_code = FPE_FLTUND;
674 } else if (err & 0x020) { /* Precision */
675 info.si_code = FPE_FLTRES;
678 * If we're using IRQ 13, or supposedly even some trap 16
679 * implementations, it's possible we get a spurious trap...
681 return; /* Spurious trap, no error */
683 force_sig_info(SIGFPE, &info, task);
686 dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
692 math_error(regs, error_code, 16);
696 do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
698 math_error(regs, error_code, 19);
702 do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
704 conditional_sti(regs);
706 /* No need to warn about this any longer. */
707 printk(KERN_INFO "Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
711 asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void)
715 asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void)
720 * __math_state_restore assumes that cr0.TS is already clear and the
721 * fpu state is all ready for use. Used during context switch.
723 void __math_state_restore(void)
725 struct thread_info *thread = current_thread_info();
726 struct task_struct *tsk = thread->task;
729 * Paranoid restore. send a SIGSEGV if we fail to restore the state.
731 if (unlikely(restore_fpu_checking(tsk))) {
733 force_sig(SIGSEGV, tsk);
737 thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
742 * 'math_state_restore()' saves the current math information in the
743 * old math state array, and gets the new ones from the current task
745 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
746 * Don't touch unless you *really* know how it works.
748 * Must be called with kernel preemption disabled (in this case,
749 * local interrupts are disabled at the call-site in entry.S).
751 asmlinkage void math_state_restore(void)
753 struct thread_info *thread = current_thread_info();
754 struct task_struct *tsk = thread->task;
756 if (!tsk_used_math(tsk)) {
759 * does a slab alloc which can sleep
765 do_group_exit(SIGKILL);
771 clts(); /* Allow maths ops (or we recurse) */
773 __math_state_restore();
775 EXPORT_SYMBOL_GPL(math_state_restore);
777 dotraplinkage void __kprobes
778 do_device_not_available(struct pt_regs *regs, long error_code)
780 #ifdef CONFIG_MATH_EMULATION
781 if (read_cr0() & X86_CR0_EM) {
782 struct math_emu_info info = { };
784 conditional_sti(regs);
791 math_state_restore(); /* interrupts still off */
793 conditional_sti(regs);
798 dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
803 info.si_signo = SIGILL;
805 info.si_code = ILL_BADSTK;
807 if (notify_die(DIE_TRAP, "iret exception",
808 regs, error_code, 32, SIGILL) == NOTIFY_STOP)
810 do_trap(32, SIGILL, "iret exception", regs, error_code, &info);
814 /* Set of traps needed for early debugging. */
815 void __init early_trap_init(void)
817 set_intr_gate_ist(1, &debug, DEBUG_STACK);
818 /* int3 can be called from all */
819 set_system_intr_gate_ist(3, &int3, DEBUG_STACK);
820 set_intr_gate(14, &page_fault);
821 load_idt(&idt_descr);
824 void __init trap_init(void)
829 void __iomem *p = early_ioremap(0x0FFFD9, 4);
831 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
836 set_intr_gate(0, ÷_error);
837 set_intr_gate_ist(2, &nmi, NMI_STACK);
838 /* int4 can be called from all */
839 set_system_intr_gate(4, &overflow);
840 set_intr_gate(5, &bounds);
841 set_intr_gate(6, &invalid_op);
842 set_intr_gate(7, &device_not_available);
844 set_task_gate(8, GDT_ENTRY_DOUBLEFAULT_TSS);
846 set_intr_gate_ist(8, &double_fault, DOUBLEFAULT_STACK);
848 set_intr_gate(9, &coprocessor_segment_overrun);
849 set_intr_gate(10, &invalid_TSS);
850 set_intr_gate(11, &segment_not_present);
851 set_intr_gate_ist(12, &stack_segment, STACKFAULT_STACK);
852 set_intr_gate(13, &general_protection);
853 set_intr_gate(15, &spurious_interrupt_bug);
854 set_intr_gate(16, &coprocessor_error);
855 set_intr_gate(17, &alignment_check);
856 #ifdef CONFIG_X86_MCE
857 set_intr_gate_ist(18, &machine_check, MCE_STACK);
859 set_intr_gate(19, &simd_coprocessor_error);
861 /* Reserve all the builtin and the syscall vector: */
862 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
863 set_bit(i, used_vectors);
865 #ifdef CONFIG_IA32_EMULATION
866 set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
867 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
871 set_system_trap_gate(SYSCALL_VECTOR, &system_call);
872 set_bit(SYSCALL_VECTOR, used_vectors);
876 BUG_ON(test_bit(VSYSCALL_EMU_VECTOR, used_vectors));
877 set_system_intr_gate(VSYSCALL_EMU_VECTOR, &emulate_vsyscall);
878 set_bit(VSYSCALL_EMU_VECTOR, used_vectors);
882 * Should be a barrier for any external CPU state:
886 x86_init.irqs.trap_init();