2 * Kernel-based Virtual Machine driver for Linux
3 * cpuid support routines
5 * derived from arch/x86/kvm/x86.c
7 * Copyright 2011 Red Hat, Inc. and/or its affiliates.
8 * Copyright IBM Corporation, 2008
10 * This work is licensed under the terms of the GNU GPL, version 2. See
11 * the COPYING file in the top-level directory.
15 #include <linux/kvm_host.h>
16 #include <linux/module.h>
17 #include <linux/vmalloc.h>
18 #include <linux/uaccess.h>
20 #include <asm/xsave.h>
26 static u32 xstate_required_size(u64 xstate_bv)
29 u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
31 xstate_bv &= ~XSTATE_FPSSE;
33 if (xstate_bv & 0x1) {
34 u32 eax, ebx, ecx, edx;
35 cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx);
36 ret = max(ret, eax + ebx);
46 void kvm_update_cpuid(struct kvm_vcpu *vcpu)
48 struct kvm_cpuid_entry2 *best;
49 struct kvm_lapic *apic = vcpu->arch.apic;
51 best = kvm_find_cpuid_entry(vcpu, 1, 0);
55 /* Update OSXSAVE bit */
56 if (cpu_has_xsave && best->function == 0x1) {
57 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
58 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
59 best->ecx |= bit(X86_FEATURE_OSXSAVE);
63 if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER))
64 apic->lapic_timer.timer_mode_mask = 3 << 17;
66 apic->lapic_timer.timer_mode_mask = 1 << 17;
69 best = kvm_find_cpuid_entry(vcpu, 0xD, 0);
71 vcpu->arch.guest_supported_xcr0 = 0;
72 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
74 vcpu->arch.guest_supported_xcr0 =
75 (best->eax | ((u64)best->edx << 32)) &
76 host_xcr0 & KVM_SUPPORTED_XCR0;
77 vcpu->arch.guest_xstate_size =
78 xstate_required_size(vcpu->arch.guest_supported_xcr0);
81 kvm_pmu_cpuid_update(vcpu);
84 static int is_efer_nx(void)
86 unsigned long long efer = 0;
88 rdmsrl_safe(MSR_EFER, &efer);
89 return efer & EFER_NX;
92 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
95 struct kvm_cpuid_entry2 *e, *entry;
98 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
99 e = &vcpu->arch.cpuid_entries[i];
100 if (e->function == 0x80000001) {
105 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
106 entry->edx &= ~(1 << 20);
107 printk(KERN_INFO "kvm: guest NX capability removed\n");
111 /* when an old userspace process fills a new kernel module */
112 int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
113 struct kvm_cpuid *cpuid,
114 struct kvm_cpuid_entry __user *entries)
117 struct kvm_cpuid_entry *cpuid_entries;
120 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
123 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
127 if (copy_from_user(cpuid_entries, entries,
128 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
130 for (i = 0; i < cpuid->nent; i++) {
131 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
132 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
133 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
134 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
135 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
136 vcpu->arch.cpuid_entries[i].index = 0;
137 vcpu->arch.cpuid_entries[i].flags = 0;
138 vcpu->arch.cpuid_entries[i].padding[0] = 0;
139 vcpu->arch.cpuid_entries[i].padding[1] = 0;
140 vcpu->arch.cpuid_entries[i].padding[2] = 0;
142 vcpu->arch.cpuid_nent = cpuid->nent;
143 cpuid_fix_nx_cap(vcpu);
145 kvm_apic_set_version(vcpu);
146 kvm_x86_ops->cpuid_update(vcpu);
147 kvm_update_cpuid(vcpu);
150 vfree(cpuid_entries);
155 int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
156 struct kvm_cpuid2 *cpuid,
157 struct kvm_cpuid_entry2 __user *entries)
162 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
165 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
166 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
168 vcpu->arch.cpuid_nent = cpuid->nent;
169 kvm_apic_set_version(vcpu);
170 kvm_x86_ops->cpuid_update(vcpu);
171 kvm_update_cpuid(vcpu);
178 int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
179 struct kvm_cpuid2 *cpuid,
180 struct kvm_cpuid_entry2 __user *entries)
185 if (cpuid->nent < vcpu->arch.cpuid_nent)
188 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
189 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
194 cpuid->nent = vcpu->arch.cpuid_nent;
198 static void cpuid_mask(u32 *word, int wordnum)
200 *word &= boot_cpu_data.x86_capability[wordnum];
203 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
206 entry->function = function;
207 entry->index = index;
208 cpuid_count(entry->function, entry->index,
209 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
213 static bool supported_xcr0_bit(unsigned bit)
215 u64 mask = ((u64)1 << bit);
217 return mask & KVM_SUPPORTED_XCR0 & host_xcr0;
220 #define F(x) bit(X86_FEATURE_##x)
222 static int do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
223 u32 index, int *nent, int maxnent)
226 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
228 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
230 unsigned f_lm = F(LM);
232 unsigned f_gbpages = 0;
235 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
236 unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0;
239 const u32 kvm_supported_word0_x86_features =
240 F(FPU) | F(VME) | F(DE) | F(PSE) |
241 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
242 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
243 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
244 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
245 0 /* Reserved, DS, ACPI */ | F(MMX) |
246 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
247 0 /* HTT, TM, Reserved, PBE */;
248 /* cpuid 0x80000001.edx */
249 const u32 kvm_supported_word1_x86_features =
250 F(FPU) | F(VME) | F(DE) | F(PSE) |
251 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
252 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
253 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
254 F(PAT) | F(PSE36) | 0 /* Reserved */ |
255 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
256 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
257 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
259 const u32 kvm_supported_word4_x86_features =
260 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
261 0 /* DS-CPL, VMX, SMX, EST */ |
262 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
263 F(FMA) | F(CX16) | 0 /* xTPR Update, PDCM */ |
264 F(PCID) | 0 /* Reserved, DCA */ | F(XMM4_1) |
265 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
266 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
268 /* cpuid 0x80000001.ecx */
269 const u32 kvm_supported_word6_x86_features =
270 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
271 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
272 F(3DNOWPREFETCH) | F(OSVW) | 0 /* IBS */ | F(XOP) |
273 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
275 /* cpuid 0xC0000001.edx */
276 const u32 kvm_supported_word5_x86_features =
277 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
278 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
282 const u32 kvm_supported_word9_x86_features =
283 F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
284 F(BMI2) | F(ERMS) | f_invpcid | F(RTM);
286 /* all calls to cpuid_count() should be made on the same cpu */
291 if (*nent >= maxnent)
294 do_cpuid_1_ent(entry, function, index);
299 entry->eax = min(entry->eax, (u32)0xd);
302 entry->edx &= kvm_supported_word0_x86_features;
303 cpuid_mask(&entry->edx, 0);
304 entry->ecx &= kvm_supported_word4_x86_features;
305 cpuid_mask(&entry->ecx, 4);
306 /* we support x2apic emulation even if host does not support
307 * it since we emulate x2apic in software */
308 entry->ecx |= F(X2APIC);
310 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
311 * may return different values. This forces us to get_cpu() before
312 * issuing the first command, and also to emulate this annoying behavior
313 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
315 int t, times = entry->eax & 0xff;
317 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
318 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
319 for (t = 1; t < times; ++t) {
320 if (*nent >= maxnent)
323 do_cpuid_1_ent(&entry[t], function, 0);
324 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
329 /* function 4 has additional index. */
333 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
334 /* read more entries until cache_type is zero */
336 if (*nent >= maxnent)
339 cache_type = entry[i - 1].eax & 0x1f;
342 do_cpuid_1_ent(&entry[i], function, i);
344 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
350 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
351 /* Mask ebx against host capability word 9 */
353 entry->ebx &= kvm_supported_word9_x86_features;
354 cpuid_mask(&entry->ebx, 9);
355 // TSC_ADJUST is emulated
356 entry->ebx |= F(TSC_ADJUST);
366 case 0xa: { /* Architectural Performance Monitoring */
367 struct x86_pmu_capability cap;
368 union cpuid10_eax eax;
369 union cpuid10_edx edx;
371 perf_get_x86_pmu_capability(&cap);
374 * Only support guest architectural pmu on a host
375 * with architectural pmu.
378 memset(&cap, 0, sizeof(cap));
380 eax.split.version_id = min(cap.version, 2);
381 eax.split.num_counters = cap.num_counters_gp;
382 eax.split.bit_width = cap.bit_width_gp;
383 eax.split.mask_length = cap.events_mask_len;
385 edx.split.num_counters_fixed = cap.num_counters_fixed;
386 edx.split.bit_width_fixed = cap.bit_width_fixed;
387 edx.split.reserved = 0;
389 entry->eax = eax.full;
390 entry->ebx = cap.events_mask;
392 entry->edx = edx.full;
395 /* function 0xb has additional index. */
399 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
400 /* read more entries until level_type is zero */
402 if (*nent >= maxnent)
405 level_type = entry[i - 1].ecx & 0xff00;
408 do_cpuid_1_ent(&entry[i], function, i);
410 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
418 entry->eax &= host_xcr0 & KVM_SUPPORTED_XCR0;
419 entry->edx &= (host_xcr0 & KVM_SUPPORTED_XCR0) >> 32;
420 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
421 for (idx = 1, i = 1; idx < 64; ++idx) {
422 if (*nent >= maxnent)
425 do_cpuid_1_ent(&entry[i], function, idx);
426 if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
429 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
435 case KVM_CPUID_SIGNATURE: {
436 static const char signature[12] = "KVMKVMKVM\0\0";
437 const u32 *sigptr = (const u32 *)signature;
438 entry->eax = KVM_CPUID_FEATURES;
439 entry->ebx = sigptr[0];
440 entry->ecx = sigptr[1];
441 entry->edx = sigptr[2];
444 case KVM_CPUID_FEATURES:
445 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
446 (1 << KVM_FEATURE_NOP_IO_DELAY) |
447 (1 << KVM_FEATURE_CLOCKSOURCE2) |
448 (1 << KVM_FEATURE_ASYNC_PF) |
449 (1 << KVM_FEATURE_PV_EOI) |
450 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) |
451 (1 << KVM_FEATURE_PV_UNHALT);
454 entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
461 entry->eax = min(entry->eax, 0x8000001a);
464 entry->edx &= kvm_supported_word1_x86_features;
465 cpuid_mask(&entry->edx, 1);
466 entry->ecx &= kvm_supported_word6_x86_features;
467 cpuid_mask(&entry->ecx, 6);
470 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
471 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
472 unsigned phys_as = entry->eax & 0xff;
476 entry->eax = g_phys_as | (virt_as << 8);
477 entry->ebx = entry->edx = 0;
481 entry->ecx = entry->edx = 0;
487 /*Add support for Centaur's CPUID instruction*/
489 /*Just support up to 0xC0000004 now*/
490 entry->eax = min(entry->eax, 0xC0000004);
493 entry->edx &= kvm_supported_word5_x86_features;
494 cpuid_mask(&entry->edx, 5);
496 case 3: /* Processor serial number */
497 case 5: /* MONITOR/MWAIT */
498 case 6: /* Thermal management */
499 case 0x80000007: /* Advanced power management */
504 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
508 kvm_x86_ops->set_supported_cpuid(function, entry);
520 struct kvm_cpuid_param {
524 bool (*qualifier)(const struct kvm_cpuid_param *param);
527 static bool is_centaur_cpu(const struct kvm_cpuid_param *param)
529 return boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR;
532 int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
533 struct kvm_cpuid_entry2 __user *entries)
535 struct kvm_cpuid_entry2 *cpuid_entries;
536 int limit, nent = 0, r = -E2BIG, i;
538 static const struct kvm_cpuid_param param[] = {
539 { .func = 0, .has_leaf_count = true },
540 { .func = 0x80000000, .has_leaf_count = true },
541 { .func = 0xC0000000, .qualifier = is_centaur_cpu, .has_leaf_count = true },
542 { .func = KVM_CPUID_SIGNATURE },
543 { .func = KVM_CPUID_FEATURES },
548 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
549 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
551 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
556 for (i = 0; i < ARRAY_SIZE(param); i++) {
557 const struct kvm_cpuid_param *ent = ¶m[i];
559 if (ent->qualifier && !ent->qualifier(ent))
562 r = do_cpuid_ent(&cpuid_entries[nent], ent->func, ent->idx,
568 if (!ent->has_leaf_count)
571 limit = cpuid_entries[nent - 1].eax;
572 for (func = ent->func + 1; func <= limit && nent < cpuid->nent && r == 0; ++func)
573 r = do_cpuid_ent(&cpuid_entries[nent], func, ent->idx,
581 if (copy_to_user(entries, cpuid_entries,
582 nent * sizeof(struct kvm_cpuid_entry2)))
588 vfree(cpuid_entries);
593 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
595 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
596 int j, nent = vcpu->arch.cpuid_nent;
598 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
599 /* when no next entry is found, the current entry[i] is reselected */
600 for (j = i + 1; ; j = (j + 1) % nent) {
601 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
602 if (ej->function == e->function) {
603 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
607 return 0; /* silence gcc, even though control never reaches here */
610 /* find an entry with matching function, matching index (if needed), and that
611 * should be read next (if it's stateful) */
612 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
613 u32 function, u32 index)
615 if (e->function != function)
617 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
619 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
620 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
625 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
626 u32 function, u32 index)
629 struct kvm_cpuid_entry2 *best = NULL;
631 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
632 struct kvm_cpuid_entry2 *e;
634 e = &vcpu->arch.cpuid_entries[i];
635 if (is_matching_cpuid_entry(e, function, index)) {
636 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
637 move_to_next_stateful_cpuid_entry(vcpu, i);
644 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
646 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
648 struct kvm_cpuid_entry2 *best;
650 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
651 if (!best || best->eax < 0x80000008)
653 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
655 return best->eax & 0xff;
661 * If no match is found, check whether we exceed the vCPU's limit
662 * and return the content of the highest valid _standard_ leaf instead.
663 * This is to satisfy the CPUID specification.
665 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
666 u32 function, u32 index)
668 struct kvm_cpuid_entry2 *maxlevel;
670 maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
671 if (!maxlevel || maxlevel->eax >= function)
673 if (function & 0x80000000) {
674 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
678 return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
681 void kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
683 u32 function = *eax, index = *ecx;
684 struct kvm_cpuid_entry2 *best;
686 best = kvm_find_cpuid_entry(vcpu, function, index);
689 best = check_cpuid_limit(vcpu, function, index);
697 *eax = *ebx = *ecx = *edx = 0;
699 EXPORT_SYMBOL_GPL(kvm_cpuid);
701 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
703 u32 function, eax, ebx, ecx, edx;
705 function = eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
706 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
707 kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx);
708 kvm_register_write(vcpu, VCPU_REGS_RAX, eax);
709 kvm_register_write(vcpu, VCPU_REGS_RBX, ebx);
710 kvm_register_write(vcpu, VCPU_REGS_RCX, ecx);
711 kvm_register_write(vcpu, VCPU_REGS_RDX, edx);
712 kvm_x86_ops->skip_emulated_instruction(vcpu);
713 trace_kvm_cpuid(function, eax, ebx, ecx, edx);
715 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);