2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
24 #include "kvm_cache_regs.h"
27 #include <linux/kvm_host.h>
28 #include <linux/types.h>
29 #include <linux/string.h>
31 #include <linux/highmem.h>
32 #include <linux/module.h>
33 #include <linux/swap.h>
34 #include <linux/hugetlb.h>
35 #include <linux/compiler.h>
36 #include <linux/srcu.h>
37 #include <linux/slab.h>
38 #include <linux/uaccess.h>
41 #include <asm/cmpxchg.h>
46 * When setting this variable to true it enables Two-Dimensional-Paging
47 * where the hardware walks 2 page tables:
48 * 1. the guest-virtual to guest-physical
49 * 2. while doing 1. it walks guest-physical to host-physical
50 * If the hardware supports that we don't need to do shadow paging.
52 bool tdp_enabled = false;
56 AUDIT_POST_PAGE_FAULT,
63 char *audit_point_name[] = {
76 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
77 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
81 #define pgprintk(x...) do { } while (0)
82 #define rmap_printk(x...) do { } while (0)
88 module_param(dbg, bool, 0644);
91 static int oos_shadow = 1;
92 module_param(oos_shadow, bool, 0644);
95 #define ASSERT(x) do { } while (0)
99 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
100 __FILE__, __LINE__, #x); \
104 #define PTE_PREFETCH_NUM 8
106 #define PT_FIRST_AVAIL_BITS_SHIFT 9
107 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
109 #define PT64_LEVEL_BITS 9
111 #define PT64_LEVEL_SHIFT(level) \
112 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
114 #define PT64_LEVEL_MASK(level) \
115 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
117 #define PT64_INDEX(address, level)\
118 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
121 #define PT32_LEVEL_BITS 10
123 #define PT32_LEVEL_SHIFT(level) \
124 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
126 #define PT32_LEVEL_MASK(level) \
127 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
128 #define PT32_LVL_OFFSET_MASK(level) \
129 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130 * PT32_LEVEL_BITS))) - 1))
132 #define PT32_INDEX(address, level)\
133 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
136 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
137 #define PT64_DIR_BASE_ADDR_MASK \
138 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
139 #define PT64_LVL_ADDR_MASK(level) \
140 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
141 * PT64_LEVEL_BITS))) - 1))
142 #define PT64_LVL_OFFSET_MASK(level) \
143 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
144 * PT64_LEVEL_BITS))) - 1))
146 #define PT32_BASE_ADDR_MASK PAGE_MASK
147 #define PT32_DIR_BASE_ADDR_MASK \
148 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
149 #define PT32_LVL_ADDR_MASK(level) \
150 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
151 * PT32_LEVEL_BITS))) - 1))
153 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
158 #define ACC_EXEC_MASK 1
159 #define ACC_WRITE_MASK PT_WRITABLE_MASK
160 #define ACC_USER_MASK PT_USER_MASK
161 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
163 #include <trace/events/kvm.h>
165 #define CREATE_TRACE_POINTS
166 #include "mmutrace.h"
168 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
170 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
172 struct kvm_rmap_desc {
173 u64 *sptes[RMAP_EXT];
174 struct kvm_rmap_desc *more;
177 struct kvm_shadow_walk_iterator {
185 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
186 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
187 shadow_walk_okay(&(_walker)); \
188 shadow_walk_next(&(_walker)))
190 typedef void (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp, u64 *spte);
192 static struct kmem_cache *pte_chain_cache;
193 static struct kmem_cache *rmap_desc_cache;
194 static struct kmem_cache *mmu_page_header_cache;
195 static struct percpu_counter kvm_total_used_mmu_pages;
197 static u64 __read_mostly shadow_trap_nonpresent_pte;
198 static u64 __read_mostly shadow_notrap_nonpresent_pte;
199 static u64 __read_mostly shadow_base_present_pte;
200 static u64 __read_mostly shadow_nx_mask;
201 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
202 static u64 __read_mostly shadow_user_mask;
203 static u64 __read_mostly shadow_accessed_mask;
204 static u64 __read_mostly shadow_dirty_mask;
206 static inline u64 rsvd_bits(int s, int e)
208 return ((1ULL << (e - s + 1)) - 1) << s;
211 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
213 shadow_trap_nonpresent_pte = trap_pte;
214 shadow_notrap_nonpresent_pte = notrap_pte;
216 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
218 void kvm_mmu_set_base_ptes(u64 base_pte)
220 shadow_base_present_pte = base_pte;
222 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
224 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
225 u64 dirty_mask, u64 nx_mask, u64 x_mask)
227 shadow_user_mask = user_mask;
228 shadow_accessed_mask = accessed_mask;
229 shadow_dirty_mask = dirty_mask;
230 shadow_nx_mask = nx_mask;
231 shadow_x_mask = x_mask;
233 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
235 static bool is_write_protection(struct kvm_vcpu *vcpu)
237 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
240 static int is_cpuid_PSE36(void)
245 static int is_nx(struct kvm_vcpu *vcpu)
247 return vcpu->arch.efer & EFER_NX;
250 static int is_shadow_present_pte(u64 pte)
252 return pte != shadow_trap_nonpresent_pte
253 && pte != shadow_notrap_nonpresent_pte;
256 static int is_large_pte(u64 pte)
258 return pte & PT_PAGE_SIZE_MASK;
261 static int is_writable_pte(unsigned long pte)
263 return pte & PT_WRITABLE_MASK;
266 static int is_dirty_gpte(unsigned long pte)
268 return pte & PT_DIRTY_MASK;
271 static int is_rmap_spte(u64 pte)
273 return is_shadow_present_pte(pte);
276 static int is_last_spte(u64 pte, int level)
278 if (level == PT_PAGE_TABLE_LEVEL)
280 if (is_large_pte(pte))
285 static pfn_t spte_to_pfn(u64 pte)
287 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
290 static gfn_t pse36_gfn_delta(u32 gpte)
292 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
294 return (gpte & PT32_DIR_PSE36_MASK) << shift;
297 static void __set_spte(u64 *sptep, u64 spte)
299 set_64bit(sptep, spte);
302 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
305 return xchg(sptep, new_spte);
311 } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
317 static bool spte_has_volatile_bits(u64 spte)
319 if (!shadow_accessed_mask)
322 if (!is_shadow_present_pte(spte))
325 if ((spte & shadow_accessed_mask) &&
326 (!is_writable_pte(spte) || (spte & shadow_dirty_mask)))
332 static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask)
334 return (old_spte & bit_mask) && !(new_spte & bit_mask);
337 static void update_spte(u64 *sptep, u64 new_spte)
339 u64 mask, old_spte = *sptep;
341 WARN_ON(!is_rmap_spte(new_spte));
343 new_spte |= old_spte & shadow_dirty_mask;
345 mask = shadow_accessed_mask;
346 if (is_writable_pte(old_spte))
347 mask |= shadow_dirty_mask;
349 if (!spte_has_volatile_bits(old_spte) || (new_spte & mask) == mask)
350 __set_spte(sptep, new_spte);
352 old_spte = __xchg_spte(sptep, new_spte);
354 if (!shadow_accessed_mask)
357 if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask))
358 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
359 if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask))
360 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
363 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
364 struct kmem_cache *base_cache, int min)
368 if (cache->nobjs >= min)
370 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
371 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
374 cache->objects[cache->nobjs++] = obj;
379 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
380 struct kmem_cache *cache)
383 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
386 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
391 if (cache->nobjs >= min)
393 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
394 page = alloc_page(GFP_KERNEL);
397 cache->objects[cache->nobjs++] = page_address(page);
402 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
405 free_page((unsigned long)mc->objects[--mc->nobjs]);
408 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
412 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
416 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
417 rmap_desc_cache, 4 + PTE_PREFETCH_NUM);
420 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
423 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
424 mmu_page_header_cache, 4);
429 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
431 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
432 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
433 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
434 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
435 mmu_page_header_cache);
438 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
444 p = mc->objects[--mc->nobjs];
448 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
450 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
451 sizeof(struct kvm_pte_chain));
454 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
456 kmem_cache_free(pte_chain_cache, pc);
459 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
461 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
462 sizeof(struct kvm_rmap_desc));
465 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
467 kmem_cache_free(rmap_desc_cache, rd);
470 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
472 if (!sp->role.direct)
473 return sp->gfns[index];
475 return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
478 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
481 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
483 sp->gfns[index] = gfn;
487 * Return the pointer to the largepage write count for a given
488 * gfn, handling slots that are not large page aligned.
490 static int *slot_largepage_idx(gfn_t gfn,
491 struct kvm_memory_slot *slot,
496 idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
497 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
498 return &slot->lpage_info[level - 2][idx].write_count;
501 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
503 struct kvm_memory_slot *slot;
507 slot = gfn_to_memslot(kvm, gfn);
508 for (i = PT_DIRECTORY_LEVEL;
509 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
510 write_count = slot_largepage_idx(gfn, slot, i);
515 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
517 struct kvm_memory_slot *slot;
521 slot = gfn_to_memslot(kvm, gfn);
522 for (i = PT_DIRECTORY_LEVEL;
523 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
524 write_count = slot_largepage_idx(gfn, slot, i);
526 WARN_ON(*write_count < 0);
530 static int has_wrprotected_page(struct kvm *kvm,
534 struct kvm_memory_slot *slot;
537 slot = gfn_to_memslot(kvm, gfn);
539 largepage_idx = slot_largepage_idx(gfn, slot, level);
540 return *largepage_idx;
546 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
548 unsigned long page_size;
551 page_size = kvm_host_page_size(kvm, gfn);
553 for (i = PT_PAGE_TABLE_LEVEL;
554 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
555 if (page_size >= KVM_HPAGE_SIZE(i))
564 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
566 struct kvm_memory_slot *slot;
567 int host_level, level, max_level;
569 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
570 if (slot && slot->dirty_bitmap)
571 return PT_PAGE_TABLE_LEVEL;
573 host_level = host_mapping_level(vcpu->kvm, large_gfn);
575 if (host_level == PT_PAGE_TABLE_LEVEL)
578 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
579 kvm_x86_ops->get_lpage_level() : host_level;
581 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
582 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
589 * Take gfn and return the reverse mapping to it.
592 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
594 struct kvm_memory_slot *slot;
597 slot = gfn_to_memslot(kvm, gfn);
598 if (likely(level == PT_PAGE_TABLE_LEVEL))
599 return &slot->rmap[gfn - slot->base_gfn];
601 idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
602 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
604 return &slot->lpage_info[level - 2][idx].rmap_pde;
608 * Reverse mapping data structures:
610 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
611 * that points to page_address(page).
613 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
614 * containing more mappings.
616 * Returns the number of rmap entries before the spte was added or zero if
617 * the spte was not added.
620 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
622 struct kvm_mmu_page *sp;
623 struct kvm_rmap_desc *desc;
624 unsigned long *rmapp;
627 if (!is_rmap_spte(*spte))
629 sp = page_header(__pa(spte));
630 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
631 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
633 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
634 *rmapp = (unsigned long)spte;
635 } else if (!(*rmapp & 1)) {
636 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
637 desc = mmu_alloc_rmap_desc(vcpu);
638 desc->sptes[0] = (u64 *)*rmapp;
639 desc->sptes[1] = spte;
640 *rmapp = (unsigned long)desc | 1;
643 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
644 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
645 while (desc->sptes[RMAP_EXT-1] && desc->more) {
649 if (desc->sptes[RMAP_EXT-1]) {
650 desc->more = mmu_alloc_rmap_desc(vcpu);
653 for (i = 0; desc->sptes[i]; ++i)
655 desc->sptes[i] = spte;
660 static void rmap_desc_remove_entry(unsigned long *rmapp,
661 struct kvm_rmap_desc *desc,
663 struct kvm_rmap_desc *prev_desc)
667 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
669 desc->sptes[i] = desc->sptes[j];
670 desc->sptes[j] = NULL;
673 if (!prev_desc && !desc->more)
674 *rmapp = (unsigned long)desc->sptes[0];
677 prev_desc->more = desc->more;
679 *rmapp = (unsigned long)desc->more | 1;
680 mmu_free_rmap_desc(desc);
683 static void rmap_remove(struct kvm *kvm, u64 *spte)
685 struct kvm_rmap_desc *desc;
686 struct kvm_rmap_desc *prev_desc;
687 struct kvm_mmu_page *sp;
689 unsigned long *rmapp;
692 sp = page_header(__pa(spte));
693 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
694 rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
696 printk(KERN_ERR "rmap_remove: %p 0->BUG\n", spte);
698 } else if (!(*rmapp & 1)) {
699 rmap_printk("rmap_remove: %p 1->0\n", spte);
700 if ((u64 *)*rmapp != spte) {
701 printk(KERN_ERR "rmap_remove: %p 1->BUG\n", spte);
706 rmap_printk("rmap_remove: %p many->many\n", spte);
707 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
710 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
711 if (desc->sptes[i] == spte) {
712 rmap_desc_remove_entry(rmapp,
720 pr_err("rmap_remove: %p many->many\n", spte);
725 static int set_spte_track_bits(u64 *sptep, u64 new_spte)
728 u64 old_spte = *sptep;
730 if (!spte_has_volatile_bits(old_spte))
731 __set_spte(sptep, new_spte);
733 old_spte = __xchg_spte(sptep, new_spte);
735 if (!is_rmap_spte(old_spte))
738 pfn = spte_to_pfn(old_spte);
739 if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
740 kvm_set_pfn_accessed(pfn);
741 if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask))
742 kvm_set_pfn_dirty(pfn);
746 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
748 if (set_spte_track_bits(sptep, new_spte))
749 rmap_remove(kvm, sptep);
752 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
754 struct kvm_rmap_desc *desc;
760 else if (!(*rmapp & 1)) {
762 return (u64 *)*rmapp;
765 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
768 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
769 if (prev_spte == spte)
770 return desc->sptes[i];
771 prev_spte = desc->sptes[i];
778 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
780 unsigned long *rmapp;
782 int i, write_protected = 0;
784 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
786 spte = rmap_next(kvm, rmapp, NULL);
789 BUG_ON(!(*spte & PT_PRESENT_MASK));
790 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
791 if (is_writable_pte(*spte)) {
792 update_spte(spte, *spte & ~PT_WRITABLE_MASK);
795 spte = rmap_next(kvm, rmapp, spte);
798 /* check for huge page mappings */
799 for (i = PT_DIRECTORY_LEVEL;
800 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
801 rmapp = gfn_to_rmap(kvm, gfn, i);
802 spte = rmap_next(kvm, rmapp, NULL);
805 BUG_ON(!(*spte & PT_PRESENT_MASK));
806 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
807 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
808 if (is_writable_pte(*spte)) {
810 shadow_trap_nonpresent_pte);
815 spte = rmap_next(kvm, rmapp, spte);
819 return write_protected;
822 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
826 int need_tlb_flush = 0;
828 while ((spte = rmap_next(kvm, rmapp, NULL))) {
829 BUG_ON(!(*spte & PT_PRESENT_MASK));
830 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
831 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
834 return need_tlb_flush;
837 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
842 pte_t *ptep = (pte_t *)data;
845 WARN_ON(pte_huge(*ptep));
846 new_pfn = pte_pfn(*ptep);
847 spte = rmap_next(kvm, rmapp, NULL);
849 BUG_ON(!is_shadow_present_pte(*spte));
850 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
852 if (pte_write(*ptep)) {
853 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
854 spte = rmap_next(kvm, rmapp, NULL);
856 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
857 new_spte |= (u64)new_pfn << PAGE_SHIFT;
859 new_spte &= ~PT_WRITABLE_MASK;
860 new_spte &= ~SPTE_HOST_WRITEABLE;
861 new_spte &= ~shadow_accessed_mask;
862 set_spte_track_bits(spte, new_spte);
863 spte = rmap_next(kvm, rmapp, spte);
867 kvm_flush_remote_tlbs(kvm);
872 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
874 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
880 struct kvm_memslots *slots;
882 slots = kvm_memslots(kvm);
884 for (i = 0; i < slots->nmemslots; i++) {
885 struct kvm_memory_slot *memslot = &slots->memslots[i];
886 unsigned long start = memslot->userspace_addr;
889 end = start + (memslot->npages << PAGE_SHIFT);
890 if (hva >= start && hva < end) {
891 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
893 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
895 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
899 sh = KVM_HPAGE_GFN_SHIFT(PT_DIRECTORY_LEVEL+j);
900 idx = ((memslot->base_gfn+gfn_offset) >> sh) -
901 (memslot->base_gfn >> sh);
903 &memslot->lpage_info[j][idx].rmap_pde,
906 trace_kvm_age_page(hva, memslot, ret);
914 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
916 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
919 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
921 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
924 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
931 * Emulate the accessed bit for EPT, by checking if this page has
932 * an EPT mapping, and clearing it if it does. On the next access,
933 * a new EPT mapping will be established.
934 * This has some overhead, but not as much as the cost of swapping
935 * out actively used pages or breaking up actively used hugepages.
937 if (!shadow_accessed_mask)
938 return kvm_unmap_rmapp(kvm, rmapp, data);
940 spte = rmap_next(kvm, rmapp, NULL);
944 BUG_ON(!(_spte & PT_PRESENT_MASK));
945 _young = _spte & PT_ACCESSED_MASK;
948 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
950 spte = rmap_next(kvm, rmapp, spte);
955 #define RMAP_RECYCLE_THRESHOLD 1000
957 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
959 unsigned long *rmapp;
960 struct kvm_mmu_page *sp;
962 sp = page_header(__pa(spte));
964 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
966 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
967 kvm_flush_remote_tlbs(vcpu->kvm);
970 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
972 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
976 static int is_empty_shadow_page(u64 *spt)
981 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
982 if (is_shadow_present_pte(*pos)) {
983 printk(KERN_ERR "%s: %p %llx\n", __func__,
992 * This value is the sum of all of the kvm instances's
993 * kvm->arch.n_used_mmu_pages values. We need a global,
994 * aggregate version in order to make the slab shrinker
997 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, int nr)
999 kvm->arch.n_used_mmu_pages += nr;
1000 percpu_counter_add(&kvm_total_used_mmu_pages, nr);
1003 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1005 ASSERT(is_empty_shadow_page(sp->spt));
1006 hlist_del(&sp->hash_link);
1007 list_del(&sp->link);
1008 __free_page(virt_to_page(sp->spt));
1009 if (!sp->role.direct)
1010 __free_page(virt_to_page(sp->gfns));
1011 kmem_cache_free(mmu_page_header_cache, sp);
1012 kvm_mod_used_mmu_pages(kvm, -1);
1015 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1017 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
1020 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
1021 u64 *parent_pte, int direct)
1023 struct kvm_mmu_page *sp;
1025 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
1026 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
1028 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
1030 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1031 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1032 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
1033 sp->multimapped = 0;
1034 sp->parent_pte = parent_pte;
1035 kvm_mod_used_mmu_pages(vcpu->kvm, +1);
1039 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1040 struct kvm_mmu_page *sp, u64 *parent_pte)
1042 struct kvm_pte_chain *pte_chain;
1043 struct hlist_node *node;
1048 if (!sp->multimapped) {
1049 u64 *old = sp->parent_pte;
1052 sp->parent_pte = parent_pte;
1055 sp->multimapped = 1;
1056 pte_chain = mmu_alloc_pte_chain(vcpu);
1057 INIT_HLIST_HEAD(&sp->parent_ptes);
1058 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1059 pte_chain->parent_ptes[0] = old;
1061 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
1062 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
1064 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
1065 if (!pte_chain->parent_ptes[i]) {
1066 pte_chain->parent_ptes[i] = parent_pte;
1070 pte_chain = mmu_alloc_pte_chain(vcpu);
1072 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1073 pte_chain->parent_ptes[0] = parent_pte;
1076 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1079 struct kvm_pte_chain *pte_chain;
1080 struct hlist_node *node;
1083 if (!sp->multimapped) {
1084 BUG_ON(sp->parent_pte != parent_pte);
1085 sp->parent_pte = NULL;
1088 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1089 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1090 if (!pte_chain->parent_ptes[i])
1092 if (pte_chain->parent_ptes[i] != parent_pte)
1094 while (i + 1 < NR_PTE_CHAIN_ENTRIES
1095 && pte_chain->parent_ptes[i + 1]) {
1096 pte_chain->parent_ptes[i]
1097 = pte_chain->parent_ptes[i + 1];
1100 pte_chain->parent_ptes[i] = NULL;
1102 hlist_del(&pte_chain->link);
1103 mmu_free_pte_chain(pte_chain);
1104 if (hlist_empty(&sp->parent_ptes)) {
1105 sp->multimapped = 0;
1106 sp->parent_pte = NULL;
1114 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1116 struct kvm_pte_chain *pte_chain;
1117 struct hlist_node *node;
1118 struct kvm_mmu_page *parent_sp;
1121 if (!sp->multimapped && sp->parent_pte) {
1122 parent_sp = page_header(__pa(sp->parent_pte));
1123 fn(parent_sp, sp->parent_pte);
1127 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1128 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1129 u64 *spte = pte_chain->parent_ptes[i];
1133 parent_sp = page_header(__pa(spte));
1134 fn(parent_sp, spte);
1138 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte);
1139 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1141 mmu_parent_walk(sp, mark_unsync);
1144 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte)
1148 index = spte - sp->spt;
1149 if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1151 if (sp->unsync_children++)
1153 kvm_mmu_mark_parents_unsync(sp);
1156 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1157 struct kvm_mmu_page *sp)
1161 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1162 sp->spt[i] = shadow_trap_nonpresent_pte;
1165 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1166 struct kvm_mmu_page *sp, bool clear_unsync)
1171 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1175 #define KVM_PAGE_ARRAY_NR 16
1177 struct kvm_mmu_pages {
1178 struct mmu_page_and_offset {
1179 struct kvm_mmu_page *sp;
1181 } page[KVM_PAGE_ARRAY_NR];
1185 #define for_each_unsync_children(bitmap, idx) \
1186 for (idx = find_first_bit(bitmap, 512); \
1188 idx = find_next_bit(bitmap, 512, idx+1))
1190 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1196 for (i=0; i < pvec->nr; i++)
1197 if (pvec->page[i].sp == sp)
1200 pvec->page[pvec->nr].sp = sp;
1201 pvec->page[pvec->nr].idx = idx;
1203 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1206 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1207 struct kvm_mmu_pages *pvec)
1209 int i, ret, nr_unsync_leaf = 0;
1211 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1212 struct kvm_mmu_page *child;
1213 u64 ent = sp->spt[i];
1215 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1216 goto clear_child_bitmap;
1218 child = page_header(ent & PT64_BASE_ADDR_MASK);
1220 if (child->unsync_children) {
1221 if (mmu_pages_add(pvec, child, i))
1224 ret = __mmu_unsync_walk(child, pvec);
1226 goto clear_child_bitmap;
1228 nr_unsync_leaf += ret;
1231 } else if (child->unsync) {
1233 if (mmu_pages_add(pvec, child, i))
1236 goto clear_child_bitmap;
1241 __clear_bit(i, sp->unsync_child_bitmap);
1242 sp->unsync_children--;
1243 WARN_ON((int)sp->unsync_children < 0);
1247 return nr_unsync_leaf;
1250 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1251 struct kvm_mmu_pages *pvec)
1253 if (!sp->unsync_children)
1256 mmu_pages_add(pvec, sp, 0);
1257 return __mmu_unsync_walk(sp, pvec);
1260 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1262 WARN_ON(!sp->unsync);
1263 trace_kvm_mmu_sync_page(sp);
1265 --kvm->stat.mmu_unsync;
1268 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1269 struct list_head *invalid_list);
1270 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1271 struct list_head *invalid_list);
1273 #define for_each_gfn_sp(kvm, sp, gfn, pos) \
1274 hlist_for_each_entry(sp, pos, \
1275 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1276 if ((sp)->gfn != (gfn)) {} else
1278 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos) \
1279 hlist_for_each_entry(sp, pos, \
1280 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1281 if ((sp)->gfn != (gfn) || (sp)->role.direct || \
1282 (sp)->role.invalid) {} else
1284 /* @sp->gfn should be write-protected at the call site */
1285 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1286 struct list_head *invalid_list, bool clear_unsync)
1288 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1289 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1294 kvm_unlink_unsync_page(vcpu->kvm, sp);
1296 if (vcpu->arch.mmu.sync_page(vcpu, sp, clear_unsync)) {
1297 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1301 kvm_mmu_flush_tlb(vcpu);
1305 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1306 struct kvm_mmu_page *sp)
1308 LIST_HEAD(invalid_list);
1311 ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1313 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1318 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1319 struct list_head *invalid_list)
1321 return __kvm_sync_page(vcpu, sp, invalid_list, true);
1324 /* @gfn should be write-protected at the call site */
1325 static void kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1327 struct kvm_mmu_page *s;
1328 struct hlist_node *node;
1329 LIST_HEAD(invalid_list);
1332 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1336 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1337 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1338 (vcpu->arch.mmu.sync_page(vcpu, s, true))) {
1339 kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1342 kvm_unlink_unsync_page(vcpu->kvm, s);
1346 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1348 kvm_mmu_flush_tlb(vcpu);
1351 struct mmu_page_path {
1352 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1353 unsigned int idx[PT64_ROOT_LEVEL-1];
1356 #define for_each_sp(pvec, sp, parents, i) \
1357 for (i = mmu_pages_next(&pvec, &parents, -1), \
1358 sp = pvec.page[i].sp; \
1359 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1360 i = mmu_pages_next(&pvec, &parents, i))
1362 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1363 struct mmu_page_path *parents,
1368 for (n = i+1; n < pvec->nr; n++) {
1369 struct kvm_mmu_page *sp = pvec->page[n].sp;
1371 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1372 parents->idx[0] = pvec->page[n].idx;
1376 parents->parent[sp->role.level-2] = sp;
1377 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1383 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1385 struct kvm_mmu_page *sp;
1386 unsigned int level = 0;
1389 unsigned int idx = parents->idx[level];
1391 sp = parents->parent[level];
1395 --sp->unsync_children;
1396 WARN_ON((int)sp->unsync_children < 0);
1397 __clear_bit(idx, sp->unsync_child_bitmap);
1399 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1402 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1403 struct mmu_page_path *parents,
1404 struct kvm_mmu_pages *pvec)
1406 parents->parent[parent->role.level-1] = NULL;
1410 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1411 struct kvm_mmu_page *parent)
1414 struct kvm_mmu_page *sp;
1415 struct mmu_page_path parents;
1416 struct kvm_mmu_pages pages;
1417 LIST_HEAD(invalid_list);
1419 kvm_mmu_pages_init(parent, &parents, &pages);
1420 while (mmu_unsync_walk(parent, &pages)) {
1423 for_each_sp(pages, sp, parents, i)
1424 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1427 kvm_flush_remote_tlbs(vcpu->kvm);
1429 for_each_sp(pages, sp, parents, i) {
1430 kvm_sync_page(vcpu, sp, &invalid_list);
1431 mmu_pages_clear_parents(&parents);
1433 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1434 cond_resched_lock(&vcpu->kvm->mmu_lock);
1435 kvm_mmu_pages_init(parent, &parents, &pages);
1439 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1447 union kvm_mmu_page_role role;
1449 struct kvm_mmu_page *sp;
1450 struct hlist_node *node;
1451 bool need_sync = false;
1453 role = vcpu->arch.mmu.base_role;
1455 role.direct = direct;
1458 role.access = access;
1459 if (!vcpu->arch.mmu.direct_map
1460 && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1461 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1462 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1463 role.quadrant = quadrant;
1465 for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1466 if (!need_sync && sp->unsync)
1469 if (sp->role.word != role.word)
1472 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1475 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1476 if (sp->unsync_children) {
1477 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1478 kvm_mmu_mark_parents_unsync(sp);
1479 } else if (sp->unsync)
1480 kvm_mmu_mark_parents_unsync(sp);
1482 trace_kvm_mmu_get_page(sp, false);
1485 ++vcpu->kvm->stat.mmu_cache_miss;
1486 sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1491 hlist_add_head(&sp->hash_link,
1492 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1494 if (rmap_write_protect(vcpu->kvm, gfn))
1495 kvm_flush_remote_tlbs(vcpu->kvm);
1496 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1497 kvm_sync_pages(vcpu, gfn);
1499 account_shadowed(vcpu->kvm, gfn);
1501 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1502 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1504 nonpaging_prefetch_page(vcpu, sp);
1505 trace_kvm_mmu_get_page(sp, true);
1509 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1510 struct kvm_vcpu *vcpu, u64 addr)
1512 iterator->addr = addr;
1513 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1514 iterator->level = vcpu->arch.mmu.shadow_root_level;
1516 if (iterator->level == PT64_ROOT_LEVEL &&
1517 vcpu->arch.mmu.root_level < PT64_ROOT_LEVEL &&
1518 !vcpu->arch.mmu.direct_map)
1521 if (iterator->level == PT32E_ROOT_LEVEL) {
1522 iterator->shadow_addr
1523 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1524 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1526 if (!iterator->shadow_addr)
1527 iterator->level = 0;
1531 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1533 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1536 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1537 if (is_large_pte(*iterator->sptep))
1540 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1541 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1545 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1547 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1551 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1555 spte = __pa(sp->spt)
1556 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1557 | PT_WRITABLE_MASK | PT_USER_MASK;
1558 __set_spte(sptep, spte);
1561 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1563 if (is_large_pte(*sptep)) {
1564 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1565 kvm_flush_remote_tlbs(vcpu->kvm);
1569 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1570 unsigned direct_access)
1572 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
1573 struct kvm_mmu_page *child;
1576 * For the direct sp, if the guest pte's dirty bit
1577 * changed form clean to dirty, it will corrupt the
1578 * sp's access: allow writable in the read-only sp,
1579 * so we should update the spte at this point to get
1580 * a new sp with the correct access.
1582 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
1583 if (child->role.access == direct_access)
1586 mmu_page_remove_parent_pte(child, sptep);
1587 __set_spte(sptep, shadow_trap_nonpresent_pte);
1588 kvm_flush_remote_tlbs(vcpu->kvm);
1592 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1593 struct kvm_mmu_page *sp)
1601 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1604 if (is_shadow_present_pte(ent)) {
1605 if (!is_last_spte(ent, sp->role.level)) {
1606 ent &= PT64_BASE_ADDR_MASK;
1607 mmu_page_remove_parent_pte(page_header(ent),
1610 if (is_large_pte(ent))
1612 drop_spte(kvm, &pt[i],
1613 shadow_trap_nonpresent_pte);
1616 pt[i] = shadow_trap_nonpresent_pte;
1620 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1622 mmu_page_remove_parent_pte(sp, parent_pte);
1625 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1628 struct kvm_vcpu *vcpu;
1630 kvm_for_each_vcpu(i, vcpu, kvm)
1631 vcpu->arch.last_pte_updated = NULL;
1634 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1638 while (sp->multimapped || sp->parent_pte) {
1639 if (!sp->multimapped)
1640 parent_pte = sp->parent_pte;
1642 struct kvm_pte_chain *chain;
1644 chain = container_of(sp->parent_ptes.first,
1645 struct kvm_pte_chain, link);
1646 parent_pte = chain->parent_ptes[0];
1648 BUG_ON(!parent_pte);
1649 kvm_mmu_put_page(sp, parent_pte);
1650 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1654 static int mmu_zap_unsync_children(struct kvm *kvm,
1655 struct kvm_mmu_page *parent,
1656 struct list_head *invalid_list)
1659 struct mmu_page_path parents;
1660 struct kvm_mmu_pages pages;
1662 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1665 kvm_mmu_pages_init(parent, &parents, &pages);
1666 while (mmu_unsync_walk(parent, &pages)) {
1667 struct kvm_mmu_page *sp;
1669 for_each_sp(pages, sp, parents, i) {
1670 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1671 mmu_pages_clear_parents(&parents);
1674 kvm_mmu_pages_init(parent, &parents, &pages);
1680 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1681 struct list_head *invalid_list)
1685 trace_kvm_mmu_prepare_zap_page(sp);
1686 ++kvm->stat.mmu_shadow_zapped;
1687 ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1688 kvm_mmu_page_unlink_children(kvm, sp);
1689 kvm_mmu_unlink_parents(kvm, sp);
1690 if (!sp->role.invalid && !sp->role.direct)
1691 unaccount_shadowed(kvm, sp->gfn);
1693 kvm_unlink_unsync_page(kvm, sp);
1694 if (!sp->root_count) {
1697 list_move(&sp->link, invalid_list);
1699 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1700 kvm_reload_remote_mmus(kvm);
1703 sp->role.invalid = 1;
1704 kvm_mmu_reset_last_pte_updated(kvm);
1708 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1709 struct list_head *invalid_list)
1711 struct kvm_mmu_page *sp;
1713 if (list_empty(invalid_list))
1716 kvm_flush_remote_tlbs(kvm);
1719 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1720 WARN_ON(!sp->role.invalid || sp->root_count);
1721 kvm_mmu_free_page(kvm, sp);
1722 } while (!list_empty(invalid_list));
1727 * Changing the number of mmu pages allocated to the vm
1728 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
1730 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int goal_nr_mmu_pages)
1732 LIST_HEAD(invalid_list);
1734 * If we set the number of mmu pages to be smaller be than the
1735 * number of actived pages , we must to free some mmu pages before we
1739 if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
1740 while (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages &&
1741 !list_empty(&kvm->arch.active_mmu_pages)) {
1742 struct kvm_mmu_page *page;
1744 page = container_of(kvm->arch.active_mmu_pages.prev,
1745 struct kvm_mmu_page, link);
1746 kvm_mmu_prepare_zap_page(kvm, page, &invalid_list);
1747 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1749 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
1752 kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
1755 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1757 struct kvm_mmu_page *sp;
1758 struct hlist_node *node;
1759 LIST_HEAD(invalid_list);
1762 pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
1765 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1766 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
1769 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1771 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1775 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1777 struct kvm_mmu_page *sp;
1778 struct hlist_node *node;
1779 LIST_HEAD(invalid_list);
1781 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1782 pgprintk("%s: zap %llx %x\n",
1783 __func__, gfn, sp->role.word);
1784 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1786 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1789 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1791 int slot = memslot_id(kvm, gfn);
1792 struct kvm_mmu_page *sp = page_header(__pa(pte));
1794 __set_bit(slot, sp->slot_bitmap);
1797 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1802 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1805 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1806 if (pt[i] == shadow_notrap_nonpresent_pte)
1807 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1812 * The function is based on mtrr_type_lookup() in
1813 * arch/x86/kernel/cpu/mtrr/generic.c
1815 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1820 u8 prev_match, curr_match;
1821 int num_var_ranges = KVM_NR_VAR_MTRR;
1823 if (!mtrr_state->enabled)
1826 /* Make end inclusive end, instead of exclusive */
1829 /* Look in fixed ranges. Just return the type as per start */
1830 if (mtrr_state->have_fixed && (start < 0x100000)) {
1833 if (start < 0x80000) {
1835 idx += (start >> 16);
1836 return mtrr_state->fixed_ranges[idx];
1837 } else if (start < 0xC0000) {
1839 idx += ((start - 0x80000) >> 14);
1840 return mtrr_state->fixed_ranges[idx];
1841 } else if (start < 0x1000000) {
1843 idx += ((start - 0xC0000) >> 12);
1844 return mtrr_state->fixed_ranges[idx];
1849 * Look in variable ranges
1850 * Look of multiple ranges matching this address and pick type
1851 * as per MTRR precedence
1853 if (!(mtrr_state->enabled & 2))
1854 return mtrr_state->def_type;
1857 for (i = 0; i < num_var_ranges; ++i) {
1858 unsigned short start_state, end_state;
1860 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1863 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1864 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1865 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1866 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1868 start_state = ((start & mask) == (base & mask));
1869 end_state = ((end & mask) == (base & mask));
1870 if (start_state != end_state)
1873 if ((start & mask) != (base & mask))
1876 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1877 if (prev_match == 0xFF) {
1878 prev_match = curr_match;
1882 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1883 curr_match == MTRR_TYPE_UNCACHABLE)
1884 return MTRR_TYPE_UNCACHABLE;
1886 if ((prev_match == MTRR_TYPE_WRBACK &&
1887 curr_match == MTRR_TYPE_WRTHROUGH) ||
1888 (prev_match == MTRR_TYPE_WRTHROUGH &&
1889 curr_match == MTRR_TYPE_WRBACK)) {
1890 prev_match = MTRR_TYPE_WRTHROUGH;
1891 curr_match = MTRR_TYPE_WRTHROUGH;
1894 if (prev_match != curr_match)
1895 return MTRR_TYPE_UNCACHABLE;
1898 if (prev_match != 0xFF)
1901 return mtrr_state->def_type;
1904 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1908 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1909 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1910 if (mtrr == 0xfe || mtrr == 0xff)
1911 mtrr = MTRR_TYPE_WRBACK;
1914 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1916 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1918 trace_kvm_mmu_unsync_page(sp);
1919 ++vcpu->kvm->stat.mmu_unsync;
1922 kvm_mmu_mark_parents_unsync(sp);
1923 mmu_convert_notrap(sp);
1926 static void kvm_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1928 struct kvm_mmu_page *s;
1929 struct hlist_node *node;
1931 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1934 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1935 __kvm_unsync_page(vcpu, s);
1939 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1942 struct kvm_mmu_page *s;
1943 struct hlist_node *node;
1944 bool need_unsync = false;
1946 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1950 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1953 if (!need_unsync && !s->unsync) {
1960 kvm_unsync_pages(vcpu, gfn);
1964 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1965 unsigned pte_access, int user_fault,
1966 int write_fault, int dirty, int level,
1967 gfn_t gfn, pfn_t pfn, bool speculative,
1968 bool can_unsync, bool reset_host_protection)
1974 * We don't set the accessed bit, since we sometimes want to see
1975 * whether the guest actually used the pte (in order to detect
1978 spte = shadow_base_present_pte;
1980 spte |= shadow_accessed_mask;
1982 pte_access &= ~ACC_WRITE_MASK;
1983 if (pte_access & ACC_EXEC_MASK)
1984 spte |= shadow_x_mask;
1986 spte |= shadow_nx_mask;
1987 if (pte_access & ACC_USER_MASK)
1988 spte |= shadow_user_mask;
1989 if (level > PT_PAGE_TABLE_LEVEL)
1990 spte |= PT_PAGE_SIZE_MASK;
1992 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1993 kvm_is_mmio_pfn(pfn));
1995 if (reset_host_protection)
1996 spte |= SPTE_HOST_WRITEABLE;
1998 spte |= (u64)pfn << PAGE_SHIFT;
2000 if ((pte_access & ACC_WRITE_MASK)
2001 || (!vcpu->arch.mmu.direct_map && write_fault
2002 && !is_write_protection(vcpu) && !user_fault)) {
2004 if (level > PT_PAGE_TABLE_LEVEL &&
2005 has_wrprotected_page(vcpu->kvm, gfn, level)) {
2007 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2011 spte |= PT_WRITABLE_MASK;
2013 if (!vcpu->arch.mmu.direct_map
2014 && !(pte_access & ACC_WRITE_MASK))
2015 spte &= ~PT_USER_MASK;
2018 * Optimization: for pte sync, if spte was writable the hash
2019 * lookup is unnecessary (and expensive). Write protection
2020 * is responsibility of mmu_get_page / kvm_sync_page.
2021 * Same reasoning can be applied to dirty page accounting.
2023 if (!can_unsync && is_writable_pte(*sptep))
2026 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
2027 pgprintk("%s: found shadow page for %llx, marking ro\n",
2030 pte_access &= ~ACC_WRITE_MASK;
2031 if (is_writable_pte(spte))
2032 spte &= ~PT_WRITABLE_MASK;
2036 if (pte_access & ACC_WRITE_MASK)
2037 mark_page_dirty(vcpu->kvm, gfn);
2040 update_spte(sptep, spte);
2045 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2046 unsigned pt_access, unsigned pte_access,
2047 int user_fault, int write_fault, int dirty,
2048 int *ptwrite, int level, gfn_t gfn,
2049 pfn_t pfn, bool speculative,
2050 bool reset_host_protection)
2052 int was_rmapped = 0;
2055 pgprintk("%s: spte %llx access %x write_fault %d"
2056 " user_fault %d gfn %llx\n",
2057 __func__, *sptep, pt_access,
2058 write_fault, user_fault, gfn);
2060 if (is_rmap_spte(*sptep)) {
2062 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2063 * the parent of the now unreachable PTE.
2065 if (level > PT_PAGE_TABLE_LEVEL &&
2066 !is_large_pte(*sptep)) {
2067 struct kvm_mmu_page *child;
2070 child = page_header(pte & PT64_BASE_ADDR_MASK);
2071 mmu_page_remove_parent_pte(child, sptep);
2072 __set_spte(sptep, shadow_trap_nonpresent_pte);
2073 kvm_flush_remote_tlbs(vcpu->kvm);
2074 } else if (pfn != spte_to_pfn(*sptep)) {
2075 pgprintk("hfn old %llx new %llx\n",
2076 spte_to_pfn(*sptep), pfn);
2077 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2078 kvm_flush_remote_tlbs(vcpu->kvm);
2083 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
2084 dirty, level, gfn, pfn, speculative, true,
2085 reset_host_protection)) {
2088 kvm_mmu_flush_tlb(vcpu);
2091 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2092 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2093 is_large_pte(*sptep)? "2MB" : "4kB",
2094 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2096 if (!was_rmapped && is_large_pte(*sptep))
2097 ++vcpu->kvm->stat.lpages;
2099 page_header_update_slot(vcpu->kvm, sptep, gfn);
2101 rmap_count = rmap_add(vcpu, sptep, gfn);
2102 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2103 rmap_recycle(vcpu, sptep, gfn);
2105 kvm_release_pfn_clean(pfn);
2107 vcpu->arch.last_pte_updated = sptep;
2108 vcpu->arch.last_pte_gfn = gfn;
2112 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2116 static struct kvm_memory_slot *
2117 pte_prefetch_gfn_to_memslot(struct kvm_vcpu *vcpu, gfn_t gfn, bool no_dirty_log)
2119 struct kvm_memory_slot *slot;
2121 slot = gfn_to_memslot(vcpu->kvm, gfn);
2122 if (!slot || slot->flags & KVM_MEMSLOT_INVALID ||
2123 (no_dirty_log && slot->dirty_bitmap))
2129 static pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn,
2132 struct kvm_memory_slot *slot;
2135 slot = pte_prefetch_gfn_to_memslot(vcpu, gfn, no_dirty_log);
2138 return page_to_pfn(bad_page);
2141 hva = gfn_to_hva_memslot(slot, gfn);
2143 return hva_to_pfn_atomic(vcpu->kvm, hva);
2146 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2147 struct kvm_mmu_page *sp,
2148 u64 *start, u64 *end)
2150 struct page *pages[PTE_PREFETCH_NUM];
2151 unsigned access = sp->role.access;
2155 gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt);
2156 if (!pte_prefetch_gfn_to_memslot(vcpu, gfn, access & ACC_WRITE_MASK))
2159 ret = gfn_to_page_many_atomic(vcpu->kvm, gfn, pages, end - start);
2163 for (i = 0; i < ret; i++, gfn++, start++)
2164 mmu_set_spte(vcpu, start, ACC_ALL,
2165 access, 0, 0, 1, NULL,
2166 sp->role.level, gfn,
2167 page_to_pfn(pages[i]), true, true);
2172 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2173 struct kvm_mmu_page *sp, u64 *sptep)
2175 u64 *spte, *start = NULL;
2178 WARN_ON(!sp->role.direct);
2180 i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1);
2183 for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2184 if (*spte != shadow_trap_nonpresent_pte || spte == sptep) {
2187 if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2195 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2197 struct kvm_mmu_page *sp;
2200 * Since it's no accessed bit on EPT, it's no way to
2201 * distinguish between actually accessed translations
2202 * and prefetched, so disable pte prefetch if EPT is
2205 if (!shadow_accessed_mask)
2208 sp = page_header(__pa(sptep));
2209 if (sp->role.level > PT_PAGE_TABLE_LEVEL)
2212 __direct_pte_prefetch(vcpu, sp, sptep);
2215 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2216 int level, gfn_t gfn, pfn_t pfn)
2218 struct kvm_shadow_walk_iterator iterator;
2219 struct kvm_mmu_page *sp;
2223 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2224 if (iterator.level == level) {
2225 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2226 0, write, 1, &pt_write,
2227 level, gfn, pfn, false, true);
2228 direct_pte_prefetch(vcpu, iterator.sptep);
2229 ++vcpu->stat.pf_fixed;
2233 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2234 u64 base_addr = iterator.addr;
2236 base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2237 pseudo_gfn = base_addr >> PAGE_SHIFT;
2238 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2240 1, ACC_ALL, iterator.sptep);
2242 pgprintk("nonpaging_map: ENOMEM\n");
2243 kvm_release_pfn_clean(pfn);
2247 __set_spte(iterator.sptep,
2249 | PT_PRESENT_MASK | PT_WRITABLE_MASK
2250 | shadow_user_mask | shadow_x_mask
2251 | shadow_accessed_mask);
2257 static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk)
2261 info.si_signo = SIGBUS;
2263 info.si_code = BUS_MCEERR_AR;
2264 info.si_addr = (void __user *)address;
2265 info.si_addr_lsb = PAGE_SHIFT;
2267 send_sig_info(SIGBUS, &info, tsk);
2270 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2272 kvm_release_pfn_clean(pfn);
2273 if (is_hwpoison_pfn(pfn)) {
2274 kvm_send_hwpoison_signal(gfn_to_hva(kvm, gfn), current);
2276 } else if (is_fault_pfn(pfn))
2282 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2287 unsigned long mmu_seq;
2289 level = mapping_level(vcpu, gfn);
2292 * This path builds a PAE pagetable - so we can map 2mb pages at
2293 * maximum. Therefore check if the level is larger than that.
2295 if (level > PT_DIRECTORY_LEVEL)
2296 level = PT_DIRECTORY_LEVEL;
2298 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2300 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2302 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2305 if (is_error_pfn(pfn))
2306 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2308 spin_lock(&vcpu->kvm->mmu_lock);
2309 if (mmu_notifier_retry(vcpu, mmu_seq))
2311 kvm_mmu_free_some_pages(vcpu);
2312 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2313 spin_unlock(&vcpu->kvm->mmu_lock);
2319 spin_unlock(&vcpu->kvm->mmu_lock);
2320 kvm_release_pfn_clean(pfn);
2325 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2328 struct kvm_mmu_page *sp;
2329 LIST_HEAD(invalid_list);
2331 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2333 spin_lock(&vcpu->kvm->mmu_lock);
2334 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL &&
2335 (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL ||
2336 vcpu->arch.mmu.direct_map)) {
2337 hpa_t root = vcpu->arch.mmu.root_hpa;
2339 sp = page_header(root);
2341 if (!sp->root_count && sp->role.invalid) {
2342 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2343 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2345 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2346 spin_unlock(&vcpu->kvm->mmu_lock);
2349 for (i = 0; i < 4; ++i) {
2350 hpa_t root = vcpu->arch.mmu.pae_root[i];
2353 root &= PT64_BASE_ADDR_MASK;
2354 sp = page_header(root);
2356 if (!sp->root_count && sp->role.invalid)
2357 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2360 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2362 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2363 spin_unlock(&vcpu->kvm->mmu_lock);
2364 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2367 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2371 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2372 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2379 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
2381 struct kvm_mmu_page *sp;
2384 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2385 spin_lock(&vcpu->kvm->mmu_lock);
2386 kvm_mmu_free_some_pages(vcpu);
2387 sp = kvm_mmu_get_page(vcpu, 0, 0, PT64_ROOT_LEVEL,
2390 spin_unlock(&vcpu->kvm->mmu_lock);
2391 vcpu->arch.mmu.root_hpa = __pa(sp->spt);
2392 } else if (vcpu->arch.mmu.shadow_root_level == PT32E_ROOT_LEVEL) {
2393 for (i = 0; i < 4; ++i) {
2394 hpa_t root = vcpu->arch.mmu.pae_root[i];
2396 ASSERT(!VALID_PAGE(root));
2397 spin_lock(&vcpu->kvm->mmu_lock);
2398 kvm_mmu_free_some_pages(vcpu);
2399 sp = kvm_mmu_get_page(vcpu, i << (30 - PAGE_SHIFT),
2401 PT32_ROOT_LEVEL, 1, ACC_ALL,
2403 root = __pa(sp->spt);
2405 spin_unlock(&vcpu->kvm->mmu_lock);
2406 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2408 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2415 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
2417 struct kvm_mmu_page *sp;
2422 root_gfn = vcpu->arch.mmu.get_cr3(vcpu) >> PAGE_SHIFT;
2424 if (mmu_check_root(vcpu, root_gfn))
2428 * Do we shadow a long mode page table? If so we need to
2429 * write-protect the guests page table root.
2431 if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
2432 hpa_t root = vcpu->arch.mmu.root_hpa;
2434 ASSERT(!VALID_PAGE(root));
2436 spin_lock(&vcpu->kvm->mmu_lock);
2437 kvm_mmu_free_some_pages(vcpu);
2438 sp = kvm_mmu_get_page(vcpu, root_gfn, 0, PT64_ROOT_LEVEL,
2440 root = __pa(sp->spt);
2442 spin_unlock(&vcpu->kvm->mmu_lock);
2443 vcpu->arch.mmu.root_hpa = root;
2448 * We shadow a 32 bit page table. This may be a legacy 2-level
2449 * or a PAE 3-level page table. In either case we need to be aware that
2450 * the shadow page table may be a PAE or a long mode page table.
2452 pm_mask = PT_PRESENT_MASK;
2453 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL)
2454 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
2456 for (i = 0; i < 4; ++i) {
2457 hpa_t root = vcpu->arch.mmu.pae_root[i];
2459 ASSERT(!VALID_PAGE(root));
2460 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2461 pdptr = kvm_pdptr_read_mmu(vcpu, &vcpu->arch.mmu, i);
2462 if (!is_present_gpte(pdptr)) {
2463 vcpu->arch.mmu.pae_root[i] = 0;
2466 root_gfn = pdptr >> PAGE_SHIFT;
2467 if (mmu_check_root(vcpu, root_gfn))
2470 spin_lock(&vcpu->kvm->mmu_lock);
2471 kvm_mmu_free_some_pages(vcpu);
2472 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2475 root = __pa(sp->spt);
2477 spin_unlock(&vcpu->kvm->mmu_lock);
2479 vcpu->arch.mmu.pae_root[i] = root | pm_mask;
2481 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2484 * If we shadow a 32 bit page table with a long mode page
2485 * table we enter this path.
2487 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2488 if (vcpu->arch.mmu.lm_root == NULL) {
2490 * The additional page necessary for this is only
2491 * allocated on demand.
2496 lm_root = (void*)get_zeroed_page(GFP_KERNEL);
2497 if (lm_root == NULL)
2500 lm_root[0] = __pa(vcpu->arch.mmu.pae_root) | pm_mask;
2502 vcpu->arch.mmu.lm_root = lm_root;
2505 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.lm_root);
2511 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2513 if (vcpu->arch.mmu.direct_map)
2514 return mmu_alloc_direct_roots(vcpu);
2516 return mmu_alloc_shadow_roots(vcpu);
2519 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2522 struct kvm_mmu_page *sp;
2524 if (vcpu->arch.mmu.direct_map)
2527 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2530 trace_kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC);
2531 if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
2532 hpa_t root = vcpu->arch.mmu.root_hpa;
2533 sp = page_header(root);
2534 mmu_sync_children(vcpu, sp);
2537 for (i = 0; i < 4; ++i) {
2538 hpa_t root = vcpu->arch.mmu.pae_root[i];
2540 if (root && VALID_PAGE(root)) {
2541 root &= PT64_BASE_ADDR_MASK;
2542 sp = page_header(root);
2543 mmu_sync_children(vcpu, sp);
2546 trace_kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
2549 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2551 spin_lock(&vcpu->kvm->mmu_lock);
2552 mmu_sync_roots(vcpu);
2553 spin_unlock(&vcpu->kvm->mmu_lock);
2556 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2557 u32 access, u32 *error)
2564 static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gva_t vaddr,
2565 u32 access, u32 *error)
2569 return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access);
2572 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2573 u32 error_code, bool no_apf)
2578 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2579 r = mmu_topup_memory_caches(vcpu);
2584 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2586 gfn = gva >> PAGE_SHIFT;
2588 return nonpaging_map(vcpu, gva & PAGE_MASK,
2589 error_code & PFERR_WRITE_MASK, gfn);
2592 static int kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn)
2594 struct kvm_arch_async_pf arch;
2595 arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id;
2598 return kvm_setup_async_pf(vcpu, gva, gfn, &arch);
2601 static bool can_do_async_pf(struct kvm_vcpu *vcpu)
2603 if (unlikely(!irqchip_in_kernel(vcpu->kvm) ||
2604 kvm_event_needs_reinjection(vcpu)))
2607 return kvm_x86_ops->interrupt_allowed(vcpu);
2610 static bool try_async_pf(struct kvm_vcpu *vcpu, bool no_apf, gfn_t gfn,
2611 gva_t gva, pfn_t *pfn)
2615 *pfn = gfn_to_pfn_async(vcpu->kvm, gfn, &async);
2618 return false; /* *pfn has correct page already */
2620 put_page(pfn_to_page(*pfn));
2622 if (!no_apf && can_do_async_pf(vcpu)) {
2623 trace_kvm_try_async_get_page(async, *pfn);
2624 if (kvm_find_async_pf_gfn(vcpu, gfn)) {
2625 trace_kvm_async_pf_doublefault(gva, gfn);
2626 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
2628 } else if (kvm_arch_setup_async_pf(vcpu, gva, gfn))
2632 *pfn = gfn_to_pfn(vcpu->kvm, gfn);
2637 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, u32 error_code,
2643 gfn_t gfn = gpa >> PAGE_SHIFT;
2644 unsigned long mmu_seq;
2647 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2649 r = mmu_topup_memory_caches(vcpu);
2653 level = mapping_level(vcpu, gfn);
2655 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2657 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2660 if (try_async_pf(vcpu, no_apf, gfn, gpa, &pfn))
2664 if (is_error_pfn(pfn))
2665 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2666 spin_lock(&vcpu->kvm->mmu_lock);
2667 if (mmu_notifier_retry(vcpu, mmu_seq))
2669 kvm_mmu_free_some_pages(vcpu);
2670 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2672 spin_unlock(&vcpu->kvm->mmu_lock);
2677 spin_unlock(&vcpu->kvm->mmu_lock);
2678 kvm_release_pfn_clean(pfn);
2682 static void nonpaging_free(struct kvm_vcpu *vcpu)
2684 mmu_free_roots(vcpu);
2687 static int nonpaging_init_context(struct kvm_vcpu *vcpu,
2688 struct kvm_mmu *context)
2690 context->new_cr3 = nonpaging_new_cr3;
2691 context->page_fault = nonpaging_page_fault;
2692 context->gva_to_gpa = nonpaging_gva_to_gpa;
2693 context->free = nonpaging_free;
2694 context->prefetch_page = nonpaging_prefetch_page;
2695 context->sync_page = nonpaging_sync_page;
2696 context->invlpg = nonpaging_invlpg;
2697 context->root_level = 0;
2698 context->shadow_root_level = PT32E_ROOT_LEVEL;
2699 context->root_hpa = INVALID_PAGE;
2700 context->direct_map = true;
2701 context->nx = false;
2705 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2707 ++vcpu->stat.tlb_flush;
2708 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2711 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2713 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2714 mmu_free_roots(vcpu);
2717 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
2719 return vcpu->arch.cr3;
2722 static void inject_page_fault(struct kvm_vcpu *vcpu)
2724 vcpu->arch.mmu.inject_page_fault(vcpu);
2727 static void paging_free(struct kvm_vcpu *vcpu)
2729 nonpaging_free(vcpu);
2732 static bool is_rsvd_bits_set(struct kvm_mmu *mmu, u64 gpte, int level)
2736 bit7 = (gpte >> 7) & 1;
2737 return (gpte & mmu->rsvd_bits_mask[bit7][level-1]) != 0;
2741 #include "paging_tmpl.h"
2745 #include "paging_tmpl.h"
2748 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
2749 struct kvm_mmu *context,
2752 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2753 u64 exb_bit_rsvd = 0;
2756 exb_bit_rsvd = rsvd_bits(63, 63);
2758 case PT32_ROOT_LEVEL:
2759 /* no rsvd bits for 2 level 4K page table entries */
2760 context->rsvd_bits_mask[0][1] = 0;
2761 context->rsvd_bits_mask[0][0] = 0;
2762 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2764 if (!is_pse(vcpu)) {
2765 context->rsvd_bits_mask[1][1] = 0;
2769 if (is_cpuid_PSE36())
2770 /* 36bits PSE 4MB page */
2771 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2773 /* 32 bits PSE 4MB page */
2774 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2776 case PT32E_ROOT_LEVEL:
2777 context->rsvd_bits_mask[0][2] =
2778 rsvd_bits(maxphyaddr, 63) |
2779 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2780 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2781 rsvd_bits(maxphyaddr, 62); /* PDE */
2782 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2783 rsvd_bits(maxphyaddr, 62); /* PTE */
2784 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2785 rsvd_bits(maxphyaddr, 62) |
2786 rsvd_bits(13, 20); /* large page */
2787 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2789 case PT64_ROOT_LEVEL:
2790 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2791 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2792 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2793 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2794 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2795 rsvd_bits(maxphyaddr, 51);
2796 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2797 rsvd_bits(maxphyaddr, 51);
2798 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2799 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2800 rsvd_bits(maxphyaddr, 51) |
2802 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2803 rsvd_bits(maxphyaddr, 51) |
2804 rsvd_bits(13, 20); /* large page */
2805 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2810 static int paging64_init_context_common(struct kvm_vcpu *vcpu,
2811 struct kvm_mmu *context,
2814 context->nx = is_nx(vcpu);
2816 reset_rsvds_bits_mask(vcpu, context, level);
2818 ASSERT(is_pae(vcpu));
2819 context->new_cr3 = paging_new_cr3;
2820 context->page_fault = paging64_page_fault;
2821 context->gva_to_gpa = paging64_gva_to_gpa;
2822 context->prefetch_page = paging64_prefetch_page;
2823 context->sync_page = paging64_sync_page;
2824 context->invlpg = paging64_invlpg;
2825 context->free = paging_free;
2826 context->root_level = level;
2827 context->shadow_root_level = level;
2828 context->root_hpa = INVALID_PAGE;
2829 context->direct_map = false;
2833 static int paging64_init_context(struct kvm_vcpu *vcpu,
2834 struct kvm_mmu *context)
2836 return paging64_init_context_common(vcpu, context, PT64_ROOT_LEVEL);
2839 static int paging32_init_context(struct kvm_vcpu *vcpu,
2840 struct kvm_mmu *context)
2842 context->nx = false;
2844 reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
2846 context->new_cr3 = paging_new_cr3;
2847 context->page_fault = paging32_page_fault;
2848 context->gva_to_gpa = paging32_gva_to_gpa;
2849 context->free = paging_free;
2850 context->prefetch_page = paging32_prefetch_page;
2851 context->sync_page = paging32_sync_page;
2852 context->invlpg = paging32_invlpg;
2853 context->root_level = PT32_ROOT_LEVEL;
2854 context->shadow_root_level = PT32E_ROOT_LEVEL;
2855 context->root_hpa = INVALID_PAGE;
2856 context->direct_map = false;
2860 static int paging32E_init_context(struct kvm_vcpu *vcpu,
2861 struct kvm_mmu *context)
2863 return paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL);
2866 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2868 struct kvm_mmu *context = vcpu->arch.walk_mmu;
2870 context->new_cr3 = nonpaging_new_cr3;
2871 context->page_fault = tdp_page_fault;
2872 context->free = nonpaging_free;
2873 context->prefetch_page = nonpaging_prefetch_page;
2874 context->sync_page = nonpaging_sync_page;
2875 context->invlpg = nonpaging_invlpg;
2876 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2877 context->root_hpa = INVALID_PAGE;
2878 context->direct_map = true;
2879 context->set_cr3 = kvm_x86_ops->set_tdp_cr3;
2880 context->get_cr3 = get_cr3;
2881 context->inject_page_fault = kvm_inject_page_fault;
2882 context->nx = is_nx(vcpu);
2884 if (!is_paging(vcpu)) {
2885 context->nx = false;
2886 context->gva_to_gpa = nonpaging_gva_to_gpa;
2887 context->root_level = 0;
2888 } else if (is_long_mode(vcpu)) {
2889 context->nx = is_nx(vcpu);
2890 reset_rsvds_bits_mask(vcpu, context, PT64_ROOT_LEVEL);
2891 context->gva_to_gpa = paging64_gva_to_gpa;
2892 context->root_level = PT64_ROOT_LEVEL;
2893 } else if (is_pae(vcpu)) {
2894 context->nx = is_nx(vcpu);
2895 reset_rsvds_bits_mask(vcpu, context, PT32E_ROOT_LEVEL);
2896 context->gva_to_gpa = paging64_gva_to_gpa;
2897 context->root_level = PT32E_ROOT_LEVEL;
2899 context->nx = false;
2900 reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
2901 context->gva_to_gpa = paging32_gva_to_gpa;
2902 context->root_level = PT32_ROOT_LEVEL;
2908 int kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context)
2912 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2914 if (!is_paging(vcpu))
2915 r = nonpaging_init_context(vcpu, context);
2916 else if (is_long_mode(vcpu))
2917 r = paging64_init_context(vcpu, context);
2918 else if (is_pae(vcpu))
2919 r = paging32E_init_context(vcpu, context);
2921 r = paging32_init_context(vcpu, context);
2923 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2924 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2928 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);
2930 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2932 int r = kvm_init_shadow_mmu(vcpu, vcpu->arch.walk_mmu);
2934 vcpu->arch.walk_mmu->set_cr3 = kvm_x86_ops->set_cr3;
2935 vcpu->arch.walk_mmu->get_cr3 = get_cr3;
2936 vcpu->arch.walk_mmu->inject_page_fault = kvm_inject_page_fault;
2941 static int init_kvm_nested_mmu(struct kvm_vcpu *vcpu)
2943 struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
2945 g_context->get_cr3 = get_cr3;
2946 g_context->inject_page_fault = kvm_inject_page_fault;
2949 * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
2950 * translation of l2_gpa to l1_gpa addresses is done using the
2951 * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
2952 * functions between mmu and nested_mmu are swapped.
2954 if (!is_paging(vcpu)) {
2955 g_context->nx = false;
2956 g_context->root_level = 0;
2957 g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested;
2958 } else if (is_long_mode(vcpu)) {
2959 g_context->nx = is_nx(vcpu);
2960 reset_rsvds_bits_mask(vcpu, g_context, PT64_ROOT_LEVEL);
2961 g_context->root_level = PT64_ROOT_LEVEL;
2962 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
2963 } else if (is_pae(vcpu)) {
2964 g_context->nx = is_nx(vcpu);
2965 reset_rsvds_bits_mask(vcpu, g_context, PT32E_ROOT_LEVEL);
2966 g_context->root_level = PT32E_ROOT_LEVEL;
2967 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
2969 g_context->nx = false;
2970 reset_rsvds_bits_mask(vcpu, g_context, PT32_ROOT_LEVEL);
2971 g_context->root_level = PT32_ROOT_LEVEL;
2972 g_context->gva_to_gpa = paging32_gva_to_gpa_nested;
2978 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2980 vcpu->arch.update_pte.pfn = bad_pfn;
2982 if (mmu_is_nested(vcpu))
2983 return init_kvm_nested_mmu(vcpu);
2984 else if (tdp_enabled)
2985 return init_kvm_tdp_mmu(vcpu);
2987 return init_kvm_softmmu(vcpu);
2990 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2993 if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2994 /* mmu.free() should set root_hpa = INVALID_PAGE */
2995 vcpu->arch.mmu.free(vcpu);
2998 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
3000 destroy_kvm_mmu(vcpu);
3001 return init_kvm_mmu(vcpu);
3003 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
3005 int kvm_mmu_load(struct kvm_vcpu *vcpu)
3009 r = mmu_topup_memory_caches(vcpu);
3012 r = mmu_alloc_roots(vcpu);
3013 spin_lock(&vcpu->kvm->mmu_lock);
3014 mmu_sync_roots(vcpu);
3015 spin_unlock(&vcpu->kvm->mmu_lock);
3018 /* set_cr3() should ensure TLB has been flushed */
3019 vcpu->arch.mmu.set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
3023 EXPORT_SYMBOL_GPL(kvm_mmu_load);
3025 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
3027 mmu_free_roots(vcpu);
3029 EXPORT_SYMBOL_GPL(kvm_mmu_unload);
3031 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
3032 struct kvm_mmu_page *sp,
3036 struct kvm_mmu_page *child;
3039 if (is_shadow_present_pte(pte)) {
3040 if (is_last_spte(pte, sp->role.level))
3041 drop_spte(vcpu->kvm, spte, shadow_trap_nonpresent_pte);
3043 child = page_header(pte & PT64_BASE_ADDR_MASK);
3044 mmu_page_remove_parent_pte(child, spte);
3047 __set_spte(spte, shadow_trap_nonpresent_pte);
3048 if (is_large_pte(pte))
3049 --vcpu->kvm->stat.lpages;
3052 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
3053 struct kvm_mmu_page *sp,
3057 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
3058 ++vcpu->kvm->stat.mmu_pde_zapped;
3062 if (is_rsvd_bits_set(&vcpu->arch.mmu, *(u64 *)new, PT_PAGE_TABLE_LEVEL))
3065 ++vcpu->kvm->stat.mmu_pte_updated;
3066 if (!sp->role.cr4_pae)
3067 paging32_update_pte(vcpu, sp, spte, new);
3069 paging64_update_pte(vcpu, sp, spte, new);
3072 static bool need_remote_flush(u64 old, u64 new)
3074 if (!is_shadow_present_pte(old))
3076 if (!is_shadow_present_pte(new))
3078 if ((old ^ new) & PT64_BASE_ADDR_MASK)
3080 old ^= PT64_NX_MASK;
3081 new ^= PT64_NX_MASK;
3082 return (old & ~new & PT64_PERM_MASK) != 0;
3085 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
3086 bool remote_flush, bool local_flush)
3092 kvm_flush_remote_tlbs(vcpu->kvm);
3093 else if (local_flush)
3094 kvm_mmu_flush_tlb(vcpu);
3097 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
3099 u64 *spte = vcpu->arch.last_pte_updated;
3101 return !!(spte && (*spte & shadow_accessed_mask));
3104 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
3110 if (!is_present_gpte(gpte))
3112 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
3114 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
3116 pfn = gfn_to_pfn(vcpu->kvm, gfn);
3118 if (is_error_pfn(pfn)) {
3119 kvm_release_pfn_clean(pfn);
3122 vcpu->arch.update_pte.gfn = gfn;
3123 vcpu->arch.update_pte.pfn = pfn;
3126 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
3128 u64 *spte = vcpu->arch.last_pte_updated;
3131 && vcpu->arch.last_pte_gfn == gfn
3132 && shadow_accessed_mask
3133 && !(*spte & shadow_accessed_mask)
3134 && is_shadow_present_pte(*spte))
3135 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
3138 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
3139 const u8 *new, int bytes,
3140 bool guest_initiated)
3142 gfn_t gfn = gpa >> PAGE_SHIFT;
3143 union kvm_mmu_page_role mask = { .word = 0 };
3144 struct kvm_mmu_page *sp;
3145 struct hlist_node *node;
3146 LIST_HEAD(invalid_list);
3149 unsigned offset = offset_in_page(gpa);
3151 unsigned page_offset;
3152 unsigned misaligned;
3159 bool remote_flush, local_flush, zap_page;
3161 zap_page = remote_flush = local_flush = false;
3163 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
3165 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
3168 * Assume that the pte write on a page table of the same type
3169 * as the current vcpu paging mode. This is nearly always true
3170 * (might be false while changing modes). Note it is verified later
3173 if ((is_pae(vcpu) && bytes == 4) || !new) {
3174 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
3179 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
3182 new = (const u8 *)&gentry;
3187 gentry = *(const u32 *)new;
3190 gentry = *(const u64 *)new;
3197 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
3198 spin_lock(&vcpu->kvm->mmu_lock);
3199 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
3201 kvm_mmu_access_page(vcpu, gfn);
3202 kvm_mmu_free_some_pages(vcpu);
3203 ++vcpu->kvm->stat.mmu_pte_write;
3204 trace_kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE);
3205 if (guest_initiated) {
3206 if (gfn == vcpu->arch.last_pt_write_gfn
3207 && !last_updated_pte_accessed(vcpu)) {
3208 ++vcpu->arch.last_pt_write_count;
3209 if (vcpu->arch.last_pt_write_count >= 3)
3212 vcpu->arch.last_pt_write_gfn = gfn;
3213 vcpu->arch.last_pt_write_count = 1;
3214 vcpu->arch.last_pte_updated = NULL;
3218 mask.cr0_wp = mask.cr4_pae = mask.nxe = 1;
3219 for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
3220 pte_size = sp->role.cr4_pae ? 8 : 4;
3221 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
3222 misaligned |= bytes < 4;
3223 if (misaligned || flooded) {
3225 * Misaligned accesses are too much trouble to fix
3226 * up; also, they usually indicate a page is not used
3229 * If we're seeing too many writes to a page,
3230 * it may no longer be a page table, or we may be
3231 * forking, in which case it is better to unmap the
3234 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
3235 gpa, bytes, sp->role.word);
3236 zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
3238 ++vcpu->kvm->stat.mmu_flooded;
3241 page_offset = offset;
3242 level = sp->role.level;
3244 if (!sp->role.cr4_pae) {
3245 page_offset <<= 1; /* 32->64 */
3247 * A 32-bit pde maps 4MB while the shadow pdes map
3248 * only 2MB. So we need to double the offset again
3249 * and zap two pdes instead of one.
3251 if (level == PT32_ROOT_LEVEL) {
3252 page_offset &= ~7; /* kill rounding error */
3256 quadrant = page_offset >> PAGE_SHIFT;
3257 page_offset &= ~PAGE_MASK;
3258 if (quadrant != sp->role.quadrant)
3262 spte = &sp->spt[page_offset / sizeof(*spte)];
3265 mmu_pte_write_zap_pte(vcpu, sp, spte);
3267 !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
3269 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
3270 if (!remote_flush && need_remote_flush(entry, *spte))
3271 remote_flush = true;
3275 mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
3276 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3277 trace_kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE);
3278 spin_unlock(&vcpu->kvm->mmu_lock);
3279 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
3280 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
3281 vcpu->arch.update_pte.pfn = bad_pfn;
3285 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
3290 if (vcpu->arch.mmu.direct_map)
3293 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
3295 spin_lock(&vcpu->kvm->mmu_lock);
3296 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3297 spin_unlock(&vcpu->kvm->mmu_lock);
3300 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
3302 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
3304 LIST_HEAD(invalid_list);
3306 while (kvm_mmu_available_pages(vcpu->kvm) < KVM_REFILL_PAGES &&
3307 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
3308 struct kvm_mmu_page *sp;
3310 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
3311 struct kvm_mmu_page, link);
3312 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
3313 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3314 ++vcpu->kvm->stat.mmu_recycled;
3318 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
3321 enum emulation_result er;
3323 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code, false);
3332 r = mmu_topup_memory_caches(vcpu);
3336 er = emulate_instruction(vcpu, cr2, error_code, 0);
3341 case EMULATE_DO_MMIO:
3342 ++vcpu->stat.mmio_exits;
3352 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
3354 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
3356 vcpu->arch.mmu.invlpg(vcpu, gva);
3357 kvm_mmu_flush_tlb(vcpu);
3358 ++vcpu->stat.invlpg;
3360 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
3362 void kvm_enable_tdp(void)
3366 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
3368 void kvm_disable_tdp(void)
3370 tdp_enabled = false;
3372 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
3374 static void free_mmu_pages(struct kvm_vcpu *vcpu)
3376 free_page((unsigned long)vcpu->arch.mmu.pae_root);
3377 if (vcpu->arch.mmu.lm_root != NULL)
3378 free_page((unsigned long)vcpu->arch.mmu.lm_root);
3381 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
3389 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3390 * Therefore we need to allocate shadow page tables in the first
3391 * 4GB of memory, which happens to fit the DMA32 zone.
3393 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
3397 vcpu->arch.mmu.pae_root = page_address(page);
3398 for (i = 0; i < 4; ++i)
3399 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3404 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3407 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3409 return alloc_mmu_pages(vcpu);
3412 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3415 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3417 return init_kvm_mmu(vcpu);
3420 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3422 struct kvm_mmu_page *sp;
3424 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3428 if (!test_bit(slot, sp->slot_bitmap))
3432 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
3434 if (is_writable_pte(pt[i]))
3435 pt[i] &= ~PT_WRITABLE_MASK;
3437 kvm_flush_remote_tlbs(kvm);
3440 void kvm_mmu_zap_all(struct kvm *kvm)
3442 struct kvm_mmu_page *sp, *node;
3443 LIST_HEAD(invalid_list);
3445 spin_lock(&kvm->mmu_lock);
3447 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3448 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3451 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3452 spin_unlock(&kvm->mmu_lock);
3455 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3456 struct list_head *invalid_list)
3458 struct kvm_mmu_page *page;
3460 page = container_of(kvm->arch.active_mmu_pages.prev,
3461 struct kvm_mmu_page, link);
3462 return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3465 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3468 struct kvm *kvm_freed = NULL;
3470 if (nr_to_scan == 0)
3473 spin_lock(&kvm_lock);
3475 list_for_each_entry(kvm, &vm_list, vm_list) {
3476 int idx, freed_pages;
3477 LIST_HEAD(invalid_list);
3479 idx = srcu_read_lock(&kvm->srcu);
3480 spin_lock(&kvm->mmu_lock);
3481 if (!kvm_freed && nr_to_scan > 0 &&
3482 kvm->arch.n_used_mmu_pages > 0) {
3483 freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3489 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3490 spin_unlock(&kvm->mmu_lock);
3491 srcu_read_unlock(&kvm->srcu, idx);
3494 list_move_tail(&kvm_freed->vm_list, &vm_list);
3496 spin_unlock(&kvm_lock);
3499 return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
3502 static struct shrinker mmu_shrinker = {
3503 .shrink = mmu_shrink,
3504 .seeks = DEFAULT_SEEKS * 10,
3507 static void mmu_destroy_caches(void)
3509 if (pte_chain_cache)
3510 kmem_cache_destroy(pte_chain_cache);
3511 if (rmap_desc_cache)
3512 kmem_cache_destroy(rmap_desc_cache);
3513 if (mmu_page_header_cache)
3514 kmem_cache_destroy(mmu_page_header_cache);
3517 void kvm_mmu_module_exit(void)
3519 mmu_destroy_caches();
3520 percpu_counter_destroy(&kvm_total_used_mmu_pages);
3521 unregister_shrinker(&mmu_shrinker);
3524 int kvm_mmu_module_init(void)
3526 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3527 sizeof(struct kvm_pte_chain),
3529 if (!pte_chain_cache)
3531 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3532 sizeof(struct kvm_rmap_desc),
3534 if (!rmap_desc_cache)
3537 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3538 sizeof(struct kvm_mmu_page),
3540 if (!mmu_page_header_cache)
3543 if (percpu_counter_init(&kvm_total_used_mmu_pages, 0))
3546 register_shrinker(&mmu_shrinker);
3551 mmu_destroy_caches();
3556 * Caculate mmu pages needed for kvm.
3558 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3561 unsigned int nr_mmu_pages;
3562 unsigned int nr_pages = 0;
3563 struct kvm_memslots *slots;
3565 slots = kvm_memslots(kvm);
3567 for (i = 0; i < slots->nmemslots; i++)
3568 nr_pages += slots->memslots[i].npages;
3570 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3571 nr_mmu_pages = max(nr_mmu_pages,
3572 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3574 return nr_mmu_pages;
3577 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3580 if (len > buffer->len)
3585 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3590 ret = pv_mmu_peek_buffer(buffer, len);
3595 buffer->processed += len;
3599 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3600 gpa_t addr, gpa_t value)
3605 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3608 r = mmu_topup_memory_caches(vcpu);
3612 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3618 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3620 (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3624 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3626 spin_lock(&vcpu->kvm->mmu_lock);
3627 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3628 spin_unlock(&vcpu->kvm->mmu_lock);
3632 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3633 struct kvm_pv_mmu_op_buffer *buffer)
3635 struct kvm_mmu_op_header *header;
3637 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3640 switch (header->op) {
3641 case KVM_MMU_OP_WRITE_PTE: {
3642 struct kvm_mmu_op_write_pte *wpte;
3644 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3647 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3650 case KVM_MMU_OP_FLUSH_TLB: {
3651 struct kvm_mmu_op_flush_tlb *ftlb;
3653 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3656 return kvm_pv_mmu_flush_tlb(vcpu);
3658 case KVM_MMU_OP_RELEASE_PT: {
3659 struct kvm_mmu_op_release_pt *rpt;
3661 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3664 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3670 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3671 gpa_t addr, unsigned long *ret)
3674 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3676 buffer->ptr = buffer->buf;
3677 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3678 buffer->processed = 0;
3680 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3684 while (buffer->len) {
3685 r = kvm_pv_mmu_op_one(vcpu, buffer);
3694 *ret = buffer->processed;
3698 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3700 struct kvm_shadow_walk_iterator iterator;
3703 spin_lock(&vcpu->kvm->mmu_lock);
3704 for_each_shadow_entry(vcpu, addr, iterator) {
3705 sptes[iterator.level-1] = *iterator.sptep;
3707 if (!is_shadow_present_pte(*iterator.sptep))
3710 spin_unlock(&vcpu->kvm->mmu_lock);
3714 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3716 #ifdef CONFIG_KVM_MMU_AUDIT
3717 #include "mmu_audit.c"
3719 static void mmu_audit_disable(void) { }
3722 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3726 destroy_kvm_mmu(vcpu);
3727 free_mmu_pages(vcpu);
3728 mmu_free_memory_caches(vcpu);
3729 mmu_audit_disable();