PM / OPP: Protect updates to list_dev with mutex
[firefly-linux-kernel-4.4.55.git] / arch / x86 / kvm / mmu.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This module enables machines with Intel VT-x extensions to run virtual
5  * machines without emulation or binary translation.
6  *
7  * MMU support
8  *
9  * Copyright (C) 2006 Qumranet, Inc.
10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
11  *
12  * Authors:
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Avi Kivity   <avi@qumranet.com>
15  *
16  * This work is licensed under the terms of the GNU GPL, version 2.  See
17  * the COPYING file in the top-level directory.
18  *
19  */
20
21 #include "irq.h"
22 #include "mmu.h"
23 #include "x86.h"
24 #include "kvm_cache_regs.h"
25 #include "cpuid.h"
26
27 #include <linux/kvm_host.h>
28 #include <linux/types.h>
29 #include <linux/string.h>
30 #include <linux/mm.h>
31 #include <linux/highmem.h>
32 #include <linux/module.h>
33 #include <linux/swap.h>
34 #include <linux/hugetlb.h>
35 #include <linux/compiler.h>
36 #include <linux/srcu.h>
37 #include <linux/slab.h>
38 #include <linux/uaccess.h>
39
40 #include <asm/page.h>
41 #include <asm/cmpxchg.h>
42 #include <asm/io.h>
43 #include <asm/vmx.h>
44
45 /*
46  * When setting this variable to true it enables Two-Dimensional-Paging
47  * where the hardware walks 2 page tables:
48  * 1. the guest-virtual to guest-physical
49  * 2. while doing 1. it walks guest-physical to host-physical
50  * If the hardware supports that we don't need to do shadow paging.
51  */
52 bool tdp_enabled = false;
53
54 enum {
55         AUDIT_PRE_PAGE_FAULT,
56         AUDIT_POST_PAGE_FAULT,
57         AUDIT_PRE_PTE_WRITE,
58         AUDIT_POST_PTE_WRITE,
59         AUDIT_PRE_SYNC,
60         AUDIT_POST_SYNC
61 };
62
63 #undef MMU_DEBUG
64
65 #ifdef MMU_DEBUG
66 static bool dbg = 0;
67 module_param(dbg, bool, 0644);
68
69 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
70 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
71 #define MMU_WARN_ON(x) WARN_ON(x)
72 #else
73 #define pgprintk(x...) do { } while (0)
74 #define rmap_printk(x...) do { } while (0)
75 #define MMU_WARN_ON(x) do { } while (0)
76 #endif
77
78 #define PTE_PREFETCH_NUM                8
79
80 #define PT_FIRST_AVAIL_BITS_SHIFT 10
81 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
82
83 #define PT64_LEVEL_BITS 9
84
85 #define PT64_LEVEL_SHIFT(level) \
86                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
87
88 #define PT64_INDEX(address, level)\
89         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
90
91
92 #define PT32_LEVEL_BITS 10
93
94 #define PT32_LEVEL_SHIFT(level) \
95                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
96
97 #define PT32_LVL_OFFSET_MASK(level) \
98         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
99                                                 * PT32_LEVEL_BITS))) - 1))
100
101 #define PT32_INDEX(address, level)\
102         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
103
104
105 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
106 #define PT64_DIR_BASE_ADDR_MASK \
107         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
108 #define PT64_LVL_ADDR_MASK(level) \
109         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
110                                                 * PT64_LEVEL_BITS))) - 1))
111 #define PT64_LVL_OFFSET_MASK(level) \
112         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
113                                                 * PT64_LEVEL_BITS))) - 1))
114
115 #define PT32_BASE_ADDR_MASK PAGE_MASK
116 #define PT32_DIR_BASE_ADDR_MASK \
117         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
118 #define PT32_LVL_ADDR_MASK(level) \
119         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
120                                             * PT32_LEVEL_BITS))) - 1))
121
122 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | shadow_user_mask \
123                         | shadow_x_mask | shadow_nx_mask)
124
125 #define ACC_EXEC_MASK    1
126 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
127 #define ACC_USER_MASK    PT_USER_MASK
128 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
129
130 #include <trace/events/kvm.h>
131
132 #define CREATE_TRACE_POINTS
133 #include "mmutrace.h"
134
135 #define SPTE_HOST_WRITEABLE     (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
136 #define SPTE_MMU_WRITEABLE      (1ULL << (PT_FIRST_AVAIL_BITS_SHIFT + 1))
137
138 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
139
140 /* make pte_list_desc fit well in cache line */
141 #define PTE_LIST_EXT 3
142
143 struct pte_list_desc {
144         u64 *sptes[PTE_LIST_EXT];
145         struct pte_list_desc *more;
146 };
147
148 struct kvm_shadow_walk_iterator {
149         u64 addr;
150         hpa_t shadow_addr;
151         u64 *sptep;
152         int level;
153         unsigned index;
154 };
155
156 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
157         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
158              shadow_walk_okay(&(_walker));                      \
159              shadow_walk_next(&(_walker)))
160
161 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte)     \
162         for (shadow_walk_init(&(_walker), _vcpu, _addr);                \
163              shadow_walk_okay(&(_walker)) &&                            \
164                 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; });  \
165              __shadow_walk_next(&(_walker), spte))
166
167 static struct kmem_cache *pte_list_desc_cache;
168 static struct kmem_cache *mmu_page_header_cache;
169 static struct percpu_counter kvm_total_used_mmu_pages;
170
171 static u64 __read_mostly shadow_nx_mask;
172 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
173 static u64 __read_mostly shadow_user_mask;
174 static u64 __read_mostly shadow_accessed_mask;
175 static u64 __read_mostly shadow_dirty_mask;
176 static u64 __read_mostly shadow_mmio_mask;
177
178 static void mmu_spte_set(u64 *sptep, u64 spte);
179 static void mmu_free_roots(struct kvm_vcpu *vcpu);
180
181 void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask)
182 {
183         shadow_mmio_mask = mmio_mask;
184 }
185 EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_mask);
186
187 /*
188  * the low bit of the generation number is always presumed to be zero.
189  * This disables mmio caching during memslot updates.  The concept is
190  * similar to a seqcount but instead of retrying the access we just punt
191  * and ignore the cache.
192  *
193  * spte bits 3-11 are used as bits 1-9 of the generation number,
194  * the bits 52-61 are used as bits 10-19 of the generation number.
195  */
196 #define MMIO_SPTE_GEN_LOW_SHIFT         2
197 #define MMIO_SPTE_GEN_HIGH_SHIFT        52
198
199 #define MMIO_GEN_SHIFT                  20
200 #define MMIO_GEN_LOW_SHIFT              10
201 #define MMIO_GEN_LOW_MASK               ((1 << MMIO_GEN_LOW_SHIFT) - 2)
202 #define MMIO_GEN_MASK                   ((1 << MMIO_GEN_SHIFT) - 1)
203
204 static u64 generation_mmio_spte_mask(unsigned int gen)
205 {
206         u64 mask;
207
208         WARN_ON(gen & ~MMIO_GEN_MASK);
209
210         mask = (gen & MMIO_GEN_LOW_MASK) << MMIO_SPTE_GEN_LOW_SHIFT;
211         mask |= ((u64)gen >> MMIO_GEN_LOW_SHIFT) << MMIO_SPTE_GEN_HIGH_SHIFT;
212         return mask;
213 }
214
215 static unsigned int get_mmio_spte_generation(u64 spte)
216 {
217         unsigned int gen;
218
219         spte &= ~shadow_mmio_mask;
220
221         gen = (spte >> MMIO_SPTE_GEN_LOW_SHIFT) & MMIO_GEN_LOW_MASK;
222         gen |= (spte >> MMIO_SPTE_GEN_HIGH_SHIFT) << MMIO_GEN_LOW_SHIFT;
223         return gen;
224 }
225
226 static unsigned int kvm_current_mmio_generation(struct kvm_vcpu *vcpu)
227 {
228         return kvm_vcpu_memslots(vcpu)->generation & MMIO_GEN_MASK;
229 }
230
231 static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn,
232                            unsigned access)
233 {
234         unsigned int gen = kvm_current_mmio_generation(vcpu);
235         u64 mask = generation_mmio_spte_mask(gen);
236
237         access &= ACC_WRITE_MASK | ACC_USER_MASK;
238         mask |= shadow_mmio_mask | access | gfn << PAGE_SHIFT;
239
240         trace_mark_mmio_spte(sptep, gfn, access, gen);
241         mmu_spte_set(sptep, mask);
242 }
243
244 static bool is_mmio_spte(u64 spte)
245 {
246         return (spte & shadow_mmio_mask) == shadow_mmio_mask;
247 }
248
249 static gfn_t get_mmio_spte_gfn(u64 spte)
250 {
251         u64 mask = generation_mmio_spte_mask(MMIO_GEN_MASK) | shadow_mmio_mask;
252         return (spte & ~mask) >> PAGE_SHIFT;
253 }
254
255 static unsigned get_mmio_spte_access(u64 spte)
256 {
257         u64 mask = generation_mmio_spte_mask(MMIO_GEN_MASK) | shadow_mmio_mask;
258         return (spte & ~mask) & ~PAGE_MASK;
259 }
260
261 static bool set_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn,
262                           pfn_t pfn, unsigned access)
263 {
264         if (unlikely(is_noslot_pfn(pfn))) {
265                 mark_mmio_spte(vcpu, sptep, gfn, access);
266                 return true;
267         }
268
269         return false;
270 }
271
272 static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte)
273 {
274         unsigned int kvm_gen, spte_gen;
275
276         kvm_gen = kvm_current_mmio_generation(vcpu);
277         spte_gen = get_mmio_spte_generation(spte);
278
279         trace_check_mmio_spte(spte, kvm_gen, spte_gen);
280         return likely(kvm_gen == spte_gen);
281 }
282
283 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
284                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
285 {
286         shadow_user_mask = user_mask;
287         shadow_accessed_mask = accessed_mask;
288         shadow_dirty_mask = dirty_mask;
289         shadow_nx_mask = nx_mask;
290         shadow_x_mask = x_mask;
291 }
292 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
293
294 static int is_cpuid_PSE36(void)
295 {
296         return 1;
297 }
298
299 static int is_nx(struct kvm_vcpu *vcpu)
300 {
301         return vcpu->arch.efer & EFER_NX;
302 }
303
304 static int is_shadow_present_pte(u64 pte)
305 {
306         return pte & PT_PRESENT_MASK && !is_mmio_spte(pte);
307 }
308
309 static int is_large_pte(u64 pte)
310 {
311         return pte & PT_PAGE_SIZE_MASK;
312 }
313
314 static int is_rmap_spte(u64 pte)
315 {
316         return is_shadow_present_pte(pte);
317 }
318
319 static int is_last_spte(u64 pte, int level)
320 {
321         if (level == PT_PAGE_TABLE_LEVEL)
322                 return 1;
323         if (is_large_pte(pte))
324                 return 1;
325         return 0;
326 }
327
328 static pfn_t spte_to_pfn(u64 pte)
329 {
330         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
331 }
332
333 static gfn_t pse36_gfn_delta(u32 gpte)
334 {
335         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
336
337         return (gpte & PT32_DIR_PSE36_MASK) << shift;
338 }
339
340 #ifdef CONFIG_X86_64
341 static void __set_spte(u64 *sptep, u64 spte)
342 {
343         *sptep = spte;
344 }
345
346 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
347 {
348         *sptep = spte;
349 }
350
351 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
352 {
353         return xchg(sptep, spte);
354 }
355
356 static u64 __get_spte_lockless(u64 *sptep)
357 {
358         return ACCESS_ONCE(*sptep);
359 }
360 #else
361 union split_spte {
362         struct {
363                 u32 spte_low;
364                 u32 spte_high;
365         };
366         u64 spte;
367 };
368
369 static void count_spte_clear(u64 *sptep, u64 spte)
370 {
371         struct kvm_mmu_page *sp =  page_header(__pa(sptep));
372
373         if (is_shadow_present_pte(spte))
374                 return;
375
376         /* Ensure the spte is completely set before we increase the count */
377         smp_wmb();
378         sp->clear_spte_count++;
379 }
380
381 static void __set_spte(u64 *sptep, u64 spte)
382 {
383         union split_spte *ssptep, sspte;
384
385         ssptep = (union split_spte *)sptep;
386         sspte = (union split_spte)spte;
387
388         ssptep->spte_high = sspte.spte_high;
389
390         /*
391          * If we map the spte from nonpresent to present, We should store
392          * the high bits firstly, then set present bit, so cpu can not
393          * fetch this spte while we are setting the spte.
394          */
395         smp_wmb();
396
397         ssptep->spte_low = sspte.spte_low;
398 }
399
400 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
401 {
402         union split_spte *ssptep, sspte;
403
404         ssptep = (union split_spte *)sptep;
405         sspte = (union split_spte)spte;
406
407         ssptep->spte_low = sspte.spte_low;
408
409         /*
410          * If we map the spte from present to nonpresent, we should clear
411          * present bit firstly to avoid vcpu fetch the old high bits.
412          */
413         smp_wmb();
414
415         ssptep->spte_high = sspte.spte_high;
416         count_spte_clear(sptep, spte);
417 }
418
419 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
420 {
421         union split_spte *ssptep, sspte, orig;
422
423         ssptep = (union split_spte *)sptep;
424         sspte = (union split_spte)spte;
425
426         /* xchg acts as a barrier before the setting of the high bits */
427         orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low);
428         orig.spte_high = ssptep->spte_high;
429         ssptep->spte_high = sspte.spte_high;
430         count_spte_clear(sptep, spte);
431
432         return orig.spte;
433 }
434
435 /*
436  * The idea using the light way get the spte on x86_32 guest is from
437  * gup_get_pte(arch/x86/mm/gup.c).
438  *
439  * An spte tlb flush may be pending, because kvm_set_pte_rmapp
440  * coalesces them and we are running out of the MMU lock.  Therefore
441  * we need to protect against in-progress updates of the spte.
442  *
443  * Reading the spte while an update is in progress may get the old value
444  * for the high part of the spte.  The race is fine for a present->non-present
445  * change (because the high part of the spte is ignored for non-present spte),
446  * but for a present->present change we must reread the spte.
447  *
448  * All such changes are done in two steps (present->non-present and
449  * non-present->present), hence it is enough to count the number of
450  * present->non-present updates: if it changed while reading the spte,
451  * we might have hit the race.  This is done using clear_spte_count.
452  */
453 static u64 __get_spte_lockless(u64 *sptep)
454 {
455         struct kvm_mmu_page *sp =  page_header(__pa(sptep));
456         union split_spte spte, *orig = (union split_spte *)sptep;
457         int count;
458
459 retry:
460         count = sp->clear_spte_count;
461         smp_rmb();
462
463         spte.spte_low = orig->spte_low;
464         smp_rmb();
465
466         spte.spte_high = orig->spte_high;
467         smp_rmb();
468
469         if (unlikely(spte.spte_low != orig->spte_low ||
470               count != sp->clear_spte_count))
471                 goto retry;
472
473         return spte.spte;
474 }
475 #endif
476
477 static bool spte_is_locklessly_modifiable(u64 spte)
478 {
479         return (spte & (SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE)) ==
480                 (SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE);
481 }
482
483 static bool spte_has_volatile_bits(u64 spte)
484 {
485         /*
486          * Always atomicly update spte if it can be updated
487          * out of mmu-lock, it can ensure dirty bit is not lost,
488          * also, it can help us to get a stable is_writable_pte()
489          * to ensure tlb flush is not missed.
490          */
491         if (spte_is_locklessly_modifiable(spte))
492                 return true;
493
494         if (!shadow_accessed_mask)
495                 return false;
496
497         if (!is_shadow_present_pte(spte))
498                 return false;
499
500         if ((spte & shadow_accessed_mask) &&
501               (!is_writable_pte(spte) || (spte & shadow_dirty_mask)))
502                 return false;
503
504         return true;
505 }
506
507 static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask)
508 {
509         return (old_spte & bit_mask) && !(new_spte & bit_mask);
510 }
511
512 static bool spte_is_bit_changed(u64 old_spte, u64 new_spte, u64 bit_mask)
513 {
514         return (old_spte & bit_mask) != (new_spte & bit_mask);
515 }
516
517 /* Rules for using mmu_spte_set:
518  * Set the sptep from nonpresent to present.
519  * Note: the sptep being assigned *must* be either not present
520  * or in a state where the hardware will not attempt to update
521  * the spte.
522  */
523 static void mmu_spte_set(u64 *sptep, u64 new_spte)
524 {
525         WARN_ON(is_shadow_present_pte(*sptep));
526         __set_spte(sptep, new_spte);
527 }
528
529 /* Rules for using mmu_spte_update:
530  * Update the state bits, it means the mapped pfn is not changged.
531  *
532  * Whenever we overwrite a writable spte with a read-only one we
533  * should flush remote TLBs. Otherwise rmap_write_protect
534  * will find a read-only spte, even though the writable spte
535  * might be cached on a CPU's TLB, the return value indicates this
536  * case.
537  */
538 static bool mmu_spte_update(u64 *sptep, u64 new_spte)
539 {
540         u64 old_spte = *sptep;
541         bool ret = false;
542
543         WARN_ON(!is_rmap_spte(new_spte));
544
545         if (!is_shadow_present_pte(old_spte)) {
546                 mmu_spte_set(sptep, new_spte);
547                 return ret;
548         }
549
550         if (!spte_has_volatile_bits(old_spte))
551                 __update_clear_spte_fast(sptep, new_spte);
552         else
553                 old_spte = __update_clear_spte_slow(sptep, new_spte);
554
555         /*
556          * For the spte updated out of mmu-lock is safe, since
557          * we always atomicly update it, see the comments in
558          * spte_has_volatile_bits().
559          */
560         if (spte_is_locklessly_modifiable(old_spte) &&
561               !is_writable_pte(new_spte))
562                 ret = true;
563
564         if (!shadow_accessed_mask)
565                 return ret;
566
567         /*
568          * Flush TLB when accessed/dirty bits are changed in the page tables,
569          * to guarantee consistency between TLB and page tables.
570          */
571         if (spte_is_bit_changed(old_spte, new_spte,
572                                 shadow_accessed_mask | shadow_dirty_mask))
573                 ret = true;
574
575         if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask))
576                 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
577         if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask))
578                 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
579
580         return ret;
581 }
582
583 /*
584  * Rules for using mmu_spte_clear_track_bits:
585  * It sets the sptep from present to nonpresent, and track the
586  * state bits, it is used to clear the last level sptep.
587  */
588 static int mmu_spte_clear_track_bits(u64 *sptep)
589 {
590         pfn_t pfn;
591         u64 old_spte = *sptep;
592
593         if (!spte_has_volatile_bits(old_spte))
594                 __update_clear_spte_fast(sptep, 0ull);
595         else
596                 old_spte = __update_clear_spte_slow(sptep, 0ull);
597
598         if (!is_rmap_spte(old_spte))
599                 return 0;
600
601         pfn = spte_to_pfn(old_spte);
602
603         /*
604          * KVM does not hold the refcount of the page used by
605          * kvm mmu, before reclaiming the page, we should
606          * unmap it from mmu first.
607          */
608         WARN_ON(!kvm_is_reserved_pfn(pfn) && !page_count(pfn_to_page(pfn)));
609
610         if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
611                 kvm_set_pfn_accessed(pfn);
612         if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask))
613                 kvm_set_pfn_dirty(pfn);
614         return 1;
615 }
616
617 /*
618  * Rules for using mmu_spte_clear_no_track:
619  * Directly clear spte without caring the state bits of sptep,
620  * it is used to set the upper level spte.
621  */
622 static void mmu_spte_clear_no_track(u64 *sptep)
623 {
624         __update_clear_spte_fast(sptep, 0ull);
625 }
626
627 static u64 mmu_spte_get_lockless(u64 *sptep)
628 {
629         return __get_spte_lockless(sptep);
630 }
631
632 static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu)
633 {
634         /*
635          * Prevent page table teardown by making any free-er wait during
636          * kvm_flush_remote_tlbs() IPI to all active vcpus.
637          */
638         local_irq_disable();
639         vcpu->mode = READING_SHADOW_PAGE_TABLES;
640         /*
641          * Make sure a following spte read is not reordered ahead of the write
642          * to vcpu->mode.
643          */
644         smp_mb();
645 }
646
647 static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu)
648 {
649         /*
650          * Make sure the write to vcpu->mode is not reordered in front of
651          * reads to sptes.  If it does, kvm_commit_zap_page() can see us
652          * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
653          */
654         smp_mb();
655         vcpu->mode = OUTSIDE_GUEST_MODE;
656         local_irq_enable();
657 }
658
659 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
660                                   struct kmem_cache *base_cache, int min)
661 {
662         void *obj;
663
664         if (cache->nobjs >= min)
665                 return 0;
666         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
667                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
668                 if (!obj)
669                         return -ENOMEM;
670                 cache->objects[cache->nobjs++] = obj;
671         }
672         return 0;
673 }
674
675 static int mmu_memory_cache_free_objects(struct kvm_mmu_memory_cache *cache)
676 {
677         return cache->nobjs;
678 }
679
680 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
681                                   struct kmem_cache *cache)
682 {
683         while (mc->nobjs)
684                 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
685 }
686
687 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
688                                        int min)
689 {
690         void *page;
691
692         if (cache->nobjs >= min)
693                 return 0;
694         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
695                 page = (void *)__get_free_page(GFP_KERNEL);
696                 if (!page)
697                         return -ENOMEM;
698                 cache->objects[cache->nobjs++] = page;
699         }
700         return 0;
701 }
702
703 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
704 {
705         while (mc->nobjs)
706                 free_page((unsigned long)mc->objects[--mc->nobjs]);
707 }
708
709 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
710 {
711         int r;
712
713         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
714                                    pte_list_desc_cache, 8 + PTE_PREFETCH_NUM);
715         if (r)
716                 goto out;
717         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
718         if (r)
719                 goto out;
720         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
721                                    mmu_page_header_cache, 4);
722 out:
723         return r;
724 }
725
726 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
727 {
728         mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
729                                 pte_list_desc_cache);
730         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
731         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
732                                 mmu_page_header_cache);
733 }
734
735 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
736 {
737         void *p;
738
739         BUG_ON(!mc->nobjs);
740         p = mc->objects[--mc->nobjs];
741         return p;
742 }
743
744 static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu)
745 {
746         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache);
747 }
748
749 static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc)
750 {
751         kmem_cache_free(pte_list_desc_cache, pte_list_desc);
752 }
753
754 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
755 {
756         if (!sp->role.direct)
757                 return sp->gfns[index];
758
759         return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
760 }
761
762 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
763 {
764         if (sp->role.direct)
765                 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
766         else
767                 sp->gfns[index] = gfn;
768 }
769
770 /*
771  * Return the pointer to the large page information for a given gfn,
772  * handling slots that are not large page aligned.
773  */
774 static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn,
775                                               struct kvm_memory_slot *slot,
776                                               int level)
777 {
778         unsigned long idx;
779
780         idx = gfn_to_index(gfn, slot->base_gfn, level);
781         return &slot->arch.lpage_info[level - 2][idx];
782 }
783
784 static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
785 {
786         struct kvm_memslots *slots;
787         struct kvm_memory_slot *slot;
788         struct kvm_lpage_info *linfo;
789         gfn_t gfn;
790         int i;
791
792         gfn = sp->gfn;
793         slots = kvm_memslots_for_spte_role(kvm, sp->role);
794         slot = __gfn_to_memslot(slots, gfn);
795         for (i = PT_DIRECTORY_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) {
796                 linfo = lpage_info_slot(gfn, slot, i);
797                 linfo->write_count += 1;
798         }
799         kvm->arch.indirect_shadow_pages++;
800 }
801
802 static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
803 {
804         struct kvm_memslots *slots;
805         struct kvm_memory_slot *slot;
806         struct kvm_lpage_info *linfo;
807         gfn_t gfn;
808         int i;
809
810         gfn = sp->gfn;
811         slots = kvm_memslots_for_spte_role(kvm, sp->role);
812         slot = __gfn_to_memslot(slots, gfn);
813         for (i = PT_DIRECTORY_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) {
814                 linfo = lpage_info_slot(gfn, slot, i);
815                 linfo->write_count -= 1;
816                 WARN_ON(linfo->write_count < 0);
817         }
818         kvm->arch.indirect_shadow_pages--;
819 }
820
821 static int has_wrprotected_page(struct kvm_vcpu *vcpu,
822                                 gfn_t gfn,
823                                 int level)
824 {
825         struct kvm_memory_slot *slot;
826         struct kvm_lpage_info *linfo;
827
828         slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
829         if (slot) {
830                 linfo = lpage_info_slot(gfn, slot, level);
831                 return linfo->write_count;
832         }
833
834         return 1;
835 }
836
837 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
838 {
839         unsigned long page_size;
840         int i, ret = 0;
841
842         page_size = kvm_host_page_size(kvm, gfn);
843
844         for (i = PT_PAGE_TABLE_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) {
845                 if (page_size >= KVM_HPAGE_SIZE(i))
846                         ret = i;
847                 else
848                         break;
849         }
850
851         return ret;
852 }
853
854 static struct kvm_memory_slot *
855 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn,
856                             bool no_dirty_log)
857 {
858         struct kvm_memory_slot *slot;
859
860         slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
861         if (!slot || slot->flags & KVM_MEMSLOT_INVALID ||
862               (no_dirty_log && slot->dirty_bitmap))
863                 slot = NULL;
864
865         return slot;
866 }
867
868 static bool mapping_level_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t large_gfn)
869 {
870         return !gfn_to_memslot_dirty_bitmap(vcpu, large_gfn, true);
871 }
872
873 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
874 {
875         int host_level, level, max_level;
876
877         host_level = host_mapping_level(vcpu->kvm, large_gfn);
878
879         if (host_level == PT_PAGE_TABLE_LEVEL)
880                 return host_level;
881
882         max_level = min(kvm_x86_ops->get_lpage_level(), host_level);
883
884         for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
885                 if (has_wrprotected_page(vcpu, large_gfn, level))
886                         break;
887
888         return level - 1;
889 }
890
891 /*
892  * Pte mapping structures:
893  *
894  * If pte_list bit zero is zero, then pte_list point to the spte.
895  *
896  * If pte_list bit zero is one, (then pte_list & ~1) points to a struct
897  * pte_list_desc containing more mappings.
898  *
899  * Returns the number of pte entries before the spte was added or zero if
900  * the spte was not added.
901  *
902  */
903 static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte,
904                         unsigned long *pte_list)
905 {
906         struct pte_list_desc *desc;
907         int i, count = 0;
908
909         if (!*pte_list) {
910                 rmap_printk("pte_list_add: %p %llx 0->1\n", spte, *spte);
911                 *pte_list = (unsigned long)spte;
912         } else if (!(*pte_list & 1)) {
913                 rmap_printk("pte_list_add: %p %llx 1->many\n", spte, *spte);
914                 desc = mmu_alloc_pte_list_desc(vcpu);
915                 desc->sptes[0] = (u64 *)*pte_list;
916                 desc->sptes[1] = spte;
917                 *pte_list = (unsigned long)desc | 1;
918                 ++count;
919         } else {
920                 rmap_printk("pte_list_add: %p %llx many->many\n", spte, *spte);
921                 desc = (struct pte_list_desc *)(*pte_list & ~1ul);
922                 while (desc->sptes[PTE_LIST_EXT-1] && desc->more) {
923                         desc = desc->more;
924                         count += PTE_LIST_EXT;
925                 }
926                 if (desc->sptes[PTE_LIST_EXT-1]) {
927                         desc->more = mmu_alloc_pte_list_desc(vcpu);
928                         desc = desc->more;
929                 }
930                 for (i = 0; desc->sptes[i]; ++i)
931                         ++count;
932                 desc->sptes[i] = spte;
933         }
934         return count;
935 }
936
937 static void
938 pte_list_desc_remove_entry(unsigned long *pte_list, struct pte_list_desc *desc,
939                            int i, struct pte_list_desc *prev_desc)
940 {
941         int j;
942
943         for (j = PTE_LIST_EXT - 1; !desc->sptes[j] && j > i; --j)
944                 ;
945         desc->sptes[i] = desc->sptes[j];
946         desc->sptes[j] = NULL;
947         if (j != 0)
948                 return;
949         if (!prev_desc && !desc->more)
950                 *pte_list = (unsigned long)desc->sptes[0];
951         else
952                 if (prev_desc)
953                         prev_desc->more = desc->more;
954                 else
955                         *pte_list = (unsigned long)desc->more | 1;
956         mmu_free_pte_list_desc(desc);
957 }
958
959 static void pte_list_remove(u64 *spte, unsigned long *pte_list)
960 {
961         struct pte_list_desc *desc;
962         struct pte_list_desc *prev_desc;
963         int i;
964
965         if (!*pte_list) {
966                 printk(KERN_ERR "pte_list_remove: %p 0->BUG\n", spte);
967                 BUG();
968         } else if (!(*pte_list & 1)) {
969                 rmap_printk("pte_list_remove:  %p 1->0\n", spte);
970                 if ((u64 *)*pte_list != spte) {
971                         printk(KERN_ERR "pte_list_remove:  %p 1->BUG\n", spte);
972                         BUG();
973                 }
974                 *pte_list = 0;
975         } else {
976                 rmap_printk("pte_list_remove:  %p many->many\n", spte);
977                 desc = (struct pte_list_desc *)(*pte_list & ~1ul);
978                 prev_desc = NULL;
979                 while (desc) {
980                         for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i)
981                                 if (desc->sptes[i] == spte) {
982                                         pte_list_desc_remove_entry(pte_list,
983                                                                desc, i,
984                                                                prev_desc);
985                                         return;
986                                 }
987                         prev_desc = desc;
988                         desc = desc->more;
989                 }
990                 pr_err("pte_list_remove: %p many->many\n", spte);
991                 BUG();
992         }
993 }
994
995 typedef void (*pte_list_walk_fn) (u64 *spte);
996 static void pte_list_walk(unsigned long *pte_list, pte_list_walk_fn fn)
997 {
998         struct pte_list_desc *desc;
999         int i;
1000
1001         if (!*pte_list)
1002                 return;
1003
1004         if (!(*pte_list & 1))
1005                 return fn((u64 *)*pte_list);
1006
1007         desc = (struct pte_list_desc *)(*pte_list & ~1ul);
1008         while (desc) {
1009                 for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i)
1010                         fn(desc->sptes[i]);
1011                 desc = desc->more;
1012         }
1013 }
1014
1015 static unsigned long *__gfn_to_rmap(gfn_t gfn, int level,
1016                                     struct kvm_memory_slot *slot)
1017 {
1018         unsigned long idx;
1019
1020         idx = gfn_to_index(gfn, slot->base_gfn, level);
1021         return &slot->arch.rmap[level - PT_PAGE_TABLE_LEVEL][idx];
1022 }
1023
1024 /*
1025  * Take gfn and return the reverse mapping to it.
1026  */
1027 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, struct kvm_mmu_page *sp)
1028 {
1029         struct kvm_memslots *slots;
1030         struct kvm_memory_slot *slot;
1031
1032         slots = kvm_memslots_for_spte_role(kvm, sp->role);
1033         slot = __gfn_to_memslot(slots, gfn);
1034         return __gfn_to_rmap(gfn, sp->role.level, slot);
1035 }
1036
1037 static bool rmap_can_add(struct kvm_vcpu *vcpu)
1038 {
1039         struct kvm_mmu_memory_cache *cache;
1040
1041         cache = &vcpu->arch.mmu_pte_list_desc_cache;
1042         return mmu_memory_cache_free_objects(cache);
1043 }
1044
1045 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
1046 {
1047         struct kvm_mmu_page *sp;
1048         unsigned long *rmapp;
1049
1050         sp = page_header(__pa(spte));
1051         kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
1052         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp);
1053         return pte_list_add(vcpu, spte, rmapp);
1054 }
1055
1056 static void rmap_remove(struct kvm *kvm, u64 *spte)
1057 {
1058         struct kvm_mmu_page *sp;
1059         gfn_t gfn;
1060         unsigned long *rmapp;
1061
1062         sp = page_header(__pa(spte));
1063         gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
1064         rmapp = gfn_to_rmap(kvm, gfn, sp);
1065         pte_list_remove(spte, rmapp);
1066 }
1067
1068 /*
1069  * Used by the following functions to iterate through the sptes linked by a
1070  * rmap.  All fields are private and not assumed to be used outside.
1071  */
1072 struct rmap_iterator {
1073         /* private fields */
1074         struct pte_list_desc *desc;     /* holds the sptep if not NULL */
1075         int pos;                        /* index of the sptep */
1076 };
1077
1078 /*
1079  * Iteration must be started by this function.  This should also be used after
1080  * removing/dropping sptes from the rmap link because in such cases the
1081  * information in the itererator may not be valid.
1082  *
1083  * Returns sptep if found, NULL otherwise.
1084  */
1085 static u64 *rmap_get_first(unsigned long rmap, struct rmap_iterator *iter)
1086 {
1087         if (!rmap)
1088                 return NULL;
1089
1090         if (!(rmap & 1)) {
1091                 iter->desc = NULL;
1092                 return (u64 *)rmap;
1093         }
1094
1095         iter->desc = (struct pte_list_desc *)(rmap & ~1ul);
1096         iter->pos = 0;
1097         return iter->desc->sptes[iter->pos];
1098 }
1099
1100 /*
1101  * Must be used with a valid iterator: e.g. after rmap_get_first().
1102  *
1103  * Returns sptep if found, NULL otherwise.
1104  */
1105 static u64 *rmap_get_next(struct rmap_iterator *iter)
1106 {
1107         if (iter->desc) {
1108                 if (iter->pos < PTE_LIST_EXT - 1) {
1109                         u64 *sptep;
1110
1111                         ++iter->pos;
1112                         sptep = iter->desc->sptes[iter->pos];
1113                         if (sptep)
1114                                 return sptep;
1115                 }
1116
1117                 iter->desc = iter->desc->more;
1118
1119                 if (iter->desc) {
1120                         iter->pos = 0;
1121                         /* desc->sptes[0] cannot be NULL */
1122                         return iter->desc->sptes[iter->pos];
1123                 }
1124         }
1125
1126         return NULL;
1127 }
1128
1129 #define for_each_rmap_spte(_rmap_, _iter_, _spte_)                          \
1130            for (_spte_ = rmap_get_first(*_rmap_, _iter_);                   \
1131                 _spte_ && ({BUG_ON(!is_shadow_present_pte(*_spte_)); 1;});  \
1132                         _spte_ = rmap_get_next(_iter_))
1133
1134 static void drop_spte(struct kvm *kvm, u64 *sptep)
1135 {
1136         if (mmu_spte_clear_track_bits(sptep))
1137                 rmap_remove(kvm, sptep);
1138 }
1139
1140
1141 static bool __drop_large_spte(struct kvm *kvm, u64 *sptep)
1142 {
1143         if (is_large_pte(*sptep)) {
1144                 WARN_ON(page_header(__pa(sptep))->role.level ==
1145                         PT_PAGE_TABLE_LEVEL);
1146                 drop_spte(kvm, sptep);
1147                 --kvm->stat.lpages;
1148                 return true;
1149         }
1150
1151         return false;
1152 }
1153
1154 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1155 {
1156         if (__drop_large_spte(vcpu->kvm, sptep))
1157                 kvm_flush_remote_tlbs(vcpu->kvm);
1158 }
1159
1160 /*
1161  * Write-protect on the specified @sptep, @pt_protect indicates whether
1162  * spte write-protection is caused by protecting shadow page table.
1163  *
1164  * Note: write protection is difference between dirty logging and spte
1165  * protection:
1166  * - for dirty logging, the spte can be set to writable at anytime if
1167  *   its dirty bitmap is properly set.
1168  * - for spte protection, the spte can be writable only after unsync-ing
1169  *   shadow page.
1170  *
1171  * Return true if tlb need be flushed.
1172  */
1173 static bool spte_write_protect(struct kvm *kvm, u64 *sptep, bool pt_protect)
1174 {
1175         u64 spte = *sptep;
1176
1177         if (!is_writable_pte(spte) &&
1178               !(pt_protect && spte_is_locklessly_modifiable(spte)))
1179                 return false;
1180
1181         rmap_printk("rmap_write_protect: spte %p %llx\n", sptep, *sptep);
1182
1183         if (pt_protect)
1184                 spte &= ~SPTE_MMU_WRITEABLE;
1185         spte = spte & ~PT_WRITABLE_MASK;
1186
1187         return mmu_spte_update(sptep, spte);
1188 }
1189
1190 static bool __rmap_write_protect(struct kvm *kvm, unsigned long *rmapp,
1191                                  bool pt_protect)
1192 {
1193         u64 *sptep;
1194         struct rmap_iterator iter;
1195         bool flush = false;
1196
1197         for_each_rmap_spte(rmapp, &iter, sptep)
1198                 flush |= spte_write_protect(kvm, sptep, pt_protect);
1199
1200         return flush;
1201 }
1202
1203 static bool spte_clear_dirty(struct kvm *kvm, u64 *sptep)
1204 {
1205         u64 spte = *sptep;
1206
1207         rmap_printk("rmap_clear_dirty: spte %p %llx\n", sptep, *sptep);
1208
1209         spte &= ~shadow_dirty_mask;
1210
1211         return mmu_spte_update(sptep, spte);
1212 }
1213
1214 static bool __rmap_clear_dirty(struct kvm *kvm, unsigned long *rmapp)
1215 {
1216         u64 *sptep;
1217         struct rmap_iterator iter;
1218         bool flush = false;
1219
1220         for_each_rmap_spte(rmapp, &iter, sptep)
1221                 flush |= spte_clear_dirty(kvm, sptep);
1222
1223         return flush;
1224 }
1225
1226 static bool spte_set_dirty(struct kvm *kvm, u64 *sptep)
1227 {
1228         u64 spte = *sptep;
1229
1230         rmap_printk("rmap_set_dirty: spte %p %llx\n", sptep, *sptep);
1231
1232         spte |= shadow_dirty_mask;
1233
1234         return mmu_spte_update(sptep, spte);
1235 }
1236
1237 static bool __rmap_set_dirty(struct kvm *kvm, unsigned long *rmapp)
1238 {
1239         u64 *sptep;
1240         struct rmap_iterator iter;
1241         bool flush = false;
1242
1243         for_each_rmap_spte(rmapp, &iter, sptep)
1244                 flush |= spte_set_dirty(kvm, sptep);
1245
1246         return flush;
1247 }
1248
1249 /**
1250  * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1251  * @kvm: kvm instance
1252  * @slot: slot to protect
1253  * @gfn_offset: start of the BITS_PER_LONG pages we care about
1254  * @mask: indicates which pages we should protect
1255  *
1256  * Used when we do not need to care about huge page mappings: e.g. during dirty
1257  * logging we do not have any such mappings.
1258  */
1259 static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
1260                                      struct kvm_memory_slot *slot,
1261                                      gfn_t gfn_offset, unsigned long mask)
1262 {
1263         unsigned long *rmapp;
1264
1265         while (mask) {
1266                 rmapp = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1267                                       PT_PAGE_TABLE_LEVEL, slot);
1268                 __rmap_write_protect(kvm, rmapp, false);
1269
1270                 /* clear the first set bit */
1271                 mask &= mask - 1;
1272         }
1273 }
1274
1275 /**
1276  * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages
1277  * @kvm: kvm instance
1278  * @slot: slot to clear D-bit
1279  * @gfn_offset: start of the BITS_PER_LONG pages we care about
1280  * @mask: indicates which pages we should clear D-bit
1281  *
1282  * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap.
1283  */
1284 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1285                                      struct kvm_memory_slot *slot,
1286                                      gfn_t gfn_offset, unsigned long mask)
1287 {
1288         unsigned long *rmapp;
1289
1290         while (mask) {
1291                 rmapp = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1292                                       PT_PAGE_TABLE_LEVEL, slot);
1293                 __rmap_clear_dirty(kvm, rmapp);
1294
1295                 /* clear the first set bit */
1296                 mask &= mask - 1;
1297         }
1298 }
1299 EXPORT_SYMBOL_GPL(kvm_mmu_clear_dirty_pt_masked);
1300
1301 /**
1302  * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1303  * PT level pages.
1304  *
1305  * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1306  * enable dirty logging for them.
1307  *
1308  * Used when we do not need to care about huge page mappings: e.g. during dirty
1309  * logging we do not have any such mappings.
1310  */
1311 void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1312                                 struct kvm_memory_slot *slot,
1313                                 gfn_t gfn_offset, unsigned long mask)
1314 {
1315         if (kvm_x86_ops->enable_log_dirty_pt_masked)
1316                 kvm_x86_ops->enable_log_dirty_pt_masked(kvm, slot, gfn_offset,
1317                                 mask);
1318         else
1319                 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1320 }
1321
1322 static bool rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
1323 {
1324         struct kvm_memory_slot *slot;
1325         unsigned long *rmapp;
1326         int i;
1327         bool write_protected = false;
1328
1329         slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
1330
1331         for (i = PT_PAGE_TABLE_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) {
1332                 rmapp = __gfn_to_rmap(gfn, i, slot);
1333                 write_protected |= __rmap_write_protect(vcpu->kvm, rmapp, true);
1334         }
1335
1336         return write_protected;
1337 }
1338
1339 static bool kvm_zap_rmapp(struct kvm *kvm, unsigned long *rmapp)
1340 {
1341         u64 *sptep;
1342         struct rmap_iterator iter;
1343         bool flush = false;
1344
1345         while ((sptep = rmap_get_first(*rmapp, &iter))) {
1346                 BUG_ON(!(*sptep & PT_PRESENT_MASK));
1347                 rmap_printk("%s: spte %p %llx.\n", __func__, sptep, *sptep);
1348
1349                 drop_spte(kvm, sptep);
1350                 flush = true;
1351         }
1352
1353         return flush;
1354 }
1355
1356 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
1357                            struct kvm_memory_slot *slot, gfn_t gfn, int level,
1358                            unsigned long data)
1359 {
1360         return kvm_zap_rmapp(kvm, rmapp);
1361 }
1362
1363 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
1364                              struct kvm_memory_slot *slot, gfn_t gfn, int level,
1365                              unsigned long data)
1366 {
1367         u64 *sptep;
1368         struct rmap_iterator iter;
1369         int need_flush = 0;
1370         u64 new_spte;
1371         pte_t *ptep = (pte_t *)data;
1372         pfn_t new_pfn;
1373
1374         WARN_ON(pte_huge(*ptep));
1375         new_pfn = pte_pfn(*ptep);
1376
1377 restart:
1378         for_each_rmap_spte(rmapp, &iter, sptep) {
1379                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx gfn %llx (%d)\n",
1380                              sptep, *sptep, gfn, level);
1381
1382                 need_flush = 1;
1383
1384                 if (pte_write(*ptep)) {
1385                         drop_spte(kvm, sptep);
1386                         goto restart;
1387                 } else {
1388                         new_spte = *sptep & ~PT64_BASE_ADDR_MASK;
1389                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
1390
1391                         new_spte &= ~PT_WRITABLE_MASK;
1392                         new_spte &= ~SPTE_HOST_WRITEABLE;
1393                         new_spte &= ~shadow_accessed_mask;
1394
1395                         mmu_spte_clear_track_bits(sptep);
1396                         mmu_spte_set(sptep, new_spte);
1397                 }
1398         }
1399
1400         if (need_flush)
1401                 kvm_flush_remote_tlbs(kvm);
1402
1403         return 0;
1404 }
1405
1406 struct slot_rmap_walk_iterator {
1407         /* input fields. */
1408         struct kvm_memory_slot *slot;
1409         gfn_t start_gfn;
1410         gfn_t end_gfn;
1411         int start_level;
1412         int end_level;
1413
1414         /* output fields. */
1415         gfn_t gfn;
1416         unsigned long *rmap;
1417         int level;
1418
1419         /* private field. */
1420         unsigned long *end_rmap;
1421 };
1422
1423 static void
1424 rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level)
1425 {
1426         iterator->level = level;
1427         iterator->gfn = iterator->start_gfn;
1428         iterator->rmap = __gfn_to_rmap(iterator->gfn, level, iterator->slot);
1429         iterator->end_rmap = __gfn_to_rmap(iterator->end_gfn, level,
1430                                            iterator->slot);
1431 }
1432
1433 static void
1434 slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator,
1435                     struct kvm_memory_slot *slot, int start_level,
1436                     int end_level, gfn_t start_gfn, gfn_t end_gfn)
1437 {
1438         iterator->slot = slot;
1439         iterator->start_level = start_level;
1440         iterator->end_level = end_level;
1441         iterator->start_gfn = start_gfn;
1442         iterator->end_gfn = end_gfn;
1443
1444         rmap_walk_init_level(iterator, iterator->start_level);
1445 }
1446
1447 static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator)
1448 {
1449         return !!iterator->rmap;
1450 }
1451
1452 static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator)
1453 {
1454         if (++iterator->rmap <= iterator->end_rmap) {
1455                 iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level));
1456                 return;
1457         }
1458
1459         if (++iterator->level > iterator->end_level) {
1460                 iterator->rmap = NULL;
1461                 return;
1462         }
1463
1464         rmap_walk_init_level(iterator, iterator->level);
1465 }
1466
1467 #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_,    \
1468            _start_gfn, _end_gfn, _iter_)                                \
1469         for (slot_rmap_walk_init(_iter_, _slot_, _start_level_,         \
1470                                  _end_level_, _start_gfn, _end_gfn);    \
1471              slot_rmap_walk_okay(_iter_);                               \
1472              slot_rmap_walk_next(_iter_))
1473
1474 static int kvm_handle_hva_range(struct kvm *kvm,
1475                                 unsigned long start,
1476                                 unsigned long end,
1477                                 unsigned long data,
1478                                 int (*handler)(struct kvm *kvm,
1479                                                unsigned long *rmapp,
1480                                                struct kvm_memory_slot *slot,
1481                                                gfn_t gfn,
1482                                                int level,
1483                                                unsigned long data))
1484 {
1485         struct kvm_memslots *slots;
1486         struct kvm_memory_slot *memslot;
1487         struct slot_rmap_walk_iterator iterator;
1488         int ret = 0;
1489         int i;
1490
1491         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
1492                 slots = __kvm_memslots(kvm, i);
1493                 kvm_for_each_memslot(memslot, slots) {
1494                         unsigned long hva_start, hva_end;
1495                         gfn_t gfn_start, gfn_end;
1496
1497                         hva_start = max(start, memslot->userspace_addr);
1498                         hva_end = min(end, memslot->userspace_addr +
1499                                       (memslot->npages << PAGE_SHIFT));
1500                         if (hva_start >= hva_end)
1501                                 continue;
1502                         /*
1503                          * {gfn(page) | page intersects with [hva_start, hva_end)} =
1504                          * {gfn_start, gfn_start+1, ..., gfn_end-1}.
1505                          */
1506                         gfn_start = hva_to_gfn_memslot(hva_start, memslot);
1507                         gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
1508
1509                         for_each_slot_rmap_range(memslot, PT_PAGE_TABLE_LEVEL,
1510                                                  PT_MAX_HUGEPAGE_LEVEL,
1511                                                  gfn_start, gfn_end - 1,
1512                                                  &iterator)
1513                                 ret |= handler(kvm, iterator.rmap, memslot,
1514                                                iterator.gfn, iterator.level, data);
1515                 }
1516         }
1517
1518         return ret;
1519 }
1520
1521 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
1522                           unsigned long data,
1523                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
1524                                          struct kvm_memory_slot *slot,
1525                                          gfn_t gfn, int level,
1526                                          unsigned long data))
1527 {
1528         return kvm_handle_hva_range(kvm, hva, hva + 1, data, handler);
1529 }
1530
1531 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
1532 {
1533         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
1534 }
1535
1536 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
1537 {
1538         return kvm_handle_hva_range(kvm, start, end, 0, kvm_unmap_rmapp);
1539 }
1540
1541 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
1542 {
1543         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
1544 }
1545
1546 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
1547                          struct kvm_memory_slot *slot, gfn_t gfn, int level,
1548                          unsigned long data)
1549 {
1550         u64 *sptep;
1551         struct rmap_iterator uninitialized_var(iter);
1552         int young = 0;
1553
1554         BUG_ON(!shadow_accessed_mask);
1555
1556         for_each_rmap_spte(rmapp, &iter, sptep)
1557                 if (*sptep & shadow_accessed_mask) {
1558                         young = 1;
1559                         clear_bit((ffs(shadow_accessed_mask) - 1),
1560                                  (unsigned long *)sptep);
1561                 }
1562
1563         trace_kvm_age_page(gfn, level, slot, young);
1564         return young;
1565 }
1566
1567 static int kvm_test_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
1568                               struct kvm_memory_slot *slot, gfn_t gfn,
1569                               int level, unsigned long data)
1570 {
1571         u64 *sptep;
1572         struct rmap_iterator iter;
1573         int young = 0;
1574
1575         /*
1576          * If there's no access bit in the secondary pte set by the
1577          * hardware it's up to gup-fast/gup to set the access bit in
1578          * the primary pte or in the page structure.
1579          */
1580         if (!shadow_accessed_mask)
1581                 goto out;
1582
1583         for_each_rmap_spte(rmapp, &iter, sptep)
1584                 if (*sptep & shadow_accessed_mask) {
1585                         young = 1;
1586                         break;
1587                 }
1588 out:
1589         return young;
1590 }
1591
1592 #define RMAP_RECYCLE_THRESHOLD 1000
1593
1594 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
1595 {
1596         unsigned long *rmapp;
1597         struct kvm_mmu_page *sp;
1598
1599         sp = page_header(__pa(spte));
1600
1601         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp);
1602
1603         kvm_unmap_rmapp(vcpu->kvm, rmapp, NULL, gfn, sp->role.level, 0);
1604         kvm_flush_remote_tlbs(vcpu->kvm);
1605 }
1606
1607 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
1608 {
1609         /*
1610          * In case of absence of EPT Access and Dirty Bits supports,
1611          * emulate the accessed bit for EPT, by checking if this page has
1612          * an EPT mapping, and clearing it if it does. On the next access,
1613          * a new EPT mapping will be established.
1614          * This has some overhead, but not as much as the cost of swapping
1615          * out actively used pages or breaking up actively used hugepages.
1616          */
1617         if (!shadow_accessed_mask) {
1618                 /*
1619                  * We are holding the kvm->mmu_lock, and we are blowing up
1620                  * shadow PTEs. MMU notifier consumers need to be kept at bay.
1621                  * This is correct as long as we don't decouple the mmu_lock
1622                  * protected regions (like invalidate_range_start|end does).
1623                  */
1624                 kvm->mmu_notifier_seq++;
1625                 return kvm_handle_hva_range(kvm, start, end, 0,
1626                                             kvm_unmap_rmapp);
1627         }
1628
1629         return kvm_handle_hva_range(kvm, start, end, 0, kvm_age_rmapp);
1630 }
1631
1632 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1633 {
1634         return kvm_handle_hva(kvm, hva, 0, kvm_test_age_rmapp);
1635 }
1636
1637 #ifdef MMU_DEBUG
1638 static int is_empty_shadow_page(u64 *spt)
1639 {
1640         u64 *pos;
1641         u64 *end;
1642
1643         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
1644                 if (is_shadow_present_pte(*pos)) {
1645                         printk(KERN_ERR "%s: %p %llx\n", __func__,
1646                                pos, *pos);
1647                         return 0;
1648                 }
1649         return 1;
1650 }
1651 #endif
1652
1653 /*
1654  * This value is the sum of all of the kvm instances's
1655  * kvm->arch.n_used_mmu_pages values.  We need a global,
1656  * aggregate version in order to make the slab shrinker
1657  * faster
1658  */
1659 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, int nr)
1660 {
1661         kvm->arch.n_used_mmu_pages += nr;
1662         percpu_counter_add(&kvm_total_used_mmu_pages, nr);
1663 }
1664
1665 static void kvm_mmu_free_page(struct kvm_mmu_page *sp)
1666 {
1667         MMU_WARN_ON(!is_empty_shadow_page(sp->spt));
1668         hlist_del(&sp->hash_link);
1669         list_del(&sp->link);
1670         free_page((unsigned long)sp->spt);
1671         if (!sp->role.direct)
1672                 free_page((unsigned long)sp->gfns);
1673         kmem_cache_free(mmu_page_header_cache, sp);
1674 }
1675
1676 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1677 {
1678         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
1679 }
1680
1681 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1682                                     struct kvm_mmu_page *sp, u64 *parent_pte)
1683 {
1684         if (!parent_pte)
1685                 return;
1686
1687         pte_list_add(vcpu, parent_pte, &sp->parent_ptes);
1688 }
1689
1690 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1691                                        u64 *parent_pte)
1692 {
1693         pte_list_remove(parent_pte, &sp->parent_ptes);
1694 }
1695
1696 static void drop_parent_pte(struct kvm_mmu_page *sp,
1697                             u64 *parent_pte)
1698 {
1699         mmu_page_remove_parent_pte(sp, parent_pte);
1700         mmu_spte_clear_no_track(parent_pte);
1701 }
1702
1703 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
1704                                                u64 *parent_pte, int direct)
1705 {
1706         struct kvm_mmu_page *sp;
1707
1708         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache);
1709         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache);
1710         if (!direct)
1711                 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache);
1712         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1713
1714         /*
1715          * The active_mmu_pages list is the FIFO list, do not move the
1716          * page until it is zapped. kvm_zap_obsolete_pages depends on
1717          * this feature. See the comments in kvm_zap_obsolete_pages().
1718          */
1719         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1720         sp->parent_ptes = 0;
1721         mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1722         kvm_mod_used_mmu_pages(vcpu->kvm, +1);
1723         return sp;
1724 }
1725
1726 static void mark_unsync(u64 *spte);
1727 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1728 {
1729         pte_list_walk(&sp->parent_ptes, mark_unsync);
1730 }
1731
1732 static void mark_unsync(u64 *spte)
1733 {
1734         struct kvm_mmu_page *sp;
1735         unsigned int index;
1736
1737         sp = page_header(__pa(spte));
1738         index = spte - sp->spt;
1739         if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1740                 return;
1741         if (sp->unsync_children++)
1742                 return;
1743         kvm_mmu_mark_parents_unsync(sp);
1744 }
1745
1746 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1747                                struct kvm_mmu_page *sp)
1748 {
1749         return 1;
1750 }
1751
1752 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1753 {
1754 }
1755
1756 static void nonpaging_update_pte(struct kvm_vcpu *vcpu,
1757                                  struct kvm_mmu_page *sp, u64 *spte,
1758                                  const void *pte)
1759 {
1760         WARN_ON(1);
1761 }
1762
1763 #define KVM_PAGE_ARRAY_NR 16
1764
1765 struct kvm_mmu_pages {
1766         struct mmu_page_and_offset {
1767                 struct kvm_mmu_page *sp;
1768                 unsigned int idx;
1769         } page[KVM_PAGE_ARRAY_NR];
1770         unsigned int nr;
1771 };
1772
1773 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1774                          int idx)
1775 {
1776         int i;
1777
1778         if (sp->unsync)
1779                 for (i=0; i < pvec->nr; i++)
1780                         if (pvec->page[i].sp == sp)
1781                                 return 0;
1782
1783         pvec->page[pvec->nr].sp = sp;
1784         pvec->page[pvec->nr].idx = idx;
1785         pvec->nr++;
1786         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1787 }
1788
1789 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1790                            struct kvm_mmu_pages *pvec)
1791 {
1792         int i, ret, nr_unsync_leaf = 0;
1793
1794         for_each_set_bit(i, sp->unsync_child_bitmap, 512) {
1795                 struct kvm_mmu_page *child;
1796                 u64 ent = sp->spt[i];
1797
1798                 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1799                         goto clear_child_bitmap;
1800
1801                 child = page_header(ent & PT64_BASE_ADDR_MASK);
1802
1803                 if (child->unsync_children) {
1804                         if (mmu_pages_add(pvec, child, i))
1805                                 return -ENOSPC;
1806
1807                         ret = __mmu_unsync_walk(child, pvec);
1808                         if (!ret)
1809                                 goto clear_child_bitmap;
1810                         else if (ret > 0)
1811                                 nr_unsync_leaf += ret;
1812                         else
1813                                 return ret;
1814                 } else if (child->unsync) {
1815                         nr_unsync_leaf++;
1816                         if (mmu_pages_add(pvec, child, i))
1817                                 return -ENOSPC;
1818                 } else
1819                          goto clear_child_bitmap;
1820
1821                 continue;
1822
1823 clear_child_bitmap:
1824                 __clear_bit(i, sp->unsync_child_bitmap);
1825                 sp->unsync_children--;
1826                 WARN_ON((int)sp->unsync_children < 0);
1827         }
1828
1829
1830         return nr_unsync_leaf;
1831 }
1832
1833 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1834                            struct kvm_mmu_pages *pvec)
1835 {
1836         if (!sp->unsync_children)
1837                 return 0;
1838
1839         mmu_pages_add(pvec, sp, 0);
1840         return __mmu_unsync_walk(sp, pvec);
1841 }
1842
1843 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1844 {
1845         WARN_ON(!sp->unsync);
1846         trace_kvm_mmu_sync_page(sp);
1847         sp->unsync = 0;
1848         --kvm->stat.mmu_unsync;
1849 }
1850
1851 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1852                                     struct list_head *invalid_list);
1853 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1854                                     struct list_head *invalid_list);
1855
1856 /*
1857  * NOTE: we should pay more attention on the zapped-obsolete page
1858  * (is_obsolete_sp(sp) && sp->role.invalid) when you do hash list walk
1859  * since it has been deleted from active_mmu_pages but still can be found
1860  * at hast list.
1861  *
1862  * for_each_gfn_indirect_valid_sp has skipped that kind of page and
1863  * kvm_mmu_get_page(), the only user of for_each_gfn_sp(), has skipped
1864  * all the obsolete pages.
1865  */
1866 #define for_each_gfn_sp(_kvm, _sp, _gfn)                                \
1867         hlist_for_each_entry(_sp,                                       \
1868           &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)], hash_link) \
1869                 if ((_sp)->gfn != (_gfn)) {} else
1870
1871 #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn)                 \
1872         for_each_gfn_sp(_kvm, _sp, _gfn)                                \
1873                 if ((_sp)->role.direct || (_sp)->role.invalid) {} else
1874
1875 /* @sp->gfn should be write-protected at the call site */
1876 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1877                            struct list_head *invalid_list, bool clear_unsync)
1878 {
1879         if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1880                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1881                 return 1;
1882         }
1883
1884         if (clear_unsync)
1885                 kvm_unlink_unsync_page(vcpu->kvm, sp);
1886
1887         if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1888                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1889                 return 1;
1890         }
1891
1892         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
1893         return 0;
1894 }
1895
1896 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1897                                    struct kvm_mmu_page *sp)
1898 {
1899         LIST_HEAD(invalid_list);
1900         int ret;
1901
1902         ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1903         if (ret)
1904                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1905
1906         return ret;
1907 }
1908
1909 #ifdef CONFIG_KVM_MMU_AUDIT
1910 #include "mmu_audit.c"
1911 #else
1912 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, int point) { }
1913 static void mmu_audit_disable(void) { }
1914 #endif
1915
1916 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1917                          struct list_head *invalid_list)
1918 {
1919         return __kvm_sync_page(vcpu, sp, invalid_list, true);
1920 }
1921
1922 /* @gfn should be write-protected at the call site */
1923 static void kvm_sync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1924 {
1925         struct kvm_mmu_page *s;
1926         LIST_HEAD(invalid_list);
1927         bool flush = false;
1928
1929         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) {
1930                 if (!s->unsync)
1931                         continue;
1932
1933                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1934                 kvm_unlink_unsync_page(vcpu->kvm, s);
1935                 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1936                         (vcpu->arch.mmu.sync_page(vcpu, s))) {
1937                         kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1938                         continue;
1939                 }
1940                 flush = true;
1941         }
1942
1943         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1944         if (flush)
1945                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
1946 }
1947
1948 struct mmu_page_path {
1949         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1950         unsigned int idx[PT64_ROOT_LEVEL-1];
1951 };
1952
1953 #define for_each_sp(pvec, sp, parents, i)                       \
1954                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1955                         sp = pvec.page[i].sp;                   \
1956                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1957                         i = mmu_pages_next(&pvec, &parents, i))
1958
1959 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1960                           struct mmu_page_path *parents,
1961                           int i)
1962 {
1963         int n;
1964
1965         for (n = i+1; n < pvec->nr; n++) {
1966                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1967
1968                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1969                         parents->idx[0] = pvec->page[n].idx;
1970                         return n;
1971                 }
1972
1973                 parents->parent[sp->role.level-2] = sp;
1974                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1975         }
1976
1977         return n;
1978 }
1979
1980 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1981 {
1982         struct kvm_mmu_page *sp;
1983         unsigned int level = 0;
1984
1985         do {
1986                 unsigned int idx = parents->idx[level];
1987
1988                 sp = parents->parent[level];
1989                 if (!sp)
1990                         return;
1991
1992                 --sp->unsync_children;
1993                 WARN_ON((int)sp->unsync_children < 0);
1994                 __clear_bit(idx, sp->unsync_child_bitmap);
1995                 level++;
1996         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1997 }
1998
1999 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
2000                                struct mmu_page_path *parents,
2001                                struct kvm_mmu_pages *pvec)
2002 {
2003         parents->parent[parent->role.level-1] = NULL;
2004         pvec->nr = 0;
2005 }
2006
2007 static void mmu_sync_children(struct kvm_vcpu *vcpu,
2008                               struct kvm_mmu_page *parent)
2009 {
2010         int i;
2011         struct kvm_mmu_page *sp;
2012         struct mmu_page_path parents;
2013         struct kvm_mmu_pages pages;
2014         LIST_HEAD(invalid_list);
2015
2016         kvm_mmu_pages_init(parent, &parents, &pages);
2017         while (mmu_unsync_walk(parent, &pages)) {
2018                 bool protected = false;
2019
2020                 for_each_sp(pages, sp, parents, i)
2021                         protected |= rmap_write_protect(vcpu, sp->gfn);
2022
2023                 if (protected)
2024                         kvm_flush_remote_tlbs(vcpu->kvm);
2025
2026                 for_each_sp(pages, sp, parents, i) {
2027                         kvm_sync_page(vcpu, sp, &invalid_list);
2028                         mmu_pages_clear_parents(&parents);
2029                 }
2030                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2031                 cond_resched_lock(&vcpu->kvm->mmu_lock);
2032                 kvm_mmu_pages_init(parent, &parents, &pages);
2033         }
2034 }
2035
2036 static void init_shadow_page_table(struct kvm_mmu_page *sp)
2037 {
2038         int i;
2039
2040         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2041                 sp->spt[i] = 0ull;
2042 }
2043
2044 static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp)
2045 {
2046         sp->write_flooding_count = 0;
2047 }
2048
2049 static void clear_sp_write_flooding_count(u64 *spte)
2050 {
2051         struct kvm_mmu_page *sp =  page_header(__pa(spte));
2052
2053         __clear_sp_write_flooding_count(sp);
2054 }
2055
2056 static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp)
2057 {
2058         return unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen);
2059 }
2060
2061 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
2062                                              gfn_t gfn,
2063                                              gva_t gaddr,
2064                                              unsigned level,
2065                                              int direct,
2066                                              unsigned access,
2067                                              u64 *parent_pte)
2068 {
2069         union kvm_mmu_page_role role;
2070         unsigned quadrant;
2071         struct kvm_mmu_page *sp;
2072         bool need_sync = false;
2073
2074         role = vcpu->arch.mmu.base_role;
2075         role.level = level;
2076         role.direct = direct;
2077         if (role.direct)
2078                 role.cr4_pae = 0;
2079         role.access = access;
2080         if (!vcpu->arch.mmu.direct_map
2081             && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
2082                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
2083                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
2084                 role.quadrant = quadrant;
2085         }
2086         for_each_gfn_sp(vcpu->kvm, sp, gfn) {
2087                 if (is_obsolete_sp(vcpu->kvm, sp))
2088                         continue;
2089
2090                 if (!need_sync && sp->unsync)
2091                         need_sync = true;
2092
2093                 if (sp->role.word != role.word)
2094                         continue;
2095
2096                 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
2097                         break;
2098
2099                 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
2100                 if (sp->unsync_children) {
2101                         kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
2102                         kvm_mmu_mark_parents_unsync(sp);
2103                 } else if (sp->unsync)
2104                         kvm_mmu_mark_parents_unsync(sp);
2105
2106                 __clear_sp_write_flooding_count(sp);
2107                 trace_kvm_mmu_get_page(sp, false);
2108                 return sp;
2109         }
2110         ++vcpu->kvm->stat.mmu_cache_miss;
2111         sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
2112         if (!sp)
2113                 return sp;
2114         sp->gfn = gfn;
2115         sp->role = role;
2116         hlist_add_head(&sp->hash_link,
2117                 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
2118         if (!direct) {
2119                 if (rmap_write_protect(vcpu, gfn))
2120                         kvm_flush_remote_tlbs(vcpu->kvm);
2121                 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
2122                         kvm_sync_pages(vcpu, gfn);
2123
2124                 account_shadowed(vcpu->kvm, sp);
2125         }
2126         sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen;
2127         init_shadow_page_table(sp);
2128         trace_kvm_mmu_get_page(sp, true);
2129         return sp;
2130 }
2131
2132 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
2133                              struct kvm_vcpu *vcpu, u64 addr)
2134 {
2135         iterator->addr = addr;
2136         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
2137         iterator->level = vcpu->arch.mmu.shadow_root_level;
2138
2139         if (iterator->level == PT64_ROOT_LEVEL &&
2140             vcpu->arch.mmu.root_level < PT64_ROOT_LEVEL &&
2141             !vcpu->arch.mmu.direct_map)
2142                 --iterator->level;
2143
2144         if (iterator->level == PT32E_ROOT_LEVEL) {
2145                 iterator->shadow_addr
2146                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
2147                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
2148                 --iterator->level;
2149                 if (!iterator->shadow_addr)
2150                         iterator->level = 0;
2151         }
2152 }
2153
2154 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
2155 {
2156         if (iterator->level < PT_PAGE_TABLE_LEVEL)
2157                 return false;
2158
2159         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
2160         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
2161         return true;
2162 }
2163
2164 static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator,
2165                                u64 spte)
2166 {
2167         if (is_last_spte(spte, iterator->level)) {
2168                 iterator->level = 0;
2169                 return;
2170         }
2171
2172         iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK;
2173         --iterator->level;
2174 }
2175
2176 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
2177 {
2178         return __shadow_walk_next(iterator, *iterator->sptep);
2179 }
2180
2181 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp, bool accessed)
2182 {
2183         u64 spte;
2184
2185         BUILD_BUG_ON(VMX_EPT_READABLE_MASK != PT_PRESENT_MASK ||
2186                         VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK);
2187
2188         spte = __pa(sp->spt) | PT_PRESENT_MASK | PT_WRITABLE_MASK |
2189                shadow_user_mask | shadow_x_mask;
2190
2191         if (accessed)
2192                 spte |= shadow_accessed_mask;
2193
2194         mmu_spte_set(sptep, spte);
2195 }
2196
2197 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2198                                    unsigned direct_access)
2199 {
2200         if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
2201                 struct kvm_mmu_page *child;
2202
2203                 /*
2204                  * For the direct sp, if the guest pte's dirty bit
2205                  * changed form clean to dirty, it will corrupt the
2206                  * sp's access: allow writable in the read-only sp,
2207                  * so we should update the spte at this point to get
2208                  * a new sp with the correct access.
2209                  */
2210                 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
2211                 if (child->role.access == direct_access)
2212                         return;
2213
2214                 drop_parent_pte(child, sptep);
2215                 kvm_flush_remote_tlbs(vcpu->kvm);
2216         }
2217 }
2218
2219 static bool mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp,
2220                              u64 *spte)
2221 {
2222         u64 pte;
2223         struct kvm_mmu_page *child;
2224
2225         pte = *spte;
2226         if (is_shadow_present_pte(pte)) {
2227                 if (is_last_spte(pte, sp->role.level)) {
2228                         drop_spte(kvm, spte);
2229                         if (is_large_pte(pte))
2230                                 --kvm->stat.lpages;
2231                 } else {
2232                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2233                         drop_parent_pte(child, spte);
2234                 }
2235                 return true;
2236         }
2237
2238         if (is_mmio_spte(pte))
2239                 mmu_spte_clear_no_track(spte);
2240
2241         return false;
2242 }
2243
2244 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
2245                                          struct kvm_mmu_page *sp)
2246 {
2247         unsigned i;
2248
2249         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2250                 mmu_page_zap_pte(kvm, sp, sp->spt + i);
2251 }
2252
2253 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
2254 {
2255         mmu_page_remove_parent_pte(sp, parent_pte);
2256 }
2257
2258 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
2259 {
2260         u64 *sptep;
2261         struct rmap_iterator iter;
2262
2263         while ((sptep = rmap_get_first(sp->parent_ptes, &iter)))
2264                 drop_parent_pte(sp, sptep);
2265 }
2266
2267 static int mmu_zap_unsync_children(struct kvm *kvm,
2268                                    struct kvm_mmu_page *parent,
2269                                    struct list_head *invalid_list)
2270 {
2271         int i, zapped = 0;
2272         struct mmu_page_path parents;
2273         struct kvm_mmu_pages pages;
2274
2275         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
2276                 return 0;
2277
2278         kvm_mmu_pages_init(parent, &parents, &pages);
2279         while (mmu_unsync_walk(parent, &pages)) {
2280                 struct kvm_mmu_page *sp;
2281
2282                 for_each_sp(pages, sp, parents, i) {
2283                         kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
2284                         mmu_pages_clear_parents(&parents);
2285                         zapped++;
2286                 }
2287                 kvm_mmu_pages_init(parent, &parents, &pages);
2288         }
2289
2290         return zapped;
2291 }
2292
2293 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
2294                                     struct list_head *invalid_list)
2295 {
2296         int ret;
2297
2298         trace_kvm_mmu_prepare_zap_page(sp);
2299         ++kvm->stat.mmu_shadow_zapped;
2300         ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
2301         kvm_mmu_page_unlink_children(kvm, sp);
2302         kvm_mmu_unlink_parents(kvm, sp);
2303
2304         if (!sp->role.invalid && !sp->role.direct)
2305                 unaccount_shadowed(kvm, sp);
2306
2307         if (sp->unsync)
2308                 kvm_unlink_unsync_page(kvm, sp);
2309         if (!sp->root_count) {
2310                 /* Count self */
2311                 ret++;
2312                 list_move(&sp->link, invalid_list);
2313                 kvm_mod_used_mmu_pages(kvm, -1);
2314         } else {
2315                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2316
2317                 /*
2318                  * The obsolete pages can not be used on any vcpus.
2319                  * See the comments in kvm_mmu_invalidate_zap_all_pages().
2320                  */
2321                 if (!sp->role.invalid && !is_obsolete_sp(kvm, sp))
2322                         kvm_reload_remote_mmus(kvm);
2323         }
2324
2325         sp->role.invalid = 1;
2326         return ret;
2327 }
2328
2329 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
2330                                     struct list_head *invalid_list)
2331 {
2332         struct kvm_mmu_page *sp, *nsp;
2333
2334         if (list_empty(invalid_list))
2335                 return;
2336
2337         /*
2338          * wmb: make sure everyone sees our modifications to the page tables
2339          * rmb: make sure we see changes to vcpu->mode
2340          */
2341         smp_mb();
2342
2343         /*
2344          * Wait for all vcpus to exit guest mode and/or lockless shadow
2345          * page table walks.
2346          */
2347         kvm_flush_remote_tlbs(kvm);
2348
2349         list_for_each_entry_safe(sp, nsp, invalid_list, link) {
2350                 WARN_ON(!sp->role.invalid || sp->root_count);
2351                 kvm_mmu_free_page(sp);
2352         }
2353 }
2354
2355 static bool prepare_zap_oldest_mmu_page(struct kvm *kvm,
2356                                         struct list_head *invalid_list)
2357 {
2358         struct kvm_mmu_page *sp;
2359
2360         if (list_empty(&kvm->arch.active_mmu_pages))
2361                 return false;
2362
2363         sp = list_entry(kvm->arch.active_mmu_pages.prev,
2364                         struct kvm_mmu_page, link);
2365         kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
2366
2367         return true;
2368 }
2369
2370 /*
2371  * Changing the number of mmu pages allocated to the vm
2372  * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2373  */
2374 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int goal_nr_mmu_pages)
2375 {
2376         LIST_HEAD(invalid_list);
2377
2378         spin_lock(&kvm->mmu_lock);
2379
2380         if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
2381                 /* Need to free some mmu pages to achieve the goal. */
2382                 while (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages)
2383                         if (!prepare_zap_oldest_mmu_page(kvm, &invalid_list))
2384                                 break;
2385
2386                 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2387                 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
2388         }
2389
2390         kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
2391
2392         spin_unlock(&kvm->mmu_lock);
2393 }
2394
2395 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
2396 {
2397         struct kvm_mmu_page *sp;
2398         LIST_HEAD(invalid_list);
2399         int r;
2400
2401         pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
2402         r = 0;
2403         spin_lock(&kvm->mmu_lock);
2404         for_each_gfn_indirect_valid_sp(kvm, sp, gfn) {
2405                 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
2406                          sp->role.word);
2407                 r = 1;
2408                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
2409         }
2410         kvm_mmu_commit_zap_page(kvm, &invalid_list);
2411         spin_unlock(&kvm->mmu_lock);
2412
2413         return r;
2414 }
2415 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page);
2416
2417 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
2418 {
2419         trace_kvm_mmu_unsync_page(sp);
2420         ++vcpu->kvm->stat.mmu_unsync;
2421         sp->unsync = 1;
2422
2423         kvm_mmu_mark_parents_unsync(sp);
2424 }
2425
2426 static void kvm_unsync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
2427 {
2428         struct kvm_mmu_page *s;
2429
2430         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) {
2431                 if (s->unsync)
2432                         continue;
2433                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
2434                 __kvm_unsync_page(vcpu, s);
2435         }
2436 }
2437
2438 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
2439                                   bool can_unsync)
2440 {
2441         struct kvm_mmu_page *s;
2442         bool need_unsync = false;
2443
2444         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) {
2445                 if (!can_unsync)
2446                         return 1;
2447
2448                 if (s->role.level != PT_PAGE_TABLE_LEVEL)
2449                         return 1;
2450
2451                 if (!s->unsync)
2452                         need_unsync = true;
2453         }
2454         if (need_unsync)
2455                 kvm_unsync_pages(vcpu, gfn);
2456         return 0;
2457 }
2458
2459 static bool kvm_is_mmio_pfn(pfn_t pfn)
2460 {
2461         if (pfn_valid(pfn))
2462                 return !is_zero_pfn(pfn) && PageReserved(pfn_to_page(pfn));
2463
2464         return true;
2465 }
2466
2467 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2468                     unsigned pte_access, int level,
2469                     gfn_t gfn, pfn_t pfn, bool speculative,
2470                     bool can_unsync, bool host_writable)
2471 {
2472         u64 spte;
2473         int ret = 0;
2474
2475         if (set_mmio_spte(vcpu, sptep, gfn, pfn, pte_access))
2476                 return 0;
2477
2478         spte = PT_PRESENT_MASK;
2479         if (!speculative)
2480                 spte |= shadow_accessed_mask;
2481
2482         if (pte_access & ACC_EXEC_MASK)
2483                 spte |= shadow_x_mask;
2484         else
2485                 spte |= shadow_nx_mask;
2486
2487         if (pte_access & ACC_USER_MASK)
2488                 spte |= shadow_user_mask;
2489
2490         if (level > PT_PAGE_TABLE_LEVEL)
2491                 spte |= PT_PAGE_SIZE_MASK;
2492         if (tdp_enabled)
2493                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
2494                         kvm_is_mmio_pfn(pfn));
2495
2496         if (host_writable)
2497                 spte |= SPTE_HOST_WRITEABLE;
2498         else
2499                 pte_access &= ~ACC_WRITE_MASK;
2500
2501         spte |= (u64)pfn << PAGE_SHIFT;
2502
2503         if (pte_access & ACC_WRITE_MASK) {
2504
2505                 /*
2506                  * Other vcpu creates new sp in the window between
2507                  * mapping_level() and acquiring mmu-lock. We can
2508                  * allow guest to retry the access, the mapping can
2509                  * be fixed if guest refault.
2510                  */
2511                 if (level > PT_PAGE_TABLE_LEVEL &&
2512                     has_wrprotected_page(vcpu, gfn, level))
2513                         goto done;
2514
2515                 spte |= PT_WRITABLE_MASK | SPTE_MMU_WRITEABLE;
2516
2517                 /*
2518                  * Optimization: for pte sync, if spte was writable the hash
2519                  * lookup is unnecessary (and expensive). Write protection
2520                  * is responsibility of mmu_get_page / kvm_sync_page.
2521                  * Same reasoning can be applied to dirty page accounting.
2522                  */
2523                 if (!can_unsync && is_writable_pte(*sptep))
2524                         goto set_pte;
2525
2526                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
2527                         pgprintk("%s: found shadow page for %llx, marking ro\n",
2528                                  __func__, gfn);
2529                         ret = 1;
2530                         pte_access &= ~ACC_WRITE_MASK;
2531                         spte &= ~(PT_WRITABLE_MASK | SPTE_MMU_WRITEABLE);
2532                 }
2533         }
2534
2535         if (pte_access & ACC_WRITE_MASK) {
2536                 kvm_vcpu_mark_page_dirty(vcpu, gfn);
2537                 spte |= shadow_dirty_mask;
2538         }
2539
2540 set_pte:
2541         if (mmu_spte_update(sptep, spte))
2542                 kvm_flush_remote_tlbs(vcpu->kvm);
2543 done:
2544         return ret;
2545 }
2546
2547 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2548                          unsigned pte_access, int write_fault, int *emulate,
2549                          int level, gfn_t gfn, pfn_t pfn, bool speculative,
2550                          bool host_writable)
2551 {
2552         int was_rmapped = 0;
2553         int rmap_count;
2554
2555         pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__,
2556                  *sptep, write_fault, gfn);
2557
2558         if (is_rmap_spte(*sptep)) {
2559                 /*
2560                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2561                  * the parent of the now unreachable PTE.
2562                  */
2563                 if (level > PT_PAGE_TABLE_LEVEL &&
2564                     !is_large_pte(*sptep)) {
2565                         struct kvm_mmu_page *child;
2566                         u64 pte = *sptep;
2567
2568                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2569                         drop_parent_pte(child, sptep);
2570                         kvm_flush_remote_tlbs(vcpu->kvm);
2571                 } else if (pfn != spte_to_pfn(*sptep)) {
2572                         pgprintk("hfn old %llx new %llx\n",
2573                                  spte_to_pfn(*sptep), pfn);
2574                         drop_spte(vcpu->kvm, sptep);
2575                         kvm_flush_remote_tlbs(vcpu->kvm);
2576                 } else
2577                         was_rmapped = 1;
2578         }
2579
2580         if (set_spte(vcpu, sptep, pte_access, level, gfn, pfn, speculative,
2581               true, host_writable)) {
2582                 if (write_fault)
2583                         *emulate = 1;
2584                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2585         }
2586
2587         if (unlikely(is_mmio_spte(*sptep) && emulate))
2588                 *emulate = 1;
2589
2590         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2591         pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2592                  is_large_pte(*sptep)? "2MB" : "4kB",
2593                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2594                  *sptep, sptep);
2595         if (!was_rmapped && is_large_pte(*sptep))
2596                 ++vcpu->kvm->stat.lpages;
2597
2598         if (is_shadow_present_pte(*sptep)) {
2599                 if (!was_rmapped) {
2600                         rmap_count = rmap_add(vcpu, sptep, gfn);
2601                         if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2602                                 rmap_recycle(vcpu, sptep, gfn);
2603                 }
2604         }
2605
2606         kvm_release_pfn_clean(pfn);
2607 }
2608
2609 static pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn,
2610                                      bool no_dirty_log)
2611 {
2612         struct kvm_memory_slot *slot;
2613
2614         slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, no_dirty_log);
2615         if (!slot)
2616                 return KVM_PFN_ERR_FAULT;
2617
2618         return gfn_to_pfn_memslot_atomic(slot, gfn);
2619 }
2620
2621 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2622                                     struct kvm_mmu_page *sp,
2623                                     u64 *start, u64 *end)
2624 {
2625         struct page *pages[PTE_PREFETCH_NUM];
2626         struct kvm_memory_slot *slot;
2627         unsigned access = sp->role.access;
2628         int i, ret;
2629         gfn_t gfn;
2630
2631         gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt);
2632         slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK);
2633         if (!slot)
2634                 return -1;
2635
2636         ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start);
2637         if (ret <= 0)
2638                 return -1;
2639
2640         for (i = 0; i < ret; i++, gfn++, start++)
2641                 mmu_set_spte(vcpu, start, access, 0, NULL,
2642                              sp->role.level, gfn, page_to_pfn(pages[i]),
2643                              true, true);
2644
2645         return 0;
2646 }
2647
2648 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2649                                   struct kvm_mmu_page *sp, u64 *sptep)
2650 {
2651         u64 *spte, *start = NULL;
2652         int i;
2653
2654         WARN_ON(!sp->role.direct);
2655
2656         i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1);
2657         spte = sp->spt + i;
2658
2659         for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2660                 if (is_shadow_present_pte(*spte) || spte == sptep) {
2661                         if (!start)
2662                                 continue;
2663                         if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2664                                 break;
2665                         start = NULL;
2666                 } else if (!start)
2667                         start = spte;
2668         }
2669 }
2670
2671 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2672 {
2673         struct kvm_mmu_page *sp;
2674
2675         /*
2676          * Since it's no accessed bit on EPT, it's no way to
2677          * distinguish between actually accessed translations
2678          * and prefetched, so disable pte prefetch if EPT is
2679          * enabled.
2680          */
2681         if (!shadow_accessed_mask)
2682                 return;
2683
2684         sp = page_header(__pa(sptep));
2685         if (sp->role.level > PT_PAGE_TABLE_LEVEL)
2686                 return;
2687
2688         __direct_pte_prefetch(vcpu, sp, sptep);
2689 }
2690
2691 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2692                         int map_writable, int level, gfn_t gfn, pfn_t pfn,
2693                         bool prefault)
2694 {
2695         struct kvm_shadow_walk_iterator iterator;
2696         struct kvm_mmu_page *sp;
2697         int emulate = 0;
2698         gfn_t pseudo_gfn;
2699
2700         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2701                 return 0;
2702
2703         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2704                 if (iterator.level == level) {
2705                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL,
2706                                      write, &emulate, level, gfn, pfn,
2707                                      prefault, map_writable);
2708                         direct_pte_prefetch(vcpu, iterator.sptep);
2709                         ++vcpu->stat.pf_fixed;
2710                         break;
2711                 }
2712
2713                 drop_large_spte(vcpu, iterator.sptep);
2714                 if (!is_shadow_present_pte(*iterator.sptep)) {
2715                         u64 base_addr = iterator.addr;
2716
2717                         base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2718                         pseudo_gfn = base_addr >> PAGE_SHIFT;
2719                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2720                                               iterator.level - 1,
2721                                               1, ACC_ALL, iterator.sptep);
2722
2723                         link_shadow_page(iterator.sptep, sp, true);
2724                 }
2725         }
2726         return emulate;
2727 }
2728
2729 static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk)
2730 {
2731         siginfo_t info;
2732
2733         info.si_signo   = SIGBUS;
2734         info.si_errno   = 0;
2735         info.si_code    = BUS_MCEERR_AR;
2736         info.si_addr    = (void __user *)address;
2737         info.si_addr_lsb = PAGE_SHIFT;
2738
2739         send_sig_info(SIGBUS, &info, tsk);
2740 }
2741
2742 static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, pfn_t pfn)
2743 {
2744         /*
2745          * Do not cache the mmio info caused by writing the readonly gfn
2746          * into the spte otherwise read access on readonly gfn also can
2747          * caused mmio page fault and treat it as mmio access.
2748          * Return 1 to tell kvm to emulate it.
2749          */
2750         if (pfn == KVM_PFN_ERR_RO_FAULT)
2751                 return 1;
2752
2753         if (pfn == KVM_PFN_ERR_HWPOISON) {
2754                 kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current);
2755                 return 0;
2756         }
2757
2758         return -EFAULT;
2759 }
2760
2761 static void transparent_hugepage_adjust(struct kvm_vcpu *vcpu,
2762                                         gfn_t *gfnp, pfn_t *pfnp, int *levelp)
2763 {
2764         pfn_t pfn = *pfnp;
2765         gfn_t gfn = *gfnp;
2766         int level = *levelp;
2767
2768         /*
2769          * Check if it's a transparent hugepage. If this would be an
2770          * hugetlbfs page, level wouldn't be set to
2771          * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2772          * here.
2773          */
2774         if (!is_error_noslot_pfn(pfn) && !kvm_is_reserved_pfn(pfn) &&
2775             level == PT_PAGE_TABLE_LEVEL &&
2776             PageTransCompound(pfn_to_page(pfn)) &&
2777             !has_wrprotected_page(vcpu, gfn, PT_DIRECTORY_LEVEL)) {
2778                 unsigned long mask;
2779                 /*
2780                  * mmu_notifier_retry was successful and we hold the
2781                  * mmu_lock here, so the pmd can't become splitting
2782                  * from under us, and in turn
2783                  * __split_huge_page_refcount() can't run from under
2784                  * us and we can safely transfer the refcount from
2785                  * PG_tail to PG_head as we switch the pfn to tail to
2786                  * head.
2787                  */
2788                 *levelp = level = PT_DIRECTORY_LEVEL;
2789                 mask = KVM_PAGES_PER_HPAGE(level) - 1;
2790                 VM_BUG_ON((gfn & mask) != (pfn & mask));
2791                 if (pfn & mask) {
2792                         gfn &= ~mask;
2793                         *gfnp = gfn;
2794                         kvm_release_pfn_clean(pfn);
2795                         pfn &= ~mask;
2796                         kvm_get_pfn(pfn);
2797                         *pfnp = pfn;
2798                 }
2799         }
2800 }
2801
2802 static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn,
2803                                 pfn_t pfn, unsigned access, int *ret_val)
2804 {
2805         bool ret = true;
2806
2807         /* The pfn is invalid, report the error! */
2808         if (unlikely(is_error_pfn(pfn))) {
2809                 *ret_val = kvm_handle_bad_page(vcpu, gfn, pfn);
2810                 goto exit;
2811         }
2812
2813         if (unlikely(is_noslot_pfn(pfn)))
2814                 vcpu_cache_mmio_info(vcpu, gva, gfn, access);
2815
2816         ret = false;
2817 exit:
2818         return ret;
2819 }
2820
2821 static bool page_fault_can_be_fast(u32 error_code)
2822 {
2823         /*
2824          * Do not fix the mmio spte with invalid generation number which
2825          * need to be updated by slow page fault path.
2826          */
2827         if (unlikely(error_code & PFERR_RSVD_MASK))
2828                 return false;
2829
2830         /*
2831          * #PF can be fast only if the shadow page table is present and it
2832          * is caused by write-protect, that means we just need change the
2833          * W bit of the spte which can be done out of mmu-lock.
2834          */
2835         if (!(error_code & PFERR_PRESENT_MASK) ||
2836               !(error_code & PFERR_WRITE_MASK))
2837                 return false;
2838
2839         return true;
2840 }
2841
2842 static bool
2843 fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
2844                         u64 *sptep, u64 spte)
2845 {
2846         gfn_t gfn;
2847
2848         WARN_ON(!sp->role.direct);
2849
2850         /*
2851          * The gfn of direct spte is stable since it is calculated
2852          * by sp->gfn.
2853          */
2854         gfn = kvm_mmu_page_get_gfn(sp, sptep - sp->spt);
2855
2856         /*
2857          * Theoretically we could also set dirty bit (and flush TLB) here in
2858          * order to eliminate unnecessary PML logging. See comments in
2859          * set_spte. But fast_page_fault is very unlikely to happen with PML
2860          * enabled, so we do not do this. This might result in the same GPA
2861          * to be logged in PML buffer again when the write really happens, and
2862          * eventually to be called by mark_page_dirty twice. But it's also no
2863          * harm. This also avoids the TLB flush needed after setting dirty bit
2864          * so non-PML cases won't be impacted.
2865          *
2866          * Compare with set_spte where instead shadow_dirty_mask is set.
2867          */
2868         if (cmpxchg64(sptep, spte, spte | PT_WRITABLE_MASK) == spte)
2869                 kvm_vcpu_mark_page_dirty(vcpu, gfn);
2870
2871         return true;
2872 }
2873
2874 /*
2875  * Return value:
2876  * - true: let the vcpu to access on the same address again.
2877  * - false: let the real page fault path to fix it.
2878  */
2879 static bool fast_page_fault(struct kvm_vcpu *vcpu, gva_t gva, int level,
2880                             u32 error_code)
2881 {
2882         struct kvm_shadow_walk_iterator iterator;
2883         struct kvm_mmu_page *sp;
2884         bool ret = false;
2885         u64 spte = 0ull;
2886
2887         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2888                 return false;
2889
2890         if (!page_fault_can_be_fast(error_code))
2891                 return false;
2892
2893         walk_shadow_page_lockless_begin(vcpu);
2894         for_each_shadow_entry_lockless(vcpu, gva, iterator, spte)
2895                 if (!is_shadow_present_pte(spte) || iterator.level < level)
2896                         break;
2897
2898         /*
2899          * If the mapping has been changed, let the vcpu fault on the
2900          * same address again.
2901          */
2902         if (!is_rmap_spte(spte)) {
2903                 ret = true;
2904                 goto exit;
2905         }
2906
2907         sp = page_header(__pa(iterator.sptep));
2908         if (!is_last_spte(spte, sp->role.level))
2909                 goto exit;
2910
2911         /*
2912          * Check if it is a spurious fault caused by TLB lazily flushed.
2913          *
2914          * Need not check the access of upper level table entries since
2915          * they are always ACC_ALL.
2916          */
2917          if (is_writable_pte(spte)) {
2918                 ret = true;
2919                 goto exit;
2920         }
2921
2922         /*
2923          * Currently, to simplify the code, only the spte write-protected
2924          * by dirty-log can be fast fixed.
2925          */
2926         if (!spte_is_locklessly_modifiable(spte))
2927                 goto exit;
2928
2929         /*
2930          * Do not fix write-permission on the large spte since we only dirty
2931          * the first page into the dirty-bitmap in fast_pf_fix_direct_spte()
2932          * that means other pages are missed if its slot is dirty-logged.
2933          *
2934          * Instead, we let the slow page fault path create a normal spte to
2935          * fix the access.
2936          *
2937          * See the comments in kvm_arch_commit_memory_region().
2938          */
2939         if (sp->role.level > PT_PAGE_TABLE_LEVEL)
2940                 goto exit;
2941
2942         /*
2943          * Currently, fast page fault only works for direct mapping since
2944          * the gfn is not stable for indirect shadow page.
2945          * See Documentation/virtual/kvm/locking.txt to get more detail.
2946          */
2947         ret = fast_pf_fix_direct_spte(vcpu, sp, iterator.sptep, spte);
2948 exit:
2949         trace_fast_page_fault(vcpu, gva, error_code, iterator.sptep,
2950                               spte, ret);
2951         walk_shadow_page_lockless_end(vcpu);
2952
2953         return ret;
2954 }
2955
2956 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
2957                          gva_t gva, pfn_t *pfn, bool write, bool *writable);
2958 static void make_mmu_pages_available(struct kvm_vcpu *vcpu);
2959
2960 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, u32 error_code,
2961                          gfn_t gfn, bool prefault)
2962 {
2963         int r;
2964         int level;
2965         int force_pt_level;
2966         pfn_t pfn;
2967         unsigned long mmu_seq;
2968         bool map_writable, write = error_code & PFERR_WRITE_MASK;
2969
2970         force_pt_level = mapping_level_dirty_bitmap(vcpu, gfn);
2971         if (likely(!force_pt_level)) {
2972                 level = mapping_level(vcpu, gfn);
2973                 /*
2974                  * This path builds a PAE pagetable - so we can map
2975                  * 2mb pages at maximum. Therefore check if the level
2976                  * is larger than that.
2977                  */
2978                 if (level > PT_DIRECTORY_LEVEL)
2979                         level = PT_DIRECTORY_LEVEL;
2980
2981                 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2982         } else
2983                 level = PT_PAGE_TABLE_LEVEL;
2984
2985         if (fast_page_fault(vcpu, v, level, error_code))
2986                 return 0;
2987
2988         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2989         smp_rmb();
2990
2991         if (try_async_pf(vcpu, prefault, gfn, v, &pfn, write, &map_writable))
2992                 return 0;
2993
2994         if (handle_abnormal_pfn(vcpu, v, gfn, pfn, ACC_ALL, &r))
2995                 return r;
2996
2997         spin_lock(&vcpu->kvm->mmu_lock);
2998         if (mmu_notifier_retry(vcpu->kvm, mmu_seq))
2999                 goto out_unlock;
3000         make_mmu_pages_available(vcpu);
3001         if (likely(!force_pt_level))
3002                 transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level);
3003         r = __direct_map(vcpu, v, write, map_writable, level, gfn, pfn,
3004                          prefault);
3005         spin_unlock(&vcpu->kvm->mmu_lock);
3006
3007
3008         return r;
3009
3010 out_unlock:
3011         spin_unlock(&vcpu->kvm->mmu_lock);
3012         kvm_release_pfn_clean(pfn);
3013         return 0;
3014 }
3015
3016
3017 static void mmu_free_roots(struct kvm_vcpu *vcpu)
3018 {
3019         int i;
3020         struct kvm_mmu_page *sp;
3021         LIST_HEAD(invalid_list);
3022
3023         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3024                 return;
3025
3026         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL &&
3027             (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL ||
3028              vcpu->arch.mmu.direct_map)) {
3029                 hpa_t root = vcpu->arch.mmu.root_hpa;
3030
3031                 spin_lock(&vcpu->kvm->mmu_lock);
3032                 sp = page_header(root);
3033                 --sp->root_count;
3034                 if (!sp->root_count && sp->role.invalid) {
3035                         kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
3036                         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3037                 }
3038                 spin_unlock(&vcpu->kvm->mmu_lock);
3039                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
3040                 return;
3041         }
3042
3043         spin_lock(&vcpu->kvm->mmu_lock);
3044         for (i = 0; i < 4; ++i) {
3045                 hpa_t root = vcpu->arch.mmu.pae_root[i];
3046
3047                 if (root) {
3048                         root &= PT64_BASE_ADDR_MASK;
3049                         sp = page_header(root);
3050                         --sp->root_count;
3051                         if (!sp->root_count && sp->role.invalid)
3052                                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
3053                                                          &invalid_list);
3054                 }
3055                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3056         }
3057         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3058         spin_unlock(&vcpu->kvm->mmu_lock);
3059         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
3060 }
3061
3062 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
3063 {
3064         int ret = 0;
3065
3066         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
3067                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3068                 ret = 1;
3069         }
3070
3071         return ret;
3072 }
3073
3074 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
3075 {
3076         struct kvm_mmu_page *sp;
3077         unsigned i;
3078
3079         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3080                 spin_lock(&vcpu->kvm->mmu_lock);
3081                 make_mmu_pages_available(vcpu);
3082                 sp = kvm_mmu_get_page(vcpu, 0, 0, PT64_ROOT_LEVEL,
3083                                       1, ACC_ALL, NULL);
3084                 ++sp->root_count;
3085                 spin_unlock(&vcpu->kvm->mmu_lock);
3086                 vcpu->arch.mmu.root_hpa = __pa(sp->spt);
3087         } else if (vcpu->arch.mmu.shadow_root_level == PT32E_ROOT_LEVEL) {
3088                 for (i = 0; i < 4; ++i) {
3089                         hpa_t root = vcpu->arch.mmu.pae_root[i];
3090
3091                         MMU_WARN_ON(VALID_PAGE(root));
3092                         spin_lock(&vcpu->kvm->mmu_lock);
3093                         make_mmu_pages_available(vcpu);
3094                         sp = kvm_mmu_get_page(vcpu, i << (30 - PAGE_SHIFT),
3095                                               i << 30,
3096                                               PT32_ROOT_LEVEL, 1, ACC_ALL,
3097                                               NULL);
3098                         root = __pa(sp->spt);
3099                         ++sp->root_count;
3100                         spin_unlock(&vcpu->kvm->mmu_lock);
3101                         vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
3102                 }
3103                 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
3104         } else
3105                 BUG();
3106
3107         return 0;
3108 }
3109
3110 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
3111 {
3112         struct kvm_mmu_page *sp;
3113         u64 pdptr, pm_mask;
3114         gfn_t root_gfn;
3115         int i;
3116
3117         root_gfn = vcpu->arch.mmu.get_cr3(vcpu) >> PAGE_SHIFT;
3118
3119         if (mmu_check_root(vcpu, root_gfn))
3120                 return 1;
3121
3122         /*
3123          * Do we shadow a long mode page table? If so we need to
3124          * write-protect the guests page table root.
3125          */
3126         if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
3127                 hpa_t root = vcpu->arch.mmu.root_hpa;
3128
3129                 MMU_WARN_ON(VALID_PAGE(root));
3130
3131                 spin_lock(&vcpu->kvm->mmu_lock);
3132                 make_mmu_pages_available(vcpu);
3133                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0, PT64_ROOT_LEVEL,
3134                                       0, ACC_ALL, NULL);
3135                 root = __pa(sp->spt);
3136                 ++sp->root_count;
3137                 spin_unlock(&vcpu->kvm->mmu_lock);
3138                 vcpu->arch.mmu.root_hpa = root;
3139                 return 0;
3140         }
3141
3142         /*
3143          * We shadow a 32 bit page table. This may be a legacy 2-level
3144          * or a PAE 3-level page table. In either case we need to be aware that
3145          * the shadow page table may be a PAE or a long mode page table.
3146          */
3147         pm_mask = PT_PRESENT_MASK;
3148         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL)
3149                 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
3150
3151         for (i = 0; i < 4; ++i) {
3152                 hpa_t root = vcpu->arch.mmu.pae_root[i];
3153
3154                 MMU_WARN_ON(VALID_PAGE(root));
3155                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
3156                         pdptr = vcpu->arch.mmu.get_pdptr(vcpu, i);
3157                         if (!is_present_gpte(pdptr)) {
3158                                 vcpu->arch.mmu.pae_root[i] = 0;
3159                                 continue;
3160                         }
3161                         root_gfn = pdptr >> PAGE_SHIFT;
3162                         if (mmu_check_root(vcpu, root_gfn))
3163                                 return 1;
3164                 }
3165                 spin_lock(&vcpu->kvm->mmu_lock);
3166                 make_mmu_pages_available(vcpu);
3167                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
3168                                       PT32_ROOT_LEVEL, 0,
3169                                       ACC_ALL, NULL);
3170                 root = __pa(sp->spt);
3171                 ++sp->root_count;
3172                 spin_unlock(&vcpu->kvm->mmu_lock);
3173
3174                 vcpu->arch.mmu.pae_root[i] = root | pm_mask;
3175         }
3176         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
3177
3178         /*
3179          * If we shadow a 32 bit page table with a long mode page
3180          * table we enter this path.
3181          */
3182         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3183                 if (vcpu->arch.mmu.lm_root == NULL) {
3184                         /*
3185                          * The additional page necessary for this is only
3186                          * allocated on demand.
3187                          */
3188
3189                         u64 *lm_root;
3190
3191                         lm_root = (void*)get_zeroed_page(GFP_KERNEL);
3192                         if (lm_root == NULL)
3193                                 return 1;
3194
3195                         lm_root[0] = __pa(vcpu->arch.mmu.pae_root) | pm_mask;
3196
3197                         vcpu->arch.mmu.lm_root = lm_root;
3198                 }
3199
3200                 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.lm_root);
3201         }
3202
3203         return 0;
3204 }
3205
3206 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
3207 {
3208         if (vcpu->arch.mmu.direct_map)
3209                 return mmu_alloc_direct_roots(vcpu);
3210         else
3211                 return mmu_alloc_shadow_roots(vcpu);
3212 }
3213
3214 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
3215 {
3216         int i;
3217         struct kvm_mmu_page *sp;
3218
3219         if (vcpu->arch.mmu.direct_map)
3220                 return;
3221
3222         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3223                 return;
3224
3225         vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
3226         kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC);
3227         if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
3228                 hpa_t root = vcpu->arch.mmu.root_hpa;
3229                 sp = page_header(root);
3230                 mmu_sync_children(vcpu, sp);
3231                 kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
3232                 return;
3233         }
3234         for (i = 0; i < 4; ++i) {
3235                 hpa_t root = vcpu->arch.mmu.pae_root[i];
3236
3237                 if (root && VALID_PAGE(root)) {
3238                         root &= PT64_BASE_ADDR_MASK;
3239                         sp = page_header(root);
3240                         mmu_sync_children(vcpu, sp);
3241                 }
3242         }
3243         kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
3244 }
3245
3246 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
3247 {
3248         spin_lock(&vcpu->kvm->mmu_lock);
3249         mmu_sync_roots(vcpu);
3250         spin_unlock(&vcpu->kvm->mmu_lock);
3251 }
3252 EXPORT_SYMBOL_GPL(kvm_mmu_sync_roots);
3253
3254 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
3255                                   u32 access, struct x86_exception *exception)
3256 {
3257         if (exception)
3258                 exception->error_code = 0;
3259         return vaddr;
3260 }
3261
3262 static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gva_t vaddr,
3263                                          u32 access,
3264                                          struct x86_exception *exception)
3265 {
3266         if (exception)
3267                 exception->error_code = 0;
3268         return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access, exception);
3269 }
3270
3271 static bool
3272 __is_rsvd_bits_set(struct rsvd_bits_validate *rsvd_check, u64 pte, int level)
3273 {
3274         int bit7 = (pte >> 7) & 1, low6 = pte & 0x3f;
3275
3276         return (pte & rsvd_check->rsvd_bits_mask[bit7][level-1]) |
3277                 ((rsvd_check->bad_mt_xwr & (1ull << low6)) != 0);
3278 }
3279
3280 static bool is_rsvd_bits_set(struct kvm_mmu *mmu, u64 gpte, int level)
3281 {
3282         return __is_rsvd_bits_set(&mmu->guest_rsvd_check, gpte, level);
3283 }
3284
3285 static bool is_shadow_zero_bits_set(struct kvm_mmu *mmu, u64 spte, int level)
3286 {
3287         return __is_rsvd_bits_set(&mmu->shadow_zero_check, spte, level);
3288 }
3289
3290 static bool quickly_check_mmio_pf(struct kvm_vcpu *vcpu, u64 addr, bool direct)
3291 {
3292         if (direct)
3293                 return vcpu_match_mmio_gpa(vcpu, addr);
3294
3295         return vcpu_match_mmio_gva(vcpu, addr);
3296 }
3297
3298 /* return true if reserved bit is detected on spte. */
3299 static bool
3300 walk_shadow_page_get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep)
3301 {
3302         struct kvm_shadow_walk_iterator iterator;
3303         u64 sptes[PT64_ROOT_LEVEL], spte = 0ull;
3304         int root, leaf;
3305         bool reserved = false;
3306
3307         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3308                 goto exit;
3309
3310         walk_shadow_page_lockless_begin(vcpu);
3311
3312         for (shadow_walk_init(&iterator, vcpu, addr),
3313                  leaf = root = iterator.level;
3314              shadow_walk_okay(&iterator);
3315              __shadow_walk_next(&iterator, spte)) {
3316                 spte = mmu_spte_get_lockless(iterator.sptep);
3317
3318                 sptes[leaf - 1] = spte;
3319                 leaf--;
3320
3321                 if (!is_shadow_present_pte(spte))
3322                         break;
3323
3324                 reserved |= is_shadow_zero_bits_set(&vcpu->arch.mmu, spte,
3325                                                     leaf);
3326         }
3327
3328         walk_shadow_page_lockless_end(vcpu);
3329
3330         if (reserved) {
3331                 pr_err("%s: detect reserved bits on spte, addr 0x%llx, dump hierarchy:\n",
3332                        __func__, addr);
3333                 while (root > leaf) {
3334                         pr_err("------ spte 0x%llx level %d.\n",
3335                                sptes[root - 1], root);
3336                         root--;
3337                 }
3338         }
3339 exit:
3340         *sptep = spte;
3341         return reserved;
3342 }
3343
3344 int handle_mmio_page_fault_common(struct kvm_vcpu *vcpu, u64 addr, bool direct)
3345 {
3346         u64 spte;
3347         bool reserved;
3348
3349         if (quickly_check_mmio_pf(vcpu, addr, direct))
3350                 return RET_MMIO_PF_EMULATE;
3351
3352         reserved = walk_shadow_page_get_mmio_spte(vcpu, addr, &spte);
3353         if (unlikely(reserved))
3354                 return RET_MMIO_PF_BUG;
3355
3356         if (is_mmio_spte(spte)) {
3357                 gfn_t gfn = get_mmio_spte_gfn(spte);
3358                 unsigned access = get_mmio_spte_access(spte);
3359
3360                 if (!check_mmio_spte(vcpu, spte))
3361                         return RET_MMIO_PF_INVALID;
3362
3363                 if (direct)
3364                         addr = 0;
3365
3366                 trace_handle_mmio_page_fault(addr, gfn, access);
3367                 vcpu_cache_mmio_info(vcpu, addr, gfn, access);
3368                 return RET_MMIO_PF_EMULATE;
3369         }
3370
3371         /*
3372          * If the page table is zapped by other cpus, let CPU fault again on
3373          * the address.
3374          */
3375         return RET_MMIO_PF_RETRY;
3376 }
3377 EXPORT_SYMBOL_GPL(handle_mmio_page_fault_common);
3378
3379 static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr,
3380                                   u32 error_code, bool direct)
3381 {
3382         int ret;
3383
3384         ret = handle_mmio_page_fault_common(vcpu, addr, direct);
3385         WARN_ON(ret == RET_MMIO_PF_BUG);
3386         return ret;
3387 }
3388
3389 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3390                                 u32 error_code, bool prefault)
3391 {
3392         gfn_t gfn;
3393         int r;
3394
3395         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
3396
3397         if (unlikely(error_code & PFERR_RSVD_MASK)) {
3398                 r = handle_mmio_page_fault(vcpu, gva, error_code, true);
3399
3400                 if (likely(r != RET_MMIO_PF_INVALID))
3401                         return r;
3402         }
3403
3404         r = mmu_topup_memory_caches(vcpu);
3405         if (r)
3406                 return r;
3407
3408         MMU_WARN_ON(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3409
3410         gfn = gva >> PAGE_SHIFT;
3411
3412         return nonpaging_map(vcpu, gva & PAGE_MASK,
3413                              error_code, gfn, prefault);
3414 }
3415
3416 static int kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn)
3417 {
3418         struct kvm_arch_async_pf arch;
3419
3420         arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id;
3421         arch.gfn = gfn;
3422         arch.direct_map = vcpu->arch.mmu.direct_map;
3423         arch.cr3 = vcpu->arch.mmu.get_cr3(vcpu);
3424
3425         return kvm_setup_async_pf(vcpu, gva, kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch);
3426 }
3427
3428 static bool can_do_async_pf(struct kvm_vcpu *vcpu)
3429 {
3430         if (unlikely(!irqchip_in_kernel(vcpu->kvm) ||
3431                      kvm_event_needs_reinjection(vcpu)))
3432                 return false;
3433
3434         return kvm_x86_ops->interrupt_allowed(vcpu);
3435 }
3436
3437 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
3438                          gva_t gva, pfn_t *pfn, bool write, bool *writable)
3439 {
3440         struct kvm_memory_slot *slot;
3441         bool async;
3442
3443         slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
3444         async = false;
3445         *pfn = __gfn_to_pfn_memslot(slot, gfn, false, &async, write, writable);
3446         if (!async)
3447                 return false; /* *pfn has correct page already */
3448
3449         if (!prefault && can_do_async_pf(vcpu)) {
3450                 trace_kvm_try_async_get_page(gva, gfn);
3451                 if (kvm_find_async_pf_gfn(vcpu, gfn)) {
3452                         trace_kvm_async_pf_doublefault(gva, gfn);
3453                         kvm_make_request(KVM_REQ_APF_HALT, vcpu);
3454                         return true;
3455                 } else if (kvm_arch_setup_async_pf(vcpu, gva, gfn))
3456                         return true;
3457         }
3458
3459         *pfn = __gfn_to_pfn_memslot(slot, gfn, false, NULL, write, writable);
3460         return false;
3461 }
3462
3463 static bool
3464 check_hugepage_cache_consistency(struct kvm_vcpu *vcpu, gfn_t gfn, int level)
3465 {
3466         int page_num = KVM_PAGES_PER_HPAGE(level);
3467
3468         gfn &= ~(page_num - 1);
3469
3470         return kvm_mtrr_check_gfn_range_consistency(vcpu, gfn, page_num);
3471 }
3472
3473 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, u32 error_code,
3474                           bool prefault)
3475 {
3476         pfn_t pfn;
3477         int r;
3478         int level;
3479         int force_pt_level;
3480         gfn_t gfn = gpa >> PAGE_SHIFT;
3481         unsigned long mmu_seq;
3482         int write = error_code & PFERR_WRITE_MASK;
3483         bool map_writable;
3484
3485         MMU_WARN_ON(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3486
3487         if (unlikely(error_code & PFERR_RSVD_MASK)) {
3488                 r = handle_mmio_page_fault(vcpu, gpa, error_code, true);
3489
3490                 if (likely(r != RET_MMIO_PF_INVALID))
3491                         return r;
3492         }
3493
3494         r = mmu_topup_memory_caches(vcpu);
3495         if (r)
3496                 return r;
3497
3498         if (mapping_level_dirty_bitmap(vcpu, gfn) ||
3499             !check_hugepage_cache_consistency(vcpu, gfn, PT_DIRECTORY_LEVEL))
3500                 force_pt_level = 1;
3501         else
3502                 force_pt_level = 0;
3503
3504         if (likely(!force_pt_level)) {
3505                 level = mapping_level(vcpu, gfn);
3506                 if (level > PT_DIRECTORY_LEVEL &&
3507                     !check_hugepage_cache_consistency(vcpu, gfn, level))
3508                         level = PT_DIRECTORY_LEVEL;
3509                 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
3510         } else
3511                 level = PT_PAGE_TABLE_LEVEL;
3512
3513         if (fast_page_fault(vcpu, gpa, level, error_code))
3514                 return 0;
3515
3516         mmu_seq = vcpu->kvm->mmu_notifier_seq;
3517         smp_rmb();
3518
3519         if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, write, &map_writable))
3520                 return 0;
3521
3522         if (handle_abnormal_pfn(vcpu, 0, gfn, pfn, ACC_ALL, &r))
3523                 return r;
3524
3525         spin_lock(&vcpu->kvm->mmu_lock);
3526         if (mmu_notifier_retry(vcpu->kvm, mmu_seq))
3527                 goto out_unlock;
3528         make_mmu_pages_available(vcpu);
3529         if (likely(!force_pt_level))
3530                 transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level);
3531         r = __direct_map(vcpu, gpa, write, map_writable,
3532                          level, gfn, pfn, prefault);
3533         spin_unlock(&vcpu->kvm->mmu_lock);
3534
3535         return r;
3536
3537 out_unlock:
3538         spin_unlock(&vcpu->kvm->mmu_lock);
3539         kvm_release_pfn_clean(pfn);
3540         return 0;
3541 }
3542
3543 static void nonpaging_init_context(struct kvm_vcpu *vcpu,
3544                                    struct kvm_mmu *context)
3545 {
3546         context->page_fault = nonpaging_page_fault;
3547         context->gva_to_gpa = nonpaging_gva_to_gpa;
3548         context->sync_page = nonpaging_sync_page;
3549         context->invlpg = nonpaging_invlpg;
3550         context->update_pte = nonpaging_update_pte;
3551         context->root_level = 0;
3552         context->shadow_root_level = PT32E_ROOT_LEVEL;
3553         context->root_hpa = INVALID_PAGE;
3554         context->direct_map = true;
3555         context->nx = false;
3556 }
3557
3558 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu)
3559 {
3560         mmu_free_roots(vcpu);
3561 }
3562
3563 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
3564 {
3565         return kvm_read_cr3(vcpu);
3566 }
3567
3568 static void inject_page_fault(struct kvm_vcpu *vcpu,
3569                               struct x86_exception *fault)
3570 {
3571         vcpu->arch.mmu.inject_page_fault(vcpu, fault);
3572 }
3573
3574 static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn,
3575                            unsigned access, int *nr_present)
3576 {
3577         if (unlikely(is_mmio_spte(*sptep))) {
3578                 if (gfn != get_mmio_spte_gfn(*sptep)) {
3579                         mmu_spte_clear_no_track(sptep);
3580                         return true;
3581                 }
3582
3583                 (*nr_present)++;
3584                 mark_mmio_spte(vcpu, sptep, gfn, access);
3585                 return true;
3586         }
3587
3588         return false;
3589 }
3590
3591 static inline bool is_last_gpte(struct kvm_mmu *mmu, unsigned level, unsigned gpte)
3592 {
3593         unsigned index;
3594
3595         index = level - 1;
3596         index |= (gpte & PT_PAGE_SIZE_MASK) >> (PT_PAGE_SIZE_SHIFT - 2);
3597         return mmu->last_pte_bitmap & (1 << index);
3598 }
3599
3600 #define PTTYPE_EPT 18 /* arbitrary */
3601 #define PTTYPE PTTYPE_EPT
3602 #include "paging_tmpl.h"
3603 #undef PTTYPE
3604
3605 #define PTTYPE 64
3606 #include "paging_tmpl.h"
3607 #undef PTTYPE
3608
3609 #define PTTYPE 32
3610 #include "paging_tmpl.h"
3611 #undef PTTYPE
3612
3613 static void
3614 __reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
3615                         struct rsvd_bits_validate *rsvd_check,
3616                         int maxphyaddr, int level, bool nx, bool gbpages,
3617                         bool pse)
3618 {
3619         u64 exb_bit_rsvd = 0;
3620         u64 gbpages_bit_rsvd = 0;
3621         u64 nonleaf_bit8_rsvd = 0;
3622
3623         rsvd_check->bad_mt_xwr = 0;
3624
3625         if (!nx)
3626                 exb_bit_rsvd = rsvd_bits(63, 63);
3627         if (!gbpages)
3628                 gbpages_bit_rsvd = rsvd_bits(7, 7);
3629
3630         /*
3631          * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for
3632          * leaf entries) on AMD CPUs only.
3633          */
3634         if (guest_cpuid_is_amd(vcpu))
3635                 nonleaf_bit8_rsvd = rsvd_bits(8, 8);
3636
3637         switch (level) {
3638         case PT32_ROOT_LEVEL:
3639                 /* no rsvd bits for 2 level 4K page table entries */
3640                 rsvd_check->rsvd_bits_mask[0][1] = 0;
3641                 rsvd_check->rsvd_bits_mask[0][0] = 0;
3642                 rsvd_check->rsvd_bits_mask[1][0] =
3643                         rsvd_check->rsvd_bits_mask[0][0];
3644
3645                 if (!pse) {
3646                         rsvd_check->rsvd_bits_mask[1][1] = 0;
3647                         break;
3648                 }
3649
3650                 if (is_cpuid_PSE36())
3651                         /* 36bits PSE 4MB page */
3652                         rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
3653                 else
3654                         /* 32 bits PSE 4MB page */
3655                         rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
3656                 break;
3657         case PT32E_ROOT_LEVEL:
3658                 rsvd_check->rsvd_bits_mask[0][2] =
3659                         rsvd_bits(maxphyaddr, 63) |
3660                         rsvd_bits(5, 8) | rsvd_bits(1, 2);      /* PDPTE */
3661                 rsvd_check->rsvd_bits_mask[0][1] = exb_bit_rsvd |
3662                         rsvd_bits(maxphyaddr, 62);      /* PDE */
3663                 rsvd_check->rsvd_bits_mask[0][0] = exb_bit_rsvd |
3664                         rsvd_bits(maxphyaddr, 62);      /* PTE */
3665                 rsvd_check->rsvd_bits_mask[1][1] = exb_bit_rsvd |
3666                         rsvd_bits(maxphyaddr, 62) |
3667                         rsvd_bits(13, 20);              /* large page */
3668                 rsvd_check->rsvd_bits_mask[1][0] =
3669                         rsvd_check->rsvd_bits_mask[0][0];
3670                 break;
3671         case PT64_ROOT_LEVEL:
3672                 rsvd_check->rsvd_bits_mask[0][3] = exb_bit_rsvd |
3673                         nonleaf_bit8_rsvd | rsvd_bits(7, 7) |
3674                         rsvd_bits(maxphyaddr, 51);
3675                 rsvd_check->rsvd_bits_mask[0][2] = exb_bit_rsvd |
3676                         nonleaf_bit8_rsvd | gbpages_bit_rsvd |
3677                         rsvd_bits(maxphyaddr, 51);
3678                 rsvd_check->rsvd_bits_mask[0][1] = exb_bit_rsvd |
3679                         rsvd_bits(maxphyaddr, 51);
3680                 rsvd_check->rsvd_bits_mask[0][0] = exb_bit_rsvd |
3681                         rsvd_bits(maxphyaddr, 51);
3682                 rsvd_check->rsvd_bits_mask[1][3] =
3683                         rsvd_check->rsvd_bits_mask[0][3];
3684                 rsvd_check->rsvd_bits_mask[1][2] = exb_bit_rsvd |
3685                         gbpages_bit_rsvd | rsvd_bits(maxphyaddr, 51) |
3686                         rsvd_bits(13, 29);
3687                 rsvd_check->rsvd_bits_mask[1][1] = exb_bit_rsvd |
3688                         rsvd_bits(maxphyaddr, 51) |
3689                         rsvd_bits(13, 20);              /* large page */
3690                 rsvd_check->rsvd_bits_mask[1][0] =
3691                         rsvd_check->rsvd_bits_mask[0][0];
3692                 break;
3693         }
3694 }
3695
3696 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
3697                                   struct kvm_mmu *context)
3698 {
3699         __reset_rsvds_bits_mask(vcpu, &context->guest_rsvd_check,
3700                                 cpuid_maxphyaddr(vcpu), context->root_level,
3701                                 context->nx, guest_cpuid_has_gbpages(vcpu),
3702                                 is_pse(vcpu));
3703 }
3704
3705 static void
3706 __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check,
3707                             int maxphyaddr, bool execonly)
3708 {
3709         int pte;
3710
3711         rsvd_check->rsvd_bits_mask[0][3] =
3712                 rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 7);
3713         rsvd_check->rsvd_bits_mask[0][2] =
3714                 rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 6);
3715         rsvd_check->rsvd_bits_mask[0][1] =
3716                 rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 6);
3717         rsvd_check->rsvd_bits_mask[0][0] = rsvd_bits(maxphyaddr, 51);
3718
3719         /* large page */
3720         rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3];
3721         rsvd_check->rsvd_bits_mask[1][2] =
3722                 rsvd_bits(maxphyaddr, 51) | rsvd_bits(12, 29);
3723         rsvd_check->rsvd_bits_mask[1][1] =
3724                 rsvd_bits(maxphyaddr, 51) | rsvd_bits(12, 20);
3725         rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0];
3726
3727         for (pte = 0; pte < 64; pte++) {
3728                 int rwx_bits = pte & 7;
3729                 int mt = pte >> 3;
3730                 if (mt == 0x2 || mt == 0x3 || mt == 0x7 ||
3731                                 rwx_bits == 0x2 || rwx_bits == 0x6 ||
3732                                 (rwx_bits == 0x4 && !execonly))
3733                         rsvd_check->bad_mt_xwr |= (1ull << pte);
3734         }
3735 }
3736
3737 static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu,
3738                 struct kvm_mmu *context, bool execonly)
3739 {
3740         __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check,
3741                                     cpuid_maxphyaddr(vcpu), execonly);
3742 }
3743
3744 /*
3745  * the page table on host is the shadow page table for the page
3746  * table in guest or amd nested guest, its mmu features completely
3747  * follow the features in guest.
3748  */
3749 void
3750 reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context)
3751 {
3752         __reset_rsvds_bits_mask(vcpu, &context->shadow_zero_check,
3753                                 boot_cpu_data.x86_phys_bits,
3754                                 context->shadow_root_level, context->nx,
3755                                 guest_cpuid_has_gbpages(vcpu), is_pse(vcpu));
3756 }
3757 EXPORT_SYMBOL_GPL(reset_shadow_zero_bits_mask);
3758
3759 /*
3760  * the direct page table on host, use as much mmu features as
3761  * possible, however, kvm currently does not do execution-protection.
3762  */
3763 static void
3764 reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu *vcpu,
3765                                 struct kvm_mmu *context)
3766 {
3767         if (guest_cpuid_is_amd(vcpu))
3768                 __reset_rsvds_bits_mask(vcpu, &context->shadow_zero_check,
3769                                         boot_cpu_data.x86_phys_bits,
3770                                         context->shadow_root_level, false,
3771                                         cpu_has_gbpages, true);
3772         else
3773                 __reset_rsvds_bits_mask_ept(&context->shadow_zero_check,
3774                                             boot_cpu_data.x86_phys_bits,
3775                                             false);
3776
3777 }
3778
3779 /*
3780  * as the comments in reset_shadow_zero_bits_mask() except it
3781  * is the shadow page table for intel nested guest.
3782  */
3783 static void
3784 reset_ept_shadow_zero_bits_mask(struct kvm_vcpu *vcpu,
3785                                 struct kvm_mmu *context, bool execonly)
3786 {
3787         __reset_rsvds_bits_mask_ept(&context->shadow_zero_check,
3788                                     boot_cpu_data.x86_phys_bits, execonly);
3789 }
3790
3791 static void update_permission_bitmask(struct kvm_vcpu *vcpu,
3792                                       struct kvm_mmu *mmu, bool ept)
3793 {
3794         unsigned bit, byte, pfec;
3795         u8 map;
3796         bool fault, x, w, u, wf, uf, ff, smapf, cr4_smap, cr4_smep, smap = 0;
3797
3798         cr4_smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
3799         cr4_smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP);
3800         for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) {
3801                 pfec = byte << 1;
3802                 map = 0;
3803                 wf = pfec & PFERR_WRITE_MASK;
3804                 uf = pfec & PFERR_USER_MASK;
3805                 ff = pfec & PFERR_FETCH_MASK;
3806                 /*
3807                  * PFERR_RSVD_MASK bit is set in PFEC if the access is not
3808                  * subject to SMAP restrictions, and cleared otherwise. The
3809                  * bit is only meaningful if the SMAP bit is set in CR4.
3810                  */
3811                 smapf = !(pfec & PFERR_RSVD_MASK);
3812                 for (bit = 0; bit < 8; ++bit) {
3813                         x = bit & ACC_EXEC_MASK;
3814                         w = bit & ACC_WRITE_MASK;
3815                         u = bit & ACC_USER_MASK;
3816
3817                         if (!ept) {
3818                                 /* Not really needed: !nx will cause pte.nx to fault */
3819                                 x |= !mmu->nx;
3820                                 /* Allow supervisor writes if !cr0.wp */
3821                                 w |= !is_write_protection(vcpu) && !uf;
3822                                 /* Disallow supervisor fetches of user code if cr4.smep */
3823                                 x &= !(cr4_smep && u && !uf);
3824
3825                                 /*
3826                                  * SMAP:kernel-mode data accesses from user-mode
3827                                  * mappings should fault. A fault is considered
3828                                  * as a SMAP violation if all of the following
3829                                  * conditions are ture:
3830                                  *   - X86_CR4_SMAP is set in CR4
3831                                  *   - An user page is accessed
3832                                  *   - Page fault in kernel mode
3833                                  *   - if CPL = 3 or X86_EFLAGS_AC is clear
3834                                  *
3835                                  *   Here, we cover the first three conditions.
3836                                  *   The fourth is computed dynamically in
3837                                  *   permission_fault() and is in smapf.
3838                                  *
3839                                  *   Also, SMAP does not affect instruction
3840                                  *   fetches, add the !ff check here to make it
3841                                  *   clearer.
3842                                  */
3843                                 smap = cr4_smap && u && !uf && !ff;
3844                         } else
3845                                 /* Not really needed: no U/S accesses on ept  */
3846                                 u = 1;
3847
3848                         fault = (ff && !x) || (uf && !u) || (wf && !w) ||
3849                                 (smapf && smap);
3850                         map |= fault << bit;
3851                 }
3852                 mmu->permissions[byte] = map;
3853         }
3854 }
3855
3856 static void update_last_pte_bitmap(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu)
3857 {
3858         u8 map;
3859         unsigned level, root_level = mmu->root_level;
3860         const unsigned ps_set_index = 1 << 2;  /* bit 2 of index: ps */
3861
3862         if (root_level == PT32E_ROOT_LEVEL)
3863                 --root_level;
3864         /* PT_PAGE_TABLE_LEVEL always terminates */
3865         map = 1 | (1 << ps_set_index);
3866         for (level = PT_DIRECTORY_LEVEL; level <= root_level; ++level) {
3867                 if (level <= PT_PDPE_LEVEL
3868                     && (mmu->root_level >= PT32E_ROOT_LEVEL || is_pse(vcpu)))
3869                         map |= 1 << (ps_set_index | (level - 1));
3870         }
3871         mmu->last_pte_bitmap = map;
3872 }
3873
3874 static void paging64_init_context_common(struct kvm_vcpu *vcpu,
3875                                          struct kvm_mmu *context,
3876                                          int level)
3877 {
3878         context->nx = is_nx(vcpu);
3879         context->root_level = level;
3880
3881         reset_rsvds_bits_mask(vcpu, context);
3882         update_permission_bitmask(vcpu, context, false);
3883         update_last_pte_bitmap(vcpu, context);
3884
3885         MMU_WARN_ON(!is_pae(vcpu));
3886         context->page_fault = paging64_page_fault;
3887         context->gva_to_gpa = paging64_gva_to_gpa;
3888         context->sync_page = paging64_sync_page;
3889         context->invlpg = paging64_invlpg;
3890         context->update_pte = paging64_update_pte;
3891         context->shadow_root_level = level;
3892         context->root_hpa = INVALID_PAGE;
3893         context->direct_map = false;
3894 }
3895
3896 static void paging64_init_context(struct kvm_vcpu *vcpu,
3897                                   struct kvm_mmu *context)
3898 {
3899         paging64_init_context_common(vcpu, context, PT64_ROOT_LEVEL);
3900 }
3901
3902 static void paging32_init_context(struct kvm_vcpu *vcpu,
3903                                   struct kvm_mmu *context)
3904 {
3905         context->nx = false;
3906         context->root_level = PT32_ROOT_LEVEL;
3907
3908         reset_rsvds_bits_mask(vcpu, context);
3909         update_permission_bitmask(vcpu, context, false);
3910         update_last_pte_bitmap(vcpu, context);
3911
3912         context->page_fault = paging32_page_fault;
3913         context->gva_to_gpa = paging32_gva_to_gpa;
3914         context->sync_page = paging32_sync_page;
3915         context->invlpg = paging32_invlpg;
3916         context->update_pte = paging32_update_pte;
3917         context->shadow_root_level = PT32E_ROOT_LEVEL;
3918         context->root_hpa = INVALID_PAGE;
3919         context->direct_map = false;
3920 }
3921
3922 static void paging32E_init_context(struct kvm_vcpu *vcpu,
3923                                    struct kvm_mmu *context)
3924 {
3925         paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL);
3926 }
3927
3928 static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
3929 {
3930         struct kvm_mmu *context = &vcpu->arch.mmu;
3931
3932         context->base_role.word = 0;
3933         context->base_role.smm = is_smm(vcpu);
3934         context->page_fault = tdp_page_fault;
3935         context->sync_page = nonpaging_sync_page;
3936         context->invlpg = nonpaging_invlpg;
3937         context->update_pte = nonpaging_update_pte;
3938         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
3939         context->root_hpa = INVALID_PAGE;
3940         context->direct_map = true;
3941         context->set_cr3 = kvm_x86_ops->set_tdp_cr3;
3942         context->get_cr3 = get_cr3;
3943         context->get_pdptr = kvm_pdptr_read;
3944         context->inject_page_fault = kvm_inject_page_fault;
3945
3946         if (!is_paging(vcpu)) {
3947                 context->nx = false;
3948                 context->gva_to_gpa = nonpaging_gva_to_gpa;
3949                 context->root_level = 0;
3950         } else if (is_long_mode(vcpu)) {
3951                 context->nx = is_nx(vcpu);
3952                 context->root_level = PT64_ROOT_LEVEL;
3953                 reset_rsvds_bits_mask(vcpu, context);
3954                 context->gva_to_gpa = paging64_gva_to_gpa;
3955         } else if (is_pae(vcpu)) {
3956                 context->nx = is_nx(vcpu);
3957                 context->root_level = PT32E_ROOT_LEVEL;
3958                 reset_rsvds_bits_mask(vcpu, context);
3959                 context->gva_to_gpa = paging64_gva_to_gpa;
3960         } else {
3961                 context->nx = false;
3962                 context->root_level = PT32_ROOT_LEVEL;
3963                 reset_rsvds_bits_mask(vcpu, context);
3964                 context->gva_to_gpa = paging32_gva_to_gpa;
3965         }
3966
3967         update_permission_bitmask(vcpu, context, false);
3968         update_last_pte_bitmap(vcpu, context);
3969         reset_tdp_shadow_zero_bits_mask(vcpu, context);
3970 }
3971
3972 void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu)
3973 {
3974         bool smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
3975         bool smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP);
3976         struct kvm_mmu *context = &vcpu->arch.mmu;
3977
3978         MMU_WARN_ON(VALID_PAGE(context->root_hpa));
3979
3980         if (!is_paging(vcpu))
3981                 nonpaging_init_context(vcpu, context);
3982         else if (is_long_mode(vcpu))
3983                 paging64_init_context(vcpu, context);
3984         else if (is_pae(vcpu))
3985                 paging32E_init_context(vcpu, context);
3986         else
3987                 paging32_init_context(vcpu, context);
3988
3989         context->base_role.nxe = is_nx(vcpu);
3990         context->base_role.cr4_pae = !!is_pae(vcpu);
3991         context->base_role.cr0_wp  = is_write_protection(vcpu);
3992         context->base_role.smep_andnot_wp
3993                 = smep && !is_write_protection(vcpu);
3994         context->base_role.smap_andnot_wp
3995                 = smap && !is_write_protection(vcpu);
3996         context->base_role.smm = is_smm(vcpu);
3997         reset_shadow_zero_bits_mask(vcpu, context);
3998 }
3999 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);
4000
4001 void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly)
4002 {
4003         struct kvm_mmu *context = &vcpu->arch.mmu;
4004
4005         MMU_WARN_ON(VALID_PAGE(context->root_hpa));
4006
4007         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
4008
4009         context->nx = true;
4010         context->page_fault = ept_page_fault;
4011         context->gva_to_gpa = ept_gva_to_gpa;
4012         context->sync_page = ept_sync_page;
4013         context->invlpg = ept_invlpg;
4014         context->update_pte = ept_update_pte;
4015         context->root_level = context->shadow_root_level;
4016         context->root_hpa = INVALID_PAGE;
4017         context->direct_map = false;
4018
4019         update_permission_bitmask(vcpu, context, true);
4020         reset_rsvds_bits_mask_ept(vcpu, context, execonly);
4021         reset_ept_shadow_zero_bits_mask(vcpu, context, execonly);
4022 }
4023 EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu);
4024
4025 static void init_kvm_softmmu(struct kvm_vcpu *vcpu)
4026 {
4027         struct kvm_mmu *context = &vcpu->arch.mmu;
4028
4029         kvm_init_shadow_mmu(vcpu);
4030         context->set_cr3           = kvm_x86_ops->set_cr3;
4031         context->get_cr3           = get_cr3;
4032         context->get_pdptr         = kvm_pdptr_read;
4033         context->inject_page_fault = kvm_inject_page_fault;
4034 }
4035
4036 static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu)
4037 {
4038         struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
4039
4040         g_context->get_cr3           = get_cr3;
4041         g_context->get_pdptr         = kvm_pdptr_read;
4042         g_context->inject_page_fault = kvm_inject_page_fault;
4043
4044         /*
4045          * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
4046          * translation of l2_gpa to l1_gpa addresses is done using the
4047          * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
4048          * functions between mmu and nested_mmu are swapped.
4049          */
4050         if (!is_paging(vcpu)) {
4051                 g_context->nx = false;
4052                 g_context->root_level = 0;
4053                 g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested;
4054         } else if (is_long_mode(vcpu)) {
4055                 g_context->nx = is_nx(vcpu);
4056                 g_context->root_level = PT64_ROOT_LEVEL;
4057                 reset_rsvds_bits_mask(vcpu, g_context);
4058                 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
4059         } else if (is_pae(vcpu)) {
4060                 g_context->nx = is_nx(vcpu);
4061                 g_context->root_level = PT32E_ROOT_LEVEL;
4062                 reset_rsvds_bits_mask(vcpu, g_context);
4063                 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
4064         } else {
4065                 g_context->nx = false;
4066                 g_context->root_level = PT32_ROOT_LEVEL;
4067                 reset_rsvds_bits_mask(vcpu, g_context);
4068                 g_context->gva_to_gpa = paging32_gva_to_gpa_nested;
4069         }
4070
4071         update_permission_bitmask(vcpu, g_context, false);
4072         update_last_pte_bitmap(vcpu, g_context);
4073 }
4074
4075 static void init_kvm_mmu(struct kvm_vcpu *vcpu)
4076 {
4077         if (mmu_is_nested(vcpu))
4078                 init_kvm_nested_mmu(vcpu);
4079         else if (tdp_enabled)
4080                 init_kvm_tdp_mmu(vcpu);
4081         else
4082                 init_kvm_softmmu(vcpu);
4083 }
4084
4085 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
4086 {
4087         kvm_mmu_unload(vcpu);
4088         init_kvm_mmu(vcpu);
4089 }
4090 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
4091
4092 int kvm_mmu_load(struct kvm_vcpu *vcpu)
4093 {
4094         int r;
4095
4096         r = mmu_topup_memory_caches(vcpu);
4097         if (r)
4098                 goto out;
4099         r = mmu_alloc_roots(vcpu);
4100         kvm_mmu_sync_roots(vcpu);
4101         if (r)
4102                 goto out;
4103         /* set_cr3() should ensure TLB has been flushed */
4104         vcpu->arch.mmu.set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
4105 out:
4106         return r;
4107 }
4108 EXPORT_SYMBOL_GPL(kvm_mmu_load);
4109
4110 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
4111 {
4112         mmu_free_roots(vcpu);
4113         WARN_ON(VALID_PAGE(vcpu->arch.mmu.root_hpa));
4114 }
4115 EXPORT_SYMBOL_GPL(kvm_mmu_unload);
4116
4117 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4118                                   struct kvm_mmu_page *sp, u64 *spte,
4119                                   const void *new)
4120 {
4121         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
4122                 ++vcpu->kvm->stat.mmu_pde_zapped;
4123                 return;
4124         }
4125
4126         ++vcpu->kvm->stat.mmu_pte_updated;
4127         vcpu->arch.mmu.update_pte(vcpu, sp, spte, new);
4128 }
4129
4130 static bool need_remote_flush(u64 old, u64 new)
4131 {
4132         if (!is_shadow_present_pte(old))
4133                 return false;
4134         if (!is_shadow_present_pte(new))
4135                 return true;
4136         if ((old ^ new) & PT64_BASE_ADDR_MASK)
4137                 return true;
4138         old ^= shadow_nx_mask;
4139         new ^= shadow_nx_mask;
4140         return (old & ~new & PT64_PERM_MASK) != 0;
4141 }
4142
4143 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
4144                                     bool remote_flush, bool local_flush)
4145 {
4146         if (zap_page)
4147                 return;
4148
4149         if (remote_flush)
4150                 kvm_flush_remote_tlbs(vcpu->kvm);
4151         else if (local_flush)
4152                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
4153 }
4154
4155 static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa,
4156                                     const u8 *new, int *bytes)
4157 {
4158         u64 gentry;
4159         int r;
4160
4161         /*
4162          * Assume that the pte write on a page table of the same type
4163          * as the current vcpu paging mode since we update the sptes only
4164          * when they have the same mode.
4165          */
4166         if (is_pae(vcpu) && *bytes == 4) {
4167                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
4168                 *gpa &= ~(gpa_t)7;
4169                 *bytes = 8;
4170                 r = kvm_vcpu_read_guest(vcpu, *gpa, &gentry, 8);
4171                 if (r)
4172                         gentry = 0;
4173                 new = (const u8 *)&gentry;
4174         }
4175
4176         switch (*bytes) {
4177         case 4:
4178                 gentry = *(const u32 *)new;
4179                 break;
4180         case 8:
4181                 gentry = *(const u64 *)new;
4182                 break;
4183         default:
4184                 gentry = 0;
4185                 break;
4186         }
4187
4188         return gentry;
4189 }
4190
4191 /*
4192  * If we're seeing too many writes to a page, it may no longer be a page table,
4193  * or we may be forking, in which case it is better to unmap the page.
4194  */
4195 static bool detect_write_flooding(struct kvm_mmu_page *sp)
4196 {
4197         /*
4198          * Skip write-flooding detected for the sp whose level is 1, because
4199          * it can become unsync, then the guest page is not write-protected.
4200          */
4201         if (sp->role.level == PT_PAGE_TABLE_LEVEL)
4202                 return false;
4203
4204         return ++sp->write_flooding_count >= 3;
4205 }
4206
4207 /*
4208  * Misaligned accesses are too much trouble to fix up; also, they usually
4209  * indicate a page is not used as a page table.
4210  */
4211 static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa,
4212                                     int bytes)
4213 {
4214         unsigned offset, pte_size, misaligned;
4215
4216         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4217                  gpa, bytes, sp->role.word);
4218
4219         offset = offset_in_page(gpa);
4220         pte_size = sp->role.cr4_pae ? 8 : 4;
4221
4222         /*
4223          * Sometimes, the OS only writes the last one bytes to update status
4224          * bits, for example, in linux, andb instruction is used in clear_bit().
4225          */
4226         if (!(offset & (pte_size - 1)) && bytes == 1)
4227                 return false;
4228
4229         misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
4230         misaligned |= bytes < 4;
4231
4232         return misaligned;
4233 }
4234
4235 static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte)
4236 {
4237         unsigned page_offset, quadrant;
4238         u64 *spte;
4239         int level;
4240
4241         page_offset = offset_in_page(gpa);
4242         level = sp->role.level;
4243         *nspte = 1;
4244         if (!sp->role.cr4_pae) {
4245                 page_offset <<= 1;      /* 32->64 */
4246                 /*
4247                  * A 32-bit pde maps 4MB while the shadow pdes map
4248                  * only 2MB.  So we need to double the offset again
4249                  * and zap two pdes instead of one.
4250                  */
4251                 if (level == PT32_ROOT_LEVEL) {
4252                         page_offset &= ~7; /* kill rounding error */
4253                         page_offset <<= 1;
4254                         *nspte = 2;
4255                 }
4256                 quadrant = page_offset >> PAGE_SHIFT;
4257                 page_offset &= ~PAGE_MASK;
4258                 if (quadrant != sp->role.quadrant)
4259                         return NULL;
4260         }
4261
4262         spte = &sp->spt[page_offset / sizeof(*spte)];
4263         return spte;
4264 }
4265
4266 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
4267                        const u8 *new, int bytes)
4268 {
4269         gfn_t gfn = gpa >> PAGE_SHIFT;
4270         struct kvm_mmu_page *sp;
4271         LIST_HEAD(invalid_list);
4272         u64 entry, gentry, *spte;
4273         int npte;
4274         bool remote_flush, local_flush, zap_page;
4275         union kvm_mmu_page_role mask = { };
4276
4277         mask.cr0_wp = 1;
4278         mask.cr4_pae = 1;
4279         mask.nxe = 1;
4280         mask.smep_andnot_wp = 1;
4281         mask.smap_andnot_wp = 1;
4282         mask.smm = 1;
4283
4284         /*
4285          * If we don't have indirect shadow pages, it means no page is
4286          * write-protected, so we can exit simply.
4287          */
4288         if (!ACCESS_ONCE(vcpu->kvm->arch.indirect_shadow_pages))
4289                 return;
4290
4291         zap_page = remote_flush = local_flush = false;
4292
4293         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
4294
4295         gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, new, &bytes);
4296
4297         /*
4298          * No need to care whether allocation memory is successful
4299          * or not since pte prefetch is skiped if it does not have
4300          * enough objects in the cache.
4301          */
4302         mmu_topup_memory_caches(vcpu);
4303
4304         spin_lock(&vcpu->kvm->mmu_lock);
4305         ++vcpu->kvm->stat.mmu_pte_write;
4306         kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE);
4307
4308         for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) {
4309                 if (detect_write_misaligned(sp, gpa, bytes) ||
4310                       detect_write_flooding(sp)) {
4311                         zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
4312                                                      &invalid_list);
4313                         ++vcpu->kvm->stat.mmu_flooded;
4314                         continue;
4315                 }
4316
4317                 spte = get_written_sptes(sp, gpa, &npte);
4318                 if (!spte)
4319                         continue;
4320
4321                 local_flush = true;
4322                 while (npte--) {
4323                         entry = *spte;
4324                         mmu_page_zap_pte(vcpu->kvm, sp, spte);
4325                         if (gentry &&
4326                               !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
4327                               & mask.word) && rmap_can_add(vcpu))
4328                                 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
4329                         if (need_remote_flush(entry, *spte))
4330                                 remote_flush = true;
4331                         ++spte;
4332                 }
4333         }
4334         mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
4335         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
4336         kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE);
4337         spin_unlock(&vcpu->kvm->mmu_lock);
4338 }
4339
4340 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
4341 {
4342         gpa_t gpa;
4343         int r;
4344
4345         if (vcpu->arch.mmu.direct_map)
4346                 return 0;
4347
4348         gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
4349
4350         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4351
4352         return r;
4353 }
4354 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
4355
4356 static void make_mmu_pages_available(struct kvm_vcpu *vcpu)
4357 {
4358         LIST_HEAD(invalid_list);
4359
4360         if (likely(kvm_mmu_available_pages(vcpu->kvm) >= KVM_MIN_FREE_MMU_PAGES))
4361                 return;
4362
4363         while (kvm_mmu_available_pages(vcpu->kvm) < KVM_REFILL_PAGES) {
4364                 if (!prepare_zap_oldest_mmu_page(vcpu->kvm, &invalid_list))
4365                         break;
4366
4367                 ++vcpu->kvm->stat.mmu_recycled;
4368         }
4369         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
4370 }
4371
4372 static bool is_mmio_page_fault(struct kvm_vcpu *vcpu, gva_t addr)
4373 {
4374         if (vcpu->arch.mmu.direct_map || mmu_is_nested(vcpu))
4375                 return vcpu_match_mmio_gpa(vcpu, addr);
4376
4377         return vcpu_match_mmio_gva(vcpu, addr);
4378 }
4379
4380 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code,
4381                        void *insn, int insn_len)
4382 {
4383         int r, emulation_type = EMULTYPE_RETRY;
4384         enum emulation_result er;
4385
4386         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code, false);
4387         if (r < 0)
4388                 goto out;
4389
4390         if (!r) {
4391                 r = 1;
4392                 goto out;
4393         }
4394
4395         if (is_mmio_page_fault(vcpu, cr2))
4396                 emulation_type = 0;
4397
4398         er = x86_emulate_instruction(vcpu, cr2, emulation_type, insn, insn_len);
4399
4400         switch (er) {
4401         case EMULATE_DONE:
4402                 return 1;
4403         case EMULATE_USER_EXIT:
4404                 ++vcpu->stat.mmio_exits;
4405                 /* fall through */
4406         case EMULATE_FAIL:
4407                 return 0;
4408         default:
4409                 BUG();
4410         }
4411 out:
4412         return r;
4413 }
4414 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
4415
4416 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
4417 {
4418         vcpu->arch.mmu.invlpg(vcpu, gva);
4419         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
4420         ++vcpu->stat.invlpg;
4421 }
4422 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
4423
4424 void kvm_enable_tdp(void)
4425 {
4426         tdp_enabled = true;
4427 }
4428 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
4429
4430 void kvm_disable_tdp(void)
4431 {
4432         tdp_enabled = false;
4433 }
4434 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
4435
4436 static void free_mmu_pages(struct kvm_vcpu *vcpu)
4437 {
4438         free_page((unsigned long)vcpu->arch.mmu.pae_root);
4439         if (vcpu->arch.mmu.lm_root != NULL)
4440                 free_page((unsigned long)vcpu->arch.mmu.lm_root);
4441 }
4442
4443 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
4444 {
4445         struct page *page;
4446         int i;
4447
4448         /*
4449          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
4450          * Therefore we need to allocate shadow page tables in the first
4451          * 4GB of memory, which happens to fit the DMA32 zone.
4452          */
4453         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
4454         if (!page)
4455                 return -ENOMEM;
4456
4457         vcpu->arch.mmu.pae_root = page_address(page);
4458         for (i = 0; i < 4; ++i)
4459                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
4460
4461         return 0;
4462 }
4463
4464 int kvm_mmu_create(struct kvm_vcpu *vcpu)
4465 {
4466         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
4467         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4468         vcpu->arch.mmu.translate_gpa = translate_gpa;
4469         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
4470
4471         return alloc_mmu_pages(vcpu);
4472 }
4473
4474 void kvm_mmu_setup(struct kvm_vcpu *vcpu)
4475 {
4476         MMU_WARN_ON(VALID_PAGE(vcpu->arch.mmu.root_hpa));
4477
4478         init_kvm_mmu(vcpu);
4479 }
4480
4481 /* The return value indicates if tlb flush on all vcpus is needed. */
4482 typedef bool (*slot_level_handler) (struct kvm *kvm, unsigned long *rmap);
4483
4484 /* The caller should hold mmu-lock before calling this function. */
4485 static bool
4486 slot_handle_level_range(struct kvm *kvm, struct kvm_memory_slot *memslot,
4487                         slot_level_handler fn, int start_level, int end_level,
4488                         gfn_t start_gfn, gfn_t end_gfn, bool lock_flush_tlb)
4489 {
4490         struct slot_rmap_walk_iterator iterator;
4491         bool flush = false;
4492
4493         for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn,
4494                         end_gfn, &iterator) {
4495                 if (iterator.rmap)
4496                         flush |= fn(kvm, iterator.rmap);
4497
4498                 if (need_resched() || spin_needbreak(&kvm->mmu_lock)) {
4499                         if (flush && lock_flush_tlb) {
4500                                 kvm_flush_remote_tlbs(kvm);
4501                                 flush = false;
4502                         }
4503                         cond_resched_lock(&kvm->mmu_lock);
4504                 }
4505         }
4506
4507         if (flush && lock_flush_tlb) {
4508                 kvm_flush_remote_tlbs(kvm);
4509                 flush = false;
4510         }
4511
4512         return flush;
4513 }
4514
4515 static bool
4516 slot_handle_level(struct kvm *kvm, struct kvm_memory_slot *memslot,
4517                   slot_level_handler fn, int start_level, int end_level,
4518                   bool lock_flush_tlb)
4519 {
4520         return slot_handle_level_range(kvm, memslot, fn, start_level,
4521                         end_level, memslot->base_gfn,
4522                         memslot->base_gfn + memslot->npages - 1,
4523                         lock_flush_tlb);
4524 }
4525
4526 static bool
4527 slot_handle_all_level(struct kvm *kvm, struct kvm_memory_slot *memslot,
4528                       slot_level_handler fn, bool lock_flush_tlb)
4529 {
4530         return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL,
4531                                  PT_MAX_HUGEPAGE_LEVEL, lock_flush_tlb);
4532 }
4533
4534 static bool
4535 slot_handle_large_level(struct kvm *kvm, struct kvm_memory_slot *memslot,
4536                         slot_level_handler fn, bool lock_flush_tlb)
4537 {
4538         return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL + 1,
4539                                  PT_MAX_HUGEPAGE_LEVEL, lock_flush_tlb);
4540 }
4541
4542 static bool
4543 slot_handle_leaf(struct kvm *kvm, struct kvm_memory_slot *memslot,
4544                  slot_level_handler fn, bool lock_flush_tlb)
4545 {
4546         return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL,
4547                                  PT_PAGE_TABLE_LEVEL, lock_flush_tlb);
4548 }
4549
4550 void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
4551 {
4552         struct kvm_memslots *slots;
4553         struct kvm_memory_slot *memslot;
4554         int i;
4555
4556         spin_lock(&kvm->mmu_lock);
4557         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
4558                 slots = __kvm_memslots(kvm, i);
4559                 kvm_for_each_memslot(memslot, slots) {
4560                         gfn_t start, end;
4561
4562                         start = max(gfn_start, memslot->base_gfn);
4563                         end = min(gfn_end, memslot->base_gfn + memslot->npages);
4564                         if (start >= end)
4565                                 continue;
4566
4567                         slot_handle_level_range(kvm, memslot, kvm_zap_rmapp,
4568                                                 PT_PAGE_TABLE_LEVEL, PT_MAX_HUGEPAGE_LEVEL,
4569                                                 start, end - 1, true);
4570                 }
4571         }
4572
4573         spin_unlock(&kvm->mmu_lock);
4574 }
4575
4576 static bool slot_rmap_write_protect(struct kvm *kvm, unsigned long *rmapp)
4577 {
4578         return __rmap_write_protect(kvm, rmapp, false);
4579 }
4580
4581 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
4582                                       struct kvm_memory_slot *memslot)
4583 {
4584         bool flush;
4585
4586         spin_lock(&kvm->mmu_lock);
4587         flush = slot_handle_all_level(kvm, memslot, slot_rmap_write_protect,
4588                                       false);
4589         spin_unlock(&kvm->mmu_lock);
4590
4591         /*
4592          * kvm_mmu_slot_remove_write_access() and kvm_vm_ioctl_get_dirty_log()
4593          * which do tlb flush out of mmu-lock should be serialized by
4594          * kvm->slots_lock otherwise tlb flush would be missed.
4595          */
4596         lockdep_assert_held(&kvm->slots_lock);
4597
4598         /*
4599          * We can flush all the TLBs out of the mmu lock without TLB
4600          * corruption since we just change the spte from writable to
4601          * readonly so that we only need to care the case of changing
4602          * spte from present to present (changing the spte from present
4603          * to nonpresent will flush all the TLBs immediately), in other
4604          * words, the only case we care is mmu_spte_update() where we
4605          * haved checked SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE
4606          * instead of PT_WRITABLE_MASK, that means it does not depend
4607          * on PT_WRITABLE_MASK anymore.
4608          */
4609         if (flush)
4610                 kvm_flush_remote_tlbs(kvm);
4611 }
4612
4613 static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm,
4614                 unsigned long *rmapp)
4615 {
4616         u64 *sptep;
4617         struct rmap_iterator iter;
4618         int need_tlb_flush = 0;
4619         pfn_t pfn;
4620         struct kvm_mmu_page *sp;
4621
4622 restart:
4623         for_each_rmap_spte(rmapp, &iter, sptep) {
4624                 sp = page_header(__pa(sptep));
4625                 pfn = spte_to_pfn(*sptep);
4626
4627                 /*
4628                  * We cannot do huge page mapping for indirect shadow pages,
4629                  * which are found on the last rmap (level = 1) when not using
4630                  * tdp; such shadow pages are synced with the page table in
4631                  * the guest, and the guest page table is using 4K page size
4632                  * mapping if the indirect sp has level = 1.
4633                  */
4634                 if (sp->role.direct &&
4635                         !kvm_is_reserved_pfn(pfn) &&
4636                         PageTransCompound(pfn_to_page(pfn))) {
4637                         drop_spte(kvm, sptep);
4638                         need_tlb_flush = 1;
4639                         goto restart;
4640                 }
4641         }
4642
4643         return need_tlb_flush;
4644 }
4645
4646 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
4647                                    const struct kvm_memory_slot *memslot)
4648 {
4649         /* FIXME: const-ify all uses of struct kvm_memory_slot.  */
4650         spin_lock(&kvm->mmu_lock);
4651         slot_handle_leaf(kvm, (struct kvm_memory_slot *)memslot,
4652                          kvm_mmu_zap_collapsible_spte, true);
4653         spin_unlock(&kvm->mmu_lock);
4654 }
4655
4656 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
4657                                    struct kvm_memory_slot *memslot)
4658 {
4659         bool flush;
4660
4661         spin_lock(&kvm->mmu_lock);
4662         flush = slot_handle_leaf(kvm, memslot, __rmap_clear_dirty, false);
4663         spin_unlock(&kvm->mmu_lock);
4664
4665         lockdep_assert_held(&kvm->slots_lock);
4666
4667         /*
4668          * It's also safe to flush TLBs out of mmu lock here as currently this
4669          * function is only used for dirty logging, in which case flushing TLB
4670          * out of mmu lock also guarantees no dirty pages will be lost in
4671          * dirty_bitmap.
4672          */
4673         if (flush)
4674                 kvm_flush_remote_tlbs(kvm);
4675 }
4676 EXPORT_SYMBOL_GPL(kvm_mmu_slot_leaf_clear_dirty);
4677
4678 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
4679                                         struct kvm_memory_slot *memslot)
4680 {
4681         bool flush;
4682
4683         spin_lock(&kvm->mmu_lock);
4684         flush = slot_handle_large_level(kvm, memslot, slot_rmap_write_protect,
4685                                         false);
4686         spin_unlock(&kvm->mmu_lock);
4687
4688         /* see kvm_mmu_slot_remove_write_access */
4689         lockdep_assert_held(&kvm->slots_lock);
4690
4691         if (flush)
4692                 kvm_flush_remote_tlbs(kvm);
4693 }
4694 EXPORT_SYMBOL_GPL(kvm_mmu_slot_largepage_remove_write_access);
4695
4696 void kvm_mmu_slot_set_dirty(struct kvm *kvm,
4697                             struct kvm_memory_slot *memslot)
4698 {
4699         bool flush;
4700
4701         spin_lock(&kvm->mmu_lock);
4702         flush = slot_handle_all_level(kvm, memslot, __rmap_set_dirty, false);
4703         spin_unlock(&kvm->mmu_lock);
4704
4705         lockdep_assert_held(&kvm->slots_lock);
4706
4707         /* see kvm_mmu_slot_leaf_clear_dirty */
4708         if (flush)
4709                 kvm_flush_remote_tlbs(kvm);
4710 }
4711 EXPORT_SYMBOL_GPL(kvm_mmu_slot_set_dirty);
4712
4713 #define BATCH_ZAP_PAGES 10
4714 static void kvm_zap_obsolete_pages(struct kvm *kvm)
4715 {
4716         struct kvm_mmu_page *sp, *node;
4717         int batch = 0;
4718
4719 restart:
4720         list_for_each_entry_safe_reverse(sp, node,
4721               &kvm->arch.active_mmu_pages, link) {
4722                 int ret;
4723
4724                 /*
4725                  * No obsolete page exists before new created page since
4726                  * active_mmu_pages is the FIFO list.
4727                  */
4728                 if (!is_obsolete_sp(kvm, sp))
4729                         break;
4730
4731                 /*
4732                  * Since we are reversely walking the list and the invalid
4733                  * list will be moved to the head, skip the invalid page
4734                  * can help us to avoid the infinity list walking.
4735                  */
4736                 if (sp->role.invalid)
4737                         continue;
4738
4739                 /*
4740                  * Need not flush tlb since we only zap the sp with invalid
4741                  * generation number.
4742                  */
4743                 if (batch >= BATCH_ZAP_PAGES &&
4744                       cond_resched_lock(&kvm->mmu_lock)) {
4745                         batch = 0;
4746                         goto restart;
4747                 }
4748
4749                 ret = kvm_mmu_prepare_zap_page(kvm, sp,
4750                                 &kvm->arch.zapped_obsolete_pages);
4751                 batch += ret;
4752
4753                 if (ret)
4754                         goto restart;
4755         }
4756
4757         /*
4758          * Should flush tlb before free page tables since lockless-walking
4759          * may use the pages.
4760          */
4761         kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages);
4762 }
4763
4764 /*
4765  * Fast invalidate all shadow pages and use lock-break technique
4766  * to zap obsolete pages.
4767  *
4768  * It's required when memslot is being deleted or VM is being
4769  * destroyed, in these cases, we should ensure that KVM MMU does
4770  * not use any resource of the being-deleted slot or all slots
4771  * after calling the function.
4772  */
4773 void kvm_mmu_invalidate_zap_all_pages(struct kvm *kvm)
4774 {
4775         spin_lock(&kvm->mmu_lock);
4776         trace_kvm_mmu_invalidate_zap_all_pages(kvm);
4777         kvm->arch.mmu_valid_gen++;
4778
4779         /*
4780          * Notify all vcpus to reload its shadow page table
4781          * and flush TLB. Then all vcpus will switch to new
4782          * shadow page table with the new mmu_valid_gen.
4783          *
4784          * Note: we should do this under the protection of
4785          * mmu-lock, otherwise, vcpu would purge shadow page
4786          * but miss tlb flush.
4787          */
4788         kvm_reload_remote_mmus(kvm);
4789
4790         kvm_zap_obsolete_pages(kvm);
4791         spin_unlock(&kvm->mmu_lock);
4792 }
4793
4794 static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm)
4795 {
4796         return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages));
4797 }
4798
4799 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots)
4800 {
4801         /*
4802          * The very rare case: if the generation-number is round,
4803          * zap all shadow pages.
4804          */
4805         if (unlikely((slots->generation & MMIO_GEN_MASK) == 0)) {
4806                 printk_ratelimited(KERN_DEBUG "kvm: zapping shadow pages for mmio generation wraparound\n");
4807                 kvm_mmu_invalidate_zap_all_pages(kvm);
4808         }
4809 }
4810
4811 static unsigned long
4812 mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc)
4813 {
4814         struct kvm *kvm;
4815         int nr_to_scan = sc->nr_to_scan;
4816         unsigned long freed = 0;
4817
4818         spin_lock(&kvm_lock);
4819
4820         list_for_each_entry(kvm, &vm_list, vm_list) {
4821                 int idx;
4822                 LIST_HEAD(invalid_list);
4823
4824                 /*
4825                  * Never scan more than sc->nr_to_scan VM instances.
4826                  * Will not hit this condition practically since we do not try
4827                  * to shrink more than one VM and it is very unlikely to see
4828                  * !n_used_mmu_pages so many times.
4829                  */
4830                 if (!nr_to_scan--)
4831                         break;
4832                 /*
4833                  * n_used_mmu_pages is accessed without holding kvm->mmu_lock
4834                  * here. We may skip a VM instance errorneosly, but we do not
4835                  * want to shrink a VM that only started to populate its MMU
4836                  * anyway.
4837                  */
4838                 if (!kvm->arch.n_used_mmu_pages &&
4839                       !kvm_has_zapped_obsolete_pages(kvm))
4840                         continue;
4841
4842                 idx = srcu_read_lock(&kvm->srcu);
4843                 spin_lock(&kvm->mmu_lock);
4844
4845                 if (kvm_has_zapped_obsolete_pages(kvm)) {
4846                         kvm_mmu_commit_zap_page(kvm,
4847                               &kvm->arch.zapped_obsolete_pages);
4848                         goto unlock;
4849                 }
4850
4851                 if (prepare_zap_oldest_mmu_page(kvm, &invalid_list))
4852                         freed++;
4853                 kvm_mmu_commit_zap_page(kvm, &invalid_list);
4854
4855 unlock:
4856                 spin_unlock(&kvm->mmu_lock);
4857                 srcu_read_unlock(&kvm->srcu, idx);
4858
4859                 /*
4860                  * unfair on small ones
4861                  * per-vm shrinkers cry out
4862                  * sadness comes quickly
4863                  */
4864                 list_move_tail(&kvm->vm_list, &vm_list);
4865                 break;
4866         }
4867
4868         spin_unlock(&kvm_lock);
4869         return freed;
4870 }
4871
4872 static unsigned long
4873 mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc)
4874 {
4875         return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
4876 }
4877
4878 static struct shrinker mmu_shrinker = {
4879         .count_objects = mmu_shrink_count,
4880         .scan_objects = mmu_shrink_scan,
4881         .seeks = DEFAULT_SEEKS * 10,
4882 };
4883
4884 static void mmu_destroy_caches(void)
4885 {
4886         if (pte_list_desc_cache)
4887                 kmem_cache_destroy(pte_list_desc_cache);
4888         if (mmu_page_header_cache)
4889                 kmem_cache_destroy(mmu_page_header_cache);
4890 }
4891
4892 int kvm_mmu_module_init(void)
4893 {
4894         pte_list_desc_cache = kmem_cache_create("pte_list_desc",
4895                                             sizeof(struct pte_list_desc),
4896                                             0, 0, NULL);
4897         if (!pte_list_desc_cache)
4898                 goto nomem;
4899
4900         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
4901                                                   sizeof(struct kvm_mmu_page),
4902                                                   0, 0, NULL);
4903         if (!mmu_page_header_cache)
4904                 goto nomem;
4905
4906         if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL))
4907                 goto nomem;
4908
4909         register_shrinker(&mmu_shrinker);
4910
4911         return 0;
4912
4913 nomem:
4914         mmu_destroy_caches();
4915         return -ENOMEM;
4916 }
4917
4918 /*
4919  * Caculate mmu pages needed for kvm.
4920  */
4921 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
4922 {
4923         unsigned int nr_mmu_pages;
4924         unsigned int  nr_pages = 0;
4925         struct kvm_memslots *slots;
4926         struct kvm_memory_slot *memslot;
4927         int i;
4928
4929         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
4930                 slots = __kvm_memslots(kvm, i);
4931
4932                 kvm_for_each_memslot(memslot, slots)
4933                         nr_pages += memslot->npages;
4934         }
4935
4936         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
4937         nr_mmu_pages = max(nr_mmu_pages,
4938                            (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
4939
4940         return nr_mmu_pages;
4941 }
4942
4943 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
4944 {
4945         kvm_mmu_unload(vcpu);
4946         free_mmu_pages(vcpu);
4947         mmu_free_memory_caches(vcpu);
4948 }
4949
4950 void kvm_mmu_module_exit(void)
4951 {
4952         mmu_destroy_caches();
4953         percpu_counter_destroy(&kvm_total_used_mmu_pages);
4954         unregister_shrinker(&mmu_shrinker);
4955         mmu_audit_disable();
4956 }