2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affilates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
23 #include "kvm_cache_regs.h"
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
39 #include <asm/cmpxchg.h>
44 * When setting this variable to true it enables Two-Dimensional-Paging
45 * where the hardware walks 2 page tables:
46 * 1. the guest-virtual to guest-physical
47 * 2. while doing 1. it walks guest-physical to host-physical
48 * If the hardware supports that we don't need to do shadow paging.
50 bool tdp_enabled = false;
54 AUDIT_POST_PAGE_FAULT,
59 char *audit_point_name[] = {
70 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
71 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
75 #define pgprintk(x...) do { } while (0)
76 #define rmap_printk(x...) do { } while (0)
82 module_param(dbg, bool, 0644);
85 static int oos_shadow = 1;
86 module_param(oos_shadow, bool, 0644);
89 #define ASSERT(x) do { } while (0)
93 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
94 __FILE__, __LINE__, #x); \
98 #define PTE_PREFETCH_NUM 8
100 #define PT_FIRST_AVAIL_BITS_SHIFT 9
101 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
103 #define PT64_LEVEL_BITS 9
105 #define PT64_LEVEL_SHIFT(level) \
106 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
108 #define PT64_LEVEL_MASK(level) \
109 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
111 #define PT64_INDEX(address, level)\
112 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
115 #define PT32_LEVEL_BITS 10
117 #define PT32_LEVEL_SHIFT(level) \
118 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
120 #define PT32_LEVEL_MASK(level) \
121 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
122 #define PT32_LVL_OFFSET_MASK(level) \
123 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
124 * PT32_LEVEL_BITS))) - 1))
126 #define PT32_INDEX(address, level)\
127 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
130 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
131 #define PT64_DIR_BASE_ADDR_MASK \
132 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
133 #define PT64_LVL_ADDR_MASK(level) \
134 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
135 * PT64_LEVEL_BITS))) - 1))
136 #define PT64_LVL_OFFSET_MASK(level) \
137 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
138 * PT64_LEVEL_BITS))) - 1))
140 #define PT32_BASE_ADDR_MASK PAGE_MASK
141 #define PT32_DIR_BASE_ADDR_MASK \
142 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
143 #define PT32_LVL_ADDR_MASK(level) \
144 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
145 * PT32_LEVEL_BITS))) - 1))
147 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
152 #define ACC_EXEC_MASK 1
153 #define ACC_WRITE_MASK PT_WRITABLE_MASK
154 #define ACC_USER_MASK PT_USER_MASK
155 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
157 #include <trace/events/kvm.h>
159 #define CREATE_TRACE_POINTS
160 #include "mmutrace.h"
162 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
164 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
166 struct kvm_rmap_desc {
167 u64 *sptes[RMAP_EXT];
168 struct kvm_rmap_desc *more;
171 struct kvm_shadow_walk_iterator {
179 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
180 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
181 shadow_walk_okay(&(_walker)); \
182 shadow_walk_next(&(_walker)))
184 typedef void (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp, u64 *spte);
186 static struct kmem_cache *pte_chain_cache;
187 static struct kmem_cache *rmap_desc_cache;
188 static struct kmem_cache *mmu_page_header_cache;
189 static struct percpu_counter kvm_total_used_mmu_pages;
191 static u64 __read_mostly shadow_trap_nonpresent_pte;
192 static u64 __read_mostly shadow_notrap_nonpresent_pte;
193 static u64 __read_mostly shadow_base_present_pte;
194 static u64 __read_mostly shadow_nx_mask;
195 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
196 static u64 __read_mostly shadow_user_mask;
197 static u64 __read_mostly shadow_accessed_mask;
198 static u64 __read_mostly shadow_dirty_mask;
200 static inline u64 rsvd_bits(int s, int e)
202 return ((1ULL << (e - s + 1)) - 1) << s;
205 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
207 shadow_trap_nonpresent_pte = trap_pte;
208 shadow_notrap_nonpresent_pte = notrap_pte;
210 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
212 void kvm_mmu_set_base_ptes(u64 base_pte)
214 shadow_base_present_pte = base_pte;
216 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
218 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
219 u64 dirty_mask, u64 nx_mask, u64 x_mask)
221 shadow_user_mask = user_mask;
222 shadow_accessed_mask = accessed_mask;
223 shadow_dirty_mask = dirty_mask;
224 shadow_nx_mask = nx_mask;
225 shadow_x_mask = x_mask;
227 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
229 static bool is_write_protection(struct kvm_vcpu *vcpu)
231 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
234 static int is_cpuid_PSE36(void)
239 static int is_nx(struct kvm_vcpu *vcpu)
241 return vcpu->arch.efer & EFER_NX;
244 static int is_shadow_present_pte(u64 pte)
246 return pte != shadow_trap_nonpresent_pte
247 && pte != shadow_notrap_nonpresent_pte;
250 static int is_large_pte(u64 pte)
252 return pte & PT_PAGE_SIZE_MASK;
255 static int is_writable_pte(unsigned long pte)
257 return pte & PT_WRITABLE_MASK;
260 static int is_dirty_gpte(unsigned long pte)
262 return pte & PT_DIRTY_MASK;
265 static int is_rmap_spte(u64 pte)
267 return is_shadow_present_pte(pte);
270 static int is_last_spte(u64 pte, int level)
272 if (level == PT_PAGE_TABLE_LEVEL)
274 if (is_large_pte(pte))
279 static pfn_t spte_to_pfn(u64 pte)
281 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
284 static gfn_t pse36_gfn_delta(u32 gpte)
286 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
288 return (gpte & PT32_DIR_PSE36_MASK) << shift;
291 static void __set_spte(u64 *sptep, u64 spte)
293 set_64bit(sptep, spte);
296 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
299 return xchg(sptep, new_spte);
305 } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
311 static bool spte_has_volatile_bits(u64 spte)
313 if (!shadow_accessed_mask)
316 if (!is_shadow_present_pte(spte))
319 if ((spte & shadow_accessed_mask) &&
320 (!is_writable_pte(spte) || (spte & shadow_dirty_mask)))
326 static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask)
328 return (old_spte & bit_mask) && !(new_spte & bit_mask);
331 static void update_spte(u64 *sptep, u64 new_spte)
333 u64 mask, old_spte = *sptep;
335 WARN_ON(!is_rmap_spte(new_spte));
337 new_spte |= old_spte & shadow_dirty_mask;
339 mask = shadow_accessed_mask;
340 if (is_writable_pte(old_spte))
341 mask |= shadow_dirty_mask;
343 if (!spte_has_volatile_bits(old_spte) || (new_spte & mask) == mask)
344 __set_spte(sptep, new_spte);
346 old_spte = __xchg_spte(sptep, new_spte);
348 if (!shadow_accessed_mask)
351 if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask))
352 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
353 if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask))
354 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
357 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
358 struct kmem_cache *base_cache, int min)
362 if (cache->nobjs >= min)
364 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
365 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
368 cache->objects[cache->nobjs++] = obj;
373 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
374 struct kmem_cache *cache)
377 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
380 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
385 if (cache->nobjs >= min)
387 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
388 page = alloc_page(GFP_KERNEL);
391 cache->objects[cache->nobjs++] = page_address(page);
396 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
399 free_page((unsigned long)mc->objects[--mc->nobjs]);
402 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
406 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
410 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
411 rmap_desc_cache, 4 + PTE_PREFETCH_NUM);
414 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
417 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
418 mmu_page_header_cache, 4);
423 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
425 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
426 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
427 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
428 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
429 mmu_page_header_cache);
432 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
438 p = mc->objects[--mc->nobjs];
442 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
444 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
445 sizeof(struct kvm_pte_chain));
448 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
450 kmem_cache_free(pte_chain_cache, pc);
453 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
455 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
456 sizeof(struct kvm_rmap_desc));
459 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
461 kmem_cache_free(rmap_desc_cache, rd);
464 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
466 if (!sp->role.direct)
467 return sp->gfns[index];
469 return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
472 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
475 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
477 sp->gfns[index] = gfn;
481 * Return the pointer to the largepage write count for a given
482 * gfn, handling slots that are not large page aligned.
484 static int *slot_largepage_idx(gfn_t gfn,
485 struct kvm_memory_slot *slot,
490 idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
491 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
492 return &slot->lpage_info[level - 2][idx].write_count;
495 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
497 struct kvm_memory_slot *slot;
501 slot = gfn_to_memslot(kvm, gfn);
502 for (i = PT_DIRECTORY_LEVEL;
503 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
504 write_count = slot_largepage_idx(gfn, slot, i);
509 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
511 struct kvm_memory_slot *slot;
515 slot = gfn_to_memslot(kvm, gfn);
516 for (i = PT_DIRECTORY_LEVEL;
517 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
518 write_count = slot_largepage_idx(gfn, slot, i);
520 WARN_ON(*write_count < 0);
524 static int has_wrprotected_page(struct kvm *kvm,
528 struct kvm_memory_slot *slot;
531 slot = gfn_to_memslot(kvm, gfn);
533 largepage_idx = slot_largepage_idx(gfn, slot, level);
534 return *largepage_idx;
540 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
542 unsigned long page_size;
545 page_size = kvm_host_page_size(kvm, gfn);
547 for (i = PT_PAGE_TABLE_LEVEL;
548 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
549 if (page_size >= KVM_HPAGE_SIZE(i))
558 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
560 struct kvm_memory_slot *slot;
561 int host_level, level, max_level;
563 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
564 if (slot && slot->dirty_bitmap)
565 return PT_PAGE_TABLE_LEVEL;
567 host_level = host_mapping_level(vcpu->kvm, large_gfn);
569 if (host_level == PT_PAGE_TABLE_LEVEL)
572 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
573 kvm_x86_ops->get_lpage_level() : host_level;
575 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
576 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
583 * Take gfn and return the reverse mapping to it.
586 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
588 struct kvm_memory_slot *slot;
591 slot = gfn_to_memslot(kvm, gfn);
592 if (likely(level == PT_PAGE_TABLE_LEVEL))
593 return &slot->rmap[gfn - slot->base_gfn];
595 idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
596 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
598 return &slot->lpage_info[level - 2][idx].rmap_pde;
602 * Reverse mapping data structures:
604 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
605 * that points to page_address(page).
607 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
608 * containing more mappings.
610 * Returns the number of rmap entries before the spte was added or zero if
611 * the spte was not added.
614 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
616 struct kvm_mmu_page *sp;
617 struct kvm_rmap_desc *desc;
618 unsigned long *rmapp;
621 if (!is_rmap_spte(*spte))
623 sp = page_header(__pa(spte));
624 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
625 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
627 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
628 *rmapp = (unsigned long)spte;
629 } else if (!(*rmapp & 1)) {
630 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
631 desc = mmu_alloc_rmap_desc(vcpu);
632 desc->sptes[0] = (u64 *)*rmapp;
633 desc->sptes[1] = spte;
634 *rmapp = (unsigned long)desc | 1;
637 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
638 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
639 while (desc->sptes[RMAP_EXT-1] && desc->more) {
643 if (desc->sptes[RMAP_EXT-1]) {
644 desc->more = mmu_alloc_rmap_desc(vcpu);
647 for (i = 0; desc->sptes[i]; ++i)
649 desc->sptes[i] = spte;
654 static void rmap_desc_remove_entry(unsigned long *rmapp,
655 struct kvm_rmap_desc *desc,
657 struct kvm_rmap_desc *prev_desc)
661 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
663 desc->sptes[i] = desc->sptes[j];
664 desc->sptes[j] = NULL;
667 if (!prev_desc && !desc->more)
668 *rmapp = (unsigned long)desc->sptes[0];
671 prev_desc->more = desc->more;
673 *rmapp = (unsigned long)desc->more | 1;
674 mmu_free_rmap_desc(desc);
677 static void rmap_remove(struct kvm *kvm, u64 *spte)
679 struct kvm_rmap_desc *desc;
680 struct kvm_rmap_desc *prev_desc;
681 struct kvm_mmu_page *sp;
683 unsigned long *rmapp;
686 sp = page_header(__pa(spte));
687 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
688 rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
690 printk(KERN_ERR "rmap_remove: %p 0->BUG\n", spte);
692 } else if (!(*rmapp & 1)) {
693 rmap_printk("rmap_remove: %p 1->0\n", spte);
694 if ((u64 *)*rmapp != spte) {
695 printk(KERN_ERR "rmap_remove: %p 1->BUG\n", spte);
700 rmap_printk("rmap_remove: %p many->many\n", spte);
701 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
704 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
705 if (desc->sptes[i] == spte) {
706 rmap_desc_remove_entry(rmapp,
714 pr_err("rmap_remove: %p many->many\n", spte);
719 static void set_spte_track_bits(u64 *sptep, u64 new_spte)
722 u64 old_spte = *sptep;
724 if (!spte_has_volatile_bits(old_spte))
725 __set_spte(sptep, new_spte);
727 old_spte = __xchg_spte(sptep, new_spte);
729 if (!is_rmap_spte(old_spte))
732 pfn = spte_to_pfn(old_spte);
733 if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
734 kvm_set_pfn_accessed(pfn);
735 if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask))
736 kvm_set_pfn_dirty(pfn);
739 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
741 set_spte_track_bits(sptep, new_spte);
742 rmap_remove(kvm, sptep);
745 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
747 struct kvm_rmap_desc *desc;
753 else if (!(*rmapp & 1)) {
755 return (u64 *)*rmapp;
758 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
761 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
762 if (prev_spte == spte)
763 return desc->sptes[i];
764 prev_spte = desc->sptes[i];
771 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
773 unsigned long *rmapp;
775 int i, write_protected = 0;
777 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
779 spte = rmap_next(kvm, rmapp, NULL);
782 BUG_ON(!(*spte & PT_PRESENT_MASK));
783 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
784 if (is_writable_pte(*spte)) {
785 update_spte(spte, *spte & ~PT_WRITABLE_MASK);
788 spte = rmap_next(kvm, rmapp, spte);
791 /* check for huge page mappings */
792 for (i = PT_DIRECTORY_LEVEL;
793 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
794 rmapp = gfn_to_rmap(kvm, gfn, i);
795 spte = rmap_next(kvm, rmapp, NULL);
798 BUG_ON(!(*spte & PT_PRESENT_MASK));
799 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
800 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
801 if (is_writable_pte(*spte)) {
803 shadow_trap_nonpresent_pte);
808 spte = rmap_next(kvm, rmapp, spte);
812 return write_protected;
815 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
819 int need_tlb_flush = 0;
821 while ((spte = rmap_next(kvm, rmapp, NULL))) {
822 BUG_ON(!(*spte & PT_PRESENT_MASK));
823 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
824 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
827 return need_tlb_flush;
830 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
835 pte_t *ptep = (pte_t *)data;
838 WARN_ON(pte_huge(*ptep));
839 new_pfn = pte_pfn(*ptep);
840 spte = rmap_next(kvm, rmapp, NULL);
842 BUG_ON(!is_shadow_present_pte(*spte));
843 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
845 if (pte_write(*ptep)) {
846 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
847 spte = rmap_next(kvm, rmapp, NULL);
849 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
850 new_spte |= (u64)new_pfn << PAGE_SHIFT;
852 new_spte &= ~PT_WRITABLE_MASK;
853 new_spte &= ~SPTE_HOST_WRITEABLE;
854 new_spte &= ~shadow_accessed_mask;
855 set_spte_track_bits(spte, new_spte);
856 spte = rmap_next(kvm, rmapp, spte);
860 kvm_flush_remote_tlbs(kvm);
865 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
867 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
873 struct kvm_memslots *slots;
875 slots = kvm_memslots(kvm);
877 for (i = 0; i < slots->nmemslots; i++) {
878 struct kvm_memory_slot *memslot = &slots->memslots[i];
879 unsigned long start = memslot->userspace_addr;
882 end = start + (memslot->npages << PAGE_SHIFT);
883 if (hva >= start && hva < end) {
884 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
886 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
888 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
892 sh = KVM_HPAGE_GFN_SHIFT(PT_DIRECTORY_LEVEL+j);
893 idx = ((memslot->base_gfn+gfn_offset) >> sh) -
894 (memslot->base_gfn >> sh);
896 &memslot->lpage_info[j][idx].rmap_pde,
899 trace_kvm_age_page(hva, memslot, ret);
907 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
909 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
912 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
914 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
917 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
924 * Emulate the accessed bit for EPT, by checking if this page has
925 * an EPT mapping, and clearing it if it does. On the next access,
926 * a new EPT mapping will be established.
927 * This has some overhead, but not as much as the cost of swapping
928 * out actively used pages or breaking up actively used hugepages.
930 if (!shadow_accessed_mask)
931 return kvm_unmap_rmapp(kvm, rmapp, data);
933 spte = rmap_next(kvm, rmapp, NULL);
937 BUG_ON(!(_spte & PT_PRESENT_MASK));
938 _young = _spte & PT_ACCESSED_MASK;
941 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
943 spte = rmap_next(kvm, rmapp, spte);
948 #define RMAP_RECYCLE_THRESHOLD 1000
950 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
952 unsigned long *rmapp;
953 struct kvm_mmu_page *sp;
955 sp = page_header(__pa(spte));
957 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
959 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
960 kvm_flush_remote_tlbs(vcpu->kvm);
963 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
965 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
969 static int is_empty_shadow_page(u64 *spt)
974 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
975 if (is_shadow_present_pte(*pos)) {
976 printk(KERN_ERR "%s: %p %llx\n", __func__,
985 * This value is the sum of all of the kvm instances's
986 * kvm->arch.n_used_mmu_pages values. We need a global,
987 * aggregate version in order to make the slab shrinker
990 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, int nr)
992 kvm->arch.n_used_mmu_pages += nr;
993 percpu_counter_add(&kvm_total_used_mmu_pages, nr);
996 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
998 ASSERT(is_empty_shadow_page(sp->spt));
999 hlist_del(&sp->hash_link);
1000 list_del(&sp->link);
1001 __free_page(virt_to_page(sp->spt));
1002 if (!sp->role.direct)
1003 __free_page(virt_to_page(sp->gfns));
1004 kmem_cache_free(mmu_page_header_cache, sp);
1005 kvm_mod_used_mmu_pages(kvm, -1);
1008 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1010 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
1013 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
1014 u64 *parent_pte, int direct)
1016 struct kvm_mmu_page *sp;
1018 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
1019 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
1021 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
1023 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1024 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1025 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
1026 sp->multimapped = 0;
1027 sp->parent_pte = parent_pte;
1028 kvm_mod_used_mmu_pages(vcpu->kvm, +1);
1032 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1033 struct kvm_mmu_page *sp, u64 *parent_pte)
1035 struct kvm_pte_chain *pte_chain;
1036 struct hlist_node *node;
1041 if (!sp->multimapped) {
1042 u64 *old = sp->parent_pte;
1045 sp->parent_pte = parent_pte;
1048 sp->multimapped = 1;
1049 pte_chain = mmu_alloc_pte_chain(vcpu);
1050 INIT_HLIST_HEAD(&sp->parent_ptes);
1051 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1052 pte_chain->parent_ptes[0] = old;
1054 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
1055 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
1057 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
1058 if (!pte_chain->parent_ptes[i]) {
1059 pte_chain->parent_ptes[i] = parent_pte;
1063 pte_chain = mmu_alloc_pte_chain(vcpu);
1065 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1066 pte_chain->parent_ptes[0] = parent_pte;
1069 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1072 struct kvm_pte_chain *pte_chain;
1073 struct hlist_node *node;
1076 if (!sp->multimapped) {
1077 BUG_ON(sp->parent_pte != parent_pte);
1078 sp->parent_pte = NULL;
1081 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1082 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1083 if (!pte_chain->parent_ptes[i])
1085 if (pte_chain->parent_ptes[i] != parent_pte)
1087 while (i + 1 < NR_PTE_CHAIN_ENTRIES
1088 && pte_chain->parent_ptes[i + 1]) {
1089 pte_chain->parent_ptes[i]
1090 = pte_chain->parent_ptes[i + 1];
1093 pte_chain->parent_ptes[i] = NULL;
1095 hlist_del(&pte_chain->link);
1096 mmu_free_pte_chain(pte_chain);
1097 if (hlist_empty(&sp->parent_ptes)) {
1098 sp->multimapped = 0;
1099 sp->parent_pte = NULL;
1107 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1109 struct kvm_pte_chain *pte_chain;
1110 struct hlist_node *node;
1111 struct kvm_mmu_page *parent_sp;
1114 if (!sp->multimapped && sp->parent_pte) {
1115 parent_sp = page_header(__pa(sp->parent_pte));
1116 fn(parent_sp, sp->parent_pte);
1120 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1121 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1122 u64 *spte = pte_chain->parent_ptes[i];
1126 parent_sp = page_header(__pa(spte));
1127 fn(parent_sp, spte);
1131 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte);
1132 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1134 mmu_parent_walk(sp, mark_unsync);
1137 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte)
1141 index = spte - sp->spt;
1142 if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1144 if (sp->unsync_children++)
1146 kvm_mmu_mark_parents_unsync(sp);
1149 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1150 struct kvm_mmu_page *sp)
1154 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1155 sp->spt[i] = shadow_trap_nonpresent_pte;
1158 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1159 struct kvm_mmu_page *sp, bool clear_unsync)
1164 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1168 #define KVM_PAGE_ARRAY_NR 16
1170 struct kvm_mmu_pages {
1171 struct mmu_page_and_offset {
1172 struct kvm_mmu_page *sp;
1174 } page[KVM_PAGE_ARRAY_NR];
1178 #define for_each_unsync_children(bitmap, idx) \
1179 for (idx = find_first_bit(bitmap, 512); \
1181 idx = find_next_bit(bitmap, 512, idx+1))
1183 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1189 for (i=0; i < pvec->nr; i++)
1190 if (pvec->page[i].sp == sp)
1193 pvec->page[pvec->nr].sp = sp;
1194 pvec->page[pvec->nr].idx = idx;
1196 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1199 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1200 struct kvm_mmu_pages *pvec)
1202 int i, ret, nr_unsync_leaf = 0;
1204 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1205 struct kvm_mmu_page *child;
1206 u64 ent = sp->spt[i];
1208 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1209 goto clear_child_bitmap;
1211 child = page_header(ent & PT64_BASE_ADDR_MASK);
1213 if (child->unsync_children) {
1214 if (mmu_pages_add(pvec, child, i))
1217 ret = __mmu_unsync_walk(child, pvec);
1219 goto clear_child_bitmap;
1221 nr_unsync_leaf += ret;
1224 } else if (child->unsync) {
1226 if (mmu_pages_add(pvec, child, i))
1229 goto clear_child_bitmap;
1234 __clear_bit(i, sp->unsync_child_bitmap);
1235 sp->unsync_children--;
1236 WARN_ON((int)sp->unsync_children < 0);
1240 return nr_unsync_leaf;
1243 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1244 struct kvm_mmu_pages *pvec)
1246 if (!sp->unsync_children)
1249 mmu_pages_add(pvec, sp, 0);
1250 return __mmu_unsync_walk(sp, pvec);
1253 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1255 WARN_ON(!sp->unsync);
1256 trace_kvm_mmu_sync_page(sp);
1258 --kvm->stat.mmu_unsync;
1261 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1262 struct list_head *invalid_list);
1263 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1264 struct list_head *invalid_list);
1266 #define for_each_gfn_sp(kvm, sp, gfn, pos) \
1267 hlist_for_each_entry(sp, pos, \
1268 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1269 if ((sp)->gfn != (gfn)) {} else
1271 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos) \
1272 hlist_for_each_entry(sp, pos, \
1273 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1274 if ((sp)->gfn != (gfn) || (sp)->role.direct || \
1275 (sp)->role.invalid) {} else
1277 /* @sp->gfn should be write-protected at the call site */
1278 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1279 struct list_head *invalid_list, bool clear_unsync)
1281 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1282 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1287 kvm_unlink_unsync_page(vcpu->kvm, sp);
1289 if (vcpu->arch.mmu.sync_page(vcpu, sp, clear_unsync)) {
1290 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1294 kvm_mmu_flush_tlb(vcpu);
1298 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1299 struct kvm_mmu_page *sp)
1301 LIST_HEAD(invalid_list);
1304 ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1306 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1311 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1312 struct list_head *invalid_list)
1314 return __kvm_sync_page(vcpu, sp, invalid_list, true);
1317 /* @gfn should be write-protected at the call site */
1318 static void kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1320 struct kvm_mmu_page *s;
1321 struct hlist_node *node;
1322 LIST_HEAD(invalid_list);
1325 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1329 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1330 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1331 (vcpu->arch.mmu.sync_page(vcpu, s, true))) {
1332 kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1335 kvm_unlink_unsync_page(vcpu->kvm, s);
1339 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1341 kvm_mmu_flush_tlb(vcpu);
1344 struct mmu_page_path {
1345 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1346 unsigned int idx[PT64_ROOT_LEVEL-1];
1349 #define for_each_sp(pvec, sp, parents, i) \
1350 for (i = mmu_pages_next(&pvec, &parents, -1), \
1351 sp = pvec.page[i].sp; \
1352 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1353 i = mmu_pages_next(&pvec, &parents, i))
1355 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1356 struct mmu_page_path *parents,
1361 for (n = i+1; n < pvec->nr; n++) {
1362 struct kvm_mmu_page *sp = pvec->page[n].sp;
1364 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1365 parents->idx[0] = pvec->page[n].idx;
1369 parents->parent[sp->role.level-2] = sp;
1370 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1376 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1378 struct kvm_mmu_page *sp;
1379 unsigned int level = 0;
1382 unsigned int idx = parents->idx[level];
1384 sp = parents->parent[level];
1388 --sp->unsync_children;
1389 WARN_ON((int)sp->unsync_children < 0);
1390 __clear_bit(idx, sp->unsync_child_bitmap);
1392 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1395 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1396 struct mmu_page_path *parents,
1397 struct kvm_mmu_pages *pvec)
1399 parents->parent[parent->role.level-1] = NULL;
1403 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1404 struct kvm_mmu_page *parent)
1407 struct kvm_mmu_page *sp;
1408 struct mmu_page_path parents;
1409 struct kvm_mmu_pages pages;
1410 LIST_HEAD(invalid_list);
1412 kvm_mmu_pages_init(parent, &parents, &pages);
1413 while (mmu_unsync_walk(parent, &pages)) {
1416 for_each_sp(pages, sp, parents, i)
1417 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1420 kvm_flush_remote_tlbs(vcpu->kvm);
1422 for_each_sp(pages, sp, parents, i) {
1423 kvm_sync_page(vcpu, sp, &invalid_list);
1424 mmu_pages_clear_parents(&parents);
1426 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1427 cond_resched_lock(&vcpu->kvm->mmu_lock);
1428 kvm_mmu_pages_init(parent, &parents, &pages);
1432 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1440 union kvm_mmu_page_role role;
1442 struct kvm_mmu_page *sp;
1443 struct hlist_node *node;
1444 bool need_sync = false;
1446 role = vcpu->arch.mmu.base_role;
1448 role.direct = direct;
1451 role.access = access;
1452 if (!vcpu->arch.mmu.direct_map
1453 && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1454 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1455 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1456 role.quadrant = quadrant;
1458 for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1459 if (!need_sync && sp->unsync)
1462 if (sp->role.word != role.word)
1465 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1468 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1469 if (sp->unsync_children) {
1470 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1471 kvm_mmu_mark_parents_unsync(sp);
1472 } else if (sp->unsync)
1473 kvm_mmu_mark_parents_unsync(sp);
1475 trace_kvm_mmu_get_page(sp, false);
1478 ++vcpu->kvm->stat.mmu_cache_miss;
1479 sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1484 hlist_add_head(&sp->hash_link,
1485 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1487 if (rmap_write_protect(vcpu->kvm, gfn))
1488 kvm_flush_remote_tlbs(vcpu->kvm);
1489 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1490 kvm_sync_pages(vcpu, gfn);
1492 account_shadowed(vcpu->kvm, gfn);
1494 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1495 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1497 nonpaging_prefetch_page(vcpu, sp);
1498 trace_kvm_mmu_get_page(sp, true);
1502 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1503 struct kvm_vcpu *vcpu, u64 addr)
1505 iterator->addr = addr;
1506 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1507 iterator->level = vcpu->arch.mmu.shadow_root_level;
1509 if (iterator->level == PT64_ROOT_LEVEL &&
1510 vcpu->arch.mmu.root_level < PT64_ROOT_LEVEL &&
1511 !vcpu->arch.mmu.direct_map)
1514 if (iterator->level == PT32E_ROOT_LEVEL) {
1515 iterator->shadow_addr
1516 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1517 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1519 if (!iterator->shadow_addr)
1520 iterator->level = 0;
1524 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1526 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1529 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1530 if (is_large_pte(*iterator->sptep))
1533 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1534 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1538 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1540 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1544 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1548 spte = __pa(sp->spt)
1549 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1550 | PT_WRITABLE_MASK | PT_USER_MASK;
1551 __set_spte(sptep, spte);
1554 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1556 if (is_large_pte(*sptep)) {
1557 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1558 kvm_flush_remote_tlbs(vcpu->kvm);
1562 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1563 unsigned direct_access)
1565 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
1566 struct kvm_mmu_page *child;
1569 * For the direct sp, if the guest pte's dirty bit
1570 * changed form clean to dirty, it will corrupt the
1571 * sp's access: allow writable in the read-only sp,
1572 * so we should update the spte at this point to get
1573 * a new sp with the correct access.
1575 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
1576 if (child->role.access == direct_access)
1579 mmu_page_remove_parent_pte(child, sptep);
1580 __set_spte(sptep, shadow_trap_nonpresent_pte);
1581 kvm_flush_remote_tlbs(vcpu->kvm);
1585 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1586 struct kvm_mmu_page *sp)
1594 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1597 if (is_shadow_present_pte(ent)) {
1598 if (!is_last_spte(ent, sp->role.level)) {
1599 ent &= PT64_BASE_ADDR_MASK;
1600 mmu_page_remove_parent_pte(page_header(ent),
1603 if (is_large_pte(ent))
1605 drop_spte(kvm, &pt[i],
1606 shadow_trap_nonpresent_pte);
1609 pt[i] = shadow_trap_nonpresent_pte;
1613 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1615 mmu_page_remove_parent_pte(sp, parent_pte);
1618 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1621 struct kvm_vcpu *vcpu;
1623 kvm_for_each_vcpu(i, vcpu, kvm)
1624 vcpu->arch.last_pte_updated = NULL;
1627 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1631 while (sp->multimapped || sp->parent_pte) {
1632 if (!sp->multimapped)
1633 parent_pte = sp->parent_pte;
1635 struct kvm_pte_chain *chain;
1637 chain = container_of(sp->parent_ptes.first,
1638 struct kvm_pte_chain, link);
1639 parent_pte = chain->parent_ptes[0];
1641 BUG_ON(!parent_pte);
1642 kvm_mmu_put_page(sp, parent_pte);
1643 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1647 static int mmu_zap_unsync_children(struct kvm *kvm,
1648 struct kvm_mmu_page *parent,
1649 struct list_head *invalid_list)
1652 struct mmu_page_path parents;
1653 struct kvm_mmu_pages pages;
1655 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1658 kvm_mmu_pages_init(parent, &parents, &pages);
1659 while (mmu_unsync_walk(parent, &pages)) {
1660 struct kvm_mmu_page *sp;
1662 for_each_sp(pages, sp, parents, i) {
1663 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1664 mmu_pages_clear_parents(&parents);
1667 kvm_mmu_pages_init(parent, &parents, &pages);
1673 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1674 struct list_head *invalid_list)
1678 trace_kvm_mmu_prepare_zap_page(sp);
1679 ++kvm->stat.mmu_shadow_zapped;
1680 ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1681 kvm_mmu_page_unlink_children(kvm, sp);
1682 kvm_mmu_unlink_parents(kvm, sp);
1683 if (!sp->role.invalid && !sp->role.direct)
1684 unaccount_shadowed(kvm, sp->gfn);
1686 kvm_unlink_unsync_page(kvm, sp);
1687 if (!sp->root_count) {
1690 list_move(&sp->link, invalid_list);
1692 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1693 kvm_reload_remote_mmus(kvm);
1696 sp->role.invalid = 1;
1697 kvm_mmu_reset_last_pte_updated(kvm);
1701 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1702 struct list_head *invalid_list)
1704 struct kvm_mmu_page *sp;
1706 if (list_empty(invalid_list))
1709 kvm_flush_remote_tlbs(kvm);
1712 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1713 WARN_ON(!sp->role.invalid || sp->root_count);
1714 kvm_mmu_free_page(kvm, sp);
1715 } while (!list_empty(invalid_list));
1720 * Changing the number of mmu pages allocated to the vm
1721 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
1723 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int goal_nr_mmu_pages)
1725 LIST_HEAD(invalid_list);
1727 * If we set the number of mmu pages to be smaller be than the
1728 * number of actived pages , we must to free some mmu pages before we
1732 if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
1733 while (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages &&
1734 !list_empty(&kvm->arch.active_mmu_pages)) {
1735 struct kvm_mmu_page *page;
1737 page = container_of(kvm->arch.active_mmu_pages.prev,
1738 struct kvm_mmu_page, link);
1739 kvm_mmu_prepare_zap_page(kvm, page, &invalid_list);
1740 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1742 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
1745 kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
1748 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1750 struct kvm_mmu_page *sp;
1751 struct hlist_node *node;
1752 LIST_HEAD(invalid_list);
1755 pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
1758 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1759 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
1762 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1764 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1768 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1770 struct kvm_mmu_page *sp;
1771 struct hlist_node *node;
1772 LIST_HEAD(invalid_list);
1774 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1775 pgprintk("%s: zap %llx %x\n",
1776 __func__, gfn, sp->role.word);
1777 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1779 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1782 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1784 int slot = memslot_id(kvm, gfn);
1785 struct kvm_mmu_page *sp = page_header(__pa(pte));
1787 __set_bit(slot, sp->slot_bitmap);
1790 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1795 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1798 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1799 if (pt[i] == shadow_notrap_nonpresent_pte)
1800 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1805 * The function is based on mtrr_type_lookup() in
1806 * arch/x86/kernel/cpu/mtrr/generic.c
1808 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1813 u8 prev_match, curr_match;
1814 int num_var_ranges = KVM_NR_VAR_MTRR;
1816 if (!mtrr_state->enabled)
1819 /* Make end inclusive end, instead of exclusive */
1822 /* Look in fixed ranges. Just return the type as per start */
1823 if (mtrr_state->have_fixed && (start < 0x100000)) {
1826 if (start < 0x80000) {
1828 idx += (start >> 16);
1829 return mtrr_state->fixed_ranges[idx];
1830 } else if (start < 0xC0000) {
1832 idx += ((start - 0x80000) >> 14);
1833 return mtrr_state->fixed_ranges[idx];
1834 } else if (start < 0x1000000) {
1836 idx += ((start - 0xC0000) >> 12);
1837 return mtrr_state->fixed_ranges[idx];
1842 * Look in variable ranges
1843 * Look of multiple ranges matching this address and pick type
1844 * as per MTRR precedence
1846 if (!(mtrr_state->enabled & 2))
1847 return mtrr_state->def_type;
1850 for (i = 0; i < num_var_ranges; ++i) {
1851 unsigned short start_state, end_state;
1853 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1856 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1857 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1858 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1859 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1861 start_state = ((start & mask) == (base & mask));
1862 end_state = ((end & mask) == (base & mask));
1863 if (start_state != end_state)
1866 if ((start & mask) != (base & mask))
1869 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1870 if (prev_match == 0xFF) {
1871 prev_match = curr_match;
1875 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1876 curr_match == MTRR_TYPE_UNCACHABLE)
1877 return MTRR_TYPE_UNCACHABLE;
1879 if ((prev_match == MTRR_TYPE_WRBACK &&
1880 curr_match == MTRR_TYPE_WRTHROUGH) ||
1881 (prev_match == MTRR_TYPE_WRTHROUGH &&
1882 curr_match == MTRR_TYPE_WRBACK)) {
1883 prev_match = MTRR_TYPE_WRTHROUGH;
1884 curr_match = MTRR_TYPE_WRTHROUGH;
1887 if (prev_match != curr_match)
1888 return MTRR_TYPE_UNCACHABLE;
1891 if (prev_match != 0xFF)
1894 return mtrr_state->def_type;
1897 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1901 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1902 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1903 if (mtrr == 0xfe || mtrr == 0xff)
1904 mtrr = MTRR_TYPE_WRBACK;
1907 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1909 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1911 trace_kvm_mmu_unsync_page(sp);
1912 ++vcpu->kvm->stat.mmu_unsync;
1915 kvm_mmu_mark_parents_unsync(sp);
1916 mmu_convert_notrap(sp);
1919 static void kvm_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1921 struct kvm_mmu_page *s;
1922 struct hlist_node *node;
1924 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1927 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1928 __kvm_unsync_page(vcpu, s);
1932 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1935 struct kvm_mmu_page *s;
1936 struct hlist_node *node;
1937 bool need_unsync = false;
1939 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1943 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1946 if (!need_unsync && !s->unsync) {
1953 kvm_unsync_pages(vcpu, gfn);
1957 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1958 unsigned pte_access, int user_fault,
1959 int write_fault, int dirty, int level,
1960 gfn_t gfn, pfn_t pfn, bool speculative,
1961 bool can_unsync, bool reset_host_protection)
1967 * We don't set the accessed bit, since we sometimes want to see
1968 * whether the guest actually used the pte (in order to detect
1971 spte = shadow_base_present_pte;
1973 spte |= shadow_accessed_mask;
1975 pte_access &= ~ACC_WRITE_MASK;
1976 if (pte_access & ACC_EXEC_MASK)
1977 spte |= shadow_x_mask;
1979 spte |= shadow_nx_mask;
1980 if (pte_access & ACC_USER_MASK)
1981 spte |= shadow_user_mask;
1982 if (level > PT_PAGE_TABLE_LEVEL)
1983 spte |= PT_PAGE_SIZE_MASK;
1985 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1986 kvm_is_mmio_pfn(pfn));
1988 if (reset_host_protection)
1989 spte |= SPTE_HOST_WRITEABLE;
1991 spte |= (u64)pfn << PAGE_SHIFT;
1993 if ((pte_access & ACC_WRITE_MASK)
1994 || (!vcpu->arch.mmu.direct_map && write_fault
1995 && !is_write_protection(vcpu) && !user_fault)) {
1997 if (level > PT_PAGE_TABLE_LEVEL &&
1998 has_wrprotected_page(vcpu->kvm, gfn, level)) {
2000 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2004 spte |= PT_WRITABLE_MASK;
2006 if (!vcpu->arch.mmu.direct_map
2007 && !(pte_access & ACC_WRITE_MASK))
2008 spte &= ~PT_USER_MASK;
2011 * Optimization: for pte sync, if spte was writable the hash
2012 * lookup is unnecessary (and expensive). Write protection
2013 * is responsibility of mmu_get_page / kvm_sync_page.
2014 * Same reasoning can be applied to dirty page accounting.
2016 if (!can_unsync && is_writable_pte(*sptep))
2019 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
2020 pgprintk("%s: found shadow page for %llx, marking ro\n",
2023 pte_access &= ~ACC_WRITE_MASK;
2024 if (is_writable_pte(spte))
2025 spte &= ~PT_WRITABLE_MASK;
2029 if (pte_access & ACC_WRITE_MASK)
2030 mark_page_dirty(vcpu->kvm, gfn);
2033 update_spte(sptep, spte);
2038 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2039 unsigned pt_access, unsigned pte_access,
2040 int user_fault, int write_fault, int dirty,
2041 int *ptwrite, int level, gfn_t gfn,
2042 pfn_t pfn, bool speculative,
2043 bool reset_host_protection)
2045 int was_rmapped = 0;
2048 pgprintk("%s: spte %llx access %x write_fault %d"
2049 " user_fault %d gfn %llx\n",
2050 __func__, *sptep, pt_access,
2051 write_fault, user_fault, gfn);
2053 if (is_rmap_spte(*sptep)) {
2055 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2056 * the parent of the now unreachable PTE.
2058 if (level > PT_PAGE_TABLE_LEVEL &&
2059 !is_large_pte(*sptep)) {
2060 struct kvm_mmu_page *child;
2063 child = page_header(pte & PT64_BASE_ADDR_MASK);
2064 mmu_page_remove_parent_pte(child, sptep);
2065 __set_spte(sptep, shadow_trap_nonpresent_pte);
2066 kvm_flush_remote_tlbs(vcpu->kvm);
2067 } else if (pfn != spte_to_pfn(*sptep)) {
2068 pgprintk("hfn old %llx new %llx\n",
2069 spte_to_pfn(*sptep), pfn);
2070 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2071 kvm_flush_remote_tlbs(vcpu->kvm);
2076 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
2077 dirty, level, gfn, pfn, speculative, true,
2078 reset_host_protection)) {
2081 kvm_mmu_flush_tlb(vcpu);
2084 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2085 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2086 is_large_pte(*sptep)? "2MB" : "4kB",
2087 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2089 if (!was_rmapped && is_large_pte(*sptep))
2090 ++vcpu->kvm->stat.lpages;
2092 page_header_update_slot(vcpu->kvm, sptep, gfn);
2094 rmap_count = rmap_add(vcpu, sptep, gfn);
2095 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2096 rmap_recycle(vcpu, sptep, gfn);
2098 kvm_release_pfn_clean(pfn);
2100 vcpu->arch.last_pte_updated = sptep;
2101 vcpu->arch.last_pte_gfn = gfn;
2105 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2109 static struct kvm_memory_slot *
2110 pte_prefetch_gfn_to_memslot(struct kvm_vcpu *vcpu, gfn_t gfn, bool no_dirty_log)
2112 struct kvm_memory_slot *slot;
2114 slot = gfn_to_memslot(vcpu->kvm, gfn);
2115 if (!slot || slot->flags & KVM_MEMSLOT_INVALID ||
2116 (no_dirty_log && slot->dirty_bitmap))
2122 static pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn,
2125 struct kvm_memory_slot *slot;
2128 slot = pte_prefetch_gfn_to_memslot(vcpu, gfn, no_dirty_log);
2131 return page_to_pfn(bad_page);
2134 hva = gfn_to_hva_memslot(slot, gfn);
2136 return hva_to_pfn_atomic(vcpu->kvm, hva);
2139 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2140 struct kvm_mmu_page *sp,
2141 u64 *start, u64 *end)
2143 struct page *pages[PTE_PREFETCH_NUM];
2144 unsigned access = sp->role.access;
2148 gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt);
2149 if (!pte_prefetch_gfn_to_memslot(vcpu, gfn, access & ACC_WRITE_MASK))
2152 ret = gfn_to_page_many_atomic(vcpu->kvm, gfn, pages, end - start);
2156 for (i = 0; i < ret; i++, gfn++, start++)
2157 mmu_set_spte(vcpu, start, ACC_ALL,
2158 access, 0, 0, 1, NULL,
2159 sp->role.level, gfn,
2160 page_to_pfn(pages[i]), true, true);
2165 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2166 struct kvm_mmu_page *sp, u64 *sptep)
2168 u64 *spte, *start = NULL;
2171 WARN_ON(!sp->role.direct);
2173 i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1);
2176 for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2177 if (*spte != shadow_trap_nonpresent_pte || spte == sptep) {
2180 if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2188 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2190 struct kvm_mmu_page *sp;
2193 * Since it's no accessed bit on EPT, it's no way to
2194 * distinguish between actually accessed translations
2195 * and prefetched, so disable pte prefetch if EPT is
2198 if (!shadow_accessed_mask)
2201 sp = page_header(__pa(sptep));
2202 if (sp->role.level > PT_PAGE_TABLE_LEVEL)
2205 __direct_pte_prefetch(vcpu, sp, sptep);
2208 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2209 int level, gfn_t gfn, pfn_t pfn)
2211 struct kvm_shadow_walk_iterator iterator;
2212 struct kvm_mmu_page *sp;
2216 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2217 if (iterator.level == level) {
2218 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2219 0, write, 1, &pt_write,
2220 level, gfn, pfn, false, true);
2221 direct_pte_prefetch(vcpu, iterator.sptep);
2222 ++vcpu->stat.pf_fixed;
2226 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2227 u64 base_addr = iterator.addr;
2229 base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2230 pseudo_gfn = base_addr >> PAGE_SHIFT;
2231 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2233 1, ACC_ALL, iterator.sptep);
2235 pgprintk("nonpaging_map: ENOMEM\n");
2236 kvm_release_pfn_clean(pfn);
2240 __set_spte(iterator.sptep,
2242 | PT_PRESENT_MASK | PT_WRITABLE_MASK
2243 | shadow_user_mask | shadow_x_mask
2244 | shadow_accessed_mask);
2250 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2256 /* Touch the page, so send SIGBUS */
2257 hva = (void __user *)gfn_to_hva(kvm, gfn);
2258 r = copy_from_user(buf, hva, 1);
2261 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2263 kvm_release_pfn_clean(pfn);
2264 if (is_hwpoison_pfn(pfn)) {
2265 kvm_send_hwpoison_signal(kvm, gfn);
2267 } else if (is_fault_pfn(pfn))
2273 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2278 unsigned long mmu_seq;
2280 level = mapping_level(vcpu, gfn);
2283 * This path builds a PAE pagetable - so we can map 2mb pages at
2284 * maximum. Therefore check if the level is larger than that.
2286 if (level > PT_DIRECTORY_LEVEL)
2287 level = PT_DIRECTORY_LEVEL;
2289 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2291 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2293 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2296 if (is_error_pfn(pfn))
2297 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2299 spin_lock(&vcpu->kvm->mmu_lock);
2300 if (mmu_notifier_retry(vcpu, mmu_seq))
2302 kvm_mmu_free_some_pages(vcpu);
2303 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2304 spin_unlock(&vcpu->kvm->mmu_lock);
2310 spin_unlock(&vcpu->kvm->mmu_lock);
2311 kvm_release_pfn_clean(pfn);
2316 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2319 struct kvm_mmu_page *sp;
2320 LIST_HEAD(invalid_list);
2322 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2324 spin_lock(&vcpu->kvm->mmu_lock);
2325 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL &&
2326 (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL ||
2327 vcpu->arch.mmu.direct_map)) {
2328 hpa_t root = vcpu->arch.mmu.root_hpa;
2330 sp = page_header(root);
2332 if (!sp->root_count && sp->role.invalid) {
2333 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2334 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2336 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2337 spin_unlock(&vcpu->kvm->mmu_lock);
2340 for (i = 0; i < 4; ++i) {
2341 hpa_t root = vcpu->arch.mmu.pae_root[i];
2344 root &= PT64_BASE_ADDR_MASK;
2345 sp = page_header(root);
2347 if (!sp->root_count && sp->role.invalid)
2348 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2351 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2353 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2354 spin_unlock(&vcpu->kvm->mmu_lock);
2355 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2358 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2362 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2363 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2370 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
2372 struct kvm_mmu_page *sp;
2375 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2376 spin_lock(&vcpu->kvm->mmu_lock);
2377 kvm_mmu_free_some_pages(vcpu);
2378 sp = kvm_mmu_get_page(vcpu, 0, 0, PT64_ROOT_LEVEL,
2381 spin_unlock(&vcpu->kvm->mmu_lock);
2382 vcpu->arch.mmu.root_hpa = __pa(sp->spt);
2383 } else if (vcpu->arch.mmu.shadow_root_level == PT32E_ROOT_LEVEL) {
2384 for (i = 0; i < 4; ++i) {
2385 hpa_t root = vcpu->arch.mmu.pae_root[i];
2387 ASSERT(!VALID_PAGE(root));
2388 spin_lock(&vcpu->kvm->mmu_lock);
2389 kvm_mmu_free_some_pages(vcpu);
2390 sp = kvm_mmu_get_page(vcpu, i << 30, i << 30,
2391 PT32_ROOT_LEVEL, 1, ACC_ALL,
2393 root = __pa(sp->spt);
2395 spin_unlock(&vcpu->kvm->mmu_lock);
2396 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2398 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2405 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
2407 struct kvm_mmu_page *sp;
2412 root_gfn = vcpu->arch.mmu.get_cr3(vcpu) >> PAGE_SHIFT;
2414 if (mmu_check_root(vcpu, root_gfn))
2418 * Do we shadow a long mode page table? If so we need to
2419 * write-protect the guests page table root.
2421 if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
2422 hpa_t root = vcpu->arch.mmu.root_hpa;
2424 ASSERT(!VALID_PAGE(root));
2426 spin_lock(&vcpu->kvm->mmu_lock);
2427 kvm_mmu_free_some_pages(vcpu);
2428 sp = kvm_mmu_get_page(vcpu, root_gfn, 0, PT64_ROOT_LEVEL,
2430 root = __pa(sp->spt);
2432 spin_unlock(&vcpu->kvm->mmu_lock);
2433 vcpu->arch.mmu.root_hpa = root;
2438 * We shadow a 32 bit page table. This may be a legacy 2-level
2439 * or a PAE 3-level page table. In either case we need to be aware that
2440 * the shadow page table may be a PAE or a long mode page table.
2442 pm_mask = PT_PRESENT_MASK;
2443 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL)
2444 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
2446 for (i = 0; i < 4; ++i) {
2447 hpa_t root = vcpu->arch.mmu.pae_root[i];
2449 ASSERT(!VALID_PAGE(root));
2450 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2451 pdptr = kvm_pdptr_read_mmu(vcpu, &vcpu->arch.mmu, i);
2452 if (!is_present_gpte(pdptr)) {
2453 vcpu->arch.mmu.pae_root[i] = 0;
2456 root_gfn = pdptr >> PAGE_SHIFT;
2457 if (mmu_check_root(vcpu, root_gfn))
2460 spin_lock(&vcpu->kvm->mmu_lock);
2461 kvm_mmu_free_some_pages(vcpu);
2462 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2465 root = __pa(sp->spt);
2467 spin_unlock(&vcpu->kvm->mmu_lock);
2469 vcpu->arch.mmu.pae_root[i] = root | pm_mask;
2471 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2474 * If we shadow a 32 bit page table with a long mode page
2475 * table we enter this path.
2477 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2478 if (vcpu->arch.mmu.lm_root == NULL) {
2480 * The additional page necessary for this is only
2481 * allocated on demand.
2486 lm_root = (void*)get_zeroed_page(GFP_KERNEL);
2487 if (lm_root == NULL)
2490 lm_root[0] = __pa(vcpu->arch.mmu.pae_root) | pm_mask;
2492 vcpu->arch.mmu.lm_root = lm_root;
2495 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.lm_root);
2501 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2503 if (vcpu->arch.mmu.direct_map)
2504 return mmu_alloc_direct_roots(vcpu);
2506 return mmu_alloc_shadow_roots(vcpu);
2509 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2512 struct kvm_mmu_page *sp;
2514 if (vcpu->arch.mmu.direct_map)
2517 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2519 if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
2520 hpa_t root = vcpu->arch.mmu.root_hpa;
2521 sp = page_header(root);
2522 mmu_sync_children(vcpu, sp);
2525 for (i = 0; i < 4; ++i) {
2526 hpa_t root = vcpu->arch.mmu.pae_root[i];
2528 if (root && VALID_PAGE(root)) {
2529 root &= PT64_BASE_ADDR_MASK;
2530 sp = page_header(root);
2531 mmu_sync_children(vcpu, sp);
2536 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2538 spin_lock(&vcpu->kvm->mmu_lock);
2539 mmu_sync_roots(vcpu);
2540 spin_unlock(&vcpu->kvm->mmu_lock);
2543 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2544 u32 access, u32 *error)
2551 static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gva_t vaddr,
2552 u32 access, u32 *error)
2556 return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access);
2559 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2565 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2566 r = mmu_topup_memory_caches(vcpu);
2571 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2573 gfn = gva >> PAGE_SHIFT;
2575 return nonpaging_map(vcpu, gva & PAGE_MASK,
2576 error_code & PFERR_WRITE_MASK, gfn);
2579 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2585 gfn_t gfn = gpa >> PAGE_SHIFT;
2586 unsigned long mmu_seq;
2589 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2591 r = mmu_topup_memory_caches(vcpu);
2595 level = mapping_level(vcpu, gfn);
2597 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2599 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2601 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2602 if (is_error_pfn(pfn))
2603 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2604 spin_lock(&vcpu->kvm->mmu_lock);
2605 if (mmu_notifier_retry(vcpu, mmu_seq))
2607 kvm_mmu_free_some_pages(vcpu);
2608 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2610 spin_unlock(&vcpu->kvm->mmu_lock);
2615 spin_unlock(&vcpu->kvm->mmu_lock);
2616 kvm_release_pfn_clean(pfn);
2620 static void nonpaging_free(struct kvm_vcpu *vcpu)
2622 mmu_free_roots(vcpu);
2625 static int nonpaging_init_context(struct kvm_vcpu *vcpu,
2626 struct kvm_mmu *context)
2628 context->new_cr3 = nonpaging_new_cr3;
2629 context->page_fault = nonpaging_page_fault;
2630 context->gva_to_gpa = nonpaging_gva_to_gpa;
2631 context->free = nonpaging_free;
2632 context->prefetch_page = nonpaging_prefetch_page;
2633 context->sync_page = nonpaging_sync_page;
2634 context->invlpg = nonpaging_invlpg;
2635 context->root_level = 0;
2636 context->shadow_root_level = PT32E_ROOT_LEVEL;
2637 context->root_hpa = INVALID_PAGE;
2638 context->direct_map = true;
2639 context->nx = false;
2643 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2645 ++vcpu->stat.tlb_flush;
2646 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2649 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2651 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2652 mmu_free_roots(vcpu);
2655 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
2657 return vcpu->arch.cr3;
2660 static void inject_page_fault(struct kvm_vcpu *vcpu)
2662 vcpu->arch.mmu.inject_page_fault(vcpu);
2665 static void paging_free(struct kvm_vcpu *vcpu)
2667 nonpaging_free(vcpu);
2670 static bool is_rsvd_bits_set(struct kvm_mmu *mmu, u64 gpte, int level)
2674 bit7 = (gpte >> 7) & 1;
2675 return (gpte & mmu->rsvd_bits_mask[bit7][level-1]) != 0;
2679 #include "paging_tmpl.h"
2683 #include "paging_tmpl.h"
2686 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
2687 struct kvm_mmu *context,
2690 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2691 u64 exb_bit_rsvd = 0;
2694 exb_bit_rsvd = rsvd_bits(63, 63);
2696 case PT32_ROOT_LEVEL:
2697 /* no rsvd bits for 2 level 4K page table entries */
2698 context->rsvd_bits_mask[0][1] = 0;
2699 context->rsvd_bits_mask[0][0] = 0;
2700 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2702 if (!is_pse(vcpu)) {
2703 context->rsvd_bits_mask[1][1] = 0;
2707 if (is_cpuid_PSE36())
2708 /* 36bits PSE 4MB page */
2709 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2711 /* 32 bits PSE 4MB page */
2712 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2714 case PT32E_ROOT_LEVEL:
2715 context->rsvd_bits_mask[0][2] =
2716 rsvd_bits(maxphyaddr, 63) |
2717 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2718 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2719 rsvd_bits(maxphyaddr, 62); /* PDE */
2720 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2721 rsvd_bits(maxphyaddr, 62); /* PTE */
2722 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2723 rsvd_bits(maxphyaddr, 62) |
2724 rsvd_bits(13, 20); /* large page */
2725 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2727 case PT64_ROOT_LEVEL:
2728 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2729 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2730 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2731 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2732 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2733 rsvd_bits(maxphyaddr, 51);
2734 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2735 rsvd_bits(maxphyaddr, 51);
2736 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2737 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2738 rsvd_bits(maxphyaddr, 51) |
2740 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2741 rsvd_bits(maxphyaddr, 51) |
2742 rsvd_bits(13, 20); /* large page */
2743 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2748 static int paging64_init_context_common(struct kvm_vcpu *vcpu,
2749 struct kvm_mmu *context,
2752 context->nx = is_nx(vcpu);
2754 reset_rsvds_bits_mask(vcpu, context, level);
2756 ASSERT(is_pae(vcpu));
2757 context->new_cr3 = paging_new_cr3;
2758 context->page_fault = paging64_page_fault;
2759 context->gva_to_gpa = paging64_gva_to_gpa;
2760 context->prefetch_page = paging64_prefetch_page;
2761 context->sync_page = paging64_sync_page;
2762 context->invlpg = paging64_invlpg;
2763 context->free = paging_free;
2764 context->root_level = level;
2765 context->shadow_root_level = level;
2766 context->root_hpa = INVALID_PAGE;
2767 context->direct_map = false;
2771 static int paging64_init_context(struct kvm_vcpu *vcpu,
2772 struct kvm_mmu *context)
2774 return paging64_init_context_common(vcpu, context, PT64_ROOT_LEVEL);
2777 static int paging32_init_context(struct kvm_vcpu *vcpu,
2778 struct kvm_mmu *context)
2780 context->nx = false;
2782 reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
2784 context->new_cr3 = paging_new_cr3;
2785 context->page_fault = paging32_page_fault;
2786 context->gva_to_gpa = paging32_gva_to_gpa;
2787 context->free = paging_free;
2788 context->prefetch_page = paging32_prefetch_page;
2789 context->sync_page = paging32_sync_page;
2790 context->invlpg = paging32_invlpg;
2791 context->root_level = PT32_ROOT_LEVEL;
2792 context->shadow_root_level = PT32E_ROOT_LEVEL;
2793 context->root_hpa = INVALID_PAGE;
2794 context->direct_map = false;
2798 static int paging32E_init_context(struct kvm_vcpu *vcpu,
2799 struct kvm_mmu *context)
2801 return paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL);
2804 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2806 struct kvm_mmu *context = vcpu->arch.walk_mmu;
2808 context->new_cr3 = nonpaging_new_cr3;
2809 context->page_fault = tdp_page_fault;
2810 context->free = nonpaging_free;
2811 context->prefetch_page = nonpaging_prefetch_page;
2812 context->sync_page = nonpaging_sync_page;
2813 context->invlpg = nonpaging_invlpg;
2814 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2815 context->root_hpa = INVALID_PAGE;
2816 context->direct_map = true;
2817 context->set_cr3 = kvm_x86_ops->set_tdp_cr3;
2818 context->get_cr3 = get_cr3;
2819 context->inject_page_fault = kvm_inject_page_fault;
2820 context->nx = is_nx(vcpu);
2822 if (!is_paging(vcpu)) {
2823 context->nx = false;
2824 context->gva_to_gpa = nonpaging_gva_to_gpa;
2825 context->root_level = 0;
2826 } else if (is_long_mode(vcpu)) {
2827 context->nx = is_nx(vcpu);
2828 reset_rsvds_bits_mask(vcpu, context, PT64_ROOT_LEVEL);
2829 context->gva_to_gpa = paging64_gva_to_gpa;
2830 context->root_level = PT64_ROOT_LEVEL;
2831 } else if (is_pae(vcpu)) {
2832 context->nx = is_nx(vcpu);
2833 reset_rsvds_bits_mask(vcpu, context, PT32E_ROOT_LEVEL);
2834 context->gva_to_gpa = paging64_gva_to_gpa;
2835 context->root_level = PT32E_ROOT_LEVEL;
2837 context->nx = false;
2838 reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
2839 context->gva_to_gpa = paging32_gva_to_gpa;
2840 context->root_level = PT32_ROOT_LEVEL;
2846 int kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context)
2850 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2852 if (!is_paging(vcpu))
2853 r = nonpaging_init_context(vcpu, context);
2854 else if (is_long_mode(vcpu))
2855 r = paging64_init_context(vcpu, context);
2856 else if (is_pae(vcpu))
2857 r = paging32E_init_context(vcpu, context);
2859 r = paging32_init_context(vcpu, context);
2861 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2862 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2866 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);
2868 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2870 int r = kvm_init_shadow_mmu(vcpu, vcpu->arch.walk_mmu);
2872 vcpu->arch.walk_mmu->set_cr3 = kvm_x86_ops->set_cr3;
2873 vcpu->arch.walk_mmu->get_cr3 = get_cr3;
2874 vcpu->arch.walk_mmu->inject_page_fault = kvm_inject_page_fault;
2879 static int init_kvm_nested_mmu(struct kvm_vcpu *vcpu)
2881 struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
2883 g_context->get_cr3 = get_cr3;
2884 g_context->inject_page_fault = kvm_inject_page_fault;
2887 * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
2888 * translation of l2_gpa to l1_gpa addresses is done using the
2889 * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
2890 * functions between mmu and nested_mmu are swapped.
2892 if (!is_paging(vcpu)) {
2893 g_context->nx = false;
2894 g_context->root_level = 0;
2895 g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested;
2896 } else if (is_long_mode(vcpu)) {
2897 g_context->nx = is_nx(vcpu);
2898 reset_rsvds_bits_mask(vcpu, g_context, PT64_ROOT_LEVEL);
2899 g_context->root_level = PT64_ROOT_LEVEL;
2900 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
2901 } else if (is_pae(vcpu)) {
2902 g_context->nx = is_nx(vcpu);
2903 reset_rsvds_bits_mask(vcpu, g_context, PT32E_ROOT_LEVEL);
2904 g_context->root_level = PT32E_ROOT_LEVEL;
2905 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
2907 g_context->nx = false;
2908 reset_rsvds_bits_mask(vcpu, g_context, PT32_ROOT_LEVEL);
2909 g_context->root_level = PT32_ROOT_LEVEL;
2910 g_context->gva_to_gpa = paging32_gva_to_gpa_nested;
2916 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2918 vcpu->arch.update_pte.pfn = bad_pfn;
2920 if (mmu_is_nested(vcpu))
2921 return init_kvm_nested_mmu(vcpu);
2922 else if (tdp_enabled)
2923 return init_kvm_tdp_mmu(vcpu);
2925 return init_kvm_softmmu(vcpu);
2928 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2931 if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2932 /* mmu.free() should set root_hpa = INVALID_PAGE */
2933 vcpu->arch.mmu.free(vcpu);
2936 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2938 destroy_kvm_mmu(vcpu);
2939 return init_kvm_mmu(vcpu);
2941 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2943 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2947 r = mmu_topup_memory_caches(vcpu);
2950 r = mmu_alloc_roots(vcpu);
2951 spin_lock(&vcpu->kvm->mmu_lock);
2952 mmu_sync_roots(vcpu);
2953 spin_unlock(&vcpu->kvm->mmu_lock);
2956 /* set_cr3() should ensure TLB has been flushed */
2957 vcpu->arch.mmu.set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2961 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2963 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2965 mmu_free_roots(vcpu);
2967 EXPORT_SYMBOL_GPL(kvm_mmu_unload);
2969 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2970 struct kvm_mmu_page *sp,
2974 struct kvm_mmu_page *child;
2977 if (is_shadow_present_pte(pte)) {
2978 if (is_last_spte(pte, sp->role.level))
2979 drop_spte(vcpu->kvm, spte, shadow_trap_nonpresent_pte);
2981 child = page_header(pte & PT64_BASE_ADDR_MASK);
2982 mmu_page_remove_parent_pte(child, spte);
2985 __set_spte(spte, shadow_trap_nonpresent_pte);
2986 if (is_large_pte(pte))
2987 --vcpu->kvm->stat.lpages;
2990 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2991 struct kvm_mmu_page *sp,
2995 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2996 ++vcpu->kvm->stat.mmu_pde_zapped;
3000 if (is_rsvd_bits_set(&vcpu->arch.mmu, *(u64 *)new, PT_PAGE_TABLE_LEVEL))
3003 ++vcpu->kvm->stat.mmu_pte_updated;
3004 if (!sp->role.cr4_pae)
3005 paging32_update_pte(vcpu, sp, spte, new);
3007 paging64_update_pte(vcpu, sp, spte, new);
3010 static bool need_remote_flush(u64 old, u64 new)
3012 if (!is_shadow_present_pte(old))
3014 if (!is_shadow_present_pte(new))
3016 if ((old ^ new) & PT64_BASE_ADDR_MASK)
3018 old ^= PT64_NX_MASK;
3019 new ^= PT64_NX_MASK;
3020 return (old & ~new & PT64_PERM_MASK) != 0;
3023 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
3024 bool remote_flush, bool local_flush)
3030 kvm_flush_remote_tlbs(vcpu->kvm);
3031 else if (local_flush)
3032 kvm_mmu_flush_tlb(vcpu);
3035 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
3037 u64 *spte = vcpu->arch.last_pte_updated;
3039 return !!(spte && (*spte & shadow_accessed_mask));
3042 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
3048 if (!is_present_gpte(gpte))
3050 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
3052 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
3054 pfn = gfn_to_pfn(vcpu->kvm, gfn);
3056 if (is_error_pfn(pfn)) {
3057 kvm_release_pfn_clean(pfn);
3060 vcpu->arch.update_pte.gfn = gfn;
3061 vcpu->arch.update_pte.pfn = pfn;
3064 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
3066 u64 *spte = vcpu->arch.last_pte_updated;
3069 && vcpu->arch.last_pte_gfn == gfn
3070 && shadow_accessed_mask
3071 && !(*spte & shadow_accessed_mask)
3072 && is_shadow_present_pte(*spte))
3073 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
3076 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
3077 const u8 *new, int bytes,
3078 bool guest_initiated)
3080 gfn_t gfn = gpa >> PAGE_SHIFT;
3081 union kvm_mmu_page_role mask = { .word = 0 };
3082 struct kvm_mmu_page *sp;
3083 struct hlist_node *node;
3084 LIST_HEAD(invalid_list);
3087 unsigned offset = offset_in_page(gpa);
3089 unsigned page_offset;
3090 unsigned misaligned;
3097 bool remote_flush, local_flush, zap_page;
3099 zap_page = remote_flush = local_flush = false;
3101 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
3103 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
3106 * Assume that the pte write on a page table of the same type
3107 * as the current vcpu paging mode. This is nearly always true
3108 * (might be false while changing modes). Note it is verified later
3111 if ((is_pae(vcpu) && bytes == 4) || !new) {
3112 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
3117 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
3120 new = (const u8 *)&gentry;
3125 gentry = *(const u32 *)new;
3128 gentry = *(const u64 *)new;
3135 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
3136 spin_lock(&vcpu->kvm->mmu_lock);
3137 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
3139 kvm_mmu_access_page(vcpu, gfn);
3140 kvm_mmu_free_some_pages(vcpu);
3141 ++vcpu->kvm->stat.mmu_pte_write;
3142 trace_kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE);
3143 if (guest_initiated) {
3144 if (gfn == vcpu->arch.last_pt_write_gfn
3145 && !last_updated_pte_accessed(vcpu)) {
3146 ++vcpu->arch.last_pt_write_count;
3147 if (vcpu->arch.last_pt_write_count >= 3)
3150 vcpu->arch.last_pt_write_gfn = gfn;
3151 vcpu->arch.last_pt_write_count = 1;
3152 vcpu->arch.last_pte_updated = NULL;
3156 mask.cr0_wp = mask.cr4_pae = mask.nxe = 1;
3157 for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
3158 pte_size = sp->role.cr4_pae ? 8 : 4;
3159 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
3160 misaligned |= bytes < 4;
3161 if (misaligned || flooded) {
3163 * Misaligned accesses are too much trouble to fix
3164 * up; also, they usually indicate a page is not used
3167 * If we're seeing too many writes to a page,
3168 * it may no longer be a page table, or we may be
3169 * forking, in which case it is better to unmap the
3172 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
3173 gpa, bytes, sp->role.word);
3174 zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
3176 ++vcpu->kvm->stat.mmu_flooded;
3179 page_offset = offset;
3180 level = sp->role.level;
3182 if (!sp->role.cr4_pae) {
3183 page_offset <<= 1; /* 32->64 */
3185 * A 32-bit pde maps 4MB while the shadow pdes map
3186 * only 2MB. So we need to double the offset again
3187 * and zap two pdes instead of one.
3189 if (level == PT32_ROOT_LEVEL) {
3190 page_offset &= ~7; /* kill rounding error */
3194 quadrant = page_offset >> PAGE_SHIFT;
3195 page_offset &= ~PAGE_MASK;
3196 if (quadrant != sp->role.quadrant)
3200 spte = &sp->spt[page_offset / sizeof(*spte)];
3203 mmu_pte_write_zap_pte(vcpu, sp, spte);
3205 !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
3207 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
3208 if (!remote_flush && need_remote_flush(entry, *spte))
3209 remote_flush = true;
3213 mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
3214 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3215 trace_kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE);
3216 spin_unlock(&vcpu->kvm->mmu_lock);
3217 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
3218 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
3219 vcpu->arch.update_pte.pfn = bad_pfn;
3223 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
3228 if (vcpu->arch.mmu.direct_map)
3231 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
3233 spin_lock(&vcpu->kvm->mmu_lock);
3234 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3235 spin_unlock(&vcpu->kvm->mmu_lock);
3238 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
3240 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
3242 LIST_HEAD(invalid_list);
3244 while (kvm_mmu_available_pages(vcpu->kvm) < KVM_REFILL_PAGES &&
3245 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
3246 struct kvm_mmu_page *sp;
3248 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
3249 struct kvm_mmu_page, link);
3250 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
3251 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3252 ++vcpu->kvm->stat.mmu_recycled;
3256 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
3259 enum emulation_result er;
3261 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3270 r = mmu_topup_memory_caches(vcpu);
3274 er = emulate_instruction(vcpu, cr2, error_code, 0);
3279 case EMULATE_DO_MMIO:
3280 ++vcpu->stat.mmio_exits;
3290 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
3292 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
3294 vcpu->arch.mmu.invlpg(vcpu, gva);
3295 kvm_mmu_flush_tlb(vcpu);
3296 ++vcpu->stat.invlpg;
3298 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
3300 void kvm_enable_tdp(void)
3304 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
3306 void kvm_disable_tdp(void)
3308 tdp_enabled = false;
3310 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
3312 static void free_mmu_pages(struct kvm_vcpu *vcpu)
3314 free_page((unsigned long)vcpu->arch.mmu.pae_root);
3315 if (vcpu->arch.mmu.lm_root != NULL)
3316 free_page((unsigned long)vcpu->arch.mmu.lm_root);
3319 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
3327 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3328 * Therefore we need to allocate shadow page tables in the first
3329 * 4GB of memory, which happens to fit the DMA32 zone.
3331 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
3335 vcpu->arch.mmu.pae_root = page_address(page);
3336 for (i = 0; i < 4; ++i)
3337 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3342 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3345 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3347 return alloc_mmu_pages(vcpu);
3350 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3353 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3355 return init_kvm_mmu(vcpu);
3358 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3362 destroy_kvm_mmu(vcpu);
3363 free_mmu_pages(vcpu);
3364 mmu_free_memory_caches(vcpu);
3367 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3369 struct kvm_mmu_page *sp;
3371 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3375 if (!test_bit(slot, sp->slot_bitmap))
3379 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
3381 if (is_writable_pte(pt[i]))
3382 pt[i] &= ~PT_WRITABLE_MASK;
3384 kvm_flush_remote_tlbs(kvm);
3387 void kvm_mmu_zap_all(struct kvm *kvm)
3389 struct kvm_mmu_page *sp, *node;
3390 LIST_HEAD(invalid_list);
3392 spin_lock(&kvm->mmu_lock);
3394 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3395 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3398 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3399 spin_unlock(&kvm->mmu_lock);
3402 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3403 struct list_head *invalid_list)
3405 struct kvm_mmu_page *page;
3407 page = container_of(kvm->arch.active_mmu_pages.prev,
3408 struct kvm_mmu_page, link);
3409 return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3412 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3415 struct kvm *kvm_freed = NULL;
3417 if (nr_to_scan == 0)
3420 spin_lock(&kvm_lock);
3422 list_for_each_entry(kvm, &vm_list, vm_list) {
3423 int idx, freed_pages;
3424 LIST_HEAD(invalid_list);
3426 idx = srcu_read_lock(&kvm->srcu);
3427 spin_lock(&kvm->mmu_lock);
3428 if (!kvm_freed && nr_to_scan > 0 &&
3429 kvm->arch.n_used_mmu_pages > 0) {
3430 freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3436 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3437 spin_unlock(&kvm->mmu_lock);
3438 srcu_read_unlock(&kvm->srcu, idx);
3441 list_move_tail(&kvm_freed->vm_list, &vm_list);
3443 spin_unlock(&kvm_lock);
3446 return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
3449 static struct shrinker mmu_shrinker = {
3450 .shrink = mmu_shrink,
3451 .seeks = DEFAULT_SEEKS * 10,
3454 static void mmu_destroy_caches(void)
3456 if (pte_chain_cache)
3457 kmem_cache_destroy(pte_chain_cache);
3458 if (rmap_desc_cache)
3459 kmem_cache_destroy(rmap_desc_cache);
3460 if (mmu_page_header_cache)
3461 kmem_cache_destroy(mmu_page_header_cache);
3464 void kvm_mmu_module_exit(void)
3466 mmu_destroy_caches();
3467 percpu_counter_destroy(&kvm_total_used_mmu_pages);
3468 unregister_shrinker(&mmu_shrinker);
3471 int kvm_mmu_module_init(void)
3473 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3474 sizeof(struct kvm_pte_chain),
3476 if (!pte_chain_cache)
3478 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3479 sizeof(struct kvm_rmap_desc),
3481 if (!rmap_desc_cache)
3484 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3485 sizeof(struct kvm_mmu_page),
3487 if (!mmu_page_header_cache)
3490 if (percpu_counter_init(&kvm_total_used_mmu_pages, 0))
3493 register_shrinker(&mmu_shrinker);
3498 mmu_destroy_caches();
3503 * Caculate mmu pages needed for kvm.
3505 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3508 unsigned int nr_mmu_pages;
3509 unsigned int nr_pages = 0;
3510 struct kvm_memslots *slots;
3512 slots = kvm_memslots(kvm);
3514 for (i = 0; i < slots->nmemslots; i++)
3515 nr_pages += slots->memslots[i].npages;
3517 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3518 nr_mmu_pages = max(nr_mmu_pages,
3519 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3521 return nr_mmu_pages;
3524 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3527 if (len > buffer->len)
3532 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3537 ret = pv_mmu_peek_buffer(buffer, len);
3542 buffer->processed += len;
3546 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3547 gpa_t addr, gpa_t value)
3552 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3555 r = mmu_topup_memory_caches(vcpu);
3559 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3565 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3567 (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3571 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3573 spin_lock(&vcpu->kvm->mmu_lock);
3574 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3575 spin_unlock(&vcpu->kvm->mmu_lock);
3579 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3580 struct kvm_pv_mmu_op_buffer *buffer)
3582 struct kvm_mmu_op_header *header;
3584 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3587 switch (header->op) {
3588 case KVM_MMU_OP_WRITE_PTE: {
3589 struct kvm_mmu_op_write_pte *wpte;
3591 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3594 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3597 case KVM_MMU_OP_FLUSH_TLB: {
3598 struct kvm_mmu_op_flush_tlb *ftlb;
3600 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3603 return kvm_pv_mmu_flush_tlb(vcpu);
3605 case KVM_MMU_OP_RELEASE_PT: {
3606 struct kvm_mmu_op_release_pt *rpt;
3608 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3611 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3617 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3618 gpa_t addr, unsigned long *ret)
3621 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3623 buffer->ptr = buffer->buf;
3624 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3625 buffer->processed = 0;
3627 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3631 while (buffer->len) {
3632 r = kvm_pv_mmu_op_one(vcpu, buffer);
3641 *ret = buffer->processed;
3645 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3647 struct kvm_shadow_walk_iterator iterator;
3650 spin_lock(&vcpu->kvm->mmu_lock);
3651 for_each_shadow_entry(vcpu, addr, iterator) {
3652 sptes[iterator.level-1] = *iterator.sptep;
3654 if (!is_shadow_present_pte(*iterator.sptep))
3657 spin_unlock(&vcpu->kvm->mmu_lock);
3661 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3663 #ifdef CONFIG_KVM_MMU_AUDIT
3664 #include "mmu_audit.c"