arch/x86/kvm/mmu.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * MMU support
   8  *
   9  * Copyright (C) 2006 Qumranet, Inc.
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Avi Kivity   <avi@qumranet.com>
  15  *
  16  * This work is licensed under the terms of the GNU GPL, version 2.  See
  17  * the COPYING file in the top-level directory.
  18  *
  19  */
  20
  21 #include "irq.h"
  22 #include "mmu.h"
  23 #include "x86.h"
  24 #include "kvm_cache_regs.h"
  25 #include "x86.h"
  26
  27 #include <linux/kvm_host.h>
  28 #include <linux/types.h>
  29 #include <linux/string.h>
  30 #include <linux/mm.h>
  31 #include <linux/highmem.h>
  32 #include <linux/module.h>
  33 #include <linux/swap.h>
  34 #include <linux/hugetlb.h>
  35 #include <linux/compiler.h>
  36 #include <linux/srcu.h>
  37 #include <linux/slab.h>
  38 #include <linux/uaccess.h>
  39
  40 #include <asm/page.h>
  41 #include <asm/cmpxchg.h>
  42 #include <asm/io.h>
  43 #include <asm/vmx.h>
  44
  45 /*
  46  * When setting this variable to true it enables Two-Dimensional-Paging
  47  * where the hardware walks 2 page tables:
  48  * 1. the guest-virtual to guest-physical
  49  * 2. while doing 1. it walks guest-physical to host-physical
  50  * If the hardware supports that we don't need to do shadow paging.
  51  */
  52 bool tdp_enabled = false;
  53
  54 enum {
  55         AUDIT_PRE_PAGE_FAULT,
  56         AUDIT_POST_PAGE_FAULT,
  57         AUDIT_PRE_PTE_WRITE,
  58         AUDIT_POST_PTE_WRITE,
  59         AUDIT_PRE_SYNC,
  60         AUDIT_POST_SYNC
  61 };
  62
  63 char *audit_point_name[] = {
  64         "pre page fault",
  65         "post page fault",
  66         "pre pte write",
  67         "post pte write",
  68         "pre sync",
  69         "post sync"
  70 };
  71
  72 #undef MMU_DEBUG
  73
  74 #ifdef MMU_DEBUG
  75
  76 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  77 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  78
  79 #else
  80
  81 #define pgprintk(x...) do { } while (0)
  82 #define rmap_printk(x...) do { } while (0)
  83
  84 #endif
  85
  86 #ifdef MMU_DEBUG
  87 static int dbg = 0;
  88 module_param(dbg, bool, 0644);
  89 #endif
  90
  91 static int oos_shadow = 1;
  92 module_param(oos_shadow, bool, 0644);
  93
  94 #ifndef MMU_DEBUG
  95 #define ASSERT(x) do { } while (0)
  96 #else
  97 #define ASSERT(x)                                                       \
  98         if (!(x)) {                                                     \
  99                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
 100                        __FILE__, __LINE__, #x);                         \
 101         }
 102 #endif
 103
 104 #define PTE_PREFETCH_NUM                8
 105
 106 #define PT_FIRST_AVAIL_BITS_SHIFT 9
 107 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
 108
 109 #define PT64_LEVEL_BITS 9
 110
 111 #define PT64_LEVEL_SHIFT(level) \
 112                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
 113
 114 #define PT64_INDEX(address, level)\
 115         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
 116
 117
 118 #define PT32_LEVEL_BITS 10
 119
 120 #define PT32_LEVEL_SHIFT(level) \
 121                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
 122
 123 #define PT32_LVL_OFFSET_MASK(level) \
 124         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
 125                                                 * PT32_LEVEL_BITS))) - 1))
 126
 127 #define PT32_INDEX(address, level)\
 128         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
 129
 130
 131 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
 132 #define PT64_DIR_BASE_ADDR_MASK \
 133         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
 134 #define PT64_LVL_ADDR_MASK(level) \
 135         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
 136                                                 * PT64_LEVEL_BITS))) - 1))
 137 #define PT64_LVL_OFFSET_MASK(level) \
 138         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
 139                                                 * PT64_LEVEL_BITS))) - 1))
 140
 141 #define PT32_BASE_ADDR_MASK PAGE_MASK
 142 #define PT32_DIR_BASE_ADDR_MASK \
 143         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
 144 #define PT32_LVL_ADDR_MASK(level) \
 145         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
 146                                             * PT32_LEVEL_BITS))) - 1))
 147
 148 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
 149                         | PT64_NX_MASK)
 150
 151 #define PTE_LIST_EXT 4
 152
 153 #define ACC_EXEC_MASK    1
 154 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
 155 #define ACC_USER_MASK    PT_USER_MASK
 156 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
 157
 158 #include <trace/events/kvm.h>
 159
 160 #define CREATE_TRACE_POINTS
 161 #include "mmutrace.h"
 162
 163 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
 164
 165 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
 166
 167 struct pte_list_desc {
 168         u64 *sptes[PTE_LIST_EXT];
 169         struct pte_list_desc *more;
 170 };
 171
 172 struct kvm_shadow_walk_iterator {
 173         u64 addr;
 174         hpa_t shadow_addr;
 175         int level;
 176         u64 *sptep;
 177         unsigned index;
 178 };
 179
 180 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
 181         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
 182              shadow_walk_okay(&(_walker));                      \
 183              shadow_walk_next(&(_walker)))
 184
 185 static struct kmem_cache *pte_list_desc_cache;
 186 static struct kmem_cache *mmu_page_header_cache;
 187 static struct percpu_counter kvm_total_used_mmu_pages;
 188
 189 static u64 __read_mostly shadow_trap_nonpresent_pte;
 190 static u64 __read_mostly shadow_notrap_nonpresent_pte;
 191 static u64 __read_mostly shadow_nx_mask;
 192 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
 193 static u64 __read_mostly shadow_user_mask;
 194 static u64 __read_mostly shadow_accessed_mask;
 195 static u64 __read_mostly shadow_dirty_mask;
 196
 197 static inline u64 rsvd_bits(int s, int e)
 198 {
 199         return ((1ULL << (e - s + 1)) - 1) << s;
 200 }
 201
 202 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
 203 {
 204         shadow_trap_nonpresent_pte = trap_pte;
 205         shadow_notrap_nonpresent_pte = notrap_pte;
 206 }
 207 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
 208
 209 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
 210                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
 211 {
 212         shadow_user_mask = user_mask;
 213         shadow_accessed_mask = accessed_mask;
 214         shadow_dirty_mask = dirty_mask;
 215         shadow_nx_mask = nx_mask;
 216         shadow_x_mask = x_mask;
 217 }
 218 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
 219
 220 static bool is_write_protection(struct kvm_vcpu *vcpu)
 221 {
 222         return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
 223 }
 224
 225 static int is_cpuid_PSE36(void)
 226 {
 227         return 1;
 228 }
 229
 230 static int is_nx(struct kvm_vcpu *vcpu)
 231 {
 232         return vcpu->arch.efer & EFER_NX;
 233 }
 234
 235 static int is_shadow_present_pte(u64 pte)
 236 {
 237         return pte != shadow_trap_nonpresent_pte
 238                 && pte != shadow_notrap_nonpresent_pte;
 239 }
 240
 241 static int is_large_pte(u64 pte)
 242 {
 243         return pte & PT_PAGE_SIZE_MASK;
 244 }
 245
 246 static int is_writable_pte(unsigned long pte)
 247 {
 248         return pte & PT_WRITABLE_MASK;
 249 }
 250
 251 static int is_dirty_gpte(unsigned long pte)
 252 {
 253         return pte & PT_DIRTY_MASK;
 254 }
 255
 256 static int is_rmap_spte(u64 pte)
 257 {
 258         return is_shadow_present_pte(pte);
 259 }
 260
 261 static int is_last_spte(u64 pte, int level)
 262 {
 263         if (level == PT_PAGE_TABLE_LEVEL)
 264                 return 1;
 265         if (is_large_pte(pte))
 266                 return 1;
 267         return 0;
 268 }
 269
 270 static pfn_t spte_to_pfn(u64 pte)
 271 {
 272         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
 273 }
 274
 275 static gfn_t pse36_gfn_delta(u32 gpte)
 276 {
 277         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
 278
 279         return (gpte & PT32_DIR_PSE36_MASK) << shift;
 280 }
 281
 282 static void __set_spte(u64 *sptep, u64 spte)
 283 {
 284         set_64bit(sptep, spte);
 285 }
 286
 287 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
 288 {
 289 #ifdef CONFIG_X86_64
 290         return xchg(sptep, new_spte);
 291 #else
 292         u64 old_spte;
 293
 294         do {
 295                 old_spte = *sptep;
 296         } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
 297
 298         return old_spte;
 299 #endif
 300 }
 301
 302 static bool spte_has_volatile_bits(u64 spte)
 303 {
 304         if (!shadow_accessed_mask)
 305                 return false;
 306
 307         if (!is_shadow_present_pte(spte))
 308                 return false;
 309
 310         if ((spte & shadow_accessed_mask) &&
 311               (!is_writable_pte(spte) || (spte & shadow_dirty_mask)))
 312                 return false;
 313
 314         return true;
 315 }
 316
 317 static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask)
 318 {
 319         return (old_spte & bit_mask) && !(new_spte & bit_mask);
 320 }
 321
 322 static void update_spte(u64 *sptep, u64 new_spte)
 323 {
 324         u64 mask, old_spte = *sptep;
 325
 326         WARN_ON(!is_rmap_spte(new_spte));
 327
 328         new_spte |= old_spte & shadow_dirty_mask;
 329
 330         mask = shadow_accessed_mask;
 331         if (is_writable_pte(old_spte))
 332                 mask |= shadow_dirty_mask;
 333
 334         if (!spte_has_volatile_bits(old_spte) || (new_spte & mask) == mask)
 335                 __set_spte(sptep, new_spte);
 336         else
 337                 old_spte = __xchg_spte(sptep, new_spte);
 338
 339         if (!shadow_accessed_mask)
 340                 return;
 341
 342         if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask))
 343                 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
 344         if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask))
 345                 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
 346 }
 347
 348 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
 349                                   struct kmem_cache *base_cache, int min)
 350 {
 351         void *obj;
 352
 353         if (cache->nobjs >= min)
 354                 return 0;
 355         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
 356                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
 357                 if (!obj)
 358                         return -ENOMEM;
 359                 cache->objects[cache->nobjs++] = obj;
 360         }
 361         return 0;
 362 }
 363
 364 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
 365                                   struct kmem_cache *cache)
 366 {
 367         while (mc->nobjs)
 368                 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
 369 }
 370
 371 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
 372                                        int min)
 373 {
 374         void *page;
 375
 376         if (cache->nobjs >= min)
 377                 return 0;
 378         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
 379                 page = (void *)__get_free_page(GFP_KERNEL);
 380                 if (!page)
 381                         return -ENOMEM;
 382                 cache->objects[cache->nobjs++] = page;
 383         }
 384         return 0;
 385 }
 386
 387 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
 388 {
 389         while (mc->nobjs)
 390                 free_page((unsigned long)mc->objects[--mc->nobjs]);
 391 }
 392
 393 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
 394 {
 395         int r;
 396
 397         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
 398                                    pte_list_desc_cache, 8 + PTE_PREFETCH_NUM);
 399         if (r)
 400                 goto out;
 401         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
 402         if (r)
 403                 goto out;
 404         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
 405                                    mmu_page_header_cache, 4);
 406 out:
 407         return r;
 408 }
 409
 410 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
 411 {
 412         mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
 413                                 pte_list_desc_cache);
 414         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
 415         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
 416                                 mmu_page_header_cache);
 417 }
 418
 419 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
 420                                     size_t size)
 421 {
 422         void *p;
 423
 424         BUG_ON(!mc->nobjs);
 425         p = mc->objects[--mc->nobjs];
 426         return p;
 427 }
 428
 429 static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu)
 430 {
 431         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache,
 432                                       sizeof(struct pte_list_desc));
 433 }
 434
 435 static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc)
 436 {
 437         kmem_cache_free(pte_list_desc_cache, pte_list_desc);
 438 }
 439
 440 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
 441 {
 442         if (!sp->role.direct)
 443                 return sp->gfns[index];
 444
 445         return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
 446 }
 447
 448 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
 449 {
 450         if (sp->role.direct)
 451                 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
 452         else
 453                 sp->gfns[index] = gfn;
 454 }
 455
 456 /*
 457  * Return the pointer to the large page information for a given gfn,
 458  * handling slots that are not large page aligned.
 459  */
 460 static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn,
 461                                               struct kvm_memory_slot *slot,
 462                                               int level)
 463 {
 464         unsigned long idx;
 465
 466         idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
 467               (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
 468         return &slot->lpage_info[level - 2][idx];
 469 }
 470
 471 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
 472 {
 473         struct kvm_memory_slot *slot;
 474         struct kvm_lpage_info *linfo;
 475         int i;
 476
 477         slot = gfn_to_memslot(kvm, gfn);
 478         for (i = PT_DIRECTORY_LEVEL;
 479              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
 480                 linfo = lpage_info_slot(gfn, slot, i);
 481                 linfo->write_count += 1;
 482         }
 483         kvm->arch.indirect_shadow_pages++;
 484 }
 485
 486 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
 487 {
 488         struct kvm_memory_slot *slot;
 489         struct kvm_lpage_info *linfo;
 490         int i;
 491
 492         slot = gfn_to_memslot(kvm, gfn);
 493         for (i = PT_DIRECTORY_LEVEL;
 494              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
 495                 linfo = lpage_info_slot(gfn, slot, i);
 496                 linfo->write_count -= 1;
 497                 WARN_ON(linfo->write_count < 0);
 498         }
 499         kvm->arch.indirect_shadow_pages--;
 500 }
 501
 502 static int has_wrprotected_page(struct kvm *kvm,
 503                                 gfn_t gfn,
 504                                 int level)
 505 {
 506         struct kvm_memory_slot *slot;
 507         struct kvm_lpage_info *linfo;
 508
 509         slot = gfn_to_memslot(kvm, gfn);
 510         if (slot) {
 511                 linfo = lpage_info_slot(gfn, slot, level);
 512                 return linfo->write_count;
 513         }
 514
 515         return 1;
 516 }
 517
 518 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
 519 {
 520         unsigned long page_size;
 521         int i, ret = 0;
 522
 523         page_size = kvm_host_page_size(kvm, gfn);
 524
 525         for (i = PT_PAGE_TABLE_LEVEL;
 526              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
 527                 if (page_size >= KVM_HPAGE_SIZE(i))
 528                         ret = i;
 529                 else
 530                         break;
 531         }
 532
 533         return ret;
 534 }
 535
 536 static struct kvm_memory_slot *
 537 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn,
 538                             bool no_dirty_log)
 539 {
 540         struct kvm_memory_slot *slot;
 541
 542         slot = gfn_to_memslot(vcpu->kvm, gfn);
 543         if (!slot || slot->flags & KVM_MEMSLOT_INVALID ||
 544               (no_dirty_log && slot->dirty_bitmap))
 545                 slot = NULL;
 546
 547         return slot;
 548 }
 549
 550 static bool mapping_level_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t large_gfn)
 551 {
 552         return !gfn_to_memslot_dirty_bitmap(vcpu, large_gfn, true);
 553 }
 554
 555 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
 556 {
 557         int host_level, level, max_level;
 558
 559         host_level = host_mapping_level(vcpu->kvm, large_gfn);
 560
 561         if (host_level == PT_PAGE_TABLE_LEVEL)
 562                 return host_level;
 563
 564         max_level = kvm_x86_ops->get_lpage_level() < host_level ?
 565                 kvm_x86_ops->get_lpage_level() : host_level;
 566
 567         for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
 568                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
 569                         break;
 570
 571         return level - 1;
 572 }
 573
 574 /*
 575  * Pte mapping structures:
 576  *
 577  * If pte_list bit zero is zero, then pte_list point to the spte.
 578  *
 579  * If pte_list bit zero is one, (then pte_list & ~1) points to a struct
 580  * pte_list_desc containing more mappings.
 581  *
 582  * Returns the number of pte entries before the spte was added or zero if
 583  * the spte was not added.
 584  *
 585  */
 586 static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte,
 587                         unsigned long *pte_list)
 588 {
 589         struct pte_list_desc *desc;
 590         int i, count = 0;
 591
 592         if (!*pte_list) {
 593                 rmap_printk("pte_list_add: %p %llx 0->1\n", spte, *spte);
 594                 *pte_list = (unsigned long)spte;
 595         } else if (!(*pte_list & 1)) {
 596                 rmap_printk("pte_list_add: %p %llx 1->many\n", spte, *spte);
 597                 desc = mmu_alloc_pte_list_desc(vcpu);
 598                 desc->sptes[0] = (u64 *)*pte_list;
 599                 desc->sptes[1] = spte;
 600                 *pte_list = (unsigned long)desc | 1;
 601                 ++count;
 602         } else {
 603                 rmap_printk("pte_list_add: %p %llx many->many\n", spte, *spte);
 604                 desc = (struct pte_list_desc *)(*pte_list & ~1ul);
 605                 while (desc->sptes[PTE_LIST_EXT-1] && desc->more) {
 606                         desc = desc->more;
 607                         count += PTE_LIST_EXT;
 608                 }
 609                 if (desc->sptes[PTE_LIST_EXT-1]) {
 610                         desc->more = mmu_alloc_pte_list_desc(vcpu);
 611                         desc = desc->more;
 612                 }
 613                 for (i = 0; desc->sptes[i]; ++i)
 614                         ++count;
 615                 desc->sptes[i] = spte;
 616         }
 617         return count;
 618 }
 619
 620 static u64 *pte_list_next(unsigned long *pte_list, u64 *spte)
 621 {
 622         struct pte_list_desc *desc;
 623         u64 *prev_spte;
 624         int i;
 625
 626         if (!*pte_list)
 627                 return NULL;
 628         else if (!(*pte_list & 1)) {
 629                 if (!spte)
 630                         return (u64 *)*pte_list;
 631                 return NULL;
 632         }
 633         desc = (struct pte_list_desc *)(*pte_list & ~1ul);
 634         prev_spte = NULL;
 635         while (desc) {
 636                 for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i) {
 637                         if (prev_spte == spte)
 638                                 return desc->sptes[i];
 639                         prev_spte = desc->sptes[i];
 640                 }
 641                 desc = desc->more;
 642         }
 643         return NULL;
 644 }
 645
 646 static void
 647 pte_list_desc_remove_entry(unsigned long *pte_list, struct pte_list_desc *desc,
 648                            int i, struct pte_list_desc *prev_desc)
 649 {
 650         int j;
 651
 652         for (j = PTE_LIST_EXT - 1; !desc->sptes[j] && j > i; --j)
 653                 ;
 654         desc->sptes[i] = desc->sptes[j];
 655         desc->sptes[j] = NULL;
 656         if (j != 0)
 657                 return;
 658         if (!prev_desc && !desc->more)
 659                 *pte_list = (unsigned long)desc->sptes[0];
 660         else
 661                 if (prev_desc)
 662                         prev_desc->more = desc->more;
 663                 else
 664                         *pte_list = (unsigned long)desc->more | 1;
 665         mmu_free_pte_list_desc(desc);
 666 }
 667
 668 static void pte_list_remove(u64 *spte, unsigned long *pte_list)
 669 {
 670         struct pte_list_desc *desc;
 671         struct pte_list_desc *prev_desc;
 672         int i;
 673
 674         if (!*pte_list) {
 675                 printk(KERN_ERR "pte_list_remove: %p 0->BUG\n", spte);
 676                 BUG();
 677         } else if (!(*pte_list & 1)) {
 678                 rmap_printk("pte_list_remove:  %p 1->0\n", spte);
 679                 if ((u64 *)*pte_list != spte) {
 680                         printk(KERN_ERR "pte_list_remove:  %p 1->BUG\n", spte);
 681                         BUG();
 682                 }
 683                 *pte_list = 0;
 684         } else {
 685                 rmap_printk("pte_list_remove:  %p many->many\n", spte);
 686                 desc = (struct pte_list_desc *)(*pte_list & ~1ul);
 687                 prev_desc = NULL;
 688                 while (desc) {
 689                         for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i)
 690                                 if (desc->sptes[i] == spte) {
 691                                         pte_list_desc_remove_entry(pte_list,
 692                                                                desc, i,
 693                                                                prev_desc);
 694                                         return;
 695                                 }
 696                         prev_desc = desc;
 697                         desc = desc->more;
 698                 }
 699                 pr_err("pte_list_remove: %p many->many\n", spte);
 700                 BUG();
 701         }
 702 }
 703
 704 typedef void (*pte_list_walk_fn) (u64 *spte);
 705 static void pte_list_walk(unsigned long *pte_list, pte_list_walk_fn fn)
 706 {
 707         struct pte_list_desc *desc;
 708         int i;
 709
 710         if (!*pte_list)
 711                 return;
 712
 713         if (!(*pte_list & 1))
 714                 return fn((u64 *)*pte_list);
 715
 716         desc = (struct pte_list_desc *)(*pte_list & ~1ul);
 717         while (desc) {
 718                 for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i)
 719                         fn(desc->sptes[i]);
 720                 desc = desc->more;
 721         }
 722 }
 723
 724 /*
 725  * Take gfn and return the reverse mapping to it.
 726  */
 727 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
 728 {
 729         struct kvm_memory_slot *slot;
 730         struct kvm_lpage_info *linfo;
 731
 732         slot = gfn_to_memslot(kvm, gfn);
 733         if (likely(level == PT_PAGE_TABLE_LEVEL))
 734                 return &slot->rmap[gfn - slot->base_gfn];
 735
 736         linfo = lpage_info_slot(gfn, slot, level);
 737
 738         return &linfo->rmap_pde;
 739 }
 740
 741 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
 742 {
 743         struct kvm_mmu_page *sp;
 744         unsigned long *rmapp;
 745
 746         if (!is_rmap_spte(*spte))
 747                 return 0;
 748
 749         sp = page_header(__pa(spte));
 750         kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
 751         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
 752         return pte_list_add(vcpu, spte, rmapp);
 753 }
 754
 755 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
 756 {
 757         return pte_list_next(rmapp, spte);
 758 }
 759
 760 static void rmap_remove(struct kvm *kvm, u64 *spte)
 761 {
 762         struct kvm_mmu_page *sp;
 763         gfn_t gfn;
 764         unsigned long *rmapp;
 765
 766         sp = page_header(__pa(spte));
 767         gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
 768         rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
 769         pte_list_remove(spte, rmapp);
 770 }
 771
 772 static int set_spte_track_bits(u64 *sptep, u64 new_spte)
 773 {
 774         pfn_t pfn;
 775         u64 old_spte = *sptep;
 776
 777         if (!spte_has_volatile_bits(old_spte))
 778                 __set_spte(sptep, new_spte);
 779         else
 780                 old_spte = __xchg_spte(sptep, new_spte);
 781
 782         if (!is_rmap_spte(old_spte))
 783                 return 0;
 784
 785         pfn = spte_to_pfn(old_spte);
 786         if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
 787                 kvm_set_pfn_accessed(pfn);
 788         if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask))
 789                 kvm_set_pfn_dirty(pfn);
 790         return 1;
 791 }
 792
 793 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
 794 {
 795         if (set_spte_track_bits(sptep, new_spte))
 796                 rmap_remove(kvm, sptep);
 797 }
 798
 799 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
 800 {
 801         unsigned long *rmapp;
 802         u64 *spte;
 803         int i, write_protected = 0;
 804
 805         rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
 806
 807         spte = rmap_next(kvm, rmapp, NULL);
 808         while (spte) {
 809                 BUG_ON(!spte);
 810                 BUG_ON(!(*spte & PT_PRESENT_MASK));
 811                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
 812                 if (is_writable_pte(*spte)) {
 813                         update_spte(spte, *spte & ~PT_WRITABLE_MASK);
 814                         write_protected = 1;
 815                 }
 816                 spte = rmap_next(kvm, rmapp, spte);
 817         }
 818
 819         /* check for huge page mappings */
 820         for (i = PT_DIRECTORY_LEVEL;
 821              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
 822                 rmapp = gfn_to_rmap(kvm, gfn, i);
 823                 spte = rmap_next(kvm, rmapp, NULL);
 824                 while (spte) {
 825                         BUG_ON(!spte);
 826                         BUG_ON(!(*spte & PT_PRESENT_MASK));
 827                         BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
 828                         pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
 829                         if (is_writable_pte(*spte)) {
 830                                 drop_spte(kvm, spte,
 831                                           shadow_trap_nonpresent_pte);
 832                                 --kvm->stat.lpages;
 833                                 spte = NULL;
 834                                 write_protected = 1;
 835                         }
 836                         spte = rmap_next(kvm, rmapp, spte);
 837                 }
 838         }
 839
 840         return write_protected;
 841 }
 842
 843 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
 844                            unsigned long data)
 845 {
 846         u64 *spte;
 847         int need_tlb_flush = 0;
 848
 849         while ((spte = rmap_next(kvm, rmapp, NULL))) {
 850                 BUG_ON(!(*spte & PT_PRESENT_MASK));
 851                 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
 852                 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
 853                 need_tlb_flush = 1;
 854         }
 855         return need_tlb_flush;
 856 }
 857
 858 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
 859                              unsigned long data)
 860 {
 861         int need_flush = 0;
 862         u64 *spte, new_spte;
 863         pte_t *ptep = (pte_t *)data;
 864         pfn_t new_pfn;
 865
 866         WARN_ON(pte_huge(*ptep));
 867         new_pfn = pte_pfn(*ptep);
 868         spte = rmap_next(kvm, rmapp, NULL);
 869         while (spte) {
 870                 BUG_ON(!is_shadow_present_pte(*spte));
 871                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
 872                 need_flush = 1;
 873                 if (pte_write(*ptep)) {
 874                         drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
 875                         spte = rmap_next(kvm, rmapp, NULL);
 876                 } else {
 877                         new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
 878                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
 879
 880                         new_spte &= ~PT_WRITABLE_MASK;
 881                         new_spte &= ~SPTE_HOST_WRITEABLE;
 882                         new_spte &= ~shadow_accessed_mask;
 883                         set_spte_track_bits(spte, new_spte);
 884                         spte = rmap_next(kvm, rmapp, spte);
 885                 }
 886         }
 887         if (need_flush)
 888                 kvm_flush_remote_tlbs(kvm);
 889
 890         return 0;
 891 }
 892
 893 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
 894                           unsigned long data,
 895                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
 896                                          unsigned long data))
 897 {
 898         int i, j;
 899         int ret;
 900         int retval = 0;
 901         struct kvm_memslots *slots;
 902
 903         slots = kvm_memslots(kvm);
 904
 905         for (i = 0; i < slots->nmemslots; i++) {
 906                 struct kvm_memory_slot *memslot = &slots->memslots[i];
 907                 unsigned long start = memslot->userspace_addr;
 908                 unsigned long end;
 909
 910                 end = start + (memslot->npages << PAGE_SHIFT);
 911                 if (hva >= start && hva < end) {
 912                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
 913                         gfn_t gfn = memslot->base_gfn + gfn_offset;
 914
 915                         ret = handler(kvm, &memslot->rmap[gfn_offset], data);
 916
 917                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
 918                                 struct kvm_lpage_info *linfo;
 919
 920                                 linfo = lpage_info_slot(gfn, memslot,
 921                                                         PT_DIRECTORY_LEVEL + j);
 922                                 ret |= handler(kvm, &linfo->rmap_pde, data);
 923                         }
 924                         trace_kvm_age_page(hva, memslot, ret);
 925                         retval |= ret;
 926                 }
 927         }
 928
 929         return retval;
 930 }
 931
 932 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
 933 {
 934         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
 935 }
 936
 937 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
 938 {
 939         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
 940 }
 941
 942 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
 943                          unsigned long data)
 944 {
 945         u64 *spte;
 946         int young = 0;
 947
 948         /*
 949          * Emulate the accessed bit for EPT, by checking if this page has
 950          * an EPT mapping, and clearing it if it does. On the next access,
 951          * a new EPT mapping will be established.
 952          * This has some overhead, but not as much as the cost of swapping
 953          * out actively used pages or breaking up actively used hugepages.
 954          */
 955         if (!shadow_accessed_mask)
 956                 return kvm_unmap_rmapp(kvm, rmapp, data);
 957
 958         spte = rmap_next(kvm, rmapp, NULL);
 959         while (spte) {
 960                 int _young;
 961                 u64 _spte = *spte;
 962                 BUG_ON(!(_spte & PT_PRESENT_MASK));
 963                 _young = _spte & PT_ACCESSED_MASK;
 964                 if (_young) {
 965                         young = 1;
 966                         clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
 967                 }
 968                 spte = rmap_next(kvm, rmapp, spte);
 969         }
 970         return young;
 971 }
 972
 973 static int kvm_test_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
 974                               unsigned long data)
 975 {
 976         u64 *spte;
 977         int young = 0;
 978
 979         /*
 980          * If there's no access bit in the secondary pte set by the
 981          * hardware it's up to gup-fast/gup to set the access bit in
 982          * the primary pte or in the page structure.
 983          */
 984         if (!shadow_accessed_mask)
 985                 goto out;
 986
 987         spte = rmap_next(kvm, rmapp, NULL);
 988         while (spte) {
 989                 u64 _spte = *spte;
 990                 BUG_ON(!(_spte & PT_PRESENT_MASK));
 991                 young = _spte & PT_ACCESSED_MASK;
 992                 if (young) {
 993                         young = 1;
 994                         break;
 995                 }
 996                 spte = rmap_next(kvm, rmapp, spte);
 997         }
 998 out:
 999         return young;
1000 }
1001
1002 #define RMAP_RECYCLE_THRESHOLD 1000
1003
1004 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
1005 {
1006         unsigned long *rmapp;
1007         struct kvm_mmu_page *sp;
1008
1009         sp = page_header(__pa(spte));
1010
1011         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
1012
1013         kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
1014         kvm_flush_remote_tlbs(vcpu->kvm);
1015 }
1016
1017 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
1018 {
1019         return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
1020 }
1021
1022 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1023 {
1024         return kvm_handle_hva(kvm, hva, 0, kvm_test_age_rmapp);
1025 }
1026
1027 #ifdef MMU_DEBUG
1028 static int is_empty_shadow_page(u64 *spt)
1029 {
1030         u64 *pos;
1031         u64 *end;
1032
1033         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
1034                 if (is_shadow_present_pte(*pos)) {
1035                         printk(KERN_ERR "%s: %p %llx\n", __func__,
1036                                pos, *pos);
1037                         return 0;
1038                 }
1039         return 1;
1040 }
1041 #endif
1042
1043 /*
1044  * This value is the sum of all of the kvm instances's
1045  * kvm->arch.n_used_mmu_pages values.  We need a global,
1046  * aggregate version in order to make the slab shrinker
1047  * faster
1048  */
1049 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, int nr)
1050 {
1051         kvm->arch.n_used_mmu_pages += nr;
1052         percpu_counter_add(&kvm_total_used_mmu_pages, nr);
1053 }
1054
1055 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1056 {
1057         ASSERT(is_empty_shadow_page(sp->spt));
1058         hlist_del(&sp->hash_link);
1059         list_del(&sp->link);
1060         free_page((unsigned long)sp->spt);
1061         if (!sp->role.direct)
1062                 free_page((unsigned long)sp->gfns);
1063         kmem_cache_free(mmu_page_header_cache, sp);
1064         kvm_mod_used_mmu_pages(kvm, -1);
1065 }
1066
1067 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1068 {
1069         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
1070 }
1071
1072 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1073                                     struct kvm_mmu_page *sp, u64 *parent_pte)
1074 {
1075         if (!parent_pte)
1076                 return;
1077
1078         pte_list_add(vcpu, parent_pte, &sp->parent_ptes);
1079 }
1080
1081 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1082                                        u64 *parent_pte)
1083 {
1084         pte_list_remove(parent_pte, &sp->parent_ptes);
1085 }
1086
1087 static void drop_parent_pte(struct kvm_mmu_page *sp,
1088                             u64 *parent_pte)
1089 {
1090         mmu_page_remove_parent_pte(sp, parent_pte);
1091         __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1092 }
1093
1094 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
1095                                                u64 *parent_pte, int direct)
1096 {
1097         struct kvm_mmu_page *sp;
1098         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache,
1099                                         sizeof *sp);
1100         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
1101         if (!direct)
1102                 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
1103                                                   PAGE_SIZE);
1104         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1105         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1106         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
1107         sp->parent_ptes = 0;
1108         mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1109         kvm_mod_used_mmu_pages(vcpu->kvm, +1);
1110         return sp;
1111 }
1112
1113 static void mark_unsync(u64 *spte);
1114 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1115 {
1116         pte_list_walk(&sp->parent_ptes, mark_unsync);
1117 }
1118
1119 static void mark_unsync(u64 *spte)
1120 {
1121         struct kvm_mmu_page *sp;
1122         unsigned int index;
1123
1124         sp = page_header(__pa(spte));
1125         index = spte - sp->spt;
1126         if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1127                 return;
1128         if (sp->unsync_children++)
1129                 return;
1130         kvm_mmu_mark_parents_unsync(sp);
1131 }
1132
1133 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1134                                     struct kvm_mmu_page *sp)
1135 {
1136         int i;
1137
1138         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1139                 sp->spt[i] = shadow_trap_nonpresent_pte;
1140 }
1141
1142 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1143                                struct kvm_mmu_page *sp)
1144 {
1145         return 1;
1146 }
1147
1148 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1149 {
1150 }
1151
1152 static void nonpaging_update_pte(struct kvm_vcpu *vcpu,
1153                                  struct kvm_mmu_page *sp, u64 *spte,
1154                                  const void *pte)
1155 {
1156         WARN_ON(1);
1157 }
1158
1159 #define KVM_PAGE_ARRAY_NR 16
1160
1161 struct kvm_mmu_pages {
1162         struct mmu_page_and_offset {
1163                 struct kvm_mmu_page *sp;
1164                 unsigned int idx;
1165         } page[KVM_PAGE_ARRAY_NR];
1166         unsigned int nr;
1167 };
1168
1169 #define for_each_unsync_children(bitmap, idx)           \
1170         for (idx = find_first_bit(bitmap, 512);         \
1171              idx < 512;                                 \
1172              idx = find_next_bit(bitmap, 512, idx+1))
1173
1174 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1175                          int idx)
1176 {
1177         int i;
1178
1179         if (sp->unsync)
1180                 for (i=0; i < pvec->nr; i++)
1181                         if (pvec->page[i].sp == sp)
1182                                 return 0;
1183
1184         pvec->page[pvec->nr].sp = sp;
1185         pvec->page[pvec->nr].idx = idx;
1186         pvec->nr++;
1187         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1188 }
1189
1190 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1191                            struct kvm_mmu_pages *pvec)
1192 {
1193         int i, ret, nr_unsync_leaf = 0;
1194
1195         for_each_unsync_children(sp->unsync_child_bitmap, i) {
1196                 struct kvm_mmu_page *child;
1197                 u64 ent = sp->spt[i];
1198
1199                 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1200                         goto clear_child_bitmap;
1201
1202                 child = page_header(ent & PT64_BASE_ADDR_MASK);
1203
1204                 if (child->unsync_children) {
1205                         if (mmu_pages_add(pvec, child, i))
1206                                 return -ENOSPC;
1207
1208                         ret = __mmu_unsync_walk(child, pvec);
1209                         if (!ret)
1210                                 goto clear_child_bitmap;
1211                         else if (ret > 0)
1212                                 nr_unsync_leaf += ret;
1213                         else
1214                                 return ret;
1215                 } else if (child->unsync) {
1216                         nr_unsync_leaf++;
1217                         if (mmu_pages_add(pvec, child, i))
1218                                 return -ENOSPC;
1219                 } else
1220                          goto clear_child_bitmap;
1221
1222                 continue;
1223
1224 clear_child_bitmap:
1225                 __clear_bit(i, sp->unsync_child_bitmap);
1226                 sp->unsync_children--;
1227                 WARN_ON((int)sp->unsync_children < 0);
1228         }
1229
1230
1231         return nr_unsync_leaf;
1232 }
1233
1234 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1235                            struct kvm_mmu_pages *pvec)
1236 {
1237         if (!sp->unsync_children)
1238                 return 0;
1239
1240         mmu_pages_add(pvec, sp, 0);
1241         return __mmu_unsync_walk(sp, pvec);
1242 }
1243
1244 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1245 {
1246         WARN_ON(!sp->unsync);
1247         trace_kvm_mmu_sync_page(sp);
1248         sp->unsync = 0;
1249         --kvm->stat.mmu_unsync;
1250 }
1251
1252 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1253                                     struct list_head *invalid_list);
1254 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1255                                     struct list_head *invalid_list);
1256
1257 #define for_each_gfn_sp(kvm, sp, gfn, pos)                              \
1258   hlist_for_each_entry(sp, pos,                                         \
1259    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1260         if ((sp)->gfn != (gfn)) {} else
1261
1262 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos)               \
1263   hlist_for_each_entry(sp, pos,                                         \
1264    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1265                 if ((sp)->gfn != (gfn) || (sp)->role.direct ||          \
1266                         (sp)->role.invalid) {} else
1267
1268 /* @sp->gfn should be write-protected at the call site */
1269 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1270                            struct list_head *invalid_list, bool clear_unsync)
1271 {
1272         if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1273                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1274                 return 1;
1275         }
1276
1277         if (clear_unsync)
1278                 kvm_unlink_unsync_page(vcpu->kvm, sp);
1279
1280         if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1281                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1282                 return 1;
1283         }
1284
1285         kvm_mmu_flush_tlb(vcpu);
1286         return 0;
1287 }
1288
1289 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1290                                    struct kvm_mmu_page *sp)
1291 {
1292         LIST_HEAD(invalid_list);
1293         int ret;
1294
1295         ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1296         if (ret)
1297                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1298
1299         return ret;
1300 }
1301
1302 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1303                          struct list_head *invalid_list)
1304 {
1305         return __kvm_sync_page(vcpu, sp, invalid_list, true);
1306 }
1307
1308 /* @gfn should be write-protected at the call site */
1309 static void kvm_sync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1310 {
1311         struct kvm_mmu_page *s;
1312         struct hlist_node *node;
1313         LIST_HEAD(invalid_list);
1314         bool flush = false;
1315
1316         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1317                 if (!s->unsync)
1318                         continue;
1319
1320                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1321                 kvm_unlink_unsync_page(vcpu->kvm, s);
1322                 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1323                         (vcpu->arch.mmu.sync_page(vcpu, s))) {
1324                         kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1325                         continue;
1326                 }
1327                 flush = true;
1328         }
1329
1330         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1331         if (flush)
1332                 kvm_mmu_flush_tlb(vcpu);
1333 }
1334
1335 struct mmu_page_path {
1336         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1337         unsigned int idx[PT64_ROOT_LEVEL-1];
1338 };
1339
1340 #define for_each_sp(pvec, sp, parents, i)                       \
1341                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1342                         sp = pvec.page[i].sp;                   \
1343                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1344                         i = mmu_pages_next(&pvec, &parents, i))
1345
1346 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1347                           struct mmu_page_path *parents,
1348                           int i)
1349 {
1350         int n;
1351
1352         for (n = i+1; n < pvec->nr; n++) {
1353                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1354
1355                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1356                         parents->idx[0] = pvec->page[n].idx;
1357                         return n;
1358                 }
1359
1360                 parents->parent[sp->role.level-2] = sp;
1361                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1362         }
1363
1364         return n;
1365 }
1366
1367 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1368 {
1369         struct kvm_mmu_page *sp;
1370         unsigned int level = 0;
1371
1372         do {
1373                 unsigned int idx = parents->idx[level];
1374
1375                 sp = parents->parent[level];
1376                 if (!sp)
1377                         return;
1378
1379                 --sp->unsync_children;
1380                 WARN_ON((int)sp->unsync_children < 0);
1381                 __clear_bit(idx, sp->unsync_child_bitmap);
1382                 level++;
1383         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1384 }
1385
1386 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1387                                struct mmu_page_path *parents,
1388                                struct kvm_mmu_pages *pvec)
1389 {
1390         parents->parent[parent->role.level-1] = NULL;
1391         pvec->nr = 0;
1392 }
1393
1394 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1395                               struct kvm_mmu_page *parent)
1396 {
1397         int i;
1398         struct kvm_mmu_page *sp;
1399         struct mmu_page_path parents;
1400         struct kvm_mmu_pages pages;
1401         LIST_HEAD(invalid_list);
1402
1403         kvm_mmu_pages_init(parent, &parents, &pages);
1404         while (mmu_unsync_walk(parent, &pages)) {
1405                 int protected = 0;
1406
1407                 for_each_sp(pages, sp, parents, i)
1408                         protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1409
1410                 if (protected)
1411                         kvm_flush_remote_tlbs(vcpu->kvm);
1412
1413                 for_each_sp(pages, sp, parents, i) {
1414                         kvm_sync_page(vcpu, sp, &invalid_list);
1415                         mmu_pages_clear_parents(&parents);
1416                 }
1417                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1418                 cond_resched_lock(&vcpu->kvm->mmu_lock);
1419                 kvm_mmu_pages_init(parent, &parents, &pages);
1420         }
1421 }
1422
1423 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1424                                              gfn_t gfn,
1425                                              gva_t gaddr,
1426                                              unsigned level,
1427                                              int direct,
1428                                              unsigned access,
1429                                              u64 *parent_pte)
1430 {
1431         union kvm_mmu_page_role role;
1432         unsigned quadrant;
1433         struct kvm_mmu_page *sp;
1434         struct hlist_node *node;
1435         bool need_sync = false;
1436
1437         role = vcpu->arch.mmu.base_role;
1438         role.level = level;
1439         role.direct = direct;
1440         if (role.direct)
1441                 role.cr4_pae = 0;
1442         role.access = access;
1443         if (!vcpu->arch.mmu.direct_map
1444             && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1445                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1446                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1447                 role.quadrant = quadrant;
1448         }
1449         for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1450                 if (!need_sync && sp->unsync)
1451                         need_sync = true;
1452
1453                 if (sp->role.word != role.word)
1454                         continue;
1455
1456                 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1457                         break;
1458
1459                 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1460                 if (sp->unsync_children) {
1461                         kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1462                         kvm_mmu_mark_parents_unsync(sp);
1463                 } else if (sp->unsync)
1464                         kvm_mmu_mark_parents_unsync(sp);
1465
1466                 trace_kvm_mmu_get_page(sp, false);
1467                 return sp;
1468         }
1469         ++vcpu->kvm->stat.mmu_cache_miss;
1470         sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1471         if (!sp)
1472                 return sp;
1473         sp->gfn = gfn;
1474         sp->role = role;
1475         hlist_add_head(&sp->hash_link,
1476                 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1477         if (!direct) {
1478                 if (rmap_write_protect(vcpu->kvm, gfn))
1479                         kvm_flush_remote_tlbs(vcpu->kvm);
1480                 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1481                         kvm_sync_pages(vcpu, gfn);
1482
1483                 account_shadowed(vcpu->kvm, gfn);
1484         }
1485         if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1486                 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1487         else
1488                 nonpaging_prefetch_page(vcpu, sp);
1489         trace_kvm_mmu_get_page(sp, true);
1490         return sp;
1491 }
1492
1493 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1494                              struct kvm_vcpu *vcpu, u64 addr)
1495 {
1496         iterator->addr = addr;
1497         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1498         iterator->level = vcpu->arch.mmu.shadow_root_level;
1499
1500         if (iterator->level == PT64_ROOT_LEVEL &&
1501             vcpu->arch.mmu.root_level < PT64_ROOT_LEVEL &&
1502             !vcpu->arch.mmu.direct_map)
1503                 --iterator->level;
1504
1505         if (iterator->level == PT32E_ROOT_LEVEL) {
1506                 iterator->shadow_addr
1507                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1508                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1509                 --iterator->level;
1510                 if (!iterator->shadow_addr)
1511                         iterator->level = 0;
1512         }
1513 }
1514
1515 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1516 {
1517         if (iterator->level < PT_PAGE_TABLE_LEVEL)
1518                 return false;
1519
1520         if (iterator->level == PT_PAGE_TABLE_LEVEL)
1521                 if (is_large_pte(*iterator->sptep))
1522                         return false;
1523
1524         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1525         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1526         return true;
1527 }
1528
1529 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1530 {
1531         iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1532         --iterator->level;
1533 }
1534
1535 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1536 {
1537         u64 spte;
1538
1539         spte = __pa(sp->spt)
1540                 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1541                 | PT_WRITABLE_MASK | PT_USER_MASK;
1542         __set_spte(sptep, spte);
1543 }
1544
1545 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1546 {
1547         if (is_large_pte(*sptep)) {
1548                 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1549                 kvm_flush_remote_tlbs(vcpu->kvm);
1550         }
1551 }
1552
1553 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1554                                    unsigned direct_access)
1555 {
1556         if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
1557                 struct kvm_mmu_page *child;
1558
1559                 /*
1560                  * For the direct sp, if the guest pte's dirty bit
1561                  * changed form clean to dirty, it will corrupt the
1562                  * sp's access: allow writable in the read-only sp,
1563                  * so we should update the spte at this point to get
1564                  * a new sp with the correct access.
1565                  */
1566                 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
1567                 if (child->role.access == direct_access)
1568                         return;
1569
1570                 drop_parent_pte(child, sptep);
1571                 kvm_flush_remote_tlbs(vcpu->kvm);
1572         }
1573 }
1574
1575 static void mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp,
1576                              u64 *spte)
1577 {
1578         u64 pte;
1579         struct kvm_mmu_page *child;
1580
1581         pte = *spte;
1582         if (is_shadow_present_pte(pte)) {
1583                 if (is_last_spte(pte, sp->role.level))
1584                         drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
1585                 else {
1586                         child = page_header(pte & PT64_BASE_ADDR_MASK);
1587                         drop_parent_pte(child, spte);
1588                 }
1589         }
1590         __set_spte(spte, shadow_trap_nonpresent_pte);
1591         if (is_large_pte(pte))
1592                 --kvm->stat.lpages;
1593 }
1594
1595 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1596                                          struct kvm_mmu_page *sp)
1597 {
1598         unsigned i;
1599
1600         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1601                 mmu_page_zap_pte(kvm, sp, sp->spt + i);
1602 }
1603
1604 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1605 {
1606         mmu_page_remove_parent_pte(sp, parent_pte);
1607 }
1608
1609 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1610 {
1611         int i;
1612         struct kvm_vcpu *vcpu;
1613
1614         kvm_for_each_vcpu(i, vcpu, kvm)
1615                 vcpu->arch.last_pte_updated = NULL;
1616 }
1617
1618 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1619 {
1620         u64 *parent_pte;
1621
1622         while ((parent_pte = pte_list_next(&sp->parent_ptes, NULL)))
1623                 drop_parent_pte(sp, parent_pte);
1624 }
1625
1626 static int mmu_zap_unsync_children(struct kvm *kvm,
1627                                    struct kvm_mmu_page *parent,
1628                                    struct list_head *invalid_list)
1629 {
1630         int i, zapped = 0;
1631         struct mmu_page_path parents;
1632         struct kvm_mmu_pages pages;
1633
1634         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1635                 return 0;
1636
1637         kvm_mmu_pages_init(parent, &parents, &pages);
1638         while (mmu_unsync_walk(parent, &pages)) {
1639                 struct kvm_mmu_page *sp;
1640
1641                 for_each_sp(pages, sp, parents, i) {
1642                         kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1643                         mmu_pages_clear_parents(&parents);
1644                         zapped++;
1645                 }
1646                 kvm_mmu_pages_init(parent, &parents, &pages);
1647         }
1648
1649         return zapped;
1650 }
1651
1652 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1653                                     struct list_head *invalid_list)
1654 {
1655         int ret;
1656
1657         trace_kvm_mmu_prepare_zap_page(sp);
1658         ++kvm->stat.mmu_shadow_zapped;
1659         ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1660         kvm_mmu_page_unlink_children(kvm, sp);
1661         kvm_mmu_unlink_parents(kvm, sp);
1662         if (!sp->role.invalid && !sp->role.direct)
1663                 unaccount_shadowed(kvm, sp->gfn);
1664         if (sp->unsync)
1665                 kvm_unlink_unsync_page(kvm, sp);
1666         if (!sp->root_count) {
1667                 /* Count self */
1668                 ret++;
1669                 list_move(&sp->link, invalid_list);
1670         } else {
1671                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1672                 kvm_reload_remote_mmus(kvm);
1673         }
1674
1675         sp->role.invalid = 1;
1676         kvm_mmu_reset_last_pte_updated(kvm);
1677         return ret;
1678 }
1679
1680 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1681                                     struct list_head *invalid_list)
1682 {
1683         struct kvm_mmu_page *sp;
1684
1685         if (list_empty(invalid_list))
1686                 return;
1687
1688         kvm_flush_remote_tlbs(kvm);
1689
1690         do {
1691                 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1692                 WARN_ON(!sp->role.invalid || sp->root_count);
1693                 kvm_mmu_free_page(kvm, sp);
1694         } while (!list_empty(invalid_list));
1695
1696 }
1697
1698 /*
1699  * Changing the number of mmu pages allocated to the vm
1700  * Note: if goal_nr_mmu_pages is too small, you will get dead lock
1701  */
1702 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int goal_nr_mmu_pages)
1703 {
1704         LIST_HEAD(invalid_list);
1705         /*
1706          * If we set the number of mmu pages to be smaller be than the
1707          * number of actived pages , we must to free some mmu pages before we
1708          * change the value
1709          */
1710
1711         if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
1712                 while (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages &&
1713                         !list_empty(&kvm->arch.active_mmu_pages)) {
1714                         struct kvm_mmu_page *page;
1715
1716                         page = container_of(kvm->arch.active_mmu_pages.prev,
1717                                             struct kvm_mmu_page, link);
1718                         kvm_mmu_prepare_zap_page(kvm, page, &invalid_list);
1719                         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1720                 }
1721                 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
1722         }
1723
1724         kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
1725 }
1726
1727 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1728 {
1729         struct kvm_mmu_page *sp;
1730         struct hlist_node *node;
1731         LIST_HEAD(invalid_list);
1732         int r;
1733
1734         pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
1735         r = 0;
1736
1737         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1738                 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
1739                          sp->role.word);
1740                 r = 1;
1741                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1742         }
1743         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1744         return r;
1745 }
1746
1747 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1748 {
1749         struct kvm_mmu_page *sp;
1750         struct hlist_node *node;
1751         LIST_HEAD(invalid_list);
1752
1753         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1754                 pgprintk("%s: zap %llx %x\n",
1755                          __func__, gfn, sp->role.word);
1756                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1757         }
1758         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1759 }
1760
1761 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1762 {
1763         int slot = memslot_id(kvm, gfn);
1764         struct kvm_mmu_page *sp = page_header(__pa(pte));
1765
1766         __set_bit(slot, sp->slot_bitmap);
1767 }
1768
1769 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1770 {
1771         int i;
1772         u64 *pt = sp->spt;
1773
1774         if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1775                 return;
1776
1777         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1778                 if (pt[i] == shadow_notrap_nonpresent_pte)
1779                         __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1780         }
1781 }
1782
1783 /*
1784  * The function is based on mtrr_type_lookup() in
1785  * arch/x86/kernel/cpu/mtrr/generic.c
1786  */
1787 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1788                          u64 start, u64 end)
1789 {
1790         int i;
1791         u64 base, mask;
1792         u8 prev_match, curr_match;
1793         int num_var_ranges = KVM_NR_VAR_MTRR;
1794
1795         if (!mtrr_state->enabled)
1796                 return 0xFF;
1797
1798         /* Make end inclusive end, instead of exclusive */
1799         end--;
1800
1801         /* Look in fixed ranges. Just return the type as per start */
1802         if (mtrr_state->have_fixed && (start < 0x100000)) {
1803                 int idx;
1804
1805                 if (start < 0x80000) {
1806                         idx = 0;
1807                         idx += (start >> 16);
1808                         return mtrr_state->fixed_ranges[idx];
1809                 } else if (start < 0xC0000) {
1810                         idx = 1 * 8;
1811                         idx += ((start - 0x80000) >> 14);
1812                         return mtrr_state->fixed_ranges[idx];
1813                 } else if (start < 0x1000000) {
1814                         idx = 3 * 8;
1815                         idx += ((start - 0xC0000) >> 12);
1816                         return mtrr_state->fixed_ranges[idx];
1817                 }
1818         }
1819
1820         /*
1821          * Look in variable ranges
1822          * Look of multiple ranges matching this address and pick type
1823          * as per MTRR precedence
1824          */
1825         if (!(mtrr_state->enabled & 2))
1826                 return mtrr_state->def_type;
1827
1828         prev_match = 0xFF;
1829         for (i = 0; i < num_var_ranges; ++i) {
1830                 unsigned short start_state, end_state;
1831
1832                 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1833                         continue;
1834
1835                 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1836                        (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1837                 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1838                        (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1839
1840                 start_state = ((start & mask) == (base & mask));
1841                 end_state = ((end & mask) == (base & mask));
1842                 if (start_state != end_state)
1843                         return 0xFE;
1844
1845                 if ((start & mask) != (base & mask))
1846                         continue;
1847
1848                 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1849                 if (prev_match == 0xFF) {
1850                         prev_match = curr_match;
1851                         continue;
1852                 }
1853
1854                 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1855                     curr_match == MTRR_TYPE_UNCACHABLE)
1856                         return MTRR_TYPE_UNCACHABLE;
1857
1858                 if ((prev_match == MTRR_TYPE_WRBACK &&
1859                      curr_match == MTRR_TYPE_WRTHROUGH) ||
1860                     (prev_match == MTRR_TYPE_WRTHROUGH &&
1861                      curr_match == MTRR_TYPE_WRBACK)) {
1862                         prev_match = MTRR_TYPE_WRTHROUGH;
1863                         curr_match = MTRR_TYPE_WRTHROUGH;
1864                 }
1865
1866                 if (prev_match != curr_match)
1867                         return MTRR_TYPE_UNCACHABLE;
1868         }
1869
1870         if (prev_match != 0xFF)
1871                 return prev_match;
1872
1873         return mtrr_state->def_type;
1874 }
1875
1876 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1877 {
1878         u8 mtrr;
1879
1880         mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1881                              (gfn << PAGE_SHIFT) + PAGE_SIZE);
1882         if (mtrr == 0xfe || mtrr == 0xff)
1883                 mtrr = MTRR_TYPE_WRBACK;
1884         return mtrr;
1885 }
1886 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1887
1888 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1889 {
1890         trace_kvm_mmu_unsync_page(sp);
1891         ++vcpu->kvm->stat.mmu_unsync;
1892         sp->unsync = 1;
1893
1894         kvm_mmu_mark_parents_unsync(sp);
1895         mmu_convert_notrap(sp);
1896 }
1897
1898 static void kvm_unsync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1899 {
1900         struct kvm_mmu_page *s;
1901         struct hlist_node *node;
1902
1903         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1904                 if (s->unsync)
1905                         continue;
1906                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1907                 __kvm_unsync_page(vcpu, s);
1908         }
1909 }
1910
1911 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1912                                   bool can_unsync)
1913 {
1914         struct kvm_mmu_page *s;
1915         struct hlist_node *node;
1916         bool need_unsync = false;
1917
1918         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1919                 if (!can_unsync)
1920                         return 1;
1921
1922                 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1923                         return 1;
1924
1925                 if (!need_unsync && !s->unsync) {
1926                         if (!oos_shadow)
1927                                 return 1;
1928                         need_unsync = true;
1929                 }
1930         }
1931         if (need_unsync)
1932                 kvm_unsync_pages(vcpu, gfn);
1933         return 0;
1934 }
1935
1936 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1937                     unsigned pte_access, int user_fault,
1938                     int write_fault, int dirty, int level,
1939                     gfn_t gfn, pfn_t pfn, bool speculative,
1940                     bool can_unsync, bool host_writable)
1941 {
1942         u64 spte, entry = *sptep;
1943         int ret = 0;
1944
1945         /*
1946          * We don't set the accessed bit, since we sometimes want to see
1947          * whether the guest actually used the pte (in order to detect
1948          * demand paging).
1949          */
1950         spte = PT_PRESENT_MASK;
1951         if (!speculative)
1952                 spte |= shadow_accessed_mask;
1953         if (!dirty)
1954                 pte_access &= ~ACC_WRITE_MASK;
1955         if (pte_access & ACC_EXEC_MASK)
1956                 spte |= shadow_x_mask;
1957         else
1958                 spte |= shadow_nx_mask;
1959         if (pte_access & ACC_USER_MASK)
1960                 spte |= shadow_user_mask;
1961         if (level > PT_PAGE_TABLE_LEVEL)
1962                 spte |= PT_PAGE_SIZE_MASK;
1963         if (tdp_enabled)
1964                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1965                         kvm_is_mmio_pfn(pfn));
1966
1967         if (host_writable)
1968                 spte |= SPTE_HOST_WRITEABLE;
1969         else
1970                 pte_access &= ~ACC_WRITE_MASK;
1971
1972         spte |= (u64)pfn << PAGE_SHIFT;
1973
1974         if ((pte_access & ACC_WRITE_MASK)
1975             || (!vcpu->arch.mmu.direct_map && write_fault
1976                 && !is_write_protection(vcpu) && !user_fault)) {
1977
1978                 if (level > PT_PAGE_TABLE_LEVEL &&
1979                     has_wrprotected_page(vcpu->kvm, gfn, level)) {
1980                         ret = 1;
1981                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1982                         goto done;
1983                 }
1984
1985                 spte |= PT_WRITABLE_MASK;
1986
1987                 if (!vcpu->arch.mmu.direct_map
1988                     && !(pte_access & ACC_WRITE_MASK)) {
1989                         spte &= ~PT_USER_MASK;
1990                         /*
1991                          * If we converted a user page to a kernel page,
1992                          * so that the kernel can write to it when cr0.wp=0,
1993                          * then we should prevent the kernel from executing it
1994                          * if SMEP is enabled.
1995                          */
1996                         if (kvm_read_cr4_bits(vcpu, X86_CR4_SMEP))
1997                                 spte |= PT64_NX_MASK;
1998                 }
1999
2000                 /*
2001                  * Optimization: for pte sync, if spte was writable the hash
2002                  * lookup is unnecessary (and expensive). Write protection
2003                  * is responsibility of mmu_get_page / kvm_sync_page.
2004                  * Same reasoning can be applied to dirty page accounting.
2005                  */
2006                 if (!can_unsync && is_writable_pte(*sptep))
2007                         goto set_pte;
2008
2009                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
2010                         pgprintk("%s: found shadow page for %llx, marking ro\n",
2011                                  __func__, gfn);
2012                         ret = 1;
2013                         pte_access &= ~ACC_WRITE_MASK;
2014                         if (is_writable_pte(spte))
2015                                 spte &= ~PT_WRITABLE_MASK;
2016                 }
2017         }
2018
2019         if (pte_access & ACC_WRITE_MASK)
2020                 mark_page_dirty(vcpu->kvm, gfn);
2021
2022 set_pte:
2023         update_spte(sptep, spte);
2024         /*
2025          * If we overwrite a writable spte with a read-only one we
2026          * should flush remote TLBs. Otherwise rmap_write_protect
2027          * will find a read-only spte, even though the writable spte
2028          * might be cached on a CPU's TLB.
2029          */
2030         if (is_writable_pte(entry) && !is_writable_pte(*sptep))
2031                 kvm_flush_remote_tlbs(vcpu->kvm);
2032 done:
2033         return ret;
2034 }
2035
2036 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2037                          unsigned pt_access, unsigned pte_access,
2038                          int user_fault, int write_fault, int dirty,
2039                          int *ptwrite, int level, gfn_t gfn,
2040                          pfn_t pfn, bool speculative,
2041                          bool host_writable)
2042 {
2043         int was_rmapped = 0;
2044         int rmap_count;
2045
2046         pgprintk("%s: spte %llx access %x write_fault %d"
2047                  " user_fault %d gfn %llx\n",
2048                  __func__, *sptep, pt_access,
2049                  write_fault, user_fault, gfn);
2050
2051         if (is_rmap_spte(*sptep)) {
2052                 /*
2053                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2054                  * the parent of the now unreachable PTE.
2055                  */
2056                 if (level > PT_PAGE_TABLE_LEVEL &&
2057                     !is_large_pte(*sptep)) {
2058                         struct kvm_mmu_page *child;
2059                         u64 pte = *sptep;
2060
2061                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2062                         drop_parent_pte(child, sptep);
2063                         kvm_flush_remote_tlbs(vcpu->kvm);
2064                 } else if (pfn != spte_to_pfn(*sptep)) {
2065                         pgprintk("hfn old %llx new %llx\n",
2066                                  spte_to_pfn(*sptep), pfn);
2067                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2068                         kvm_flush_remote_tlbs(vcpu->kvm);
2069                 } else
2070                         was_rmapped = 1;
2071         }
2072
2073         if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
2074                       dirty, level, gfn, pfn, speculative, true,
2075                       host_writable)) {
2076                 if (write_fault)
2077                         *ptwrite = 1;
2078                 kvm_mmu_flush_tlb(vcpu);
2079         }
2080
2081         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2082         pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2083                  is_large_pte(*sptep)? "2MB" : "4kB",
2084                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2085                  *sptep, sptep);
2086         if (!was_rmapped && is_large_pte(*sptep))
2087                 ++vcpu->kvm->stat.lpages;
2088
2089         page_header_update_slot(vcpu->kvm, sptep, gfn);
2090         if (!was_rmapped) {
2091                 rmap_count = rmap_add(vcpu, sptep, gfn);
2092                 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2093                         rmap_recycle(vcpu, sptep, gfn);
2094         }
2095         kvm_release_pfn_clean(pfn);
2096         if (speculative) {
2097                 vcpu->arch.last_pte_updated = sptep;
2098                 vcpu->arch.last_pte_gfn = gfn;
2099         }
2100 }
2101
2102 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2103 {
2104 }
2105
2106 static pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn,
2107                                      bool no_dirty_log)
2108 {
2109         struct kvm_memory_slot *slot;
2110         unsigned long hva;
2111
2112         slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, no_dirty_log);
2113         if (!slot) {
2114                 get_page(bad_page);
2115                 return page_to_pfn(bad_page);
2116         }
2117
2118         hva = gfn_to_hva_memslot(slot, gfn);
2119
2120         return hva_to_pfn_atomic(vcpu->kvm, hva);
2121 }
2122
2123 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2124                                     struct kvm_mmu_page *sp,
2125                                     u64 *start, u64 *end)
2126 {
2127         struct page *pages[PTE_PREFETCH_NUM];
2128         unsigned access = sp->role.access;
2129         int i, ret;
2130         gfn_t gfn;
2131
2132         gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt);
2133         if (!gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK))
2134                 return -1;
2135
2136         ret = gfn_to_page_many_atomic(vcpu->kvm, gfn, pages, end - start);
2137         if (ret <= 0)
2138                 return -1;
2139
2140         for (i = 0; i < ret; i++, gfn++, start++)
2141                 mmu_set_spte(vcpu, start, ACC_ALL,
2142                              access, 0, 0, 1, NULL,
2143                              sp->role.level, gfn,
2144                              page_to_pfn(pages[i]), true, true);
2145
2146         return 0;
2147 }
2148
2149 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2150                                   struct kvm_mmu_page *sp, u64 *sptep)
2151 {
2152         u64 *spte, *start = NULL;
2153         int i;
2154
2155         WARN_ON(!sp->role.direct);
2156
2157         i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1);
2158         spte = sp->spt + i;
2159
2160         for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2161                 if (*spte != shadow_trap_nonpresent_pte || spte == sptep) {
2162                         if (!start)
2163                                 continue;
2164                         if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2165                                 break;
2166                         start = NULL;
2167                 } else if (!start)
2168                         start = spte;
2169         }
2170 }
2171
2172 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2173 {
2174         struct kvm_mmu_page *sp;
2175
2176         /*
2177          * Since it's no accessed bit on EPT, it's no way to
2178          * distinguish between actually accessed translations
2179          * and prefetched, so disable pte prefetch if EPT is
2180          * enabled.
2181          */
2182         if (!shadow_accessed_mask)
2183                 return;
2184
2185         sp = page_header(__pa(sptep));
2186         if (sp->role.level > PT_PAGE_TABLE_LEVEL)
2187                 return;
2188
2189         __direct_pte_prefetch(vcpu, sp, sptep);
2190 }
2191
2192 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2193                         int map_writable, int level, gfn_t gfn, pfn_t pfn,
2194                         bool prefault)
2195 {
2196         struct kvm_shadow_walk_iterator iterator;
2197         struct kvm_mmu_page *sp;
2198         int pt_write = 0;
2199         gfn_t pseudo_gfn;
2200
2201         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2202                 if (iterator.level == level) {
2203                         unsigned pte_access = ACC_ALL;
2204
2205                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, pte_access,
2206                                      0, write, 1, &pt_write,
2207                                      level, gfn, pfn, prefault, map_writable);
2208                         direct_pte_prefetch(vcpu, iterator.sptep);
2209                         ++vcpu->stat.pf_fixed;
2210                         break;
2211                 }
2212
2213                 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2214                         u64 base_addr = iterator.addr;
2215
2216                         base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2217                         pseudo_gfn = base_addr >> PAGE_SHIFT;
2218                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2219                                               iterator.level - 1,
2220                                               1, ACC_ALL, iterator.sptep);
2221                         if (!sp) {
2222                                 pgprintk("nonpaging_map: ENOMEM\n");
2223                                 kvm_release_pfn_clean(pfn);
2224                                 return -ENOMEM;
2225                         }
2226
2227                         __set_spte(iterator.sptep,
2228                                    __pa(sp->spt)
2229                                    | PT_PRESENT_MASK | PT_WRITABLE_MASK
2230                                    | shadow_user_mask | shadow_x_mask
2231                                    | shadow_accessed_mask);
2232                 }
2233         }
2234         return pt_write;
2235 }
2236
2237 static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk)
2238 {
2239         siginfo_t info;
2240
2241         info.si_signo   = SIGBUS;
2242         info.si_errno   = 0;
2243         info.si_code    = BUS_MCEERR_AR;
2244         info.si_addr    = (void __user *)address;
2245         info.si_addr_lsb = PAGE_SHIFT;
2246
2247         send_sig_info(SIGBUS, &info, tsk);
2248 }
2249
2250 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2251 {
2252         kvm_release_pfn_clean(pfn);
2253         if (is_hwpoison_pfn(pfn)) {
2254                 kvm_send_hwpoison_signal(gfn_to_hva(kvm, gfn), current);
2255                 return 0;
2256         } else if (is_fault_pfn(pfn))
2257                 return -EFAULT;
2258
2259         return 1;
2260 }
2261
2262 static void transparent_hugepage_adjust(struct kvm_vcpu *vcpu,
2263                                         gfn_t *gfnp, pfn_t *pfnp, int *levelp)
2264 {
2265         pfn_t pfn = *pfnp;
2266         gfn_t gfn = *gfnp;
2267         int level = *levelp;
2268
2269         /*
2270          * Check if it's a transparent hugepage. If this would be an
2271          * hugetlbfs page, level wouldn't be set to
2272          * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2273          * here.
2274          */
2275         if (!is_error_pfn(pfn) && !kvm_is_mmio_pfn(pfn) &&
2276             level == PT_PAGE_TABLE_LEVEL &&
2277             PageTransCompound(pfn_to_page(pfn)) &&
2278             !has_wrprotected_page(vcpu->kvm, gfn, PT_DIRECTORY_LEVEL)) {
2279                 unsigned long mask;
2280                 /*
2281                  * mmu_notifier_retry was successful and we hold the
2282                  * mmu_lock here, so the pmd can't become splitting
2283                  * from under us, and in turn
2284                  * __split_huge_page_refcount() can't run from under
2285                  * us and we can safely transfer the refcount from
2286                  * PG_tail to PG_head as we switch the pfn to tail to
2287                  * head.
2288                  */
2289                 *levelp = level = PT_DIRECTORY_LEVEL;
2290                 mask = KVM_PAGES_PER_HPAGE(level) - 1;
2291                 VM_BUG_ON((gfn & mask) != (pfn & mask));
2292                 if (pfn & mask) {
2293                         gfn &= ~mask;
2294                         *gfnp = gfn;
2295                         kvm_release_pfn_clean(pfn);
2296                         pfn &= ~mask;
2297                         if (!get_page_unless_zero(pfn_to_page(pfn)))
2298                                 BUG();
2299                         *pfnp = pfn;
2300                 }
2301         }
2302 }
2303
2304 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
2305                          gva_t gva, pfn_t *pfn, bool write, bool *writable);
2306
2307 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn,
2308                          bool prefault)
2309 {
2310         int r;
2311         int level;
2312         int force_pt_level;
2313         pfn_t pfn;
2314         unsigned long mmu_seq;
2315         bool map_writable;
2316
2317         force_pt_level = mapping_level_dirty_bitmap(vcpu, gfn);
2318         if (likely(!force_pt_level)) {
2319                 level = mapping_level(vcpu, gfn);
2320                 /*
2321                  * This path builds a PAE pagetable - so we can map
2322                  * 2mb pages at maximum. Therefore check if the level
2323                  * is larger than that.
2324                  */
2325                 if (level > PT_DIRECTORY_LEVEL)
2326                         level = PT_DIRECTORY_LEVEL;
2327
2328                 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2329         } else
2330                 level = PT_PAGE_TABLE_LEVEL;
2331
2332         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2333         smp_rmb();
2334
2335         if (try_async_pf(vcpu, prefault, gfn, v, &pfn, write, &map_writable))
2336                 return 0;
2337
2338         /* mmio */
2339         if (is_error_pfn(pfn))
2340                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2341
2342         spin_lock(&vcpu->kvm->mmu_lock);
2343         if (mmu_notifier_retry(vcpu, mmu_seq))
2344                 goto out_unlock;
2345         kvm_mmu_free_some_pages(vcpu);
2346         if (likely(!force_pt_level))
2347                 transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level);
2348         r = __direct_map(vcpu, v, write, map_writable, level, gfn, pfn,
2349                          prefault);
2350         spin_unlock(&vcpu->kvm->mmu_lock);
2351
2352
2353         return r;
2354
2355 out_unlock:
2356         spin_unlock(&vcpu->kvm->mmu_lock);
2357         kvm_release_pfn_clean(pfn);
2358         return 0;
2359 }
2360
2361
2362 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2363 {
2364         int i;
2365         struct kvm_mmu_page *sp;
2366         LIST_HEAD(invalid_list);
2367
2368         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2369                 return;
2370         spin_lock(&vcpu->kvm->mmu_lock);
2371         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL &&
2372             (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL ||
2373              vcpu->arch.mmu.direct_map)) {
2374                 hpa_t root = vcpu->arch.mmu.root_hpa;
2375
2376                 sp = page_header(root);
2377                 --sp->root_count;
2378                 if (!sp->root_count && sp->role.invalid) {
2379                         kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2380                         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2381                 }
2382                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2383                 spin_unlock(&vcpu->kvm->mmu_lock);
2384                 return;
2385         }
2386         for (i = 0; i < 4; ++i) {
2387                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2388
2389                 if (root) {
2390                         root &= PT64_BASE_ADDR_MASK;
2391                         sp = page_header(root);
2392                         --sp->root_count;
2393                         if (!sp->root_count && sp->role.invalid)
2394                                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2395                                                          &invalid_list);
2396                 }
2397                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2398         }
2399         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2400         spin_unlock(&vcpu->kvm->mmu_lock);
2401         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2402 }
2403
2404 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2405 {
2406         int ret = 0;
2407
2408         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2409                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2410                 ret = 1;
2411         }
2412
2413         return ret;
2414 }
2415
2416 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
2417 {
2418         struct kvm_mmu_page *sp;
2419         unsigned i;
2420
2421         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2422                 spin_lock(&vcpu->kvm->mmu_lock);
2423                 kvm_mmu_free_some_pages(vcpu);
2424                 sp = kvm_mmu_get_page(vcpu, 0, 0, PT64_ROOT_LEVEL,
2425                                       1, ACC_ALL, NULL);
2426                 ++sp->root_count;
2427                 spin_unlock(&vcpu->kvm->mmu_lock);
2428                 vcpu->arch.mmu.root_hpa = __pa(sp->spt);
2429         } else if (vcpu->arch.mmu.shadow_root_level == PT32E_ROOT_LEVEL) {
2430                 for (i = 0; i < 4; ++i) {
2431                         hpa_t root = vcpu->arch.mmu.pae_root[i];
2432
2433                         ASSERT(!VALID_PAGE(root));
2434                         spin_lock(&vcpu->kvm->mmu_lock);
2435                         kvm_mmu_free_some_pages(vcpu);
2436                         sp = kvm_mmu_get_page(vcpu, i << (30 - PAGE_SHIFT),
2437                                               i << 30,
2438                                               PT32_ROOT_LEVEL, 1, ACC_ALL,
2439                                               NULL);
2440                         root = __pa(sp->spt);
2441                         ++sp->root_count;
2442                         spin_unlock(&vcpu->kvm->mmu_lock);
2443                         vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2444                 }
2445                 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2446         } else
2447                 BUG();
2448
2449         return 0;
2450 }
2451
2452 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
2453 {
2454         struct kvm_mmu_page *sp;
2455         u64 pdptr, pm_mask;
2456         gfn_t root_gfn;
2457         int i;
2458
2459         root_gfn = vcpu->arch.mmu.get_cr3(vcpu) >> PAGE_SHIFT;
2460
2461         if (mmu_check_root(vcpu, root_gfn))
2462                 return 1;
2463
2464         /*
2465          * Do we shadow a long mode page table? If so we need to
2466          * write-protect the guests page table root.
2467          */
2468         if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
2469                 hpa_t root = vcpu->arch.mmu.root_hpa;
2470
2471                 ASSERT(!VALID_PAGE(root));
2472
2473                 spin_lock(&vcpu->kvm->mmu_lock);
2474                 kvm_mmu_free_some_pages(vcpu);
2475                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0, PT64_ROOT_LEVEL,
2476                                       0, ACC_ALL, NULL);
2477                 root = __pa(sp->spt);
2478                 ++sp->root_count;
2479                 spin_unlock(&vcpu->kvm->mmu_lock);
2480                 vcpu->arch.mmu.root_hpa = root;
2481                 return 0;
2482         }
2483
2484         /*
2485          * We shadow a 32 bit page table. This may be a legacy 2-level
2486          * or a PAE 3-level page table. In either case we need to be aware that
2487          * the shadow page table may be a PAE or a long mode page table.
2488          */
2489         pm_mask = PT_PRESENT_MASK;
2490         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL)
2491                 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
2492
2493         for (i = 0; i < 4; ++i) {
2494                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2495
2496                 ASSERT(!VALID_PAGE(root));
2497                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2498                         pdptr = kvm_pdptr_read_mmu(vcpu, &vcpu->arch.mmu, i);
2499                         if (!is_present_gpte(pdptr)) {
2500                                 vcpu->arch.mmu.pae_root[i] = 0;
2501                                 continue;
2502                         }
2503                         root_gfn = pdptr >> PAGE_SHIFT;
2504                         if (mmu_check_root(vcpu, root_gfn))
2505                                 return 1;
2506                 }
2507                 spin_lock(&vcpu->kvm->mmu_lock);
2508                 kvm_mmu_free_some_pages(vcpu);
2509                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2510                                       PT32_ROOT_LEVEL, 0,
2511                                       ACC_ALL, NULL);
2512                 root = __pa(sp->spt);
2513                 ++sp->root_count;
2514                 spin_unlock(&vcpu->kvm->mmu_lock);
2515
2516                 vcpu->arch.mmu.pae_root[i] = root | pm_mask;
2517         }
2518         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2519
2520         /*
2521          * If we shadow a 32 bit page table with a long mode page
2522          * table we enter this path.
2523          */
2524         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2525                 if (vcpu->arch.mmu.lm_root == NULL) {
2526                         /*
2527                          * The additional page necessary for this is only
2528                          * allocated on demand.
2529                          */
2530
2531                         u64 *lm_root;
2532
2533                         lm_root = (void*)get_zeroed_page(GFP_KERNEL);
2534                         if (lm_root == NULL)
2535                                 return 1;
2536
2537                         lm_root[0] = __pa(vcpu->arch.mmu.pae_root) | pm_mask;
2538
2539                         vcpu->arch.mmu.lm_root = lm_root;
2540                 }
2541
2542                 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.lm_root);
2543         }
2544
2545         return 0;
2546 }
2547
2548 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2549 {
2550         if (vcpu->arch.mmu.direct_map)
2551                 return mmu_alloc_direct_roots(vcpu);
2552         else
2553                 return mmu_alloc_shadow_roots(vcpu);
2554 }
2555
2556 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2557 {
2558         int i;
2559         struct kvm_mmu_page *sp;
2560
2561         if (vcpu->arch.mmu.direct_map)
2562                 return;
2563
2564         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2565                 return;
2566
2567         trace_kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC);
2568         if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
2569                 hpa_t root = vcpu->arch.mmu.root_hpa;
2570                 sp = page_header(root);
2571                 mmu_sync_children(vcpu, sp);
2572                 trace_kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
2573                 return;
2574         }
2575         for (i = 0; i < 4; ++i) {
2576                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2577
2578                 if (root && VALID_PAGE(root)) {
2579                         root &= PT64_BASE_ADDR_MASK;
2580                         sp = page_header(root);
2581                         mmu_sync_children(vcpu, sp);
2582                 }
2583         }
2584         trace_kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
2585 }
2586
2587 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2588 {
2589         spin_lock(&vcpu->kvm->mmu_lock);
2590         mmu_sync_roots(vcpu);
2591         spin_unlock(&vcpu->kvm->mmu_lock);
2592 }
2593
2594 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2595                                   u32 access, struct x86_exception *exception)
2596 {
2597         if (exception)
2598                 exception->error_code = 0;
2599         return vaddr;
2600 }
2601
2602 static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gva_t vaddr,
2603                                          u32 access,
2604                                          struct x86_exception *exception)
2605 {
2606         if (exception)
2607                 exception->error_code = 0;
2608         return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access);
2609 }
2610
2611 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2612                                 u32 error_code, bool prefault)
2613 {
2614         gfn_t gfn;
2615         int r;
2616
2617         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2618         r = mmu_topup_memory_caches(vcpu);
2619         if (r)
2620                 return r;
2621
2622         ASSERT(vcpu);
2623         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2624
2625         gfn = gva >> PAGE_SHIFT;
2626
2627         return nonpaging_map(vcpu, gva & PAGE_MASK,
2628                              error_code & PFERR_WRITE_MASK, gfn, prefault);
2629 }
2630
2631 static int kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn)
2632 {
2633         struct kvm_arch_async_pf arch;
2634
2635         arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id;
2636         arch.gfn = gfn;
2637         arch.direct_map = vcpu->arch.mmu.direct_map;
2638         arch.cr3 = vcpu->arch.mmu.get_cr3(vcpu);
2639
2640         return kvm_setup_async_pf(vcpu, gva, gfn, &arch);
2641 }
2642
2643 static bool can_do_async_pf(struct kvm_vcpu *vcpu)
2644 {
2645         if (unlikely(!irqchip_in_kernel(vcpu->kvm) ||
2646                      kvm_event_needs_reinjection(vcpu)))
2647                 return false;
2648
2649         return kvm_x86_ops->interrupt_allowed(vcpu);
2650 }
2651
2652 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
2653                          gva_t gva, pfn_t *pfn, bool write, bool *writable)
2654 {
2655         bool async;
2656
2657         *pfn = gfn_to_pfn_async(vcpu->kvm, gfn, &async, write, writable);
2658
2659         if (!async)
2660                 return false; /* *pfn has correct page already */
2661
2662         put_page(pfn_to_page(*pfn));
2663
2664         if (!prefault && can_do_async_pf(vcpu)) {
2665                 trace_kvm_try_async_get_page(gva, gfn);
2666                 if (kvm_find_async_pf_gfn(vcpu, gfn)) {
2667                         trace_kvm_async_pf_doublefault(gva, gfn);
2668                         kvm_make_request(KVM_REQ_APF_HALT, vcpu);
2669                         return true;
2670                 } else if (kvm_arch_setup_async_pf(vcpu, gva, gfn))
2671                         return true;
2672         }
2673
2674         *pfn = gfn_to_pfn_prot(vcpu->kvm, gfn, write, writable);
2675
2676         return false;
2677 }
2678
2679 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, u32 error_code,
2680                           bool prefault)
2681 {
2682         pfn_t pfn;
2683         int r;
2684         int level;
2685         int force_pt_level;
2686         gfn_t gfn = gpa >> PAGE_SHIFT;
2687         unsigned long mmu_seq;
2688         int write = error_code & PFERR_WRITE_MASK;
2689         bool map_writable;
2690
2691         ASSERT(vcpu);
2692         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2693
2694         r = mmu_topup_memory_caches(vcpu);
2695         if (r)
2696                 return r;
2697
2698         force_pt_level = mapping_level_dirty_bitmap(vcpu, gfn);
2699         if (likely(!force_pt_level)) {
2700                 level = mapping_level(vcpu, gfn);
2701                 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2702         } else
2703                 level = PT_PAGE_TABLE_LEVEL;
2704
2705         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2706         smp_rmb();
2707
2708         if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, write, &map_writable))
2709                 return 0;
2710
2711         /* mmio */
2712         if (is_error_pfn(pfn))
2713                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2714         spin_lock(&vcpu->kvm->mmu_lock);
2715         if (mmu_notifier_retry(vcpu, mmu_seq))
2716                 goto out_unlock;
2717         kvm_mmu_free_some_pages(vcpu);
2718         if (likely(!force_pt_level))
2719                 transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level);
2720         r = __direct_map(vcpu, gpa, write, map_writable,
2721                          level, gfn, pfn, prefault);
2722         spin_unlock(&vcpu->kvm->mmu_lock);
2723
2724         return r;
2725
2726 out_unlock:
2727         spin_unlock(&vcpu->kvm->mmu_lock);
2728         kvm_release_pfn_clean(pfn);
2729         return 0;
2730 }
2731
2732 static void nonpaging_free(struct kvm_vcpu *vcpu)
2733 {
2734         mmu_free_roots(vcpu);
2735 }
2736
2737 static int nonpaging_init_context(struct kvm_vcpu *vcpu,
2738                                   struct kvm_mmu *context)
2739 {
2740         context->new_cr3 = nonpaging_new_cr3;
2741         context->page_fault = nonpaging_page_fault;
2742         context->gva_to_gpa = nonpaging_gva_to_gpa;
2743         context->free = nonpaging_free;
2744         context->prefetch_page = nonpaging_prefetch_page;
2745         context->sync_page = nonpaging_sync_page;
2746         context->invlpg = nonpaging_invlpg;
2747         context->update_pte = nonpaging_update_pte;
2748         context->root_level = 0;
2749         context->shadow_root_level = PT32E_ROOT_LEVEL;
2750         context->root_hpa = INVALID_PAGE;
2751         context->direct_map = true;
2752         context->nx = false;
2753         return 0;
2754 }
2755
2756 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2757 {
2758         ++vcpu->stat.tlb_flush;
2759         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2760 }
2761
2762 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2763 {
2764         pgprintk("%s: cr3 %lx\n", __func__, kvm_read_cr3(vcpu));
2765         mmu_free_roots(vcpu);
2766 }
2767
2768 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
2769 {
2770         return kvm_read_cr3(vcpu);
2771 }
2772
2773 static void inject_page_fault(struct kvm_vcpu *vcpu,
2774                               struct x86_exception *fault)
2775 {
2776         vcpu->arch.mmu.inject_page_fault(vcpu, fault);
2777 }
2778
2779 static void paging_free(struct kvm_vcpu *vcpu)
2780 {
2781         nonpaging_free(vcpu);
2782 }
2783
2784 static bool is_rsvd_bits_set(struct kvm_mmu *mmu, u64 gpte, int level)
2785 {
2786         int bit7;
2787
2788         bit7 = (gpte >> 7) & 1;
2789         return (gpte & mmu->rsvd_bits_mask[bit7][level-1]) != 0;
2790 }
2791
2792 #define PTTYPE 64
2793 #include "paging_tmpl.h"
2794 #undef PTTYPE
2795
2796 #define PTTYPE 32
2797 #include "paging_tmpl.h"
2798 #undef PTTYPE
2799
2800 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
2801                                   struct kvm_mmu *context,
2802                                   int level)
2803 {
2804         int maxphyaddr = cpuid_maxphyaddr(vcpu);
2805         u64 exb_bit_rsvd = 0;
2806
2807         if (!context->nx)
2808                 exb_bit_rsvd = rsvd_bits(63, 63);
2809         switch (level) {
2810         case PT32_ROOT_LEVEL:
2811                 /* no rsvd bits for 2 level 4K page table entries */
2812                 context->rsvd_bits_mask[0][1] = 0;
2813                 context->rsvd_bits_mask[0][0] = 0;
2814                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2815
2816                 if (!is_pse(vcpu)) {
2817                         context->rsvd_bits_mask[1][1] = 0;
2818                         break;
2819                 }
2820
2821                 if (is_cpuid_PSE36())
2822                         /* 36bits PSE 4MB page */
2823                         context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2824                 else
2825                         /* 32 bits PSE 4MB page */
2826                         context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2827                 break;
2828         case PT32E_ROOT_LEVEL:
2829                 context->rsvd_bits_mask[0][2] =
2830                         rsvd_bits(maxphyaddr, 63) |
2831                         rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
2832                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2833                         rsvd_bits(maxphyaddr, 62);      /* PDE */
2834                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2835                         rsvd_bits(maxphyaddr, 62);      /* PTE */
2836                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2837                         rsvd_bits(maxphyaddr, 62) |
2838                         rsvd_bits(13, 20);              /* large page */
2839                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2840                 break;
2841         case PT64_ROOT_LEVEL:
2842                 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2843                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2844                 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2845                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2846                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2847                         rsvd_bits(maxphyaddr, 51);
2848                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2849                         rsvd_bits(maxphyaddr, 51);
2850                 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2851                 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2852                         rsvd_bits(maxphyaddr, 51) |
2853                         rsvd_bits(13, 29);
2854                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2855                         rsvd_bits(maxphyaddr, 51) |
2856                         rsvd_bits(13, 20);              /* large page */
2857                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2858                 break;
2859         }
2860 }
2861
2862 static int paging64_init_context_common(struct kvm_vcpu *vcpu,
2863                                         struct kvm_mmu *context,
2864                                         int level)
2865 {
2866         context->nx = is_nx(vcpu);
2867
2868         reset_rsvds_bits_mask(vcpu, context, level);
2869
2870         ASSERT(is_pae(vcpu));
2871         context->new_cr3 = paging_new_cr3;
2872         context->page_fault = paging64_page_fault;
2873         context->gva_to_gpa = paging64_gva_to_gpa;
2874         context->prefetch_page = paging64_prefetch_page;
2875         context->sync_page = paging64_sync_page;
2876         context->invlpg = paging64_invlpg;
2877         context->update_pte = paging64_update_pte;
2878         context->free = paging_free;
2879         context->root_level = level;
2880         context->shadow_root_level = level;
2881         context->root_hpa = INVALID_PAGE;
2882         context->direct_map = false;
2883         return 0;
2884 }
2885
2886 static int paging64_init_context(struct kvm_vcpu *vcpu,
2887                                  struct kvm_mmu *context)
2888 {
2889         return paging64_init_context_common(vcpu, context, PT64_ROOT_LEVEL);
2890 }
2891
2892 static int paging32_init_context(struct kvm_vcpu *vcpu,
2893                                  struct kvm_mmu *context)
2894 {
2895         context->nx = false;
2896
2897         reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
2898
2899         context->new_cr3 = paging_new_cr3;
2900         context->page_fault = paging32_page_fault;
2901         context->gva_to_gpa = paging32_gva_to_gpa;
2902         context->free = paging_free;
2903         context->prefetch_page = paging32_prefetch_page;
2904         context->sync_page = paging32_sync_page;
2905         context->invlpg = paging32_invlpg;
2906         context->update_pte = paging32_update_pte;
2907         context->root_level = PT32_ROOT_LEVEL;
2908         context->shadow_root_level = PT32E_ROOT_LEVEL;
2909         context->root_hpa = INVALID_PAGE;
2910         context->direct_map = false;
2911         return 0;
2912 }
2913
2914 static int paging32E_init_context(struct kvm_vcpu *vcpu,
2915                                   struct kvm_mmu *context)
2916 {
2917         return paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL);
2918 }
2919
2920 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2921 {
2922         struct kvm_mmu *context = vcpu->arch.walk_mmu;
2923
2924         context->base_role.word = 0;
2925         context->new_cr3 = nonpaging_new_cr3;
2926         context->page_fault = tdp_page_fault;
2927         context->free = nonpaging_free;
2928         context->prefetch_page = nonpaging_prefetch_page;
2929         context->sync_page = nonpaging_sync_page;
2930         context->invlpg = nonpaging_invlpg;
2931         context->update_pte = nonpaging_update_pte;
2932         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2933         context->root_hpa = INVALID_PAGE;
2934         context->direct_map = true;
2935         context->set_cr3 = kvm_x86_ops->set_tdp_cr3;
2936         context->get_cr3 = get_cr3;
2937         context->inject_page_fault = kvm_inject_page_fault;
2938         context->nx = is_nx(vcpu);
2939
2940         if (!is_paging(vcpu)) {
2941                 context->nx = false;
2942                 context->gva_to_gpa = nonpaging_gva_to_gpa;
2943                 context->root_level = 0;
2944         } else if (is_long_mode(vcpu)) {
2945                 context->nx = is_nx(vcpu);
2946                 reset_rsvds_bits_mask(vcpu, context, PT64_ROOT_LEVEL);
2947                 context->gva_to_gpa = paging64_gva_to_gpa;
2948                 context->root_level = PT64_ROOT_LEVEL;
2949         } else if (is_pae(vcpu)) {
2950                 context->nx = is_nx(vcpu);
2951                 reset_rsvds_bits_mask(vcpu, context, PT32E_ROOT_LEVEL);
2952                 context->gva_to_gpa = paging64_gva_to_gpa;
2953                 context->root_level = PT32E_ROOT_LEVEL;
2954         } else {
2955                 context->nx = false;
2956                 reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
2957                 context->gva_to_gpa = paging32_gva_to_gpa;
2958                 context->root_level = PT32_ROOT_LEVEL;
2959         }
2960
2961         return 0;
2962 }
2963
2964 int kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context)
2965 {
2966         int r;
2967         bool smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
2968         ASSERT(vcpu);
2969         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2970
2971         if (!is_paging(vcpu))
2972                 r = nonpaging_init_context(vcpu, context);
2973         else if (is_long_mode(vcpu))
2974                 r = paging64_init_context(vcpu, context);
2975         else if (is_pae(vcpu))
2976                 r = paging32E_init_context(vcpu, context);
2977         else
2978                 r = paging32_init_context(vcpu, context);
2979
2980         vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2981         vcpu->arch.mmu.base_role.cr0_wp  = is_write_protection(vcpu);
2982         vcpu->arch.mmu.base_role.smep_andnot_wp
2983                 = smep && !is_write_protection(vcpu);
2984
2985         return r;
2986 }
2987 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);
2988
2989 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2990 {
2991         int r = kvm_init_shadow_mmu(vcpu, vcpu->arch.walk_mmu);
2992
2993         vcpu->arch.walk_mmu->set_cr3           = kvm_x86_ops->set_cr3;
2994         vcpu->arch.walk_mmu->get_cr3           = get_cr3;
2995         vcpu->arch.walk_mmu->inject_page_fault = kvm_inject_page_fault;
2996
2997         return r;
2998 }
2999
3000 static int init_kvm_nested_mmu(struct kvm_vcpu *vcpu)
3001 {
3002         struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
3003
3004         g_context->get_cr3           = get_cr3;
3005         g_context->inject_page_fault = kvm_inject_page_fault;
3006
3007         /*
3008          * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
3009          * translation of l2_gpa to l1_gpa addresses is done using the
3010          * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
3011          * functions between mmu and nested_mmu are swapped.
3012          */
3013         if (!is_paging(vcpu)) {
3014                 g_context->nx = false;
3015                 g_context->root_level = 0;
3016                 g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested;
3017         } else if (is_long_mode(vcpu)) {
3018                 g_context->nx = is_nx(vcpu);
3019                 reset_rsvds_bits_mask(vcpu, g_context, PT64_ROOT_LEVEL);
3020                 g_context->root_level = PT64_ROOT_LEVEL;
3021                 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
3022         } else if (is_pae(vcpu)) {
3023                 g_context->nx = is_nx(vcpu);
3024                 reset_rsvds_bits_mask(vcpu, g_context, PT32E_ROOT_LEVEL);
3025                 g_context->root_level = PT32E_ROOT_LEVEL;
3026                 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
3027         } else {
3028                 g_context->nx = false;
3029                 reset_rsvds_bits_mask(vcpu, g_context, PT32_ROOT_LEVEL);
3030                 g_context->root_level = PT32_ROOT_LEVEL;
3031                 g_context->gva_to_gpa = paging32_gva_to_gpa_nested;
3032         }
3033
3034         return 0;
3035 }
3036
3037 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
3038 {
3039         if (mmu_is_nested(vcpu))
3040                 return init_kvm_nested_mmu(vcpu);
3041         else if (tdp_enabled)
3042                 return init_kvm_tdp_mmu(vcpu);
3043         else
3044                 return init_kvm_softmmu(vcpu);
3045 }
3046
3047 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
3048 {
3049         ASSERT(vcpu);
3050         if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
3051                 /* mmu.free() should set root_hpa = INVALID_PAGE */
3052                 vcpu->arch.mmu.free(vcpu);
3053 }
3054
3055 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
3056 {
3057         int r;
3058
3059         destroy_kvm_mmu(vcpu);
3060         r = init_kvm_mmu(vcpu);
3061
3062         if (r)
3063                 goto err;
3064
3065         kvm_mmu_sync_roots(vcpu);
3066         kvm_mmu_flush_tlb(vcpu);
3067 err:
3068         return r;
3069 }
3070 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
3071
3072 int kvm_mmu_load(struct kvm_vcpu *vcpu)
3073 {
3074         int r;
3075
3076         r = mmu_topup_memory_caches(vcpu);
3077         if (r)
3078                 goto out;
3079         r = mmu_alloc_roots(vcpu);
3080         spin_lock(&vcpu->kvm->mmu_lock);
3081         mmu_sync_roots(vcpu);
3082         spin_unlock(&vcpu->kvm->mmu_lock);
3083         if (r)
3084                 goto out;
3085         /* set_cr3() should ensure TLB has been flushed */
3086         vcpu->arch.mmu.set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
3087 out:
3088         return r;
3089 }
3090 EXPORT_SYMBOL_GPL(kvm_mmu_load);
3091
3092 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
3093 {
3094         mmu_free_roots(vcpu);
3095 }
3096 EXPORT_SYMBOL_GPL(kvm_mmu_unload);
3097
3098 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
3099                                   struct kvm_mmu_page *sp, u64 *spte,
3100                                   const void *new)
3101 {
3102         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
3103                 ++vcpu->kvm->stat.mmu_pde_zapped;
3104                 return;
3105         }
3106
3107         ++vcpu->kvm->stat.mmu_pte_updated;
3108         vcpu->arch.mmu.update_pte(vcpu, sp, spte, new);
3109 }
3110
3111 static bool need_remote_flush(u64 old, u64 new)
3112 {
3113         if (!is_shadow_present_pte(old))
3114                 return false;
3115         if (!is_shadow_present_pte(new))
3116                 return true;
3117         if ((old ^ new) & PT64_BASE_ADDR_MASK)
3118                 return true;
3119         old ^= PT64_NX_MASK;
3120         new ^= PT64_NX_MASK;
3121         return (old & ~new & PT64_PERM_MASK) != 0;
3122 }
3123
3124 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
3125                                     bool remote_flush, bool local_flush)
3126 {
3127         if (zap_page)
3128                 return;
3129
3130         if (remote_flush)
3131                 kvm_flush_remote_tlbs(vcpu->kvm);
3132         else if (local_flush)
3133                 kvm_mmu_flush_tlb(vcpu);
3134 }
3135
3136 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
3137 {
3138         u64 *spte = vcpu->arch.last_pte_updated;
3139
3140         return !!(spte && (*spte & shadow_accessed_mask));
3141 }
3142
3143 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
3144 {
3145         u64 *spte = vcpu->arch.last_pte_updated;
3146
3147         if (spte
3148             && vcpu->arch.last_pte_gfn == gfn
3149             && shadow_accessed_mask
3150             && !(*spte & shadow_accessed_mask)
3151             && is_shadow_present_pte(*spte))
3152                 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
3153 }
3154
3155 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
3156                        const u8 *new, int bytes,
3157                        bool guest_initiated)
3158 {
3159         gfn_t gfn = gpa >> PAGE_SHIFT;
3160         union kvm_mmu_page_role mask = { .word = 0 };
3161         struct kvm_mmu_page *sp;
3162         struct hlist_node *node;
3163         LIST_HEAD(invalid_list);
3164         u64 entry, gentry, *spte;
3165         unsigned pte_size, page_offset, misaligned, quadrant, offset;
3166         int level, npte, invlpg_counter, r, flooded = 0;
3167         bool remote_flush, local_flush, zap_page;
3168
3169         /*
3170          * If we don't have indirect shadow pages, it means no page is
3171          * write-protected, so we can exit simply.
3172          */
3173         if (!ACCESS_ONCE(vcpu->kvm->arch.indirect_shadow_pages))
3174                 return;
3175
3176         zap_page = remote_flush = local_flush = false;
3177         offset = offset_in_page(gpa);
3178
3179         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
3180
3181         invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
3182
3183         /*
3184          * Assume that the pte write on a page table of the same type
3185          * as the current vcpu paging mode since we update the sptes only
3186          * when they have the same mode.
3187          */
3188         if ((is_pae(vcpu) && bytes == 4) || !new) {
3189                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
3190                 if (is_pae(vcpu)) {
3191                         gpa &= ~(gpa_t)7;
3192                         bytes = 8;
3193                 }
3194                 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
3195                 if (r)
3196                         gentry = 0;
3197                 new = (const u8 *)&gentry;
3198         }
3199
3200         switch (bytes) {
3201         case 4:
3202                 gentry = *(const u32 *)new;
3203                 break;
3204         case 8:
3205                 gentry = *(const u64 *)new;
3206                 break;
3207         default:
3208                 gentry = 0;
3209                 break;
3210         }
3211
3212         spin_lock(&vcpu->kvm->mmu_lock);
3213         if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
3214                 gentry = 0;
3215         kvm_mmu_free_some_pages(vcpu);
3216         ++vcpu->kvm->stat.mmu_pte_write;
3217         trace_kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE);
3218         if (guest_initiated) {
3219                 kvm_mmu_access_page(vcpu, gfn);
3220                 if (gfn == vcpu->arch.last_pt_write_gfn
3221                     && !last_updated_pte_accessed(vcpu)) {
3222                         ++vcpu->arch.last_pt_write_count;
3223                         if (vcpu->arch.last_pt_write_count >= 3)
3224                                 flooded = 1;
3225                 } else {
3226                         vcpu->arch.last_pt_write_gfn = gfn;
3227                         vcpu->arch.last_pt_write_count = 1;
3228                         vcpu->arch.last_pte_updated = NULL;
3229                 }
3230         }
3231
3232         mask.cr0_wp = mask.cr4_pae = mask.nxe = 1;
3233         for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
3234                 pte_size = sp->role.cr4_pae ? 8 : 4;
3235                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
3236                 misaligned |= bytes < 4;
3237                 if (misaligned || flooded) {
3238                         /*
3239                          * Misaligned accesses are too much trouble to fix
3240                          * up; also, they usually indicate a page is not used
3241                          * as a page table.
3242                          *
3243                          * If we're seeing too many writes to a page,
3244                          * it may no longer be a page table, or we may be
3245                          * forking, in which case it is better to unmap the
3246                          * page.
3247                          */
3248                         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
3249                                  gpa, bytes, sp->role.word);
3250                         zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
3251                                                      &invalid_list);
3252                         ++vcpu->kvm->stat.mmu_flooded;
3253                         continue;
3254                 }
3255                 page_offset = offset;
3256                 level = sp->role.level;
3257                 npte = 1;
3258                 if (!sp->role.cr4_pae) {
3259                         page_offset <<= 1;      /* 32->64 */
3260                         /*
3261                          * A 32-bit pde maps 4MB while the shadow pdes map
3262                          * only 2MB.  So we need to double the offset again
3263                          * and zap two pdes instead of one.
3264                          */
3265                         if (level == PT32_ROOT_LEVEL) {
3266                                 page_offset &= ~7; /* kill rounding error */
3267                                 page_offset <<= 1;
3268                                 npte = 2;
3269                         }
3270                         quadrant = page_offset >> PAGE_SHIFT;
3271                         page_offset &= ~PAGE_MASK;
3272                         if (quadrant != sp->role.quadrant)
3273                                 continue;
3274                 }
3275                 local_flush = true;
3276                 spte = &sp->spt[page_offset / sizeof(*spte)];
3277                 while (npte--) {
3278                         entry = *spte;
3279                         mmu_page_zap_pte(vcpu->kvm, sp, spte);
3280                         if (gentry &&
3281                               !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
3282                               & mask.word))
3283                                 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
3284                         if (!remote_flush && need_remote_flush(entry, *spte))
3285                                 remote_flush = true;
3286                         ++spte;
3287                 }
3288         }
3289         mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
3290         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3291         trace_kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE);
3292         spin_unlock(&vcpu->kvm->mmu_lock);
3293 }
3294
3295 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
3296 {
3297         gpa_t gpa;
3298         int r;
3299
3300         if (vcpu->arch.mmu.direct_map)
3301                 return 0;
3302
3303         gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
3304
3305         spin_lock(&vcpu->kvm->mmu_lock);
3306         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3307         spin_unlock(&vcpu->kvm->mmu_lock);
3308         return r;
3309 }
3310 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
3311
3312 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
3313 {
3314         LIST_HEAD(invalid_list);
3315
3316         while (kvm_mmu_available_pages(vcpu->kvm) < KVM_REFILL_PAGES &&
3317                !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
3318                 struct kvm_mmu_page *sp;
3319
3320                 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
3321                                   struct kvm_mmu_page, link);
3322                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
3323                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3324                 ++vcpu->kvm->stat.mmu_recycled;
3325         }
3326 }
3327
3328 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code,
3329                        void *insn, int insn_len)
3330 {
3331         int r;
3332         enum emulation_result er;
3333
3334         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code, false);
3335         if (r < 0)
3336                 goto out;
3337
3338         if (!r) {
3339                 r = 1;
3340                 goto out;
3341         }
3342
3343         r = mmu_topup_memory_caches(vcpu);
3344         if (r)
3345                 goto out;
3346
3347         er = x86_emulate_instruction(vcpu, cr2, 0, insn, insn_len);
3348
3349         switch (er) {
3350         case EMULATE_DONE:
3351                 return 1;
3352         case EMULATE_DO_MMIO:
3353                 ++vcpu->stat.mmio_exits;
3354                 /* fall through */
3355         case EMULATE_FAIL:
3356                 return 0;
3357         default:
3358                 BUG();
3359         }
3360 out:
3361         return r;
3362 }
3363 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
3364
3365 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
3366 {
3367         vcpu->arch.mmu.invlpg(vcpu, gva);
3368         kvm_mmu_flush_tlb(vcpu);
3369         ++vcpu->stat.invlpg;
3370 }
3371 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
3372
3373 void kvm_enable_tdp(void)
3374 {
3375         tdp_enabled = true;
3376 }
3377 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
3378
3379 void kvm_disable_tdp(void)
3380 {
3381         tdp_enabled = false;
3382 }
3383 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
3384
3385 static void free_mmu_pages(struct kvm_vcpu *vcpu)
3386 {
3387         free_page((unsigned long)vcpu->arch.mmu.pae_root);
3388         if (vcpu->arch.mmu.lm_root != NULL)
3389                 free_page((unsigned long)vcpu->arch.mmu.lm_root);
3390 }
3391
3392 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
3393 {
3394         struct page *page;
3395         int i;
3396
3397         ASSERT(vcpu);
3398
3399         /*
3400          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3401          * Therefore we need to allocate shadow page tables in the first
3402          * 4GB of memory, which happens to fit the DMA32 zone.
3403          */
3404         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
3405         if (!page)
3406                 return -ENOMEM;
3407
3408         vcpu->arch.mmu.pae_root = page_address(page);
3409         for (i = 0; i < 4; ++i)
3410                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3411
3412         return 0;
3413 }
3414
3415 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3416 {
3417         ASSERT(vcpu);
3418         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3419
3420         return alloc_mmu_pages(vcpu);
3421 }
3422
3423 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3424 {
3425         ASSERT(vcpu);
3426         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3427
3428         return init_kvm_mmu(vcpu);
3429 }
3430
3431 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3432 {
3433         struct kvm_mmu_page *sp;
3434
3435         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3436                 int i;
3437                 u64 *pt;
3438
3439                 if (!test_bit(slot, sp->slot_bitmap))
3440                         continue;
3441
3442                 pt = sp->spt;
3443                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3444                         if (!is_shadow_present_pte(pt[i]) ||
3445                               !is_last_spte(pt[i], sp->role.level))
3446                                 continue;
3447
3448                         if (is_large_pte(pt[i])) {
3449                                 drop_spte(kvm, &pt[i],
3450                                           shadow_trap_nonpresent_pte);
3451                                 --kvm->stat.lpages;
3452                                 continue;
3453                         }
3454
3455                         /* avoid RMW */
3456                         if (is_writable_pte(pt[i]))
3457                                 update_spte(&pt[i], pt[i] & ~PT_WRITABLE_MASK);
3458                 }
3459         }
3460         kvm_flush_remote_tlbs(kvm);
3461 }
3462
3463 void kvm_mmu_zap_all(struct kvm *kvm)
3464 {
3465         struct kvm_mmu_page *sp, *node;
3466         LIST_HEAD(invalid_list);
3467
3468         spin_lock(&kvm->mmu_lock);
3469 restart:
3470         list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3471                 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3472                         goto restart;
3473
3474         kvm_mmu_commit_zap_page(kvm, &invalid_list);
3475         spin_unlock(&kvm->mmu_lock);
3476 }
3477
3478 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3479                                                struct list_head *invalid_list)
3480 {
3481         struct kvm_mmu_page *page;
3482
3483         page = container_of(kvm->arch.active_mmu_pages.prev,
3484                             struct kvm_mmu_page, link);
3485         return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3486 }
3487
3488 static int mmu_shrink(struct shrinker *shrink, struct shrink_control *sc)
3489 {
3490         struct kvm *kvm;
3491         struct kvm *kvm_freed = NULL;
3492         int nr_to_scan = sc->nr_to_scan;
3493
3494         if (nr_to_scan == 0)
3495                 goto out;
3496
3497         raw_spin_lock(&kvm_lock);
3498
3499         list_for_each_entry(kvm, &vm_list, vm_list) {
3500                 int idx, freed_pages;
3501                 LIST_HEAD(invalid_list);
3502
3503                 idx = srcu_read_lock(&kvm->srcu);
3504                 spin_lock(&kvm->mmu_lock);
3505                 if (!kvm_freed && nr_to_scan > 0 &&
3506                     kvm->arch.n_used_mmu_pages > 0) {
3507                         freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3508                                                           &invalid_list);
3509                         kvm_freed = kvm;
3510                 }
3511                 nr_to_scan--;
3512
3513                 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3514                 spin_unlock(&kvm->mmu_lock);
3515                 srcu_read_unlock(&kvm->srcu, idx);
3516         }
3517         if (kvm_freed)
3518                 list_move_tail(&kvm_freed->vm_list, &vm_list);
3519
3520         raw_spin_unlock(&kvm_lock);
3521
3522 out:
3523         return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
3524 }
3525
3526 static struct shrinker mmu_shrinker = {
3527         .shrink = mmu_shrink,
3528         .seeks = DEFAULT_SEEKS * 10,
3529 };
3530
3531 static void mmu_destroy_caches(void)
3532 {
3533         if (pte_list_desc_cache)
3534                 kmem_cache_destroy(pte_list_desc_cache);
3535         if (mmu_page_header_cache)
3536                 kmem_cache_destroy(mmu_page_header_cache);
3537 }
3538
3539 int kvm_mmu_module_init(void)
3540 {
3541         pte_list_desc_cache = kmem_cache_create("pte_list_desc",
3542                                             sizeof(struct pte_list_desc),
3543                                             0, 0, NULL);
3544         if (!pte_list_desc_cache)
3545                 goto nomem;
3546
3547         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3548                                                   sizeof(struct kvm_mmu_page),
3549                                                   0, 0, NULL);
3550         if (!mmu_page_header_cache)
3551                 goto nomem;
3552
3553         if (percpu_counter_init(&kvm_total_used_mmu_pages, 0))
3554                 goto nomem;
3555
3556         register_shrinker(&mmu_shrinker);
3557
3558         return 0;
3559
3560 nomem:
3561         mmu_destroy_caches();
3562         return -ENOMEM;
3563 }
3564
3565 /*
3566  * Caculate mmu pages needed for kvm.
3567  */
3568 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3569 {
3570         int i;
3571         unsigned int nr_mmu_pages;
3572         unsigned int  nr_pages = 0;
3573         struct kvm_memslots *slots;
3574
3575         slots = kvm_memslots(kvm);
3576
3577         for (i = 0; i < slots->nmemslots; i++)
3578                 nr_pages += slots->memslots[i].npages;
3579
3580         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3581         nr_mmu_pages = max(nr_mmu_pages,
3582                         (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3583
3584         return nr_mmu_pages;
3585 }
3586
3587 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3588                                 unsigned len)
3589 {
3590         if (len > buffer->len)
3591                 return NULL;
3592         return buffer->ptr;
3593 }
3594
3595 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3596                                 unsigned len)
3597 {
3598         void *ret;
3599
3600         ret = pv_mmu_peek_buffer(buffer, len);
3601         if (!ret)
3602                 return ret;
3603         buffer->ptr += len;
3604         buffer->len -= len;
3605         buffer->processed += len;
3606         return ret;
3607 }
3608
3609 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3610                              gpa_t addr, gpa_t value)
3611 {
3612         int bytes = 8;
3613         int r;
3614
3615         if (!is_long_mode(vcpu) && !is_pae(vcpu))
3616                 bytes = 4;
3617
3618         r = mmu_topup_memory_caches(vcpu);
3619         if (r)
3620                 return r;
3621
3622         if (!emulator_write_phys(vcpu, addr, &value, bytes))
3623                 return -EFAULT;
3624
3625         return 1;
3626 }
3627
3628 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3629 {
3630         (void)kvm_set_cr3(vcpu, kvm_read_cr3(vcpu));
3631         return 1;
3632 }
3633
3634 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3635 {
3636         spin_lock(&vcpu->kvm->mmu_lock);
3637         mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3638         spin_unlock(&vcpu->kvm->mmu_lock);
3639         return 1;
3640 }
3641
3642 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3643                              struct kvm_pv_mmu_op_buffer *buffer)
3644 {
3645         struct kvm_mmu_op_header *header;
3646
3647         header = pv_mmu_peek_buffer(buffer, sizeof *header);
3648         if (!header)
3649                 return 0;
3650         switch (header->op) {
3651         case KVM_MMU_OP_WRITE_PTE: {
3652                 struct kvm_mmu_op_write_pte *wpte;
3653
3654                 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3655                 if (!wpte)
3656                         return 0;
3657                 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3658                                         wpte->pte_val);
3659         }
3660         case KVM_MMU_OP_FLUSH_TLB: {
3661                 struct kvm_mmu_op_flush_tlb *ftlb;
3662
3663                 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3664                 if (!ftlb)
3665                         return 0;
3666                 return kvm_pv_mmu_flush_tlb(vcpu);
3667         }
3668         case KVM_MMU_OP_RELEASE_PT: {
3669                 struct kvm_mmu_op_release_pt *rpt;
3670
3671                 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3672                 if (!rpt)
3673                         return 0;
3674                 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3675         }
3676         default: return 0;
3677         }
3678 }
3679
3680 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3681                   gpa_t addr, unsigned long *ret)
3682 {
3683         int r;
3684         struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3685
3686         buffer->ptr = buffer->buf;
3687         buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3688         buffer->processed = 0;
3689
3690         r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3691         if (r)
3692                 goto out;
3693
3694         while (buffer->len) {
3695                 r = kvm_pv_mmu_op_one(vcpu, buffer);
3696                 if (r < 0)
3697                         goto out;
3698                 if (r == 0)
3699                         break;
3700         }
3701
3702         r = 1;
3703 out:
3704         *ret = buffer->processed;
3705         return r;
3706 }
3707
3708 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3709 {
3710         struct kvm_shadow_walk_iterator iterator;
3711         int nr_sptes = 0;
3712
3713         spin_lock(&vcpu->kvm->mmu_lock);
3714         for_each_shadow_entry(vcpu, addr, iterator) {
3715                 sptes[iterator.level-1] = *iterator.sptep;
3716                 nr_sptes++;
3717                 if (!is_shadow_present_pte(*iterator.sptep))
3718                         break;
3719         }
3720         spin_unlock(&vcpu->kvm->mmu_lock);
3721
3722         return nr_sptes;
3723 }
3724 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3725
3726 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3727 {
3728         ASSERT(vcpu);
3729
3730         destroy_kvm_mmu(vcpu);
3731         free_mmu_pages(vcpu);
3732         mmu_free_memory_caches(vcpu);
3733 }
3734
3735 #ifdef CONFIG_KVM_MMU_AUDIT
3736 #include "mmu_audit.c"
3737 #else
3738 static void mmu_audit_disable(void) { }
3739 #endif
3740
3741 void kvm_mmu_module_exit(void)
3742 {
3743         mmu_destroy_caches();
3744         percpu_counter_destroy(&kvm_total_used_mmu_pages);
3745         unregister_shrinker(&mmu_shrinker);
3746         mmu_audit_disable();
3747 }