KVM: MMU: Calculate correct base gfn for direct non-DIR level
[firefly-linux-kernel-4.4.55.git] / arch / x86 / kvm / mmu.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This module enables machines with Intel VT-x extensions to run virtual
5  * machines without emulation or binary translation.
6  *
7  * MMU support
8  *
9  * Copyright (C) 2006 Qumranet, Inc.
10  * Copyright 2010 Red Hat, Inc. and/or its affilates.
11  *
12  * Authors:
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Avi Kivity   <avi@qumranet.com>
15  *
16  * This work is licensed under the terms of the GNU GPL, version 2.  See
17  * the COPYING file in the top-level directory.
18  *
19  */
20
21 #include "mmu.h"
22 #include "x86.h"
23 #include "kvm_cache_regs.h"
24
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
28 #include <linux/mm.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
37
38 #include <asm/page.h>
39 #include <asm/cmpxchg.h>
40 #include <asm/io.h>
41 #include <asm/vmx.h>
42
43 /*
44  * When setting this variable to true it enables Two-Dimensional-Paging
45  * where the hardware walks 2 page tables:
46  * 1. the guest-virtual to guest-physical
47  * 2. while doing 1. it walks guest-physical to host-physical
48  * If the hardware supports that we don't need to do shadow paging.
49  */
50 bool tdp_enabled = false;
51
52 #undef MMU_DEBUG
53
54 #undef AUDIT
55
56 #ifdef AUDIT
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
58 #else
59 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
60 #endif
61
62 #ifdef MMU_DEBUG
63
64 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
65 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
66
67 #else
68
69 #define pgprintk(x...) do { } while (0)
70 #define rmap_printk(x...) do { } while (0)
71
72 #endif
73
74 #if defined(MMU_DEBUG) || defined(AUDIT)
75 static int dbg = 0;
76 module_param(dbg, bool, 0644);
77 #endif
78
79 static int oos_shadow = 1;
80 module_param(oos_shadow, bool, 0644);
81
82 #ifndef MMU_DEBUG
83 #define ASSERT(x) do { } while (0)
84 #else
85 #define ASSERT(x)                                                       \
86         if (!(x)) {                                                     \
87                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
88                        __FILE__, __LINE__, #x);                         \
89         }
90 #endif
91
92 #define PT_FIRST_AVAIL_BITS_SHIFT 9
93 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
94
95 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
96
97 #define PT64_LEVEL_BITS 9
98
99 #define PT64_LEVEL_SHIFT(level) \
100                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
101
102 #define PT64_LEVEL_MASK(level) \
103                 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
104
105 #define PT64_INDEX(address, level)\
106         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
107
108
109 #define PT32_LEVEL_BITS 10
110
111 #define PT32_LEVEL_SHIFT(level) \
112                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
113
114 #define PT32_LEVEL_MASK(level) \
115                 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
116 #define PT32_LVL_OFFSET_MASK(level) \
117         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
118                                                 * PT32_LEVEL_BITS))) - 1))
119
120 #define PT32_INDEX(address, level)\
121         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
122
123
124 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
125 #define PT64_DIR_BASE_ADDR_MASK \
126         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
127 #define PT64_LVL_ADDR_MASK(level) \
128         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
129                                                 * PT64_LEVEL_BITS))) - 1))
130 #define PT64_LVL_OFFSET_MASK(level) \
131         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
132                                                 * PT64_LEVEL_BITS))) - 1))
133
134 #define PT32_BASE_ADDR_MASK PAGE_MASK
135 #define PT32_DIR_BASE_ADDR_MASK \
136         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
137 #define PT32_LVL_ADDR_MASK(level) \
138         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
139                                             * PT32_LEVEL_BITS))) - 1))
140
141 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
142                         | PT64_NX_MASK)
143
144 #define RMAP_EXT 4
145
146 #define ACC_EXEC_MASK    1
147 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
148 #define ACC_USER_MASK    PT_USER_MASK
149 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
150
151 #include <trace/events/kvm.h>
152
153 #define CREATE_TRACE_POINTS
154 #include "mmutrace.h"
155
156 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
157
158 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
159
160 struct kvm_rmap_desc {
161         u64 *sptes[RMAP_EXT];
162         struct kvm_rmap_desc *more;
163 };
164
165 struct kvm_shadow_walk_iterator {
166         u64 addr;
167         hpa_t shadow_addr;
168         int level;
169         u64 *sptep;
170         unsigned index;
171 };
172
173 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
174         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
175              shadow_walk_okay(&(_walker));                      \
176              shadow_walk_next(&(_walker)))
177
178 typedef int (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp);
179
180 static struct kmem_cache *pte_chain_cache;
181 static struct kmem_cache *rmap_desc_cache;
182 static struct kmem_cache *mmu_page_header_cache;
183
184 static u64 __read_mostly shadow_trap_nonpresent_pte;
185 static u64 __read_mostly shadow_notrap_nonpresent_pte;
186 static u64 __read_mostly shadow_base_present_pte;
187 static u64 __read_mostly shadow_nx_mask;
188 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
189 static u64 __read_mostly shadow_user_mask;
190 static u64 __read_mostly shadow_accessed_mask;
191 static u64 __read_mostly shadow_dirty_mask;
192
193 static inline u64 rsvd_bits(int s, int e)
194 {
195         return ((1ULL << (e - s + 1)) - 1) << s;
196 }
197
198 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
199 {
200         shadow_trap_nonpresent_pte = trap_pte;
201         shadow_notrap_nonpresent_pte = notrap_pte;
202 }
203 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
204
205 void kvm_mmu_set_base_ptes(u64 base_pte)
206 {
207         shadow_base_present_pte = base_pte;
208 }
209 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
210
211 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
212                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
213 {
214         shadow_user_mask = user_mask;
215         shadow_accessed_mask = accessed_mask;
216         shadow_dirty_mask = dirty_mask;
217         shadow_nx_mask = nx_mask;
218         shadow_x_mask = x_mask;
219 }
220 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
221
222 static bool is_write_protection(struct kvm_vcpu *vcpu)
223 {
224         return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
225 }
226
227 static int is_cpuid_PSE36(void)
228 {
229         return 1;
230 }
231
232 static int is_nx(struct kvm_vcpu *vcpu)
233 {
234         return vcpu->arch.efer & EFER_NX;
235 }
236
237 static int is_shadow_present_pte(u64 pte)
238 {
239         return pte != shadow_trap_nonpresent_pte
240                 && pte != shadow_notrap_nonpresent_pte;
241 }
242
243 static int is_large_pte(u64 pte)
244 {
245         return pte & PT_PAGE_SIZE_MASK;
246 }
247
248 static int is_writable_pte(unsigned long pte)
249 {
250         return pte & PT_WRITABLE_MASK;
251 }
252
253 static int is_dirty_gpte(unsigned long pte)
254 {
255         return pte & PT_DIRTY_MASK;
256 }
257
258 static int is_rmap_spte(u64 pte)
259 {
260         return is_shadow_present_pte(pte);
261 }
262
263 static int is_last_spte(u64 pte, int level)
264 {
265         if (level == PT_PAGE_TABLE_LEVEL)
266                 return 1;
267         if (is_large_pte(pte))
268                 return 1;
269         return 0;
270 }
271
272 static pfn_t spte_to_pfn(u64 pte)
273 {
274         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
275 }
276
277 static gfn_t pse36_gfn_delta(u32 gpte)
278 {
279         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
280
281         return (gpte & PT32_DIR_PSE36_MASK) << shift;
282 }
283
284 static void __set_spte(u64 *sptep, u64 spte)
285 {
286 #ifdef CONFIG_X86_64
287         set_64bit((unsigned long *)sptep, spte);
288 #else
289         set_64bit((unsigned long long *)sptep, spte);
290 #endif
291 }
292
293 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
294                                   struct kmem_cache *base_cache, int min)
295 {
296         void *obj;
297
298         if (cache->nobjs >= min)
299                 return 0;
300         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
301                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
302                 if (!obj)
303                         return -ENOMEM;
304                 cache->objects[cache->nobjs++] = obj;
305         }
306         return 0;
307 }
308
309 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
310                                   struct kmem_cache *cache)
311 {
312         while (mc->nobjs)
313                 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
314 }
315
316 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
317                                        int min)
318 {
319         struct page *page;
320
321         if (cache->nobjs >= min)
322                 return 0;
323         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
324                 page = alloc_page(GFP_KERNEL);
325                 if (!page)
326                         return -ENOMEM;
327                 cache->objects[cache->nobjs++] = page_address(page);
328         }
329         return 0;
330 }
331
332 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
333 {
334         while (mc->nobjs)
335                 free_page((unsigned long)mc->objects[--mc->nobjs]);
336 }
337
338 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
339 {
340         int r;
341
342         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
343                                    pte_chain_cache, 4);
344         if (r)
345                 goto out;
346         r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
347                                    rmap_desc_cache, 4);
348         if (r)
349                 goto out;
350         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
351         if (r)
352                 goto out;
353         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
354                                    mmu_page_header_cache, 4);
355 out:
356         return r;
357 }
358
359 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
360 {
361         mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
362         mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
363         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
364         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
365                                 mmu_page_header_cache);
366 }
367
368 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
369                                     size_t size)
370 {
371         void *p;
372
373         BUG_ON(!mc->nobjs);
374         p = mc->objects[--mc->nobjs];
375         return p;
376 }
377
378 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
379 {
380         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
381                                       sizeof(struct kvm_pte_chain));
382 }
383
384 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
385 {
386         kmem_cache_free(pte_chain_cache, pc);
387 }
388
389 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
390 {
391         return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
392                                       sizeof(struct kvm_rmap_desc));
393 }
394
395 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
396 {
397         kmem_cache_free(rmap_desc_cache, rd);
398 }
399
400 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
401 {
402         if (!sp->role.direct)
403                 return sp->gfns[index];
404
405         return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
406 }
407
408 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
409 {
410         if (sp->role.direct)
411                 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
412         else
413                 sp->gfns[index] = gfn;
414 }
415
416 /*
417  * Return the pointer to the largepage write count for a given
418  * gfn, handling slots that are not large page aligned.
419  */
420 static int *slot_largepage_idx(gfn_t gfn,
421                                struct kvm_memory_slot *slot,
422                                int level)
423 {
424         unsigned long idx;
425
426         idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
427               (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
428         return &slot->lpage_info[level - 2][idx].write_count;
429 }
430
431 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
432 {
433         struct kvm_memory_slot *slot;
434         int *write_count;
435         int i;
436
437         gfn = unalias_gfn(kvm, gfn);
438
439         slot = gfn_to_memslot_unaliased(kvm, gfn);
440         for (i = PT_DIRECTORY_LEVEL;
441              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
442                 write_count   = slot_largepage_idx(gfn, slot, i);
443                 *write_count += 1;
444         }
445 }
446
447 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
448 {
449         struct kvm_memory_slot *slot;
450         int *write_count;
451         int i;
452
453         gfn = unalias_gfn(kvm, gfn);
454         slot = gfn_to_memslot_unaliased(kvm, gfn);
455         for (i = PT_DIRECTORY_LEVEL;
456              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
457                 write_count   = slot_largepage_idx(gfn, slot, i);
458                 *write_count -= 1;
459                 WARN_ON(*write_count < 0);
460         }
461 }
462
463 static int has_wrprotected_page(struct kvm *kvm,
464                                 gfn_t gfn,
465                                 int level)
466 {
467         struct kvm_memory_slot *slot;
468         int *largepage_idx;
469
470         gfn = unalias_gfn(kvm, gfn);
471         slot = gfn_to_memslot_unaliased(kvm, gfn);
472         if (slot) {
473                 largepage_idx = slot_largepage_idx(gfn, slot, level);
474                 return *largepage_idx;
475         }
476
477         return 1;
478 }
479
480 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
481 {
482         unsigned long page_size;
483         int i, ret = 0;
484
485         page_size = kvm_host_page_size(kvm, gfn);
486
487         for (i = PT_PAGE_TABLE_LEVEL;
488              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
489                 if (page_size >= KVM_HPAGE_SIZE(i))
490                         ret = i;
491                 else
492                         break;
493         }
494
495         return ret;
496 }
497
498 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
499 {
500         struct kvm_memory_slot *slot;
501         int host_level, level, max_level;
502
503         slot = gfn_to_memslot(vcpu->kvm, large_gfn);
504         if (slot && slot->dirty_bitmap)
505                 return PT_PAGE_TABLE_LEVEL;
506
507         host_level = host_mapping_level(vcpu->kvm, large_gfn);
508
509         if (host_level == PT_PAGE_TABLE_LEVEL)
510                 return host_level;
511
512         max_level = kvm_x86_ops->get_lpage_level() < host_level ?
513                 kvm_x86_ops->get_lpage_level() : host_level;
514
515         for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
516                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
517                         break;
518
519         return level - 1;
520 }
521
522 /*
523  * Take gfn and return the reverse mapping to it.
524  * Note: gfn must be unaliased before this function get called
525  */
526
527 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
528 {
529         struct kvm_memory_slot *slot;
530         unsigned long idx;
531
532         slot = gfn_to_memslot(kvm, gfn);
533         if (likely(level == PT_PAGE_TABLE_LEVEL))
534                 return &slot->rmap[gfn - slot->base_gfn];
535
536         idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
537                 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
538
539         return &slot->lpage_info[level - 2][idx].rmap_pde;
540 }
541
542 /*
543  * Reverse mapping data structures:
544  *
545  * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
546  * that points to page_address(page).
547  *
548  * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
549  * containing more mappings.
550  *
551  * Returns the number of rmap entries before the spte was added or zero if
552  * the spte was not added.
553  *
554  */
555 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
556 {
557         struct kvm_mmu_page *sp;
558         struct kvm_rmap_desc *desc;
559         unsigned long *rmapp;
560         int i, count = 0;
561
562         if (!is_rmap_spte(*spte))
563                 return count;
564         gfn = unalias_gfn(vcpu->kvm, gfn);
565         sp = page_header(__pa(spte));
566         kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
567         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
568         if (!*rmapp) {
569                 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
570                 *rmapp = (unsigned long)spte;
571         } else if (!(*rmapp & 1)) {
572                 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
573                 desc = mmu_alloc_rmap_desc(vcpu);
574                 desc->sptes[0] = (u64 *)*rmapp;
575                 desc->sptes[1] = spte;
576                 *rmapp = (unsigned long)desc | 1;
577         } else {
578                 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
579                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
580                 while (desc->sptes[RMAP_EXT-1] && desc->more) {
581                         desc = desc->more;
582                         count += RMAP_EXT;
583                 }
584                 if (desc->sptes[RMAP_EXT-1]) {
585                         desc->more = mmu_alloc_rmap_desc(vcpu);
586                         desc = desc->more;
587                 }
588                 for (i = 0; desc->sptes[i]; ++i)
589                         ;
590                 desc->sptes[i] = spte;
591         }
592         return count;
593 }
594
595 static void rmap_desc_remove_entry(unsigned long *rmapp,
596                                    struct kvm_rmap_desc *desc,
597                                    int i,
598                                    struct kvm_rmap_desc *prev_desc)
599 {
600         int j;
601
602         for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
603                 ;
604         desc->sptes[i] = desc->sptes[j];
605         desc->sptes[j] = NULL;
606         if (j != 0)
607                 return;
608         if (!prev_desc && !desc->more)
609                 *rmapp = (unsigned long)desc->sptes[0];
610         else
611                 if (prev_desc)
612                         prev_desc->more = desc->more;
613                 else
614                         *rmapp = (unsigned long)desc->more | 1;
615         mmu_free_rmap_desc(desc);
616 }
617
618 static void rmap_remove(struct kvm *kvm, u64 *spte)
619 {
620         struct kvm_rmap_desc *desc;
621         struct kvm_rmap_desc *prev_desc;
622         struct kvm_mmu_page *sp;
623         pfn_t pfn;
624         gfn_t gfn;
625         unsigned long *rmapp;
626         int i;
627
628         if (!is_rmap_spte(*spte))
629                 return;
630         sp = page_header(__pa(spte));
631         pfn = spte_to_pfn(*spte);
632         if (*spte & shadow_accessed_mask)
633                 kvm_set_pfn_accessed(pfn);
634         if (is_writable_pte(*spte))
635                 kvm_set_pfn_dirty(pfn);
636         gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
637         rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
638         if (!*rmapp) {
639                 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
640                 BUG();
641         } else if (!(*rmapp & 1)) {
642                 rmap_printk("rmap_remove:  %p %llx 1->0\n", spte, *spte);
643                 if ((u64 *)*rmapp != spte) {
644                         printk(KERN_ERR "rmap_remove:  %p %llx 1->BUG\n",
645                                spte, *spte);
646                         BUG();
647                 }
648                 *rmapp = 0;
649         } else {
650                 rmap_printk("rmap_remove:  %p %llx many->many\n", spte, *spte);
651                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
652                 prev_desc = NULL;
653                 while (desc) {
654                         for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
655                                 if (desc->sptes[i] == spte) {
656                                         rmap_desc_remove_entry(rmapp,
657                                                                desc, i,
658                                                                prev_desc);
659                                         return;
660                                 }
661                         prev_desc = desc;
662                         desc = desc->more;
663                 }
664                 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
665                 BUG();
666         }
667 }
668
669 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
670 {
671         struct kvm_rmap_desc *desc;
672         u64 *prev_spte;
673         int i;
674
675         if (!*rmapp)
676                 return NULL;
677         else if (!(*rmapp & 1)) {
678                 if (!spte)
679                         return (u64 *)*rmapp;
680                 return NULL;
681         }
682         desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
683         prev_spte = NULL;
684         while (desc) {
685                 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
686                         if (prev_spte == spte)
687                                 return desc->sptes[i];
688                         prev_spte = desc->sptes[i];
689                 }
690                 desc = desc->more;
691         }
692         return NULL;
693 }
694
695 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
696 {
697         unsigned long *rmapp;
698         u64 *spte;
699         int i, write_protected = 0;
700
701         gfn = unalias_gfn(kvm, gfn);
702         rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
703
704         spte = rmap_next(kvm, rmapp, NULL);
705         while (spte) {
706                 BUG_ON(!spte);
707                 BUG_ON(!(*spte & PT_PRESENT_MASK));
708                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
709                 if (is_writable_pte(*spte)) {
710                         __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
711                         write_protected = 1;
712                 }
713                 spte = rmap_next(kvm, rmapp, spte);
714         }
715         if (write_protected) {
716                 pfn_t pfn;
717
718                 spte = rmap_next(kvm, rmapp, NULL);
719                 pfn = spte_to_pfn(*spte);
720                 kvm_set_pfn_dirty(pfn);
721         }
722
723         /* check for huge page mappings */
724         for (i = PT_DIRECTORY_LEVEL;
725              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
726                 rmapp = gfn_to_rmap(kvm, gfn, i);
727                 spte = rmap_next(kvm, rmapp, NULL);
728                 while (spte) {
729                         BUG_ON(!spte);
730                         BUG_ON(!(*spte & PT_PRESENT_MASK));
731                         BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
732                         pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
733                         if (is_writable_pte(*spte)) {
734                                 rmap_remove(kvm, spte);
735                                 --kvm->stat.lpages;
736                                 __set_spte(spte, shadow_trap_nonpresent_pte);
737                                 spte = NULL;
738                                 write_protected = 1;
739                         }
740                         spte = rmap_next(kvm, rmapp, spte);
741                 }
742         }
743
744         return write_protected;
745 }
746
747 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
748                            unsigned long data)
749 {
750         u64 *spte;
751         int need_tlb_flush = 0;
752
753         while ((spte = rmap_next(kvm, rmapp, NULL))) {
754                 BUG_ON(!(*spte & PT_PRESENT_MASK));
755                 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
756                 rmap_remove(kvm, spte);
757                 __set_spte(spte, shadow_trap_nonpresent_pte);
758                 need_tlb_flush = 1;
759         }
760         return need_tlb_flush;
761 }
762
763 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
764                              unsigned long data)
765 {
766         int need_flush = 0;
767         u64 *spte, new_spte;
768         pte_t *ptep = (pte_t *)data;
769         pfn_t new_pfn;
770
771         WARN_ON(pte_huge(*ptep));
772         new_pfn = pte_pfn(*ptep);
773         spte = rmap_next(kvm, rmapp, NULL);
774         while (spte) {
775                 BUG_ON(!is_shadow_present_pte(*spte));
776                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
777                 need_flush = 1;
778                 if (pte_write(*ptep)) {
779                         rmap_remove(kvm, spte);
780                         __set_spte(spte, shadow_trap_nonpresent_pte);
781                         spte = rmap_next(kvm, rmapp, NULL);
782                 } else {
783                         new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
784                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
785
786                         new_spte &= ~PT_WRITABLE_MASK;
787                         new_spte &= ~SPTE_HOST_WRITEABLE;
788                         if (is_writable_pte(*spte))
789                                 kvm_set_pfn_dirty(spte_to_pfn(*spte));
790                         __set_spte(spte, new_spte);
791                         spte = rmap_next(kvm, rmapp, spte);
792                 }
793         }
794         if (need_flush)
795                 kvm_flush_remote_tlbs(kvm);
796
797         return 0;
798 }
799
800 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
801                           unsigned long data,
802                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
803                                          unsigned long data))
804 {
805         int i, j;
806         int ret;
807         int retval = 0;
808         struct kvm_memslots *slots;
809
810         slots = kvm_memslots(kvm);
811
812         for (i = 0; i < slots->nmemslots; i++) {
813                 struct kvm_memory_slot *memslot = &slots->memslots[i];
814                 unsigned long start = memslot->userspace_addr;
815                 unsigned long end;
816
817                 end = start + (memslot->npages << PAGE_SHIFT);
818                 if (hva >= start && hva < end) {
819                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
820
821                         ret = handler(kvm, &memslot->rmap[gfn_offset], data);
822
823                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
824                                 int idx = gfn_offset;
825                                 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
826                                 ret |= handler(kvm,
827                                         &memslot->lpage_info[j][idx].rmap_pde,
828                                         data);
829                         }
830                         trace_kvm_age_page(hva, memslot, ret);
831                         retval |= ret;
832                 }
833         }
834
835         return retval;
836 }
837
838 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
839 {
840         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
841 }
842
843 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
844 {
845         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
846 }
847
848 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
849                          unsigned long data)
850 {
851         u64 *spte;
852         int young = 0;
853
854         /*
855          * Emulate the accessed bit for EPT, by checking if this page has
856          * an EPT mapping, and clearing it if it does. On the next access,
857          * a new EPT mapping will be established.
858          * This has some overhead, but not as much as the cost of swapping
859          * out actively used pages or breaking up actively used hugepages.
860          */
861         if (!shadow_accessed_mask)
862                 return kvm_unmap_rmapp(kvm, rmapp, data);
863
864         spte = rmap_next(kvm, rmapp, NULL);
865         while (spte) {
866                 int _young;
867                 u64 _spte = *spte;
868                 BUG_ON(!(_spte & PT_PRESENT_MASK));
869                 _young = _spte & PT_ACCESSED_MASK;
870                 if (_young) {
871                         young = 1;
872                         clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
873                 }
874                 spte = rmap_next(kvm, rmapp, spte);
875         }
876         return young;
877 }
878
879 #define RMAP_RECYCLE_THRESHOLD 1000
880
881 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
882 {
883         unsigned long *rmapp;
884         struct kvm_mmu_page *sp;
885
886         sp = page_header(__pa(spte));
887
888         gfn = unalias_gfn(vcpu->kvm, gfn);
889         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
890
891         kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
892         kvm_flush_remote_tlbs(vcpu->kvm);
893 }
894
895 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
896 {
897         return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
898 }
899
900 #ifdef MMU_DEBUG
901 static int is_empty_shadow_page(u64 *spt)
902 {
903         u64 *pos;
904         u64 *end;
905
906         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
907                 if (is_shadow_present_pte(*pos)) {
908                         printk(KERN_ERR "%s: %p %llx\n", __func__,
909                                pos, *pos);
910                         return 0;
911                 }
912         return 1;
913 }
914 #endif
915
916 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
917 {
918         ASSERT(is_empty_shadow_page(sp->spt));
919         list_del(&sp->link);
920         __free_page(virt_to_page(sp->spt));
921         if (!sp->role.direct)
922                 __free_page(virt_to_page(sp->gfns));
923         kmem_cache_free(mmu_page_header_cache, sp);
924         ++kvm->arch.n_free_mmu_pages;
925 }
926
927 static unsigned kvm_page_table_hashfn(gfn_t gfn)
928 {
929         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
930 }
931
932 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
933                                                u64 *parent_pte, int direct)
934 {
935         struct kvm_mmu_page *sp;
936
937         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
938         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
939         if (!direct)
940                 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
941                                                   PAGE_SIZE);
942         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
943         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
944         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
945         sp->multimapped = 0;
946         sp->parent_pte = parent_pte;
947         --vcpu->kvm->arch.n_free_mmu_pages;
948         return sp;
949 }
950
951 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
952                                     struct kvm_mmu_page *sp, u64 *parent_pte)
953 {
954         struct kvm_pte_chain *pte_chain;
955         struct hlist_node *node;
956         int i;
957
958         if (!parent_pte)
959                 return;
960         if (!sp->multimapped) {
961                 u64 *old = sp->parent_pte;
962
963                 if (!old) {
964                         sp->parent_pte = parent_pte;
965                         return;
966                 }
967                 sp->multimapped = 1;
968                 pte_chain = mmu_alloc_pte_chain(vcpu);
969                 INIT_HLIST_HEAD(&sp->parent_ptes);
970                 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
971                 pte_chain->parent_ptes[0] = old;
972         }
973         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
974                 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
975                         continue;
976                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
977                         if (!pte_chain->parent_ptes[i]) {
978                                 pte_chain->parent_ptes[i] = parent_pte;
979                                 return;
980                         }
981         }
982         pte_chain = mmu_alloc_pte_chain(vcpu);
983         BUG_ON(!pte_chain);
984         hlist_add_head(&pte_chain->link, &sp->parent_ptes);
985         pte_chain->parent_ptes[0] = parent_pte;
986 }
987
988 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
989                                        u64 *parent_pte)
990 {
991         struct kvm_pte_chain *pte_chain;
992         struct hlist_node *node;
993         int i;
994
995         if (!sp->multimapped) {
996                 BUG_ON(sp->parent_pte != parent_pte);
997                 sp->parent_pte = NULL;
998                 return;
999         }
1000         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1001                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1002                         if (!pte_chain->parent_ptes[i])
1003                                 break;
1004                         if (pte_chain->parent_ptes[i] != parent_pte)
1005                                 continue;
1006                         while (i + 1 < NR_PTE_CHAIN_ENTRIES
1007                                 && pte_chain->parent_ptes[i + 1]) {
1008                                 pte_chain->parent_ptes[i]
1009                                         = pte_chain->parent_ptes[i + 1];
1010                                 ++i;
1011                         }
1012                         pte_chain->parent_ptes[i] = NULL;
1013                         if (i == 0) {
1014                                 hlist_del(&pte_chain->link);
1015                                 mmu_free_pte_chain(pte_chain);
1016                                 if (hlist_empty(&sp->parent_ptes)) {
1017                                         sp->multimapped = 0;
1018                                         sp->parent_pte = NULL;
1019                                 }
1020                         }
1021                         return;
1022                 }
1023         BUG();
1024 }
1025
1026
1027 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1028 {
1029         struct kvm_pte_chain *pte_chain;
1030         struct hlist_node *node;
1031         struct kvm_mmu_page *parent_sp;
1032         int i;
1033
1034         if (!sp->multimapped && sp->parent_pte) {
1035                 parent_sp = page_header(__pa(sp->parent_pte));
1036                 fn(parent_sp);
1037                 mmu_parent_walk(parent_sp, fn);
1038                 return;
1039         }
1040         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1041                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1042                         if (!pte_chain->parent_ptes[i])
1043                                 break;
1044                         parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1045                         fn(parent_sp);
1046                         mmu_parent_walk(parent_sp, fn);
1047                 }
1048 }
1049
1050 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1051 {
1052         unsigned int index;
1053         struct kvm_mmu_page *sp = page_header(__pa(spte));
1054
1055         index = spte - sp->spt;
1056         if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1057                 sp->unsync_children++;
1058         WARN_ON(!sp->unsync_children);
1059 }
1060
1061 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1062 {
1063         struct kvm_pte_chain *pte_chain;
1064         struct hlist_node *node;
1065         int i;
1066
1067         if (!sp->parent_pte)
1068                 return;
1069
1070         if (!sp->multimapped) {
1071                 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1072                 return;
1073         }
1074
1075         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1076                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1077                         if (!pte_chain->parent_ptes[i])
1078                                 break;
1079                         kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1080                 }
1081 }
1082
1083 static int unsync_walk_fn(struct kvm_mmu_page *sp)
1084 {
1085         kvm_mmu_update_parents_unsync(sp);
1086         return 1;
1087 }
1088
1089 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1090 {
1091         mmu_parent_walk(sp, unsync_walk_fn);
1092         kvm_mmu_update_parents_unsync(sp);
1093 }
1094
1095 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1096                                     struct kvm_mmu_page *sp)
1097 {
1098         int i;
1099
1100         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1101                 sp->spt[i] = shadow_trap_nonpresent_pte;
1102 }
1103
1104 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1105                                struct kvm_mmu_page *sp)
1106 {
1107         return 1;
1108 }
1109
1110 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1111 {
1112 }
1113
1114 #define KVM_PAGE_ARRAY_NR 16
1115
1116 struct kvm_mmu_pages {
1117         struct mmu_page_and_offset {
1118                 struct kvm_mmu_page *sp;
1119                 unsigned int idx;
1120         } page[KVM_PAGE_ARRAY_NR];
1121         unsigned int nr;
1122 };
1123
1124 #define for_each_unsync_children(bitmap, idx)           \
1125         for (idx = find_first_bit(bitmap, 512);         \
1126              idx < 512;                                 \
1127              idx = find_next_bit(bitmap, 512, idx+1))
1128
1129 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1130                          int idx)
1131 {
1132         int i;
1133
1134         if (sp->unsync)
1135                 for (i=0; i < pvec->nr; i++)
1136                         if (pvec->page[i].sp == sp)
1137                                 return 0;
1138
1139         pvec->page[pvec->nr].sp = sp;
1140         pvec->page[pvec->nr].idx = idx;
1141         pvec->nr++;
1142         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1143 }
1144
1145 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1146                            struct kvm_mmu_pages *pvec)
1147 {
1148         int i, ret, nr_unsync_leaf = 0;
1149
1150         for_each_unsync_children(sp->unsync_child_bitmap, i) {
1151                 u64 ent = sp->spt[i];
1152
1153                 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1154                         struct kvm_mmu_page *child;
1155                         child = page_header(ent & PT64_BASE_ADDR_MASK);
1156
1157                         if (child->unsync_children) {
1158                                 if (mmu_pages_add(pvec, child, i))
1159                                         return -ENOSPC;
1160
1161                                 ret = __mmu_unsync_walk(child, pvec);
1162                                 if (!ret)
1163                                         __clear_bit(i, sp->unsync_child_bitmap);
1164                                 else if (ret > 0)
1165                                         nr_unsync_leaf += ret;
1166                                 else
1167                                         return ret;
1168                         }
1169
1170                         if (child->unsync) {
1171                                 nr_unsync_leaf++;
1172                                 if (mmu_pages_add(pvec, child, i))
1173                                         return -ENOSPC;
1174                         }
1175                 }
1176         }
1177
1178         if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1179                 sp->unsync_children = 0;
1180
1181         return nr_unsync_leaf;
1182 }
1183
1184 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1185                            struct kvm_mmu_pages *pvec)
1186 {
1187         if (!sp->unsync_children)
1188                 return 0;
1189
1190         mmu_pages_add(pvec, sp, 0);
1191         return __mmu_unsync_walk(sp, pvec);
1192 }
1193
1194 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1195 {
1196         WARN_ON(!sp->unsync);
1197         trace_kvm_mmu_sync_page(sp);
1198         sp->unsync = 0;
1199         --kvm->stat.mmu_unsync;
1200 }
1201
1202 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1203
1204 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1205                            bool clear_unsync)
1206 {
1207         if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1208                 kvm_mmu_zap_page(vcpu->kvm, sp);
1209                 return 1;
1210         }
1211
1212         if (clear_unsync) {
1213                 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1214                         kvm_flush_remote_tlbs(vcpu->kvm);
1215                 kvm_unlink_unsync_page(vcpu->kvm, sp);
1216         }
1217
1218         if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1219                 kvm_mmu_zap_page(vcpu->kvm, sp);
1220                 return 1;
1221         }
1222
1223         kvm_mmu_flush_tlb(vcpu);
1224         return 0;
1225 }
1226
1227 static void mmu_convert_notrap(struct kvm_mmu_page *sp);
1228 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1229                                    struct kvm_mmu_page *sp)
1230 {
1231         int ret;
1232
1233         ret = __kvm_sync_page(vcpu, sp, false);
1234         if (!ret)
1235                 mmu_convert_notrap(sp);
1236         return ret;
1237 }
1238
1239 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1240 {
1241         return __kvm_sync_page(vcpu, sp, true);
1242 }
1243
1244 /* @gfn should be write-protected at the call site */
1245 static void kvm_sync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1246 {
1247         struct hlist_head *bucket;
1248         struct kvm_mmu_page *s;
1249         struct hlist_node *node, *n;
1250         unsigned index;
1251         bool flush = false;
1252
1253         index = kvm_page_table_hashfn(gfn);
1254         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1255         hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1256                 if (s->gfn != gfn || !s->unsync || s->role.invalid)
1257                         continue;
1258
1259                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1260                 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1261                         (vcpu->arch.mmu.sync_page(vcpu, s))) {
1262                         kvm_mmu_zap_page(vcpu->kvm, s);
1263                         continue;
1264                 }
1265                 kvm_unlink_unsync_page(vcpu->kvm, s);
1266                 flush = true;
1267         }
1268
1269         if (flush)
1270                 kvm_mmu_flush_tlb(vcpu);
1271 }
1272
1273 struct mmu_page_path {
1274         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1275         unsigned int idx[PT64_ROOT_LEVEL-1];
1276 };
1277
1278 #define for_each_sp(pvec, sp, parents, i)                       \
1279                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1280                         sp = pvec.page[i].sp;                   \
1281                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1282                         i = mmu_pages_next(&pvec, &parents, i))
1283
1284 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1285                           struct mmu_page_path *parents,
1286                           int i)
1287 {
1288         int n;
1289
1290         for (n = i+1; n < pvec->nr; n++) {
1291                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1292
1293                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1294                         parents->idx[0] = pvec->page[n].idx;
1295                         return n;
1296                 }
1297
1298                 parents->parent[sp->role.level-2] = sp;
1299                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1300         }
1301
1302         return n;
1303 }
1304
1305 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1306 {
1307         struct kvm_mmu_page *sp;
1308         unsigned int level = 0;
1309
1310         do {
1311                 unsigned int idx = parents->idx[level];
1312
1313                 sp = parents->parent[level];
1314                 if (!sp)
1315                         return;
1316
1317                 --sp->unsync_children;
1318                 WARN_ON((int)sp->unsync_children < 0);
1319                 __clear_bit(idx, sp->unsync_child_bitmap);
1320                 level++;
1321         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1322 }
1323
1324 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1325                                struct mmu_page_path *parents,
1326                                struct kvm_mmu_pages *pvec)
1327 {
1328         parents->parent[parent->role.level-1] = NULL;
1329         pvec->nr = 0;
1330 }
1331
1332 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1333                               struct kvm_mmu_page *parent)
1334 {
1335         int i;
1336         struct kvm_mmu_page *sp;
1337         struct mmu_page_path parents;
1338         struct kvm_mmu_pages pages;
1339
1340         kvm_mmu_pages_init(parent, &parents, &pages);
1341         while (mmu_unsync_walk(parent, &pages)) {
1342                 int protected = 0;
1343
1344                 for_each_sp(pages, sp, parents, i)
1345                         protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1346
1347                 if (protected)
1348                         kvm_flush_remote_tlbs(vcpu->kvm);
1349
1350                 for_each_sp(pages, sp, parents, i) {
1351                         kvm_sync_page(vcpu, sp);
1352                         mmu_pages_clear_parents(&parents);
1353                 }
1354                 cond_resched_lock(&vcpu->kvm->mmu_lock);
1355                 kvm_mmu_pages_init(parent, &parents, &pages);
1356         }
1357 }
1358
1359 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1360                                              gfn_t gfn,
1361                                              gva_t gaddr,
1362                                              unsigned level,
1363                                              int direct,
1364                                              unsigned access,
1365                                              u64 *parent_pte)
1366 {
1367         union kvm_mmu_page_role role;
1368         unsigned index;
1369         unsigned quadrant;
1370         struct hlist_head *bucket;
1371         struct kvm_mmu_page *sp;
1372         struct hlist_node *node, *tmp;
1373         bool need_sync = false;
1374
1375         role = vcpu->arch.mmu.base_role;
1376         role.level = level;
1377         role.direct = direct;
1378         if (role.direct)
1379                 role.cr4_pae = 0;
1380         role.access = access;
1381         if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1382                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1383                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1384                 role.quadrant = quadrant;
1385         }
1386         index = kvm_page_table_hashfn(gfn);
1387         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1388         hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1389                 if (sp->gfn == gfn) {
1390                         if (!need_sync && sp->unsync)
1391                                 need_sync = true;
1392
1393                         if (sp->role.word != role.word)
1394                                 continue;
1395
1396                         if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1397                                 break;
1398
1399                         mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1400                         if (sp->unsync_children) {
1401                                 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1402                                 kvm_mmu_mark_parents_unsync(sp);
1403                         } else if (sp->unsync)
1404                                 kvm_mmu_mark_parents_unsync(sp);
1405
1406                         trace_kvm_mmu_get_page(sp, false);
1407                         return sp;
1408                 }
1409         ++vcpu->kvm->stat.mmu_cache_miss;
1410         sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1411         if (!sp)
1412                 return sp;
1413         sp->gfn = gfn;
1414         sp->role = role;
1415         hlist_add_head(&sp->hash_link, bucket);
1416         if (!direct) {
1417                 if (rmap_write_protect(vcpu->kvm, gfn))
1418                         kvm_flush_remote_tlbs(vcpu->kvm);
1419                 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1420                         kvm_sync_pages(vcpu, gfn);
1421
1422                 account_shadowed(vcpu->kvm, gfn);
1423         }
1424         if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1425                 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1426         else
1427                 nonpaging_prefetch_page(vcpu, sp);
1428         trace_kvm_mmu_get_page(sp, true);
1429         return sp;
1430 }
1431
1432 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1433                              struct kvm_vcpu *vcpu, u64 addr)
1434 {
1435         iterator->addr = addr;
1436         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1437         iterator->level = vcpu->arch.mmu.shadow_root_level;
1438         if (iterator->level == PT32E_ROOT_LEVEL) {
1439                 iterator->shadow_addr
1440                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1441                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1442                 --iterator->level;
1443                 if (!iterator->shadow_addr)
1444                         iterator->level = 0;
1445         }
1446 }
1447
1448 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1449 {
1450         if (iterator->level < PT_PAGE_TABLE_LEVEL)
1451                 return false;
1452
1453         if (iterator->level == PT_PAGE_TABLE_LEVEL)
1454                 if (is_large_pte(*iterator->sptep))
1455                         return false;
1456
1457         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1458         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1459         return true;
1460 }
1461
1462 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1463 {
1464         iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1465         --iterator->level;
1466 }
1467
1468 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1469                                          struct kvm_mmu_page *sp)
1470 {
1471         unsigned i;
1472         u64 *pt;
1473         u64 ent;
1474
1475         pt = sp->spt;
1476
1477         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1478                 ent = pt[i];
1479
1480                 if (is_shadow_present_pte(ent)) {
1481                         if (!is_last_spte(ent, sp->role.level)) {
1482                                 ent &= PT64_BASE_ADDR_MASK;
1483                                 mmu_page_remove_parent_pte(page_header(ent),
1484                                                            &pt[i]);
1485                         } else {
1486                                 if (is_large_pte(ent))
1487                                         --kvm->stat.lpages;
1488                                 rmap_remove(kvm, &pt[i]);
1489                         }
1490                 }
1491                 pt[i] = shadow_trap_nonpresent_pte;
1492         }
1493 }
1494
1495 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1496 {
1497         mmu_page_remove_parent_pte(sp, parent_pte);
1498 }
1499
1500 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1501 {
1502         int i;
1503         struct kvm_vcpu *vcpu;
1504
1505         kvm_for_each_vcpu(i, vcpu, kvm)
1506                 vcpu->arch.last_pte_updated = NULL;
1507 }
1508
1509 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1510 {
1511         u64 *parent_pte;
1512
1513         while (sp->multimapped || sp->parent_pte) {
1514                 if (!sp->multimapped)
1515                         parent_pte = sp->parent_pte;
1516                 else {
1517                         struct kvm_pte_chain *chain;
1518
1519                         chain = container_of(sp->parent_ptes.first,
1520                                              struct kvm_pte_chain, link);
1521                         parent_pte = chain->parent_ptes[0];
1522                 }
1523                 BUG_ON(!parent_pte);
1524                 kvm_mmu_put_page(sp, parent_pte);
1525                 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1526         }
1527 }
1528
1529 static int mmu_zap_unsync_children(struct kvm *kvm,
1530                                    struct kvm_mmu_page *parent)
1531 {
1532         int i, zapped = 0;
1533         struct mmu_page_path parents;
1534         struct kvm_mmu_pages pages;
1535
1536         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1537                 return 0;
1538
1539         kvm_mmu_pages_init(parent, &parents, &pages);
1540         while (mmu_unsync_walk(parent, &pages)) {
1541                 struct kvm_mmu_page *sp;
1542
1543                 for_each_sp(pages, sp, parents, i) {
1544                         kvm_mmu_zap_page(kvm, sp);
1545                         mmu_pages_clear_parents(&parents);
1546                         zapped++;
1547                 }
1548                 kvm_mmu_pages_init(parent, &parents, &pages);
1549         }
1550
1551         return zapped;
1552 }
1553
1554 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1555 {
1556         int ret;
1557
1558         trace_kvm_mmu_zap_page(sp);
1559         ++kvm->stat.mmu_shadow_zapped;
1560         ret = mmu_zap_unsync_children(kvm, sp);
1561         kvm_mmu_page_unlink_children(kvm, sp);
1562         kvm_mmu_unlink_parents(kvm, sp);
1563         kvm_flush_remote_tlbs(kvm);
1564         if (!sp->role.invalid && !sp->role.direct)
1565                 unaccount_shadowed(kvm, sp->gfn);
1566         if (sp->unsync)
1567                 kvm_unlink_unsync_page(kvm, sp);
1568         if (!sp->root_count) {
1569                 /* Count self */
1570                 ret++;
1571                 hlist_del(&sp->hash_link);
1572                 kvm_mmu_free_page(kvm, sp);
1573         } else {
1574                 sp->role.invalid = 1;
1575                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1576                 kvm_reload_remote_mmus(kvm);
1577         }
1578         kvm_mmu_reset_last_pte_updated(kvm);
1579         return ret;
1580 }
1581
1582 /*
1583  * Changing the number of mmu pages allocated to the vm
1584  * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1585  */
1586 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1587 {
1588         int used_pages;
1589
1590         used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1591         used_pages = max(0, used_pages);
1592
1593         /*
1594          * If we set the number of mmu pages to be smaller be than the
1595          * number of actived pages , we must to free some mmu pages before we
1596          * change the value
1597          */
1598
1599         if (used_pages > kvm_nr_mmu_pages) {
1600                 while (used_pages > kvm_nr_mmu_pages &&
1601                         !list_empty(&kvm->arch.active_mmu_pages)) {
1602                         struct kvm_mmu_page *page;
1603
1604                         page = container_of(kvm->arch.active_mmu_pages.prev,
1605                                             struct kvm_mmu_page, link);
1606                         used_pages -= kvm_mmu_zap_page(kvm, page);
1607                 }
1608                 kvm_nr_mmu_pages = used_pages;
1609                 kvm->arch.n_free_mmu_pages = 0;
1610         }
1611         else
1612                 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1613                                          - kvm->arch.n_alloc_mmu_pages;
1614
1615         kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1616 }
1617
1618 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1619 {
1620         unsigned index;
1621         struct hlist_head *bucket;
1622         struct kvm_mmu_page *sp;
1623         struct hlist_node *node, *n;
1624         int r;
1625
1626         pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1627         r = 0;
1628         index = kvm_page_table_hashfn(gfn);
1629         bucket = &kvm->arch.mmu_page_hash[index];
1630 restart:
1631         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1632                 if (sp->gfn == gfn && !sp->role.direct) {
1633                         pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1634                                  sp->role.word);
1635                         r = 1;
1636                         if (kvm_mmu_zap_page(kvm, sp))
1637                                 goto restart;
1638                 }
1639         return r;
1640 }
1641
1642 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1643 {
1644         unsigned index;
1645         struct hlist_head *bucket;
1646         struct kvm_mmu_page *sp;
1647         struct hlist_node *node, *nn;
1648
1649         index = kvm_page_table_hashfn(gfn);
1650         bucket = &kvm->arch.mmu_page_hash[index];
1651 restart:
1652         hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1653                 if (sp->gfn == gfn && !sp->role.direct
1654                     && !sp->role.invalid) {
1655                         pgprintk("%s: zap %lx %x\n",
1656                                  __func__, gfn, sp->role.word);
1657                         if (kvm_mmu_zap_page(kvm, sp))
1658                                 goto restart;
1659                 }
1660         }
1661 }
1662
1663 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1664 {
1665         int slot = memslot_id(kvm, gfn);
1666         struct kvm_mmu_page *sp = page_header(__pa(pte));
1667
1668         __set_bit(slot, sp->slot_bitmap);
1669 }
1670
1671 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1672 {
1673         int i;
1674         u64 *pt = sp->spt;
1675
1676         if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1677                 return;
1678
1679         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1680                 if (pt[i] == shadow_notrap_nonpresent_pte)
1681                         __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1682         }
1683 }
1684
1685 /*
1686  * The function is based on mtrr_type_lookup() in
1687  * arch/x86/kernel/cpu/mtrr/generic.c
1688  */
1689 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1690                          u64 start, u64 end)
1691 {
1692         int i;
1693         u64 base, mask;
1694         u8 prev_match, curr_match;
1695         int num_var_ranges = KVM_NR_VAR_MTRR;
1696
1697         if (!mtrr_state->enabled)
1698                 return 0xFF;
1699
1700         /* Make end inclusive end, instead of exclusive */
1701         end--;
1702
1703         /* Look in fixed ranges. Just return the type as per start */
1704         if (mtrr_state->have_fixed && (start < 0x100000)) {
1705                 int idx;
1706
1707                 if (start < 0x80000) {
1708                         idx = 0;
1709                         idx += (start >> 16);
1710                         return mtrr_state->fixed_ranges[idx];
1711                 } else if (start < 0xC0000) {
1712                         idx = 1 * 8;
1713                         idx += ((start - 0x80000) >> 14);
1714                         return mtrr_state->fixed_ranges[idx];
1715                 } else if (start < 0x1000000) {
1716                         idx = 3 * 8;
1717                         idx += ((start - 0xC0000) >> 12);
1718                         return mtrr_state->fixed_ranges[idx];
1719                 }
1720         }
1721
1722         /*
1723          * Look in variable ranges
1724          * Look of multiple ranges matching this address and pick type
1725          * as per MTRR precedence
1726          */
1727         if (!(mtrr_state->enabled & 2))
1728                 return mtrr_state->def_type;
1729
1730         prev_match = 0xFF;
1731         for (i = 0; i < num_var_ranges; ++i) {
1732                 unsigned short start_state, end_state;
1733
1734                 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1735                         continue;
1736
1737                 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1738                        (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1739                 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1740                        (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1741
1742                 start_state = ((start & mask) == (base & mask));
1743                 end_state = ((end & mask) == (base & mask));
1744                 if (start_state != end_state)
1745                         return 0xFE;
1746
1747                 if ((start & mask) != (base & mask))
1748                         continue;
1749
1750                 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1751                 if (prev_match == 0xFF) {
1752                         prev_match = curr_match;
1753                         continue;
1754                 }
1755
1756                 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1757                     curr_match == MTRR_TYPE_UNCACHABLE)
1758                         return MTRR_TYPE_UNCACHABLE;
1759
1760                 if ((prev_match == MTRR_TYPE_WRBACK &&
1761                      curr_match == MTRR_TYPE_WRTHROUGH) ||
1762                     (prev_match == MTRR_TYPE_WRTHROUGH &&
1763                      curr_match == MTRR_TYPE_WRBACK)) {
1764                         prev_match = MTRR_TYPE_WRTHROUGH;
1765                         curr_match = MTRR_TYPE_WRTHROUGH;
1766                 }
1767
1768                 if (prev_match != curr_match)
1769                         return MTRR_TYPE_UNCACHABLE;
1770         }
1771
1772         if (prev_match != 0xFF)
1773                 return prev_match;
1774
1775         return mtrr_state->def_type;
1776 }
1777
1778 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1779 {
1780         u8 mtrr;
1781
1782         mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1783                              (gfn << PAGE_SHIFT) + PAGE_SIZE);
1784         if (mtrr == 0xfe || mtrr == 0xff)
1785                 mtrr = MTRR_TYPE_WRBACK;
1786         return mtrr;
1787 }
1788 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1789
1790 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1791 {
1792         trace_kvm_mmu_unsync_page(sp);
1793         ++vcpu->kvm->stat.mmu_unsync;
1794         sp->unsync = 1;
1795
1796         kvm_mmu_mark_parents_unsync(sp);
1797         mmu_convert_notrap(sp);
1798 }
1799
1800 static void kvm_unsync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1801 {
1802         struct hlist_head *bucket;
1803         struct kvm_mmu_page *s;
1804         struct hlist_node *node, *n;
1805         unsigned index;
1806
1807         index = kvm_page_table_hashfn(gfn);
1808         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1809
1810         hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1811                 if (s->gfn != gfn || s->role.direct || s->unsync ||
1812                       s->role.invalid)
1813                         continue;
1814                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1815                 __kvm_unsync_page(vcpu, s);
1816         }
1817 }
1818
1819 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1820                                   bool can_unsync)
1821 {
1822         unsigned index;
1823         struct hlist_head *bucket;
1824         struct kvm_mmu_page *s;
1825         struct hlist_node *node, *n;
1826         bool need_unsync = false;
1827
1828         index = kvm_page_table_hashfn(gfn);
1829         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1830         hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1831                 if (s->gfn != gfn || s->role.direct || s->role.invalid)
1832                         continue;
1833
1834                 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1835                         return 1;
1836
1837                 if (!need_unsync && !s->unsync) {
1838                         if (!can_unsync || !oos_shadow)
1839                                 return 1;
1840                         need_unsync = true;
1841                 }
1842         }
1843         if (need_unsync)
1844                 kvm_unsync_pages(vcpu, gfn);
1845         return 0;
1846 }
1847
1848 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1849                     unsigned pte_access, int user_fault,
1850                     int write_fault, int dirty, int level,
1851                     gfn_t gfn, pfn_t pfn, bool speculative,
1852                     bool can_unsync, bool reset_host_protection)
1853 {
1854         u64 spte;
1855         int ret = 0;
1856
1857         /*
1858          * We don't set the accessed bit, since we sometimes want to see
1859          * whether the guest actually used the pte (in order to detect
1860          * demand paging).
1861          */
1862         spte = shadow_base_present_pte | shadow_dirty_mask;
1863         if (!speculative)
1864                 spte |= shadow_accessed_mask;
1865         if (!dirty)
1866                 pte_access &= ~ACC_WRITE_MASK;
1867         if (pte_access & ACC_EXEC_MASK)
1868                 spte |= shadow_x_mask;
1869         else
1870                 spte |= shadow_nx_mask;
1871         if (pte_access & ACC_USER_MASK)
1872                 spte |= shadow_user_mask;
1873         if (level > PT_PAGE_TABLE_LEVEL)
1874                 spte |= PT_PAGE_SIZE_MASK;
1875         if (tdp_enabled)
1876                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1877                         kvm_is_mmio_pfn(pfn));
1878
1879         if (reset_host_protection)
1880                 spte |= SPTE_HOST_WRITEABLE;
1881
1882         spte |= (u64)pfn << PAGE_SHIFT;
1883
1884         if ((pte_access & ACC_WRITE_MASK)
1885             || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1886
1887                 if (level > PT_PAGE_TABLE_LEVEL &&
1888                     has_wrprotected_page(vcpu->kvm, gfn, level)) {
1889                         ret = 1;
1890                         rmap_remove(vcpu->kvm, sptep);
1891                         spte = shadow_trap_nonpresent_pte;
1892                         goto set_pte;
1893                 }
1894
1895                 spte |= PT_WRITABLE_MASK;
1896
1897                 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1898                         spte &= ~PT_USER_MASK;
1899
1900                 /*
1901                  * Optimization: for pte sync, if spte was writable the hash
1902                  * lookup is unnecessary (and expensive). Write protection
1903                  * is responsibility of mmu_get_page / kvm_sync_page.
1904                  * Same reasoning can be applied to dirty page accounting.
1905                  */
1906                 if (!can_unsync && is_writable_pte(*sptep))
1907                         goto set_pte;
1908
1909                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1910                         pgprintk("%s: found shadow page for %lx, marking ro\n",
1911                                  __func__, gfn);
1912                         ret = 1;
1913                         pte_access &= ~ACC_WRITE_MASK;
1914                         if (is_writable_pte(spte))
1915                                 spte &= ~PT_WRITABLE_MASK;
1916                 }
1917         }
1918
1919         if (pte_access & ACC_WRITE_MASK)
1920                 mark_page_dirty(vcpu->kvm, gfn);
1921
1922 set_pte:
1923         __set_spte(sptep, spte);
1924         return ret;
1925 }
1926
1927 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1928                          unsigned pt_access, unsigned pte_access,
1929                          int user_fault, int write_fault, int dirty,
1930                          int *ptwrite, int level, gfn_t gfn,
1931                          pfn_t pfn, bool speculative,
1932                          bool reset_host_protection)
1933 {
1934         int was_rmapped = 0;
1935         int was_writable = is_writable_pte(*sptep);
1936         int rmap_count;
1937
1938         pgprintk("%s: spte %llx access %x write_fault %d"
1939                  " user_fault %d gfn %lx\n",
1940                  __func__, *sptep, pt_access,
1941                  write_fault, user_fault, gfn);
1942
1943         if (is_rmap_spte(*sptep)) {
1944                 /*
1945                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1946                  * the parent of the now unreachable PTE.
1947                  */
1948                 if (level > PT_PAGE_TABLE_LEVEL &&
1949                     !is_large_pte(*sptep)) {
1950                         struct kvm_mmu_page *child;
1951                         u64 pte = *sptep;
1952
1953                         child = page_header(pte & PT64_BASE_ADDR_MASK);
1954                         mmu_page_remove_parent_pte(child, sptep);
1955                         __set_spte(sptep, shadow_trap_nonpresent_pte);
1956                         kvm_flush_remote_tlbs(vcpu->kvm);
1957                 } else if (pfn != spte_to_pfn(*sptep)) {
1958                         pgprintk("hfn old %lx new %lx\n",
1959                                  spte_to_pfn(*sptep), pfn);
1960                         rmap_remove(vcpu->kvm, sptep);
1961                         __set_spte(sptep, shadow_trap_nonpresent_pte);
1962                         kvm_flush_remote_tlbs(vcpu->kvm);
1963                 } else
1964                         was_rmapped = 1;
1965         }
1966
1967         if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1968                       dirty, level, gfn, pfn, speculative, true,
1969                       reset_host_protection)) {
1970                 if (write_fault)
1971                         *ptwrite = 1;
1972                 kvm_x86_ops->tlb_flush(vcpu);
1973         }
1974
1975         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1976         pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1977                  is_large_pte(*sptep)? "2MB" : "4kB",
1978                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1979                  *sptep, sptep);
1980         if (!was_rmapped && is_large_pte(*sptep))
1981                 ++vcpu->kvm->stat.lpages;
1982
1983         page_header_update_slot(vcpu->kvm, sptep, gfn);
1984         if (!was_rmapped) {
1985                 rmap_count = rmap_add(vcpu, sptep, gfn);
1986                 kvm_release_pfn_clean(pfn);
1987                 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1988                         rmap_recycle(vcpu, sptep, gfn);
1989         } else {
1990                 if (was_writable)
1991                         kvm_release_pfn_dirty(pfn);
1992                 else
1993                         kvm_release_pfn_clean(pfn);
1994         }
1995         if (speculative) {
1996                 vcpu->arch.last_pte_updated = sptep;
1997                 vcpu->arch.last_pte_gfn = gfn;
1998         }
1999 }
2000
2001 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2002 {
2003 }
2004
2005 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2006                         int level, gfn_t gfn, pfn_t pfn)
2007 {
2008         struct kvm_shadow_walk_iterator iterator;
2009         struct kvm_mmu_page *sp;
2010         int pt_write = 0;
2011         gfn_t pseudo_gfn;
2012
2013         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2014                 if (iterator.level == level) {
2015                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2016                                      0, write, 1, &pt_write,
2017                                      level, gfn, pfn, false, true);
2018                         ++vcpu->stat.pf_fixed;
2019                         break;
2020                 }
2021
2022                 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2023                         u64 base_addr = iterator.addr;
2024
2025                         base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2026                         pseudo_gfn = base_addr >> PAGE_SHIFT;
2027                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2028                                               iterator.level - 1,
2029                                               1, ACC_ALL, iterator.sptep);
2030                         if (!sp) {
2031                                 pgprintk("nonpaging_map: ENOMEM\n");
2032                                 kvm_release_pfn_clean(pfn);
2033                                 return -ENOMEM;
2034                         }
2035
2036                         __set_spte(iterator.sptep,
2037                                    __pa(sp->spt)
2038                                    | PT_PRESENT_MASK | PT_WRITABLE_MASK
2039                                    | shadow_user_mask | shadow_x_mask);
2040                 }
2041         }
2042         return pt_write;
2043 }
2044
2045 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2046 {
2047         char buf[1];
2048         void __user *hva;
2049         int r;
2050
2051         /* Touch the page, so send SIGBUS */
2052         hva = (void __user *)gfn_to_hva(kvm, gfn);
2053         r = copy_from_user(buf, hva, 1);
2054 }
2055
2056 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2057 {
2058         kvm_release_pfn_clean(pfn);
2059         if (is_hwpoison_pfn(pfn)) {
2060                 kvm_send_hwpoison_signal(kvm, gfn);
2061                 return 0;
2062         }
2063         return 1;
2064 }
2065
2066 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2067 {
2068         int r;
2069         int level;
2070         pfn_t pfn;
2071         unsigned long mmu_seq;
2072
2073         level = mapping_level(vcpu, gfn);
2074
2075         /*
2076          * This path builds a PAE pagetable - so we can map 2mb pages at
2077          * maximum. Therefore check if the level is larger than that.
2078          */
2079         if (level > PT_DIRECTORY_LEVEL)
2080                 level = PT_DIRECTORY_LEVEL;
2081
2082         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2083
2084         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2085         smp_rmb();
2086         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2087
2088         /* mmio */
2089         if (is_error_pfn(pfn))
2090                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2091
2092         spin_lock(&vcpu->kvm->mmu_lock);
2093         if (mmu_notifier_retry(vcpu, mmu_seq))
2094                 goto out_unlock;
2095         kvm_mmu_free_some_pages(vcpu);
2096         r = __direct_map(vcpu, v, write, level, gfn, pfn);
2097         spin_unlock(&vcpu->kvm->mmu_lock);
2098
2099
2100         return r;
2101
2102 out_unlock:
2103         spin_unlock(&vcpu->kvm->mmu_lock);
2104         kvm_release_pfn_clean(pfn);
2105         return 0;
2106 }
2107
2108
2109 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2110 {
2111         int i;
2112         struct kvm_mmu_page *sp;
2113
2114         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2115                 return;
2116         spin_lock(&vcpu->kvm->mmu_lock);
2117         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2118                 hpa_t root = vcpu->arch.mmu.root_hpa;
2119
2120                 sp = page_header(root);
2121                 --sp->root_count;
2122                 if (!sp->root_count && sp->role.invalid)
2123                         kvm_mmu_zap_page(vcpu->kvm, sp);
2124                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2125                 spin_unlock(&vcpu->kvm->mmu_lock);
2126                 return;
2127         }
2128         for (i = 0; i < 4; ++i) {
2129                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2130
2131                 if (root) {
2132                         root &= PT64_BASE_ADDR_MASK;
2133                         sp = page_header(root);
2134                         --sp->root_count;
2135                         if (!sp->root_count && sp->role.invalid)
2136                                 kvm_mmu_zap_page(vcpu->kvm, sp);
2137                 }
2138                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2139         }
2140         spin_unlock(&vcpu->kvm->mmu_lock);
2141         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2142 }
2143
2144 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2145 {
2146         int ret = 0;
2147
2148         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2149                 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2150                 ret = 1;
2151         }
2152
2153         return ret;
2154 }
2155
2156 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2157 {
2158         int i;
2159         gfn_t root_gfn;
2160         struct kvm_mmu_page *sp;
2161         int direct = 0;
2162         u64 pdptr;
2163
2164         root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2165
2166         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2167                 hpa_t root = vcpu->arch.mmu.root_hpa;
2168
2169                 ASSERT(!VALID_PAGE(root));
2170                 if (mmu_check_root(vcpu, root_gfn))
2171                         return 1;
2172                 if (tdp_enabled) {
2173                         direct = 1;
2174                         root_gfn = 0;
2175                 }
2176                 spin_lock(&vcpu->kvm->mmu_lock);
2177                 kvm_mmu_free_some_pages(vcpu);
2178                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2179                                       PT64_ROOT_LEVEL, direct,
2180                                       ACC_ALL, NULL);
2181                 root = __pa(sp->spt);
2182                 ++sp->root_count;
2183                 spin_unlock(&vcpu->kvm->mmu_lock);
2184                 vcpu->arch.mmu.root_hpa = root;
2185                 return 0;
2186         }
2187         direct = !is_paging(vcpu);
2188         for (i = 0; i < 4; ++i) {
2189                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2190
2191                 ASSERT(!VALID_PAGE(root));
2192                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2193                         pdptr = kvm_pdptr_read(vcpu, i);
2194                         if (!is_present_gpte(pdptr)) {
2195                                 vcpu->arch.mmu.pae_root[i] = 0;
2196                                 continue;
2197                         }
2198                         root_gfn = pdptr >> PAGE_SHIFT;
2199                 } else if (vcpu->arch.mmu.root_level == 0)
2200                         root_gfn = 0;
2201                 if (mmu_check_root(vcpu, root_gfn))
2202                         return 1;
2203                 if (tdp_enabled) {
2204                         direct = 1;
2205                         root_gfn = i << 30;
2206                 }
2207                 spin_lock(&vcpu->kvm->mmu_lock);
2208                 kvm_mmu_free_some_pages(vcpu);
2209                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2210                                       PT32_ROOT_LEVEL, direct,
2211                                       ACC_ALL, NULL);
2212                 root = __pa(sp->spt);
2213                 ++sp->root_count;
2214                 spin_unlock(&vcpu->kvm->mmu_lock);
2215
2216                 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2217         }
2218         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2219         return 0;
2220 }
2221
2222 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2223 {
2224         int i;
2225         struct kvm_mmu_page *sp;
2226
2227         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2228                 return;
2229         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2230                 hpa_t root = vcpu->arch.mmu.root_hpa;
2231                 sp = page_header(root);
2232                 mmu_sync_children(vcpu, sp);
2233                 return;
2234         }
2235         for (i = 0; i < 4; ++i) {
2236                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2237
2238                 if (root && VALID_PAGE(root)) {
2239                         root &= PT64_BASE_ADDR_MASK;
2240                         sp = page_header(root);
2241                         mmu_sync_children(vcpu, sp);
2242                 }
2243         }
2244 }
2245
2246 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2247 {
2248         spin_lock(&vcpu->kvm->mmu_lock);
2249         mmu_sync_roots(vcpu);
2250         spin_unlock(&vcpu->kvm->mmu_lock);
2251 }
2252
2253 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2254                                   u32 access, u32 *error)
2255 {
2256         if (error)
2257                 *error = 0;
2258         return vaddr;
2259 }
2260
2261 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2262                                 u32 error_code)
2263 {
2264         gfn_t gfn;
2265         int r;
2266
2267         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2268         r = mmu_topup_memory_caches(vcpu);
2269         if (r)
2270                 return r;
2271
2272         ASSERT(vcpu);
2273         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2274
2275         gfn = gva >> PAGE_SHIFT;
2276
2277         return nonpaging_map(vcpu, gva & PAGE_MASK,
2278                              error_code & PFERR_WRITE_MASK, gfn);
2279 }
2280
2281 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2282                                 u32 error_code)
2283 {
2284         pfn_t pfn;
2285         int r;
2286         int level;
2287         gfn_t gfn = gpa >> PAGE_SHIFT;
2288         unsigned long mmu_seq;
2289
2290         ASSERT(vcpu);
2291         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2292
2293         r = mmu_topup_memory_caches(vcpu);
2294         if (r)
2295                 return r;
2296
2297         level = mapping_level(vcpu, gfn);
2298
2299         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2300
2301         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2302         smp_rmb();
2303         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2304         if (is_error_pfn(pfn))
2305                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2306         spin_lock(&vcpu->kvm->mmu_lock);
2307         if (mmu_notifier_retry(vcpu, mmu_seq))
2308                 goto out_unlock;
2309         kvm_mmu_free_some_pages(vcpu);
2310         r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2311                          level, gfn, pfn);
2312         spin_unlock(&vcpu->kvm->mmu_lock);
2313
2314         return r;
2315
2316 out_unlock:
2317         spin_unlock(&vcpu->kvm->mmu_lock);
2318         kvm_release_pfn_clean(pfn);
2319         return 0;
2320 }
2321
2322 static void nonpaging_free(struct kvm_vcpu *vcpu)
2323 {
2324         mmu_free_roots(vcpu);
2325 }
2326
2327 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2328 {
2329         struct kvm_mmu *context = &vcpu->arch.mmu;
2330
2331         context->new_cr3 = nonpaging_new_cr3;
2332         context->page_fault = nonpaging_page_fault;
2333         context->gva_to_gpa = nonpaging_gva_to_gpa;
2334         context->free = nonpaging_free;
2335         context->prefetch_page = nonpaging_prefetch_page;
2336         context->sync_page = nonpaging_sync_page;
2337         context->invlpg = nonpaging_invlpg;
2338         context->root_level = 0;
2339         context->shadow_root_level = PT32E_ROOT_LEVEL;
2340         context->root_hpa = INVALID_PAGE;
2341         return 0;
2342 }
2343
2344 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2345 {
2346         ++vcpu->stat.tlb_flush;
2347         kvm_x86_ops->tlb_flush(vcpu);
2348 }
2349
2350 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2351 {
2352         pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2353         mmu_free_roots(vcpu);
2354 }
2355
2356 static void inject_page_fault(struct kvm_vcpu *vcpu,
2357                               u64 addr,
2358                               u32 err_code)
2359 {
2360         kvm_inject_page_fault(vcpu, addr, err_code);
2361 }
2362
2363 static void paging_free(struct kvm_vcpu *vcpu)
2364 {
2365         nonpaging_free(vcpu);
2366 }
2367
2368 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2369 {
2370         int bit7;
2371
2372         bit7 = (gpte >> 7) & 1;
2373         return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2374 }
2375
2376 #define PTTYPE 64
2377 #include "paging_tmpl.h"
2378 #undef PTTYPE
2379
2380 #define PTTYPE 32
2381 #include "paging_tmpl.h"
2382 #undef PTTYPE
2383
2384 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2385 {
2386         struct kvm_mmu *context = &vcpu->arch.mmu;
2387         int maxphyaddr = cpuid_maxphyaddr(vcpu);
2388         u64 exb_bit_rsvd = 0;
2389
2390         if (!is_nx(vcpu))
2391                 exb_bit_rsvd = rsvd_bits(63, 63);
2392         switch (level) {
2393         case PT32_ROOT_LEVEL:
2394                 /* no rsvd bits for 2 level 4K page table entries */
2395                 context->rsvd_bits_mask[0][1] = 0;
2396                 context->rsvd_bits_mask[0][0] = 0;
2397                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2398
2399                 if (!is_pse(vcpu)) {
2400                         context->rsvd_bits_mask[1][1] = 0;
2401                         break;
2402                 }
2403
2404                 if (is_cpuid_PSE36())
2405                         /* 36bits PSE 4MB page */
2406                         context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2407                 else
2408                         /* 32 bits PSE 4MB page */
2409                         context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2410                 break;
2411         case PT32E_ROOT_LEVEL:
2412                 context->rsvd_bits_mask[0][2] =
2413                         rsvd_bits(maxphyaddr, 63) |
2414                         rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
2415                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2416                         rsvd_bits(maxphyaddr, 62);      /* PDE */
2417                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2418                         rsvd_bits(maxphyaddr, 62);      /* PTE */
2419                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2420                         rsvd_bits(maxphyaddr, 62) |
2421                         rsvd_bits(13, 20);              /* large page */
2422                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2423                 break;
2424         case PT64_ROOT_LEVEL:
2425                 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2426                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2427                 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2428                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2429                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2430                         rsvd_bits(maxphyaddr, 51);
2431                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2432                         rsvd_bits(maxphyaddr, 51);
2433                 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2434                 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2435                         rsvd_bits(maxphyaddr, 51) |
2436                         rsvd_bits(13, 29);
2437                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2438                         rsvd_bits(maxphyaddr, 51) |
2439                         rsvd_bits(13, 20);              /* large page */
2440                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2441                 break;
2442         }
2443 }
2444
2445 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2446 {
2447         struct kvm_mmu *context = &vcpu->arch.mmu;
2448
2449         ASSERT(is_pae(vcpu));
2450         context->new_cr3 = paging_new_cr3;
2451         context->page_fault = paging64_page_fault;
2452         context->gva_to_gpa = paging64_gva_to_gpa;
2453         context->prefetch_page = paging64_prefetch_page;
2454         context->sync_page = paging64_sync_page;
2455         context->invlpg = paging64_invlpg;
2456         context->free = paging_free;
2457         context->root_level = level;
2458         context->shadow_root_level = level;
2459         context->root_hpa = INVALID_PAGE;
2460         return 0;
2461 }
2462
2463 static int paging64_init_context(struct kvm_vcpu *vcpu)
2464 {
2465         reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2466         return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2467 }
2468
2469 static int paging32_init_context(struct kvm_vcpu *vcpu)
2470 {
2471         struct kvm_mmu *context = &vcpu->arch.mmu;
2472
2473         reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2474         context->new_cr3 = paging_new_cr3;
2475         context->page_fault = paging32_page_fault;
2476         context->gva_to_gpa = paging32_gva_to_gpa;
2477         context->free = paging_free;
2478         context->prefetch_page = paging32_prefetch_page;
2479         context->sync_page = paging32_sync_page;
2480         context->invlpg = paging32_invlpg;
2481         context->root_level = PT32_ROOT_LEVEL;
2482         context->shadow_root_level = PT32E_ROOT_LEVEL;
2483         context->root_hpa = INVALID_PAGE;
2484         return 0;
2485 }
2486
2487 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2488 {
2489         reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2490         return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2491 }
2492
2493 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2494 {
2495         struct kvm_mmu *context = &vcpu->arch.mmu;
2496
2497         context->new_cr3 = nonpaging_new_cr3;
2498         context->page_fault = tdp_page_fault;
2499         context->free = nonpaging_free;
2500         context->prefetch_page = nonpaging_prefetch_page;
2501         context->sync_page = nonpaging_sync_page;
2502         context->invlpg = nonpaging_invlpg;
2503         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2504         context->root_hpa = INVALID_PAGE;
2505
2506         if (!is_paging(vcpu)) {
2507                 context->gva_to_gpa = nonpaging_gva_to_gpa;
2508                 context->root_level = 0;
2509         } else if (is_long_mode(vcpu)) {
2510                 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2511                 context->gva_to_gpa = paging64_gva_to_gpa;
2512                 context->root_level = PT64_ROOT_LEVEL;
2513         } else if (is_pae(vcpu)) {
2514                 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2515                 context->gva_to_gpa = paging64_gva_to_gpa;
2516                 context->root_level = PT32E_ROOT_LEVEL;
2517         } else {
2518                 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2519                 context->gva_to_gpa = paging32_gva_to_gpa;
2520                 context->root_level = PT32_ROOT_LEVEL;
2521         }
2522
2523         return 0;
2524 }
2525
2526 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2527 {
2528         int r;
2529
2530         ASSERT(vcpu);
2531         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2532
2533         if (!is_paging(vcpu))
2534                 r = nonpaging_init_context(vcpu);
2535         else if (is_long_mode(vcpu))
2536                 r = paging64_init_context(vcpu);
2537         else if (is_pae(vcpu))
2538                 r = paging32E_init_context(vcpu);
2539         else
2540                 r = paging32_init_context(vcpu);
2541
2542         vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2543         vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2544
2545         return r;
2546 }
2547
2548 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2549 {
2550         vcpu->arch.update_pte.pfn = bad_pfn;
2551
2552         if (tdp_enabled)
2553                 return init_kvm_tdp_mmu(vcpu);
2554         else
2555                 return init_kvm_softmmu(vcpu);
2556 }
2557
2558 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2559 {
2560         ASSERT(vcpu);
2561         if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2562                 /* mmu.free() should set root_hpa = INVALID_PAGE */
2563                 vcpu->arch.mmu.free(vcpu);
2564 }
2565
2566 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2567 {
2568         destroy_kvm_mmu(vcpu);
2569         return init_kvm_mmu(vcpu);
2570 }
2571 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2572
2573 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2574 {
2575         int r;
2576
2577         r = mmu_topup_memory_caches(vcpu);
2578         if (r)
2579                 goto out;
2580         r = mmu_alloc_roots(vcpu);
2581         spin_lock(&vcpu->kvm->mmu_lock);
2582         mmu_sync_roots(vcpu);
2583         spin_unlock(&vcpu->kvm->mmu_lock);
2584         if (r)
2585                 goto out;
2586         /* set_cr3() should ensure TLB has been flushed */
2587         kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2588 out:
2589         return r;
2590 }
2591 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2592
2593 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2594 {
2595         mmu_free_roots(vcpu);
2596 }
2597
2598 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2599                                   struct kvm_mmu_page *sp,
2600                                   u64 *spte)
2601 {
2602         u64 pte;
2603         struct kvm_mmu_page *child;
2604
2605         pte = *spte;
2606         if (is_shadow_present_pte(pte)) {
2607                 if (is_last_spte(pte, sp->role.level))
2608                         rmap_remove(vcpu->kvm, spte);
2609                 else {
2610                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2611                         mmu_page_remove_parent_pte(child, spte);
2612                 }
2613         }
2614         __set_spte(spte, shadow_trap_nonpresent_pte);
2615         if (is_large_pte(pte))
2616                 --vcpu->kvm->stat.lpages;
2617 }
2618
2619 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2620                                   struct kvm_mmu_page *sp,
2621                                   u64 *spte,
2622                                   const void *new)
2623 {
2624         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2625                 ++vcpu->kvm->stat.mmu_pde_zapped;
2626                 return;
2627         }
2628
2629         ++vcpu->kvm->stat.mmu_pte_updated;
2630         if (!sp->role.cr4_pae)
2631                 paging32_update_pte(vcpu, sp, spte, new);
2632         else
2633                 paging64_update_pte(vcpu, sp, spte, new);
2634 }
2635
2636 static bool need_remote_flush(u64 old, u64 new)
2637 {
2638         if (!is_shadow_present_pte(old))
2639                 return false;
2640         if (!is_shadow_present_pte(new))
2641                 return true;
2642         if ((old ^ new) & PT64_BASE_ADDR_MASK)
2643                 return true;
2644         old ^= PT64_NX_MASK;
2645         new ^= PT64_NX_MASK;
2646         return (old & ~new & PT64_PERM_MASK) != 0;
2647 }
2648
2649 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2650 {
2651         if (need_remote_flush(old, new))
2652                 kvm_flush_remote_tlbs(vcpu->kvm);
2653         else
2654                 kvm_mmu_flush_tlb(vcpu);
2655 }
2656
2657 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2658 {
2659         u64 *spte = vcpu->arch.last_pte_updated;
2660
2661         return !!(spte && (*spte & shadow_accessed_mask));
2662 }
2663
2664 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2665                                           u64 gpte)
2666 {
2667         gfn_t gfn;
2668         pfn_t pfn;
2669
2670         if (!is_present_gpte(gpte))
2671                 return;
2672         gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2673
2674         vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2675         smp_rmb();
2676         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2677
2678         if (is_error_pfn(pfn)) {
2679                 kvm_release_pfn_clean(pfn);
2680                 return;
2681         }
2682         vcpu->arch.update_pte.gfn = gfn;
2683         vcpu->arch.update_pte.pfn = pfn;
2684 }
2685
2686 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2687 {
2688         u64 *spte = vcpu->arch.last_pte_updated;
2689
2690         if (spte
2691             && vcpu->arch.last_pte_gfn == gfn
2692             && shadow_accessed_mask
2693             && !(*spte & shadow_accessed_mask)
2694             && is_shadow_present_pte(*spte))
2695                 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2696 }
2697
2698 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2699                        const u8 *new, int bytes,
2700                        bool guest_initiated)
2701 {
2702         gfn_t gfn = gpa >> PAGE_SHIFT;
2703         struct kvm_mmu_page *sp;
2704         struct hlist_node *node, *n;
2705         struct hlist_head *bucket;
2706         unsigned index;
2707         u64 entry, gentry;
2708         u64 *spte;
2709         unsigned offset = offset_in_page(gpa);
2710         unsigned pte_size;
2711         unsigned page_offset;
2712         unsigned misaligned;
2713         unsigned quadrant;
2714         int level;
2715         int flooded = 0;
2716         int npte;
2717         int r;
2718         int invlpg_counter;
2719
2720         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2721
2722         invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2723
2724         /*
2725          * Assume that the pte write on a page table of the same type
2726          * as the current vcpu paging mode.  This is nearly always true
2727          * (might be false while changing modes).  Note it is verified later
2728          * by update_pte().
2729          */
2730         if ((is_pae(vcpu) && bytes == 4) || !new) {
2731                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2732                 if (is_pae(vcpu)) {
2733                         gpa &= ~(gpa_t)7;
2734                         bytes = 8;
2735                 }
2736                 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2737                 if (r)
2738                         gentry = 0;
2739                 new = (const u8 *)&gentry;
2740         }
2741
2742         switch (bytes) {
2743         case 4:
2744                 gentry = *(const u32 *)new;
2745                 break;
2746         case 8:
2747                 gentry = *(const u64 *)new;
2748                 break;
2749         default:
2750                 gentry = 0;
2751                 break;
2752         }
2753
2754         mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2755         spin_lock(&vcpu->kvm->mmu_lock);
2756         if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2757                 gentry = 0;
2758         kvm_mmu_access_page(vcpu, gfn);
2759         kvm_mmu_free_some_pages(vcpu);
2760         ++vcpu->kvm->stat.mmu_pte_write;
2761         kvm_mmu_audit(vcpu, "pre pte write");
2762         if (guest_initiated) {
2763                 if (gfn == vcpu->arch.last_pt_write_gfn
2764                     && !last_updated_pte_accessed(vcpu)) {
2765                         ++vcpu->arch.last_pt_write_count;
2766                         if (vcpu->arch.last_pt_write_count >= 3)
2767                                 flooded = 1;
2768                 } else {
2769                         vcpu->arch.last_pt_write_gfn = gfn;
2770                         vcpu->arch.last_pt_write_count = 1;
2771                         vcpu->arch.last_pte_updated = NULL;
2772                 }
2773         }
2774         index = kvm_page_table_hashfn(gfn);
2775         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2776
2777 restart:
2778         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2779                 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2780                         continue;
2781                 pte_size = sp->role.cr4_pae ? 8 : 4;
2782                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2783                 misaligned |= bytes < 4;
2784                 if (misaligned || flooded) {
2785                         /*
2786                          * Misaligned accesses are too much trouble to fix
2787                          * up; also, they usually indicate a page is not used
2788                          * as a page table.
2789                          *
2790                          * If we're seeing too many writes to a page,
2791                          * it may no longer be a page table, or we may be
2792                          * forking, in which case it is better to unmap the
2793                          * page.
2794                          */
2795                         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2796                                  gpa, bytes, sp->role.word);
2797                         if (kvm_mmu_zap_page(vcpu->kvm, sp))
2798                                 goto restart;
2799                         ++vcpu->kvm->stat.mmu_flooded;
2800                         continue;
2801                 }
2802                 page_offset = offset;
2803                 level = sp->role.level;
2804                 npte = 1;
2805                 if (!sp->role.cr4_pae) {
2806                         page_offset <<= 1;      /* 32->64 */
2807                         /*
2808                          * A 32-bit pde maps 4MB while the shadow pdes map
2809                          * only 2MB.  So we need to double the offset again
2810                          * and zap two pdes instead of one.
2811                          */
2812                         if (level == PT32_ROOT_LEVEL) {
2813                                 page_offset &= ~7; /* kill rounding error */
2814                                 page_offset <<= 1;
2815                                 npte = 2;
2816                         }
2817                         quadrant = page_offset >> PAGE_SHIFT;
2818                         page_offset &= ~PAGE_MASK;
2819                         if (quadrant != sp->role.quadrant)
2820                                 continue;
2821                 }
2822                 spte = &sp->spt[page_offset / sizeof(*spte)];
2823                 while (npte--) {
2824                         entry = *spte;
2825                         mmu_pte_write_zap_pte(vcpu, sp, spte);
2826                         if (gentry)
2827                                 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2828                         mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2829                         ++spte;
2830                 }
2831         }
2832         kvm_mmu_audit(vcpu, "post pte write");
2833         spin_unlock(&vcpu->kvm->mmu_lock);
2834         if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2835                 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2836                 vcpu->arch.update_pte.pfn = bad_pfn;
2837         }
2838 }
2839
2840 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2841 {
2842         gpa_t gpa;
2843         int r;
2844
2845         if (tdp_enabled)
2846                 return 0;
2847
2848         gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2849
2850         spin_lock(&vcpu->kvm->mmu_lock);
2851         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2852         spin_unlock(&vcpu->kvm->mmu_lock);
2853         return r;
2854 }
2855 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2856
2857 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2858 {
2859         while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2860                !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2861                 struct kvm_mmu_page *sp;
2862
2863                 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2864                                   struct kvm_mmu_page, link);
2865                 kvm_mmu_zap_page(vcpu->kvm, sp);
2866                 ++vcpu->kvm->stat.mmu_recycled;
2867         }
2868 }
2869
2870 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2871 {
2872         int r;
2873         enum emulation_result er;
2874
2875         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2876         if (r < 0)
2877                 goto out;
2878
2879         if (!r) {
2880                 r = 1;
2881                 goto out;
2882         }
2883
2884         r = mmu_topup_memory_caches(vcpu);
2885         if (r)
2886                 goto out;
2887
2888         er = emulate_instruction(vcpu, cr2, error_code, 0);
2889
2890         switch (er) {
2891         case EMULATE_DONE:
2892                 return 1;
2893         case EMULATE_DO_MMIO:
2894                 ++vcpu->stat.mmio_exits;
2895                 /* fall through */
2896         case EMULATE_FAIL:
2897                 return 0;
2898         default:
2899                 BUG();
2900         }
2901 out:
2902         return r;
2903 }
2904 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2905
2906 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2907 {
2908         vcpu->arch.mmu.invlpg(vcpu, gva);
2909         kvm_mmu_flush_tlb(vcpu);
2910         ++vcpu->stat.invlpg;
2911 }
2912 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2913
2914 void kvm_enable_tdp(void)
2915 {
2916         tdp_enabled = true;
2917 }
2918 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2919
2920 void kvm_disable_tdp(void)
2921 {
2922         tdp_enabled = false;
2923 }
2924 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2925
2926 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2927 {
2928         free_page((unsigned long)vcpu->arch.mmu.pae_root);
2929 }
2930
2931 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2932 {
2933         struct page *page;
2934         int i;
2935
2936         ASSERT(vcpu);
2937
2938         /*
2939          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2940          * Therefore we need to allocate shadow page tables in the first
2941          * 4GB of memory, which happens to fit the DMA32 zone.
2942          */
2943         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2944         if (!page)
2945                 return -ENOMEM;
2946
2947         vcpu->arch.mmu.pae_root = page_address(page);
2948         for (i = 0; i < 4; ++i)
2949                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2950
2951         return 0;
2952 }
2953
2954 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2955 {
2956         ASSERT(vcpu);
2957         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2958
2959         return alloc_mmu_pages(vcpu);
2960 }
2961
2962 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2963 {
2964         ASSERT(vcpu);
2965         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2966
2967         return init_kvm_mmu(vcpu);
2968 }
2969
2970 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2971 {
2972         ASSERT(vcpu);
2973
2974         destroy_kvm_mmu(vcpu);
2975         free_mmu_pages(vcpu);
2976         mmu_free_memory_caches(vcpu);
2977 }
2978
2979 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2980 {
2981         struct kvm_mmu_page *sp;
2982
2983         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2984                 int i;
2985                 u64 *pt;
2986
2987                 if (!test_bit(slot, sp->slot_bitmap))
2988                         continue;
2989
2990                 pt = sp->spt;
2991                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2992                         /* avoid RMW */
2993                         if (pt[i] & PT_WRITABLE_MASK)
2994                                 pt[i] &= ~PT_WRITABLE_MASK;
2995         }
2996         kvm_flush_remote_tlbs(kvm);
2997 }
2998
2999 void kvm_mmu_zap_all(struct kvm *kvm)
3000 {
3001         struct kvm_mmu_page *sp, *node;
3002
3003         spin_lock(&kvm->mmu_lock);
3004 restart:
3005         list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3006                 if (kvm_mmu_zap_page(kvm, sp))
3007                         goto restart;
3008
3009         spin_unlock(&kvm->mmu_lock);
3010
3011         kvm_flush_remote_tlbs(kvm);
3012 }
3013
3014 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm)
3015 {
3016         struct kvm_mmu_page *page;
3017
3018         page = container_of(kvm->arch.active_mmu_pages.prev,
3019                             struct kvm_mmu_page, link);
3020         return kvm_mmu_zap_page(kvm, page);
3021 }
3022
3023 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3024 {
3025         struct kvm *kvm;
3026         struct kvm *kvm_freed = NULL;
3027         int cache_count = 0;
3028
3029         spin_lock(&kvm_lock);
3030
3031         list_for_each_entry(kvm, &vm_list, vm_list) {
3032                 int npages, idx, freed_pages;
3033
3034                 idx = srcu_read_lock(&kvm->srcu);
3035                 spin_lock(&kvm->mmu_lock);
3036                 npages = kvm->arch.n_alloc_mmu_pages -
3037                          kvm->arch.n_free_mmu_pages;
3038                 cache_count += npages;
3039                 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
3040                         freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm);
3041                         cache_count -= freed_pages;
3042                         kvm_freed = kvm;
3043                 }
3044                 nr_to_scan--;
3045
3046                 spin_unlock(&kvm->mmu_lock);
3047                 srcu_read_unlock(&kvm->srcu, idx);
3048         }
3049         if (kvm_freed)
3050                 list_move_tail(&kvm_freed->vm_list, &vm_list);
3051
3052         spin_unlock(&kvm_lock);
3053
3054         return cache_count;
3055 }
3056
3057 static struct shrinker mmu_shrinker = {
3058         .shrink = mmu_shrink,
3059         .seeks = DEFAULT_SEEKS * 10,
3060 };
3061
3062 static void mmu_destroy_caches(void)
3063 {
3064         if (pte_chain_cache)
3065                 kmem_cache_destroy(pte_chain_cache);
3066         if (rmap_desc_cache)
3067                 kmem_cache_destroy(rmap_desc_cache);
3068         if (mmu_page_header_cache)
3069                 kmem_cache_destroy(mmu_page_header_cache);
3070 }
3071
3072 void kvm_mmu_module_exit(void)
3073 {
3074         mmu_destroy_caches();
3075         unregister_shrinker(&mmu_shrinker);
3076 }
3077
3078 int kvm_mmu_module_init(void)
3079 {
3080         pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3081                                             sizeof(struct kvm_pte_chain),
3082                                             0, 0, NULL);
3083         if (!pte_chain_cache)
3084                 goto nomem;
3085         rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3086                                             sizeof(struct kvm_rmap_desc),
3087                                             0, 0, NULL);
3088         if (!rmap_desc_cache)
3089                 goto nomem;
3090
3091         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3092                                                   sizeof(struct kvm_mmu_page),
3093                                                   0, 0, NULL);
3094         if (!mmu_page_header_cache)
3095                 goto nomem;
3096
3097         register_shrinker(&mmu_shrinker);
3098
3099         return 0;
3100
3101 nomem:
3102         mmu_destroy_caches();
3103         return -ENOMEM;
3104 }
3105
3106 /*
3107  * Caculate mmu pages needed for kvm.
3108  */
3109 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3110 {
3111         int i;
3112         unsigned int nr_mmu_pages;
3113         unsigned int  nr_pages = 0;
3114         struct kvm_memslots *slots;
3115
3116         slots = kvm_memslots(kvm);
3117
3118         for (i = 0; i < slots->nmemslots; i++)
3119                 nr_pages += slots->memslots[i].npages;
3120
3121         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3122         nr_mmu_pages = max(nr_mmu_pages,
3123                         (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3124
3125         return nr_mmu_pages;
3126 }
3127
3128 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3129                                 unsigned len)
3130 {
3131         if (len > buffer->len)
3132                 return NULL;
3133         return buffer->ptr;
3134 }
3135
3136 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3137                                 unsigned len)
3138 {
3139         void *ret;
3140
3141         ret = pv_mmu_peek_buffer(buffer, len);
3142         if (!ret)
3143                 return ret;
3144         buffer->ptr += len;
3145         buffer->len -= len;
3146         buffer->processed += len;
3147         return ret;
3148 }
3149
3150 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3151                              gpa_t addr, gpa_t value)
3152 {
3153         int bytes = 8;
3154         int r;
3155
3156         if (!is_long_mode(vcpu) && !is_pae(vcpu))
3157                 bytes = 4;
3158
3159         r = mmu_topup_memory_caches(vcpu);
3160         if (r)
3161                 return r;
3162
3163         if (!emulator_write_phys(vcpu, addr, &value, bytes))
3164                 return -EFAULT;
3165
3166         return 1;
3167 }
3168
3169 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3170 {
3171         kvm_set_cr3(vcpu, vcpu->arch.cr3);
3172         return 1;
3173 }
3174
3175 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3176 {
3177         spin_lock(&vcpu->kvm->mmu_lock);
3178         mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3179         spin_unlock(&vcpu->kvm->mmu_lock);
3180         return 1;
3181 }
3182
3183 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3184                              struct kvm_pv_mmu_op_buffer *buffer)
3185 {
3186         struct kvm_mmu_op_header *header;
3187
3188         header = pv_mmu_peek_buffer(buffer, sizeof *header);
3189         if (!header)
3190                 return 0;
3191         switch (header->op) {
3192         case KVM_MMU_OP_WRITE_PTE: {
3193                 struct kvm_mmu_op_write_pte *wpte;
3194
3195                 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3196                 if (!wpte)
3197                         return 0;
3198                 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3199                                         wpte->pte_val);
3200         }
3201         case KVM_MMU_OP_FLUSH_TLB: {
3202                 struct kvm_mmu_op_flush_tlb *ftlb;
3203
3204                 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3205                 if (!ftlb)
3206                         return 0;
3207                 return kvm_pv_mmu_flush_tlb(vcpu);
3208         }
3209         case KVM_MMU_OP_RELEASE_PT: {
3210                 struct kvm_mmu_op_release_pt *rpt;
3211
3212                 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3213                 if (!rpt)
3214                         return 0;
3215                 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3216         }
3217         default: return 0;
3218         }
3219 }
3220
3221 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3222                   gpa_t addr, unsigned long *ret)
3223 {
3224         int r;
3225         struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3226
3227         buffer->ptr = buffer->buf;
3228         buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3229         buffer->processed = 0;
3230
3231         r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3232         if (r)
3233                 goto out;
3234
3235         while (buffer->len) {
3236                 r = kvm_pv_mmu_op_one(vcpu, buffer);
3237                 if (r < 0)
3238                         goto out;
3239                 if (r == 0)
3240                         break;
3241         }
3242
3243         r = 1;
3244 out:
3245         *ret = buffer->processed;
3246         return r;
3247 }
3248
3249 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3250 {
3251         struct kvm_shadow_walk_iterator iterator;
3252         int nr_sptes = 0;
3253
3254         spin_lock(&vcpu->kvm->mmu_lock);
3255         for_each_shadow_entry(vcpu, addr, iterator) {
3256                 sptes[iterator.level-1] = *iterator.sptep;
3257                 nr_sptes++;
3258                 if (!is_shadow_present_pte(*iterator.sptep))
3259                         break;
3260         }
3261         spin_unlock(&vcpu->kvm->mmu_lock);
3262
3263         return nr_sptes;
3264 }
3265 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3266
3267 #ifdef AUDIT
3268
3269 static const char *audit_msg;
3270
3271 static gva_t canonicalize(gva_t gva)
3272 {
3273 #ifdef CONFIG_X86_64
3274         gva = (long long)(gva << 16) >> 16;
3275 #endif
3276         return gva;
3277 }
3278
3279
3280 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3281
3282 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3283                             inspect_spte_fn fn)
3284 {
3285         int i;
3286
3287         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3288                 u64 ent = sp->spt[i];
3289
3290                 if (is_shadow_present_pte(ent)) {
3291                         if (!is_last_spte(ent, sp->role.level)) {
3292                                 struct kvm_mmu_page *child;
3293                                 child = page_header(ent & PT64_BASE_ADDR_MASK);
3294                                 __mmu_spte_walk(kvm, child, fn);
3295                         } else
3296                                 fn(kvm, &sp->spt[i]);
3297                 }
3298         }
3299 }
3300
3301 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3302 {
3303         int i;
3304         struct kvm_mmu_page *sp;
3305
3306         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3307                 return;
3308         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3309                 hpa_t root = vcpu->arch.mmu.root_hpa;
3310                 sp = page_header(root);
3311                 __mmu_spte_walk(vcpu->kvm, sp, fn);
3312                 return;
3313         }
3314         for (i = 0; i < 4; ++i) {
3315                 hpa_t root = vcpu->arch.mmu.pae_root[i];
3316
3317                 if (root && VALID_PAGE(root)) {
3318                         root &= PT64_BASE_ADDR_MASK;
3319                         sp = page_header(root);
3320                         __mmu_spte_walk(vcpu->kvm, sp, fn);
3321                 }
3322         }
3323         return;
3324 }
3325
3326 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3327                                 gva_t va, int level)
3328 {
3329         u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3330         int i;
3331         gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3332
3333         for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3334                 u64 ent = pt[i];
3335
3336                 if (ent == shadow_trap_nonpresent_pte)
3337                         continue;
3338
3339                 va = canonicalize(va);
3340                 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3341                         audit_mappings_page(vcpu, ent, va, level - 1);
3342                 else {
3343                         gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3344                         gfn_t gfn = gpa >> PAGE_SHIFT;
3345                         pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3346                         hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3347
3348                         if (is_error_pfn(pfn)) {
3349                                 kvm_release_pfn_clean(pfn);
3350                                 continue;
3351                         }
3352
3353                         if (is_shadow_present_pte(ent)
3354                             && (ent & PT64_BASE_ADDR_MASK) != hpa)
3355                                 printk(KERN_ERR "xx audit error: (%s) levels %d"
3356                                        " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3357                                        audit_msg, vcpu->arch.mmu.root_level,
3358                                        va, gpa, hpa, ent,
3359                                        is_shadow_present_pte(ent));
3360                         else if (ent == shadow_notrap_nonpresent_pte
3361                                  && !is_error_hpa(hpa))
3362                                 printk(KERN_ERR "audit: (%s) notrap shadow,"
3363                                        " valid guest gva %lx\n", audit_msg, va);
3364                         kvm_release_pfn_clean(pfn);
3365
3366                 }
3367         }
3368 }
3369
3370 static void audit_mappings(struct kvm_vcpu *vcpu)
3371 {
3372         unsigned i;
3373
3374         if (vcpu->arch.mmu.root_level == 4)
3375                 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3376         else
3377                 for (i = 0; i < 4; ++i)
3378                         if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3379                                 audit_mappings_page(vcpu,
3380                                                     vcpu->arch.mmu.pae_root[i],
3381                                                     i << 30,
3382                                                     2);
3383 }
3384
3385 static int count_rmaps(struct kvm_vcpu *vcpu)
3386 {
3387         struct kvm *kvm = vcpu->kvm;
3388         struct kvm_memslots *slots;
3389         int nmaps = 0;
3390         int i, j, k, idx;
3391
3392         idx = srcu_read_lock(&kvm->srcu);
3393         slots = kvm_memslots(kvm);
3394         for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3395                 struct kvm_memory_slot *m = &slots->memslots[i];
3396                 struct kvm_rmap_desc *d;
3397
3398                 for (j = 0; j < m->npages; ++j) {
3399                         unsigned long *rmapp = &m->rmap[j];
3400
3401                         if (!*rmapp)
3402                                 continue;
3403                         if (!(*rmapp & 1)) {
3404                                 ++nmaps;
3405                                 continue;
3406                         }
3407                         d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3408                         while (d) {
3409                                 for (k = 0; k < RMAP_EXT; ++k)
3410                                         if (d->sptes[k])
3411                                                 ++nmaps;
3412                                         else
3413                                                 break;
3414                                 d = d->more;
3415                         }
3416                 }
3417         }
3418         srcu_read_unlock(&kvm->srcu, idx);
3419         return nmaps;
3420 }
3421
3422 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3423 {
3424         unsigned long *rmapp;
3425         struct kvm_mmu_page *rev_sp;
3426         gfn_t gfn;
3427
3428         if (*sptep & PT_WRITABLE_MASK) {
3429                 rev_sp = page_header(__pa(sptep));
3430                 gfn = kvm_mmu_page_get_gfn(rev_sp, sptep - rev_sp->spt);
3431
3432                 if (!gfn_to_memslot(kvm, gfn)) {
3433                         if (!printk_ratelimit())
3434                                 return;
3435                         printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3436                                          audit_msg, gfn);
3437                         printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3438                                audit_msg, (long int)(sptep - rev_sp->spt),
3439                                         rev_sp->gfn);
3440                         dump_stack();
3441                         return;
3442                 }
3443
3444                 rmapp = gfn_to_rmap(kvm, gfn, rev_sp->role.level);
3445                 if (!*rmapp) {
3446                         if (!printk_ratelimit())
3447                                 return;
3448                         printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3449                                          audit_msg, *sptep);
3450                         dump_stack();
3451                 }
3452         }
3453
3454 }
3455
3456 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3457 {
3458         mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3459 }
3460
3461 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3462 {
3463         struct kvm_mmu_page *sp;
3464         int i;
3465
3466         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3467                 u64 *pt = sp->spt;
3468
3469                 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3470                         continue;
3471
3472                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3473                         u64 ent = pt[i];
3474
3475                         if (!(ent & PT_PRESENT_MASK))
3476                                 continue;
3477                         if (!(ent & PT_WRITABLE_MASK))
3478                                 continue;
3479                         inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3480                 }
3481         }
3482         return;
3483 }
3484
3485 static void audit_rmap(struct kvm_vcpu *vcpu)
3486 {
3487         check_writable_mappings_rmap(vcpu);
3488         count_rmaps(vcpu);
3489 }
3490
3491 static void audit_write_protection(struct kvm_vcpu *vcpu)
3492 {
3493         struct kvm_mmu_page *sp;
3494         struct kvm_memory_slot *slot;
3495         unsigned long *rmapp;
3496         u64 *spte;
3497         gfn_t gfn;
3498
3499         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3500                 if (sp->role.direct)
3501                         continue;
3502                 if (sp->unsync)
3503                         continue;
3504
3505                 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3506                 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3507                 rmapp = &slot->rmap[gfn - slot->base_gfn];
3508
3509                 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3510                 while (spte) {
3511                         if (*spte & PT_WRITABLE_MASK)
3512                                 printk(KERN_ERR "%s: (%s) shadow page has "
3513                                 "writable mappings: gfn %lx role %x\n",
3514                                __func__, audit_msg, sp->gfn,
3515                                sp->role.word);
3516                         spte = rmap_next(vcpu->kvm, rmapp, spte);
3517                 }
3518         }
3519 }
3520
3521 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3522 {
3523         int olddbg = dbg;
3524
3525         dbg = 0;
3526         audit_msg = msg;
3527         audit_rmap(vcpu);
3528         audit_write_protection(vcpu);
3529         if (strcmp("pre pte write", audit_msg) != 0)
3530                 audit_mappings(vcpu);
3531         audit_writable_sptes_have_rmaps(vcpu);
3532         dbg = olddbg;
3533 }
3534
3535 #endif