2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affilates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
23 #include "kvm_cache_regs.h"
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
39 #include <asm/cmpxchg.h>
44 * When setting this variable to true it enables Two-Dimensional-Paging
45 * where the hardware walks 2 page tables:
46 * 1. the guest-virtual to guest-physical
47 * 2. while doing 1. it walks guest-physical to host-physical
48 * If the hardware supports that we don't need to do shadow paging.
50 bool tdp_enabled = false;
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
59 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
64 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
65 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
69 #define pgprintk(x...) do { } while (0)
70 #define rmap_printk(x...) do { } while (0)
74 #if defined(MMU_DEBUG) || defined(AUDIT)
76 module_param(dbg, bool, 0644);
79 static int oos_shadow = 1;
80 module_param(oos_shadow, bool, 0644);
83 #define ASSERT(x) do { } while (0)
87 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
88 __FILE__, __LINE__, #x); \
92 #define PT_FIRST_AVAIL_BITS_SHIFT 9
93 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
95 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
97 #define PT64_LEVEL_BITS 9
99 #define PT64_LEVEL_SHIFT(level) \
100 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
102 #define PT64_LEVEL_MASK(level) \
103 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
105 #define PT64_INDEX(address, level)\
106 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
109 #define PT32_LEVEL_BITS 10
111 #define PT32_LEVEL_SHIFT(level) \
112 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
114 #define PT32_LEVEL_MASK(level) \
115 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
116 #define PT32_LVL_OFFSET_MASK(level) \
117 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
118 * PT32_LEVEL_BITS))) - 1))
120 #define PT32_INDEX(address, level)\
121 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
124 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
125 #define PT64_DIR_BASE_ADDR_MASK \
126 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
127 #define PT64_LVL_ADDR_MASK(level) \
128 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
129 * PT64_LEVEL_BITS))) - 1))
130 #define PT64_LVL_OFFSET_MASK(level) \
131 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
132 * PT64_LEVEL_BITS))) - 1))
134 #define PT32_BASE_ADDR_MASK PAGE_MASK
135 #define PT32_DIR_BASE_ADDR_MASK \
136 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
137 #define PT32_LVL_ADDR_MASK(level) \
138 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
139 * PT32_LEVEL_BITS))) - 1))
141 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
146 #define ACC_EXEC_MASK 1
147 #define ACC_WRITE_MASK PT_WRITABLE_MASK
148 #define ACC_USER_MASK PT_USER_MASK
149 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
151 #include <trace/events/kvm.h>
153 #define CREATE_TRACE_POINTS
154 #include "mmutrace.h"
156 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
158 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
160 struct kvm_rmap_desc {
161 u64 *sptes[RMAP_EXT];
162 struct kvm_rmap_desc *more;
165 struct kvm_shadow_walk_iterator {
173 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
174 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
175 shadow_walk_okay(&(_walker)); \
176 shadow_walk_next(&(_walker)))
178 typedef int (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp);
180 static struct kmem_cache *pte_chain_cache;
181 static struct kmem_cache *rmap_desc_cache;
182 static struct kmem_cache *mmu_page_header_cache;
184 static u64 __read_mostly shadow_trap_nonpresent_pte;
185 static u64 __read_mostly shadow_notrap_nonpresent_pte;
186 static u64 __read_mostly shadow_base_present_pte;
187 static u64 __read_mostly shadow_nx_mask;
188 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
189 static u64 __read_mostly shadow_user_mask;
190 static u64 __read_mostly shadow_accessed_mask;
191 static u64 __read_mostly shadow_dirty_mask;
193 static inline u64 rsvd_bits(int s, int e)
195 return ((1ULL << (e - s + 1)) - 1) << s;
198 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
200 shadow_trap_nonpresent_pte = trap_pte;
201 shadow_notrap_nonpresent_pte = notrap_pte;
203 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
205 void kvm_mmu_set_base_ptes(u64 base_pte)
207 shadow_base_present_pte = base_pte;
209 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
211 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
212 u64 dirty_mask, u64 nx_mask, u64 x_mask)
214 shadow_user_mask = user_mask;
215 shadow_accessed_mask = accessed_mask;
216 shadow_dirty_mask = dirty_mask;
217 shadow_nx_mask = nx_mask;
218 shadow_x_mask = x_mask;
220 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
222 static bool is_write_protection(struct kvm_vcpu *vcpu)
224 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
227 static int is_cpuid_PSE36(void)
232 static int is_nx(struct kvm_vcpu *vcpu)
234 return vcpu->arch.efer & EFER_NX;
237 static int is_shadow_present_pte(u64 pte)
239 return pte != shadow_trap_nonpresent_pte
240 && pte != shadow_notrap_nonpresent_pte;
243 static int is_large_pte(u64 pte)
245 return pte & PT_PAGE_SIZE_MASK;
248 static int is_writable_pte(unsigned long pte)
250 return pte & PT_WRITABLE_MASK;
253 static int is_dirty_gpte(unsigned long pte)
255 return pte & PT_DIRTY_MASK;
258 static int is_rmap_spte(u64 pte)
260 return is_shadow_present_pte(pte);
263 static int is_last_spte(u64 pte, int level)
265 if (level == PT_PAGE_TABLE_LEVEL)
267 if (is_large_pte(pte))
272 static pfn_t spte_to_pfn(u64 pte)
274 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
277 static gfn_t pse36_gfn_delta(u32 gpte)
279 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
281 return (gpte & PT32_DIR_PSE36_MASK) << shift;
284 static void __set_spte(u64 *sptep, u64 spte)
287 set_64bit((unsigned long *)sptep, spte);
289 set_64bit((unsigned long long *)sptep, spte);
293 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
294 struct kmem_cache *base_cache, int min)
298 if (cache->nobjs >= min)
300 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
301 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
304 cache->objects[cache->nobjs++] = obj;
309 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
310 struct kmem_cache *cache)
313 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
316 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
321 if (cache->nobjs >= min)
323 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
324 page = alloc_page(GFP_KERNEL);
327 cache->objects[cache->nobjs++] = page_address(page);
332 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
335 free_page((unsigned long)mc->objects[--mc->nobjs]);
338 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
342 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
346 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
350 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
353 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
354 mmu_page_header_cache, 4);
359 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
361 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
362 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
363 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
364 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
365 mmu_page_header_cache);
368 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
374 p = mc->objects[--mc->nobjs];
378 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
380 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
381 sizeof(struct kvm_pte_chain));
384 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
386 kmem_cache_free(pte_chain_cache, pc);
389 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
391 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
392 sizeof(struct kvm_rmap_desc));
395 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
397 kmem_cache_free(rmap_desc_cache, rd);
400 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
402 if (!sp->role.direct)
403 return sp->gfns[index];
405 return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
408 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
411 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
413 sp->gfns[index] = gfn;
417 * Return the pointer to the largepage write count for a given
418 * gfn, handling slots that are not large page aligned.
420 static int *slot_largepage_idx(gfn_t gfn,
421 struct kvm_memory_slot *slot,
426 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
427 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
428 return &slot->lpage_info[level - 2][idx].write_count;
431 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
433 struct kvm_memory_slot *slot;
437 gfn = unalias_gfn(kvm, gfn);
439 slot = gfn_to_memslot_unaliased(kvm, gfn);
440 for (i = PT_DIRECTORY_LEVEL;
441 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
442 write_count = slot_largepage_idx(gfn, slot, i);
447 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
449 struct kvm_memory_slot *slot;
453 gfn = unalias_gfn(kvm, gfn);
454 slot = gfn_to_memslot_unaliased(kvm, gfn);
455 for (i = PT_DIRECTORY_LEVEL;
456 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
457 write_count = slot_largepage_idx(gfn, slot, i);
459 WARN_ON(*write_count < 0);
463 static int has_wrprotected_page(struct kvm *kvm,
467 struct kvm_memory_slot *slot;
470 gfn = unalias_gfn(kvm, gfn);
471 slot = gfn_to_memslot_unaliased(kvm, gfn);
473 largepage_idx = slot_largepage_idx(gfn, slot, level);
474 return *largepage_idx;
480 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
482 unsigned long page_size;
485 page_size = kvm_host_page_size(kvm, gfn);
487 for (i = PT_PAGE_TABLE_LEVEL;
488 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
489 if (page_size >= KVM_HPAGE_SIZE(i))
498 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
500 struct kvm_memory_slot *slot;
501 int host_level, level, max_level;
503 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
504 if (slot && slot->dirty_bitmap)
505 return PT_PAGE_TABLE_LEVEL;
507 host_level = host_mapping_level(vcpu->kvm, large_gfn);
509 if (host_level == PT_PAGE_TABLE_LEVEL)
512 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
513 kvm_x86_ops->get_lpage_level() : host_level;
515 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
516 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
523 * Take gfn and return the reverse mapping to it.
524 * Note: gfn must be unaliased before this function get called
527 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
529 struct kvm_memory_slot *slot;
532 slot = gfn_to_memslot(kvm, gfn);
533 if (likely(level == PT_PAGE_TABLE_LEVEL))
534 return &slot->rmap[gfn - slot->base_gfn];
536 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
537 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
539 return &slot->lpage_info[level - 2][idx].rmap_pde;
543 * Reverse mapping data structures:
545 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
546 * that points to page_address(page).
548 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
549 * containing more mappings.
551 * Returns the number of rmap entries before the spte was added or zero if
552 * the spte was not added.
555 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
557 struct kvm_mmu_page *sp;
558 struct kvm_rmap_desc *desc;
559 unsigned long *rmapp;
562 if (!is_rmap_spte(*spte))
564 gfn = unalias_gfn(vcpu->kvm, gfn);
565 sp = page_header(__pa(spte));
566 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
567 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
569 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
570 *rmapp = (unsigned long)spte;
571 } else if (!(*rmapp & 1)) {
572 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
573 desc = mmu_alloc_rmap_desc(vcpu);
574 desc->sptes[0] = (u64 *)*rmapp;
575 desc->sptes[1] = spte;
576 *rmapp = (unsigned long)desc | 1;
578 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
579 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
580 while (desc->sptes[RMAP_EXT-1] && desc->more) {
584 if (desc->sptes[RMAP_EXT-1]) {
585 desc->more = mmu_alloc_rmap_desc(vcpu);
588 for (i = 0; desc->sptes[i]; ++i)
590 desc->sptes[i] = spte;
595 static void rmap_desc_remove_entry(unsigned long *rmapp,
596 struct kvm_rmap_desc *desc,
598 struct kvm_rmap_desc *prev_desc)
602 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
604 desc->sptes[i] = desc->sptes[j];
605 desc->sptes[j] = NULL;
608 if (!prev_desc && !desc->more)
609 *rmapp = (unsigned long)desc->sptes[0];
612 prev_desc->more = desc->more;
614 *rmapp = (unsigned long)desc->more | 1;
615 mmu_free_rmap_desc(desc);
618 static void rmap_remove(struct kvm *kvm, u64 *spte)
620 struct kvm_rmap_desc *desc;
621 struct kvm_rmap_desc *prev_desc;
622 struct kvm_mmu_page *sp;
625 unsigned long *rmapp;
628 if (!is_rmap_spte(*spte))
630 sp = page_header(__pa(spte));
631 pfn = spte_to_pfn(*spte);
632 if (*spte & shadow_accessed_mask)
633 kvm_set_pfn_accessed(pfn);
634 if (is_writable_pte(*spte))
635 kvm_set_pfn_dirty(pfn);
636 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
637 rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
639 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
641 } else if (!(*rmapp & 1)) {
642 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
643 if ((u64 *)*rmapp != spte) {
644 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
650 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
651 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
654 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
655 if (desc->sptes[i] == spte) {
656 rmap_desc_remove_entry(rmapp,
664 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
669 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
671 struct kvm_rmap_desc *desc;
677 else if (!(*rmapp & 1)) {
679 return (u64 *)*rmapp;
682 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
685 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
686 if (prev_spte == spte)
687 return desc->sptes[i];
688 prev_spte = desc->sptes[i];
695 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
697 unsigned long *rmapp;
699 int i, write_protected = 0;
701 gfn = unalias_gfn(kvm, gfn);
702 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
704 spte = rmap_next(kvm, rmapp, NULL);
707 BUG_ON(!(*spte & PT_PRESENT_MASK));
708 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
709 if (is_writable_pte(*spte)) {
710 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
713 spte = rmap_next(kvm, rmapp, spte);
715 if (write_protected) {
718 spte = rmap_next(kvm, rmapp, NULL);
719 pfn = spte_to_pfn(*spte);
720 kvm_set_pfn_dirty(pfn);
723 /* check for huge page mappings */
724 for (i = PT_DIRECTORY_LEVEL;
725 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
726 rmapp = gfn_to_rmap(kvm, gfn, i);
727 spte = rmap_next(kvm, rmapp, NULL);
730 BUG_ON(!(*spte & PT_PRESENT_MASK));
731 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
732 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
733 if (is_writable_pte(*spte)) {
734 rmap_remove(kvm, spte);
736 __set_spte(spte, shadow_trap_nonpresent_pte);
740 spte = rmap_next(kvm, rmapp, spte);
744 return write_protected;
747 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
751 int need_tlb_flush = 0;
753 while ((spte = rmap_next(kvm, rmapp, NULL))) {
754 BUG_ON(!(*spte & PT_PRESENT_MASK));
755 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
756 rmap_remove(kvm, spte);
757 __set_spte(spte, shadow_trap_nonpresent_pte);
760 return need_tlb_flush;
763 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
768 pte_t *ptep = (pte_t *)data;
771 WARN_ON(pte_huge(*ptep));
772 new_pfn = pte_pfn(*ptep);
773 spte = rmap_next(kvm, rmapp, NULL);
775 BUG_ON(!is_shadow_present_pte(*spte));
776 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
778 if (pte_write(*ptep)) {
779 rmap_remove(kvm, spte);
780 __set_spte(spte, shadow_trap_nonpresent_pte);
781 spte = rmap_next(kvm, rmapp, NULL);
783 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
784 new_spte |= (u64)new_pfn << PAGE_SHIFT;
786 new_spte &= ~PT_WRITABLE_MASK;
787 new_spte &= ~SPTE_HOST_WRITEABLE;
788 if (is_writable_pte(*spte))
789 kvm_set_pfn_dirty(spte_to_pfn(*spte));
790 __set_spte(spte, new_spte);
791 spte = rmap_next(kvm, rmapp, spte);
795 kvm_flush_remote_tlbs(kvm);
800 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
802 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
808 struct kvm_memslots *slots;
810 slots = kvm_memslots(kvm);
812 for (i = 0; i < slots->nmemslots; i++) {
813 struct kvm_memory_slot *memslot = &slots->memslots[i];
814 unsigned long start = memslot->userspace_addr;
817 end = start + (memslot->npages << PAGE_SHIFT);
818 if (hva >= start && hva < end) {
819 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
821 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
823 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
824 int idx = gfn_offset;
825 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
827 &memslot->lpage_info[j][idx].rmap_pde,
830 trace_kvm_age_page(hva, memslot, ret);
838 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
840 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
843 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
845 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
848 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
855 * Emulate the accessed bit for EPT, by checking if this page has
856 * an EPT mapping, and clearing it if it does. On the next access,
857 * a new EPT mapping will be established.
858 * This has some overhead, but not as much as the cost of swapping
859 * out actively used pages or breaking up actively used hugepages.
861 if (!shadow_accessed_mask)
862 return kvm_unmap_rmapp(kvm, rmapp, data);
864 spte = rmap_next(kvm, rmapp, NULL);
868 BUG_ON(!(_spte & PT_PRESENT_MASK));
869 _young = _spte & PT_ACCESSED_MASK;
872 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
874 spte = rmap_next(kvm, rmapp, spte);
879 #define RMAP_RECYCLE_THRESHOLD 1000
881 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
883 unsigned long *rmapp;
884 struct kvm_mmu_page *sp;
886 sp = page_header(__pa(spte));
888 gfn = unalias_gfn(vcpu->kvm, gfn);
889 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
891 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
892 kvm_flush_remote_tlbs(vcpu->kvm);
895 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
897 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
901 static int is_empty_shadow_page(u64 *spt)
906 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
907 if (is_shadow_present_pte(*pos)) {
908 printk(KERN_ERR "%s: %p %llx\n", __func__,
916 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
918 ASSERT(is_empty_shadow_page(sp->spt));
920 __free_page(virt_to_page(sp->spt));
921 if (!sp->role.direct)
922 __free_page(virt_to_page(sp->gfns));
923 kmem_cache_free(mmu_page_header_cache, sp);
924 ++kvm->arch.n_free_mmu_pages;
927 static unsigned kvm_page_table_hashfn(gfn_t gfn)
929 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
932 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
933 u64 *parent_pte, int direct)
935 struct kvm_mmu_page *sp;
937 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
938 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
940 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
942 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
943 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
944 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
946 sp->parent_pte = parent_pte;
947 --vcpu->kvm->arch.n_free_mmu_pages;
951 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
952 struct kvm_mmu_page *sp, u64 *parent_pte)
954 struct kvm_pte_chain *pte_chain;
955 struct hlist_node *node;
960 if (!sp->multimapped) {
961 u64 *old = sp->parent_pte;
964 sp->parent_pte = parent_pte;
968 pte_chain = mmu_alloc_pte_chain(vcpu);
969 INIT_HLIST_HEAD(&sp->parent_ptes);
970 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
971 pte_chain->parent_ptes[0] = old;
973 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
974 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
976 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
977 if (!pte_chain->parent_ptes[i]) {
978 pte_chain->parent_ptes[i] = parent_pte;
982 pte_chain = mmu_alloc_pte_chain(vcpu);
984 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
985 pte_chain->parent_ptes[0] = parent_pte;
988 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
991 struct kvm_pte_chain *pte_chain;
992 struct hlist_node *node;
995 if (!sp->multimapped) {
996 BUG_ON(sp->parent_pte != parent_pte);
997 sp->parent_pte = NULL;
1000 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1001 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1002 if (!pte_chain->parent_ptes[i])
1004 if (pte_chain->parent_ptes[i] != parent_pte)
1006 while (i + 1 < NR_PTE_CHAIN_ENTRIES
1007 && pte_chain->parent_ptes[i + 1]) {
1008 pte_chain->parent_ptes[i]
1009 = pte_chain->parent_ptes[i + 1];
1012 pte_chain->parent_ptes[i] = NULL;
1014 hlist_del(&pte_chain->link);
1015 mmu_free_pte_chain(pte_chain);
1016 if (hlist_empty(&sp->parent_ptes)) {
1017 sp->multimapped = 0;
1018 sp->parent_pte = NULL;
1027 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1029 struct kvm_pte_chain *pte_chain;
1030 struct hlist_node *node;
1031 struct kvm_mmu_page *parent_sp;
1034 if (!sp->multimapped && sp->parent_pte) {
1035 parent_sp = page_header(__pa(sp->parent_pte));
1037 mmu_parent_walk(parent_sp, fn);
1040 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1041 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1042 if (!pte_chain->parent_ptes[i])
1044 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1046 mmu_parent_walk(parent_sp, fn);
1050 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1053 struct kvm_mmu_page *sp = page_header(__pa(spte));
1055 index = spte - sp->spt;
1056 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1057 sp->unsync_children++;
1058 WARN_ON(!sp->unsync_children);
1061 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1063 struct kvm_pte_chain *pte_chain;
1064 struct hlist_node *node;
1067 if (!sp->parent_pte)
1070 if (!sp->multimapped) {
1071 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1075 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1076 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1077 if (!pte_chain->parent_ptes[i])
1079 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1083 static int unsync_walk_fn(struct kvm_mmu_page *sp)
1085 kvm_mmu_update_parents_unsync(sp);
1089 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1091 mmu_parent_walk(sp, unsync_walk_fn);
1092 kvm_mmu_update_parents_unsync(sp);
1095 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1096 struct kvm_mmu_page *sp)
1100 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1101 sp->spt[i] = shadow_trap_nonpresent_pte;
1104 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1105 struct kvm_mmu_page *sp)
1110 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1114 #define KVM_PAGE_ARRAY_NR 16
1116 struct kvm_mmu_pages {
1117 struct mmu_page_and_offset {
1118 struct kvm_mmu_page *sp;
1120 } page[KVM_PAGE_ARRAY_NR];
1124 #define for_each_unsync_children(bitmap, idx) \
1125 for (idx = find_first_bit(bitmap, 512); \
1127 idx = find_next_bit(bitmap, 512, idx+1))
1129 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1135 for (i=0; i < pvec->nr; i++)
1136 if (pvec->page[i].sp == sp)
1139 pvec->page[pvec->nr].sp = sp;
1140 pvec->page[pvec->nr].idx = idx;
1142 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1145 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1146 struct kvm_mmu_pages *pvec)
1148 int i, ret, nr_unsync_leaf = 0;
1150 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1151 u64 ent = sp->spt[i];
1153 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1154 struct kvm_mmu_page *child;
1155 child = page_header(ent & PT64_BASE_ADDR_MASK);
1157 if (child->unsync_children) {
1158 if (mmu_pages_add(pvec, child, i))
1161 ret = __mmu_unsync_walk(child, pvec);
1163 __clear_bit(i, sp->unsync_child_bitmap);
1165 nr_unsync_leaf += ret;
1170 if (child->unsync) {
1172 if (mmu_pages_add(pvec, child, i))
1178 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1179 sp->unsync_children = 0;
1181 return nr_unsync_leaf;
1184 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1185 struct kvm_mmu_pages *pvec)
1187 if (!sp->unsync_children)
1190 mmu_pages_add(pvec, sp, 0);
1191 return __mmu_unsync_walk(sp, pvec);
1194 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1196 WARN_ON(!sp->unsync);
1197 trace_kvm_mmu_sync_page(sp);
1199 --kvm->stat.mmu_unsync;
1202 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1204 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1207 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1208 kvm_mmu_zap_page(vcpu->kvm, sp);
1213 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1214 kvm_flush_remote_tlbs(vcpu->kvm);
1215 kvm_unlink_unsync_page(vcpu->kvm, sp);
1218 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1219 kvm_mmu_zap_page(vcpu->kvm, sp);
1223 kvm_mmu_flush_tlb(vcpu);
1227 static void mmu_convert_notrap(struct kvm_mmu_page *sp);
1228 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1229 struct kvm_mmu_page *sp)
1233 ret = __kvm_sync_page(vcpu, sp, false);
1235 mmu_convert_notrap(sp);
1239 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1241 return __kvm_sync_page(vcpu, sp, true);
1244 /* @gfn should be write-protected at the call site */
1245 static void kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1247 struct hlist_head *bucket;
1248 struct kvm_mmu_page *s;
1249 struct hlist_node *node, *n;
1253 index = kvm_page_table_hashfn(gfn);
1254 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1255 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1256 if (s->gfn != gfn || !s->unsync || s->role.invalid)
1259 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1260 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1261 (vcpu->arch.mmu.sync_page(vcpu, s))) {
1262 kvm_mmu_zap_page(vcpu->kvm, s);
1265 kvm_unlink_unsync_page(vcpu->kvm, s);
1270 kvm_mmu_flush_tlb(vcpu);
1273 struct mmu_page_path {
1274 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1275 unsigned int idx[PT64_ROOT_LEVEL-1];
1278 #define for_each_sp(pvec, sp, parents, i) \
1279 for (i = mmu_pages_next(&pvec, &parents, -1), \
1280 sp = pvec.page[i].sp; \
1281 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1282 i = mmu_pages_next(&pvec, &parents, i))
1284 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1285 struct mmu_page_path *parents,
1290 for (n = i+1; n < pvec->nr; n++) {
1291 struct kvm_mmu_page *sp = pvec->page[n].sp;
1293 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1294 parents->idx[0] = pvec->page[n].idx;
1298 parents->parent[sp->role.level-2] = sp;
1299 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1305 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1307 struct kvm_mmu_page *sp;
1308 unsigned int level = 0;
1311 unsigned int idx = parents->idx[level];
1313 sp = parents->parent[level];
1317 --sp->unsync_children;
1318 WARN_ON((int)sp->unsync_children < 0);
1319 __clear_bit(idx, sp->unsync_child_bitmap);
1321 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1324 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1325 struct mmu_page_path *parents,
1326 struct kvm_mmu_pages *pvec)
1328 parents->parent[parent->role.level-1] = NULL;
1332 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1333 struct kvm_mmu_page *parent)
1336 struct kvm_mmu_page *sp;
1337 struct mmu_page_path parents;
1338 struct kvm_mmu_pages pages;
1340 kvm_mmu_pages_init(parent, &parents, &pages);
1341 while (mmu_unsync_walk(parent, &pages)) {
1344 for_each_sp(pages, sp, parents, i)
1345 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1348 kvm_flush_remote_tlbs(vcpu->kvm);
1350 for_each_sp(pages, sp, parents, i) {
1351 kvm_sync_page(vcpu, sp);
1352 mmu_pages_clear_parents(&parents);
1354 cond_resched_lock(&vcpu->kvm->mmu_lock);
1355 kvm_mmu_pages_init(parent, &parents, &pages);
1359 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1367 union kvm_mmu_page_role role;
1370 struct hlist_head *bucket;
1371 struct kvm_mmu_page *sp;
1372 struct hlist_node *node, *tmp;
1373 bool need_sync = false;
1375 role = vcpu->arch.mmu.base_role;
1377 role.direct = direct;
1380 role.access = access;
1381 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1382 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1383 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1384 role.quadrant = quadrant;
1386 index = kvm_page_table_hashfn(gfn);
1387 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1388 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1389 if (sp->gfn == gfn) {
1390 if (!need_sync && sp->unsync)
1393 if (sp->role.word != role.word)
1396 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1399 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1400 if (sp->unsync_children) {
1401 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1402 kvm_mmu_mark_parents_unsync(sp);
1403 } else if (sp->unsync)
1404 kvm_mmu_mark_parents_unsync(sp);
1406 trace_kvm_mmu_get_page(sp, false);
1409 ++vcpu->kvm->stat.mmu_cache_miss;
1410 sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1415 hlist_add_head(&sp->hash_link, bucket);
1417 if (rmap_write_protect(vcpu->kvm, gfn))
1418 kvm_flush_remote_tlbs(vcpu->kvm);
1419 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1420 kvm_sync_pages(vcpu, gfn);
1422 account_shadowed(vcpu->kvm, gfn);
1424 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1425 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1427 nonpaging_prefetch_page(vcpu, sp);
1428 trace_kvm_mmu_get_page(sp, true);
1432 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1433 struct kvm_vcpu *vcpu, u64 addr)
1435 iterator->addr = addr;
1436 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1437 iterator->level = vcpu->arch.mmu.shadow_root_level;
1438 if (iterator->level == PT32E_ROOT_LEVEL) {
1439 iterator->shadow_addr
1440 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1441 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1443 if (!iterator->shadow_addr)
1444 iterator->level = 0;
1448 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1450 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1453 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1454 if (is_large_pte(*iterator->sptep))
1457 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1458 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1462 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1464 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1468 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1469 struct kvm_mmu_page *sp)
1477 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1480 if (is_shadow_present_pte(ent)) {
1481 if (!is_last_spte(ent, sp->role.level)) {
1482 ent &= PT64_BASE_ADDR_MASK;
1483 mmu_page_remove_parent_pte(page_header(ent),
1486 if (is_large_pte(ent))
1488 rmap_remove(kvm, &pt[i]);
1491 pt[i] = shadow_trap_nonpresent_pte;
1495 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1497 mmu_page_remove_parent_pte(sp, parent_pte);
1500 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1503 struct kvm_vcpu *vcpu;
1505 kvm_for_each_vcpu(i, vcpu, kvm)
1506 vcpu->arch.last_pte_updated = NULL;
1509 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1513 while (sp->multimapped || sp->parent_pte) {
1514 if (!sp->multimapped)
1515 parent_pte = sp->parent_pte;
1517 struct kvm_pte_chain *chain;
1519 chain = container_of(sp->parent_ptes.first,
1520 struct kvm_pte_chain, link);
1521 parent_pte = chain->parent_ptes[0];
1523 BUG_ON(!parent_pte);
1524 kvm_mmu_put_page(sp, parent_pte);
1525 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1529 static int mmu_zap_unsync_children(struct kvm *kvm,
1530 struct kvm_mmu_page *parent)
1533 struct mmu_page_path parents;
1534 struct kvm_mmu_pages pages;
1536 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1539 kvm_mmu_pages_init(parent, &parents, &pages);
1540 while (mmu_unsync_walk(parent, &pages)) {
1541 struct kvm_mmu_page *sp;
1543 for_each_sp(pages, sp, parents, i) {
1544 kvm_mmu_zap_page(kvm, sp);
1545 mmu_pages_clear_parents(&parents);
1548 kvm_mmu_pages_init(parent, &parents, &pages);
1554 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1558 trace_kvm_mmu_zap_page(sp);
1559 ++kvm->stat.mmu_shadow_zapped;
1560 ret = mmu_zap_unsync_children(kvm, sp);
1561 kvm_mmu_page_unlink_children(kvm, sp);
1562 kvm_mmu_unlink_parents(kvm, sp);
1563 kvm_flush_remote_tlbs(kvm);
1564 if (!sp->role.invalid && !sp->role.direct)
1565 unaccount_shadowed(kvm, sp->gfn);
1567 kvm_unlink_unsync_page(kvm, sp);
1568 if (!sp->root_count) {
1571 hlist_del(&sp->hash_link);
1572 kvm_mmu_free_page(kvm, sp);
1574 sp->role.invalid = 1;
1575 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1576 kvm_reload_remote_mmus(kvm);
1578 kvm_mmu_reset_last_pte_updated(kvm);
1583 * Changing the number of mmu pages allocated to the vm
1584 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1586 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1590 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1591 used_pages = max(0, used_pages);
1594 * If we set the number of mmu pages to be smaller be than the
1595 * number of actived pages , we must to free some mmu pages before we
1599 if (used_pages > kvm_nr_mmu_pages) {
1600 while (used_pages > kvm_nr_mmu_pages &&
1601 !list_empty(&kvm->arch.active_mmu_pages)) {
1602 struct kvm_mmu_page *page;
1604 page = container_of(kvm->arch.active_mmu_pages.prev,
1605 struct kvm_mmu_page, link);
1606 used_pages -= kvm_mmu_zap_page(kvm, page);
1608 kvm_nr_mmu_pages = used_pages;
1609 kvm->arch.n_free_mmu_pages = 0;
1612 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1613 - kvm->arch.n_alloc_mmu_pages;
1615 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1618 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1621 struct hlist_head *bucket;
1622 struct kvm_mmu_page *sp;
1623 struct hlist_node *node, *n;
1626 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1628 index = kvm_page_table_hashfn(gfn);
1629 bucket = &kvm->arch.mmu_page_hash[index];
1631 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1632 if (sp->gfn == gfn && !sp->role.direct) {
1633 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1636 if (kvm_mmu_zap_page(kvm, sp))
1642 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1645 struct hlist_head *bucket;
1646 struct kvm_mmu_page *sp;
1647 struct hlist_node *node, *nn;
1649 index = kvm_page_table_hashfn(gfn);
1650 bucket = &kvm->arch.mmu_page_hash[index];
1652 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1653 if (sp->gfn == gfn && !sp->role.direct
1654 && !sp->role.invalid) {
1655 pgprintk("%s: zap %lx %x\n",
1656 __func__, gfn, sp->role.word);
1657 if (kvm_mmu_zap_page(kvm, sp))
1663 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1665 int slot = memslot_id(kvm, gfn);
1666 struct kvm_mmu_page *sp = page_header(__pa(pte));
1668 __set_bit(slot, sp->slot_bitmap);
1671 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1676 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1679 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1680 if (pt[i] == shadow_notrap_nonpresent_pte)
1681 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1686 * The function is based on mtrr_type_lookup() in
1687 * arch/x86/kernel/cpu/mtrr/generic.c
1689 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1694 u8 prev_match, curr_match;
1695 int num_var_ranges = KVM_NR_VAR_MTRR;
1697 if (!mtrr_state->enabled)
1700 /* Make end inclusive end, instead of exclusive */
1703 /* Look in fixed ranges. Just return the type as per start */
1704 if (mtrr_state->have_fixed && (start < 0x100000)) {
1707 if (start < 0x80000) {
1709 idx += (start >> 16);
1710 return mtrr_state->fixed_ranges[idx];
1711 } else if (start < 0xC0000) {
1713 idx += ((start - 0x80000) >> 14);
1714 return mtrr_state->fixed_ranges[idx];
1715 } else if (start < 0x1000000) {
1717 idx += ((start - 0xC0000) >> 12);
1718 return mtrr_state->fixed_ranges[idx];
1723 * Look in variable ranges
1724 * Look of multiple ranges matching this address and pick type
1725 * as per MTRR precedence
1727 if (!(mtrr_state->enabled & 2))
1728 return mtrr_state->def_type;
1731 for (i = 0; i < num_var_ranges; ++i) {
1732 unsigned short start_state, end_state;
1734 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1737 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1738 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1739 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1740 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1742 start_state = ((start & mask) == (base & mask));
1743 end_state = ((end & mask) == (base & mask));
1744 if (start_state != end_state)
1747 if ((start & mask) != (base & mask))
1750 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1751 if (prev_match == 0xFF) {
1752 prev_match = curr_match;
1756 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1757 curr_match == MTRR_TYPE_UNCACHABLE)
1758 return MTRR_TYPE_UNCACHABLE;
1760 if ((prev_match == MTRR_TYPE_WRBACK &&
1761 curr_match == MTRR_TYPE_WRTHROUGH) ||
1762 (prev_match == MTRR_TYPE_WRTHROUGH &&
1763 curr_match == MTRR_TYPE_WRBACK)) {
1764 prev_match = MTRR_TYPE_WRTHROUGH;
1765 curr_match = MTRR_TYPE_WRTHROUGH;
1768 if (prev_match != curr_match)
1769 return MTRR_TYPE_UNCACHABLE;
1772 if (prev_match != 0xFF)
1775 return mtrr_state->def_type;
1778 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1782 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1783 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1784 if (mtrr == 0xfe || mtrr == 0xff)
1785 mtrr = MTRR_TYPE_WRBACK;
1788 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1790 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1792 trace_kvm_mmu_unsync_page(sp);
1793 ++vcpu->kvm->stat.mmu_unsync;
1796 kvm_mmu_mark_parents_unsync(sp);
1797 mmu_convert_notrap(sp);
1800 static void kvm_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1802 struct hlist_head *bucket;
1803 struct kvm_mmu_page *s;
1804 struct hlist_node *node, *n;
1807 index = kvm_page_table_hashfn(gfn);
1808 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1810 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1811 if (s->gfn != gfn || s->role.direct || s->unsync ||
1814 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1815 __kvm_unsync_page(vcpu, s);
1819 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1823 struct hlist_head *bucket;
1824 struct kvm_mmu_page *s;
1825 struct hlist_node *node, *n;
1826 bool need_unsync = false;
1828 index = kvm_page_table_hashfn(gfn);
1829 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1830 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1831 if (s->gfn != gfn || s->role.direct || s->role.invalid)
1834 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1837 if (!need_unsync && !s->unsync) {
1838 if (!can_unsync || !oos_shadow)
1844 kvm_unsync_pages(vcpu, gfn);
1848 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1849 unsigned pte_access, int user_fault,
1850 int write_fault, int dirty, int level,
1851 gfn_t gfn, pfn_t pfn, bool speculative,
1852 bool can_unsync, bool reset_host_protection)
1858 * We don't set the accessed bit, since we sometimes want to see
1859 * whether the guest actually used the pte (in order to detect
1862 spte = shadow_base_present_pte | shadow_dirty_mask;
1864 spte |= shadow_accessed_mask;
1866 pte_access &= ~ACC_WRITE_MASK;
1867 if (pte_access & ACC_EXEC_MASK)
1868 spte |= shadow_x_mask;
1870 spte |= shadow_nx_mask;
1871 if (pte_access & ACC_USER_MASK)
1872 spte |= shadow_user_mask;
1873 if (level > PT_PAGE_TABLE_LEVEL)
1874 spte |= PT_PAGE_SIZE_MASK;
1876 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1877 kvm_is_mmio_pfn(pfn));
1879 if (reset_host_protection)
1880 spte |= SPTE_HOST_WRITEABLE;
1882 spte |= (u64)pfn << PAGE_SHIFT;
1884 if ((pte_access & ACC_WRITE_MASK)
1885 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1887 if (level > PT_PAGE_TABLE_LEVEL &&
1888 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1890 rmap_remove(vcpu->kvm, sptep);
1891 spte = shadow_trap_nonpresent_pte;
1895 spte |= PT_WRITABLE_MASK;
1897 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1898 spte &= ~PT_USER_MASK;
1901 * Optimization: for pte sync, if spte was writable the hash
1902 * lookup is unnecessary (and expensive). Write protection
1903 * is responsibility of mmu_get_page / kvm_sync_page.
1904 * Same reasoning can be applied to dirty page accounting.
1906 if (!can_unsync && is_writable_pte(*sptep))
1909 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1910 pgprintk("%s: found shadow page for %lx, marking ro\n",
1913 pte_access &= ~ACC_WRITE_MASK;
1914 if (is_writable_pte(spte))
1915 spte &= ~PT_WRITABLE_MASK;
1919 if (pte_access & ACC_WRITE_MASK)
1920 mark_page_dirty(vcpu->kvm, gfn);
1923 __set_spte(sptep, spte);
1927 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1928 unsigned pt_access, unsigned pte_access,
1929 int user_fault, int write_fault, int dirty,
1930 int *ptwrite, int level, gfn_t gfn,
1931 pfn_t pfn, bool speculative,
1932 bool reset_host_protection)
1934 int was_rmapped = 0;
1935 int was_writable = is_writable_pte(*sptep);
1938 pgprintk("%s: spte %llx access %x write_fault %d"
1939 " user_fault %d gfn %lx\n",
1940 __func__, *sptep, pt_access,
1941 write_fault, user_fault, gfn);
1943 if (is_rmap_spte(*sptep)) {
1945 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1946 * the parent of the now unreachable PTE.
1948 if (level > PT_PAGE_TABLE_LEVEL &&
1949 !is_large_pte(*sptep)) {
1950 struct kvm_mmu_page *child;
1953 child = page_header(pte & PT64_BASE_ADDR_MASK);
1954 mmu_page_remove_parent_pte(child, sptep);
1955 __set_spte(sptep, shadow_trap_nonpresent_pte);
1956 kvm_flush_remote_tlbs(vcpu->kvm);
1957 } else if (pfn != spte_to_pfn(*sptep)) {
1958 pgprintk("hfn old %lx new %lx\n",
1959 spte_to_pfn(*sptep), pfn);
1960 rmap_remove(vcpu->kvm, sptep);
1961 __set_spte(sptep, shadow_trap_nonpresent_pte);
1962 kvm_flush_remote_tlbs(vcpu->kvm);
1967 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1968 dirty, level, gfn, pfn, speculative, true,
1969 reset_host_protection)) {
1972 kvm_x86_ops->tlb_flush(vcpu);
1975 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1976 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1977 is_large_pte(*sptep)? "2MB" : "4kB",
1978 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1980 if (!was_rmapped && is_large_pte(*sptep))
1981 ++vcpu->kvm->stat.lpages;
1983 page_header_update_slot(vcpu->kvm, sptep, gfn);
1985 rmap_count = rmap_add(vcpu, sptep, gfn);
1986 kvm_release_pfn_clean(pfn);
1987 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1988 rmap_recycle(vcpu, sptep, gfn);
1991 kvm_release_pfn_dirty(pfn);
1993 kvm_release_pfn_clean(pfn);
1996 vcpu->arch.last_pte_updated = sptep;
1997 vcpu->arch.last_pte_gfn = gfn;
2001 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2005 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2006 int level, gfn_t gfn, pfn_t pfn)
2008 struct kvm_shadow_walk_iterator iterator;
2009 struct kvm_mmu_page *sp;
2013 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2014 if (iterator.level == level) {
2015 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2016 0, write, 1, &pt_write,
2017 level, gfn, pfn, false, true);
2018 ++vcpu->stat.pf_fixed;
2022 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2023 u64 base_addr = iterator.addr;
2025 base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2026 pseudo_gfn = base_addr >> PAGE_SHIFT;
2027 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2029 1, ACC_ALL, iterator.sptep);
2031 pgprintk("nonpaging_map: ENOMEM\n");
2032 kvm_release_pfn_clean(pfn);
2036 __set_spte(iterator.sptep,
2038 | PT_PRESENT_MASK | PT_WRITABLE_MASK
2039 | shadow_user_mask | shadow_x_mask);
2045 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2051 /* Touch the page, so send SIGBUS */
2052 hva = (void __user *)gfn_to_hva(kvm, gfn);
2053 r = copy_from_user(buf, hva, 1);
2056 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2058 kvm_release_pfn_clean(pfn);
2059 if (is_hwpoison_pfn(pfn)) {
2060 kvm_send_hwpoison_signal(kvm, gfn);
2066 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2071 unsigned long mmu_seq;
2073 level = mapping_level(vcpu, gfn);
2076 * This path builds a PAE pagetable - so we can map 2mb pages at
2077 * maximum. Therefore check if the level is larger than that.
2079 if (level > PT_DIRECTORY_LEVEL)
2080 level = PT_DIRECTORY_LEVEL;
2082 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2084 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2086 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2089 if (is_error_pfn(pfn))
2090 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2092 spin_lock(&vcpu->kvm->mmu_lock);
2093 if (mmu_notifier_retry(vcpu, mmu_seq))
2095 kvm_mmu_free_some_pages(vcpu);
2096 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2097 spin_unlock(&vcpu->kvm->mmu_lock);
2103 spin_unlock(&vcpu->kvm->mmu_lock);
2104 kvm_release_pfn_clean(pfn);
2109 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2112 struct kvm_mmu_page *sp;
2114 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2116 spin_lock(&vcpu->kvm->mmu_lock);
2117 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2118 hpa_t root = vcpu->arch.mmu.root_hpa;
2120 sp = page_header(root);
2122 if (!sp->root_count && sp->role.invalid)
2123 kvm_mmu_zap_page(vcpu->kvm, sp);
2124 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2125 spin_unlock(&vcpu->kvm->mmu_lock);
2128 for (i = 0; i < 4; ++i) {
2129 hpa_t root = vcpu->arch.mmu.pae_root[i];
2132 root &= PT64_BASE_ADDR_MASK;
2133 sp = page_header(root);
2135 if (!sp->root_count && sp->role.invalid)
2136 kvm_mmu_zap_page(vcpu->kvm, sp);
2138 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2140 spin_unlock(&vcpu->kvm->mmu_lock);
2141 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2144 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2148 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2149 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2156 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2160 struct kvm_mmu_page *sp;
2164 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2166 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2167 hpa_t root = vcpu->arch.mmu.root_hpa;
2169 ASSERT(!VALID_PAGE(root));
2170 if (mmu_check_root(vcpu, root_gfn))
2176 spin_lock(&vcpu->kvm->mmu_lock);
2177 kvm_mmu_free_some_pages(vcpu);
2178 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2179 PT64_ROOT_LEVEL, direct,
2181 root = __pa(sp->spt);
2183 spin_unlock(&vcpu->kvm->mmu_lock);
2184 vcpu->arch.mmu.root_hpa = root;
2187 direct = !is_paging(vcpu);
2188 for (i = 0; i < 4; ++i) {
2189 hpa_t root = vcpu->arch.mmu.pae_root[i];
2191 ASSERT(!VALID_PAGE(root));
2192 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2193 pdptr = kvm_pdptr_read(vcpu, i);
2194 if (!is_present_gpte(pdptr)) {
2195 vcpu->arch.mmu.pae_root[i] = 0;
2198 root_gfn = pdptr >> PAGE_SHIFT;
2199 } else if (vcpu->arch.mmu.root_level == 0)
2201 if (mmu_check_root(vcpu, root_gfn))
2207 spin_lock(&vcpu->kvm->mmu_lock);
2208 kvm_mmu_free_some_pages(vcpu);
2209 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2210 PT32_ROOT_LEVEL, direct,
2212 root = __pa(sp->spt);
2214 spin_unlock(&vcpu->kvm->mmu_lock);
2216 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2218 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2222 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2225 struct kvm_mmu_page *sp;
2227 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2229 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2230 hpa_t root = vcpu->arch.mmu.root_hpa;
2231 sp = page_header(root);
2232 mmu_sync_children(vcpu, sp);
2235 for (i = 0; i < 4; ++i) {
2236 hpa_t root = vcpu->arch.mmu.pae_root[i];
2238 if (root && VALID_PAGE(root)) {
2239 root &= PT64_BASE_ADDR_MASK;
2240 sp = page_header(root);
2241 mmu_sync_children(vcpu, sp);
2246 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2248 spin_lock(&vcpu->kvm->mmu_lock);
2249 mmu_sync_roots(vcpu);
2250 spin_unlock(&vcpu->kvm->mmu_lock);
2253 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2254 u32 access, u32 *error)
2261 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2267 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2268 r = mmu_topup_memory_caches(vcpu);
2273 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2275 gfn = gva >> PAGE_SHIFT;
2277 return nonpaging_map(vcpu, gva & PAGE_MASK,
2278 error_code & PFERR_WRITE_MASK, gfn);
2281 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2287 gfn_t gfn = gpa >> PAGE_SHIFT;
2288 unsigned long mmu_seq;
2291 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2293 r = mmu_topup_memory_caches(vcpu);
2297 level = mapping_level(vcpu, gfn);
2299 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2301 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2303 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2304 if (is_error_pfn(pfn))
2305 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2306 spin_lock(&vcpu->kvm->mmu_lock);
2307 if (mmu_notifier_retry(vcpu, mmu_seq))
2309 kvm_mmu_free_some_pages(vcpu);
2310 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2312 spin_unlock(&vcpu->kvm->mmu_lock);
2317 spin_unlock(&vcpu->kvm->mmu_lock);
2318 kvm_release_pfn_clean(pfn);
2322 static void nonpaging_free(struct kvm_vcpu *vcpu)
2324 mmu_free_roots(vcpu);
2327 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2329 struct kvm_mmu *context = &vcpu->arch.mmu;
2331 context->new_cr3 = nonpaging_new_cr3;
2332 context->page_fault = nonpaging_page_fault;
2333 context->gva_to_gpa = nonpaging_gva_to_gpa;
2334 context->free = nonpaging_free;
2335 context->prefetch_page = nonpaging_prefetch_page;
2336 context->sync_page = nonpaging_sync_page;
2337 context->invlpg = nonpaging_invlpg;
2338 context->root_level = 0;
2339 context->shadow_root_level = PT32E_ROOT_LEVEL;
2340 context->root_hpa = INVALID_PAGE;
2344 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2346 ++vcpu->stat.tlb_flush;
2347 kvm_x86_ops->tlb_flush(vcpu);
2350 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2352 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2353 mmu_free_roots(vcpu);
2356 static void inject_page_fault(struct kvm_vcpu *vcpu,
2360 kvm_inject_page_fault(vcpu, addr, err_code);
2363 static void paging_free(struct kvm_vcpu *vcpu)
2365 nonpaging_free(vcpu);
2368 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2372 bit7 = (gpte >> 7) & 1;
2373 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2377 #include "paging_tmpl.h"
2381 #include "paging_tmpl.h"
2384 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2386 struct kvm_mmu *context = &vcpu->arch.mmu;
2387 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2388 u64 exb_bit_rsvd = 0;
2391 exb_bit_rsvd = rsvd_bits(63, 63);
2393 case PT32_ROOT_LEVEL:
2394 /* no rsvd bits for 2 level 4K page table entries */
2395 context->rsvd_bits_mask[0][1] = 0;
2396 context->rsvd_bits_mask[0][0] = 0;
2397 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2399 if (!is_pse(vcpu)) {
2400 context->rsvd_bits_mask[1][1] = 0;
2404 if (is_cpuid_PSE36())
2405 /* 36bits PSE 4MB page */
2406 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2408 /* 32 bits PSE 4MB page */
2409 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2411 case PT32E_ROOT_LEVEL:
2412 context->rsvd_bits_mask[0][2] =
2413 rsvd_bits(maxphyaddr, 63) |
2414 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2415 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2416 rsvd_bits(maxphyaddr, 62); /* PDE */
2417 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2418 rsvd_bits(maxphyaddr, 62); /* PTE */
2419 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2420 rsvd_bits(maxphyaddr, 62) |
2421 rsvd_bits(13, 20); /* large page */
2422 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2424 case PT64_ROOT_LEVEL:
2425 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2426 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2427 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2428 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2429 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2430 rsvd_bits(maxphyaddr, 51);
2431 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2432 rsvd_bits(maxphyaddr, 51);
2433 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2434 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2435 rsvd_bits(maxphyaddr, 51) |
2437 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2438 rsvd_bits(maxphyaddr, 51) |
2439 rsvd_bits(13, 20); /* large page */
2440 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2445 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2447 struct kvm_mmu *context = &vcpu->arch.mmu;
2449 ASSERT(is_pae(vcpu));
2450 context->new_cr3 = paging_new_cr3;
2451 context->page_fault = paging64_page_fault;
2452 context->gva_to_gpa = paging64_gva_to_gpa;
2453 context->prefetch_page = paging64_prefetch_page;
2454 context->sync_page = paging64_sync_page;
2455 context->invlpg = paging64_invlpg;
2456 context->free = paging_free;
2457 context->root_level = level;
2458 context->shadow_root_level = level;
2459 context->root_hpa = INVALID_PAGE;
2463 static int paging64_init_context(struct kvm_vcpu *vcpu)
2465 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2466 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2469 static int paging32_init_context(struct kvm_vcpu *vcpu)
2471 struct kvm_mmu *context = &vcpu->arch.mmu;
2473 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2474 context->new_cr3 = paging_new_cr3;
2475 context->page_fault = paging32_page_fault;
2476 context->gva_to_gpa = paging32_gva_to_gpa;
2477 context->free = paging_free;
2478 context->prefetch_page = paging32_prefetch_page;
2479 context->sync_page = paging32_sync_page;
2480 context->invlpg = paging32_invlpg;
2481 context->root_level = PT32_ROOT_LEVEL;
2482 context->shadow_root_level = PT32E_ROOT_LEVEL;
2483 context->root_hpa = INVALID_PAGE;
2487 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2489 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2490 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2493 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2495 struct kvm_mmu *context = &vcpu->arch.mmu;
2497 context->new_cr3 = nonpaging_new_cr3;
2498 context->page_fault = tdp_page_fault;
2499 context->free = nonpaging_free;
2500 context->prefetch_page = nonpaging_prefetch_page;
2501 context->sync_page = nonpaging_sync_page;
2502 context->invlpg = nonpaging_invlpg;
2503 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2504 context->root_hpa = INVALID_PAGE;
2506 if (!is_paging(vcpu)) {
2507 context->gva_to_gpa = nonpaging_gva_to_gpa;
2508 context->root_level = 0;
2509 } else if (is_long_mode(vcpu)) {
2510 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2511 context->gva_to_gpa = paging64_gva_to_gpa;
2512 context->root_level = PT64_ROOT_LEVEL;
2513 } else if (is_pae(vcpu)) {
2514 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2515 context->gva_to_gpa = paging64_gva_to_gpa;
2516 context->root_level = PT32E_ROOT_LEVEL;
2518 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2519 context->gva_to_gpa = paging32_gva_to_gpa;
2520 context->root_level = PT32_ROOT_LEVEL;
2526 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2531 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2533 if (!is_paging(vcpu))
2534 r = nonpaging_init_context(vcpu);
2535 else if (is_long_mode(vcpu))
2536 r = paging64_init_context(vcpu);
2537 else if (is_pae(vcpu))
2538 r = paging32E_init_context(vcpu);
2540 r = paging32_init_context(vcpu);
2542 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2543 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2548 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2550 vcpu->arch.update_pte.pfn = bad_pfn;
2553 return init_kvm_tdp_mmu(vcpu);
2555 return init_kvm_softmmu(vcpu);
2558 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2561 if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2562 /* mmu.free() should set root_hpa = INVALID_PAGE */
2563 vcpu->arch.mmu.free(vcpu);
2566 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2568 destroy_kvm_mmu(vcpu);
2569 return init_kvm_mmu(vcpu);
2571 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2573 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2577 r = mmu_topup_memory_caches(vcpu);
2580 r = mmu_alloc_roots(vcpu);
2581 spin_lock(&vcpu->kvm->mmu_lock);
2582 mmu_sync_roots(vcpu);
2583 spin_unlock(&vcpu->kvm->mmu_lock);
2586 /* set_cr3() should ensure TLB has been flushed */
2587 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2591 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2593 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2595 mmu_free_roots(vcpu);
2598 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2599 struct kvm_mmu_page *sp,
2603 struct kvm_mmu_page *child;
2606 if (is_shadow_present_pte(pte)) {
2607 if (is_last_spte(pte, sp->role.level))
2608 rmap_remove(vcpu->kvm, spte);
2610 child = page_header(pte & PT64_BASE_ADDR_MASK);
2611 mmu_page_remove_parent_pte(child, spte);
2614 __set_spte(spte, shadow_trap_nonpresent_pte);
2615 if (is_large_pte(pte))
2616 --vcpu->kvm->stat.lpages;
2619 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2620 struct kvm_mmu_page *sp,
2624 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2625 ++vcpu->kvm->stat.mmu_pde_zapped;
2629 ++vcpu->kvm->stat.mmu_pte_updated;
2630 if (!sp->role.cr4_pae)
2631 paging32_update_pte(vcpu, sp, spte, new);
2633 paging64_update_pte(vcpu, sp, spte, new);
2636 static bool need_remote_flush(u64 old, u64 new)
2638 if (!is_shadow_present_pte(old))
2640 if (!is_shadow_present_pte(new))
2642 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2644 old ^= PT64_NX_MASK;
2645 new ^= PT64_NX_MASK;
2646 return (old & ~new & PT64_PERM_MASK) != 0;
2649 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2651 if (need_remote_flush(old, new))
2652 kvm_flush_remote_tlbs(vcpu->kvm);
2654 kvm_mmu_flush_tlb(vcpu);
2657 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2659 u64 *spte = vcpu->arch.last_pte_updated;
2661 return !!(spte && (*spte & shadow_accessed_mask));
2664 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2670 if (!is_present_gpte(gpte))
2672 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2674 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2676 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2678 if (is_error_pfn(pfn)) {
2679 kvm_release_pfn_clean(pfn);
2682 vcpu->arch.update_pte.gfn = gfn;
2683 vcpu->arch.update_pte.pfn = pfn;
2686 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2688 u64 *spte = vcpu->arch.last_pte_updated;
2691 && vcpu->arch.last_pte_gfn == gfn
2692 && shadow_accessed_mask
2693 && !(*spte & shadow_accessed_mask)
2694 && is_shadow_present_pte(*spte))
2695 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2698 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2699 const u8 *new, int bytes,
2700 bool guest_initiated)
2702 gfn_t gfn = gpa >> PAGE_SHIFT;
2703 struct kvm_mmu_page *sp;
2704 struct hlist_node *node, *n;
2705 struct hlist_head *bucket;
2709 unsigned offset = offset_in_page(gpa);
2711 unsigned page_offset;
2712 unsigned misaligned;
2720 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2722 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2725 * Assume that the pte write on a page table of the same type
2726 * as the current vcpu paging mode. This is nearly always true
2727 * (might be false while changing modes). Note it is verified later
2730 if ((is_pae(vcpu) && bytes == 4) || !new) {
2731 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2736 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2739 new = (const u8 *)&gentry;
2744 gentry = *(const u32 *)new;
2747 gentry = *(const u64 *)new;
2754 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2755 spin_lock(&vcpu->kvm->mmu_lock);
2756 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2758 kvm_mmu_access_page(vcpu, gfn);
2759 kvm_mmu_free_some_pages(vcpu);
2760 ++vcpu->kvm->stat.mmu_pte_write;
2761 kvm_mmu_audit(vcpu, "pre pte write");
2762 if (guest_initiated) {
2763 if (gfn == vcpu->arch.last_pt_write_gfn
2764 && !last_updated_pte_accessed(vcpu)) {
2765 ++vcpu->arch.last_pt_write_count;
2766 if (vcpu->arch.last_pt_write_count >= 3)
2769 vcpu->arch.last_pt_write_gfn = gfn;
2770 vcpu->arch.last_pt_write_count = 1;
2771 vcpu->arch.last_pte_updated = NULL;
2774 index = kvm_page_table_hashfn(gfn);
2775 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2778 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2779 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2781 pte_size = sp->role.cr4_pae ? 8 : 4;
2782 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2783 misaligned |= bytes < 4;
2784 if (misaligned || flooded) {
2786 * Misaligned accesses are too much trouble to fix
2787 * up; also, they usually indicate a page is not used
2790 * If we're seeing too many writes to a page,
2791 * it may no longer be a page table, or we may be
2792 * forking, in which case it is better to unmap the
2795 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2796 gpa, bytes, sp->role.word);
2797 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2799 ++vcpu->kvm->stat.mmu_flooded;
2802 page_offset = offset;
2803 level = sp->role.level;
2805 if (!sp->role.cr4_pae) {
2806 page_offset <<= 1; /* 32->64 */
2808 * A 32-bit pde maps 4MB while the shadow pdes map
2809 * only 2MB. So we need to double the offset again
2810 * and zap two pdes instead of one.
2812 if (level == PT32_ROOT_LEVEL) {
2813 page_offset &= ~7; /* kill rounding error */
2817 quadrant = page_offset >> PAGE_SHIFT;
2818 page_offset &= ~PAGE_MASK;
2819 if (quadrant != sp->role.quadrant)
2822 spte = &sp->spt[page_offset / sizeof(*spte)];
2825 mmu_pte_write_zap_pte(vcpu, sp, spte);
2827 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2828 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2832 kvm_mmu_audit(vcpu, "post pte write");
2833 spin_unlock(&vcpu->kvm->mmu_lock);
2834 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2835 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2836 vcpu->arch.update_pte.pfn = bad_pfn;
2840 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2848 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2850 spin_lock(&vcpu->kvm->mmu_lock);
2851 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2852 spin_unlock(&vcpu->kvm->mmu_lock);
2855 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2857 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2859 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2860 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2861 struct kvm_mmu_page *sp;
2863 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2864 struct kvm_mmu_page, link);
2865 kvm_mmu_zap_page(vcpu->kvm, sp);
2866 ++vcpu->kvm->stat.mmu_recycled;
2870 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2873 enum emulation_result er;
2875 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2884 r = mmu_topup_memory_caches(vcpu);
2888 er = emulate_instruction(vcpu, cr2, error_code, 0);
2893 case EMULATE_DO_MMIO:
2894 ++vcpu->stat.mmio_exits;
2904 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2906 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2908 vcpu->arch.mmu.invlpg(vcpu, gva);
2909 kvm_mmu_flush_tlb(vcpu);
2910 ++vcpu->stat.invlpg;
2912 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2914 void kvm_enable_tdp(void)
2918 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2920 void kvm_disable_tdp(void)
2922 tdp_enabled = false;
2924 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2926 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2928 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2931 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2939 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2940 * Therefore we need to allocate shadow page tables in the first
2941 * 4GB of memory, which happens to fit the DMA32 zone.
2943 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2947 vcpu->arch.mmu.pae_root = page_address(page);
2948 for (i = 0; i < 4; ++i)
2949 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2954 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2957 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2959 return alloc_mmu_pages(vcpu);
2962 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2965 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2967 return init_kvm_mmu(vcpu);
2970 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2974 destroy_kvm_mmu(vcpu);
2975 free_mmu_pages(vcpu);
2976 mmu_free_memory_caches(vcpu);
2979 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2981 struct kvm_mmu_page *sp;
2983 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2987 if (!test_bit(slot, sp->slot_bitmap))
2991 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2993 if (pt[i] & PT_WRITABLE_MASK)
2994 pt[i] &= ~PT_WRITABLE_MASK;
2996 kvm_flush_remote_tlbs(kvm);
2999 void kvm_mmu_zap_all(struct kvm *kvm)
3001 struct kvm_mmu_page *sp, *node;
3003 spin_lock(&kvm->mmu_lock);
3005 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3006 if (kvm_mmu_zap_page(kvm, sp))
3009 spin_unlock(&kvm->mmu_lock);
3011 kvm_flush_remote_tlbs(kvm);
3014 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm)
3016 struct kvm_mmu_page *page;
3018 page = container_of(kvm->arch.active_mmu_pages.prev,
3019 struct kvm_mmu_page, link);
3020 return kvm_mmu_zap_page(kvm, page);
3023 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3026 struct kvm *kvm_freed = NULL;
3027 int cache_count = 0;
3029 spin_lock(&kvm_lock);
3031 list_for_each_entry(kvm, &vm_list, vm_list) {
3032 int npages, idx, freed_pages;
3034 idx = srcu_read_lock(&kvm->srcu);
3035 spin_lock(&kvm->mmu_lock);
3036 npages = kvm->arch.n_alloc_mmu_pages -
3037 kvm->arch.n_free_mmu_pages;
3038 cache_count += npages;
3039 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
3040 freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm);
3041 cache_count -= freed_pages;
3046 spin_unlock(&kvm->mmu_lock);
3047 srcu_read_unlock(&kvm->srcu, idx);
3050 list_move_tail(&kvm_freed->vm_list, &vm_list);
3052 spin_unlock(&kvm_lock);
3057 static struct shrinker mmu_shrinker = {
3058 .shrink = mmu_shrink,
3059 .seeks = DEFAULT_SEEKS * 10,
3062 static void mmu_destroy_caches(void)
3064 if (pte_chain_cache)
3065 kmem_cache_destroy(pte_chain_cache);
3066 if (rmap_desc_cache)
3067 kmem_cache_destroy(rmap_desc_cache);
3068 if (mmu_page_header_cache)
3069 kmem_cache_destroy(mmu_page_header_cache);
3072 void kvm_mmu_module_exit(void)
3074 mmu_destroy_caches();
3075 unregister_shrinker(&mmu_shrinker);
3078 int kvm_mmu_module_init(void)
3080 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3081 sizeof(struct kvm_pte_chain),
3083 if (!pte_chain_cache)
3085 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3086 sizeof(struct kvm_rmap_desc),
3088 if (!rmap_desc_cache)
3091 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3092 sizeof(struct kvm_mmu_page),
3094 if (!mmu_page_header_cache)
3097 register_shrinker(&mmu_shrinker);
3102 mmu_destroy_caches();
3107 * Caculate mmu pages needed for kvm.
3109 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3112 unsigned int nr_mmu_pages;
3113 unsigned int nr_pages = 0;
3114 struct kvm_memslots *slots;
3116 slots = kvm_memslots(kvm);
3118 for (i = 0; i < slots->nmemslots; i++)
3119 nr_pages += slots->memslots[i].npages;
3121 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3122 nr_mmu_pages = max(nr_mmu_pages,
3123 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3125 return nr_mmu_pages;
3128 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3131 if (len > buffer->len)
3136 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3141 ret = pv_mmu_peek_buffer(buffer, len);
3146 buffer->processed += len;
3150 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3151 gpa_t addr, gpa_t value)
3156 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3159 r = mmu_topup_memory_caches(vcpu);
3163 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3169 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3171 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3175 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3177 spin_lock(&vcpu->kvm->mmu_lock);
3178 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3179 spin_unlock(&vcpu->kvm->mmu_lock);
3183 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3184 struct kvm_pv_mmu_op_buffer *buffer)
3186 struct kvm_mmu_op_header *header;
3188 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3191 switch (header->op) {
3192 case KVM_MMU_OP_WRITE_PTE: {
3193 struct kvm_mmu_op_write_pte *wpte;
3195 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3198 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3201 case KVM_MMU_OP_FLUSH_TLB: {
3202 struct kvm_mmu_op_flush_tlb *ftlb;
3204 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3207 return kvm_pv_mmu_flush_tlb(vcpu);
3209 case KVM_MMU_OP_RELEASE_PT: {
3210 struct kvm_mmu_op_release_pt *rpt;
3212 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3215 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3221 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3222 gpa_t addr, unsigned long *ret)
3225 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3227 buffer->ptr = buffer->buf;
3228 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3229 buffer->processed = 0;
3231 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3235 while (buffer->len) {
3236 r = kvm_pv_mmu_op_one(vcpu, buffer);
3245 *ret = buffer->processed;
3249 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3251 struct kvm_shadow_walk_iterator iterator;
3254 spin_lock(&vcpu->kvm->mmu_lock);
3255 for_each_shadow_entry(vcpu, addr, iterator) {
3256 sptes[iterator.level-1] = *iterator.sptep;
3258 if (!is_shadow_present_pte(*iterator.sptep))
3261 spin_unlock(&vcpu->kvm->mmu_lock);
3265 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3269 static const char *audit_msg;
3271 static gva_t canonicalize(gva_t gva)
3273 #ifdef CONFIG_X86_64
3274 gva = (long long)(gva << 16) >> 16;
3280 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3282 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3287 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3288 u64 ent = sp->spt[i];
3290 if (is_shadow_present_pte(ent)) {
3291 if (!is_last_spte(ent, sp->role.level)) {
3292 struct kvm_mmu_page *child;
3293 child = page_header(ent & PT64_BASE_ADDR_MASK);
3294 __mmu_spte_walk(kvm, child, fn);
3296 fn(kvm, &sp->spt[i]);
3301 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3304 struct kvm_mmu_page *sp;
3306 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3308 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3309 hpa_t root = vcpu->arch.mmu.root_hpa;
3310 sp = page_header(root);
3311 __mmu_spte_walk(vcpu->kvm, sp, fn);
3314 for (i = 0; i < 4; ++i) {
3315 hpa_t root = vcpu->arch.mmu.pae_root[i];
3317 if (root && VALID_PAGE(root)) {
3318 root &= PT64_BASE_ADDR_MASK;
3319 sp = page_header(root);
3320 __mmu_spte_walk(vcpu->kvm, sp, fn);
3326 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3327 gva_t va, int level)
3329 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3331 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3333 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3336 if (ent == shadow_trap_nonpresent_pte)
3339 va = canonicalize(va);
3340 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3341 audit_mappings_page(vcpu, ent, va, level - 1);
3343 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3344 gfn_t gfn = gpa >> PAGE_SHIFT;
3345 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3346 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3348 if (is_error_pfn(pfn)) {
3349 kvm_release_pfn_clean(pfn);
3353 if (is_shadow_present_pte(ent)
3354 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3355 printk(KERN_ERR "xx audit error: (%s) levels %d"
3356 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3357 audit_msg, vcpu->arch.mmu.root_level,
3359 is_shadow_present_pte(ent));
3360 else if (ent == shadow_notrap_nonpresent_pte
3361 && !is_error_hpa(hpa))
3362 printk(KERN_ERR "audit: (%s) notrap shadow,"
3363 " valid guest gva %lx\n", audit_msg, va);
3364 kvm_release_pfn_clean(pfn);
3370 static void audit_mappings(struct kvm_vcpu *vcpu)
3374 if (vcpu->arch.mmu.root_level == 4)
3375 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3377 for (i = 0; i < 4; ++i)
3378 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3379 audit_mappings_page(vcpu,
3380 vcpu->arch.mmu.pae_root[i],
3385 static int count_rmaps(struct kvm_vcpu *vcpu)
3387 struct kvm *kvm = vcpu->kvm;
3388 struct kvm_memslots *slots;
3392 idx = srcu_read_lock(&kvm->srcu);
3393 slots = kvm_memslots(kvm);
3394 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3395 struct kvm_memory_slot *m = &slots->memslots[i];
3396 struct kvm_rmap_desc *d;
3398 for (j = 0; j < m->npages; ++j) {
3399 unsigned long *rmapp = &m->rmap[j];
3403 if (!(*rmapp & 1)) {
3407 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3409 for (k = 0; k < RMAP_EXT; ++k)
3418 srcu_read_unlock(&kvm->srcu, idx);
3422 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3424 unsigned long *rmapp;
3425 struct kvm_mmu_page *rev_sp;
3428 if (*sptep & PT_WRITABLE_MASK) {
3429 rev_sp = page_header(__pa(sptep));
3430 gfn = kvm_mmu_page_get_gfn(rev_sp, sptep - rev_sp->spt);
3432 if (!gfn_to_memslot(kvm, gfn)) {
3433 if (!printk_ratelimit())
3435 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3437 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3438 audit_msg, (long int)(sptep - rev_sp->spt),
3444 rmapp = gfn_to_rmap(kvm, gfn, rev_sp->role.level);
3446 if (!printk_ratelimit())
3448 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3456 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3458 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3461 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3463 struct kvm_mmu_page *sp;
3466 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3469 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3472 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3475 if (!(ent & PT_PRESENT_MASK))
3477 if (!(ent & PT_WRITABLE_MASK))
3479 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3485 static void audit_rmap(struct kvm_vcpu *vcpu)
3487 check_writable_mappings_rmap(vcpu);
3491 static void audit_write_protection(struct kvm_vcpu *vcpu)
3493 struct kvm_mmu_page *sp;
3494 struct kvm_memory_slot *slot;
3495 unsigned long *rmapp;
3499 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3500 if (sp->role.direct)
3505 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3506 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3507 rmapp = &slot->rmap[gfn - slot->base_gfn];
3509 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3511 if (*spte & PT_WRITABLE_MASK)
3512 printk(KERN_ERR "%s: (%s) shadow page has "
3513 "writable mappings: gfn %lx role %x\n",
3514 __func__, audit_msg, sp->gfn,
3516 spte = rmap_next(vcpu->kvm, rmapp, spte);
3521 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3528 audit_write_protection(vcpu);
3529 if (strcmp("pre pte write", audit_msg) != 0)
3530 audit_mappings(vcpu);
3531 audit_writable_sptes_have_rmaps(vcpu);