2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affilates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
23 #include "kvm_cache_regs.h"
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
39 #include <asm/cmpxchg.h>
44 * When setting this variable to true it enables Two-Dimensional-Paging
45 * where the hardware walks 2 page tables:
46 * 1. the guest-virtual to guest-physical
47 * 2. while doing 1. it walks guest-physical to host-physical
48 * If the hardware supports that we don't need to do shadow paging.
50 bool tdp_enabled = false;
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
59 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
64 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
65 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
69 #define pgprintk(x...) do { } while (0)
70 #define rmap_printk(x...) do { } while (0)
74 #if defined(MMU_DEBUG) || defined(AUDIT)
76 module_param(dbg, bool, 0644);
79 static int oos_shadow = 1;
80 module_param(oos_shadow, bool, 0644);
83 #define ASSERT(x) do { } while (0)
87 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
88 __FILE__, __LINE__, #x); \
92 #define PT_FIRST_AVAIL_BITS_SHIFT 9
93 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
95 #define PT64_LEVEL_BITS 9
97 #define PT64_LEVEL_SHIFT(level) \
98 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
100 #define PT64_LEVEL_MASK(level) \
101 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
103 #define PT64_INDEX(address, level)\
104 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
107 #define PT32_LEVEL_BITS 10
109 #define PT32_LEVEL_SHIFT(level) \
110 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
112 #define PT32_LEVEL_MASK(level) \
113 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
114 #define PT32_LVL_OFFSET_MASK(level) \
115 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116 * PT32_LEVEL_BITS))) - 1))
118 #define PT32_INDEX(address, level)\
119 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
122 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
123 #define PT64_DIR_BASE_ADDR_MASK \
124 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
125 #define PT64_LVL_ADDR_MASK(level) \
126 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127 * PT64_LEVEL_BITS))) - 1))
128 #define PT64_LVL_OFFSET_MASK(level) \
129 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130 * PT64_LEVEL_BITS))) - 1))
132 #define PT32_BASE_ADDR_MASK PAGE_MASK
133 #define PT32_DIR_BASE_ADDR_MASK \
134 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
135 #define PT32_LVL_ADDR_MASK(level) \
136 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137 * PT32_LEVEL_BITS))) - 1))
139 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
144 #define ACC_EXEC_MASK 1
145 #define ACC_WRITE_MASK PT_WRITABLE_MASK
146 #define ACC_USER_MASK PT_USER_MASK
147 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
149 #include <trace/events/kvm.h>
151 #define CREATE_TRACE_POINTS
152 #include "mmutrace.h"
154 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
156 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
158 struct kvm_rmap_desc {
159 u64 *sptes[RMAP_EXT];
160 struct kvm_rmap_desc *more;
163 struct kvm_shadow_walk_iterator {
171 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
172 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
173 shadow_walk_okay(&(_walker)); \
174 shadow_walk_next(&(_walker)))
176 typedef void (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp, u64 *spte);
178 static struct kmem_cache *pte_chain_cache;
179 static struct kmem_cache *rmap_desc_cache;
180 static struct kmem_cache *mmu_page_header_cache;
182 static u64 __read_mostly shadow_trap_nonpresent_pte;
183 static u64 __read_mostly shadow_notrap_nonpresent_pte;
184 static u64 __read_mostly shadow_base_present_pte;
185 static u64 __read_mostly shadow_nx_mask;
186 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
187 static u64 __read_mostly shadow_user_mask;
188 static u64 __read_mostly shadow_accessed_mask;
189 static u64 __read_mostly shadow_dirty_mask;
191 static inline u64 rsvd_bits(int s, int e)
193 return ((1ULL << (e - s + 1)) - 1) << s;
196 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
198 shadow_trap_nonpresent_pte = trap_pte;
199 shadow_notrap_nonpresent_pte = notrap_pte;
201 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
203 void kvm_mmu_set_base_ptes(u64 base_pte)
205 shadow_base_present_pte = base_pte;
207 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
209 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
210 u64 dirty_mask, u64 nx_mask, u64 x_mask)
212 shadow_user_mask = user_mask;
213 shadow_accessed_mask = accessed_mask;
214 shadow_dirty_mask = dirty_mask;
215 shadow_nx_mask = nx_mask;
216 shadow_x_mask = x_mask;
218 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
220 static bool is_write_protection(struct kvm_vcpu *vcpu)
222 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
225 static int is_cpuid_PSE36(void)
230 static int is_nx(struct kvm_vcpu *vcpu)
232 return vcpu->arch.efer & EFER_NX;
235 static int is_shadow_present_pte(u64 pte)
237 return pte != shadow_trap_nonpresent_pte
238 && pte != shadow_notrap_nonpresent_pte;
241 static int is_large_pte(u64 pte)
243 return pte & PT_PAGE_SIZE_MASK;
246 static int is_writable_pte(unsigned long pte)
248 return pte & PT_WRITABLE_MASK;
251 static int is_dirty_gpte(unsigned long pte)
253 return pte & PT_DIRTY_MASK;
256 static int is_rmap_spte(u64 pte)
258 return is_shadow_present_pte(pte);
261 static int is_last_spte(u64 pte, int level)
263 if (level == PT_PAGE_TABLE_LEVEL)
265 if (is_large_pte(pte))
270 static pfn_t spte_to_pfn(u64 pte)
272 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
275 static gfn_t pse36_gfn_delta(u32 gpte)
277 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
279 return (gpte & PT32_DIR_PSE36_MASK) << shift;
282 static void __set_spte(u64 *sptep, u64 spte)
285 set_64bit((unsigned long *)sptep, spte);
287 set_64bit((unsigned long long *)sptep, spte);
291 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
294 return xchg(sptep, new_spte);
300 } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
306 static void update_spte(u64 *sptep, u64 new_spte)
310 if (!shadow_accessed_mask || (new_spte & shadow_accessed_mask)) {
311 __set_spte(sptep, new_spte);
313 old_spte = __xchg_spte(sptep, new_spte);
314 if (old_spte & shadow_accessed_mask)
315 mark_page_accessed(pfn_to_page(spte_to_pfn(old_spte)));
319 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
320 struct kmem_cache *base_cache, int min)
324 if (cache->nobjs >= min)
326 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
327 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
330 cache->objects[cache->nobjs++] = obj;
335 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
336 struct kmem_cache *cache)
339 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
342 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
347 if (cache->nobjs >= min)
349 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
350 page = alloc_page(GFP_KERNEL);
353 cache->objects[cache->nobjs++] = page_address(page);
358 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
361 free_page((unsigned long)mc->objects[--mc->nobjs]);
364 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
368 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
372 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
376 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
379 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
380 mmu_page_header_cache, 4);
385 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
387 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
388 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
389 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
390 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
391 mmu_page_header_cache);
394 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
400 p = mc->objects[--mc->nobjs];
404 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
406 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
407 sizeof(struct kvm_pte_chain));
410 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
412 kmem_cache_free(pte_chain_cache, pc);
415 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
417 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
418 sizeof(struct kvm_rmap_desc));
421 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
423 kmem_cache_free(rmap_desc_cache, rd);
426 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
428 if (!sp->role.direct)
429 return sp->gfns[index];
431 return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
434 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
437 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
439 sp->gfns[index] = gfn;
443 * Return the pointer to the largepage write count for a given
444 * gfn, handling slots that are not large page aligned.
446 static int *slot_largepage_idx(gfn_t gfn,
447 struct kvm_memory_slot *slot,
452 idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
453 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
454 return &slot->lpage_info[level - 2][idx].write_count;
457 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
459 struct kvm_memory_slot *slot;
463 slot = gfn_to_memslot(kvm, gfn);
464 for (i = PT_DIRECTORY_LEVEL;
465 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
466 write_count = slot_largepage_idx(gfn, slot, i);
471 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
473 struct kvm_memory_slot *slot;
477 slot = gfn_to_memslot(kvm, gfn);
478 for (i = PT_DIRECTORY_LEVEL;
479 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
480 write_count = slot_largepage_idx(gfn, slot, i);
482 WARN_ON(*write_count < 0);
486 static int has_wrprotected_page(struct kvm *kvm,
490 struct kvm_memory_slot *slot;
493 slot = gfn_to_memslot(kvm, gfn);
495 largepage_idx = slot_largepage_idx(gfn, slot, level);
496 return *largepage_idx;
502 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
504 unsigned long page_size;
507 page_size = kvm_host_page_size(kvm, gfn);
509 for (i = PT_PAGE_TABLE_LEVEL;
510 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
511 if (page_size >= KVM_HPAGE_SIZE(i))
520 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
522 struct kvm_memory_slot *slot;
523 int host_level, level, max_level;
525 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
526 if (slot && slot->dirty_bitmap)
527 return PT_PAGE_TABLE_LEVEL;
529 host_level = host_mapping_level(vcpu->kvm, large_gfn);
531 if (host_level == PT_PAGE_TABLE_LEVEL)
534 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
535 kvm_x86_ops->get_lpage_level() : host_level;
537 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
538 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
545 * Take gfn and return the reverse mapping to it.
548 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
550 struct kvm_memory_slot *slot;
553 slot = gfn_to_memslot(kvm, gfn);
554 if (likely(level == PT_PAGE_TABLE_LEVEL))
555 return &slot->rmap[gfn - slot->base_gfn];
557 idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
558 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
560 return &slot->lpage_info[level - 2][idx].rmap_pde;
564 * Reverse mapping data structures:
566 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
567 * that points to page_address(page).
569 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
570 * containing more mappings.
572 * Returns the number of rmap entries before the spte was added or zero if
573 * the spte was not added.
576 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
578 struct kvm_mmu_page *sp;
579 struct kvm_rmap_desc *desc;
580 unsigned long *rmapp;
583 if (!is_rmap_spte(*spte))
585 sp = page_header(__pa(spte));
586 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
587 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
589 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
590 *rmapp = (unsigned long)spte;
591 } else if (!(*rmapp & 1)) {
592 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
593 desc = mmu_alloc_rmap_desc(vcpu);
594 desc->sptes[0] = (u64 *)*rmapp;
595 desc->sptes[1] = spte;
596 *rmapp = (unsigned long)desc | 1;
598 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
599 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
600 while (desc->sptes[RMAP_EXT-1] && desc->more) {
604 if (desc->sptes[RMAP_EXT-1]) {
605 desc->more = mmu_alloc_rmap_desc(vcpu);
608 for (i = 0; desc->sptes[i]; ++i)
610 desc->sptes[i] = spte;
615 static void rmap_desc_remove_entry(unsigned long *rmapp,
616 struct kvm_rmap_desc *desc,
618 struct kvm_rmap_desc *prev_desc)
622 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
624 desc->sptes[i] = desc->sptes[j];
625 desc->sptes[j] = NULL;
628 if (!prev_desc && !desc->more)
629 *rmapp = (unsigned long)desc->sptes[0];
632 prev_desc->more = desc->more;
634 *rmapp = (unsigned long)desc->more | 1;
635 mmu_free_rmap_desc(desc);
638 static void rmap_remove(struct kvm *kvm, u64 *spte)
640 struct kvm_rmap_desc *desc;
641 struct kvm_rmap_desc *prev_desc;
642 struct kvm_mmu_page *sp;
644 unsigned long *rmapp;
647 sp = page_header(__pa(spte));
648 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
649 rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
651 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
653 } else if (!(*rmapp & 1)) {
654 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
655 if ((u64 *)*rmapp != spte) {
656 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
662 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
663 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
666 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
667 if (desc->sptes[i] == spte) {
668 rmap_desc_remove_entry(rmapp,
676 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
681 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
686 old_spte = __xchg_spte(sptep, new_spte);
687 if (!is_rmap_spte(old_spte))
689 pfn = spte_to_pfn(old_spte);
690 if (old_spte & shadow_accessed_mask)
691 kvm_set_pfn_accessed(pfn);
692 if (is_writable_pte(old_spte))
693 kvm_set_pfn_dirty(pfn);
694 rmap_remove(kvm, sptep);
697 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
699 struct kvm_rmap_desc *desc;
705 else if (!(*rmapp & 1)) {
707 return (u64 *)*rmapp;
710 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
713 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
714 if (prev_spte == spte)
715 return desc->sptes[i];
716 prev_spte = desc->sptes[i];
723 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
725 unsigned long *rmapp;
727 int i, write_protected = 0;
729 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
731 spte = rmap_next(kvm, rmapp, NULL);
734 BUG_ON(!(*spte & PT_PRESENT_MASK));
735 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
736 if (is_writable_pte(*spte)) {
737 update_spte(spte, *spte & ~PT_WRITABLE_MASK);
740 spte = rmap_next(kvm, rmapp, spte);
742 if (write_protected) {
745 spte = rmap_next(kvm, rmapp, NULL);
746 pfn = spte_to_pfn(*spte);
747 kvm_set_pfn_dirty(pfn);
750 /* check for huge page mappings */
751 for (i = PT_DIRECTORY_LEVEL;
752 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
753 rmapp = gfn_to_rmap(kvm, gfn, i);
754 spte = rmap_next(kvm, rmapp, NULL);
757 BUG_ON(!(*spte & PT_PRESENT_MASK));
758 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
759 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
760 if (is_writable_pte(*spte)) {
762 shadow_trap_nonpresent_pte);
767 spte = rmap_next(kvm, rmapp, spte);
771 return write_protected;
774 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
778 int need_tlb_flush = 0;
780 while ((spte = rmap_next(kvm, rmapp, NULL))) {
781 BUG_ON(!(*spte & PT_PRESENT_MASK));
782 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
783 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
786 return need_tlb_flush;
789 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
793 u64 *spte, new_spte, old_spte;
794 pte_t *ptep = (pte_t *)data;
797 WARN_ON(pte_huge(*ptep));
798 new_pfn = pte_pfn(*ptep);
799 spte = rmap_next(kvm, rmapp, NULL);
801 BUG_ON(!is_shadow_present_pte(*spte));
802 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
804 if (pte_write(*ptep)) {
805 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
806 spte = rmap_next(kvm, rmapp, NULL);
808 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
809 new_spte |= (u64)new_pfn << PAGE_SHIFT;
811 new_spte &= ~PT_WRITABLE_MASK;
812 new_spte &= ~SPTE_HOST_WRITEABLE;
813 new_spte &= ~shadow_accessed_mask;
814 if (is_writable_pte(*spte))
815 kvm_set_pfn_dirty(spte_to_pfn(*spte));
816 old_spte = __xchg_spte(spte, new_spte);
817 if (is_shadow_present_pte(old_spte)
818 && (old_spte & shadow_accessed_mask))
819 mark_page_accessed(pfn_to_page(spte_to_pfn(old_spte)));
820 spte = rmap_next(kvm, rmapp, spte);
824 kvm_flush_remote_tlbs(kvm);
829 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
831 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
837 struct kvm_memslots *slots;
839 slots = kvm_memslots(kvm);
841 for (i = 0; i < slots->nmemslots; i++) {
842 struct kvm_memory_slot *memslot = &slots->memslots[i];
843 unsigned long start = memslot->userspace_addr;
846 end = start + (memslot->npages << PAGE_SHIFT);
847 if (hva >= start && hva < end) {
848 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
850 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
852 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
856 sh = KVM_HPAGE_GFN_SHIFT(PT_DIRECTORY_LEVEL+j);
857 idx = ((memslot->base_gfn+gfn_offset) >> sh) -
858 (memslot->base_gfn >> sh);
860 &memslot->lpage_info[j][idx].rmap_pde,
863 trace_kvm_age_page(hva, memslot, ret);
871 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
873 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
876 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
878 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
881 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
888 * Emulate the accessed bit for EPT, by checking if this page has
889 * an EPT mapping, and clearing it if it does. On the next access,
890 * a new EPT mapping will be established.
891 * This has some overhead, but not as much as the cost of swapping
892 * out actively used pages or breaking up actively used hugepages.
894 if (!shadow_accessed_mask)
895 return kvm_unmap_rmapp(kvm, rmapp, data);
897 spte = rmap_next(kvm, rmapp, NULL);
901 BUG_ON(!(_spte & PT_PRESENT_MASK));
902 _young = _spte & PT_ACCESSED_MASK;
905 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
907 spte = rmap_next(kvm, rmapp, spte);
912 #define RMAP_RECYCLE_THRESHOLD 1000
914 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
916 unsigned long *rmapp;
917 struct kvm_mmu_page *sp;
919 sp = page_header(__pa(spte));
921 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
923 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
924 kvm_flush_remote_tlbs(vcpu->kvm);
927 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
929 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
933 static int is_empty_shadow_page(u64 *spt)
938 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
939 if (is_shadow_present_pte(*pos)) {
940 printk(KERN_ERR "%s: %p %llx\n", __func__,
948 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
950 ASSERT(is_empty_shadow_page(sp->spt));
951 hlist_del(&sp->hash_link);
953 __free_page(virt_to_page(sp->spt));
954 if (!sp->role.direct)
955 __free_page(virt_to_page(sp->gfns));
956 kmem_cache_free(mmu_page_header_cache, sp);
957 ++kvm->arch.n_free_mmu_pages;
960 static unsigned kvm_page_table_hashfn(gfn_t gfn)
962 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
965 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
966 u64 *parent_pte, int direct)
968 struct kvm_mmu_page *sp;
970 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
971 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
973 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
975 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
976 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
977 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
979 sp->parent_pte = parent_pte;
980 --vcpu->kvm->arch.n_free_mmu_pages;
984 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
985 struct kvm_mmu_page *sp, u64 *parent_pte)
987 struct kvm_pte_chain *pte_chain;
988 struct hlist_node *node;
993 if (!sp->multimapped) {
994 u64 *old = sp->parent_pte;
997 sp->parent_pte = parent_pte;
1000 sp->multimapped = 1;
1001 pte_chain = mmu_alloc_pte_chain(vcpu);
1002 INIT_HLIST_HEAD(&sp->parent_ptes);
1003 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1004 pte_chain->parent_ptes[0] = old;
1006 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
1007 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
1009 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
1010 if (!pte_chain->parent_ptes[i]) {
1011 pte_chain->parent_ptes[i] = parent_pte;
1015 pte_chain = mmu_alloc_pte_chain(vcpu);
1017 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1018 pte_chain->parent_ptes[0] = parent_pte;
1021 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1024 struct kvm_pte_chain *pte_chain;
1025 struct hlist_node *node;
1028 if (!sp->multimapped) {
1029 BUG_ON(sp->parent_pte != parent_pte);
1030 sp->parent_pte = NULL;
1033 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1034 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1035 if (!pte_chain->parent_ptes[i])
1037 if (pte_chain->parent_ptes[i] != parent_pte)
1039 while (i + 1 < NR_PTE_CHAIN_ENTRIES
1040 && pte_chain->parent_ptes[i + 1]) {
1041 pte_chain->parent_ptes[i]
1042 = pte_chain->parent_ptes[i + 1];
1045 pte_chain->parent_ptes[i] = NULL;
1047 hlist_del(&pte_chain->link);
1048 mmu_free_pte_chain(pte_chain);
1049 if (hlist_empty(&sp->parent_ptes)) {
1050 sp->multimapped = 0;
1051 sp->parent_pte = NULL;
1059 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1061 struct kvm_pte_chain *pte_chain;
1062 struct hlist_node *node;
1063 struct kvm_mmu_page *parent_sp;
1066 if (!sp->multimapped && sp->parent_pte) {
1067 parent_sp = page_header(__pa(sp->parent_pte));
1068 fn(parent_sp, sp->parent_pte);
1072 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1073 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1074 u64 *spte = pte_chain->parent_ptes[i];
1078 parent_sp = page_header(__pa(spte));
1079 fn(parent_sp, spte);
1083 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte);
1084 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1086 mmu_parent_walk(sp, mark_unsync);
1089 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte)
1093 index = spte - sp->spt;
1094 if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1096 if (sp->unsync_children++)
1098 kvm_mmu_mark_parents_unsync(sp);
1101 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1102 struct kvm_mmu_page *sp)
1106 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1107 sp->spt[i] = shadow_trap_nonpresent_pte;
1110 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1111 struct kvm_mmu_page *sp, bool clear_unsync)
1116 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1120 #define KVM_PAGE_ARRAY_NR 16
1122 struct kvm_mmu_pages {
1123 struct mmu_page_and_offset {
1124 struct kvm_mmu_page *sp;
1126 } page[KVM_PAGE_ARRAY_NR];
1130 #define for_each_unsync_children(bitmap, idx) \
1131 for (idx = find_first_bit(bitmap, 512); \
1133 idx = find_next_bit(bitmap, 512, idx+1))
1135 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1141 for (i=0; i < pvec->nr; i++)
1142 if (pvec->page[i].sp == sp)
1145 pvec->page[pvec->nr].sp = sp;
1146 pvec->page[pvec->nr].idx = idx;
1148 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1151 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1152 struct kvm_mmu_pages *pvec)
1154 int i, ret, nr_unsync_leaf = 0;
1156 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1157 struct kvm_mmu_page *child;
1158 u64 ent = sp->spt[i];
1160 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1161 goto clear_child_bitmap;
1163 child = page_header(ent & PT64_BASE_ADDR_MASK);
1165 if (child->unsync_children) {
1166 if (mmu_pages_add(pvec, child, i))
1169 ret = __mmu_unsync_walk(child, pvec);
1171 goto clear_child_bitmap;
1173 nr_unsync_leaf += ret;
1176 } else if (child->unsync) {
1178 if (mmu_pages_add(pvec, child, i))
1181 goto clear_child_bitmap;
1186 __clear_bit(i, sp->unsync_child_bitmap);
1187 sp->unsync_children--;
1188 WARN_ON((int)sp->unsync_children < 0);
1192 return nr_unsync_leaf;
1195 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1196 struct kvm_mmu_pages *pvec)
1198 if (!sp->unsync_children)
1201 mmu_pages_add(pvec, sp, 0);
1202 return __mmu_unsync_walk(sp, pvec);
1205 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1207 WARN_ON(!sp->unsync);
1208 trace_kvm_mmu_sync_page(sp);
1210 --kvm->stat.mmu_unsync;
1213 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1214 struct list_head *invalid_list);
1215 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1216 struct list_head *invalid_list);
1218 #define for_each_gfn_sp(kvm, sp, gfn, pos) \
1219 hlist_for_each_entry(sp, pos, \
1220 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1221 if ((sp)->gfn != (gfn)) {} else
1223 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos) \
1224 hlist_for_each_entry(sp, pos, \
1225 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1226 if ((sp)->gfn != (gfn) || (sp)->role.direct || \
1227 (sp)->role.invalid) {} else
1229 /* @sp->gfn should be write-protected at the call site */
1230 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1231 struct list_head *invalid_list, bool clear_unsync)
1233 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1234 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1239 kvm_unlink_unsync_page(vcpu->kvm, sp);
1241 if (vcpu->arch.mmu.sync_page(vcpu, sp, clear_unsync)) {
1242 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1246 kvm_mmu_flush_tlb(vcpu);
1250 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1251 struct kvm_mmu_page *sp)
1253 LIST_HEAD(invalid_list);
1256 ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1258 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1263 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1264 struct list_head *invalid_list)
1266 return __kvm_sync_page(vcpu, sp, invalid_list, true);
1269 /* @gfn should be write-protected at the call site */
1270 static void kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1272 struct kvm_mmu_page *s;
1273 struct hlist_node *node;
1274 LIST_HEAD(invalid_list);
1277 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1281 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1282 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1283 (vcpu->arch.mmu.sync_page(vcpu, s, true))) {
1284 kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1287 kvm_unlink_unsync_page(vcpu->kvm, s);
1291 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1293 kvm_mmu_flush_tlb(vcpu);
1296 struct mmu_page_path {
1297 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1298 unsigned int idx[PT64_ROOT_LEVEL-1];
1301 #define for_each_sp(pvec, sp, parents, i) \
1302 for (i = mmu_pages_next(&pvec, &parents, -1), \
1303 sp = pvec.page[i].sp; \
1304 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1305 i = mmu_pages_next(&pvec, &parents, i))
1307 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1308 struct mmu_page_path *parents,
1313 for (n = i+1; n < pvec->nr; n++) {
1314 struct kvm_mmu_page *sp = pvec->page[n].sp;
1316 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1317 parents->idx[0] = pvec->page[n].idx;
1321 parents->parent[sp->role.level-2] = sp;
1322 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1328 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1330 struct kvm_mmu_page *sp;
1331 unsigned int level = 0;
1334 unsigned int idx = parents->idx[level];
1336 sp = parents->parent[level];
1340 --sp->unsync_children;
1341 WARN_ON((int)sp->unsync_children < 0);
1342 __clear_bit(idx, sp->unsync_child_bitmap);
1344 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1347 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1348 struct mmu_page_path *parents,
1349 struct kvm_mmu_pages *pvec)
1351 parents->parent[parent->role.level-1] = NULL;
1355 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1356 struct kvm_mmu_page *parent)
1359 struct kvm_mmu_page *sp;
1360 struct mmu_page_path parents;
1361 struct kvm_mmu_pages pages;
1362 LIST_HEAD(invalid_list);
1364 kvm_mmu_pages_init(parent, &parents, &pages);
1365 while (mmu_unsync_walk(parent, &pages)) {
1368 for_each_sp(pages, sp, parents, i)
1369 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1372 kvm_flush_remote_tlbs(vcpu->kvm);
1374 for_each_sp(pages, sp, parents, i) {
1375 kvm_sync_page(vcpu, sp, &invalid_list);
1376 mmu_pages_clear_parents(&parents);
1378 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1379 cond_resched_lock(&vcpu->kvm->mmu_lock);
1380 kvm_mmu_pages_init(parent, &parents, &pages);
1384 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1392 union kvm_mmu_page_role role;
1394 struct kvm_mmu_page *sp;
1395 struct hlist_node *node;
1396 bool need_sync = false;
1398 role = vcpu->arch.mmu.base_role;
1400 role.direct = direct;
1403 role.access = access;
1404 if (!tdp_enabled && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1405 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1406 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1407 role.quadrant = quadrant;
1409 for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1410 if (!need_sync && sp->unsync)
1413 if (sp->role.word != role.word)
1416 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1419 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1420 if (sp->unsync_children) {
1421 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1422 kvm_mmu_mark_parents_unsync(sp);
1423 } else if (sp->unsync)
1424 kvm_mmu_mark_parents_unsync(sp);
1426 trace_kvm_mmu_get_page(sp, false);
1429 ++vcpu->kvm->stat.mmu_cache_miss;
1430 sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1435 hlist_add_head(&sp->hash_link,
1436 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1438 if (rmap_write_protect(vcpu->kvm, gfn))
1439 kvm_flush_remote_tlbs(vcpu->kvm);
1440 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1441 kvm_sync_pages(vcpu, gfn);
1443 account_shadowed(vcpu->kvm, gfn);
1445 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1446 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1448 nonpaging_prefetch_page(vcpu, sp);
1449 trace_kvm_mmu_get_page(sp, true);
1453 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1454 struct kvm_vcpu *vcpu, u64 addr)
1456 iterator->addr = addr;
1457 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1458 iterator->level = vcpu->arch.mmu.shadow_root_level;
1459 if (iterator->level == PT32E_ROOT_LEVEL) {
1460 iterator->shadow_addr
1461 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1462 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1464 if (!iterator->shadow_addr)
1465 iterator->level = 0;
1469 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1471 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1474 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1475 if (is_large_pte(*iterator->sptep))
1478 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1479 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1483 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1485 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1489 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1493 spte = __pa(sp->spt)
1494 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1495 | PT_WRITABLE_MASK | PT_USER_MASK;
1496 __set_spte(sptep, spte);
1499 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1501 if (is_large_pte(*sptep)) {
1502 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1503 kvm_flush_remote_tlbs(vcpu->kvm);
1507 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1508 unsigned direct_access)
1510 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
1511 struct kvm_mmu_page *child;
1514 * For the direct sp, if the guest pte's dirty bit
1515 * changed form clean to dirty, it will corrupt the
1516 * sp's access: allow writable in the read-only sp,
1517 * so we should update the spte at this point to get
1518 * a new sp with the correct access.
1520 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
1521 if (child->role.access == direct_access)
1524 mmu_page_remove_parent_pte(child, sptep);
1525 __set_spte(sptep, shadow_trap_nonpresent_pte);
1526 kvm_flush_remote_tlbs(vcpu->kvm);
1530 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1531 struct kvm_mmu_page *sp)
1539 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1542 if (is_shadow_present_pte(ent)) {
1543 if (!is_last_spte(ent, sp->role.level)) {
1544 ent &= PT64_BASE_ADDR_MASK;
1545 mmu_page_remove_parent_pte(page_header(ent),
1548 if (is_large_pte(ent))
1550 drop_spte(kvm, &pt[i],
1551 shadow_trap_nonpresent_pte);
1554 pt[i] = shadow_trap_nonpresent_pte;
1558 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1560 mmu_page_remove_parent_pte(sp, parent_pte);
1563 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1566 struct kvm_vcpu *vcpu;
1568 kvm_for_each_vcpu(i, vcpu, kvm)
1569 vcpu->arch.last_pte_updated = NULL;
1572 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1576 while (sp->multimapped || sp->parent_pte) {
1577 if (!sp->multimapped)
1578 parent_pte = sp->parent_pte;
1580 struct kvm_pte_chain *chain;
1582 chain = container_of(sp->parent_ptes.first,
1583 struct kvm_pte_chain, link);
1584 parent_pte = chain->parent_ptes[0];
1586 BUG_ON(!parent_pte);
1587 kvm_mmu_put_page(sp, parent_pte);
1588 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1592 static int mmu_zap_unsync_children(struct kvm *kvm,
1593 struct kvm_mmu_page *parent,
1594 struct list_head *invalid_list)
1597 struct mmu_page_path parents;
1598 struct kvm_mmu_pages pages;
1600 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1603 kvm_mmu_pages_init(parent, &parents, &pages);
1604 while (mmu_unsync_walk(parent, &pages)) {
1605 struct kvm_mmu_page *sp;
1607 for_each_sp(pages, sp, parents, i) {
1608 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1609 mmu_pages_clear_parents(&parents);
1612 kvm_mmu_pages_init(parent, &parents, &pages);
1618 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1619 struct list_head *invalid_list)
1623 trace_kvm_mmu_prepare_zap_page(sp);
1624 ++kvm->stat.mmu_shadow_zapped;
1625 ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1626 kvm_mmu_page_unlink_children(kvm, sp);
1627 kvm_mmu_unlink_parents(kvm, sp);
1628 if (!sp->role.invalid && !sp->role.direct)
1629 unaccount_shadowed(kvm, sp->gfn);
1631 kvm_unlink_unsync_page(kvm, sp);
1632 if (!sp->root_count) {
1635 list_move(&sp->link, invalid_list);
1637 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1638 kvm_reload_remote_mmus(kvm);
1641 sp->role.invalid = 1;
1642 kvm_mmu_reset_last_pte_updated(kvm);
1646 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1647 struct list_head *invalid_list)
1649 struct kvm_mmu_page *sp;
1651 if (list_empty(invalid_list))
1654 kvm_flush_remote_tlbs(kvm);
1657 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1658 WARN_ON(!sp->role.invalid || sp->root_count);
1659 kvm_mmu_free_page(kvm, sp);
1660 } while (!list_empty(invalid_list));
1665 * Changing the number of mmu pages allocated to the vm
1666 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1668 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1671 LIST_HEAD(invalid_list);
1673 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1674 used_pages = max(0, used_pages);
1677 * If we set the number of mmu pages to be smaller be than the
1678 * number of actived pages , we must to free some mmu pages before we
1682 if (used_pages > kvm_nr_mmu_pages) {
1683 while (used_pages > kvm_nr_mmu_pages &&
1684 !list_empty(&kvm->arch.active_mmu_pages)) {
1685 struct kvm_mmu_page *page;
1687 page = container_of(kvm->arch.active_mmu_pages.prev,
1688 struct kvm_mmu_page, link);
1689 used_pages -= kvm_mmu_prepare_zap_page(kvm, page,
1692 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1693 kvm_nr_mmu_pages = used_pages;
1694 kvm->arch.n_free_mmu_pages = 0;
1697 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1698 - kvm->arch.n_alloc_mmu_pages;
1700 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1703 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1705 struct kvm_mmu_page *sp;
1706 struct hlist_node *node;
1707 LIST_HEAD(invalid_list);
1710 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1713 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1714 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1717 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1719 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1723 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1725 struct kvm_mmu_page *sp;
1726 struct hlist_node *node;
1727 LIST_HEAD(invalid_list);
1729 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1730 pgprintk("%s: zap %lx %x\n",
1731 __func__, gfn, sp->role.word);
1732 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1734 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1737 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1739 int slot = memslot_id(kvm, gfn);
1740 struct kvm_mmu_page *sp = page_header(__pa(pte));
1742 __set_bit(slot, sp->slot_bitmap);
1745 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1750 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1753 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1754 if (pt[i] == shadow_notrap_nonpresent_pte)
1755 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1760 * The function is based on mtrr_type_lookup() in
1761 * arch/x86/kernel/cpu/mtrr/generic.c
1763 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1768 u8 prev_match, curr_match;
1769 int num_var_ranges = KVM_NR_VAR_MTRR;
1771 if (!mtrr_state->enabled)
1774 /* Make end inclusive end, instead of exclusive */
1777 /* Look in fixed ranges. Just return the type as per start */
1778 if (mtrr_state->have_fixed && (start < 0x100000)) {
1781 if (start < 0x80000) {
1783 idx += (start >> 16);
1784 return mtrr_state->fixed_ranges[idx];
1785 } else if (start < 0xC0000) {
1787 idx += ((start - 0x80000) >> 14);
1788 return mtrr_state->fixed_ranges[idx];
1789 } else if (start < 0x1000000) {
1791 idx += ((start - 0xC0000) >> 12);
1792 return mtrr_state->fixed_ranges[idx];
1797 * Look in variable ranges
1798 * Look of multiple ranges matching this address and pick type
1799 * as per MTRR precedence
1801 if (!(mtrr_state->enabled & 2))
1802 return mtrr_state->def_type;
1805 for (i = 0; i < num_var_ranges; ++i) {
1806 unsigned short start_state, end_state;
1808 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1811 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1812 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1813 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1814 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1816 start_state = ((start & mask) == (base & mask));
1817 end_state = ((end & mask) == (base & mask));
1818 if (start_state != end_state)
1821 if ((start & mask) != (base & mask))
1824 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1825 if (prev_match == 0xFF) {
1826 prev_match = curr_match;
1830 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1831 curr_match == MTRR_TYPE_UNCACHABLE)
1832 return MTRR_TYPE_UNCACHABLE;
1834 if ((prev_match == MTRR_TYPE_WRBACK &&
1835 curr_match == MTRR_TYPE_WRTHROUGH) ||
1836 (prev_match == MTRR_TYPE_WRTHROUGH &&
1837 curr_match == MTRR_TYPE_WRBACK)) {
1838 prev_match = MTRR_TYPE_WRTHROUGH;
1839 curr_match = MTRR_TYPE_WRTHROUGH;
1842 if (prev_match != curr_match)
1843 return MTRR_TYPE_UNCACHABLE;
1846 if (prev_match != 0xFF)
1849 return mtrr_state->def_type;
1852 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1856 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1857 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1858 if (mtrr == 0xfe || mtrr == 0xff)
1859 mtrr = MTRR_TYPE_WRBACK;
1862 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1864 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1866 trace_kvm_mmu_unsync_page(sp);
1867 ++vcpu->kvm->stat.mmu_unsync;
1870 kvm_mmu_mark_parents_unsync(sp);
1871 mmu_convert_notrap(sp);
1874 static void kvm_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1876 struct kvm_mmu_page *s;
1877 struct hlist_node *node;
1879 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1882 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1883 __kvm_unsync_page(vcpu, s);
1887 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1890 struct kvm_mmu_page *s;
1891 struct hlist_node *node;
1892 bool need_unsync = false;
1894 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1898 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1901 if (!need_unsync && !s->unsync) {
1908 kvm_unsync_pages(vcpu, gfn);
1912 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1913 unsigned pte_access, int user_fault,
1914 int write_fault, int dirty, int level,
1915 gfn_t gfn, pfn_t pfn, bool speculative,
1916 bool can_unsync, bool reset_host_protection)
1922 * We don't set the accessed bit, since we sometimes want to see
1923 * whether the guest actually used the pte (in order to detect
1926 spte = shadow_base_present_pte | shadow_dirty_mask;
1928 spte |= shadow_accessed_mask;
1930 pte_access &= ~ACC_WRITE_MASK;
1931 if (pte_access & ACC_EXEC_MASK)
1932 spte |= shadow_x_mask;
1934 spte |= shadow_nx_mask;
1935 if (pte_access & ACC_USER_MASK)
1936 spte |= shadow_user_mask;
1937 if (level > PT_PAGE_TABLE_LEVEL)
1938 spte |= PT_PAGE_SIZE_MASK;
1940 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1941 kvm_is_mmio_pfn(pfn));
1943 if (reset_host_protection)
1944 spte |= SPTE_HOST_WRITEABLE;
1946 spte |= (u64)pfn << PAGE_SHIFT;
1948 if ((pte_access & ACC_WRITE_MASK)
1949 || (!tdp_enabled && write_fault && !is_write_protection(vcpu)
1952 if (level > PT_PAGE_TABLE_LEVEL &&
1953 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1955 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1959 spte |= PT_WRITABLE_MASK;
1961 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1962 spte &= ~PT_USER_MASK;
1965 * Optimization: for pte sync, if spte was writable the hash
1966 * lookup is unnecessary (and expensive). Write protection
1967 * is responsibility of mmu_get_page / kvm_sync_page.
1968 * Same reasoning can be applied to dirty page accounting.
1970 if (!can_unsync && is_writable_pte(*sptep))
1973 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1974 pgprintk("%s: found shadow page for %lx, marking ro\n",
1977 pte_access &= ~ACC_WRITE_MASK;
1978 if (is_writable_pte(spte))
1979 spte &= ~PT_WRITABLE_MASK;
1983 if (pte_access & ACC_WRITE_MASK)
1984 mark_page_dirty(vcpu->kvm, gfn);
1987 update_spte(sptep, spte);
1992 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1993 unsigned pt_access, unsigned pte_access,
1994 int user_fault, int write_fault, int dirty,
1995 int *ptwrite, int level, gfn_t gfn,
1996 pfn_t pfn, bool speculative,
1997 bool reset_host_protection)
1999 int was_rmapped = 0;
2000 int was_writable = is_writable_pte(*sptep);
2003 pgprintk("%s: spte %llx access %x write_fault %d"
2004 " user_fault %d gfn %lx\n",
2005 __func__, *sptep, pt_access,
2006 write_fault, user_fault, gfn);
2008 if (is_rmap_spte(*sptep)) {
2010 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2011 * the parent of the now unreachable PTE.
2013 if (level > PT_PAGE_TABLE_LEVEL &&
2014 !is_large_pte(*sptep)) {
2015 struct kvm_mmu_page *child;
2018 child = page_header(pte & PT64_BASE_ADDR_MASK);
2019 mmu_page_remove_parent_pte(child, sptep);
2020 __set_spte(sptep, shadow_trap_nonpresent_pte);
2021 kvm_flush_remote_tlbs(vcpu->kvm);
2022 } else if (pfn != spte_to_pfn(*sptep)) {
2023 pgprintk("hfn old %lx new %lx\n",
2024 spte_to_pfn(*sptep), pfn);
2025 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2026 kvm_flush_remote_tlbs(vcpu->kvm);
2031 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
2032 dirty, level, gfn, pfn, speculative, true,
2033 reset_host_protection)) {
2036 kvm_mmu_flush_tlb(vcpu);
2039 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2040 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
2041 is_large_pte(*sptep)? "2MB" : "4kB",
2042 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2044 if (!was_rmapped && is_large_pte(*sptep))
2045 ++vcpu->kvm->stat.lpages;
2047 page_header_update_slot(vcpu->kvm, sptep, gfn);
2049 rmap_count = rmap_add(vcpu, sptep, gfn);
2050 kvm_release_pfn_clean(pfn);
2051 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2052 rmap_recycle(vcpu, sptep, gfn);
2055 kvm_release_pfn_dirty(pfn);
2057 kvm_release_pfn_clean(pfn);
2060 vcpu->arch.last_pte_updated = sptep;
2061 vcpu->arch.last_pte_gfn = gfn;
2065 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2069 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2070 int level, gfn_t gfn, pfn_t pfn)
2072 struct kvm_shadow_walk_iterator iterator;
2073 struct kvm_mmu_page *sp;
2077 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2078 if (iterator.level == level) {
2079 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2080 0, write, 1, &pt_write,
2081 level, gfn, pfn, false, true);
2082 ++vcpu->stat.pf_fixed;
2086 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2087 u64 base_addr = iterator.addr;
2089 base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2090 pseudo_gfn = base_addr >> PAGE_SHIFT;
2091 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2093 1, ACC_ALL, iterator.sptep);
2095 pgprintk("nonpaging_map: ENOMEM\n");
2096 kvm_release_pfn_clean(pfn);
2100 __set_spte(iterator.sptep,
2102 | PT_PRESENT_MASK | PT_WRITABLE_MASK
2103 | shadow_user_mask | shadow_x_mask);
2109 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2115 /* Touch the page, so send SIGBUS */
2116 hva = (void __user *)gfn_to_hva(kvm, gfn);
2117 r = copy_from_user(buf, hva, 1);
2120 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2122 kvm_release_pfn_clean(pfn);
2123 if (is_hwpoison_pfn(pfn)) {
2124 kvm_send_hwpoison_signal(kvm, gfn);
2126 } else if (is_fault_pfn(pfn))
2132 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2137 unsigned long mmu_seq;
2139 level = mapping_level(vcpu, gfn);
2142 * This path builds a PAE pagetable - so we can map 2mb pages at
2143 * maximum. Therefore check if the level is larger than that.
2145 if (level > PT_DIRECTORY_LEVEL)
2146 level = PT_DIRECTORY_LEVEL;
2148 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2150 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2152 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2155 if (is_error_pfn(pfn))
2156 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2158 spin_lock(&vcpu->kvm->mmu_lock);
2159 if (mmu_notifier_retry(vcpu, mmu_seq))
2161 kvm_mmu_free_some_pages(vcpu);
2162 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2163 spin_unlock(&vcpu->kvm->mmu_lock);
2169 spin_unlock(&vcpu->kvm->mmu_lock);
2170 kvm_release_pfn_clean(pfn);
2175 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2178 struct kvm_mmu_page *sp;
2179 LIST_HEAD(invalid_list);
2181 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2183 spin_lock(&vcpu->kvm->mmu_lock);
2184 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2185 hpa_t root = vcpu->arch.mmu.root_hpa;
2187 sp = page_header(root);
2189 if (!sp->root_count && sp->role.invalid) {
2190 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2191 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2193 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2194 spin_unlock(&vcpu->kvm->mmu_lock);
2197 for (i = 0; i < 4; ++i) {
2198 hpa_t root = vcpu->arch.mmu.pae_root[i];
2201 root &= PT64_BASE_ADDR_MASK;
2202 sp = page_header(root);
2204 if (!sp->root_count && sp->role.invalid)
2205 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2208 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2210 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2211 spin_unlock(&vcpu->kvm->mmu_lock);
2212 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2215 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2219 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2220 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2227 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2231 struct kvm_mmu_page *sp;
2235 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2237 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2238 hpa_t root = vcpu->arch.mmu.root_hpa;
2240 ASSERT(!VALID_PAGE(root));
2241 if (mmu_check_root(vcpu, root_gfn))
2247 spin_lock(&vcpu->kvm->mmu_lock);
2248 kvm_mmu_free_some_pages(vcpu);
2249 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2250 PT64_ROOT_LEVEL, direct,
2252 root = __pa(sp->spt);
2254 spin_unlock(&vcpu->kvm->mmu_lock);
2255 vcpu->arch.mmu.root_hpa = root;
2258 direct = !is_paging(vcpu);
2259 for (i = 0; i < 4; ++i) {
2260 hpa_t root = vcpu->arch.mmu.pae_root[i];
2262 ASSERT(!VALID_PAGE(root));
2263 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2264 pdptr = kvm_pdptr_read(vcpu, i);
2265 if (!is_present_gpte(pdptr)) {
2266 vcpu->arch.mmu.pae_root[i] = 0;
2269 root_gfn = pdptr >> PAGE_SHIFT;
2270 } else if (vcpu->arch.mmu.root_level == 0)
2272 if (mmu_check_root(vcpu, root_gfn))
2278 spin_lock(&vcpu->kvm->mmu_lock);
2279 kvm_mmu_free_some_pages(vcpu);
2280 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2281 PT32_ROOT_LEVEL, direct,
2283 root = __pa(sp->spt);
2285 spin_unlock(&vcpu->kvm->mmu_lock);
2287 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2289 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2293 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2296 struct kvm_mmu_page *sp;
2298 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2300 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2301 hpa_t root = vcpu->arch.mmu.root_hpa;
2302 sp = page_header(root);
2303 mmu_sync_children(vcpu, sp);
2306 for (i = 0; i < 4; ++i) {
2307 hpa_t root = vcpu->arch.mmu.pae_root[i];
2309 if (root && VALID_PAGE(root)) {
2310 root &= PT64_BASE_ADDR_MASK;
2311 sp = page_header(root);
2312 mmu_sync_children(vcpu, sp);
2317 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2319 spin_lock(&vcpu->kvm->mmu_lock);
2320 mmu_sync_roots(vcpu);
2321 spin_unlock(&vcpu->kvm->mmu_lock);
2324 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2325 u32 access, u32 *error)
2332 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2338 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2339 r = mmu_topup_memory_caches(vcpu);
2344 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2346 gfn = gva >> PAGE_SHIFT;
2348 return nonpaging_map(vcpu, gva & PAGE_MASK,
2349 error_code & PFERR_WRITE_MASK, gfn);
2352 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2358 gfn_t gfn = gpa >> PAGE_SHIFT;
2359 unsigned long mmu_seq;
2362 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2364 r = mmu_topup_memory_caches(vcpu);
2368 level = mapping_level(vcpu, gfn);
2370 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2372 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2374 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2375 if (is_error_pfn(pfn))
2376 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2377 spin_lock(&vcpu->kvm->mmu_lock);
2378 if (mmu_notifier_retry(vcpu, mmu_seq))
2380 kvm_mmu_free_some_pages(vcpu);
2381 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2383 spin_unlock(&vcpu->kvm->mmu_lock);
2388 spin_unlock(&vcpu->kvm->mmu_lock);
2389 kvm_release_pfn_clean(pfn);
2393 static void nonpaging_free(struct kvm_vcpu *vcpu)
2395 mmu_free_roots(vcpu);
2398 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2400 struct kvm_mmu *context = &vcpu->arch.mmu;
2402 context->new_cr3 = nonpaging_new_cr3;
2403 context->page_fault = nonpaging_page_fault;
2404 context->gva_to_gpa = nonpaging_gva_to_gpa;
2405 context->free = nonpaging_free;
2406 context->prefetch_page = nonpaging_prefetch_page;
2407 context->sync_page = nonpaging_sync_page;
2408 context->invlpg = nonpaging_invlpg;
2409 context->root_level = 0;
2410 context->shadow_root_level = PT32E_ROOT_LEVEL;
2411 context->root_hpa = INVALID_PAGE;
2415 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2417 ++vcpu->stat.tlb_flush;
2418 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2421 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2423 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2424 mmu_free_roots(vcpu);
2427 static void inject_page_fault(struct kvm_vcpu *vcpu,
2431 kvm_inject_page_fault(vcpu, addr, err_code);
2434 static void paging_free(struct kvm_vcpu *vcpu)
2436 nonpaging_free(vcpu);
2439 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2443 bit7 = (gpte >> 7) & 1;
2444 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2448 #include "paging_tmpl.h"
2452 #include "paging_tmpl.h"
2455 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2457 struct kvm_mmu *context = &vcpu->arch.mmu;
2458 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2459 u64 exb_bit_rsvd = 0;
2462 exb_bit_rsvd = rsvd_bits(63, 63);
2464 case PT32_ROOT_LEVEL:
2465 /* no rsvd bits for 2 level 4K page table entries */
2466 context->rsvd_bits_mask[0][1] = 0;
2467 context->rsvd_bits_mask[0][0] = 0;
2468 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2470 if (!is_pse(vcpu)) {
2471 context->rsvd_bits_mask[1][1] = 0;
2475 if (is_cpuid_PSE36())
2476 /* 36bits PSE 4MB page */
2477 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2479 /* 32 bits PSE 4MB page */
2480 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2482 case PT32E_ROOT_LEVEL:
2483 context->rsvd_bits_mask[0][2] =
2484 rsvd_bits(maxphyaddr, 63) |
2485 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2486 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2487 rsvd_bits(maxphyaddr, 62); /* PDE */
2488 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2489 rsvd_bits(maxphyaddr, 62); /* PTE */
2490 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2491 rsvd_bits(maxphyaddr, 62) |
2492 rsvd_bits(13, 20); /* large page */
2493 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2495 case PT64_ROOT_LEVEL:
2496 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2497 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2498 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2499 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2500 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2501 rsvd_bits(maxphyaddr, 51);
2502 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2503 rsvd_bits(maxphyaddr, 51);
2504 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2505 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2506 rsvd_bits(maxphyaddr, 51) |
2508 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2509 rsvd_bits(maxphyaddr, 51) |
2510 rsvd_bits(13, 20); /* large page */
2511 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2516 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2518 struct kvm_mmu *context = &vcpu->arch.mmu;
2520 ASSERT(is_pae(vcpu));
2521 context->new_cr3 = paging_new_cr3;
2522 context->page_fault = paging64_page_fault;
2523 context->gva_to_gpa = paging64_gva_to_gpa;
2524 context->prefetch_page = paging64_prefetch_page;
2525 context->sync_page = paging64_sync_page;
2526 context->invlpg = paging64_invlpg;
2527 context->free = paging_free;
2528 context->root_level = level;
2529 context->shadow_root_level = level;
2530 context->root_hpa = INVALID_PAGE;
2534 static int paging64_init_context(struct kvm_vcpu *vcpu)
2536 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2537 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2540 static int paging32_init_context(struct kvm_vcpu *vcpu)
2542 struct kvm_mmu *context = &vcpu->arch.mmu;
2544 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2545 context->new_cr3 = paging_new_cr3;
2546 context->page_fault = paging32_page_fault;
2547 context->gva_to_gpa = paging32_gva_to_gpa;
2548 context->free = paging_free;
2549 context->prefetch_page = paging32_prefetch_page;
2550 context->sync_page = paging32_sync_page;
2551 context->invlpg = paging32_invlpg;
2552 context->root_level = PT32_ROOT_LEVEL;
2553 context->shadow_root_level = PT32E_ROOT_LEVEL;
2554 context->root_hpa = INVALID_PAGE;
2558 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2560 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2561 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2564 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2566 struct kvm_mmu *context = &vcpu->arch.mmu;
2568 context->new_cr3 = nonpaging_new_cr3;
2569 context->page_fault = tdp_page_fault;
2570 context->free = nonpaging_free;
2571 context->prefetch_page = nonpaging_prefetch_page;
2572 context->sync_page = nonpaging_sync_page;
2573 context->invlpg = nonpaging_invlpg;
2574 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2575 context->root_hpa = INVALID_PAGE;
2577 if (!is_paging(vcpu)) {
2578 context->gva_to_gpa = nonpaging_gva_to_gpa;
2579 context->root_level = 0;
2580 } else if (is_long_mode(vcpu)) {
2581 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2582 context->gva_to_gpa = paging64_gva_to_gpa;
2583 context->root_level = PT64_ROOT_LEVEL;
2584 } else if (is_pae(vcpu)) {
2585 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2586 context->gva_to_gpa = paging64_gva_to_gpa;
2587 context->root_level = PT32E_ROOT_LEVEL;
2589 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2590 context->gva_to_gpa = paging32_gva_to_gpa;
2591 context->root_level = PT32_ROOT_LEVEL;
2597 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2602 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2604 if (!is_paging(vcpu))
2605 r = nonpaging_init_context(vcpu);
2606 else if (is_long_mode(vcpu))
2607 r = paging64_init_context(vcpu);
2608 else if (is_pae(vcpu))
2609 r = paging32E_init_context(vcpu);
2611 r = paging32_init_context(vcpu);
2613 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2614 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2619 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2621 vcpu->arch.update_pte.pfn = bad_pfn;
2624 return init_kvm_tdp_mmu(vcpu);
2626 return init_kvm_softmmu(vcpu);
2629 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2632 if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2633 /* mmu.free() should set root_hpa = INVALID_PAGE */
2634 vcpu->arch.mmu.free(vcpu);
2637 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2639 destroy_kvm_mmu(vcpu);
2640 return init_kvm_mmu(vcpu);
2642 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2644 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2648 r = mmu_topup_memory_caches(vcpu);
2651 r = mmu_alloc_roots(vcpu);
2652 spin_lock(&vcpu->kvm->mmu_lock);
2653 mmu_sync_roots(vcpu);
2654 spin_unlock(&vcpu->kvm->mmu_lock);
2657 /* set_cr3() should ensure TLB has been flushed */
2658 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2662 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2664 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2666 mmu_free_roots(vcpu);
2669 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2670 struct kvm_mmu_page *sp,
2674 struct kvm_mmu_page *child;
2677 if (is_shadow_present_pte(pte)) {
2678 if (is_last_spte(pte, sp->role.level))
2679 drop_spte(vcpu->kvm, spte, shadow_trap_nonpresent_pte);
2681 child = page_header(pte & PT64_BASE_ADDR_MASK);
2682 mmu_page_remove_parent_pte(child, spte);
2685 __set_spte(spte, shadow_trap_nonpresent_pte);
2686 if (is_large_pte(pte))
2687 --vcpu->kvm->stat.lpages;
2690 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2691 struct kvm_mmu_page *sp,
2695 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2696 ++vcpu->kvm->stat.mmu_pde_zapped;
2700 if (is_rsvd_bits_set(vcpu, *(u64 *)new, PT_PAGE_TABLE_LEVEL))
2703 ++vcpu->kvm->stat.mmu_pte_updated;
2704 if (!sp->role.cr4_pae)
2705 paging32_update_pte(vcpu, sp, spte, new);
2707 paging64_update_pte(vcpu, sp, spte, new);
2710 static bool need_remote_flush(u64 old, u64 new)
2712 if (!is_shadow_present_pte(old))
2714 if (!is_shadow_present_pte(new))
2716 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2718 old ^= PT64_NX_MASK;
2719 new ^= PT64_NX_MASK;
2720 return (old & ~new & PT64_PERM_MASK) != 0;
2723 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
2724 bool remote_flush, bool local_flush)
2730 kvm_flush_remote_tlbs(vcpu->kvm);
2731 else if (local_flush)
2732 kvm_mmu_flush_tlb(vcpu);
2735 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2737 u64 *spte = vcpu->arch.last_pte_updated;
2739 return !!(spte && (*spte & shadow_accessed_mask));
2742 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2748 if (!is_present_gpte(gpte))
2750 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2752 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2754 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2756 if (is_error_pfn(pfn)) {
2757 kvm_release_pfn_clean(pfn);
2760 vcpu->arch.update_pte.gfn = gfn;
2761 vcpu->arch.update_pte.pfn = pfn;
2764 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2766 u64 *spte = vcpu->arch.last_pte_updated;
2769 && vcpu->arch.last_pte_gfn == gfn
2770 && shadow_accessed_mask
2771 && !(*spte & shadow_accessed_mask)
2772 && is_shadow_present_pte(*spte))
2773 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2776 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2777 const u8 *new, int bytes,
2778 bool guest_initiated)
2780 gfn_t gfn = gpa >> PAGE_SHIFT;
2781 union kvm_mmu_page_role mask = { .word = 0 };
2782 struct kvm_mmu_page *sp;
2783 struct hlist_node *node;
2784 LIST_HEAD(invalid_list);
2787 unsigned offset = offset_in_page(gpa);
2789 unsigned page_offset;
2790 unsigned misaligned;
2797 bool remote_flush, local_flush, zap_page;
2799 zap_page = remote_flush = local_flush = false;
2801 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2803 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2806 * Assume that the pte write on a page table of the same type
2807 * as the current vcpu paging mode. This is nearly always true
2808 * (might be false while changing modes). Note it is verified later
2811 if ((is_pae(vcpu) && bytes == 4) || !new) {
2812 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2817 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2820 new = (const u8 *)&gentry;
2825 gentry = *(const u32 *)new;
2828 gentry = *(const u64 *)new;
2835 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2836 spin_lock(&vcpu->kvm->mmu_lock);
2837 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2839 kvm_mmu_access_page(vcpu, gfn);
2840 kvm_mmu_free_some_pages(vcpu);
2841 ++vcpu->kvm->stat.mmu_pte_write;
2842 kvm_mmu_audit(vcpu, "pre pte write");
2843 if (guest_initiated) {
2844 if (gfn == vcpu->arch.last_pt_write_gfn
2845 && !last_updated_pte_accessed(vcpu)) {
2846 ++vcpu->arch.last_pt_write_count;
2847 if (vcpu->arch.last_pt_write_count >= 3)
2850 vcpu->arch.last_pt_write_gfn = gfn;
2851 vcpu->arch.last_pt_write_count = 1;
2852 vcpu->arch.last_pte_updated = NULL;
2856 mask.cr0_wp = mask.cr4_pae = mask.nxe = 1;
2857 for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
2858 pte_size = sp->role.cr4_pae ? 8 : 4;
2859 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2860 misaligned |= bytes < 4;
2861 if (misaligned || flooded) {
2863 * Misaligned accesses are too much trouble to fix
2864 * up; also, they usually indicate a page is not used
2867 * If we're seeing too many writes to a page,
2868 * it may no longer be a page table, or we may be
2869 * forking, in which case it is better to unmap the
2872 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2873 gpa, bytes, sp->role.word);
2874 zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2876 ++vcpu->kvm->stat.mmu_flooded;
2879 page_offset = offset;
2880 level = sp->role.level;
2882 if (!sp->role.cr4_pae) {
2883 page_offset <<= 1; /* 32->64 */
2885 * A 32-bit pde maps 4MB while the shadow pdes map
2886 * only 2MB. So we need to double the offset again
2887 * and zap two pdes instead of one.
2889 if (level == PT32_ROOT_LEVEL) {
2890 page_offset &= ~7; /* kill rounding error */
2894 quadrant = page_offset >> PAGE_SHIFT;
2895 page_offset &= ~PAGE_MASK;
2896 if (quadrant != sp->role.quadrant)
2900 spte = &sp->spt[page_offset / sizeof(*spte)];
2903 mmu_pte_write_zap_pte(vcpu, sp, spte);
2905 !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
2907 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2908 if (!remote_flush && need_remote_flush(entry, *spte))
2909 remote_flush = true;
2913 mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
2914 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2915 kvm_mmu_audit(vcpu, "post pte write");
2916 spin_unlock(&vcpu->kvm->mmu_lock);
2917 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2918 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2919 vcpu->arch.update_pte.pfn = bad_pfn;
2923 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2931 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2933 spin_lock(&vcpu->kvm->mmu_lock);
2934 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2935 spin_unlock(&vcpu->kvm->mmu_lock);
2938 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2940 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2943 LIST_HEAD(invalid_list);
2945 free_pages = vcpu->kvm->arch.n_free_mmu_pages;
2946 while (free_pages < KVM_REFILL_PAGES &&
2947 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2948 struct kvm_mmu_page *sp;
2950 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2951 struct kvm_mmu_page, link);
2952 free_pages += kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2954 ++vcpu->kvm->stat.mmu_recycled;
2956 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2959 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2962 enum emulation_result er;
2964 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2973 r = mmu_topup_memory_caches(vcpu);
2977 er = emulate_instruction(vcpu, cr2, error_code, 0);
2982 case EMULATE_DO_MMIO:
2983 ++vcpu->stat.mmio_exits;
2993 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2995 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2997 vcpu->arch.mmu.invlpg(vcpu, gva);
2998 kvm_mmu_flush_tlb(vcpu);
2999 ++vcpu->stat.invlpg;
3001 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
3003 void kvm_enable_tdp(void)
3007 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
3009 void kvm_disable_tdp(void)
3011 tdp_enabled = false;
3013 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
3015 static void free_mmu_pages(struct kvm_vcpu *vcpu)
3017 free_page((unsigned long)vcpu->arch.mmu.pae_root);
3020 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
3028 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3029 * Therefore we need to allocate shadow page tables in the first
3030 * 4GB of memory, which happens to fit the DMA32 zone.
3032 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
3036 vcpu->arch.mmu.pae_root = page_address(page);
3037 for (i = 0; i < 4; ++i)
3038 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3043 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3046 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3048 return alloc_mmu_pages(vcpu);
3051 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3054 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3056 return init_kvm_mmu(vcpu);
3059 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3063 destroy_kvm_mmu(vcpu);
3064 free_mmu_pages(vcpu);
3065 mmu_free_memory_caches(vcpu);
3068 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3070 struct kvm_mmu_page *sp;
3072 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3076 if (!test_bit(slot, sp->slot_bitmap))
3080 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
3082 if (is_writable_pte(pt[i]))
3083 pt[i] &= ~PT_WRITABLE_MASK;
3085 kvm_flush_remote_tlbs(kvm);
3088 void kvm_mmu_zap_all(struct kvm *kvm)
3090 struct kvm_mmu_page *sp, *node;
3091 LIST_HEAD(invalid_list);
3093 spin_lock(&kvm->mmu_lock);
3095 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3096 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3099 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3100 spin_unlock(&kvm->mmu_lock);
3103 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3104 struct list_head *invalid_list)
3106 struct kvm_mmu_page *page;
3108 page = container_of(kvm->arch.active_mmu_pages.prev,
3109 struct kvm_mmu_page, link);
3110 return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3113 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3116 struct kvm *kvm_freed = NULL;
3117 int cache_count = 0;
3119 spin_lock(&kvm_lock);
3121 list_for_each_entry(kvm, &vm_list, vm_list) {
3122 int npages, idx, freed_pages;
3123 LIST_HEAD(invalid_list);
3125 idx = srcu_read_lock(&kvm->srcu);
3126 spin_lock(&kvm->mmu_lock);
3127 npages = kvm->arch.n_alloc_mmu_pages -
3128 kvm->arch.n_free_mmu_pages;
3129 cache_count += npages;
3130 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
3131 freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3133 cache_count -= freed_pages;
3138 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3139 spin_unlock(&kvm->mmu_lock);
3140 srcu_read_unlock(&kvm->srcu, idx);
3143 list_move_tail(&kvm_freed->vm_list, &vm_list);
3145 spin_unlock(&kvm_lock);
3150 static struct shrinker mmu_shrinker = {
3151 .shrink = mmu_shrink,
3152 .seeks = DEFAULT_SEEKS * 10,
3155 static void mmu_destroy_caches(void)
3157 if (pte_chain_cache)
3158 kmem_cache_destroy(pte_chain_cache);
3159 if (rmap_desc_cache)
3160 kmem_cache_destroy(rmap_desc_cache);
3161 if (mmu_page_header_cache)
3162 kmem_cache_destroy(mmu_page_header_cache);
3165 void kvm_mmu_module_exit(void)
3167 mmu_destroy_caches();
3168 unregister_shrinker(&mmu_shrinker);
3171 int kvm_mmu_module_init(void)
3173 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3174 sizeof(struct kvm_pte_chain),
3176 if (!pte_chain_cache)
3178 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3179 sizeof(struct kvm_rmap_desc),
3181 if (!rmap_desc_cache)
3184 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3185 sizeof(struct kvm_mmu_page),
3187 if (!mmu_page_header_cache)
3190 register_shrinker(&mmu_shrinker);
3195 mmu_destroy_caches();
3200 * Caculate mmu pages needed for kvm.
3202 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3205 unsigned int nr_mmu_pages;
3206 unsigned int nr_pages = 0;
3207 struct kvm_memslots *slots;
3209 slots = kvm_memslots(kvm);
3211 for (i = 0; i < slots->nmemslots; i++)
3212 nr_pages += slots->memslots[i].npages;
3214 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3215 nr_mmu_pages = max(nr_mmu_pages,
3216 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3218 return nr_mmu_pages;
3221 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3224 if (len > buffer->len)
3229 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3234 ret = pv_mmu_peek_buffer(buffer, len);
3239 buffer->processed += len;
3243 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3244 gpa_t addr, gpa_t value)
3249 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3252 r = mmu_topup_memory_caches(vcpu);
3256 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3262 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3264 (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3268 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3270 spin_lock(&vcpu->kvm->mmu_lock);
3271 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3272 spin_unlock(&vcpu->kvm->mmu_lock);
3276 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3277 struct kvm_pv_mmu_op_buffer *buffer)
3279 struct kvm_mmu_op_header *header;
3281 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3284 switch (header->op) {
3285 case KVM_MMU_OP_WRITE_PTE: {
3286 struct kvm_mmu_op_write_pte *wpte;
3288 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3291 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3294 case KVM_MMU_OP_FLUSH_TLB: {
3295 struct kvm_mmu_op_flush_tlb *ftlb;
3297 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3300 return kvm_pv_mmu_flush_tlb(vcpu);
3302 case KVM_MMU_OP_RELEASE_PT: {
3303 struct kvm_mmu_op_release_pt *rpt;
3305 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3308 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3314 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3315 gpa_t addr, unsigned long *ret)
3318 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3320 buffer->ptr = buffer->buf;
3321 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3322 buffer->processed = 0;
3324 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3328 while (buffer->len) {
3329 r = kvm_pv_mmu_op_one(vcpu, buffer);
3338 *ret = buffer->processed;
3342 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3344 struct kvm_shadow_walk_iterator iterator;
3347 spin_lock(&vcpu->kvm->mmu_lock);
3348 for_each_shadow_entry(vcpu, addr, iterator) {
3349 sptes[iterator.level-1] = *iterator.sptep;
3351 if (!is_shadow_present_pte(*iterator.sptep))
3354 spin_unlock(&vcpu->kvm->mmu_lock);
3358 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3362 static const char *audit_msg;
3364 static gva_t canonicalize(gva_t gva)
3366 #ifdef CONFIG_X86_64
3367 gva = (long long)(gva << 16) >> 16;
3373 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3375 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3380 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3381 u64 ent = sp->spt[i];
3383 if (is_shadow_present_pte(ent)) {
3384 if (!is_last_spte(ent, sp->role.level)) {
3385 struct kvm_mmu_page *child;
3386 child = page_header(ent & PT64_BASE_ADDR_MASK);
3387 __mmu_spte_walk(kvm, child, fn);
3389 fn(kvm, &sp->spt[i]);
3394 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3397 struct kvm_mmu_page *sp;
3399 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3401 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3402 hpa_t root = vcpu->arch.mmu.root_hpa;
3403 sp = page_header(root);
3404 __mmu_spte_walk(vcpu->kvm, sp, fn);
3407 for (i = 0; i < 4; ++i) {
3408 hpa_t root = vcpu->arch.mmu.pae_root[i];
3410 if (root && VALID_PAGE(root)) {
3411 root &= PT64_BASE_ADDR_MASK;
3412 sp = page_header(root);
3413 __mmu_spte_walk(vcpu->kvm, sp, fn);
3419 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3420 gva_t va, int level)
3422 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3424 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3426 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3429 if (ent == shadow_trap_nonpresent_pte)
3432 va = canonicalize(va);
3433 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3434 audit_mappings_page(vcpu, ent, va, level - 1);
3436 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3437 gfn_t gfn = gpa >> PAGE_SHIFT;
3438 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3439 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3441 if (is_error_pfn(pfn)) {
3442 kvm_release_pfn_clean(pfn);
3446 if (is_shadow_present_pte(ent)
3447 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3448 printk(KERN_ERR "xx audit error: (%s) levels %d"
3449 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3450 audit_msg, vcpu->arch.mmu.root_level,
3452 is_shadow_present_pte(ent));
3453 else if (ent == shadow_notrap_nonpresent_pte
3454 && !is_error_hpa(hpa))
3455 printk(KERN_ERR "audit: (%s) notrap shadow,"
3456 " valid guest gva %lx\n", audit_msg, va);
3457 kvm_release_pfn_clean(pfn);
3463 static void audit_mappings(struct kvm_vcpu *vcpu)
3467 if (vcpu->arch.mmu.root_level == 4)
3468 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3470 for (i = 0; i < 4; ++i)
3471 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3472 audit_mappings_page(vcpu,
3473 vcpu->arch.mmu.pae_root[i],
3478 static int count_rmaps(struct kvm_vcpu *vcpu)
3480 struct kvm *kvm = vcpu->kvm;
3481 struct kvm_memslots *slots;
3485 idx = srcu_read_lock(&kvm->srcu);
3486 slots = kvm_memslots(kvm);
3487 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3488 struct kvm_memory_slot *m = &slots->memslots[i];
3489 struct kvm_rmap_desc *d;
3491 for (j = 0; j < m->npages; ++j) {
3492 unsigned long *rmapp = &m->rmap[j];
3496 if (!(*rmapp & 1)) {
3500 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3502 for (k = 0; k < RMAP_EXT; ++k)
3511 srcu_read_unlock(&kvm->srcu, idx);
3515 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3517 unsigned long *rmapp;
3518 struct kvm_mmu_page *rev_sp;
3521 if (is_writable_pte(*sptep)) {
3522 rev_sp = page_header(__pa(sptep));
3523 gfn = kvm_mmu_page_get_gfn(rev_sp, sptep - rev_sp->spt);
3525 if (!gfn_to_memslot(kvm, gfn)) {
3526 if (!printk_ratelimit())
3528 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3530 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3531 audit_msg, (long int)(sptep - rev_sp->spt),
3537 rmapp = gfn_to_rmap(kvm, gfn, rev_sp->role.level);
3539 if (!printk_ratelimit())
3541 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3549 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3551 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3554 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3556 struct kvm_mmu_page *sp;
3559 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3562 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3565 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3568 if (!(ent & PT_PRESENT_MASK))
3570 if (!is_writable_pte(ent))
3572 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3578 static void audit_rmap(struct kvm_vcpu *vcpu)
3580 check_writable_mappings_rmap(vcpu);
3584 static void audit_write_protection(struct kvm_vcpu *vcpu)
3586 struct kvm_mmu_page *sp;
3587 struct kvm_memory_slot *slot;
3588 unsigned long *rmapp;
3592 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3593 if (sp->role.direct)
3598 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
3599 rmapp = &slot->rmap[gfn - slot->base_gfn];
3601 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3603 if (is_writable_pte(*spte))
3604 printk(KERN_ERR "%s: (%s) shadow page has "
3605 "writable mappings: gfn %lx role %x\n",
3606 __func__, audit_msg, sp->gfn,
3608 spte = rmap_next(vcpu->kvm, rmapp, spte);
3613 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3620 audit_write_protection(vcpu);
3621 if (strcmp("pre pte write", audit_msg) != 0)
3622 audit_mappings(vcpu);
3623 audit_writable_sptes_have_rmaps(vcpu);