4 * Copyright (C) 2006 Qumranet, Inc.
5 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
6 * Copyright(C) 2015 Intel Corporation.
9 * Yaniv Kamay <yaniv@qumranet.com>
10 * Avi Kivity <avi@qumranet.com>
11 * Marcelo Tosatti <mtosatti@redhat.com>
12 * Paolo Bonzini <pbonzini@redhat.com>
13 * Xiao Guangrong <guangrong.xiao@linux.intel.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
19 #include <linux/kvm_host.h>
25 #define IA32_MTRR_DEF_TYPE_E (1ULL << 11)
26 #define IA32_MTRR_DEF_TYPE_FE (1ULL << 10)
27 #define IA32_MTRR_DEF_TYPE_TYPE_MASK (0xff)
29 static bool msr_mtrr_valid(unsigned msr)
32 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
33 case MSR_MTRRfix64K_00000:
34 case MSR_MTRRfix16K_80000:
35 case MSR_MTRRfix16K_A0000:
36 case MSR_MTRRfix4K_C0000:
37 case MSR_MTRRfix4K_C8000:
38 case MSR_MTRRfix4K_D0000:
39 case MSR_MTRRfix4K_D8000:
40 case MSR_MTRRfix4K_E0000:
41 case MSR_MTRRfix4K_E8000:
42 case MSR_MTRRfix4K_F0000:
43 case MSR_MTRRfix4K_F8000:
53 static bool valid_pat_type(unsigned t)
55 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
58 static bool valid_mtrr_type(unsigned t)
60 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
63 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
68 if (!msr_mtrr_valid(msr))
71 if (msr == MSR_IA32_CR_PAT) {
72 for (i = 0; i < 8; i++)
73 if (!valid_pat_type((data >> (i * 8)) & 0xff))
76 } else if (msr == MSR_MTRRdefType) {
79 return valid_mtrr_type(data & 0xff);
80 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
81 for (i = 0; i < 8 ; i++)
82 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
88 WARN_ON(!(msr >= 0x200 && msr < 0x200 + 2 * KVM_NR_VAR_MTRR));
90 mask = (~0ULL) << cpuid_maxphyaddr(vcpu);
93 if (!valid_mtrr_type(data & 0xff))
100 kvm_inject_gp(vcpu, 0);
106 EXPORT_SYMBOL_GPL(kvm_mtrr_valid);
108 static bool mtrr_is_enabled(struct kvm_mtrr *mtrr_state)
110 return !!(mtrr_state->deftype & IA32_MTRR_DEF_TYPE_E);
113 static bool fixed_mtrr_is_enabled(struct kvm_mtrr *mtrr_state)
115 return !!(mtrr_state->deftype & IA32_MTRR_DEF_TYPE_FE);
118 static u8 mtrr_default_type(struct kvm_mtrr *mtrr_state)
120 return mtrr_state->deftype & IA32_MTRR_DEF_TYPE_TYPE_MASK;
123 static u8 mtrr_disabled_type(void)
126 * Intel SDM 11.11.2.2: all MTRRs are disabled when
127 * IA32_MTRR_DEF_TYPE.E bit is cleared, and the UC
128 * memory type is applied to all of physical memory.
130 return MTRR_TYPE_UNCACHABLE;
134 * Three terms are used in the following code:
135 * - segment, it indicates the address segments covered by fixed MTRRs.
136 * - unit, it corresponds to the MSR entry in the segment.
137 * - range, a range is covered in one memory cache type.
139 struct fixed_mtrr_segment {
145 /* the start position in kvm_mtrr.fixed_ranges[]. */
149 static struct fixed_mtrr_segment fixed_seg_table[] = {
150 /* MSR_MTRRfix64K_00000, 1 unit. 64K fixed mtrr. */
154 .range_shift = 16, /* 64K */
159 * MSR_MTRRfix16K_80000 ... MSR_MTRRfix16K_A0000, 2 units,
165 .range_shift = 14, /* 16K */
170 * MSR_MTRRfix4K_C0000 ... MSR_MTRRfix4K_F8000, 8 units,
176 .range_shift = 12, /* 12K */
182 * The size of unit is covered in one MSR, one MSR entry contains
183 * 8 ranges so that unit size is always 8 * 2^range_shift.
185 static u64 fixed_mtrr_seg_unit_size(int seg)
187 return 8 << fixed_seg_table[seg].range_shift;
190 static bool fixed_msr_to_seg_unit(u32 msr, int *seg, int *unit)
193 case MSR_MTRRfix64K_00000:
197 case MSR_MTRRfix16K_80000 ... MSR_MTRRfix16K_A0000:
199 *unit = msr - MSR_MTRRfix16K_80000;
201 case MSR_MTRRfix4K_C0000 ... MSR_MTRRfix4K_F8000:
203 *unit = msr - MSR_MTRRfix4K_C0000;
212 static void fixed_mtrr_seg_unit_range(int seg, int unit, u64 *start, u64 *end)
214 struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg];
215 u64 unit_size = fixed_mtrr_seg_unit_size(seg);
217 *start = mtrr_seg->start + unit * unit_size;
218 *end = *start + unit_size;
219 WARN_ON(*end > mtrr_seg->end);
222 static int fixed_mtrr_seg_unit_range_index(int seg, int unit)
224 struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg];
226 WARN_ON(mtrr_seg->start + unit * fixed_mtrr_seg_unit_size(seg)
229 /* each unit has 8 ranges. */
230 return mtrr_seg->range_start + 8 * unit;
233 static int fixed_mtrr_seg_end_range_index(int seg)
235 struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg];
238 n = (mtrr_seg->end - mtrr_seg->start) >> mtrr_seg->range_shift;
239 return mtrr_seg->range_start + n - 1;
242 static bool fixed_msr_to_range(u32 msr, u64 *start, u64 *end)
246 if (!fixed_msr_to_seg_unit(msr, &seg, &unit))
249 fixed_mtrr_seg_unit_range(seg, unit, start, end);
253 static int fixed_msr_to_range_index(u32 msr)
257 if (!fixed_msr_to_seg_unit(msr, &seg, &unit))
260 return fixed_mtrr_seg_unit_range_index(seg, unit);
263 static int fixed_mtrr_addr_to_seg(u64 addr)
265 struct fixed_mtrr_segment *mtrr_seg;
266 int seg, seg_num = ARRAY_SIZE(fixed_seg_table);
268 for (seg = 0; seg < seg_num; seg++) {
269 mtrr_seg = &fixed_seg_table[seg];
270 if (mtrr_seg->start >= addr && addr < mtrr_seg->end)
277 static int fixed_mtrr_addr_seg_to_range_index(u64 addr, int seg)
279 struct fixed_mtrr_segment *mtrr_seg;
282 mtrr_seg = &fixed_seg_table[seg];
283 index = mtrr_seg->range_start;
284 index += (addr - mtrr_seg->start) >> mtrr_seg->range_shift;
288 static u64 fixed_mtrr_range_end_addr(int seg, int index)
290 struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg];
291 int pos = index - mtrr_seg->range_start;
293 return mtrr_seg->start + ((pos + 1) << mtrr_seg->range_shift);
296 static void var_mtrr_range(struct kvm_mtrr_range *range, u64 *start, u64 *end)
300 *start = range->base & PAGE_MASK;
302 mask = range->mask & PAGE_MASK;
303 mask |= ~0ULL << boot_cpu_data.x86_phys_bits;
305 /* This cannot overflow because writing to the reserved bits of
306 * variable MTRRs causes a #GP.
308 *end = (*start | ~mask) + 1;
311 static void update_mtrr(struct kvm_vcpu *vcpu, u32 msr)
313 struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state;
317 if (msr == MSR_IA32_CR_PAT || !tdp_enabled ||
318 !kvm_arch_has_noncoherent_dma(vcpu->kvm))
321 if (!mtrr_is_enabled(mtrr_state) && msr != MSR_MTRRdefType)
325 if (fixed_msr_to_range(msr, &start, &end)) {
326 if (!fixed_mtrr_is_enabled(mtrr_state))
328 } else if (msr == MSR_MTRRdefType) {
332 /* variable range MTRRs. */
333 index = (msr - 0x200) / 2;
334 var_mtrr_range(&mtrr_state->var_ranges[index], &start, &end);
337 kvm_zap_gfn_range(vcpu->kvm, gpa_to_gfn(start), gpa_to_gfn(end));
340 static bool var_mtrr_range_is_valid(struct kvm_mtrr_range *range)
342 return (range->mask & (1 << 11)) != 0;
345 static void set_var_mtrr_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
347 struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state;
348 struct kvm_mtrr_range *tmp, *cur;
349 int index, is_mtrr_mask;
351 index = (msr - 0x200) / 2;
352 is_mtrr_mask = msr - 0x200 - 2 * index;
353 cur = &mtrr_state->var_ranges[index];
355 /* remove the entry if it's in the list. */
356 if (var_mtrr_range_is_valid(cur))
357 list_del(&mtrr_state->var_ranges[index].node);
364 /* add it to the list if it's enabled. */
365 if (var_mtrr_range_is_valid(cur)) {
366 list_for_each_entry(tmp, &mtrr_state->head, node)
367 if (cur->base >= tmp->base)
369 list_add_tail(&cur->node, &tmp->node);
373 int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
377 if (!kvm_mtrr_valid(vcpu, msr, data))
380 index = fixed_msr_to_range_index(msr);
382 *(u64 *)&vcpu->arch.mtrr_state.fixed_ranges[index] = data;
383 else if (msr == MSR_MTRRdefType)
384 vcpu->arch.mtrr_state.deftype = data;
385 else if (msr == MSR_IA32_CR_PAT)
386 vcpu->arch.pat = data;
388 set_var_mtrr_msr(vcpu, msr, data);
390 update_mtrr(vcpu, msr);
394 int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
398 /* MSR_MTRRcap is a readonly MSR. */
399 if (msr == MSR_MTRRcap) {
404 * VCNT = KVM_NR_VAR_MTRR
406 *pdata = 0x500 | KVM_NR_VAR_MTRR;
410 if (!msr_mtrr_valid(msr))
413 index = fixed_msr_to_range_index(msr);
415 *pdata = *(u64 *)&vcpu->arch.mtrr_state.fixed_ranges[index];
416 else if (msr == MSR_MTRRdefType)
417 *pdata = vcpu->arch.mtrr_state.deftype;
418 else if (msr == MSR_IA32_CR_PAT)
419 *pdata = vcpu->arch.pat;
420 else { /* Variable MTRRs */
423 index = (msr - 0x200) / 2;
424 is_mtrr_mask = msr - 0x200 - 2 * index;
426 *pdata = vcpu->arch.mtrr_state.var_ranges[index].base;
428 *pdata = vcpu->arch.mtrr_state.var_ranges[index].mask;
434 void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu)
436 INIT_LIST_HEAD(&vcpu->arch.mtrr_state.head);
441 struct kvm_mtrr *mtrr_state;
447 /* mtrr is completely disabled? */
449 /* [start, end) is not fully covered in MTRRs? */
452 /* private fields. */
454 /* used for fixed MTRRs. */
460 /* used for var MTRRs. */
462 struct kvm_mtrr_range *range;
463 /* max address has been covered in var MTRRs. */
471 static bool mtrr_lookup_fixed_start(struct mtrr_iter *iter)
475 if (!fixed_mtrr_is_enabled(iter->mtrr_state))
478 seg = fixed_mtrr_addr_to_seg(iter->start);
483 index = fixed_mtrr_addr_seg_to_range_index(iter->start, seg);
489 static bool match_var_range(struct mtrr_iter *iter,
490 struct kvm_mtrr_range *range)
494 var_mtrr_range(range, &start, &end);
495 if (!(start >= iter->end || end <= iter->start)) {
499 * the function is called when we do kvm_mtrr.head walking.
500 * Range has the minimum base address which interleaves
501 * [looker->start_max, looker->end).
503 iter->partial_map |= iter->start_max < start;
505 /* update the max address has been covered. */
506 iter->start_max = max(iter->start_max, end);
513 static void __mtrr_lookup_var_next(struct mtrr_iter *iter)
515 struct kvm_mtrr *mtrr_state = iter->mtrr_state;
517 list_for_each_entry_continue(iter->range, &mtrr_state->head, node)
518 if (match_var_range(iter, iter->range))
522 iter->partial_map |= iter->start_max < iter->end;
525 static void mtrr_lookup_var_start(struct mtrr_iter *iter)
527 struct kvm_mtrr *mtrr_state = iter->mtrr_state;
530 iter->start_max = iter->start;
531 iter->range = list_prepare_entry(iter->range, &mtrr_state->head, node);
533 __mtrr_lookup_var_next(iter);
536 static void mtrr_lookup_fixed_next(struct mtrr_iter *iter)
538 /* terminate the lookup. */
539 if (fixed_mtrr_range_end_addr(iter->seg, iter->index) >= iter->end) {
547 /* have looked up for all fixed MTRRs. */
548 if (iter->index >= ARRAY_SIZE(iter->mtrr_state->fixed_ranges))
549 return mtrr_lookup_var_start(iter);
551 /* switch to next segment. */
552 if (iter->index > fixed_mtrr_seg_end_range_index(iter->seg))
556 static void mtrr_lookup_var_next(struct mtrr_iter *iter)
558 __mtrr_lookup_var_next(iter);
561 static void mtrr_lookup_start(struct mtrr_iter *iter)
563 if (!mtrr_is_enabled(iter->mtrr_state)) {
564 iter->mtrr_disabled = true;
568 if (!mtrr_lookup_fixed_start(iter))
569 mtrr_lookup_var_start(iter);
572 static void mtrr_lookup_init(struct mtrr_iter *iter,
573 struct kvm_mtrr *mtrr_state, u64 start, u64 end)
575 iter->mtrr_state = mtrr_state;
578 iter->mtrr_disabled = false;
579 iter->partial_map = false;
583 mtrr_lookup_start(iter);
586 static bool mtrr_lookup_okay(struct mtrr_iter *iter)
589 iter->mem_type = iter->mtrr_state->fixed_ranges[iter->index];
594 iter->mem_type = iter->range->base & 0xff;
601 static void mtrr_lookup_next(struct mtrr_iter *iter)
604 mtrr_lookup_fixed_next(iter);
606 mtrr_lookup_var_next(iter);
609 #define mtrr_for_each_mem_type(_iter_, _mtrr_, _gpa_start_, _gpa_end_) \
610 for (mtrr_lookup_init(_iter_, _mtrr_, _gpa_start_, _gpa_end_); \
611 mtrr_lookup_okay(_iter_); mtrr_lookup_next(_iter_))
613 u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
615 struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state;
616 struct mtrr_iter iter;
619 const int wt_wb_mask = (1 << MTRR_TYPE_WRBACK)
620 | (1 << MTRR_TYPE_WRTHROUGH);
622 start = gfn_to_gpa(gfn);
623 end = start + PAGE_SIZE;
625 mtrr_for_each_mem_type(&iter, mtrr_state, start, end) {
626 int curr_type = iter.mem_type;
629 * Please refer to Intel SDM Volume 3: 11.11.4.1 MTRR
639 * If two or more variable memory ranges match and the
640 * memory types are identical, then that memory type is
643 if (type == curr_type)
647 * If two or more variable memory ranges match and one of
648 * the memory types is UC, the UC memory type used.
650 if (curr_type == MTRR_TYPE_UNCACHABLE)
651 return MTRR_TYPE_UNCACHABLE;
654 * If two or more variable memory ranges match and the
655 * memory types are WT and WB, the WT memory type is used.
657 if (((1 << type) & wt_wb_mask) &&
658 ((1 << curr_type) & wt_wb_mask)) {
659 type = MTRR_TYPE_WRTHROUGH;
664 * For overlaps not defined by the above rules, processor
665 * behavior is undefined.
668 /* We use WB for this undefined behavior. :( */
669 return MTRR_TYPE_WRBACK;
672 if (iter.mtrr_disabled)
673 return mtrr_disabled_type();
676 * We just check one page, partially covered by MTRRs is
679 WARN_ON(iter.partial_map);
681 /* not contained in any MTRRs. */
683 return mtrr_default_type(mtrr_state);
687 EXPORT_SYMBOL_GPL(kvm_mtrr_get_guest_memory_type);
689 bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
692 struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state;
693 struct mtrr_iter iter;
697 start = gfn_to_gpa(gfn);
698 end = gfn_to_gpa(gfn + page_num);
699 mtrr_for_each_mem_type(&iter, mtrr_state, start, end) {
701 type = iter.mem_type;
705 if (type != iter.mem_type)
709 if (iter.mtrr_disabled)
712 if (!iter.partial_map)
718 return type == mtrr_default_type(mtrr_state);