arch/x86/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *   Yaniv Kamay  <yaniv@qumranet.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "irq.h"
  19 #include "vmx.h"
  20 #include "segment_descriptor.h"
  21 #include "mmu.h"
  22
  23 #include <linux/kvm_host.h>
  24 #include <linux/module.h>
  25 #include <linux/kernel.h>
  26 #include <linux/mm.h>
  27 #include <linux/highmem.h>
  28 #include <linux/sched.h>
  29 #include <linux/moduleparam.h>
  30
  31 #include <asm/io.h>
  32 #include <asm/desc.h>
  33
  34 MODULE_AUTHOR("Qumranet");
  35 MODULE_LICENSE("GPL");
  36
  37 static int bypass_guest_pf = 1;
  38 module_param(bypass_guest_pf, bool, 0);
  39
  40 static int enable_vpid = 1;
  41 module_param(enable_vpid, bool, 0);
  42
  43 struct vmcs {
  44         u32 revision_id;
  45         u32 abort;
  46         char data[0];
  47 };
  48
  49 struct vcpu_vmx {
  50         struct kvm_vcpu       vcpu;
  51         int                   launched;
  52         u8                    fail;
  53         u32                   idt_vectoring_info;
  54         struct kvm_msr_entry *guest_msrs;
  55         struct kvm_msr_entry *host_msrs;
  56         int                   nmsrs;
  57         int                   save_nmsrs;
  58         int                   msr_offset_efer;
  59 #ifdef CONFIG_X86_64
  60         int                   msr_offset_kernel_gs_base;
  61 #endif
  62         struct vmcs          *vmcs;
  63         struct {
  64                 int           loaded;
  65                 u16           fs_sel, gs_sel, ldt_sel;
  66                 int           gs_ldt_reload_needed;
  67                 int           fs_reload_needed;
  68                 int           guest_efer_loaded;
  69         } host_state;
  70         struct {
  71                 struct {
  72                         bool pending;
  73                         u8 vector;
  74                         unsigned rip;
  75                 } irq;
  76         } rmode;
  77         int vpid;
  78 };
  79
  80 static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
  81 {
  82         return container_of(vcpu, struct vcpu_vmx, vcpu);
  83 }
  84
  85 static int init_rmode_tss(struct kvm *kvm);
  86
  87 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  88 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  89
  90 static struct page *vmx_io_bitmap_a;
  91 static struct page *vmx_io_bitmap_b;
  92
  93 static DECLARE_BITMAP(vmx_vpid_bitmap, VMX_NR_VPIDS);
  94 static DEFINE_SPINLOCK(vmx_vpid_lock);
  95
  96 static struct vmcs_config {
  97         int size;
  98         int order;
  99         u32 revision_id;
 100         u32 pin_based_exec_ctrl;
 101         u32 cpu_based_exec_ctrl;
 102         u32 cpu_based_2nd_exec_ctrl;
 103         u32 vmexit_ctrl;
 104         u32 vmentry_ctrl;
 105 } vmcs_config;
 106
 107 #define VMX_SEGMENT_FIELD(seg)                                  \
 108         [VCPU_SREG_##seg] = {                                   \
 109                 .selector = GUEST_##seg##_SELECTOR,             \
 110                 .base = GUEST_##seg##_BASE,                     \
 111                 .limit = GUEST_##seg##_LIMIT,                   \
 112                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
 113         }
 114
 115 static struct kvm_vmx_segment_field {
 116         unsigned selector;
 117         unsigned base;
 118         unsigned limit;
 119         unsigned ar_bytes;
 120 } kvm_vmx_segment_fields[] = {
 121         VMX_SEGMENT_FIELD(CS),
 122         VMX_SEGMENT_FIELD(DS),
 123         VMX_SEGMENT_FIELD(ES),
 124         VMX_SEGMENT_FIELD(FS),
 125         VMX_SEGMENT_FIELD(GS),
 126         VMX_SEGMENT_FIELD(SS),
 127         VMX_SEGMENT_FIELD(TR),
 128         VMX_SEGMENT_FIELD(LDTR),
 129 };
 130
 131 /*
 132  * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
 133  * away by decrementing the array size.
 134  */
 135 static const u32 vmx_msr_index[] = {
 136 #ifdef CONFIG_X86_64
 137         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
 138 #endif
 139         MSR_EFER, MSR_K6_STAR,
 140 };
 141 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
 142
 143 static void load_msrs(struct kvm_msr_entry *e, int n)
 144 {
 145         int i;
 146
 147         for (i = 0; i < n; ++i)
 148                 wrmsrl(e[i].index, e[i].data);
 149 }
 150
 151 static void save_msrs(struct kvm_msr_entry *e, int n)
 152 {
 153         int i;
 154
 155         for (i = 0; i < n; ++i)
 156                 rdmsrl(e[i].index, e[i].data);
 157 }
 158
 159 static inline int is_page_fault(u32 intr_info)
 160 {
 161         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 162                              INTR_INFO_VALID_MASK)) ==
 163                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
 164 }
 165
 166 static inline int is_no_device(u32 intr_info)
 167 {
 168         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 169                              INTR_INFO_VALID_MASK)) ==
 170                 (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
 171 }
 172
 173 static inline int is_invalid_opcode(u32 intr_info)
 174 {
 175         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 176                              INTR_INFO_VALID_MASK)) ==
 177                 (INTR_TYPE_EXCEPTION | UD_VECTOR | INTR_INFO_VALID_MASK);
 178 }
 179
 180 static inline int is_external_interrupt(u32 intr_info)
 181 {
 182         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
 183                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
 184 }
 185
 186 static inline int cpu_has_vmx_tpr_shadow(void)
 187 {
 188         return (vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW);
 189 }
 190
 191 static inline int vm_need_tpr_shadow(struct kvm *kvm)
 192 {
 193         return ((cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm)));
 194 }
 195
 196 static inline int cpu_has_secondary_exec_ctrls(void)
 197 {
 198         return (vmcs_config.cpu_based_exec_ctrl &
 199                 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS);
 200 }
 201
 202 static inline bool cpu_has_vmx_virtualize_apic_accesses(void)
 203 {
 204         return (vmcs_config.cpu_based_2nd_exec_ctrl &
 205                 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES);
 206 }
 207
 208 static inline int vm_need_virtualize_apic_accesses(struct kvm *kvm)
 209 {
 210         return ((cpu_has_vmx_virtualize_apic_accesses()) &&
 211                 (irqchip_in_kernel(kvm)));
 212 }
 213
 214 static inline int cpu_has_vmx_vpid(void)
 215 {
 216         return (vmcs_config.cpu_based_2nd_exec_ctrl &
 217                 SECONDARY_EXEC_ENABLE_VPID);
 218 }
 219
 220 static int __find_msr_index(struct vcpu_vmx *vmx, u32 msr)
 221 {
 222         int i;
 223
 224         for (i = 0; i < vmx->nmsrs; ++i)
 225                 if (vmx->guest_msrs[i].index == msr)
 226                         return i;
 227         return -1;
 228 }
 229
 230 static inline void __invvpid(int ext, u16 vpid, gva_t gva)
 231 {
 232     struct {
 233         u64 vpid : 16;
 234         u64 rsvd : 48;
 235         u64 gva;
 236     } operand = { vpid, 0, gva };
 237
 238     asm volatile (ASM_VMX_INVVPID
 239                   /* CF==1 or ZF==1 --> rc = -1 */
 240                   "; ja 1f ; ud2 ; 1:"
 241                   : : "a"(&operand), "c"(ext) : "cc", "memory");
 242 }
 243
 244 static struct kvm_msr_entry *find_msr_entry(struct vcpu_vmx *vmx, u32 msr)
 245 {
 246         int i;
 247
 248         i = __find_msr_index(vmx, msr);
 249         if (i >= 0)
 250                 return &vmx->guest_msrs[i];
 251         return NULL;
 252 }
 253
 254 static void vmcs_clear(struct vmcs *vmcs)
 255 {
 256         u64 phys_addr = __pa(vmcs);
 257         u8 error;
 258
 259         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 260                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 261                       : "cc", "memory");
 262         if (error)
 263                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 264                        vmcs, phys_addr);
 265 }
 266
 267 static void __vcpu_clear(void *arg)
 268 {
 269         struct vcpu_vmx *vmx = arg;
 270         int cpu = raw_smp_processor_id();
 271
 272         if (vmx->vcpu.cpu == cpu)
 273                 vmcs_clear(vmx->vmcs);
 274         if (per_cpu(current_vmcs, cpu) == vmx->vmcs)
 275                 per_cpu(current_vmcs, cpu) = NULL;
 276         rdtscll(vmx->vcpu.arch.host_tsc);
 277 }
 278
 279 static void vcpu_clear(struct vcpu_vmx *vmx)
 280 {
 281         if (vmx->vcpu.cpu == -1)
 282                 return;
 283         smp_call_function_single(vmx->vcpu.cpu, __vcpu_clear, vmx, 0, 1);
 284         vmx->launched = 0;
 285 }
 286
 287 static inline void vpid_sync_vcpu_all(struct vcpu_vmx *vmx)
 288 {
 289         if (vmx->vpid == 0)
 290                 return;
 291
 292         __invvpid(VMX_VPID_EXTENT_SINGLE_CONTEXT, vmx->vpid, 0);
 293 }
 294
 295 static unsigned long vmcs_readl(unsigned long field)
 296 {
 297         unsigned long value;
 298
 299         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 300                       : "=a"(value) : "d"(field) : "cc");
 301         return value;
 302 }
 303
 304 static u16 vmcs_read16(unsigned long field)
 305 {
 306         return vmcs_readl(field);
 307 }
 308
 309 static u32 vmcs_read32(unsigned long field)
 310 {
 311         return vmcs_readl(field);
 312 }
 313
 314 static u64 vmcs_read64(unsigned long field)
 315 {
 316 #ifdef CONFIG_X86_64
 317         return vmcs_readl(field);
 318 #else
 319         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 320 #endif
 321 }
 322
 323 static noinline void vmwrite_error(unsigned long field, unsigned long value)
 324 {
 325         printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 326                field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 327         dump_stack();
 328 }
 329
 330 static void vmcs_writel(unsigned long field, unsigned long value)
 331 {
 332         u8 error;
 333
 334         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 335                        : "=q"(error) : "a"(value), "d"(field) : "cc");
 336         if (unlikely(error))
 337                 vmwrite_error(field, value);
 338 }
 339
 340 static void vmcs_write16(unsigned long field, u16 value)
 341 {
 342         vmcs_writel(field, value);
 343 }
 344
 345 static void vmcs_write32(unsigned long field, u32 value)
 346 {
 347         vmcs_writel(field, value);
 348 }
 349
 350 static void vmcs_write64(unsigned long field, u64 value)
 351 {
 352 #ifdef CONFIG_X86_64
 353         vmcs_writel(field, value);
 354 #else
 355         vmcs_writel(field, value);
 356         asm volatile ("");
 357         vmcs_writel(field+1, value >> 32);
 358 #endif
 359 }
 360
 361 static void vmcs_clear_bits(unsigned long field, u32 mask)
 362 {
 363         vmcs_writel(field, vmcs_readl(field) & ~mask);
 364 }
 365
 366 static void vmcs_set_bits(unsigned long field, u32 mask)
 367 {
 368         vmcs_writel(field, vmcs_readl(field) | mask);
 369 }
 370
 371 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 372 {
 373         u32 eb;
 374
 375         eb = (1u << PF_VECTOR) | (1u << UD_VECTOR);
 376         if (!vcpu->fpu_active)
 377                 eb |= 1u << NM_VECTOR;
 378         if (vcpu->guest_debug.enabled)
 379                 eb |= 1u << 1;
 380         if (vcpu->arch.rmode.active)
 381                 eb = ~0;
 382         vmcs_write32(EXCEPTION_BITMAP, eb);
 383 }
 384
 385 static void reload_tss(void)
 386 {
 387         /*
 388          * VT restores TR but not its size.  Useless.
 389          */
 390         struct descriptor_table gdt;
 391         struct segment_descriptor *descs;
 392
 393         get_gdt(&gdt);
 394         descs = (void *)gdt.base;
 395         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 396         load_TR_desc();
 397 }
 398
 399 static void load_transition_efer(struct vcpu_vmx *vmx)
 400 {
 401         int efer_offset = vmx->msr_offset_efer;
 402         u64 host_efer = vmx->host_msrs[efer_offset].data;
 403         u64 guest_efer = vmx->guest_msrs[efer_offset].data;
 404         u64 ignore_bits;
 405
 406         if (efer_offset < 0)
 407                 return;
 408         /*
 409          * NX is emulated; LMA and LME handled by hardware; SCE meaninless
 410          * outside long mode
 411          */
 412         ignore_bits = EFER_NX | EFER_SCE;
 413 #ifdef CONFIG_X86_64
 414         ignore_bits |= EFER_LMA | EFER_LME;
 415         /* SCE is meaningful only in long mode on Intel */
 416         if (guest_efer & EFER_LMA)
 417                 ignore_bits &= ~(u64)EFER_SCE;
 418 #endif
 419         if ((guest_efer & ~ignore_bits) == (host_efer & ~ignore_bits))
 420                 return;
 421
 422         vmx->host_state.guest_efer_loaded = 1;
 423         guest_efer &= ~ignore_bits;
 424         guest_efer |= host_efer & ignore_bits;
 425         wrmsrl(MSR_EFER, guest_efer);
 426         vmx->vcpu.stat.efer_reload++;
 427 }
 428
 429 static void reload_host_efer(struct vcpu_vmx *vmx)
 430 {
 431         if (vmx->host_state.guest_efer_loaded) {
 432                 vmx->host_state.guest_efer_loaded = 0;
 433                 load_msrs(vmx->host_msrs + vmx->msr_offset_efer, 1);
 434         }
 435 }
 436
 437 static void vmx_save_host_state(struct kvm_vcpu *vcpu)
 438 {
 439         struct vcpu_vmx *vmx = to_vmx(vcpu);
 440
 441         if (vmx->host_state.loaded)
 442                 return;
 443
 444         vmx->host_state.loaded = 1;
 445         /*
 446          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
 447          * allow segment selectors with cpl > 0 or ti == 1.
 448          */
 449         vmx->host_state.ldt_sel = read_ldt();
 450         vmx->host_state.gs_ldt_reload_needed = vmx->host_state.ldt_sel;
 451         vmx->host_state.fs_sel = read_fs();
 452         if (!(vmx->host_state.fs_sel & 7)) {
 453                 vmcs_write16(HOST_FS_SELECTOR, vmx->host_state.fs_sel);
 454                 vmx->host_state.fs_reload_needed = 0;
 455         } else {
 456                 vmcs_write16(HOST_FS_SELECTOR, 0);
 457                 vmx->host_state.fs_reload_needed = 1;
 458         }
 459         vmx->host_state.gs_sel = read_gs();
 460         if (!(vmx->host_state.gs_sel & 7))
 461                 vmcs_write16(HOST_GS_SELECTOR, vmx->host_state.gs_sel);
 462         else {
 463                 vmcs_write16(HOST_GS_SELECTOR, 0);
 464                 vmx->host_state.gs_ldt_reload_needed = 1;
 465         }
 466
 467 #ifdef CONFIG_X86_64
 468         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
 469         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
 470 #else
 471         vmcs_writel(HOST_FS_BASE, segment_base(vmx->host_state.fs_sel));
 472         vmcs_writel(HOST_GS_BASE, segment_base(vmx->host_state.gs_sel));
 473 #endif
 474
 475 #ifdef CONFIG_X86_64
 476         if (is_long_mode(&vmx->vcpu))
 477                 save_msrs(vmx->host_msrs +
 478                           vmx->msr_offset_kernel_gs_base, 1);
 479
 480 #endif
 481         load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 482         load_transition_efer(vmx);
 483 }
 484
 485 static void vmx_load_host_state(struct vcpu_vmx *vmx)
 486 {
 487         unsigned long flags;
 488
 489         if (!vmx->host_state.loaded)
 490                 return;
 491
 492         ++vmx->vcpu.stat.host_state_reload;
 493         vmx->host_state.loaded = 0;
 494         if (vmx->host_state.fs_reload_needed)
 495                 load_fs(vmx->host_state.fs_sel);
 496         if (vmx->host_state.gs_ldt_reload_needed) {
 497                 load_ldt(vmx->host_state.ldt_sel);
 498                 /*
 499                  * If we have to reload gs, we must take care to
 500                  * preserve our gs base.
 501                  */
 502                 local_irq_save(flags);
 503                 load_gs(vmx->host_state.gs_sel);
 504 #ifdef CONFIG_X86_64
 505                 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
 506 #endif
 507                 local_irq_restore(flags);
 508         }
 509         reload_tss();
 510         save_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 511         load_msrs(vmx->host_msrs, vmx->save_nmsrs);
 512         reload_host_efer(vmx);
 513 }
 514
 515 /*
 516  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 517  * vcpu mutex is already taken.
 518  */
 519 static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 520 {
 521         struct vcpu_vmx *vmx = to_vmx(vcpu);
 522         u64 phys_addr = __pa(vmx->vmcs);
 523         u64 tsc_this, delta;
 524
 525         if (vcpu->cpu != cpu) {
 526                 vcpu_clear(vmx);
 527                 kvm_migrate_apic_timer(vcpu);
 528                 vpid_sync_vcpu_all(vmx);
 529         }
 530
 531         if (per_cpu(current_vmcs, cpu) != vmx->vmcs) {
 532                 u8 error;
 533
 534                 per_cpu(current_vmcs, cpu) = vmx->vmcs;
 535                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 536                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 537                               : "cc");
 538                 if (error)
 539                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 540                                vmx->vmcs, phys_addr);
 541         }
 542
 543         if (vcpu->cpu != cpu) {
 544                 struct descriptor_table dt;
 545                 unsigned long sysenter_esp;
 546
 547                 vcpu->cpu = cpu;
 548                 /*
 549                  * Linux uses per-cpu TSS and GDT, so set these when switching
 550                  * processors.
 551                  */
 552                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 553                 get_gdt(&dt);
 554                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 555
 556                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 557                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 558
 559                 /*
 560                  * Make sure the time stamp counter is monotonous.
 561                  */
 562                 rdtscll(tsc_this);
 563                 delta = vcpu->arch.host_tsc - tsc_this;
 564                 vmcs_write64(TSC_OFFSET, vmcs_read64(TSC_OFFSET) + delta);
 565         }
 566 }
 567
 568 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 569 {
 570         vmx_load_host_state(to_vmx(vcpu));
 571 }
 572
 573 static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
 574 {
 575         if (vcpu->fpu_active)
 576                 return;
 577         vcpu->fpu_active = 1;
 578         vmcs_clear_bits(GUEST_CR0, X86_CR0_TS);
 579         if (vcpu->arch.cr0 & X86_CR0_TS)
 580                 vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
 581         update_exception_bitmap(vcpu);
 582 }
 583
 584 static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
 585 {
 586         if (!vcpu->fpu_active)
 587                 return;
 588         vcpu->fpu_active = 0;
 589         vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
 590         update_exception_bitmap(vcpu);
 591 }
 592
 593 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
 594 {
 595         vcpu_clear(to_vmx(vcpu));
 596 }
 597
 598 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 599 {
 600         return vmcs_readl(GUEST_RFLAGS);
 601 }
 602
 603 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 604 {
 605         if (vcpu->arch.rmode.active)
 606                 rflags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
 607         vmcs_writel(GUEST_RFLAGS, rflags);
 608 }
 609
 610 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 611 {
 612         unsigned long rip;
 613         u32 interruptibility;
 614
 615         rip = vmcs_readl(GUEST_RIP);
 616         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 617         vmcs_writel(GUEST_RIP, rip);
 618
 619         /*
 620          * We emulated an instruction, so temporary interrupt blocking
 621          * should be removed, if set.
 622          */
 623         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 624         if (interruptibility & 3)
 625                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 626                              interruptibility & ~3);
 627         vcpu->arch.interrupt_window_open = 1;
 628 }
 629
 630 static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
 631                                 bool has_error_code, u32 error_code)
 632 {
 633         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 634                      nr | INTR_TYPE_EXCEPTION
 635                      | (has_error_code ? INTR_INFO_DELIEVER_CODE_MASK : 0)
 636                      | INTR_INFO_VALID_MASK);
 637         if (has_error_code)
 638                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 639 }
 640
 641 static bool vmx_exception_injected(struct kvm_vcpu *vcpu)
 642 {
 643         struct vcpu_vmx *vmx = to_vmx(vcpu);
 644
 645         return !(vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK);
 646 }
 647
 648 /*
 649  * Swap MSR entry in host/guest MSR entry array.
 650  */
 651 #ifdef CONFIG_X86_64
 652 static void move_msr_up(struct vcpu_vmx *vmx, int from, int to)
 653 {
 654         struct kvm_msr_entry tmp;
 655
 656         tmp = vmx->guest_msrs[to];
 657         vmx->guest_msrs[to] = vmx->guest_msrs[from];
 658         vmx->guest_msrs[from] = tmp;
 659         tmp = vmx->host_msrs[to];
 660         vmx->host_msrs[to] = vmx->host_msrs[from];
 661         vmx->host_msrs[from] = tmp;
 662 }
 663 #endif
 664
 665 /*
 666  * Set up the vmcs to automatically save and restore system
 667  * msrs.  Don't touch the 64-bit msrs if the guest is in legacy
 668  * mode, as fiddling with msrs is very expensive.
 669  */
 670 static void setup_msrs(struct vcpu_vmx *vmx)
 671 {
 672         int save_nmsrs;
 673
 674         vmx_load_host_state(vmx);
 675         save_nmsrs = 0;
 676 #ifdef CONFIG_X86_64
 677         if (is_long_mode(&vmx->vcpu)) {
 678                 int index;
 679
 680                 index = __find_msr_index(vmx, MSR_SYSCALL_MASK);
 681                 if (index >= 0)
 682                         move_msr_up(vmx, index, save_nmsrs++);
 683                 index = __find_msr_index(vmx, MSR_LSTAR);
 684                 if (index >= 0)
 685                         move_msr_up(vmx, index, save_nmsrs++);
 686                 index = __find_msr_index(vmx, MSR_CSTAR);
 687                 if (index >= 0)
 688                         move_msr_up(vmx, index, save_nmsrs++);
 689                 index = __find_msr_index(vmx, MSR_KERNEL_GS_BASE);
 690                 if (index >= 0)
 691                         move_msr_up(vmx, index, save_nmsrs++);
 692                 /*
 693                  * MSR_K6_STAR is only needed on long mode guests, and only
 694                  * if efer.sce is enabled.
 695                  */
 696                 index = __find_msr_index(vmx, MSR_K6_STAR);
 697                 if ((index >= 0) && (vmx->vcpu.arch.shadow_efer & EFER_SCE))
 698                         move_msr_up(vmx, index, save_nmsrs++);
 699         }
 700 #endif
 701         vmx->save_nmsrs = save_nmsrs;
 702
 703 #ifdef CONFIG_X86_64
 704         vmx->msr_offset_kernel_gs_base =
 705                 __find_msr_index(vmx, MSR_KERNEL_GS_BASE);
 706 #endif
 707         vmx->msr_offset_efer = __find_msr_index(vmx, MSR_EFER);
 708 }
 709
 710 /*
 711  * reads and returns guest's timestamp counter "register"
 712  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 713  */
 714 static u64 guest_read_tsc(void)
 715 {
 716         u64 host_tsc, tsc_offset;
 717
 718         rdtscll(host_tsc);
 719         tsc_offset = vmcs_read64(TSC_OFFSET);
 720         return host_tsc + tsc_offset;
 721 }
 722
 723 /*
 724  * writes 'guest_tsc' into guest's timestamp counter "register"
 725  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 726  */
 727 static void guest_write_tsc(u64 guest_tsc)
 728 {
 729         u64 host_tsc;
 730
 731         rdtscll(host_tsc);
 732         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 733 }
 734
 735 /*
 736  * Reads an msr value (of 'msr_index') into 'pdata'.
 737  * Returns 0 on success, non-0 otherwise.
 738  * Assumes vcpu_load() was already called.
 739  */
 740 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 741 {
 742         u64 data;
 743         struct kvm_msr_entry *msr;
 744
 745         if (!pdata) {
 746                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 747                 return -EINVAL;
 748         }
 749
 750         switch (msr_index) {
 751 #ifdef CONFIG_X86_64
 752         case MSR_FS_BASE:
 753                 data = vmcs_readl(GUEST_FS_BASE);
 754                 break;
 755         case MSR_GS_BASE:
 756                 data = vmcs_readl(GUEST_GS_BASE);
 757                 break;
 758         case MSR_EFER:
 759                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 760 #endif
 761         case MSR_IA32_TIME_STAMP_COUNTER:
 762                 data = guest_read_tsc();
 763                 break;
 764         case MSR_IA32_SYSENTER_CS:
 765                 data = vmcs_read32(GUEST_SYSENTER_CS);
 766                 break;
 767         case MSR_IA32_SYSENTER_EIP:
 768                 data = vmcs_readl(GUEST_SYSENTER_EIP);
 769                 break;
 770         case MSR_IA32_SYSENTER_ESP:
 771                 data = vmcs_readl(GUEST_SYSENTER_ESP);
 772                 break;
 773         default:
 774                 msr = find_msr_entry(to_vmx(vcpu), msr_index);
 775                 if (msr) {
 776                         data = msr->data;
 777                         break;
 778                 }
 779                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 780         }
 781
 782         *pdata = data;
 783         return 0;
 784 }
 785
 786 /*
 787  * Writes msr value into into the appropriate "register".
 788  * Returns 0 on success, non-0 otherwise.
 789  * Assumes vcpu_load() was already called.
 790  */
 791 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 792 {
 793         struct vcpu_vmx *vmx = to_vmx(vcpu);
 794         struct kvm_msr_entry *msr;
 795         int ret = 0;
 796
 797         switch (msr_index) {
 798 #ifdef CONFIG_X86_64
 799         case MSR_EFER:
 800                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 801                 if (vmx->host_state.loaded) {
 802                         reload_host_efer(vmx);
 803                         load_transition_efer(vmx);
 804                 }
 805                 break;
 806         case MSR_FS_BASE:
 807                 vmcs_writel(GUEST_FS_BASE, data);
 808                 break;
 809         case MSR_GS_BASE:
 810                 vmcs_writel(GUEST_GS_BASE, data);
 811                 break;
 812 #endif
 813         case MSR_IA32_SYSENTER_CS:
 814                 vmcs_write32(GUEST_SYSENTER_CS, data);
 815                 break;
 816         case MSR_IA32_SYSENTER_EIP:
 817                 vmcs_writel(GUEST_SYSENTER_EIP, data);
 818                 break;
 819         case MSR_IA32_SYSENTER_ESP:
 820                 vmcs_writel(GUEST_SYSENTER_ESP, data);
 821                 break;
 822         case MSR_IA32_TIME_STAMP_COUNTER:
 823                 guest_write_tsc(data);
 824                 break;
 825         default:
 826                 msr = find_msr_entry(vmx, msr_index);
 827                 if (msr) {
 828                         msr->data = data;
 829                         if (vmx->host_state.loaded)
 830                                 load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 831                         break;
 832                 }
 833                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 834         }
 835
 836         return ret;
 837 }
 838
 839 /*
 840  * Sync the rsp and rip registers into the vcpu structure.  This allows
 841  * registers to be accessed by indexing vcpu->arch.regs.
 842  */
 843 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 844 {
 845         vcpu->arch.regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 846         vcpu->arch.rip = vmcs_readl(GUEST_RIP);
 847 }
 848
 849 /*
 850  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 851  * modification.
 852  */
 853 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 854 {
 855         vmcs_writel(GUEST_RSP, vcpu->arch.regs[VCPU_REGS_RSP]);
 856         vmcs_writel(GUEST_RIP, vcpu->arch.rip);
 857 }
 858
 859 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 860 {
 861         unsigned long dr7 = 0x400;
 862         int old_singlestep;
 863
 864         old_singlestep = vcpu->guest_debug.singlestep;
 865
 866         vcpu->guest_debug.enabled = dbg->enabled;
 867         if (vcpu->guest_debug.enabled) {
 868                 int i;
 869
 870                 dr7 |= 0x200;  /* exact */
 871                 for (i = 0; i < 4; ++i) {
 872                         if (!dbg->breakpoints[i].enabled)
 873                                 continue;
 874                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 875                         dr7 |= 2 << (i*2);    /* global enable */
 876                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 877                 }
 878
 879                 vcpu->guest_debug.singlestep = dbg->singlestep;
 880         } else
 881                 vcpu->guest_debug.singlestep = 0;
 882
 883         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 884                 unsigned long flags;
 885
 886                 flags = vmcs_readl(GUEST_RFLAGS);
 887                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 888                 vmcs_writel(GUEST_RFLAGS, flags);
 889         }
 890
 891         update_exception_bitmap(vcpu);
 892         vmcs_writel(GUEST_DR7, dr7);
 893
 894         return 0;
 895 }
 896
 897 static int vmx_get_irq(struct kvm_vcpu *vcpu)
 898 {
 899         struct vcpu_vmx *vmx = to_vmx(vcpu);
 900         u32 idtv_info_field;
 901
 902         idtv_info_field = vmx->idt_vectoring_info;
 903         if (idtv_info_field & INTR_INFO_VALID_MASK) {
 904                 if (is_external_interrupt(idtv_info_field))
 905                         return idtv_info_field & VECTORING_INFO_VECTOR_MASK;
 906                 else
 907                         printk(KERN_DEBUG "pending exception: not handled yet\n");
 908         }
 909         return -1;
 910 }
 911
 912 static __init int cpu_has_kvm_support(void)
 913 {
 914         unsigned long ecx = cpuid_ecx(1);
 915         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 916 }
 917
 918 static __init int vmx_disabled_by_bios(void)
 919 {
 920         u64 msr;
 921
 922         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 923         return (msr & (MSR_IA32_FEATURE_CONTROL_LOCKED |
 924                        MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 925             == MSR_IA32_FEATURE_CONTROL_LOCKED;
 926         /* locked but not enabled */
 927 }
 928
 929 static void hardware_enable(void *garbage)
 930 {
 931         int cpu = raw_smp_processor_id();
 932         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 933         u64 old;
 934
 935         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 936         if ((old & (MSR_IA32_FEATURE_CONTROL_LOCKED |
 937                     MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 938             != (MSR_IA32_FEATURE_CONTROL_LOCKED |
 939                 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 940                 /* enable and lock */
 941                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old |
 942                        MSR_IA32_FEATURE_CONTROL_LOCKED |
 943                        MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED);
 944         write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */
 945         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 946                       : "memory", "cc");
 947 }
 948
 949 static void hardware_disable(void *garbage)
 950 {
 951         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 952 }
 953
 954 static __init int adjust_vmx_controls(u32 ctl_min, u32 ctl_opt,
 955                                       u32 msr, u32 *result)
 956 {
 957         u32 vmx_msr_low, vmx_msr_high;
 958         u32 ctl = ctl_min | ctl_opt;
 959
 960         rdmsr(msr, vmx_msr_low, vmx_msr_high);
 961
 962         ctl &= vmx_msr_high; /* bit == 0 in high word ==> must be zero */
 963         ctl |= vmx_msr_low;  /* bit == 1 in low word  ==> must be one  */
 964
 965         /* Ensure minimum (required) set of control bits are supported. */
 966         if (ctl_min & ~ctl)
 967                 return -EIO;
 968
 969         *result = ctl;
 970         return 0;
 971 }
 972
 973 static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
 974 {
 975         u32 vmx_msr_low, vmx_msr_high;
 976         u32 min, opt;
 977         u32 _pin_based_exec_control = 0;
 978         u32 _cpu_based_exec_control = 0;
 979         u32 _cpu_based_2nd_exec_control = 0;
 980         u32 _vmexit_control = 0;
 981         u32 _vmentry_control = 0;
 982
 983         min = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING;
 984         opt = 0;
 985         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PINBASED_CTLS,
 986                                 &_pin_based_exec_control) < 0)
 987                 return -EIO;
 988
 989         min = CPU_BASED_HLT_EXITING |
 990 #ifdef CONFIG_X86_64
 991               CPU_BASED_CR8_LOAD_EXITING |
 992               CPU_BASED_CR8_STORE_EXITING |
 993 #endif
 994               CPU_BASED_USE_IO_BITMAPS |
 995               CPU_BASED_MOV_DR_EXITING |
 996               CPU_BASED_USE_TSC_OFFSETING;
 997         opt = CPU_BASED_TPR_SHADOW |
 998               CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
 999         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PROCBASED_CTLS,
1000                                 &_cpu_based_exec_control) < 0)
1001                 return -EIO;
1002 #ifdef CONFIG_X86_64
1003         if ((_cpu_based_exec_control & CPU_BASED_TPR_SHADOW))
1004                 _cpu_based_exec_control &= ~CPU_BASED_CR8_LOAD_EXITING &
1005                                            ~CPU_BASED_CR8_STORE_EXITING;
1006 #endif
1007         if (_cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS) {
1008                 min = 0;
1009                 opt = SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES |
1010                         SECONDARY_EXEC_WBINVD_EXITING |
1011                         SECONDARY_EXEC_ENABLE_VPID;
1012                 if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PROCBASED_CTLS2,
1013                                         &_cpu_based_2nd_exec_control) < 0)
1014                         return -EIO;
1015         }
1016 #ifndef CONFIG_X86_64
1017         if (!(_cpu_based_2nd_exec_control &
1018                                 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES))
1019                 _cpu_based_exec_control &= ~CPU_BASED_TPR_SHADOW;
1020 #endif
1021
1022         min = 0;
1023 #ifdef CONFIG_X86_64
1024         min |= VM_EXIT_HOST_ADDR_SPACE_SIZE;
1025 #endif
1026         opt = 0;
1027         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_EXIT_CTLS,
1028                                 &_vmexit_control) < 0)
1029                 return -EIO;
1030
1031         min = opt = 0;
1032         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_ENTRY_CTLS,
1033                                 &_vmentry_control) < 0)
1034                 return -EIO;
1035
1036         rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
1037
1038         /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
1039         if ((vmx_msr_high & 0x1fff) > PAGE_SIZE)
1040                 return -EIO;
1041
1042 #ifdef CONFIG_X86_64
1043         /* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
1044         if (vmx_msr_high & (1u<<16))
1045                 return -EIO;
1046 #endif
1047
1048         /* Require Write-Back (WB) memory type for VMCS accesses. */
1049         if (((vmx_msr_high >> 18) & 15) != 6)
1050                 return -EIO;
1051
1052         vmcs_conf->size = vmx_msr_high & 0x1fff;
1053         vmcs_conf->order = get_order(vmcs_config.size);
1054         vmcs_conf->revision_id = vmx_msr_low;
1055
1056         vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control;
1057         vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control;
1058         vmcs_conf->cpu_based_2nd_exec_ctrl = _cpu_based_2nd_exec_control;
1059         vmcs_conf->vmexit_ctrl         = _vmexit_control;
1060         vmcs_conf->vmentry_ctrl        = _vmentry_control;
1061
1062         return 0;
1063 }
1064
1065 static struct vmcs *alloc_vmcs_cpu(int cpu)
1066 {
1067         int node = cpu_to_node(cpu);
1068         struct page *pages;
1069         struct vmcs *vmcs;
1070
1071         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_config.order);
1072         if (!pages)
1073                 return NULL;
1074         vmcs = page_address(pages);
1075         memset(vmcs, 0, vmcs_config.size);
1076         vmcs->revision_id = vmcs_config.revision_id; /* vmcs revision id */
1077         return vmcs;
1078 }
1079
1080 static struct vmcs *alloc_vmcs(void)
1081 {
1082         return alloc_vmcs_cpu(raw_smp_processor_id());
1083 }
1084
1085 static void free_vmcs(struct vmcs *vmcs)
1086 {
1087         free_pages((unsigned long)vmcs, vmcs_config.order);
1088 }
1089
1090 static void free_kvm_area(void)
1091 {
1092         int cpu;
1093
1094         for_each_online_cpu(cpu)
1095                 free_vmcs(per_cpu(vmxarea, cpu));
1096 }
1097
1098 static __init int alloc_kvm_area(void)
1099 {
1100         int cpu;
1101
1102         for_each_online_cpu(cpu) {
1103                 struct vmcs *vmcs;
1104
1105                 vmcs = alloc_vmcs_cpu(cpu);
1106                 if (!vmcs) {
1107                         free_kvm_area();
1108                         return -ENOMEM;
1109                 }
1110
1111                 per_cpu(vmxarea, cpu) = vmcs;
1112         }
1113         return 0;
1114 }
1115
1116 static __init int hardware_setup(void)
1117 {
1118         if (setup_vmcs_config(&vmcs_config) < 0)
1119                 return -EIO;
1120
1121         if (boot_cpu_has(X86_FEATURE_NX))
1122                 kvm_enable_efer_bits(EFER_NX);
1123
1124         return alloc_kvm_area();
1125 }
1126
1127 static __exit void hardware_unsetup(void)
1128 {
1129         free_kvm_area();
1130 }
1131
1132 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
1133 {
1134         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1135
1136         if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
1137                 vmcs_write16(sf->selector, save->selector);
1138                 vmcs_writel(sf->base, save->base);
1139                 vmcs_write32(sf->limit, save->limit);
1140                 vmcs_write32(sf->ar_bytes, save->ar);
1141         } else {
1142                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
1143                         << AR_DPL_SHIFT;
1144                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
1145         }
1146 }
1147
1148 static void enter_pmode(struct kvm_vcpu *vcpu)
1149 {
1150         unsigned long flags;
1151
1152         vcpu->arch.rmode.active = 0;
1153
1154         vmcs_writel(GUEST_TR_BASE, vcpu->arch.rmode.tr.base);
1155         vmcs_write32(GUEST_TR_LIMIT, vcpu->arch.rmode.tr.limit);
1156         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->arch.rmode.tr.ar);
1157
1158         flags = vmcs_readl(GUEST_RFLAGS);
1159         flags &= ~(X86_EFLAGS_IOPL | X86_EFLAGS_VM);
1160         flags |= (vcpu->arch.rmode.save_iopl << IOPL_SHIFT);
1161         vmcs_writel(GUEST_RFLAGS, flags);
1162
1163         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~X86_CR4_VME) |
1164                         (vmcs_readl(CR4_READ_SHADOW) & X86_CR4_VME));
1165
1166         update_exception_bitmap(vcpu);
1167
1168         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->arch.rmode.es);
1169         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->arch.rmode.ds);
1170         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->arch.rmode.gs);
1171         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->arch.rmode.fs);
1172
1173         vmcs_write16(GUEST_SS_SELECTOR, 0);
1174         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
1175
1176         vmcs_write16(GUEST_CS_SELECTOR,
1177                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
1178         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1179 }
1180
1181 static gva_t rmode_tss_base(struct kvm *kvm)
1182 {
1183         if (!kvm->arch.tss_addr) {
1184                 gfn_t base_gfn = kvm->memslots[0].base_gfn +
1185                                  kvm->memslots[0].npages - 3;
1186                 return base_gfn << PAGE_SHIFT;
1187         }
1188         return kvm->arch.tss_addr;
1189 }
1190
1191 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
1192 {
1193         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1194
1195         save->selector = vmcs_read16(sf->selector);
1196         save->base = vmcs_readl(sf->base);
1197         save->limit = vmcs_read32(sf->limit);
1198         save->ar = vmcs_read32(sf->ar_bytes);
1199         vmcs_write16(sf->selector, save->base >> 4);
1200         vmcs_write32(sf->base, save->base & 0xfffff);
1201         vmcs_write32(sf->limit, 0xffff);
1202         vmcs_write32(sf->ar_bytes, 0xf3);
1203 }
1204
1205 static void enter_rmode(struct kvm_vcpu *vcpu)
1206 {
1207         unsigned long flags;
1208
1209         vcpu->arch.rmode.active = 1;
1210
1211         vcpu->arch.rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
1212         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
1213
1214         vcpu->arch.rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
1215         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
1216
1217         vcpu->arch.rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
1218         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1219
1220         flags = vmcs_readl(GUEST_RFLAGS);
1221         vcpu->arch.rmode.save_iopl
1222                 = (flags & X86_EFLAGS_IOPL) >> IOPL_SHIFT;
1223
1224         flags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
1225
1226         vmcs_writel(GUEST_RFLAGS, flags);
1227         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | X86_CR4_VME);
1228         update_exception_bitmap(vcpu);
1229
1230         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
1231         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
1232         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
1233
1234         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
1235         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1236         if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
1237                 vmcs_writel(GUEST_CS_BASE, 0xf0000);
1238         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
1239
1240         fix_rmode_seg(VCPU_SREG_ES, &vcpu->arch.rmode.es);
1241         fix_rmode_seg(VCPU_SREG_DS, &vcpu->arch.rmode.ds);
1242         fix_rmode_seg(VCPU_SREG_GS, &vcpu->arch.rmode.gs);
1243         fix_rmode_seg(VCPU_SREG_FS, &vcpu->arch.rmode.fs);
1244
1245         kvm_mmu_reset_context(vcpu);
1246         init_rmode_tss(vcpu->kvm);
1247 }
1248
1249 #ifdef CONFIG_X86_64
1250
1251 static void enter_lmode(struct kvm_vcpu *vcpu)
1252 {
1253         u32 guest_tr_ar;
1254
1255         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
1256         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
1257                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
1258                        __FUNCTION__);
1259                 vmcs_write32(GUEST_TR_AR_BYTES,
1260                              (guest_tr_ar & ~AR_TYPE_MASK)
1261                              | AR_TYPE_BUSY_64_TSS);
1262         }
1263
1264         vcpu->arch.shadow_efer |= EFER_LMA;
1265
1266         find_msr_entry(to_vmx(vcpu), MSR_EFER)->data |= EFER_LMA | EFER_LME;
1267         vmcs_write32(VM_ENTRY_CONTROLS,
1268                      vmcs_read32(VM_ENTRY_CONTROLS)
1269                      | VM_ENTRY_IA32E_MODE);
1270 }
1271
1272 static void exit_lmode(struct kvm_vcpu *vcpu)
1273 {
1274         vcpu->arch.shadow_efer &= ~EFER_LMA;
1275
1276         vmcs_write32(VM_ENTRY_CONTROLS,
1277                      vmcs_read32(VM_ENTRY_CONTROLS)
1278                      & ~VM_ENTRY_IA32E_MODE);
1279 }
1280
1281 #endif
1282
1283 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
1284 {
1285         vpid_sync_vcpu_all(to_vmx(vcpu));
1286 }
1287
1288 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
1289 {
1290         vcpu->arch.cr4 &= KVM_GUEST_CR4_MASK;
1291         vcpu->arch.cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
1292 }
1293
1294 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
1295 {
1296         vmx_fpu_deactivate(vcpu);
1297
1298         if (vcpu->arch.rmode.active && (cr0 & X86_CR0_PE))
1299                 enter_pmode(vcpu);
1300
1301         if (!vcpu->arch.rmode.active && !(cr0 & X86_CR0_PE))
1302                 enter_rmode(vcpu);
1303
1304 #ifdef CONFIG_X86_64
1305         if (vcpu->arch.shadow_efer & EFER_LME) {
1306                 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG))
1307                         enter_lmode(vcpu);
1308                 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG))
1309                         exit_lmode(vcpu);
1310         }
1311 #endif
1312
1313         vmcs_writel(CR0_READ_SHADOW, cr0);
1314         vmcs_writel(GUEST_CR0,
1315                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
1316         vcpu->arch.cr0 = cr0;
1317
1318         if (!(cr0 & X86_CR0_TS) || !(cr0 & X86_CR0_PE))
1319                 vmx_fpu_activate(vcpu);
1320 }
1321
1322 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1323 {
1324         vmx_flush_tlb(vcpu);
1325         vmcs_writel(GUEST_CR3, cr3);
1326         if (vcpu->arch.cr0 & X86_CR0_PE)
1327                 vmx_fpu_deactivate(vcpu);
1328 }
1329
1330 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1331 {
1332         vmcs_writel(CR4_READ_SHADOW, cr4);
1333         vmcs_writel(GUEST_CR4, cr4 | (vcpu->arch.rmode.active ?
1334                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
1335         vcpu->arch.cr4 = cr4;
1336 }
1337
1338 #ifdef CONFIG_X86_64
1339
1340 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
1341 {
1342         struct vcpu_vmx *vmx = to_vmx(vcpu);
1343         struct kvm_msr_entry *msr = find_msr_entry(vmx, MSR_EFER);
1344
1345         vcpu->arch.shadow_efer = efer;
1346         if (efer & EFER_LMA) {
1347                 vmcs_write32(VM_ENTRY_CONTROLS,
1348                                      vmcs_read32(VM_ENTRY_CONTROLS) |
1349                                      VM_ENTRY_IA32E_MODE);
1350                 msr->data = efer;
1351
1352         } else {
1353                 vmcs_write32(VM_ENTRY_CONTROLS,
1354                                      vmcs_read32(VM_ENTRY_CONTROLS) &
1355                                      ~VM_ENTRY_IA32E_MODE);
1356
1357                 msr->data = efer & ~EFER_LME;
1358         }
1359         setup_msrs(vmx);
1360 }
1361
1362 #endif
1363
1364 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
1365 {
1366         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1367
1368         return vmcs_readl(sf->base);
1369 }
1370
1371 static void vmx_get_segment(struct kvm_vcpu *vcpu,
1372                             struct kvm_segment *var, int seg)
1373 {
1374         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1375         u32 ar;
1376
1377         var->base = vmcs_readl(sf->base);
1378         var->limit = vmcs_read32(sf->limit);
1379         var->selector = vmcs_read16(sf->selector);
1380         ar = vmcs_read32(sf->ar_bytes);
1381         if (ar & AR_UNUSABLE_MASK)
1382                 ar = 0;
1383         var->type = ar & 15;
1384         var->s = (ar >> 4) & 1;
1385         var->dpl = (ar >> 5) & 3;
1386         var->present = (ar >> 7) & 1;
1387         var->avl = (ar >> 12) & 1;
1388         var->l = (ar >> 13) & 1;
1389         var->db = (ar >> 14) & 1;
1390         var->g = (ar >> 15) & 1;
1391         var->unusable = (ar >> 16) & 1;
1392 }
1393
1394 static u32 vmx_segment_access_rights(struct kvm_segment *var)
1395 {
1396         u32 ar;
1397
1398         if (var->unusable)
1399                 ar = 1 << 16;
1400         else {
1401                 ar = var->type & 15;
1402                 ar |= (var->s & 1) << 4;
1403                 ar |= (var->dpl & 3) << 5;
1404                 ar |= (var->present & 1) << 7;
1405                 ar |= (var->avl & 1) << 12;
1406                 ar |= (var->l & 1) << 13;
1407                 ar |= (var->db & 1) << 14;
1408                 ar |= (var->g & 1) << 15;
1409         }
1410         if (ar == 0) /* a 0 value means unusable */
1411                 ar = AR_UNUSABLE_MASK;
1412
1413         return ar;
1414 }
1415
1416 static void vmx_set_segment(struct kvm_vcpu *vcpu,
1417                             struct kvm_segment *var, int seg)
1418 {
1419         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1420         u32 ar;
1421
1422         if (vcpu->arch.rmode.active && seg == VCPU_SREG_TR) {
1423                 vcpu->arch.rmode.tr.selector = var->selector;
1424                 vcpu->arch.rmode.tr.base = var->base;
1425                 vcpu->arch.rmode.tr.limit = var->limit;
1426                 vcpu->arch.rmode.tr.ar = vmx_segment_access_rights(var);
1427                 return;
1428         }
1429         vmcs_writel(sf->base, var->base);
1430         vmcs_write32(sf->limit, var->limit);
1431         vmcs_write16(sf->selector, var->selector);
1432         if (vcpu->arch.rmode.active && var->s) {
1433                 /*
1434                  * Hack real-mode segments into vm86 compatibility.
1435                  */
1436                 if (var->base == 0xffff0000 && var->selector == 0xf000)
1437                         vmcs_writel(sf->base, 0xf0000);
1438                 ar = 0xf3;
1439         } else
1440                 ar = vmx_segment_access_rights(var);
1441         vmcs_write32(sf->ar_bytes, ar);
1442 }
1443
1444 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
1445 {
1446         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
1447
1448         *db = (ar >> 14) & 1;
1449         *l = (ar >> 13) & 1;
1450 }
1451
1452 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1453 {
1454         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
1455         dt->base = vmcs_readl(GUEST_IDTR_BASE);
1456 }
1457
1458 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1459 {
1460         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
1461         vmcs_writel(GUEST_IDTR_BASE, dt->base);
1462 }
1463
1464 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1465 {
1466         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
1467         dt->base = vmcs_readl(GUEST_GDTR_BASE);
1468 }
1469
1470 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1471 {
1472         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
1473         vmcs_writel(GUEST_GDTR_BASE, dt->base);
1474 }
1475
1476 static int init_rmode_tss(struct kvm *kvm)
1477 {
1478         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
1479         u16 data = 0;
1480         int ret = 0;
1481         int r;
1482
1483         down_read(&kvm->slots_lock);
1484         r = kvm_clear_guest_page(kvm, fn, 0, PAGE_SIZE);
1485         if (r < 0)
1486                 goto out;
1487         data = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
1488         r = kvm_write_guest_page(kvm, fn++, &data, 0x66, sizeof(u16));
1489         if (r < 0)
1490                 goto out;
1491         r = kvm_clear_guest_page(kvm, fn++, 0, PAGE_SIZE);
1492         if (r < 0)
1493                 goto out;
1494         r = kvm_clear_guest_page(kvm, fn, 0, PAGE_SIZE);
1495         if (r < 0)
1496                 goto out;
1497         data = ~0;
1498         r = kvm_write_guest_page(kvm, fn, &data,
1499                                  RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1,
1500                                  sizeof(u8));
1501         if (r < 0)
1502                 goto out;
1503
1504         ret = 1;
1505 out:
1506         up_read(&kvm->slots_lock);
1507         return ret;
1508 }
1509
1510 static void seg_setup(int seg)
1511 {
1512         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1513
1514         vmcs_write16(sf->selector, 0);
1515         vmcs_writel(sf->base, 0);
1516         vmcs_write32(sf->limit, 0xffff);
1517         vmcs_write32(sf->ar_bytes, 0x93);
1518 }
1519
1520 static int alloc_apic_access_page(struct kvm *kvm)
1521 {
1522         struct kvm_userspace_memory_region kvm_userspace_mem;
1523         int r = 0;
1524
1525         down_write(&kvm->slots_lock);
1526         if (kvm->arch.apic_access_page)
1527                 goto out;
1528         kvm_userspace_mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
1529         kvm_userspace_mem.flags = 0;
1530         kvm_userspace_mem.guest_phys_addr = 0xfee00000ULL;
1531         kvm_userspace_mem.memory_size = PAGE_SIZE;
1532         r = __kvm_set_memory_region(kvm, &kvm_userspace_mem, 0);
1533         if (r)
1534                 goto out;
1535
1536         down_read(&current->mm->mmap_sem);
1537         kvm->arch.apic_access_page = gfn_to_page(kvm, 0xfee00);
1538         up_read(&current->mm->mmap_sem);
1539 out:
1540         up_write(&kvm->slots_lock);
1541         return r;
1542 }
1543
1544 static void allocate_vpid(struct vcpu_vmx *vmx)
1545 {
1546         int vpid;
1547
1548         vmx->vpid = 0;
1549         if (!enable_vpid || !cpu_has_vmx_vpid())
1550                 return;
1551         spin_lock(&vmx_vpid_lock);
1552         vpid = find_first_zero_bit(vmx_vpid_bitmap, VMX_NR_VPIDS);
1553         if (vpid < VMX_NR_VPIDS) {
1554                 vmx->vpid = vpid;
1555                 __set_bit(vpid, vmx_vpid_bitmap);
1556         }
1557         spin_unlock(&vmx_vpid_lock);
1558 }
1559
1560 /*
1561  * Sets up the vmcs for emulated real mode.
1562  */
1563 static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
1564 {
1565         u32 host_sysenter_cs;
1566         u32 junk;
1567         unsigned long a;
1568         struct descriptor_table dt;
1569         int i;
1570         unsigned long kvm_vmx_return;
1571         u32 exec_control;
1572
1573         /* I/O */
1574         vmcs_write64(IO_BITMAP_A, page_to_phys(vmx_io_bitmap_a));
1575         vmcs_write64(IO_BITMAP_B, page_to_phys(vmx_io_bitmap_b));
1576
1577         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1578
1579         /* Control */
1580         vmcs_write32(PIN_BASED_VM_EXEC_CONTROL,
1581                 vmcs_config.pin_based_exec_ctrl);
1582
1583         exec_control = vmcs_config.cpu_based_exec_ctrl;
1584         if (!vm_need_tpr_shadow(vmx->vcpu.kvm)) {
1585                 exec_control &= ~CPU_BASED_TPR_SHADOW;
1586 #ifdef CONFIG_X86_64
1587                 exec_control |= CPU_BASED_CR8_STORE_EXITING |
1588                                 CPU_BASED_CR8_LOAD_EXITING;
1589 #endif
1590         }
1591         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, exec_control);
1592
1593         if (cpu_has_secondary_exec_ctrls()) {
1594                 exec_control = vmcs_config.cpu_based_2nd_exec_ctrl;
1595                 if (!vm_need_virtualize_apic_accesses(vmx->vcpu.kvm))
1596                         exec_control &=
1597                                 ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
1598                 if (vmx->vpid == 0)
1599                         exec_control &= ~SECONDARY_EXEC_ENABLE_VPID;
1600                 vmcs_write32(SECONDARY_VM_EXEC_CONTROL, exec_control);
1601         }
1602
1603         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, !!bypass_guest_pf);
1604         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, !!bypass_guest_pf);
1605         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1606
1607         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1608         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1609         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1610
1611         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1612         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1613         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1614         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1615         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1616         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1617 #ifdef CONFIG_X86_64
1618         rdmsrl(MSR_FS_BASE, a);
1619         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1620         rdmsrl(MSR_GS_BASE, a);
1621         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1622 #else
1623         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1624         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1625 #endif
1626
1627         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1628
1629         get_idt(&dt);
1630         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1631
1632         asm("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return));
1633         vmcs_writel(HOST_RIP, kvm_vmx_return); /* 22.2.5 */
1634         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0);
1635         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, 0);
1636         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, 0);
1637
1638         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1639         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1640         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1641         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1642         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1643         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1644
1645         for (i = 0; i < NR_VMX_MSR; ++i) {
1646                 u32 index = vmx_msr_index[i];
1647                 u32 data_low, data_high;
1648                 u64 data;
1649                 int j = vmx->nmsrs;
1650
1651                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1652                         continue;
1653                 if (wrmsr_safe(index, data_low, data_high) < 0)
1654                         continue;
1655                 data = data_low | ((u64)data_high << 32);
1656                 vmx->host_msrs[j].index = index;
1657                 vmx->host_msrs[j].reserved = 0;
1658                 vmx->host_msrs[j].data = data;
1659                 vmx->guest_msrs[j] = vmx->host_msrs[j];
1660                 ++vmx->nmsrs;
1661         }
1662
1663         vmcs_write32(VM_EXIT_CONTROLS, vmcs_config.vmexit_ctrl);
1664
1665         /* 22.2.1, 20.8.1 */
1666         vmcs_write32(VM_ENTRY_CONTROLS, vmcs_config.vmentry_ctrl);
1667
1668         vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
1669         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1670
1671
1672         return 0;
1673 }
1674
1675 static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
1676 {
1677         struct vcpu_vmx *vmx = to_vmx(vcpu);
1678         u64 msr;
1679         int ret;
1680
1681         if (!init_rmode_tss(vmx->vcpu.kvm)) {
1682                 ret = -ENOMEM;
1683                 goto out;
1684         }
1685
1686         vmx->vcpu.arch.rmode.active = 0;
1687
1688         vmx->vcpu.arch.regs[VCPU_REGS_RDX] = get_rdx_init_val();
1689         set_cr8(&vmx->vcpu, 0);
1690         msr = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
1691         if (vmx->vcpu.vcpu_id == 0)
1692                 msr |= MSR_IA32_APICBASE_BSP;
1693         kvm_set_apic_base(&vmx->vcpu, msr);
1694
1695         fx_init(&vmx->vcpu);
1696
1697         /*
1698          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1699          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1700          */
1701         if (vmx->vcpu.vcpu_id == 0) {
1702                 vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1703                 vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1704         } else {
1705                 vmcs_write16(GUEST_CS_SELECTOR, vmx->vcpu.arch.sipi_vector << 8);
1706                 vmcs_writel(GUEST_CS_BASE, vmx->vcpu.arch.sipi_vector << 12);
1707         }
1708         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1709         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1710
1711         seg_setup(VCPU_SREG_DS);
1712         seg_setup(VCPU_SREG_ES);
1713         seg_setup(VCPU_SREG_FS);
1714         seg_setup(VCPU_SREG_GS);
1715         seg_setup(VCPU_SREG_SS);
1716
1717         vmcs_write16(GUEST_TR_SELECTOR, 0);
1718         vmcs_writel(GUEST_TR_BASE, 0);
1719         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1720         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1721
1722         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1723         vmcs_writel(GUEST_LDTR_BASE, 0);
1724         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1725         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1726
1727         vmcs_write32(GUEST_SYSENTER_CS, 0);
1728         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1729         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1730
1731         vmcs_writel(GUEST_RFLAGS, 0x02);
1732         if (vmx->vcpu.vcpu_id == 0)
1733                 vmcs_writel(GUEST_RIP, 0xfff0);
1734         else
1735                 vmcs_writel(GUEST_RIP, 0);
1736         vmcs_writel(GUEST_RSP, 0);
1737
1738         /* todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0 */
1739         vmcs_writel(GUEST_DR7, 0x400);
1740
1741         vmcs_writel(GUEST_GDTR_BASE, 0);
1742         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1743
1744         vmcs_writel(GUEST_IDTR_BASE, 0);
1745         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1746
1747         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1748         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1749         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1750
1751         guest_write_tsc(0);
1752
1753         /* Special registers */
1754         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1755
1756         setup_msrs(vmx);
1757
1758         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1759
1760         if (cpu_has_vmx_tpr_shadow()) {
1761                 vmcs_write64(VIRTUAL_APIC_PAGE_ADDR, 0);
1762                 if (vm_need_tpr_shadow(vmx->vcpu.kvm))
1763                         vmcs_write64(VIRTUAL_APIC_PAGE_ADDR,
1764                                 page_to_phys(vmx->vcpu.arch.apic->regs_page));
1765                 vmcs_write32(TPR_THRESHOLD, 0);
1766         }
1767
1768         if (vm_need_virtualize_apic_accesses(vmx->vcpu.kvm))
1769                 vmcs_write64(APIC_ACCESS_ADDR,
1770                              page_to_phys(vmx->vcpu.kvm->arch.apic_access_page));
1771
1772         if (vmx->vpid != 0)
1773                 vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid);
1774
1775         vmx->vcpu.arch.cr0 = 0x60000010;
1776         vmx_set_cr0(&vmx->vcpu, vmx->vcpu.arch.cr0); /* enter rmode */
1777         vmx_set_cr4(&vmx->vcpu, 0);
1778 #ifdef CONFIG_X86_64
1779         vmx_set_efer(&vmx->vcpu, 0);
1780 #endif
1781         vmx_fpu_activate(&vmx->vcpu);
1782         update_exception_bitmap(&vmx->vcpu);
1783
1784         vpid_sync_vcpu_all(vmx);
1785
1786         return 0;
1787
1788 out:
1789         return ret;
1790 }
1791
1792 static void vmx_inject_irq(struct kvm_vcpu *vcpu, int irq)
1793 {
1794         struct vcpu_vmx *vmx = to_vmx(vcpu);
1795
1796         if (vcpu->arch.rmode.active) {
1797                 vmx->rmode.irq.pending = true;
1798                 vmx->rmode.irq.vector = irq;
1799                 vmx->rmode.irq.rip = vmcs_readl(GUEST_RIP);
1800                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1801                              irq | INTR_TYPE_SOFT_INTR | INTR_INFO_VALID_MASK);
1802                 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN, 1);
1803                 vmcs_writel(GUEST_RIP, vmx->rmode.irq.rip - 1);
1804                 return;
1805         }
1806         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1807                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1808 }
1809
1810 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1811 {
1812         int word_index = __ffs(vcpu->arch.irq_summary);
1813         int bit_index = __ffs(vcpu->arch.irq_pending[word_index]);
1814         int irq = word_index * BITS_PER_LONG + bit_index;
1815
1816         clear_bit(bit_index, &vcpu->arch.irq_pending[word_index]);
1817         if (!vcpu->arch.irq_pending[word_index])
1818                 clear_bit(word_index, &vcpu->arch.irq_summary);
1819         vmx_inject_irq(vcpu, irq);
1820 }
1821
1822
1823 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1824                                        struct kvm_run *kvm_run)
1825 {
1826         u32 cpu_based_vm_exec_control;
1827
1828         vcpu->arch.interrupt_window_open =
1829                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1830                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1831
1832         if (vcpu->arch.interrupt_window_open &&
1833             vcpu->arch.irq_summary &&
1834             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1835                 /*
1836                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1837                  */
1838                 kvm_do_inject_irq(vcpu);
1839
1840         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1841         if (!vcpu->arch.interrupt_window_open &&
1842             (vcpu->arch.irq_summary || kvm_run->request_interrupt_window))
1843                 /*
1844                  * Interrupts blocked.  Wait for unblock.
1845                  */
1846                 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1847         else
1848                 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1849         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1850 }
1851
1852 static int vmx_set_tss_addr(struct kvm *kvm, unsigned int addr)
1853 {
1854         int ret;
1855         struct kvm_userspace_memory_region tss_mem = {
1856                 .slot = 8,
1857                 .guest_phys_addr = addr,
1858                 .memory_size = PAGE_SIZE * 3,
1859                 .flags = 0,
1860         };
1861
1862         ret = kvm_set_memory_region(kvm, &tss_mem, 0);
1863         if (ret)
1864                 return ret;
1865         kvm->arch.tss_addr = addr;
1866         return 0;
1867 }
1868
1869 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1870 {
1871         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1872
1873         set_debugreg(dbg->bp[0], 0);
1874         set_debugreg(dbg->bp[1], 1);
1875         set_debugreg(dbg->bp[2], 2);
1876         set_debugreg(dbg->bp[3], 3);
1877
1878         if (dbg->singlestep) {
1879                 unsigned long flags;
1880
1881                 flags = vmcs_readl(GUEST_RFLAGS);
1882                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1883                 vmcs_writel(GUEST_RFLAGS, flags);
1884         }
1885 }
1886
1887 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1888                                   int vec, u32 err_code)
1889 {
1890         if (!vcpu->arch.rmode.active)
1891                 return 0;
1892
1893         /*
1894          * Instruction with address size override prefix opcode 0x67
1895          * Cause the #SS fault with 0 error code in VM86 mode.
1896          */
1897         if (((vec == GP_VECTOR) || (vec == SS_VECTOR)) && err_code == 0)
1898                 if (emulate_instruction(vcpu, NULL, 0, 0, 0) == EMULATE_DONE)
1899                         return 1;
1900         return 0;
1901 }
1902
1903 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1904 {
1905         struct vcpu_vmx *vmx = to_vmx(vcpu);
1906         u32 intr_info, error_code;
1907         unsigned long cr2, rip;
1908         u32 vect_info;
1909         enum emulation_result er;
1910
1911         vect_info = vmx->idt_vectoring_info;
1912         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1913
1914         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1915                                                 !is_page_fault(intr_info))
1916                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1917                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1918
1919         if (!irqchip_in_kernel(vcpu->kvm) && is_external_interrupt(vect_info)) {
1920                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1921                 set_bit(irq, vcpu->arch.irq_pending);
1922                 set_bit(irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1923         }
1924
1925         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) /* nmi */
1926                 return 1;  /* already handled by vmx_vcpu_run() */
1927
1928         if (is_no_device(intr_info)) {
1929                 vmx_fpu_activate(vcpu);
1930                 return 1;
1931         }
1932
1933         if (is_invalid_opcode(intr_info)) {
1934                 er = emulate_instruction(vcpu, kvm_run, 0, 0, EMULTYPE_TRAP_UD);
1935                 if (er != EMULATE_DONE)
1936                         kvm_queue_exception(vcpu, UD_VECTOR);
1937                 return 1;
1938         }
1939
1940         error_code = 0;
1941         rip = vmcs_readl(GUEST_RIP);
1942         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1943                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1944         if (is_page_fault(intr_info)) {
1945                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1946                 return kvm_mmu_page_fault(vcpu, cr2, error_code);
1947         }
1948
1949         if (vcpu->arch.rmode.active &&
1950             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1951                                                                 error_code)) {
1952                 if (vcpu->arch.halt_request) {
1953                         vcpu->arch.halt_request = 0;
1954                         return kvm_emulate_halt(vcpu);
1955                 }
1956                 return 1;
1957         }
1958
1959         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) ==
1960             (INTR_TYPE_EXCEPTION | 1)) {
1961                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1962                 return 0;
1963         }
1964         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1965         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1966         kvm_run->ex.error_code = error_code;
1967         return 0;
1968 }
1969
1970 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1971                                      struct kvm_run *kvm_run)
1972 {
1973         ++vcpu->stat.irq_exits;
1974         return 1;
1975 }
1976
1977 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1978 {
1979         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1980         return 0;
1981 }
1982
1983 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1984 {
1985         unsigned long exit_qualification;
1986         int size, down, in, string, rep;
1987         unsigned port;
1988
1989         ++vcpu->stat.io_exits;
1990         exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
1991         string = (exit_qualification & 16) != 0;
1992
1993         if (string) {
1994                 if (emulate_instruction(vcpu,
1995                                         kvm_run, 0, 0, 0) == EMULATE_DO_MMIO)
1996                         return 0;
1997                 return 1;
1998         }
1999
2000         size = (exit_qualification & 7) + 1;
2001         in = (exit_qualification & 8) != 0;
2002         down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
2003         rep = (exit_qualification & 32) != 0;
2004         port = exit_qualification >> 16;
2005
2006         return kvm_emulate_pio(vcpu, kvm_run, in, size, port);
2007 }
2008
2009 static void
2010 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
2011 {
2012         /*
2013          * Patch in the VMCALL instruction:
2014          */
2015         hypercall[0] = 0x0f;
2016         hypercall[1] = 0x01;
2017         hypercall[2] = 0xc1;
2018 }
2019
2020 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2021 {
2022         unsigned long exit_qualification;
2023         int cr;
2024         int reg;
2025
2026         exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
2027         cr = exit_qualification & 15;
2028         reg = (exit_qualification >> 8) & 15;
2029         switch ((exit_qualification >> 4) & 3) {
2030         case 0: /* mov to cr */
2031                 switch (cr) {
2032                 case 0:
2033                         vcpu_load_rsp_rip(vcpu);
2034                         set_cr0(vcpu, vcpu->arch.regs[reg]);
2035                         skip_emulated_instruction(vcpu);
2036                         return 1;
2037                 case 3:
2038                         vcpu_load_rsp_rip(vcpu);
2039                         set_cr3(vcpu, vcpu->arch.regs[reg]);
2040                         skip_emulated_instruction(vcpu);
2041                         return 1;
2042                 case 4:
2043                         vcpu_load_rsp_rip(vcpu);
2044                         set_cr4(vcpu, vcpu->arch.regs[reg]);
2045                         skip_emulated_instruction(vcpu);
2046                         return 1;
2047                 case 8:
2048                         vcpu_load_rsp_rip(vcpu);
2049                         set_cr8(vcpu, vcpu->arch.regs[reg]);
2050                         skip_emulated_instruction(vcpu);
2051                         if (irqchip_in_kernel(vcpu->kvm))
2052                                 return 1;
2053                         kvm_run->exit_reason = KVM_EXIT_SET_TPR;
2054                         return 0;
2055                 };
2056                 break;
2057         case 2: /* clts */
2058                 vcpu_load_rsp_rip(vcpu);
2059                 vmx_fpu_deactivate(vcpu);
2060                 vcpu->arch.cr0 &= ~X86_CR0_TS;
2061                 vmcs_writel(CR0_READ_SHADOW, vcpu->arch.cr0);
2062                 vmx_fpu_activate(vcpu);
2063                 skip_emulated_instruction(vcpu);
2064                 return 1;
2065         case 1: /*mov from cr*/
2066                 switch (cr) {
2067                 case 3:
2068                         vcpu_load_rsp_rip(vcpu);
2069                         vcpu->arch.regs[reg] = vcpu->arch.cr3;
2070                         vcpu_put_rsp_rip(vcpu);
2071                         skip_emulated_instruction(vcpu);
2072                         return 1;
2073                 case 8:
2074                         vcpu_load_rsp_rip(vcpu);
2075                         vcpu->arch.regs[reg] = get_cr8(vcpu);
2076                         vcpu_put_rsp_rip(vcpu);
2077                         skip_emulated_instruction(vcpu);
2078                         return 1;
2079                 }
2080                 break;
2081         case 3: /* lmsw */
2082                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
2083
2084                 skip_emulated_instruction(vcpu);
2085                 return 1;
2086         default:
2087                 break;
2088         }
2089         kvm_run->exit_reason = 0;
2090         pr_unimpl(vcpu, "unhandled control register: op %d cr %d\n",
2091                (int)(exit_qualification >> 4) & 3, cr);
2092         return 0;
2093 }
2094
2095 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2096 {
2097         unsigned long exit_qualification;
2098         unsigned long val;
2099         int dr, reg;
2100
2101         /*
2102          * FIXME: this code assumes the host is debugging the guest.
2103          *        need to deal with guest debugging itself too.
2104          */
2105         exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
2106         dr = exit_qualification & 7;
2107         reg = (exit_qualification >> 8) & 15;
2108         vcpu_load_rsp_rip(vcpu);
2109         if (exit_qualification & 16) {
2110                 /* mov from dr */
2111                 switch (dr) {
2112                 case 6:
2113                         val = 0xffff0ff0;
2114                         break;
2115                 case 7:
2116                         val = 0x400;
2117                         break;
2118                 default:
2119                         val = 0;
2120                 }
2121                 vcpu->arch.regs[reg] = val;
2122         } else {
2123                 /* mov to dr */
2124         }
2125         vcpu_put_rsp_rip(vcpu);
2126         skip_emulated_instruction(vcpu);
2127         return 1;
2128 }
2129
2130 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2131 {
2132         kvm_emulate_cpuid(vcpu);
2133         return 1;
2134 }
2135
2136 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2137 {
2138         u32 ecx = vcpu->arch.regs[VCPU_REGS_RCX];
2139         u64 data;
2140
2141         if (vmx_get_msr(vcpu, ecx, &data)) {
2142                 kvm_inject_gp(vcpu, 0);
2143                 return 1;
2144         }
2145
2146         /* FIXME: handling of bits 32:63 of rax, rdx */
2147         vcpu->arch.regs[VCPU_REGS_RAX] = data & -1u;
2148         vcpu->arch.regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
2149         skip_emulated_instruction(vcpu);
2150         return 1;
2151 }
2152
2153 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2154 {
2155         u32 ecx = vcpu->arch.regs[VCPU_REGS_RCX];
2156         u64 data = (vcpu->arch.regs[VCPU_REGS_RAX] & -1u)
2157                 | ((u64)(vcpu->arch.regs[VCPU_REGS_RDX] & -1u) << 32);
2158
2159         if (vmx_set_msr(vcpu, ecx, data) != 0) {
2160                 kvm_inject_gp(vcpu, 0);
2161                 return 1;
2162         }
2163
2164         skip_emulated_instruction(vcpu);
2165         return 1;
2166 }
2167
2168 static int handle_tpr_below_threshold(struct kvm_vcpu *vcpu,
2169                                       struct kvm_run *kvm_run)
2170 {
2171         return 1;
2172 }
2173
2174 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
2175                                    struct kvm_run *kvm_run)
2176 {
2177         u32 cpu_based_vm_exec_control;
2178
2179         /* clear pending irq */
2180         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
2181         cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
2182         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
2183         /*
2184          * If the user space waits to inject interrupts, exit as soon as
2185          * possible
2186          */
2187         if (kvm_run->request_interrupt_window &&
2188             !vcpu->arch.irq_summary) {
2189                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
2190                 ++vcpu->stat.irq_window_exits;
2191                 return 0;
2192         }
2193         return 1;
2194 }
2195
2196 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2197 {
2198         skip_emulated_instruction(vcpu);
2199         return kvm_emulate_halt(vcpu);
2200 }
2201
2202 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2203 {
2204         skip_emulated_instruction(vcpu);
2205         kvm_emulate_hypercall(vcpu);
2206         return 1;
2207 }
2208
2209 static int handle_wbinvd(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2210 {
2211         skip_emulated_instruction(vcpu);
2212         /* TODO: Add support for VT-d/pass-through device */
2213         return 1;
2214 }
2215
2216 static int handle_apic_access(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2217 {
2218         u64 exit_qualification;
2219         enum emulation_result er;
2220         unsigned long offset;
2221
2222         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
2223         offset = exit_qualification & 0xffful;
2224
2225         er = emulate_instruction(vcpu, kvm_run, 0, 0, 0);
2226
2227         if (er !=  EMULATE_DONE) {
2228                 printk(KERN_ERR
2229                        "Fail to handle apic access vmexit! Offset is 0x%lx\n",
2230                        offset);
2231                 return -ENOTSUPP;
2232         }
2233         return 1;
2234 }
2235
2236 /*
2237  * The exit handlers return 1 if the exit was handled fully and guest execution
2238  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
2239  * to be done to userspace and return 0.
2240  */
2241 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
2242                                       struct kvm_run *kvm_run) = {
2243         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
2244         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
2245         [EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
2246         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
2247         [EXIT_REASON_CR_ACCESS]               = handle_cr,
2248         [EXIT_REASON_DR_ACCESS]               = handle_dr,
2249         [EXIT_REASON_CPUID]                   = handle_cpuid,
2250         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
2251         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
2252         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
2253         [EXIT_REASON_HLT]                     = handle_halt,
2254         [EXIT_REASON_VMCALL]                  = handle_vmcall,
2255         [EXIT_REASON_TPR_BELOW_THRESHOLD]     = handle_tpr_below_threshold,
2256         [EXIT_REASON_APIC_ACCESS]             = handle_apic_access,
2257         [EXIT_REASON_WBINVD]                  = handle_wbinvd,
2258 };
2259
2260 static const int kvm_vmx_max_exit_handlers =
2261         ARRAY_SIZE(kvm_vmx_exit_handlers);
2262
2263 /*
2264  * The guest has exited.  See if we can fix it or if we need userspace
2265  * assistance.
2266  */
2267 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
2268 {
2269         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
2270         struct vcpu_vmx *vmx = to_vmx(vcpu);
2271         u32 vectoring_info = vmx->idt_vectoring_info;
2272
2273         if (unlikely(vmx->fail)) {
2274                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
2275                 kvm_run->fail_entry.hardware_entry_failure_reason
2276                         = vmcs_read32(VM_INSTRUCTION_ERROR);
2277                 return 0;
2278         }
2279
2280         if ((vectoring_info & VECTORING_INFO_VALID_MASK) &&
2281                                 exit_reason != EXIT_REASON_EXCEPTION_NMI)
2282                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
2283                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
2284         if (exit_reason < kvm_vmx_max_exit_handlers
2285             && kvm_vmx_exit_handlers[exit_reason])
2286                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
2287         else {
2288                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
2289                 kvm_run->hw.hardware_exit_reason = exit_reason;
2290         }
2291         return 0;
2292 }
2293
2294 static void update_tpr_threshold(struct kvm_vcpu *vcpu)
2295 {
2296         int max_irr, tpr;
2297
2298         if (!vm_need_tpr_shadow(vcpu->kvm))
2299                 return;
2300
2301         if (!kvm_lapic_enabled(vcpu) ||
2302             ((max_irr = kvm_lapic_find_highest_irr(vcpu)) == -1)) {
2303                 vmcs_write32(TPR_THRESHOLD, 0);
2304                 return;
2305         }
2306
2307         tpr = (kvm_lapic_get_cr8(vcpu) & 0x0f) << 4;
2308         vmcs_write32(TPR_THRESHOLD, (max_irr > tpr) ? tpr >> 4 : max_irr >> 4);
2309 }
2310
2311 static void enable_irq_window(struct kvm_vcpu *vcpu)
2312 {
2313         u32 cpu_based_vm_exec_control;
2314
2315         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
2316         cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
2317         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
2318 }
2319
2320 static void vmx_intr_assist(struct kvm_vcpu *vcpu)
2321 {
2322         struct vcpu_vmx *vmx = to_vmx(vcpu);
2323         u32 idtv_info_field, intr_info_field;
2324         int has_ext_irq, interrupt_window_open;
2325         int vector;
2326
2327         update_tpr_threshold(vcpu);
2328
2329         has_ext_irq = kvm_cpu_has_interrupt(vcpu);
2330         intr_info_field = vmcs_read32(VM_ENTRY_INTR_INFO_FIELD);
2331         idtv_info_field = vmx->idt_vectoring_info;
2332         if (intr_info_field & INTR_INFO_VALID_MASK) {
2333                 if (idtv_info_field & INTR_INFO_VALID_MASK) {
2334                         /* TODO: fault when IDT_Vectoring */
2335                         if (printk_ratelimit())
2336                                 printk(KERN_ERR "Fault when IDT_Vectoring\n");
2337                 }
2338                 if (has_ext_irq)
2339                         enable_irq_window(vcpu);
2340                 return;
2341         }
2342         if (unlikely(idtv_info_field & INTR_INFO_VALID_MASK)) {
2343                 if ((idtv_info_field & VECTORING_INFO_TYPE_MASK)
2344                     == INTR_TYPE_EXT_INTR
2345                     && vcpu->arch.rmode.active) {
2346                         u8 vect = idtv_info_field & VECTORING_INFO_VECTOR_MASK;
2347
2348                         vmx_inject_irq(vcpu, vect);
2349                         if (unlikely(has_ext_irq))
2350                                 enable_irq_window(vcpu);
2351                         return;
2352                 }
2353
2354                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, idtv_info_field);
2355                 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
2356                                 vmcs_read32(VM_EXIT_INSTRUCTION_LEN));
2357
2358                 if (unlikely(idtv_info_field & INTR_INFO_DELIEVER_CODE_MASK))
2359                         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE,
2360                                 vmcs_read32(IDT_VECTORING_ERROR_CODE));
2361                 if (unlikely(has_ext_irq))
2362                         enable_irq_window(vcpu);
2363                 return;
2364         }
2365         if (!has_ext_irq)
2366                 return;
2367         interrupt_window_open =
2368                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
2369                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
2370         if (interrupt_window_open) {
2371                 vector = kvm_cpu_get_interrupt(vcpu);
2372                 vmx_inject_irq(vcpu, vector);
2373                 kvm_timer_intr_post(vcpu, vector);
2374         } else
2375                 enable_irq_window(vcpu);
2376 }
2377
2378 /*
2379  * Failure to inject an interrupt should give us the information
2380  * in IDT_VECTORING_INFO_FIELD.  However, if the failure occurs
2381  * when fetching the interrupt redirection bitmap in the real-mode
2382  * tss, this doesn't happen.  So we do it ourselves.
2383  */
2384 static void fixup_rmode_irq(struct vcpu_vmx *vmx)
2385 {
2386         vmx->rmode.irq.pending = 0;
2387         if (vmcs_readl(GUEST_RIP) + 1 != vmx->rmode.irq.rip)
2388                 return;
2389         vmcs_writel(GUEST_RIP, vmx->rmode.irq.rip);
2390         if (vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK) {
2391                 vmx->idt_vectoring_info &= ~VECTORING_INFO_TYPE_MASK;
2392                 vmx->idt_vectoring_info |= INTR_TYPE_EXT_INTR;
2393                 return;
2394         }
2395         vmx->idt_vectoring_info =
2396                 VECTORING_INFO_VALID_MASK
2397                 | INTR_TYPE_EXT_INTR
2398                 | vmx->rmode.irq.vector;
2399 }
2400
2401 static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2402 {
2403         struct vcpu_vmx *vmx = to_vmx(vcpu);
2404         u32 intr_info;
2405
2406         /*
2407          * Loading guest fpu may have cleared host cr0.ts
2408          */
2409         vmcs_writel(HOST_CR0, read_cr0());
2410
2411         asm(
2412                 /* Store host registers */
2413 #ifdef CONFIG_X86_64
2414                 "push %%rdx; push %%rbp;"
2415                 "push %%rcx \n\t"
2416 #else
2417                 "push %%edx; push %%ebp;"
2418                 "push %%ecx \n\t"
2419 #endif
2420                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2421                 /* Check if vmlaunch of vmresume is needed */
2422                 "cmpl $0, %c[launched](%0) \n\t"
2423                 /* Load guest registers.  Don't clobber flags. */
2424 #ifdef CONFIG_X86_64
2425                 "mov %c[cr2](%0), %%rax \n\t"
2426                 "mov %%rax, %%cr2 \n\t"
2427                 "mov %c[rax](%0), %%rax \n\t"
2428                 "mov %c[rbx](%0), %%rbx \n\t"
2429                 "mov %c[rdx](%0), %%rdx \n\t"
2430                 "mov %c[rsi](%0), %%rsi \n\t"
2431                 "mov %c[rdi](%0), %%rdi \n\t"
2432                 "mov %c[rbp](%0), %%rbp \n\t"
2433                 "mov %c[r8](%0),  %%r8  \n\t"
2434                 "mov %c[r9](%0),  %%r9  \n\t"
2435                 "mov %c[r10](%0), %%r10 \n\t"
2436                 "mov %c[r11](%0), %%r11 \n\t"
2437                 "mov %c[r12](%0), %%r12 \n\t"
2438                 "mov %c[r13](%0), %%r13 \n\t"
2439                 "mov %c[r14](%0), %%r14 \n\t"
2440                 "mov %c[r15](%0), %%r15 \n\t"
2441                 "mov %c[rcx](%0), %%rcx \n\t" /* kills %0 (rcx) */
2442 #else
2443                 "mov %c[cr2](%0), %%eax \n\t"
2444                 "mov %%eax,   %%cr2 \n\t"
2445                 "mov %c[rax](%0), %%eax \n\t"
2446                 "mov %c[rbx](%0), %%ebx \n\t"
2447                 "mov %c[rdx](%0), %%edx \n\t"
2448                 "mov %c[rsi](%0), %%esi \n\t"
2449                 "mov %c[rdi](%0), %%edi \n\t"
2450                 "mov %c[rbp](%0), %%ebp \n\t"
2451                 "mov %c[rcx](%0), %%ecx \n\t" /* kills %0 (ecx) */
2452 #endif
2453                 /* Enter guest mode */
2454                 "jne .Llaunched \n\t"
2455                 ASM_VMX_VMLAUNCH "\n\t"
2456                 "jmp .Lkvm_vmx_return \n\t"
2457                 ".Llaunched: " ASM_VMX_VMRESUME "\n\t"
2458                 ".Lkvm_vmx_return: "
2459                 /* Save guest registers, load host registers, keep flags */
2460 #ifdef CONFIG_X86_64
2461                 "xchg %0,     (%%rsp) \n\t"
2462                 "mov %%rax, %c[rax](%0) \n\t"
2463                 "mov %%rbx, %c[rbx](%0) \n\t"
2464                 "pushq (%%rsp); popq %c[rcx](%0) \n\t"
2465                 "mov %%rdx, %c[rdx](%0) \n\t"
2466                 "mov %%rsi, %c[rsi](%0) \n\t"
2467                 "mov %%rdi, %c[rdi](%0) \n\t"
2468                 "mov %%rbp, %c[rbp](%0) \n\t"
2469                 "mov %%r8,  %c[r8](%0) \n\t"
2470                 "mov %%r9,  %c[r9](%0) \n\t"
2471                 "mov %%r10, %c[r10](%0) \n\t"
2472                 "mov %%r11, %c[r11](%0) \n\t"
2473                 "mov %%r12, %c[r12](%0) \n\t"
2474                 "mov %%r13, %c[r13](%0) \n\t"
2475                 "mov %%r14, %c[r14](%0) \n\t"
2476                 "mov %%r15, %c[r15](%0) \n\t"
2477                 "mov %%cr2, %%rax   \n\t"
2478                 "mov %%rax, %c[cr2](%0) \n\t"
2479
2480                 "pop  %%rbp; pop  %%rbp; pop  %%rdx \n\t"
2481 #else
2482                 "xchg %0, (%%esp) \n\t"
2483                 "mov %%eax, %c[rax](%0) \n\t"
2484                 "mov %%ebx, %c[rbx](%0) \n\t"
2485                 "pushl (%%esp); popl %c[rcx](%0) \n\t"
2486                 "mov %%edx, %c[rdx](%0) \n\t"
2487                 "mov %%esi, %c[rsi](%0) \n\t"
2488                 "mov %%edi, %c[rdi](%0) \n\t"
2489                 "mov %%ebp, %c[rbp](%0) \n\t"
2490                 "mov %%cr2, %%eax  \n\t"
2491                 "mov %%eax, %c[cr2](%0) \n\t"
2492
2493                 "pop %%ebp; pop %%ebp; pop %%edx \n\t"
2494 #endif
2495                 "setbe %c[fail](%0) \n\t"
2496               : : "c"(vmx), "d"((unsigned long)HOST_RSP),
2497                 [launched]"i"(offsetof(struct vcpu_vmx, launched)),
2498                 [fail]"i"(offsetof(struct vcpu_vmx, fail)),
2499                 [rax]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RAX])),
2500                 [rbx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RBX])),
2501                 [rcx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RCX])),
2502                 [rdx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RDX])),
2503                 [rsi]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RSI])),
2504                 [rdi]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RDI])),
2505                 [rbp]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RBP])),
2506 #ifdef CONFIG_X86_64
2507                 [r8]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R8])),
2508                 [r9]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R9])),
2509                 [r10]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R10])),
2510                 [r11]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R11])),
2511                 [r12]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R12])),
2512                 [r13]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R13])),
2513                 [r14]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R14])),
2514                 [r15]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R15])),
2515 #endif
2516                 [cr2]"i"(offsetof(struct vcpu_vmx, vcpu.arch.cr2))
2517               : "cc", "memory"
2518 #ifdef CONFIG_X86_64
2519                 , "rbx", "rdi", "rsi"
2520                 , "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2521 #else
2522                 , "ebx", "edi", "rsi"
2523 #endif
2524               );
2525
2526         vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2527         if (vmx->rmode.irq.pending)
2528                 fixup_rmode_irq(vmx);
2529
2530         vcpu->arch.interrupt_window_open =
2531                 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
2532
2533         asm("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
2534         vmx->launched = 1;
2535
2536         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
2537
2538         /* We need to handle NMIs before interrupts are enabled */
2539         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) /* nmi */
2540                 asm("int $2");
2541 }
2542
2543 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2544 {
2545         struct vcpu_vmx *vmx = to_vmx(vcpu);
2546
2547         if (vmx->vmcs) {
2548                 on_each_cpu(__vcpu_clear, vmx, 0, 1);
2549                 free_vmcs(vmx->vmcs);
2550                 vmx->vmcs = NULL;
2551         }
2552 }
2553
2554 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2555 {
2556         struct vcpu_vmx *vmx = to_vmx(vcpu);
2557
2558         spin_lock(&vmx_vpid_lock);
2559         if (vmx->vpid != 0)
2560                 __clear_bit(vmx->vpid, vmx_vpid_bitmap);
2561         spin_unlock(&vmx_vpid_lock);
2562         vmx_free_vmcs(vcpu);
2563         kfree(vmx->host_msrs);
2564         kfree(vmx->guest_msrs);
2565         kvm_vcpu_uninit(vcpu);
2566         kmem_cache_free(kvm_vcpu_cache, vmx);
2567 }
2568
2569 static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
2570 {
2571         int err;
2572         struct vcpu_vmx *vmx = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
2573         int cpu;
2574
2575         if (!vmx)
2576                 return ERR_PTR(-ENOMEM);
2577
2578         allocate_vpid(vmx);
2579
2580         err = kvm_vcpu_init(&vmx->vcpu, kvm, id);
2581         if (err)
2582                 goto free_vcpu;
2583
2584         vmx->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2585         if (!vmx->guest_msrs) {
2586                 err = -ENOMEM;
2587                 goto uninit_vcpu;
2588         }
2589
2590         vmx->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2591         if (!vmx->host_msrs)
2592                 goto free_guest_msrs;
2593
2594         vmx->vmcs = alloc_vmcs();
2595         if (!vmx->vmcs)
2596                 goto free_msrs;
2597
2598         vmcs_clear(vmx->vmcs);
2599
2600         cpu = get_cpu();
2601         vmx_vcpu_load(&vmx->vcpu, cpu);
2602         err = vmx_vcpu_setup(vmx);
2603         vmx_vcpu_put(&vmx->vcpu);
2604         put_cpu();
2605         if (err)
2606                 goto free_vmcs;
2607         if (vm_need_virtualize_apic_accesses(kvm))
2608                 if (alloc_apic_access_page(kvm) != 0)
2609                         goto free_vmcs;
2610
2611         return &vmx->vcpu;
2612
2613 free_vmcs:
2614         free_vmcs(vmx->vmcs);
2615 free_msrs:
2616         kfree(vmx->host_msrs);
2617 free_guest_msrs:
2618         kfree(vmx->guest_msrs);
2619 uninit_vcpu:
2620         kvm_vcpu_uninit(&vmx->vcpu);
2621 free_vcpu:
2622         kmem_cache_free(kvm_vcpu_cache, vmx);
2623         return ERR_PTR(err);
2624 }
2625
2626 static void __init vmx_check_processor_compat(void *rtn)
2627 {
2628         struct vmcs_config vmcs_conf;
2629
2630         *(int *)rtn = 0;
2631         if (setup_vmcs_config(&vmcs_conf) < 0)
2632                 *(int *)rtn = -EIO;
2633         if (memcmp(&vmcs_config, &vmcs_conf, sizeof(struct vmcs_config)) != 0) {
2634                 printk(KERN_ERR "kvm: CPU %d feature inconsistency!\n",
2635                                 smp_processor_id());
2636                 *(int *)rtn = -EIO;
2637         }
2638 }
2639
2640 static struct kvm_x86_ops vmx_x86_ops = {
2641         .cpu_has_kvm_support = cpu_has_kvm_support,
2642         .disabled_by_bios = vmx_disabled_by_bios,
2643         .hardware_setup = hardware_setup,
2644         .hardware_unsetup = hardware_unsetup,
2645         .check_processor_compatibility = vmx_check_processor_compat,
2646         .hardware_enable = hardware_enable,
2647         .hardware_disable = hardware_disable,
2648         .cpu_has_accelerated_tpr = cpu_has_vmx_virtualize_apic_accesses,
2649
2650         .vcpu_create = vmx_create_vcpu,
2651         .vcpu_free = vmx_free_vcpu,
2652         .vcpu_reset = vmx_vcpu_reset,
2653
2654         .prepare_guest_switch = vmx_save_host_state,
2655         .vcpu_load = vmx_vcpu_load,
2656         .vcpu_put = vmx_vcpu_put,
2657         .vcpu_decache = vmx_vcpu_decache,
2658
2659         .set_guest_debug = set_guest_debug,
2660         .guest_debug_pre = kvm_guest_debug_pre,
2661         .get_msr = vmx_get_msr,
2662         .set_msr = vmx_set_msr,
2663         .get_segment_base = vmx_get_segment_base,
2664         .get_segment = vmx_get_segment,
2665         .set_segment = vmx_set_segment,
2666         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2667         .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
2668         .set_cr0 = vmx_set_cr0,
2669         .set_cr3 = vmx_set_cr3,
2670         .set_cr4 = vmx_set_cr4,
2671 #ifdef CONFIG_X86_64
2672         .set_efer = vmx_set_efer,
2673 #endif
2674         .get_idt = vmx_get_idt,
2675         .set_idt = vmx_set_idt,
2676         .get_gdt = vmx_get_gdt,
2677         .set_gdt = vmx_set_gdt,
2678         .cache_regs = vcpu_load_rsp_rip,
2679         .decache_regs = vcpu_put_rsp_rip,
2680         .get_rflags = vmx_get_rflags,
2681         .set_rflags = vmx_set_rflags,
2682
2683         .tlb_flush = vmx_flush_tlb,
2684
2685         .run = vmx_vcpu_run,
2686         .handle_exit = kvm_handle_exit,
2687         .skip_emulated_instruction = skip_emulated_instruction,
2688         .patch_hypercall = vmx_patch_hypercall,
2689         .get_irq = vmx_get_irq,
2690         .set_irq = vmx_inject_irq,
2691         .queue_exception = vmx_queue_exception,
2692         .exception_injected = vmx_exception_injected,
2693         .inject_pending_irq = vmx_intr_assist,
2694         .inject_pending_vectors = do_interrupt_requests,
2695
2696         .set_tss_addr = vmx_set_tss_addr,
2697 };
2698
2699 static int __init vmx_init(void)
2700 {
2701         void *iova;
2702         int r;
2703
2704         vmx_io_bitmap_a = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2705         if (!vmx_io_bitmap_a)
2706                 return -ENOMEM;
2707
2708         vmx_io_bitmap_b = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2709         if (!vmx_io_bitmap_b) {
2710                 r = -ENOMEM;
2711                 goto out;
2712         }
2713
2714         /*
2715          * Allow direct access to the PC debug port (it is often used for I/O
2716          * delays, but the vmexits simply slow things down).
2717          */
2718         iova = kmap(vmx_io_bitmap_a);
2719         memset(iova, 0xff, PAGE_SIZE);
2720         clear_bit(0x80, iova);
2721         kunmap(vmx_io_bitmap_a);
2722
2723         iova = kmap(vmx_io_bitmap_b);
2724         memset(iova, 0xff, PAGE_SIZE);
2725         kunmap(vmx_io_bitmap_b);
2726
2727         set_bit(0, vmx_vpid_bitmap); /* 0 is reserved for host */
2728
2729         r = kvm_init(&vmx_x86_ops, sizeof(struct vcpu_vmx), THIS_MODULE);
2730         if (r)
2731                 goto out1;
2732
2733         if (bypass_guest_pf)
2734                 kvm_mmu_set_nonpresent_ptes(~0xffeull, 0ull);
2735
2736         return 0;
2737
2738 out1:
2739         __free_page(vmx_io_bitmap_b);
2740 out:
2741         __free_page(vmx_io_bitmap_a);
2742         return r;
2743 }
2744
2745 static void __exit vmx_exit(void)
2746 {
2747         __free_page(vmx_io_bitmap_b);
2748         __free_page(vmx_io_bitmap_a);
2749
2750         kvm_exit();
2751 }
2752
2753 module_init(vmx_init)
2754 module_exit(vmx_exit)