arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <trace/events/kvm.h>
  50
  51 #define CREATE_TRACE_POINTS
  52 #include "trace.h"
  53
  54 #include <asm/debugreg.h>
  55 #include <asm/msr.h>
  56 #include <asm/desc.h>
  57 #include <asm/mtrr.h>
  58 #include <asm/mce.h>
  59 #include <asm/i387.h>
  60 #include <asm/xcr.h>
  61 #include <asm/pvclock.h>
  62 #include <asm/div64.h>
  63
  64 #define MAX_IO_MSRS 256
  65 #define KVM_MAX_MCE_BANKS 32
  66 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  67
  68 #define emul_to_vcpu(ctxt) \
  69         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  70
  71 /* EFER defaults:
  72  * - enable syscall per default because its emulated by KVM
  73  * - enable LME and LMA per default on 64 bit KVM
  74  */
  75 #ifdef CONFIG_X86_64
  76 static
  77 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  78 #else
  79 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  80 #endif
  81
  82 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  83 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  84
  85 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  86 static void process_nmi(struct kvm_vcpu *vcpu);
  87
  88 struct kvm_x86_ops *kvm_x86_ops;
  89 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  90
  91 static bool ignore_msrs = 0;
  92 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  93
  94 bool kvm_has_tsc_control;
  95 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  96 u32  kvm_max_guest_tsc_khz;
  97 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  98
  99 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 100 static u32 tsc_tolerance_ppm = 250;
 101 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 102
 103 #define KVM_NR_SHARED_MSRS 16
 104
 105 struct kvm_shared_msrs_global {
 106         int nr;
 107         u32 msrs[KVM_NR_SHARED_MSRS];
 108 };
 109
 110 struct kvm_shared_msrs {
 111         struct user_return_notifier urn;
 112         bool registered;
 113         struct kvm_shared_msr_values {
 114                 u64 host;
 115                 u64 curr;
 116         } values[KVM_NR_SHARED_MSRS];
 117 };
 118
 119 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 120 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 121
 122 struct kvm_stats_debugfs_item debugfs_entries[] = {
 123         { "pf_fixed", VCPU_STAT(pf_fixed) },
 124         { "pf_guest", VCPU_STAT(pf_guest) },
 125         { "tlb_flush", VCPU_STAT(tlb_flush) },
 126         { "invlpg", VCPU_STAT(invlpg) },
 127         { "exits", VCPU_STAT(exits) },
 128         { "io_exits", VCPU_STAT(io_exits) },
 129         { "mmio_exits", VCPU_STAT(mmio_exits) },
 130         { "signal_exits", VCPU_STAT(signal_exits) },
 131         { "irq_window", VCPU_STAT(irq_window_exits) },
 132         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 133         { "halt_exits", VCPU_STAT(halt_exits) },
 134         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 135         { "hypercalls", VCPU_STAT(hypercalls) },
 136         { "request_irq", VCPU_STAT(request_irq_exits) },
 137         { "irq_exits", VCPU_STAT(irq_exits) },
 138         { "host_state_reload", VCPU_STAT(host_state_reload) },
 139         { "efer_reload", VCPU_STAT(efer_reload) },
 140         { "fpu_reload", VCPU_STAT(fpu_reload) },
 141         { "insn_emulation", VCPU_STAT(insn_emulation) },
 142         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 143         { "irq_injections", VCPU_STAT(irq_injections) },
 144         { "nmi_injections", VCPU_STAT(nmi_injections) },
 145         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 146         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 147         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 148         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 149         { "mmu_flooded", VM_STAT(mmu_flooded) },
 150         { "mmu_recycled", VM_STAT(mmu_recycled) },
 151         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 152         { "mmu_unsync", VM_STAT(mmu_unsync) },
 153         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 154         { "largepages", VM_STAT(lpages) },
 155         { NULL }
 156 };
 157
 158 u64 __read_mostly host_xcr0;
 159
 160 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 161
 162 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 163 {
 164         int i;
 165         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 166                 vcpu->arch.apf.gfns[i] = ~0;
 167 }
 168
 169 static void kvm_on_user_return(struct user_return_notifier *urn)
 170 {
 171         unsigned slot;
 172         struct kvm_shared_msrs *locals
 173                 = container_of(urn, struct kvm_shared_msrs, urn);
 174         struct kvm_shared_msr_values *values;
 175
 176         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 177                 values = &locals->values[slot];
 178                 if (values->host != values->curr) {
 179                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 180                         values->curr = values->host;
 181                 }
 182         }
 183         locals->registered = false;
 184         user_return_notifier_unregister(urn);
 185 }
 186
 187 static void shared_msr_update(unsigned slot, u32 msr)
 188 {
 189         struct kvm_shared_msrs *smsr;
 190         u64 value;
 191
 192         smsr = &__get_cpu_var(shared_msrs);
 193         /* only read, and nobody should modify it at this time,
 194          * so don't need lock */
 195         if (slot >= shared_msrs_global.nr) {
 196                 printk(KERN_ERR "kvm: invalid MSR slot!");
 197                 return;
 198         }
 199         rdmsrl_safe(msr, &value);
 200         smsr->values[slot].host = value;
 201         smsr->values[slot].curr = value;
 202 }
 203
 204 void kvm_define_shared_msr(unsigned slot, u32 msr)
 205 {
 206         if (slot >= shared_msrs_global.nr)
 207                 shared_msrs_global.nr = slot + 1;
 208         shared_msrs_global.msrs[slot] = msr;
 209         /* we need ensured the shared_msr_global have been updated */
 210         smp_wmb();
 211 }
 212 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 213
 214 static void kvm_shared_msr_cpu_online(void)
 215 {
 216         unsigned i;
 217
 218         for (i = 0; i < shared_msrs_global.nr; ++i)
 219                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 220 }
 221
 222 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 223 {
 224         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 225
 226         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 227                 return;
 228         smsr->values[slot].curr = value;
 229         wrmsrl(shared_msrs_global.msrs[slot], value);
 230         if (!smsr->registered) {
 231                 smsr->urn.on_user_return = kvm_on_user_return;
 232                 user_return_notifier_register(&smsr->urn);
 233                 smsr->registered = true;
 234         }
 235 }
 236 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 237
 238 static void drop_user_return_notifiers(void *ignore)
 239 {
 240         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 241
 242         if (smsr->registered)
 243                 kvm_on_user_return(&smsr->urn);
 244 }
 245
 246 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 247 {
 248         if (irqchip_in_kernel(vcpu->kvm))
 249                 return vcpu->arch.apic_base;
 250         else
 251                 return vcpu->arch.apic_base;
 252 }
 253 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 254
 255 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 256 {
 257         /* TODO: reserve bits check */
 258         if (irqchip_in_kernel(vcpu->kvm))
 259                 kvm_lapic_set_base(vcpu, data);
 260         else
 261                 vcpu->arch.apic_base = data;
 262 }
 263 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 264
 265 #define EXCPT_BENIGN            0
 266 #define EXCPT_CONTRIBUTORY      1
 267 #define EXCPT_PF                2
 268
 269 static int exception_class(int vector)
 270 {
 271         switch (vector) {
 272         case PF_VECTOR:
 273                 return EXCPT_PF;
 274         case DE_VECTOR:
 275         case TS_VECTOR:
 276         case NP_VECTOR:
 277         case SS_VECTOR:
 278         case GP_VECTOR:
 279                 return EXCPT_CONTRIBUTORY;
 280         default:
 281                 break;
 282         }
 283         return EXCPT_BENIGN;
 284 }
 285
 286 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 287                 unsigned nr, bool has_error, u32 error_code,
 288                 bool reinject)
 289 {
 290         u32 prev_nr;
 291         int class1, class2;
 292
 293         kvm_make_request(KVM_REQ_EVENT, vcpu);
 294
 295         if (!vcpu->arch.exception.pending) {
 296         queue:
 297                 vcpu->arch.exception.pending = true;
 298                 vcpu->arch.exception.has_error_code = has_error;
 299                 vcpu->arch.exception.nr = nr;
 300                 vcpu->arch.exception.error_code = error_code;
 301                 vcpu->arch.exception.reinject = reinject;
 302                 return;
 303         }
 304
 305         /* to check exception */
 306         prev_nr = vcpu->arch.exception.nr;
 307         if (prev_nr == DF_VECTOR) {
 308                 /* triple fault -> shutdown */
 309                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 310                 return;
 311         }
 312         class1 = exception_class(prev_nr);
 313         class2 = exception_class(nr);
 314         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 315                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 316                 /* generate double fault per SDM Table 5-5 */
 317                 vcpu->arch.exception.pending = true;
 318                 vcpu->arch.exception.has_error_code = true;
 319                 vcpu->arch.exception.nr = DF_VECTOR;
 320                 vcpu->arch.exception.error_code = 0;
 321         } else
 322                 /* replace previous exception with a new one in a hope
 323                    that instruction re-execution will regenerate lost
 324                    exception */
 325                 goto queue;
 326 }
 327
 328 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 329 {
 330         kvm_multiple_exception(vcpu, nr, false, 0, false);
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 333
 334 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 335 {
 336         kvm_multiple_exception(vcpu, nr, false, 0, true);
 337 }
 338 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 339
 340 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 341 {
 342         if (err)
 343                 kvm_inject_gp(vcpu, 0);
 344         else
 345                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 346 }
 347 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 348
 349 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 350 {
 351         ++vcpu->stat.pf_guest;
 352         vcpu->arch.cr2 = fault->address;
 353         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 354 }
 355 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 356
 357 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 358 {
 359         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 360                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 361         else
 362                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 363 }
 364
 365 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 366 {
 367         atomic_inc(&vcpu->arch.nmi_queued);
 368         kvm_make_request(KVM_REQ_NMI, vcpu);
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 371
 372 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 373 {
 374         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 377
 378 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 379 {
 380         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 383
 384 /*
 385  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 386  * a #GP and return false.
 387  */
 388 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 389 {
 390         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 391                 return true;
 392         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 393         return false;
 394 }
 395 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 396
 397 /*
 398  * This function will be used to read from the physical memory of the currently
 399  * running guest. The difference to kvm_read_guest_page is that this function
 400  * can read from guest physical or from the guest's guest physical memory.
 401  */
 402 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 403                             gfn_t ngfn, void *data, int offset, int len,
 404                             u32 access)
 405 {
 406         gfn_t real_gfn;
 407         gpa_t ngpa;
 408
 409         ngpa     = gfn_to_gpa(ngfn);
 410         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 411         if (real_gfn == UNMAPPED_GVA)
 412                 return -EFAULT;
 413
 414         real_gfn = gpa_to_gfn(real_gfn);
 415
 416         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 417 }
 418 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 419
 420 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 421                                void *data, int offset, int len, u32 access)
 422 {
 423         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 424                                        data, offset, len, access);
 425 }
 426
 427 /*
 428  * Load the pae pdptrs.  Return true is they are all valid.
 429  */
 430 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 431 {
 432         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 433         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 434         int i;
 435         int ret;
 436         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 437
 438         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 439                                       offset * sizeof(u64), sizeof(pdpte),
 440                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 441         if (ret < 0) {
 442                 ret = 0;
 443                 goto out;
 444         }
 445         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 446                 if (is_present_gpte(pdpte[i]) &&
 447                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 448                         ret = 0;
 449                         goto out;
 450                 }
 451         }
 452         ret = 1;
 453
 454         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 455         __set_bit(VCPU_EXREG_PDPTR,
 456                   (unsigned long *)&vcpu->arch.regs_avail);
 457         __set_bit(VCPU_EXREG_PDPTR,
 458                   (unsigned long *)&vcpu->arch.regs_dirty);
 459 out:
 460
 461         return ret;
 462 }
 463 EXPORT_SYMBOL_GPL(load_pdptrs);
 464
 465 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 466 {
 467         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 468         bool changed = true;
 469         int offset;
 470         gfn_t gfn;
 471         int r;
 472
 473         if (is_long_mode(vcpu) || !is_pae(vcpu))
 474                 return false;
 475
 476         if (!test_bit(VCPU_EXREG_PDPTR,
 477                       (unsigned long *)&vcpu->arch.regs_avail))
 478                 return true;
 479
 480         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 481         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 482         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 483                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 484         if (r < 0)
 485                 goto out;
 486         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 487 out:
 488
 489         return changed;
 490 }
 491
 492 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 493 {
 494         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 495         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 496                                     X86_CR0_CD | X86_CR0_NW;
 497
 498         cr0 |= X86_CR0_ET;
 499
 500 #ifdef CONFIG_X86_64
 501         if (cr0 & 0xffffffff00000000UL)
 502                 return 1;
 503 #endif
 504
 505         cr0 &= ~CR0_RESERVED_BITS;
 506
 507         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 508                 return 1;
 509
 510         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 511                 return 1;
 512
 513         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 514 #ifdef CONFIG_X86_64
 515                 if ((vcpu->arch.efer & EFER_LME)) {
 516                         int cs_db, cs_l;
 517
 518                         if (!is_pae(vcpu))
 519                                 return 1;
 520                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 521                         if (cs_l)
 522                                 return 1;
 523                 } else
 524 #endif
 525                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 526                                                  kvm_read_cr3(vcpu)))
 527                         return 1;
 528         }
 529
 530         kvm_x86_ops->set_cr0(vcpu, cr0);
 531
 532         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 533                 kvm_clear_async_pf_completion_queue(vcpu);
 534                 kvm_async_pf_hash_reset(vcpu);
 535         }
 536
 537         if ((cr0 ^ old_cr0) & update_bits)
 538                 kvm_mmu_reset_context(vcpu);
 539         return 0;
 540 }
 541 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 542
 543 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 544 {
 545         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 546 }
 547 EXPORT_SYMBOL_GPL(kvm_lmsw);
 548
 549 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 550 {
 551         u64 xcr0;
 552
 553         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 554         if (index != XCR_XFEATURE_ENABLED_MASK)
 555                 return 1;
 556         xcr0 = xcr;
 557         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 558                 return 1;
 559         if (!(xcr0 & XSTATE_FP))
 560                 return 1;
 561         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 562                 return 1;
 563         if (xcr0 & ~host_xcr0)
 564                 return 1;
 565         vcpu->arch.xcr0 = xcr0;
 566         vcpu->guest_xcr0_loaded = 0;
 567         return 0;
 568 }
 569
 570 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 571 {
 572         if (__kvm_set_xcr(vcpu, index, xcr)) {
 573                 kvm_inject_gp(vcpu, 0);
 574                 return 1;
 575         }
 576         return 0;
 577 }
 578 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 579
 580 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 581 {
 582         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 583         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 584                                    X86_CR4_PAE | X86_CR4_SMEP;
 585         if (cr4 & CR4_RESERVED_BITS)
 586                 return 1;
 587
 588         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 589                 return 1;
 590
 591         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 592                 return 1;
 593
 594         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 595                 return 1;
 596
 597         if (is_long_mode(vcpu)) {
 598                 if (!(cr4 & X86_CR4_PAE))
 599                         return 1;
 600         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 601                    && ((cr4 ^ old_cr4) & pdptr_bits)
 602                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 603                                    kvm_read_cr3(vcpu)))
 604                 return 1;
 605
 606         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 607                 return 1;
 608
 609         if ((cr4 ^ old_cr4) & pdptr_bits)
 610                 kvm_mmu_reset_context(vcpu);
 611
 612         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 613                 kvm_update_cpuid(vcpu);
 614
 615         return 0;
 616 }
 617 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 618
 619 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 620 {
 621         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 622                 kvm_mmu_sync_roots(vcpu);
 623                 kvm_mmu_flush_tlb(vcpu);
 624                 return 0;
 625         }
 626
 627         if (is_long_mode(vcpu)) {
 628                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 629                         return 1;
 630         } else {
 631                 if (is_pae(vcpu)) {
 632                         if (cr3 & CR3_PAE_RESERVED_BITS)
 633                                 return 1;
 634                         if (is_paging(vcpu) &&
 635                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 636                                 return 1;
 637                 }
 638                 /*
 639                  * We don't check reserved bits in nonpae mode, because
 640                  * this isn't enforced, and VMware depends on this.
 641                  */
 642         }
 643
 644         /*
 645          * Does the new cr3 value map to physical memory? (Note, we
 646          * catch an invalid cr3 even in real-mode, because it would
 647          * cause trouble later on when we turn on paging anyway.)
 648          *
 649          * A real CPU would silently accept an invalid cr3 and would
 650          * attempt to use it - with largely undefined (and often hard
 651          * to debug) behavior on the guest side.
 652          */
 653         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 654                 return 1;
 655         vcpu->arch.cr3 = cr3;
 656         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 657         vcpu->arch.mmu.new_cr3(vcpu);
 658         return 0;
 659 }
 660 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 661
 662 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 663 {
 664         if (cr8 & CR8_RESERVED_BITS)
 665                 return 1;
 666         if (irqchip_in_kernel(vcpu->kvm))
 667                 kvm_lapic_set_tpr(vcpu, cr8);
 668         else
 669                 vcpu->arch.cr8 = cr8;
 670         return 0;
 671 }
 672 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 673
 674 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 675 {
 676         if (irqchip_in_kernel(vcpu->kvm))
 677                 return kvm_lapic_get_cr8(vcpu);
 678         else
 679                 return vcpu->arch.cr8;
 680 }
 681 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 682
 683 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 684 {
 685         switch (dr) {
 686         case 0 ... 3:
 687                 vcpu->arch.db[dr] = val;
 688                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 689                         vcpu->arch.eff_db[dr] = val;
 690                 break;
 691         case 4:
 692                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 693                         return 1; /* #UD */
 694                 /* fall through */
 695         case 6:
 696                 if (val & 0xffffffff00000000ULL)
 697                         return -1; /* #GP */
 698                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 699                 break;
 700         case 5:
 701                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 702                         return 1; /* #UD */
 703                 /* fall through */
 704         default: /* 7 */
 705                 if (val & 0xffffffff00000000ULL)
 706                         return -1; /* #GP */
 707                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 708                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 709                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 710                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 711                 }
 712                 break;
 713         }
 714
 715         return 0;
 716 }
 717
 718 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 719 {
 720         int res;
 721
 722         res = __kvm_set_dr(vcpu, dr, val);
 723         if (res > 0)
 724                 kvm_queue_exception(vcpu, UD_VECTOR);
 725         else if (res < 0)
 726                 kvm_inject_gp(vcpu, 0);
 727
 728         return res;
 729 }
 730 EXPORT_SYMBOL_GPL(kvm_set_dr);
 731
 732 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 733 {
 734         switch (dr) {
 735         case 0 ... 3:
 736                 *val = vcpu->arch.db[dr];
 737                 break;
 738         case 4:
 739                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 740                         return 1;
 741                 /* fall through */
 742         case 6:
 743                 *val = vcpu->arch.dr6;
 744                 break;
 745         case 5:
 746                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 747                         return 1;
 748                 /* fall through */
 749         default: /* 7 */
 750                 *val = vcpu->arch.dr7;
 751                 break;
 752         }
 753
 754         return 0;
 755 }
 756
 757 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 758 {
 759         if (_kvm_get_dr(vcpu, dr, val)) {
 760                 kvm_queue_exception(vcpu, UD_VECTOR);
 761                 return 1;
 762         }
 763         return 0;
 764 }
 765 EXPORT_SYMBOL_GPL(kvm_get_dr);
 766
 767 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 768 {
 769         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 770         u64 data;
 771         int err;
 772
 773         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 774         if (err)
 775                 return err;
 776         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 777         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 778         return err;
 779 }
 780 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 781
 782 /*
 783  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 784  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 785  *
 786  * This list is modified at module load time to reflect the
 787  * capabilities of the host cpu. This capabilities test skips MSRs that are
 788  * kvm-specific. Those are put in the beginning of the list.
 789  */
 790
 791 #define KVM_SAVE_MSRS_BEGIN     9
 792 static u32 msrs_to_save[] = {
 793         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 794         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 795         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 796         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 797         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 798         MSR_STAR,
 799 #ifdef CONFIG_X86_64
 800         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 801 #endif
 802         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 803 };
 804
 805 static unsigned num_msrs_to_save;
 806
 807 static u32 emulated_msrs[] = {
 808         MSR_IA32_TSCDEADLINE,
 809         MSR_IA32_MISC_ENABLE,
 810         MSR_IA32_MCG_STATUS,
 811         MSR_IA32_MCG_CTL,
 812 };
 813
 814 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 815 {
 816         u64 old_efer = vcpu->arch.efer;
 817
 818         if (efer & efer_reserved_bits)
 819                 return 1;
 820
 821         if (is_paging(vcpu)
 822             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 823                 return 1;
 824
 825         if (efer & EFER_FFXSR) {
 826                 struct kvm_cpuid_entry2 *feat;
 827
 828                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 829                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 830                         return 1;
 831         }
 832
 833         if (efer & EFER_SVME) {
 834                 struct kvm_cpuid_entry2 *feat;
 835
 836                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 837                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 838                         return 1;
 839         }
 840
 841         efer &= ~EFER_LMA;
 842         efer |= vcpu->arch.efer & EFER_LMA;
 843
 844         kvm_x86_ops->set_efer(vcpu, efer);
 845
 846         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 847
 848         /* Update reserved bits */
 849         if ((efer ^ old_efer) & EFER_NX)
 850                 kvm_mmu_reset_context(vcpu);
 851
 852         return 0;
 853 }
 854
 855 void kvm_enable_efer_bits(u64 mask)
 856 {
 857        efer_reserved_bits &= ~mask;
 858 }
 859 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 860
 861
 862 /*
 863  * Writes msr value into into the appropriate "register".
 864  * Returns 0 on success, non-0 otherwise.
 865  * Assumes vcpu_load() was already called.
 866  */
 867 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 868 {
 869         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 870 }
 871
 872 /*
 873  * Adapt set_msr() to msr_io()'s calling convention
 874  */
 875 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 876 {
 877         return kvm_set_msr(vcpu, index, *data);
 878 }
 879
 880 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 881 {
 882         int version;
 883         int r;
 884         struct pvclock_wall_clock wc;
 885         struct timespec boot;
 886
 887         if (!wall_clock)
 888                 return;
 889
 890         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 891         if (r)
 892                 return;
 893
 894         if (version & 1)
 895                 ++version;  /* first time write, random junk */
 896
 897         ++version;
 898
 899         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 900
 901         /*
 902          * The guest calculates current wall clock time by adding
 903          * system time (updated by kvm_guest_time_update below) to the
 904          * wall clock specified here.  guest system time equals host
 905          * system time for us, thus we must fill in host boot time here.
 906          */
 907         getboottime(&boot);
 908
 909         wc.sec = boot.tv_sec;
 910         wc.nsec = boot.tv_nsec;
 911         wc.version = version;
 912
 913         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 914
 915         version++;
 916         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 917 }
 918
 919 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 920 {
 921         uint32_t quotient, remainder;
 922
 923         /* Don't try to replace with do_div(), this one calculates
 924          * "(dividend << 32) / divisor" */
 925         __asm__ ( "divl %4"
 926                   : "=a" (quotient), "=d" (remainder)
 927                   : "0" (0), "1" (dividend), "r" (divisor) );
 928         return quotient;
 929 }
 930
 931 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 932                                s8 *pshift, u32 *pmultiplier)
 933 {
 934         uint64_t scaled64;
 935         int32_t  shift = 0;
 936         uint64_t tps64;
 937         uint32_t tps32;
 938
 939         tps64 = base_khz * 1000LL;
 940         scaled64 = scaled_khz * 1000LL;
 941         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 942                 tps64 >>= 1;
 943                 shift--;
 944         }
 945
 946         tps32 = (uint32_t)tps64;
 947         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 948                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 949                         scaled64 >>= 1;
 950                 else
 951                         tps32 <<= 1;
 952                 shift++;
 953         }
 954
 955         *pshift = shift;
 956         *pmultiplier = div_frac(scaled64, tps32);
 957
 958         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 959                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 960 }
 961
 962 static inline u64 get_kernel_ns(void)
 963 {
 964         struct timespec ts;
 965
 966         WARN_ON(preemptible());
 967         ktime_get_ts(&ts);
 968         monotonic_to_bootbased(&ts);
 969         return timespec_to_ns(&ts);
 970 }
 971
 972 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 973 unsigned long max_tsc_khz;
 974
 975 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
 976 {
 977         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
 978                                    vcpu->arch.virtual_tsc_shift);
 979 }
 980
 981 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
 982 {
 983         u64 v = (u64)khz * (1000000 + ppm);
 984         do_div(v, 1000000);
 985         return v;
 986 }
 987
 988 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
 989 {
 990         u32 thresh_lo, thresh_hi;
 991         int use_scaling = 0;
 992
 993         /* Compute a scale to convert nanoseconds in TSC cycles */
 994         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
 995                            &vcpu->arch.virtual_tsc_shift,
 996                            &vcpu->arch.virtual_tsc_mult);
 997         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
 998
 999         /*
1000          * Compute the variation in TSC rate which is acceptable
1001          * within the range of tolerance and decide if the
1002          * rate being applied is within that bounds of the hardware
1003          * rate.  If so, no scaling or compensation need be done.
1004          */
1005         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1006         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1007         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1008                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1009                 use_scaling = 1;
1010         }
1011         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1012 }
1013
1014 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1015 {
1016         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1017                                       vcpu->arch.virtual_tsc_mult,
1018                                       vcpu->arch.virtual_tsc_shift);
1019         tsc += vcpu->arch.this_tsc_write;
1020         return tsc;
1021 }
1022
1023 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1024 {
1025         struct kvm *kvm = vcpu->kvm;
1026         u64 offset, ns, elapsed;
1027         unsigned long flags;
1028         s64 nsdiff;
1029
1030         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1031         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1032         ns = get_kernel_ns();
1033         elapsed = ns - kvm->arch.last_tsc_nsec;
1034
1035         /* n.b - signed multiplication and division required */
1036         nsdiff = data - kvm->arch.last_tsc_write;
1037 #ifdef CONFIG_X86_64
1038         nsdiff = (nsdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1039 #else
1040         /* do_div() only does unsigned */
1041         asm("idivl %2; xor %%edx, %%edx"
1042             : "=A"(nsdiff)
1043             : "A"(nsdiff * 1000), "rm"(vcpu->arch.virtual_tsc_khz));
1044 #endif
1045         nsdiff -= elapsed;
1046         if (nsdiff < 0)
1047                 nsdiff = -nsdiff;
1048
1049         /*
1050          * Special case: TSC write with a small delta (1 second) of virtual
1051          * cycle time against real time is interpreted as an attempt to
1052          * synchronize the CPU.
1053          *
1054          * For a reliable TSC, we can match TSC offsets, and for an unstable
1055          * TSC, we add elapsed time in this computation.  We could let the
1056          * compensation code attempt to catch up if we fall behind, but
1057          * it's better to try to match offsets from the beginning.
1058          */
1059         if (nsdiff < NSEC_PER_SEC &&
1060             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1061                 if (!check_tsc_unstable()) {
1062                         offset = kvm->arch.cur_tsc_offset;
1063                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1064                 } else {
1065                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1066                         data += delta;
1067                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1068                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1069                 }
1070         } else {
1071                 /*
1072                  * We split periods of matched TSC writes into generations.
1073                  * For each generation, we track the original measured
1074                  * nanosecond time, offset, and write, so if TSCs are in
1075                  * sync, we can match exact offset, and if not, we can match
1076                  * exact software computaion in compute_guest_tsc()
1077                  *
1078                  * These values are tracked in kvm->arch.cur_xxx variables.
1079                  */
1080                 kvm->arch.cur_tsc_generation++;
1081                 kvm->arch.cur_tsc_nsec = ns;
1082                 kvm->arch.cur_tsc_write = data;
1083                 kvm->arch.cur_tsc_offset = offset;
1084                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1085                          kvm->arch.cur_tsc_generation, data);
1086         }
1087
1088         /*
1089          * We also track th most recent recorded KHZ, write and time to
1090          * allow the matching interval to be extended at each write.
1091          */
1092         kvm->arch.last_tsc_nsec = ns;
1093         kvm->arch.last_tsc_write = data;
1094         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1095
1096         /* Reset of TSC must disable overshoot protection below */
1097         vcpu->arch.hv_clock.tsc_timestamp = 0;
1098         vcpu->arch.last_guest_tsc = data;
1099
1100         /* Keep track of which generation this VCPU has synchronized to */
1101         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1102         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1103         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1104
1105         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1106         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1107 }
1108
1109 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1110
1111 static int kvm_guest_time_update(struct kvm_vcpu *v)
1112 {
1113         unsigned long flags;
1114         struct kvm_vcpu_arch *vcpu = &v->arch;
1115         void *shared_kaddr;
1116         unsigned long this_tsc_khz;
1117         s64 kernel_ns, max_kernel_ns;
1118         u64 tsc_timestamp;
1119
1120         /* Keep irq disabled to prevent changes to the clock */
1121         local_irq_save(flags);
1122         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1123         kernel_ns = get_kernel_ns();
1124         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1125         if (unlikely(this_tsc_khz == 0)) {
1126                 local_irq_restore(flags);
1127                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1128                 return 1;
1129         }
1130
1131         /*
1132          * We may have to catch up the TSC to match elapsed wall clock
1133          * time for two reasons, even if kvmclock is used.
1134          *   1) CPU could have been running below the maximum TSC rate
1135          *   2) Broken TSC compensation resets the base at each VCPU
1136          *      entry to avoid unknown leaps of TSC even when running
1137          *      again on the same CPU.  This may cause apparent elapsed
1138          *      time to disappear, and the guest to stand still or run
1139          *      very slowly.
1140          */
1141         if (vcpu->tsc_catchup) {
1142                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1143                 if (tsc > tsc_timestamp) {
1144                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1145                         tsc_timestamp = tsc;
1146                 }
1147         }
1148
1149         local_irq_restore(flags);
1150
1151         if (!vcpu->time_page)
1152                 return 0;
1153
1154         /*
1155          * Time as measured by the TSC may go backwards when resetting the base
1156          * tsc_timestamp.  The reason for this is that the TSC resolution is
1157          * higher than the resolution of the other clock scales.  Thus, many
1158          * possible measurments of the TSC correspond to one measurement of any
1159          * other clock, and so a spread of values is possible.  This is not a
1160          * problem for the computation of the nanosecond clock; with TSC rates
1161          * around 1GHZ, there can only be a few cycles which correspond to one
1162          * nanosecond value, and any path through this code will inevitably
1163          * take longer than that.  However, with the kernel_ns value itself,
1164          * the precision may be much lower, down to HZ granularity.  If the
1165          * first sampling of TSC against kernel_ns ends in the low part of the
1166          * range, and the second in the high end of the range, we can get:
1167          *
1168          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1169          *
1170          * As the sampling errors potentially range in the thousands of cycles,
1171          * it is possible such a time value has already been observed by the
1172          * guest.  To protect against this, we must compute the system time as
1173          * observed by the guest and ensure the new system time is greater.
1174          */
1175         max_kernel_ns = 0;
1176         if (vcpu->hv_clock.tsc_timestamp) {
1177                 max_kernel_ns = vcpu->last_guest_tsc -
1178                                 vcpu->hv_clock.tsc_timestamp;
1179                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1180                                     vcpu->hv_clock.tsc_to_system_mul,
1181                                     vcpu->hv_clock.tsc_shift);
1182                 max_kernel_ns += vcpu->last_kernel_ns;
1183         }
1184
1185         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1186                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1187                                    &vcpu->hv_clock.tsc_shift,
1188                                    &vcpu->hv_clock.tsc_to_system_mul);
1189                 vcpu->hw_tsc_khz = this_tsc_khz;
1190         }
1191
1192         if (max_kernel_ns > kernel_ns)
1193                 kernel_ns = max_kernel_ns;
1194
1195         /* With all the info we got, fill in the values */
1196         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1197         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1198         vcpu->last_kernel_ns = kernel_ns;
1199         vcpu->last_guest_tsc = tsc_timestamp;
1200         vcpu->hv_clock.flags = 0;
1201
1202         /*
1203          * The interface expects us to write an even number signaling that the
1204          * update is finished. Since the guest won't see the intermediate
1205          * state, we just increase by 2 at the end.
1206          */
1207         vcpu->hv_clock.version += 2;
1208
1209         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1210
1211         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1212                sizeof(vcpu->hv_clock));
1213
1214         kunmap_atomic(shared_kaddr, KM_USER0);
1215
1216         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1217         return 0;
1218 }
1219
1220 static bool msr_mtrr_valid(unsigned msr)
1221 {
1222         switch (msr) {
1223         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1224         case MSR_MTRRfix64K_00000:
1225         case MSR_MTRRfix16K_80000:
1226         case MSR_MTRRfix16K_A0000:
1227         case MSR_MTRRfix4K_C0000:
1228         case MSR_MTRRfix4K_C8000:
1229         case MSR_MTRRfix4K_D0000:
1230         case MSR_MTRRfix4K_D8000:
1231         case MSR_MTRRfix4K_E0000:
1232         case MSR_MTRRfix4K_E8000:
1233         case MSR_MTRRfix4K_F0000:
1234         case MSR_MTRRfix4K_F8000:
1235         case MSR_MTRRdefType:
1236         case MSR_IA32_CR_PAT:
1237                 return true;
1238         case 0x2f8:
1239                 return true;
1240         }
1241         return false;
1242 }
1243
1244 static bool valid_pat_type(unsigned t)
1245 {
1246         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1247 }
1248
1249 static bool valid_mtrr_type(unsigned t)
1250 {
1251         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1252 }
1253
1254 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1255 {
1256         int i;
1257
1258         if (!msr_mtrr_valid(msr))
1259                 return false;
1260
1261         if (msr == MSR_IA32_CR_PAT) {
1262                 for (i = 0; i < 8; i++)
1263                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1264                                 return false;
1265                 return true;
1266         } else if (msr == MSR_MTRRdefType) {
1267                 if (data & ~0xcff)
1268                         return false;
1269                 return valid_mtrr_type(data & 0xff);
1270         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1271                 for (i = 0; i < 8 ; i++)
1272                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1273                                 return false;
1274                 return true;
1275         }
1276
1277         /* variable MTRRs */
1278         return valid_mtrr_type(data & 0xff);
1279 }
1280
1281 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1282 {
1283         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1284
1285         if (!mtrr_valid(vcpu, msr, data))
1286                 return 1;
1287
1288         if (msr == MSR_MTRRdefType) {
1289                 vcpu->arch.mtrr_state.def_type = data;
1290                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1291         } else if (msr == MSR_MTRRfix64K_00000)
1292                 p[0] = data;
1293         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1294                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1295         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1296                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1297         else if (msr == MSR_IA32_CR_PAT)
1298                 vcpu->arch.pat = data;
1299         else {  /* Variable MTRRs */
1300                 int idx, is_mtrr_mask;
1301                 u64 *pt;
1302
1303                 idx = (msr - 0x200) / 2;
1304                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1305                 if (!is_mtrr_mask)
1306                         pt =
1307                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1308                 else
1309                         pt =
1310                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1311                 *pt = data;
1312         }
1313
1314         kvm_mmu_reset_context(vcpu);
1315         return 0;
1316 }
1317
1318 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1319 {
1320         u64 mcg_cap = vcpu->arch.mcg_cap;
1321         unsigned bank_num = mcg_cap & 0xff;
1322
1323         switch (msr) {
1324         case MSR_IA32_MCG_STATUS:
1325                 vcpu->arch.mcg_status = data;
1326                 break;
1327         case MSR_IA32_MCG_CTL:
1328                 if (!(mcg_cap & MCG_CTL_P))
1329                         return 1;
1330                 if (data != 0 && data != ~(u64)0)
1331                         return -1;
1332                 vcpu->arch.mcg_ctl = data;
1333                 break;
1334         default:
1335                 if (msr >= MSR_IA32_MC0_CTL &&
1336                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1337                         u32 offset = msr - MSR_IA32_MC0_CTL;
1338                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1339                          * some Linux kernels though clear bit 10 in bank 4 to
1340                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1341                          * this to avoid an uncatched #GP in the guest
1342                          */
1343                         if ((offset & 0x3) == 0 &&
1344                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1345                                 return -1;
1346                         vcpu->arch.mce_banks[offset] = data;
1347                         break;
1348                 }
1349                 return 1;
1350         }
1351         return 0;
1352 }
1353
1354 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1355 {
1356         struct kvm *kvm = vcpu->kvm;
1357         int lm = is_long_mode(vcpu);
1358         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1359                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1360         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1361                 : kvm->arch.xen_hvm_config.blob_size_32;
1362         u32 page_num = data & ~PAGE_MASK;
1363         u64 page_addr = data & PAGE_MASK;
1364         u8 *page;
1365         int r;
1366
1367         r = -E2BIG;
1368         if (page_num >= blob_size)
1369                 goto out;
1370         r = -ENOMEM;
1371         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1372         if (IS_ERR(page)) {
1373                 r = PTR_ERR(page);
1374                 goto out;
1375         }
1376         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1377                 goto out_free;
1378         r = 0;
1379 out_free:
1380         kfree(page);
1381 out:
1382         return r;
1383 }
1384
1385 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1386 {
1387         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1388 }
1389
1390 static bool kvm_hv_msr_partition_wide(u32 msr)
1391 {
1392         bool r = false;
1393         switch (msr) {
1394         case HV_X64_MSR_GUEST_OS_ID:
1395         case HV_X64_MSR_HYPERCALL:
1396                 r = true;
1397                 break;
1398         }
1399
1400         return r;
1401 }
1402
1403 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1404 {
1405         struct kvm *kvm = vcpu->kvm;
1406
1407         switch (msr) {
1408         case HV_X64_MSR_GUEST_OS_ID:
1409                 kvm->arch.hv_guest_os_id = data;
1410                 /* setting guest os id to zero disables hypercall page */
1411                 if (!kvm->arch.hv_guest_os_id)
1412                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1413                 break;
1414         case HV_X64_MSR_HYPERCALL: {
1415                 u64 gfn;
1416                 unsigned long addr;
1417                 u8 instructions[4];
1418
1419                 /* if guest os id is not set hypercall should remain disabled */
1420                 if (!kvm->arch.hv_guest_os_id)
1421                         break;
1422                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1423                         kvm->arch.hv_hypercall = data;
1424                         break;
1425                 }
1426                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1427                 addr = gfn_to_hva(kvm, gfn);
1428                 if (kvm_is_error_hva(addr))
1429                         return 1;
1430                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1431                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1432                 if (__copy_to_user((void __user *)addr, instructions, 4))
1433                         return 1;
1434                 kvm->arch.hv_hypercall = data;
1435                 break;
1436         }
1437         default:
1438                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1439                           "data 0x%llx\n", msr, data);
1440                 return 1;
1441         }
1442         return 0;
1443 }
1444
1445 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1446 {
1447         switch (msr) {
1448         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1449                 unsigned long addr;
1450
1451                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1452                         vcpu->arch.hv_vapic = data;
1453                         break;
1454                 }
1455                 addr = gfn_to_hva(vcpu->kvm, data >>
1456                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1457                 if (kvm_is_error_hva(addr))
1458                         return 1;
1459                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1460                         return 1;
1461                 vcpu->arch.hv_vapic = data;
1462                 break;
1463         }
1464         case HV_X64_MSR_EOI:
1465                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1466         case HV_X64_MSR_ICR:
1467                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1468         case HV_X64_MSR_TPR:
1469                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1470         default:
1471                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1472                           "data 0x%llx\n", msr, data);
1473                 return 1;
1474         }
1475
1476         return 0;
1477 }
1478
1479 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1480 {
1481         gpa_t gpa = data & ~0x3f;
1482
1483         /* Bits 2:5 are resrved, Should be zero */
1484         if (data & 0x3c)
1485                 return 1;
1486
1487         vcpu->arch.apf.msr_val = data;
1488
1489         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1490                 kvm_clear_async_pf_completion_queue(vcpu);
1491                 kvm_async_pf_hash_reset(vcpu);
1492                 return 0;
1493         }
1494
1495         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1496                 return 1;
1497
1498         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1499         kvm_async_pf_wakeup_all(vcpu);
1500         return 0;
1501 }
1502
1503 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1504 {
1505         if (vcpu->arch.time_page) {
1506                 kvm_release_page_dirty(vcpu->arch.time_page);
1507                 vcpu->arch.time_page = NULL;
1508         }
1509 }
1510
1511 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1512 {
1513         u64 delta;
1514
1515         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1516                 return;
1517
1518         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1519         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1520         vcpu->arch.st.accum_steal = delta;
1521 }
1522
1523 static void record_steal_time(struct kvm_vcpu *vcpu)
1524 {
1525         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1526                 return;
1527
1528         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1529                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1530                 return;
1531
1532         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1533         vcpu->arch.st.steal.version += 2;
1534         vcpu->arch.st.accum_steal = 0;
1535
1536         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1537                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1538 }
1539
1540 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1541 {
1542         bool pr = false;
1543
1544         switch (msr) {
1545         case MSR_EFER:
1546                 return set_efer(vcpu, data);
1547         case MSR_K7_HWCR:
1548                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1549                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1550                 if (data != 0) {
1551                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1552                                 data);
1553                         return 1;
1554                 }
1555                 break;
1556         case MSR_FAM10H_MMIO_CONF_BASE:
1557                 if (data != 0) {
1558                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1559                                 "0x%llx\n", data);
1560                         return 1;
1561                 }
1562                 break;
1563         case MSR_AMD64_NB_CFG:
1564                 break;
1565         case MSR_IA32_DEBUGCTLMSR:
1566                 if (!data) {
1567                         /* We support the non-activated case already */
1568                         break;
1569                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1570                         /* Values other than LBR and BTF are vendor-specific,
1571                            thus reserved and should throw a #GP */
1572                         return 1;
1573                 }
1574                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1575                         __func__, data);
1576                 break;
1577         case MSR_IA32_UCODE_REV:
1578         case MSR_IA32_UCODE_WRITE:
1579         case MSR_VM_HSAVE_PA:
1580         case MSR_AMD64_PATCH_LOADER:
1581                 break;
1582         case 0x200 ... 0x2ff:
1583                 return set_msr_mtrr(vcpu, msr, data);
1584         case MSR_IA32_APICBASE:
1585                 kvm_set_apic_base(vcpu, data);
1586                 break;
1587         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1588                 return kvm_x2apic_msr_write(vcpu, msr, data);
1589         case MSR_IA32_TSCDEADLINE:
1590                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1591                 break;
1592         case MSR_IA32_MISC_ENABLE:
1593                 vcpu->arch.ia32_misc_enable_msr = data;
1594                 break;
1595         case MSR_KVM_WALL_CLOCK_NEW:
1596         case MSR_KVM_WALL_CLOCK:
1597                 vcpu->kvm->arch.wall_clock = data;
1598                 kvm_write_wall_clock(vcpu->kvm, data);
1599                 break;
1600         case MSR_KVM_SYSTEM_TIME_NEW:
1601         case MSR_KVM_SYSTEM_TIME: {
1602                 kvmclock_reset(vcpu);
1603
1604                 vcpu->arch.time = data;
1605                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1606
1607                 /* we verify if the enable bit is set... */
1608                 if (!(data & 1))
1609                         break;
1610
1611                 /* ...but clean it before doing the actual write */
1612                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1613
1614                 vcpu->arch.time_page =
1615                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1616
1617                 if (is_error_page(vcpu->arch.time_page)) {
1618                         kvm_release_page_clean(vcpu->arch.time_page);
1619                         vcpu->arch.time_page = NULL;
1620                 }
1621                 break;
1622         }
1623         case MSR_KVM_ASYNC_PF_EN:
1624                 if (kvm_pv_enable_async_pf(vcpu, data))
1625                         return 1;
1626                 break;
1627         case MSR_KVM_STEAL_TIME:
1628
1629                 if (unlikely(!sched_info_on()))
1630                         return 1;
1631
1632                 if (data & KVM_STEAL_RESERVED_MASK)
1633                         return 1;
1634
1635                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1636                                                         data & KVM_STEAL_VALID_BITS))
1637                         return 1;
1638
1639                 vcpu->arch.st.msr_val = data;
1640
1641                 if (!(data & KVM_MSR_ENABLED))
1642                         break;
1643
1644                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1645
1646                 preempt_disable();
1647                 accumulate_steal_time(vcpu);
1648                 preempt_enable();
1649
1650                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1651
1652                 break;
1653
1654         case MSR_IA32_MCG_CTL:
1655         case MSR_IA32_MCG_STATUS:
1656         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1657                 return set_msr_mce(vcpu, msr, data);
1658
1659         /* Performance counters are not protected by a CPUID bit,
1660          * so we should check all of them in the generic path for the sake of
1661          * cross vendor migration.
1662          * Writing a zero into the event select MSRs disables them,
1663          * which we perfectly emulate ;-). Any other value should be at least
1664          * reported, some guests depend on them.
1665          */
1666         case MSR_K7_EVNTSEL0:
1667         case MSR_K7_EVNTSEL1:
1668         case MSR_K7_EVNTSEL2:
1669         case MSR_K7_EVNTSEL3:
1670                 if (data != 0)
1671                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1672                                 "0x%x data 0x%llx\n", msr, data);
1673                 break;
1674         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1675          * so we ignore writes to make it happy.
1676          */
1677         case MSR_K7_PERFCTR0:
1678         case MSR_K7_PERFCTR1:
1679         case MSR_K7_PERFCTR2:
1680         case MSR_K7_PERFCTR3:
1681                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1682                         "0x%x data 0x%llx\n", msr, data);
1683                 break;
1684         case MSR_P6_PERFCTR0:
1685         case MSR_P6_PERFCTR1:
1686                 pr = true;
1687         case MSR_P6_EVNTSEL0:
1688         case MSR_P6_EVNTSEL1:
1689                 if (kvm_pmu_msr(vcpu, msr))
1690                         return kvm_pmu_set_msr(vcpu, msr, data);
1691
1692                 if (pr || data != 0)
1693                         pr_unimpl(vcpu, "disabled perfctr wrmsr: "
1694                                 "0x%x data 0x%llx\n", msr, data);
1695                 break;
1696         case MSR_K7_CLK_CTL:
1697                 /*
1698                  * Ignore all writes to this no longer documented MSR.
1699                  * Writes are only relevant for old K7 processors,
1700                  * all pre-dating SVM, but a recommended workaround from
1701                  * AMD for these chips. It is possible to speicify the
1702                  * affected processor models on the command line, hence
1703                  * the need to ignore the workaround.
1704                  */
1705                 break;
1706         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1707                 if (kvm_hv_msr_partition_wide(msr)) {
1708                         int r;
1709                         mutex_lock(&vcpu->kvm->lock);
1710                         r = set_msr_hyperv_pw(vcpu, msr, data);
1711                         mutex_unlock(&vcpu->kvm->lock);
1712                         return r;
1713                 } else
1714                         return set_msr_hyperv(vcpu, msr, data);
1715                 break;
1716         case MSR_IA32_BBL_CR_CTL3:
1717                 /* Drop writes to this legacy MSR -- see rdmsr
1718                  * counterpart for further detail.
1719                  */
1720                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1721                 break;
1722         case MSR_AMD64_OSVW_ID_LENGTH:
1723                 if (!guest_cpuid_has_osvw(vcpu))
1724                         return 1;
1725                 vcpu->arch.osvw.length = data;
1726                 break;
1727         case MSR_AMD64_OSVW_STATUS:
1728                 if (!guest_cpuid_has_osvw(vcpu))
1729                         return 1;
1730                 vcpu->arch.osvw.status = data;
1731                 break;
1732         default:
1733                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1734                         return xen_hvm_config(vcpu, data);
1735                 if (kvm_pmu_msr(vcpu, msr))
1736                         return kvm_pmu_set_msr(vcpu, msr, data);
1737                 if (!ignore_msrs) {
1738                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1739                                 msr, data);
1740                         return 1;
1741                 } else {
1742                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1743                                 msr, data);
1744                         break;
1745                 }
1746         }
1747         return 0;
1748 }
1749 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1750
1751
1752 /*
1753  * Reads an msr value (of 'msr_index') into 'pdata'.
1754  * Returns 0 on success, non-0 otherwise.
1755  * Assumes vcpu_load() was already called.
1756  */
1757 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1758 {
1759         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1760 }
1761
1762 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1763 {
1764         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1765
1766         if (!msr_mtrr_valid(msr))
1767                 return 1;
1768
1769         if (msr == MSR_MTRRdefType)
1770                 *pdata = vcpu->arch.mtrr_state.def_type +
1771                          (vcpu->arch.mtrr_state.enabled << 10);
1772         else if (msr == MSR_MTRRfix64K_00000)
1773                 *pdata = p[0];
1774         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1775                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1776         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1777                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1778         else if (msr == MSR_IA32_CR_PAT)
1779                 *pdata = vcpu->arch.pat;
1780         else {  /* Variable MTRRs */
1781                 int idx, is_mtrr_mask;
1782                 u64 *pt;
1783
1784                 idx = (msr - 0x200) / 2;
1785                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1786                 if (!is_mtrr_mask)
1787                         pt =
1788                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1789                 else
1790                         pt =
1791                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1792                 *pdata = *pt;
1793         }
1794
1795         return 0;
1796 }
1797
1798 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1799 {
1800         u64 data;
1801         u64 mcg_cap = vcpu->arch.mcg_cap;
1802         unsigned bank_num = mcg_cap & 0xff;
1803
1804         switch (msr) {
1805         case MSR_IA32_P5_MC_ADDR:
1806         case MSR_IA32_P5_MC_TYPE:
1807                 data = 0;
1808                 break;
1809         case MSR_IA32_MCG_CAP:
1810                 data = vcpu->arch.mcg_cap;
1811                 break;
1812         case MSR_IA32_MCG_CTL:
1813                 if (!(mcg_cap & MCG_CTL_P))
1814                         return 1;
1815                 data = vcpu->arch.mcg_ctl;
1816                 break;
1817         case MSR_IA32_MCG_STATUS:
1818                 data = vcpu->arch.mcg_status;
1819                 break;
1820         default:
1821                 if (msr >= MSR_IA32_MC0_CTL &&
1822                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1823                         u32 offset = msr - MSR_IA32_MC0_CTL;
1824                         data = vcpu->arch.mce_banks[offset];
1825                         break;
1826                 }
1827                 return 1;
1828         }
1829         *pdata = data;
1830         return 0;
1831 }
1832
1833 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1834 {
1835         u64 data = 0;
1836         struct kvm *kvm = vcpu->kvm;
1837
1838         switch (msr) {
1839         case HV_X64_MSR_GUEST_OS_ID:
1840                 data = kvm->arch.hv_guest_os_id;
1841                 break;
1842         case HV_X64_MSR_HYPERCALL:
1843                 data = kvm->arch.hv_hypercall;
1844                 break;
1845         default:
1846                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1847                 return 1;
1848         }
1849
1850         *pdata = data;
1851         return 0;
1852 }
1853
1854 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1855 {
1856         u64 data = 0;
1857
1858         switch (msr) {
1859         case HV_X64_MSR_VP_INDEX: {
1860                 int r;
1861                 struct kvm_vcpu *v;
1862                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1863                         if (v == vcpu)
1864                                 data = r;
1865                 break;
1866         }
1867         case HV_X64_MSR_EOI:
1868                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1869         case HV_X64_MSR_ICR:
1870                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1871         case HV_X64_MSR_TPR:
1872                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1873         case HV_X64_MSR_APIC_ASSIST_PAGE:
1874                 data = vcpu->arch.hv_vapic;
1875                 break;
1876         default:
1877                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1878                 return 1;
1879         }
1880         *pdata = data;
1881         return 0;
1882 }
1883
1884 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1885 {
1886         u64 data;
1887
1888         switch (msr) {
1889         case MSR_IA32_PLATFORM_ID:
1890         case MSR_IA32_EBL_CR_POWERON:
1891         case MSR_IA32_DEBUGCTLMSR:
1892         case MSR_IA32_LASTBRANCHFROMIP:
1893         case MSR_IA32_LASTBRANCHTOIP:
1894         case MSR_IA32_LASTINTFROMIP:
1895         case MSR_IA32_LASTINTTOIP:
1896         case MSR_K8_SYSCFG:
1897         case MSR_K7_HWCR:
1898         case MSR_VM_HSAVE_PA:
1899         case MSR_K7_EVNTSEL0:
1900         case MSR_K7_PERFCTR0:
1901         case MSR_K8_INT_PENDING_MSG:
1902         case MSR_AMD64_NB_CFG:
1903         case MSR_FAM10H_MMIO_CONF_BASE:
1904                 data = 0;
1905                 break;
1906         case MSR_P6_PERFCTR0:
1907         case MSR_P6_PERFCTR1:
1908         case MSR_P6_EVNTSEL0:
1909         case MSR_P6_EVNTSEL1:
1910                 if (kvm_pmu_msr(vcpu, msr))
1911                         return kvm_pmu_get_msr(vcpu, msr, pdata);
1912                 data = 0;
1913                 break;
1914         case MSR_IA32_UCODE_REV:
1915                 data = 0x100000000ULL;
1916                 break;
1917         case MSR_MTRRcap:
1918                 data = 0x500 | KVM_NR_VAR_MTRR;
1919                 break;
1920         case 0x200 ... 0x2ff:
1921                 return get_msr_mtrr(vcpu, msr, pdata);
1922         case 0xcd: /* fsb frequency */
1923                 data = 3;
1924                 break;
1925                 /*
1926                  * MSR_EBC_FREQUENCY_ID
1927                  * Conservative value valid for even the basic CPU models.
1928                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1929                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1930                  * and 266MHz for model 3, or 4. Set Core Clock
1931                  * Frequency to System Bus Frequency Ratio to 1 (bits
1932                  * 31:24) even though these are only valid for CPU
1933                  * models > 2, however guests may end up dividing or
1934                  * multiplying by zero otherwise.
1935                  */
1936         case MSR_EBC_FREQUENCY_ID:
1937                 data = 1 << 24;
1938                 break;
1939         case MSR_IA32_APICBASE:
1940                 data = kvm_get_apic_base(vcpu);
1941                 break;
1942         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1943                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1944                 break;
1945         case MSR_IA32_TSCDEADLINE:
1946                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1947                 break;
1948         case MSR_IA32_MISC_ENABLE:
1949                 data = vcpu->arch.ia32_misc_enable_msr;
1950                 break;
1951         case MSR_IA32_PERF_STATUS:
1952                 /* TSC increment by tick */
1953                 data = 1000ULL;
1954                 /* CPU multiplier */
1955                 data |= (((uint64_t)4ULL) << 40);
1956                 break;
1957         case MSR_EFER:
1958                 data = vcpu->arch.efer;
1959                 break;
1960         case MSR_KVM_WALL_CLOCK:
1961         case MSR_KVM_WALL_CLOCK_NEW:
1962                 data = vcpu->kvm->arch.wall_clock;
1963                 break;
1964         case MSR_KVM_SYSTEM_TIME:
1965         case MSR_KVM_SYSTEM_TIME_NEW:
1966                 data = vcpu->arch.time;
1967                 break;
1968         case MSR_KVM_ASYNC_PF_EN:
1969                 data = vcpu->arch.apf.msr_val;
1970                 break;
1971         case MSR_KVM_STEAL_TIME:
1972                 data = vcpu->arch.st.msr_val;
1973                 break;
1974         case MSR_IA32_P5_MC_ADDR:
1975         case MSR_IA32_P5_MC_TYPE:
1976         case MSR_IA32_MCG_CAP:
1977         case MSR_IA32_MCG_CTL:
1978         case MSR_IA32_MCG_STATUS:
1979         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1980                 return get_msr_mce(vcpu, msr, pdata);
1981         case MSR_K7_CLK_CTL:
1982                 /*
1983                  * Provide expected ramp-up count for K7. All other
1984                  * are set to zero, indicating minimum divisors for
1985                  * every field.
1986                  *
1987                  * This prevents guest kernels on AMD host with CPU
1988                  * type 6, model 8 and higher from exploding due to
1989                  * the rdmsr failing.
1990                  */
1991                 data = 0x20000000;
1992                 break;
1993         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1994                 if (kvm_hv_msr_partition_wide(msr)) {
1995                         int r;
1996                         mutex_lock(&vcpu->kvm->lock);
1997                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1998                         mutex_unlock(&vcpu->kvm->lock);
1999                         return r;
2000                 } else
2001                         return get_msr_hyperv(vcpu, msr, pdata);
2002                 break;
2003         case MSR_IA32_BBL_CR_CTL3:
2004                 /* This legacy MSR exists but isn't fully documented in current
2005                  * silicon.  It is however accessed by winxp in very narrow
2006                  * scenarios where it sets bit #19, itself documented as
2007                  * a "reserved" bit.  Best effort attempt to source coherent
2008                  * read data here should the balance of the register be
2009                  * interpreted by the guest:
2010                  *
2011                  * L2 cache control register 3: 64GB range, 256KB size,
2012                  * enabled, latency 0x1, configured
2013                  */
2014                 data = 0xbe702111;
2015                 break;
2016         case MSR_AMD64_OSVW_ID_LENGTH:
2017                 if (!guest_cpuid_has_osvw(vcpu))
2018                         return 1;
2019                 data = vcpu->arch.osvw.length;
2020                 break;
2021         case MSR_AMD64_OSVW_STATUS:
2022                 if (!guest_cpuid_has_osvw(vcpu))
2023                         return 1;
2024                 data = vcpu->arch.osvw.status;
2025                 break;
2026         default:
2027                 if (kvm_pmu_msr(vcpu, msr))
2028                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2029                 if (!ignore_msrs) {
2030                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2031                         return 1;
2032                 } else {
2033                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2034                         data = 0;
2035                 }
2036                 break;
2037         }
2038         *pdata = data;
2039         return 0;
2040 }
2041 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2042
2043 /*
2044  * Read or write a bunch of msrs. All parameters are kernel addresses.
2045  *
2046  * @return number of msrs set successfully.
2047  */
2048 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2049                     struct kvm_msr_entry *entries,
2050                     int (*do_msr)(struct kvm_vcpu *vcpu,
2051                                   unsigned index, u64 *data))
2052 {
2053         int i, idx;
2054
2055         idx = srcu_read_lock(&vcpu->kvm->srcu);
2056         for (i = 0; i < msrs->nmsrs; ++i)
2057                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2058                         break;
2059         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2060
2061         return i;
2062 }
2063
2064 /*
2065  * Read or write a bunch of msrs. Parameters are user addresses.
2066  *
2067  * @return number of msrs set successfully.
2068  */
2069 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2070                   int (*do_msr)(struct kvm_vcpu *vcpu,
2071                                 unsigned index, u64 *data),
2072                   int writeback)
2073 {
2074         struct kvm_msrs msrs;
2075         struct kvm_msr_entry *entries;
2076         int r, n;
2077         unsigned size;
2078
2079         r = -EFAULT;
2080         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2081                 goto out;
2082
2083         r = -E2BIG;
2084         if (msrs.nmsrs >= MAX_IO_MSRS)
2085                 goto out;
2086
2087         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2088         entries = memdup_user(user_msrs->entries, size);
2089         if (IS_ERR(entries)) {
2090                 r = PTR_ERR(entries);
2091                 goto out;
2092         }
2093
2094         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2095         if (r < 0)
2096                 goto out_free;
2097
2098         r = -EFAULT;
2099         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2100                 goto out_free;
2101
2102         r = n;
2103
2104 out_free:
2105         kfree(entries);
2106 out:
2107         return r;
2108 }
2109
2110 int kvm_dev_ioctl_check_extension(long ext)
2111 {
2112         int r;
2113
2114         switch (ext) {
2115         case KVM_CAP_IRQCHIP:
2116         case KVM_CAP_HLT:
2117         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2118         case KVM_CAP_SET_TSS_ADDR:
2119         case KVM_CAP_EXT_CPUID:
2120         case KVM_CAP_CLOCKSOURCE:
2121         case KVM_CAP_PIT:
2122         case KVM_CAP_NOP_IO_DELAY:
2123         case KVM_CAP_MP_STATE:
2124         case KVM_CAP_SYNC_MMU:
2125         case KVM_CAP_USER_NMI:
2126         case KVM_CAP_REINJECT_CONTROL:
2127         case KVM_CAP_IRQ_INJECT_STATUS:
2128         case KVM_CAP_ASSIGN_DEV_IRQ:
2129         case KVM_CAP_IRQFD:
2130         case KVM_CAP_IOEVENTFD:
2131         case KVM_CAP_PIT2:
2132         case KVM_CAP_PIT_STATE2:
2133         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2134         case KVM_CAP_XEN_HVM:
2135         case KVM_CAP_ADJUST_CLOCK:
2136         case KVM_CAP_VCPU_EVENTS:
2137         case KVM_CAP_HYPERV:
2138         case KVM_CAP_HYPERV_VAPIC:
2139         case KVM_CAP_HYPERV_SPIN:
2140         case KVM_CAP_PCI_SEGMENT:
2141         case KVM_CAP_DEBUGREGS:
2142         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2143         case KVM_CAP_XSAVE:
2144         case KVM_CAP_ASYNC_PF:
2145         case KVM_CAP_GET_TSC_KHZ:
2146         case KVM_CAP_PCI_2_3:
2147                 r = 1;
2148                 break;
2149         case KVM_CAP_COALESCED_MMIO:
2150                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2151                 break;
2152         case KVM_CAP_VAPIC:
2153                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2154                 break;
2155         case KVM_CAP_NR_VCPUS:
2156                 r = KVM_SOFT_MAX_VCPUS;
2157                 break;
2158         case KVM_CAP_MAX_VCPUS:
2159                 r = KVM_MAX_VCPUS;
2160                 break;
2161         case KVM_CAP_NR_MEMSLOTS:
2162                 r = KVM_MEMORY_SLOTS;
2163                 break;
2164         case KVM_CAP_PV_MMU:    /* obsolete */
2165                 r = 0;
2166                 break;
2167         case KVM_CAP_IOMMU:
2168                 r = iommu_present(&pci_bus_type);
2169                 break;
2170         case KVM_CAP_MCE:
2171                 r = KVM_MAX_MCE_BANKS;
2172                 break;
2173         case KVM_CAP_XCRS:
2174                 r = cpu_has_xsave;
2175                 break;
2176         case KVM_CAP_TSC_CONTROL:
2177                 r = kvm_has_tsc_control;
2178                 break;
2179         case KVM_CAP_TSC_DEADLINE_TIMER:
2180                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2181                 break;
2182         default:
2183                 r = 0;
2184                 break;
2185         }
2186         return r;
2187
2188 }
2189
2190 long kvm_arch_dev_ioctl(struct file *filp,
2191                         unsigned int ioctl, unsigned long arg)
2192 {
2193         void __user *argp = (void __user *)arg;
2194         long r;
2195
2196         switch (ioctl) {
2197         case KVM_GET_MSR_INDEX_LIST: {
2198                 struct kvm_msr_list __user *user_msr_list = argp;
2199                 struct kvm_msr_list msr_list;
2200                 unsigned n;
2201
2202                 r = -EFAULT;
2203                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2204                         goto out;
2205                 n = msr_list.nmsrs;
2206                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2207                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2208                         goto out;
2209                 r = -E2BIG;
2210                 if (n < msr_list.nmsrs)
2211                         goto out;
2212                 r = -EFAULT;
2213                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2214                                  num_msrs_to_save * sizeof(u32)))
2215                         goto out;
2216                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2217                                  &emulated_msrs,
2218                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2219                         goto out;
2220                 r = 0;
2221                 break;
2222         }
2223         case KVM_GET_SUPPORTED_CPUID: {
2224                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2225                 struct kvm_cpuid2 cpuid;
2226
2227                 r = -EFAULT;
2228                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2229                         goto out;
2230                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2231                                                       cpuid_arg->entries);
2232                 if (r)
2233                         goto out;
2234
2235                 r = -EFAULT;
2236                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2237                         goto out;
2238                 r = 0;
2239                 break;
2240         }
2241         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2242                 u64 mce_cap;
2243
2244                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2245                 r = -EFAULT;
2246                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2247                         goto out;
2248                 r = 0;
2249                 break;
2250         }
2251         default:
2252                 r = -EINVAL;
2253         }
2254 out:
2255         return r;
2256 }
2257
2258 static void wbinvd_ipi(void *garbage)
2259 {
2260         wbinvd();
2261 }
2262
2263 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2264 {
2265         return vcpu->kvm->arch.iommu_domain &&
2266                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2267 }
2268
2269 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2270 {
2271         /* Address WBINVD may be executed by guest */
2272         if (need_emulate_wbinvd(vcpu)) {
2273                 if (kvm_x86_ops->has_wbinvd_exit())
2274                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2275                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2276                         smp_call_function_single(vcpu->cpu,
2277                                         wbinvd_ipi, NULL, 1);
2278         }
2279
2280         kvm_x86_ops->vcpu_load(vcpu, cpu);
2281
2282         /* Apply any externally detected TSC adjustments (due to suspend) */
2283         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2284                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2285                 vcpu->arch.tsc_offset_adjustment = 0;
2286                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2287         }
2288
2289         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2290                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2291                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2292                 if (tsc_delta < 0)
2293                         mark_tsc_unstable("KVM discovered backwards TSC");
2294                 if (check_tsc_unstable()) {
2295                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2296                                                 vcpu->arch.last_guest_tsc);
2297                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2298                         vcpu->arch.tsc_catchup = 1;
2299                 }
2300                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2301                 if (vcpu->cpu != cpu)
2302                         kvm_migrate_timers(vcpu);
2303                 vcpu->cpu = cpu;
2304         }
2305
2306         accumulate_steal_time(vcpu);
2307         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2308 }
2309
2310 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2311 {
2312         kvm_x86_ops->vcpu_put(vcpu);
2313         kvm_put_guest_fpu(vcpu);
2314         vcpu->arch.last_host_tsc = native_read_tsc();
2315 }
2316
2317 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2318                                     struct kvm_lapic_state *s)
2319 {
2320         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2321
2322         return 0;
2323 }
2324
2325 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2326                                     struct kvm_lapic_state *s)
2327 {
2328         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2329         kvm_apic_post_state_restore(vcpu);
2330         update_cr8_intercept(vcpu);
2331
2332         return 0;
2333 }
2334
2335 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2336                                     struct kvm_interrupt *irq)
2337 {
2338         if (irq->irq < 0 || irq->irq >= 256)
2339                 return -EINVAL;
2340         if (irqchip_in_kernel(vcpu->kvm))
2341                 return -ENXIO;
2342
2343         kvm_queue_interrupt(vcpu, irq->irq, false);
2344         kvm_make_request(KVM_REQ_EVENT, vcpu);
2345
2346         return 0;
2347 }
2348
2349 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2350 {
2351         kvm_inject_nmi(vcpu);
2352
2353         return 0;
2354 }
2355
2356 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2357                                            struct kvm_tpr_access_ctl *tac)
2358 {
2359         if (tac->flags)
2360                 return -EINVAL;
2361         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2362         return 0;
2363 }
2364
2365 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2366                                         u64 mcg_cap)
2367 {
2368         int r;
2369         unsigned bank_num = mcg_cap & 0xff, bank;
2370
2371         r = -EINVAL;
2372         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2373                 goto out;
2374         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2375                 goto out;
2376         r = 0;
2377         vcpu->arch.mcg_cap = mcg_cap;
2378         /* Init IA32_MCG_CTL to all 1s */
2379         if (mcg_cap & MCG_CTL_P)
2380                 vcpu->arch.mcg_ctl = ~(u64)0;
2381         /* Init IA32_MCi_CTL to all 1s */
2382         for (bank = 0; bank < bank_num; bank++)
2383                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2384 out:
2385         return r;
2386 }
2387
2388 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2389                                       struct kvm_x86_mce *mce)
2390 {
2391         u64 mcg_cap = vcpu->arch.mcg_cap;
2392         unsigned bank_num = mcg_cap & 0xff;
2393         u64 *banks = vcpu->arch.mce_banks;
2394
2395         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2396                 return -EINVAL;
2397         /*
2398          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2399          * reporting is disabled
2400          */
2401         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2402             vcpu->arch.mcg_ctl != ~(u64)0)
2403                 return 0;
2404         banks += 4 * mce->bank;
2405         /*
2406          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2407          * reporting is disabled for the bank
2408          */
2409         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2410                 return 0;
2411         if (mce->status & MCI_STATUS_UC) {
2412                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2413                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2414                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2415                         return 0;
2416                 }
2417                 if (banks[1] & MCI_STATUS_VAL)
2418                         mce->status |= MCI_STATUS_OVER;
2419                 banks[2] = mce->addr;
2420                 banks[3] = mce->misc;
2421                 vcpu->arch.mcg_status = mce->mcg_status;
2422                 banks[1] = mce->status;
2423                 kvm_queue_exception(vcpu, MC_VECTOR);
2424         } else if (!(banks[1] & MCI_STATUS_VAL)
2425                    || !(banks[1] & MCI_STATUS_UC)) {
2426                 if (banks[1] & MCI_STATUS_VAL)
2427                         mce->status |= MCI_STATUS_OVER;
2428                 banks[2] = mce->addr;
2429                 banks[3] = mce->misc;
2430                 banks[1] = mce->status;
2431         } else
2432                 banks[1] |= MCI_STATUS_OVER;
2433         return 0;
2434 }
2435
2436 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2437                                                struct kvm_vcpu_events *events)
2438 {
2439         process_nmi(vcpu);
2440         events->exception.injected =
2441                 vcpu->arch.exception.pending &&
2442                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2443         events->exception.nr = vcpu->arch.exception.nr;
2444         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2445         events->exception.pad = 0;
2446         events->exception.error_code = vcpu->arch.exception.error_code;
2447
2448         events->interrupt.injected =
2449                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2450         events->interrupt.nr = vcpu->arch.interrupt.nr;
2451         events->interrupt.soft = 0;
2452         events->interrupt.shadow =
2453                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2454                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2455
2456         events->nmi.injected = vcpu->arch.nmi_injected;
2457         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2458         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2459         events->nmi.pad = 0;
2460
2461         events->sipi_vector = vcpu->arch.sipi_vector;
2462
2463         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2464                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2465                          | KVM_VCPUEVENT_VALID_SHADOW);
2466         memset(&events->reserved, 0, sizeof(events->reserved));
2467 }
2468
2469 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2470                                               struct kvm_vcpu_events *events)
2471 {
2472         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2473                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2474                               | KVM_VCPUEVENT_VALID_SHADOW))
2475                 return -EINVAL;
2476
2477         process_nmi(vcpu);
2478         vcpu->arch.exception.pending = events->exception.injected;
2479         vcpu->arch.exception.nr = events->exception.nr;
2480         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2481         vcpu->arch.exception.error_code = events->exception.error_code;
2482
2483         vcpu->arch.interrupt.pending = events->interrupt.injected;
2484         vcpu->arch.interrupt.nr = events->interrupt.nr;
2485         vcpu->arch.interrupt.soft = events->interrupt.soft;
2486         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2487                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2488                                                   events->interrupt.shadow);
2489
2490         vcpu->arch.nmi_injected = events->nmi.injected;
2491         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2492                 vcpu->arch.nmi_pending = events->nmi.pending;
2493         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2494
2495         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2496                 vcpu->arch.sipi_vector = events->sipi_vector;
2497
2498         kvm_make_request(KVM_REQ_EVENT, vcpu);
2499
2500         return 0;
2501 }
2502
2503 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2504                                              struct kvm_debugregs *dbgregs)
2505 {
2506         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2507         dbgregs->dr6 = vcpu->arch.dr6;
2508         dbgregs->dr7 = vcpu->arch.dr7;
2509         dbgregs->flags = 0;
2510         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2511 }
2512
2513 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2514                                             struct kvm_debugregs *dbgregs)
2515 {
2516         if (dbgregs->flags)
2517                 return -EINVAL;
2518
2519         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2520         vcpu->arch.dr6 = dbgregs->dr6;
2521         vcpu->arch.dr7 = dbgregs->dr7;
2522
2523         return 0;
2524 }
2525
2526 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2527                                          struct kvm_xsave *guest_xsave)
2528 {
2529         if (cpu_has_xsave)
2530                 memcpy(guest_xsave->region,
2531                         &vcpu->arch.guest_fpu.state->xsave,
2532                         xstate_size);
2533         else {
2534                 memcpy(guest_xsave->region,
2535                         &vcpu->arch.guest_fpu.state->fxsave,
2536                         sizeof(struct i387_fxsave_struct));
2537                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2538                         XSTATE_FPSSE;
2539         }
2540 }
2541
2542 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2543                                         struct kvm_xsave *guest_xsave)
2544 {
2545         u64 xstate_bv =
2546                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2547
2548         if (cpu_has_xsave)
2549                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2550                         guest_xsave->region, xstate_size);
2551         else {
2552                 if (xstate_bv & ~XSTATE_FPSSE)
2553                         return -EINVAL;
2554                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2555                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2556         }
2557         return 0;
2558 }
2559
2560 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2561                                         struct kvm_xcrs *guest_xcrs)
2562 {
2563         if (!cpu_has_xsave) {
2564                 guest_xcrs->nr_xcrs = 0;
2565                 return;
2566         }
2567
2568         guest_xcrs->nr_xcrs = 1;
2569         guest_xcrs->flags = 0;
2570         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2571         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2572 }
2573
2574 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2575                                        struct kvm_xcrs *guest_xcrs)
2576 {
2577         int i, r = 0;
2578
2579         if (!cpu_has_xsave)
2580                 return -EINVAL;
2581
2582         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2583                 return -EINVAL;
2584
2585         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2586                 /* Only support XCR0 currently */
2587                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2588                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2589                                 guest_xcrs->xcrs[0].value);
2590                         break;
2591                 }
2592         if (r)
2593                 r = -EINVAL;
2594         return r;
2595 }
2596
2597 long kvm_arch_vcpu_ioctl(struct file *filp,
2598                          unsigned int ioctl, unsigned long arg)
2599 {
2600         struct kvm_vcpu *vcpu = filp->private_data;
2601         void __user *argp = (void __user *)arg;
2602         int r;
2603         union {
2604                 struct kvm_lapic_state *lapic;
2605                 struct kvm_xsave *xsave;
2606                 struct kvm_xcrs *xcrs;
2607                 void *buffer;
2608         } u;
2609
2610         u.buffer = NULL;
2611         switch (ioctl) {
2612         case KVM_GET_LAPIC: {
2613                 r = -EINVAL;
2614                 if (!vcpu->arch.apic)
2615                         goto out;
2616                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2617
2618                 r = -ENOMEM;
2619                 if (!u.lapic)
2620                         goto out;
2621                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2622                 if (r)
2623                         goto out;
2624                 r = -EFAULT;
2625                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2626                         goto out;
2627                 r = 0;
2628                 break;
2629         }
2630         case KVM_SET_LAPIC: {
2631                 r = -EINVAL;
2632                 if (!vcpu->arch.apic)
2633                         goto out;
2634                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
2635                 if (IS_ERR(u.lapic)) {
2636                         r = PTR_ERR(u.lapic);
2637                         goto out;
2638                 }
2639
2640                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2641                 if (r)
2642                         goto out;
2643                 r = 0;
2644                 break;
2645         }
2646         case KVM_INTERRUPT: {
2647                 struct kvm_interrupt irq;
2648
2649                 r = -EFAULT;
2650                 if (copy_from_user(&irq, argp, sizeof irq))
2651                         goto out;
2652                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2653                 if (r)
2654                         goto out;
2655                 r = 0;
2656                 break;
2657         }
2658         case KVM_NMI: {
2659                 r = kvm_vcpu_ioctl_nmi(vcpu);
2660                 if (r)
2661                         goto out;
2662                 r = 0;
2663                 break;
2664         }
2665         case KVM_SET_CPUID: {
2666                 struct kvm_cpuid __user *cpuid_arg = argp;
2667                 struct kvm_cpuid cpuid;
2668
2669                 r = -EFAULT;
2670                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2671                         goto out;
2672                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2673                 if (r)
2674                         goto out;
2675                 break;
2676         }
2677         case KVM_SET_CPUID2: {
2678                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2679                 struct kvm_cpuid2 cpuid;
2680
2681                 r = -EFAULT;
2682                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2683                         goto out;
2684                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2685                                               cpuid_arg->entries);
2686                 if (r)
2687                         goto out;
2688                 break;
2689         }
2690         case KVM_GET_CPUID2: {
2691                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2692                 struct kvm_cpuid2 cpuid;
2693
2694                 r = -EFAULT;
2695                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2696                         goto out;
2697                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2698                                               cpuid_arg->entries);
2699                 if (r)
2700                         goto out;
2701                 r = -EFAULT;
2702                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2703                         goto out;
2704                 r = 0;
2705                 break;
2706         }
2707         case KVM_GET_MSRS:
2708                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2709                 break;
2710         case KVM_SET_MSRS:
2711                 r = msr_io(vcpu, argp, do_set_msr, 0);
2712                 break;
2713         case KVM_TPR_ACCESS_REPORTING: {
2714                 struct kvm_tpr_access_ctl tac;
2715
2716                 r = -EFAULT;
2717                 if (copy_from_user(&tac, argp, sizeof tac))
2718                         goto out;
2719                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2720                 if (r)
2721                         goto out;
2722                 r = -EFAULT;
2723                 if (copy_to_user(argp, &tac, sizeof tac))
2724                         goto out;
2725                 r = 0;
2726                 break;
2727         };
2728         case KVM_SET_VAPIC_ADDR: {
2729                 struct kvm_vapic_addr va;
2730
2731                 r = -EINVAL;
2732                 if (!irqchip_in_kernel(vcpu->kvm))
2733                         goto out;
2734                 r = -EFAULT;
2735                 if (copy_from_user(&va, argp, sizeof va))
2736                         goto out;
2737                 r = 0;
2738                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2739                 break;
2740         }
2741         case KVM_X86_SETUP_MCE: {
2742                 u64 mcg_cap;
2743
2744                 r = -EFAULT;
2745                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2746                         goto out;
2747                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2748                 break;
2749         }
2750         case KVM_X86_SET_MCE: {
2751                 struct kvm_x86_mce mce;
2752
2753                 r = -EFAULT;
2754                 if (copy_from_user(&mce, argp, sizeof mce))
2755                         goto out;
2756                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2757                 break;
2758         }
2759         case KVM_GET_VCPU_EVENTS: {
2760                 struct kvm_vcpu_events events;
2761
2762                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2763
2764                 r = -EFAULT;
2765                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2766                         break;
2767                 r = 0;
2768                 break;
2769         }
2770         case KVM_SET_VCPU_EVENTS: {
2771                 struct kvm_vcpu_events events;
2772
2773                 r = -EFAULT;
2774                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2775                         break;
2776
2777                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2778                 break;
2779         }
2780         case KVM_GET_DEBUGREGS: {
2781                 struct kvm_debugregs dbgregs;
2782
2783                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2784
2785                 r = -EFAULT;
2786                 if (copy_to_user(argp, &dbgregs,
2787                                  sizeof(struct kvm_debugregs)))
2788                         break;
2789                 r = 0;
2790                 break;
2791         }
2792         case KVM_SET_DEBUGREGS: {
2793                 struct kvm_debugregs dbgregs;
2794
2795                 r = -EFAULT;
2796                 if (copy_from_user(&dbgregs, argp,
2797                                    sizeof(struct kvm_debugregs)))
2798                         break;
2799
2800                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2801                 break;
2802         }
2803         case KVM_GET_XSAVE: {
2804                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2805                 r = -ENOMEM;
2806                 if (!u.xsave)
2807                         break;
2808
2809                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2810
2811                 r = -EFAULT;
2812                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2813                         break;
2814                 r = 0;
2815                 break;
2816         }
2817         case KVM_SET_XSAVE: {
2818                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
2819                 if (IS_ERR(u.xsave)) {
2820                         r = PTR_ERR(u.xsave);
2821                         goto out;
2822                 }
2823
2824                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2825                 break;
2826         }
2827         case KVM_GET_XCRS: {
2828                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2829                 r = -ENOMEM;
2830                 if (!u.xcrs)
2831                         break;
2832
2833                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2834
2835                 r = -EFAULT;
2836                 if (copy_to_user(argp, u.xcrs,
2837                                  sizeof(struct kvm_xcrs)))
2838                         break;
2839                 r = 0;
2840                 break;
2841         }
2842         case KVM_SET_XCRS: {
2843                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
2844                 if (IS_ERR(u.xcrs)) {
2845                         r = PTR_ERR(u.xcrs);
2846                         goto out;
2847                 }
2848
2849                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2850                 break;
2851         }
2852         case KVM_SET_TSC_KHZ: {
2853                 u32 user_tsc_khz;
2854
2855                 r = -EINVAL;
2856                 user_tsc_khz = (u32)arg;
2857
2858                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
2859                         goto out;
2860
2861                 if (user_tsc_khz == 0)
2862                         user_tsc_khz = tsc_khz;
2863
2864                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
2865
2866                 r = 0;
2867                 goto out;
2868         }
2869         case KVM_GET_TSC_KHZ: {
2870                 r = vcpu->arch.virtual_tsc_khz;
2871                 goto out;
2872         }
2873         default:
2874                 r = -EINVAL;
2875         }
2876 out:
2877         kfree(u.buffer);
2878         return r;
2879 }
2880
2881 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
2882 {
2883         return VM_FAULT_SIGBUS;
2884 }
2885
2886 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2887 {
2888         int ret;
2889
2890         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2891                 return -1;
2892         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2893         return ret;
2894 }
2895
2896 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2897                                               u64 ident_addr)
2898 {
2899         kvm->arch.ept_identity_map_addr = ident_addr;
2900         return 0;
2901 }
2902
2903 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2904                                           u32 kvm_nr_mmu_pages)
2905 {
2906         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2907                 return -EINVAL;
2908
2909         mutex_lock(&kvm->slots_lock);
2910         spin_lock(&kvm->mmu_lock);
2911
2912         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2913         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2914
2915         spin_unlock(&kvm->mmu_lock);
2916         mutex_unlock(&kvm->slots_lock);
2917         return 0;
2918 }
2919
2920 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2921 {
2922         return kvm->arch.n_max_mmu_pages;
2923 }
2924
2925 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2926 {
2927         int r;
2928
2929         r = 0;
2930         switch (chip->chip_id) {
2931         case KVM_IRQCHIP_PIC_MASTER:
2932                 memcpy(&chip->chip.pic,
2933                         &pic_irqchip(kvm)->pics[0],
2934                         sizeof(struct kvm_pic_state));
2935                 break;
2936         case KVM_IRQCHIP_PIC_SLAVE:
2937                 memcpy(&chip->chip.pic,
2938                         &pic_irqchip(kvm)->pics[1],
2939                         sizeof(struct kvm_pic_state));
2940                 break;
2941         case KVM_IRQCHIP_IOAPIC:
2942                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2943                 break;
2944         default:
2945                 r = -EINVAL;
2946                 break;
2947         }
2948         return r;
2949 }
2950
2951 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2952 {
2953         int r;
2954
2955         r = 0;
2956         switch (chip->chip_id) {
2957         case KVM_IRQCHIP_PIC_MASTER:
2958                 spin_lock(&pic_irqchip(kvm)->lock);
2959                 memcpy(&pic_irqchip(kvm)->pics[0],
2960                         &chip->chip.pic,
2961                         sizeof(struct kvm_pic_state));
2962                 spin_unlock(&pic_irqchip(kvm)->lock);
2963                 break;
2964         case KVM_IRQCHIP_PIC_SLAVE:
2965                 spin_lock(&pic_irqchip(kvm)->lock);
2966                 memcpy(&pic_irqchip(kvm)->pics[1],
2967                         &chip->chip.pic,
2968                         sizeof(struct kvm_pic_state));
2969                 spin_unlock(&pic_irqchip(kvm)->lock);
2970                 break;
2971         case KVM_IRQCHIP_IOAPIC:
2972                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2973                 break;
2974         default:
2975                 r = -EINVAL;
2976                 break;
2977         }
2978         kvm_pic_update_irq(pic_irqchip(kvm));
2979         return r;
2980 }
2981
2982 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2983 {
2984         int r = 0;
2985
2986         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2987         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2988         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2989         return r;
2990 }
2991
2992 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2993 {
2994         int r = 0;
2995
2996         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2997         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2998         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2999         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3000         return r;
3001 }
3002
3003 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3004 {
3005         int r = 0;
3006
3007         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3008         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3009                 sizeof(ps->channels));
3010         ps->flags = kvm->arch.vpit->pit_state.flags;
3011         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3012         memset(&ps->reserved, 0, sizeof(ps->reserved));
3013         return r;
3014 }
3015
3016 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3017 {
3018         int r = 0, start = 0;
3019         u32 prev_legacy, cur_legacy;
3020         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3021         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3022         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3023         if (!prev_legacy && cur_legacy)
3024                 start = 1;
3025         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3026                sizeof(kvm->arch.vpit->pit_state.channels));
3027         kvm->arch.vpit->pit_state.flags = ps->flags;
3028         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3029         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3030         return r;
3031 }
3032
3033 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3034                                  struct kvm_reinject_control *control)
3035 {
3036         if (!kvm->arch.vpit)
3037                 return -ENXIO;
3038         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3039         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3040         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3041         return 0;
3042 }
3043
3044 /**
3045  * write_protect_slot - write protect a slot for dirty logging
3046  * @kvm: the kvm instance
3047  * @memslot: the slot we protect
3048  * @dirty_bitmap: the bitmap indicating which pages are dirty
3049  * @nr_dirty_pages: the number of dirty pages
3050  *
3051  * We have two ways to find all sptes to protect:
3052  * 1. Use kvm_mmu_slot_remove_write_access() which walks all shadow pages and
3053  *    checks ones that have a spte mapping a page in the slot.
3054  * 2. Use kvm_mmu_rmap_write_protect() for each gfn found in the bitmap.
3055  *
3056  * Generally speaking, if there are not so many dirty pages compared to the
3057  * number of shadow pages, we should use the latter.
3058  *
3059  * Note that letting others write into a page marked dirty in the old bitmap
3060  * by using the remaining tlb entry is not a problem.  That page will become
3061  * write protected again when we flush the tlb and then be reported dirty to
3062  * the user space by copying the old bitmap.
3063  */
3064 static void write_protect_slot(struct kvm *kvm,
3065                                struct kvm_memory_slot *memslot,
3066                                unsigned long *dirty_bitmap,
3067                                unsigned long nr_dirty_pages)
3068 {
3069         spin_lock(&kvm->mmu_lock);
3070
3071         /* Not many dirty pages compared to # of shadow pages. */
3072         if (nr_dirty_pages < kvm->arch.n_used_mmu_pages) {
3073                 unsigned long gfn_offset;
3074
3075                 for_each_set_bit(gfn_offset, dirty_bitmap, memslot->npages) {
3076                         unsigned long gfn = memslot->base_gfn + gfn_offset;
3077
3078                         kvm_mmu_rmap_write_protect(kvm, gfn, memslot);
3079                 }
3080                 kvm_flush_remote_tlbs(kvm);
3081         } else
3082                 kvm_mmu_slot_remove_write_access(kvm, memslot->id);
3083
3084         spin_unlock(&kvm->mmu_lock);
3085 }
3086
3087 /*
3088  * Get (and clear) the dirty memory log for a memory slot.
3089  */
3090 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3091                                       struct kvm_dirty_log *log)
3092 {
3093         int r;
3094         struct kvm_memory_slot *memslot;
3095         unsigned long n, nr_dirty_pages;
3096
3097         mutex_lock(&kvm->slots_lock);
3098
3099         r = -EINVAL;
3100         if (log->slot >= KVM_MEMORY_SLOTS)
3101                 goto out;
3102
3103         memslot = id_to_memslot(kvm->memslots, log->slot);
3104         r = -ENOENT;
3105         if (!memslot->dirty_bitmap)
3106                 goto out;
3107
3108         n = kvm_dirty_bitmap_bytes(memslot);
3109         nr_dirty_pages = memslot->nr_dirty_pages;
3110
3111         /* If nothing is dirty, don't bother messing with page tables. */
3112         if (nr_dirty_pages) {
3113                 struct kvm_memslots *slots, *old_slots;
3114                 unsigned long *dirty_bitmap, *dirty_bitmap_head;
3115
3116                 dirty_bitmap = memslot->dirty_bitmap;
3117                 dirty_bitmap_head = memslot->dirty_bitmap_head;
3118                 if (dirty_bitmap == dirty_bitmap_head)
3119                         dirty_bitmap_head += n / sizeof(long);
3120                 memset(dirty_bitmap_head, 0, n);
3121
3122                 r = -ENOMEM;
3123                 slots = kmemdup(kvm->memslots, sizeof(*kvm->memslots), GFP_KERNEL);
3124                 if (!slots)
3125                         goto out;
3126
3127                 memslot = id_to_memslot(slots, log->slot);
3128                 memslot->nr_dirty_pages = 0;
3129                 memslot->dirty_bitmap = dirty_bitmap_head;
3130                 update_memslots(slots, NULL);
3131
3132                 old_slots = kvm->memslots;
3133                 rcu_assign_pointer(kvm->memslots, slots);
3134                 synchronize_srcu_expedited(&kvm->srcu);
3135                 kfree(old_slots);
3136
3137                 write_protect_slot(kvm, memslot, dirty_bitmap, nr_dirty_pages);
3138
3139                 r = -EFAULT;
3140                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3141                         goto out;
3142         } else {
3143                 r = -EFAULT;
3144                 if (clear_user(log->dirty_bitmap, n))
3145                         goto out;
3146         }
3147
3148         r = 0;
3149 out:
3150         mutex_unlock(&kvm->slots_lock);
3151         return r;
3152 }
3153
3154 long kvm_arch_vm_ioctl(struct file *filp,
3155                        unsigned int ioctl, unsigned long arg)
3156 {
3157         struct kvm *kvm = filp->private_data;
3158         void __user *argp = (void __user *)arg;
3159         int r = -ENOTTY;
3160         /*
3161          * This union makes it completely explicit to gcc-3.x
3162          * that these two variables' stack usage should be
3163          * combined, not added together.
3164          */
3165         union {
3166                 struct kvm_pit_state ps;
3167                 struct kvm_pit_state2 ps2;
3168                 struct kvm_pit_config pit_config;
3169         } u;
3170
3171         switch (ioctl) {
3172         case KVM_SET_TSS_ADDR:
3173                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3174                 if (r < 0)
3175                         goto out;
3176                 break;
3177         case KVM_SET_IDENTITY_MAP_ADDR: {
3178                 u64 ident_addr;
3179
3180                 r = -EFAULT;
3181                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3182                         goto out;
3183                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3184                 if (r < 0)
3185                         goto out;
3186                 break;
3187         }
3188         case KVM_SET_NR_MMU_PAGES:
3189                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3190                 if (r)
3191                         goto out;
3192                 break;
3193         case KVM_GET_NR_MMU_PAGES:
3194                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3195                 break;
3196         case KVM_CREATE_IRQCHIP: {
3197                 struct kvm_pic *vpic;
3198
3199                 mutex_lock(&kvm->lock);
3200                 r = -EEXIST;
3201                 if (kvm->arch.vpic)
3202                         goto create_irqchip_unlock;
3203                 r = -EINVAL;
3204                 if (atomic_read(&kvm->online_vcpus))
3205                         goto create_irqchip_unlock;
3206                 r = -ENOMEM;
3207                 vpic = kvm_create_pic(kvm);
3208                 if (vpic) {
3209                         r = kvm_ioapic_init(kvm);
3210                         if (r) {
3211                                 mutex_lock(&kvm->slots_lock);
3212                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3213                                                           &vpic->dev_master);
3214                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3215                                                           &vpic->dev_slave);
3216                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3217                                                           &vpic->dev_eclr);
3218                                 mutex_unlock(&kvm->slots_lock);
3219                                 kfree(vpic);
3220                                 goto create_irqchip_unlock;
3221                         }
3222                 } else
3223                         goto create_irqchip_unlock;
3224                 smp_wmb();
3225                 kvm->arch.vpic = vpic;
3226                 smp_wmb();
3227                 r = kvm_setup_default_irq_routing(kvm);
3228                 if (r) {
3229                         mutex_lock(&kvm->slots_lock);
3230                         mutex_lock(&kvm->irq_lock);
3231                         kvm_ioapic_destroy(kvm);
3232                         kvm_destroy_pic(kvm);
3233                         mutex_unlock(&kvm->irq_lock);
3234                         mutex_unlock(&kvm->slots_lock);
3235                 }
3236         create_irqchip_unlock:
3237                 mutex_unlock(&kvm->lock);
3238                 break;
3239         }
3240         case KVM_CREATE_PIT:
3241                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3242                 goto create_pit;
3243         case KVM_CREATE_PIT2:
3244                 r = -EFAULT;
3245                 if (copy_from_user(&u.pit_config, argp,
3246                                    sizeof(struct kvm_pit_config)))
3247                         goto out;
3248         create_pit:
3249                 mutex_lock(&kvm->slots_lock);
3250                 r = -EEXIST;
3251                 if (kvm->arch.vpit)
3252                         goto create_pit_unlock;
3253                 r = -ENOMEM;
3254                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3255                 if (kvm->arch.vpit)
3256                         r = 0;
3257         create_pit_unlock:
3258                 mutex_unlock(&kvm->slots_lock);
3259                 break;
3260         case KVM_IRQ_LINE_STATUS:
3261         case KVM_IRQ_LINE: {
3262                 struct kvm_irq_level irq_event;
3263
3264                 r = -EFAULT;
3265                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3266                         goto out;
3267                 r = -ENXIO;
3268                 if (irqchip_in_kernel(kvm)) {
3269                         __s32 status;
3270                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3271                                         irq_event.irq, irq_event.level);
3272                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3273                                 r = -EFAULT;
3274                                 irq_event.status = status;
3275                                 if (copy_to_user(argp, &irq_event,
3276                                                         sizeof irq_event))
3277                                         goto out;
3278                         }
3279                         r = 0;
3280                 }
3281                 break;
3282         }
3283         case KVM_GET_IRQCHIP: {
3284                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3285                 struct kvm_irqchip *chip;
3286
3287                 chip = memdup_user(argp, sizeof(*chip));
3288                 if (IS_ERR(chip)) {
3289                         r = PTR_ERR(chip);
3290                         goto out;
3291                 }
3292
3293                 r = -ENXIO;
3294                 if (!irqchip_in_kernel(kvm))
3295                         goto get_irqchip_out;
3296                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3297                 if (r)
3298                         goto get_irqchip_out;
3299                 r = -EFAULT;
3300                 if (copy_to_user(argp, chip, sizeof *chip))
3301                         goto get_irqchip_out;
3302                 r = 0;
3303         get_irqchip_out:
3304                 kfree(chip);
3305                 if (r)
3306                         goto out;
3307                 break;
3308         }
3309         case KVM_SET_IRQCHIP: {
3310                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3311                 struct kvm_irqchip *chip;
3312
3313                 chip = memdup_user(argp, sizeof(*chip));
3314                 if (IS_ERR(chip)) {
3315                         r = PTR_ERR(chip);
3316                         goto out;
3317                 }
3318
3319                 r = -ENXIO;
3320                 if (!irqchip_in_kernel(kvm))
3321                         goto set_irqchip_out;
3322                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3323                 if (r)
3324                         goto set_irqchip_out;
3325                 r = 0;
3326         set_irqchip_out:
3327                 kfree(chip);
3328                 if (r)
3329                         goto out;
3330                 break;
3331         }
3332         case KVM_GET_PIT: {
3333                 r = -EFAULT;
3334                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3335                         goto out;
3336                 r = -ENXIO;
3337                 if (!kvm->arch.vpit)
3338                         goto out;
3339                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3340                 if (r)
3341                         goto out;
3342                 r = -EFAULT;
3343                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3344                         goto out;
3345                 r = 0;
3346                 break;
3347         }
3348         case KVM_SET_PIT: {
3349                 r = -EFAULT;
3350                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3351                         goto out;
3352                 r = -ENXIO;
3353                 if (!kvm->arch.vpit)
3354                         goto out;
3355                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3356                 if (r)
3357                         goto out;
3358                 r = 0;
3359                 break;
3360         }
3361         case KVM_GET_PIT2: {
3362                 r = -ENXIO;
3363                 if (!kvm->arch.vpit)
3364                         goto out;
3365                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3366                 if (r)
3367                         goto out;
3368                 r = -EFAULT;
3369                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3370                         goto out;
3371                 r = 0;
3372                 break;
3373         }
3374         case KVM_SET_PIT2: {
3375                 r = -EFAULT;
3376                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3377                         goto out;
3378                 r = -ENXIO;
3379                 if (!kvm->arch.vpit)
3380                         goto out;
3381                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3382                 if (r)
3383                         goto out;
3384                 r = 0;
3385                 break;
3386         }
3387         case KVM_REINJECT_CONTROL: {
3388                 struct kvm_reinject_control control;
3389                 r =  -EFAULT;
3390                 if (copy_from_user(&control, argp, sizeof(control)))
3391                         goto out;
3392                 r = kvm_vm_ioctl_reinject(kvm, &control);
3393                 if (r)
3394                         goto out;
3395                 r = 0;
3396                 break;
3397         }
3398         case KVM_XEN_HVM_CONFIG: {
3399                 r = -EFAULT;
3400                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3401                                    sizeof(struct kvm_xen_hvm_config)))
3402                         goto out;
3403                 r = -EINVAL;
3404                 if (kvm->arch.xen_hvm_config.flags)
3405                         goto out;
3406                 r = 0;
3407                 break;
3408         }
3409         case KVM_SET_CLOCK: {
3410                 struct kvm_clock_data user_ns;
3411                 u64 now_ns;
3412                 s64 delta;
3413
3414                 r = -EFAULT;
3415                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3416                         goto out;
3417
3418                 r = -EINVAL;
3419                 if (user_ns.flags)
3420                         goto out;
3421
3422                 r = 0;
3423                 local_irq_disable();
3424                 now_ns = get_kernel_ns();
3425                 delta = user_ns.clock - now_ns;
3426                 local_irq_enable();
3427                 kvm->arch.kvmclock_offset = delta;
3428                 break;
3429         }
3430         case KVM_GET_CLOCK: {
3431                 struct kvm_clock_data user_ns;
3432                 u64 now_ns;
3433
3434                 local_irq_disable();
3435                 now_ns = get_kernel_ns();
3436                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3437                 local_irq_enable();
3438                 user_ns.flags = 0;
3439                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3440
3441                 r = -EFAULT;
3442                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3443                         goto out;
3444                 r = 0;
3445                 break;
3446         }
3447
3448         default:
3449                 ;
3450         }
3451 out:
3452         return r;
3453 }
3454
3455 static void kvm_init_msr_list(void)
3456 {
3457         u32 dummy[2];
3458         unsigned i, j;
3459
3460         /* skip the first msrs in the list. KVM-specific */
3461         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3462                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3463                         continue;
3464                 if (j < i)
3465                         msrs_to_save[j] = msrs_to_save[i];
3466                 j++;
3467         }
3468         num_msrs_to_save = j;
3469 }
3470
3471 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3472                            const void *v)
3473 {
3474         int handled = 0;
3475         int n;
3476
3477         do {
3478                 n = min(len, 8);
3479                 if (!(vcpu->arch.apic &&
3480                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3481                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3482                         break;
3483                 handled += n;
3484                 addr += n;
3485                 len -= n;
3486                 v += n;
3487         } while (len);
3488
3489         return handled;
3490 }
3491
3492 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3493 {
3494         int handled = 0;
3495         int n;
3496
3497         do {
3498                 n = min(len, 8);
3499                 if (!(vcpu->arch.apic &&
3500                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3501                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3502                         break;
3503                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3504                 handled += n;
3505                 addr += n;
3506                 len -= n;
3507                 v += n;
3508         } while (len);
3509
3510         return handled;
3511 }
3512
3513 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3514                         struct kvm_segment *var, int seg)
3515 {
3516         kvm_x86_ops->set_segment(vcpu, var, seg);
3517 }
3518
3519 void kvm_get_segment(struct kvm_vcpu *vcpu,
3520                      struct kvm_segment *var, int seg)
3521 {
3522         kvm_x86_ops->get_segment(vcpu, var, seg);
3523 }
3524
3525 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3526 {
3527         gpa_t t_gpa;
3528         struct x86_exception exception;
3529
3530         BUG_ON(!mmu_is_nested(vcpu));
3531
3532         /* NPT walks are always user-walks */
3533         access |= PFERR_USER_MASK;
3534         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3535
3536         return t_gpa;
3537 }
3538
3539 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3540                               struct x86_exception *exception)
3541 {
3542         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3543         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3544 }
3545
3546  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3547                                 struct x86_exception *exception)
3548 {
3549         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3550         access |= PFERR_FETCH_MASK;
3551         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3552 }
3553
3554 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3555                                struct x86_exception *exception)
3556 {
3557         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3558         access |= PFERR_WRITE_MASK;
3559         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3560 }
3561
3562 /* uses this to access any guest's mapped memory without checking CPL */
3563 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3564                                 struct x86_exception *exception)
3565 {
3566         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3567 }
3568
3569 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3570                                       struct kvm_vcpu *vcpu, u32 access,
3571                                       struct x86_exception *exception)
3572 {
3573         void *data = val;
3574         int r = X86EMUL_CONTINUE;
3575
3576         while (bytes) {
3577                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3578                                                             exception);
3579                 unsigned offset = addr & (PAGE_SIZE-1);
3580                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3581                 int ret;
3582
3583                 if (gpa == UNMAPPED_GVA)
3584                         return X86EMUL_PROPAGATE_FAULT;
3585                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3586                 if (ret < 0) {
3587                         r = X86EMUL_IO_NEEDED;
3588                         goto out;
3589                 }
3590
3591                 bytes -= toread;
3592                 data += toread;
3593                 addr += toread;
3594         }
3595 out:
3596         return r;
3597 }
3598
3599 /* used for instruction fetching */
3600 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3601                                 gva_t addr, void *val, unsigned int bytes,
3602                                 struct x86_exception *exception)
3603 {
3604         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3605         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3606
3607         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3608                                           access | PFERR_FETCH_MASK,
3609                                           exception);
3610 }
3611
3612 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3613                                gva_t addr, void *val, unsigned int bytes,
3614                                struct x86_exception *exception)
3615 {
3616         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3617         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3618
3619         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3620                                           exception);
3621 }
3622 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3623
3624 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3625                                       gva_t addr, void *val, unsigned int bytes,
3626                                       struct x86_exception *exception)
3627 {
3628         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3629         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3630 }
3631
3632 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3633                                        gva_t addr, void *val,
3634                                        unsigned int bytes,
3635                                        struct x86_exception *exception)
3636 {
3637         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3638         void *data = val;
3639         int r = X86EMUL_CONTINUE;
3640
3641         while (bytes) {
3642                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3643                                                              PFERR_WRITE_MASK,
3644                                                              exception);
3645                 unsigned offset = addr & (PAGE_SIZE-1);
3646                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3647                 int ret;
3648
3649                 if (gpa == UNMAPPED_GVA)
3650                         return X86EMUL_PROPAGATE_FAULT;
3651                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3652                 if (ret < 0) {
3653                         r = X86EMUL_IO_NEEDED;
3654                         goto out;
3655                 }
3656
3657                 bytes -= towrite;
3658                 data += towrite;
3659                 addr += towrite;
3660         }
3661 out:
3662         return r;
3663 }
3664 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3665
3666 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3667                                 gpa_t *gpa, struct x86_exception *exception,
3668                                 bool write)
3669 {
3670         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3671
3672         if (vcpu_match_mmio_gva(vcpu, gva) &&
3673                   check_write_user_access(vcpu, write, access,
3674                   vcpu->arch.access)) {
3675                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3676                                         (gva & (PAGE_SIZE - 1));
3677                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3678                 return 1;
3679         }
3680
3681         if (write)
3682                 access |= PFERR_WRITE_MASK;
3683
3684         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3685
3686         if (*gpa == UNMAPPED_GVA)
3687                 return -1;
3688
3689         /* For APIC access vmexit */
3690         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3691                 return 1;
3692
3693         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3694                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3695                 return 1;
3696         }
3697
3698         return 0;
3699 }
3700
3701 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3702                         const void *val, int bytes)
3703 {
3704         int ret;
3705
3706         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3707         if (ret < 0)
3708                 return 0;
3709         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
3710         return 1;
3711 }
3712
3713 struct read_write_emulator_ops {
3714         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
3715                                   int bytes);
3716         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
3717                                   void *val, int bytes);
3718         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3719                                int bytes, void *val);
3720         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3721                                     void *val, int bytes);
3722         bool write;
3723 };
3724
3725 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
3726 {
3727         if (vcpu->mmio_read_completed) {
3728                 memcpy(val, vcpu->mmio_data, bytes);
3729                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3730                                vcpu->mmio_phys_addr, *(u64 *)val);
3731                 vcpu->mmio_read_completed = 0;
3732                 return 1;
3733         }
3734
3735         return 0;
3736 }
3737
3738 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3739                         void *val, int bytes)
3740 {
3741         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
3742 }
3743
3744 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3745                          void *val, int bytes)
3746 {
3747         return emulator_write_phys(vcpu, gpa, val, bytes);
3748 }
3749
3750 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
3751 {
3752         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3753         return vcpu_mmio_write(vcpu, gpa, bytes, val);
3754 }
3755
3756 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3757                           void *val, int bytes)
3758 {
3759         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3760         return X86EMUL_IO_NEEDED;
3761 }
3762
3763 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3764                            void *val, int bytes)
3765 {
3766         memcpy(vcpu->mmio_data, val, bytes);
3767         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
3768         return X86EMUL_CONTINUE;
3769 }
3770
3771 static struct read_write_emulator_ops read_emultor = {
3772         .read_write_prepare = read_prepare,
3773         .read_write_emulate = read_emulate,
3774         .read_write_mmio = vcpu_mmio_read,
3775         .read_write_exit_mmio = read_exit_mmio,
3776 };
3777
3778 static struct read_write_emulator_ops write_emultor = {
3779         .read_write_emulate = write_emulate,
3780         .read_write_mmio = write_mmio,
3781         .read_write_exit_mmio = write_exit_mmio,
3782         .write = true,
3783 };
3784
3785 static int emulator_read_write_onepage(unsigned long addr, void *val,
3786                                        unsigned int bytes,
3787                                        struct x86_exception *exception,
3788                                        struct kvm_vcpu *vcpu,
3789                                        struct read_write_emulator_ops *ops)
3790 {
3791         gpa_t gpa;
3792         int handled, ret;
3793         bool write = ops->write;
3794
3795         if (ops->read_write_prepare &&
3796                   ops->read_write_prepare(vcpu, val, bytes))
3797                 return X86EMUL_CONTINUE;
3798
3799         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
3800
3801         if (ret < 0)
3802                 return X86EMUL_PROPAGATE_FAULT;
3803
3804         /* For APIC access vmexit */
3805         if (ret)
3806                 goto mmio;
3807
3808         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
3809                 return X86EMUL_CONTINUE;
3810
3811 mmio:
3812         /*
3813          * Is this MMIO handled locally?
3814          */
3815         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
3816         if (handled == bytes)
3817                 return X86EMUL_CONTINUE;
3818
3819         gpa += handled;
3820         bytes -= handled;
3821         val += handled;
3822
3823         vcpu->mmio_needed = 1;
3824         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3825         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3826         vcpu->mmio_size = bytes;
3827         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3828         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
3829         vcpu->mmio_index = 0;
3830
3831         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
3832 }
3833
3834 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
3835                         void *val, unsigned int bytes,
3836                         struct x86_exception *exception,
3837                         struct read_write_emulator_ops *ops)
3838 {
3839         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3840
3841         /* Crossing a page boundary? */
3842         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3843                 int rc, now;
3844
3845                 now = -addr & ~PAGE_MASK;
3846                 rc = emulator_read_write_onepage(addr, val, now, exception,
3847                                                  vcpu, ops);
3848
3849                 if (rc != X86EMUL_CONTINUE)
3850                         return rc;
3851                 addr += now;
3852                 val += now;
3853                 bytes -= now;
3854         }
3855
3856         return emulator_read_write_onepage(addr, val, bytes, exception,
3857                                            vcpu, ops);
3858 }
3859
3860 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3861                                   unsigned long addr,
3862                                   void *val,
3863                                   unsigned int bytes,
3864                                   struct x86_exception *exception)
3865 {
3866         return emulator_read_write(ctxt, addr, val, bytes,
3867                                    exception, &read_emultor);
3868 }
3869
3870 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
3871                             unsigned long addr,
3872                             const void *val,
3873                             unsigned int bytes,
3874                             struct x86_exception *exception)
3875 {
3876         return emulator_read_write(ctxt, addr, (void *)val, bytes,
3877                                    exception, &write_emultor);
3878 }
3879
3880 #define CMPXCHG_TYPE(t, ptr, old, new) \
3881         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3882
3883 #ifdef CONFIG_X86_64
3884 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3885 #else
3886 #  define CMPXCHG64(ptr, old, new) \
3887         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3888 #endif
3889
3890 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
3891                                      unsigned long addr,
3892                                      const void *old,
3893                                      const void *new,
3894                                      unsigned int bytes,
3895                                      struct x86_exception *exception)
3896 {
3897         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3898         gpa_t gpa;
3899         struct page *page;
3900         char *kaddr;
3901         bool exchanged;
3902
3903         /* guests cmpxchg8b have to be emulated atomically */
3904         if (bytes > 8 || (bytes & (bytes - 1)))
3905                 goto emul_write;
3906
3907         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3908
3909         if (gpa == UNMAPPED_GVA ||
3910             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3911                 goto emul_write;
3912
3913         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3914                 goto emul_write;
3915
3916         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3917         if (is_error_page(page)) {
3918                 kvm_release_page_clean(page);
3919                 goto emul_write;
3920         }
3921
3922         kaddr = kmap_atomic(page, KM_USER0);
3923         kaddr += offset_in_page(gpa);
3924         switch (bytes) {
3925         case 1:
3926                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3927                 break;
3928         case 2:
3929                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3930                 break;
3931         case 4:
3932                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3933                 break;
3934         case 8:
3935                 exchanged = CMPXCHG64(kaddr, old, new);
3936                 break;
3937         default:
3938                 BUG();
3939         }
3940         kunmap_atomic(kaddr, KM_USER0);
3941         kvm_release_page_dirty(page);
3942
3943         if (!exchanged)
3944                 return X86EMUL_CMPXCHG_FAILED;
3945
3946         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
3947
3948         return X86EMUL_CONTINUE;
3949
3950 emul_write:
3951         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3952
3953         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
3954 }
3955
3956 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3957 {
3958         /* TODO: String I/O for in kernel device */
3959         int r;
3960
3961         if (vcpu->arch.pio.in)
3962                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3963                                     vcpu->arch.pio.size, pd);
3964         else
3965                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3966                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3967                                      pd);
3968         return r;
3969 }
3970
3971 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
3972                                unsigned short port, void *val,
3973                                unsigned int count, bool in)
3974 {
3975         trace_kvm_pio(!in, port, size, count);
3976
3977         vcpu->arch.pio.port = port;
3978         vcpu->arch.pio.in = in;
3979         vcpu->arch.pio.count  = count;
3980         vcpu->arch.pio.size = size;
3981
3982         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3983                 vcpu->arch.pio.count = 0;
3984                 return 1;
3985         }
3986
3987         vcpu->run->exit_reason = KVM_EXIT_IO;
3988         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3989         vcpu->run->io.size = size;
3990         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3991         vcpu->run->io.count = count;
3992         vcpu->run->io.port = port;
3993
3994         return 0;
3995 }
3996
3997 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
3998                                     int size, unsigned short port, void *val,
3999                                     unsigned int count)
4000 {
4001         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4002         int ret;
4003
4004         if (vcpu->arch.pio.count)
4005                 goto data_avail;
4006
4007         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4008         if (ret) {
4009 data_avail:
4010                 memcpy(val, vcpu->arch.pio_data, size * count);
4011                 vcpu->arch.pio.count = 0;
4012                 return 1;
4013         }
4014
4015         return 0;
4016 }
4017
4018 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4019                                      int size, unsigned short port,
4020                                      const void *val, unsigned int count)
4021 {
4022         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4023
4024         memcpy(vcpu->arch.pio_data, val, size * count);
4025         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4026 }
4027
4028 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4029 {
4030         return kvm_x86_ops->get_segment_base(vcpu, seg);
4031 }
4032
4033 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4034 {
4035         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4036 }
4037
4038 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4039 {
4040         if (!need_emulate_wbinvd(vcpu))
4041                 return X86EMUL_CONTINUE;
4042
4043         if (kvm_x86_ops->has_wbinvd_exit()) {
4044                 int cpu = get_cpu();
4045
4046                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4047                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4048                                 wbinvd_ipi, NULL, 1);
4049                 put_cpu();
4050                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4051         } else
4052                 wbinvd();
4053         return X86EMUL_CONTINUE;
4054 }
4055 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4056
4057 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4058 {
4059         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4060 }
4061
4062 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4063 {
4064         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4065 }
4066
4067 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4068 {
4069
4070         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4071 }
4072
4073 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4074 {
4075         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4076 }
4077
4078 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4079 {
4080         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4081         unsigned long value;
4082
4083         switch (cr) {
4084         case 0:
4085                 value = kvm_read_cr0(vcpu);
4086                 break;
4087         case 2:
4088                 value = vcpu->arch.cr2;
4089                 break;
4090         case 3:
4091                 value = kvm_read_cr3(vcpu);
4092                 break;
4093         case 4:
4094                 value = kvm_read_cr4(vcpu);
4095                 break;
4096         case 8:
4097                 value = kvm_get_cr8(vcpu);
4098                 break;
4099         default:
4100                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4101                 return 0;
4102         }
4103
4104         return value;
4105 }
4106
4107 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4108 {
4109         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4110         int res = 0;
4111
4112         switch (cr) {
4113         case 0:
4114                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4115                 break;
4116         case 2:
4117                 vcpu->arch.cr2 = val;
4118                 break;
4119         case 3:
4120                 res = kvm_set_cr3(vcpu, val);
4121                 break;
4122         case 4:
4123                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4124                 break;
4125         case 8:
4126                 res = kvm_set_cr8(vcpu, val);
4127                 break;
4128         default:
4129                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4130                 res = -1;
4131         }
4132
4133         return res;
4134 }
4135
4136 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4137 {
4138         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4139 }
4140
4141 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4142 {
4143         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4144 }
4145
4146 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4147 {
4148         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4149 }
4150
4151 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4152 {
4153         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4154 }
4155
4156 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4157 {
4158         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4159 }
4160
4161 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4162 {
4163         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4164 }
4165
4166 static unsigned long emulator_get_cached_segment_base(
4167         struct x86_emulate_ctxt *ctxt, int seg)
4168 {
4169         return get_segment_base(emul_to_vcpu(ctxt), seg);
4170 }
4171
4172 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4173                                  struct desc_struct *desc, u32 *base3,
4174                                  int seg)
4175 {
4176         struct kvm_segment var;
4177
4178         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4179         *selector = var.selector;
4180
4181         if (var.unusable)
4182                 return false;
4183
4184         if (var.g)
4185                 var.limit >>= 12;
4186         set_desc_limit(desc, var.limit);
4187         set_desc_base(desc, (unsigned long)var.base);
4188 #ifdef CONFIG_X86_64
4189         if (base3)
4190                 *base3 = var.base >> 32;
4191 #endif
4192         desc->type = var.type;
4193         desc->s = var.s;
4194         desc->dpl = var.dpl;
4195         desc->p = var.present;
4196         desc->avl = var.avl;
4197         desc->l = var.l;
4198         desc->d = var.db;
4199         desc->g = var.g;
4200
4201         return true;
4202 }
4203
4204 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4205                                  struct desc_struct *desc, u32 base3,
4206                                  int seg)
4207 {
4208         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4209         struct kvm_segment var;
4210
4211         var.selector = selector;
4212         var.base = get_desc_base(desc);
4213 #ifdef CONFIG_X86_64
4214         var.base |= ((u64)base3) << 32;
4215 #endif
4216         var.limit = get_desc_limit(desc);
4217         if (desc->g)
4218                 var.limit = (var.limit << 12) | 0xfff;
4219         var.type = desc->type;
4220         var.present = desc->p;
4221         var.dpl = desc->dpl;
4222         var.db = desc->d;
4223         var.s = desc->s;
4224         var.l = desc->l;
4225         var.g = desc->g;
4226         var.avl = desc->avl;
4227         var.present = desc->p;
4228         var.unusable = !var.present;
4229         var.padding = 0;
4230
4231         kvm_set_segment(vcpu, &var, seg);
4232         return;
4233 }
4234
4235 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4236                             u32 msr_index, u64 *pdata)
4237 {
4238         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4239 }
4240
4241 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4242                             u32 msr_index, u64 data)
4243 {
4244         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4245 }
4246
4247 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4248                              u32 pmc, u64 *pdata)
4249 {
4250         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4251 }
4252
4253 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4254 {
4255         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4256 }
4257
4258 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4259 {
4260         preempt_disable();
4261         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4262         /*
4263          * CR0.TS may reference the host fpu state, not the guest fpu state,
4264          * so it may be clear at this point.
4265          */
4266         clts();
4267 }
4268
4269 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4270 {
4271         preempt_enable();
4272 }
4273
4274 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4275                               struct x86_instruction_info *info,
4276                               enum x86_intercept_stage stage)
4277 {
4278         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4279 }
4280
4281 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4282                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4283 {
4284         struct kvm_cpuid_entry2 *cpuid = NULL;
4285
4286         if (eax && ecx)
4287                 cpuid = kvm_find_cpuid_entry(emul_to_vcpu(ctxt),
4288                                             *eax, *ecx);
4289
4290         if (cpuid) {
4291                 *eax = cpuid->eax;
4292                 *ecx = cpuid->ecx;
4293                 if (ebx)
4294                         *ebx = cpuid->ebx;
4295                 if (edx)
4296                         *edx = cpuid->edx;
4297                 return true;
4298         }
4299
4300         return false;
4301 }
4302
4303 static struct x86_emulate_ops emulate_ops = {
4304         .read_std            = kvm_read_guest_virt_system,
4305         .write_std           = kvm_write_guest_virt_system,
4306         .fetch               = kvm_fetch_guest_virt,
4307         .read_emulated       = emulator_read_emulated,
4308         .write_emulated      = emulator_write_emulated,
4309         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4310         .invlpg              = emulator_invlpg,
4311         .pio_in_emulated     = emulator_pio_in_emulated,
4312         .pio_out_emulated    = emulator_pio_out_emulated,
4313         .get_segment         = emulator_get_segment,
4314         .set_segment         = emulator_set_segment,
4315         .get_cached_segment_base = emulator_get_cached_segment_base,
4316         .get_gdt             = emulator_get_gdt,
4317         .get_idt             = emulator_get_idt,
4318         .set_gdt             = emulator_set_gdt,
4319         .set_idt             = emulator_set_idt,
4320         .get_cr              = emulator_get_cr,
4321         .set_cr              = emulator_set_cr,
4322         .set_rflags          = emulator_set_rflags,
4323         .cpl                 = emulator_get_cpl,
4324         .get_dr              = emulator_get_dr,
4325         .set_dr              = emulator_set_dr,
4326         .set_msr             = emulator_set_msr,
4327         .get_msr             = emulator_get_msr,
4328         .read_pmc            = emulator_read_pmc,
4329         .halt                = emulator_halt,
4330         .wbinvd              = emulator_wbinvd,
4331         .fix_hypercall       = emulator_fix_hypercall,
4332         .get_fpu             = emulator_get_fpu,
4333         .put_fpu             = emulator_put_fpu,
4334         .intercept           = emulator_intercept,
4335         .get_cpuid           = emulator_get_cpuid,
4336 };
4337
4338 static void cache_all_regs(struct kvm_vcpu *vcpu)
4339 {
4340         kvm_register_read(vcpu, VCPU_REGS_RAX);
4341         kvm_register_read(vcpu, VCPU_REGS_RSP);
4342         kvm_register_read(vcpu, VCPU_REGS_RIP);
4343         vcpu->arch.regs_dirty = ~0;
4344 }
4345
4346 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4347 {
4348         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4349         /*
4350          * an sti; sti; sequence only disable interrupts for the first
4351          * instruction. So, if the last instruction, be it emulated or
4352          * not, left the system with the INT_STI flag enabled, it
4353          * means that the last instruction is an sti. We should not
4354          * leave the flag on in this case. The same goes for mov ss
4355          */
4356         if (!(int_shadow & mask))
4357                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4358 }
4359
4360 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4361 {
4362         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4363         if (ctxt->exception.vector == PF_VECTOR)
4364                 kvm_propagate_fault(vcpu, &ctxt->exception);
4365         else if (ctxt->exception.error_code_valid)
4366                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4367                                       ctxt->exception.error_code);
4368         else
4369                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4370 }
4371
4372 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4373                               const unsigned long *regs)
4374 {
4375         memset(&ctxt->twobyte, 0,
4376                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4377         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4378
4379         ctxt->fetch.start = 0;
4380         ctxt->fetch.end = 0;
4381         ctxt->io_read.pos = 0;
4382         ctxt->io_read.end = 0;
4383         ctxt->mem_read.pos = 0;
4384         ctxt->mem_read.end = 0;
4385 }
4386
4387 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4388 {
4389         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4390         int cs_db, cs_l;
4391
4392         /*
4393          * TODO: fix emulate.c to use guest_read/write_register
4394          * instead of direct ->regs accesses, can save hundred cycles
4395          * on Intel for instructions that don't read/change RSP, for
4396          * for example.
4397          */
4398         cache_all_regs(vcpu);
4399
4400         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4401
4402         ctxt->eflags = kvm_get_rflags(vcpu);
4403         ctxt->eip = kvm_rip_read(vcpu);
4404         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4405                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4406                      cs_l                               ? X86EMUL_MODE_PROT64 :
4407                      cs_db                              ? X86EMUL_MODE_PROT32 :
4408                                                           X86EMUL_MODE_PROT16;
4409         ctxt->guest_mode = is_guest_mode(vcpu);
4410
4411         init_decode_cache(ctxt, vcpu->arch.regs);
4412         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4413 }
4414
4415 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4416 {
4417         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4418         int ret;
4419
4420         init_emulate_ctxt(vcpu);
4421
4422         ctxt->op_bytes = 2;
4423         ctxt->ad_bytes = 2;
4424         ctxt->_eip = ctxt->eip + inc_eip;
4425         ret = emulate_int_real(ctxt, irq);
4426
4427         if (ret != X86EMUL_CONTINUE)
4428                 return EMULATE_FAIL;
4429
4430         ctxt->eip = ctxt->_eip;
4431         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4432         kvm_rip_write(vcpu, ctxt->eip);
4433         kvm_set_rflags(vcpu, ctxt->eflags);
4434
4435         if (irq == NMI_VECTOR)
4436                 vcpu->arch.nmi_pending = 0;
4437         else
4438                 vcpu->arch.interrupt.pending = false;
4439
4440         return EMULATE_DONE;
4441 }
4442 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4443
4444 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4445 {
4446         int r = EMULATE_DONE;
4447
4448         ++vcpu->stat.insn_emulation_fail;
4449         trace_kvm_emulate_insn_failed(vcpu);
4450         if (!is_guest_mode(vcpu)) {
4451                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4452                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4453                 vcpu->run->internal.ndata = 0;
4454                 r = EMULATE_FAIL;
4455         }
4456         kvm_queue_exception(vcpu, UD_VECTOR);
4457
4458         return r;
4459 }
4460
4461 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4462 {
4463         gpa_t gpa;
4464
4465         if (tdp_enabled)
4466                 return false;
4467
4468         /*
4469          * if emulation was due to access to shadowed page table
4470          * and it failed try to unshadow page and re-entetr the
4471          * guest to let CPU execute the instruction.
4472          */
4473         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4474                 return true;
4475
4476         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4477
4478         if (gpa == UNMAPPED_GVA)
4479                 return true; /* let cpu generate fault */
4480
4481         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4482                 return true;
4483
4484         return false;
4485 }
4486
4487 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4488                               unsigned long cr2,  int emulation_type)
4489 {
4490         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4491         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4492
4493         last_retry_eip = vcpu->arch.last_retry_eip;
4494         last_retry_addr = vcpu->arch.last_retry_addr;
4495
4496         /*
4497          * If the emulation is caused by #PF and it is non-page_table
4498          * writing instruction, it means the VM-EXIT is caused by shadow
4499          * page protected, we can zap the shadow page and retry this
4500          * instruction directly.
4501          *
4502          * Note: if the guest uses a non-page-table modifying instruction
4503          * on the PDE that points to the instruction, then we will unmap
4504          * the instruction and go to an infinite loop. So, we cache the
4505          * last retried eip and the last fault address, if we meet the eip
4506          * and the address again, we can break out of the potential infinite
4507          * loop.
4508          */
4509         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4510
4511         if (!(emulation_type & EMULTYPE_RETRY))
4512                 return false;
4513
4514         if (x86_page_table_writing_insn(ctxt))
4515                 return false;
4516
4517         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4518                 return false;
4519
4520         vcpu->arch.last_retry_eip = ctxt->eip;
4521         vcpu->arch.last_retry_addr = cr2;
4522
4523         if (!vcpu->arch.mmu.direct_map)
4524                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4525
4526         kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4527
4528         return true;
4529 }
4530
4531 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4532                             unsigned long cr2,
4533                             int emulation_type,
4534                             void *insn,
4535                             int insn_len)
4536 {
4537         int r;
4538         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4539         bool writeback = true;
4540
4541         kvm_clear_exception_queue(vcpu);
4542
4543         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4544                 init_emulate_ctxt(vcpu);
4545                 ctxt->interruptibility = 0;
4546                 ctxt->have_exception = false;
4547                 ctxt->perm_ok = false;
4548
4549                 ctxt->only_vendor_specific_insn
4550                         = emulation_type & EMULTYPE_TRAP_UD;
4551
4552                 r = x86_decode_insn(ctxt, insn, insn_len);
4553
4554                 trace_kvm_emulate_insn_start(vcpu);
4555                 ++vcpu->stat.insn_emulation;
4556                 if (r != EMULATION_OK)  {
4557                         if (emulation_type & EMULTYPE_TRAP_UD)
4558                                 return EMULATE_FAIL;
4559                         if (reexecute_instruction(vcpu, cr2))
4560                                 return EMULATE_DONE;
4561                         if (emulation_type & EMULTYPE_SKIP)
4562                                 return EMULATE_FAIL;
4563                         return handle_emulation_failure(vcpu);
4564                 }
4565         }
4566
4567         if (emulation_type & EMULTYPE_SKIP) {
4568                 kvm_rip_write(vcpu, ctxt->_eip);
4569                 return EMULATE_DONE;
4570         }
4571
4572         if (retry_instruction(ctxt, cr2, emulation_type))
4573                 return EMULATE_DONE;
4574
4575         /* this is needed for vmware backdoor interface to work since it
4576            changes registers values  during IO operation */
4577         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4578                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4579                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4580         }
4581
4582 restart:
4583         r = x86_emulate_insn(ctxt);
4584
4585         if (r == EMULATION_INTERCEPTED)
4586                 return EMULATE_DONE;
4587
4588         if (r == EMULATION_FAILED) {
4589                 if (reexecute_instruction(vcpu, cr2))
4590                         return EMULATE_DONE;
4591
4592                 return handle_emulation_failure(vcpu);
4593         }
4594
4595         if (ctxt->have_exception) {
4596                 inject_emulated_exception(vcpu);
4597                 r = EMULATE_DONE;
4598         } else if (vcpu->arch.pio.count) {
4599                 if (!vcpu->arch.pio.in)
4600                         vcpu->arch.pio.count = 0;
4601                 else
4602                         writeback = false;
4603                 r = EMULATE_DO_MMIO;
4604         } else if (vcpu->mmio_needed) {
4605                 if (!vcpu->mmio_is_write)
4606                         writeback = false;
4607                 r = EMULATE_DO_MMIO;
4608         } else if (r == EMULATION_RESTART)
4609                 goto restart;
4610         else
4611                 r = EMULATE_DONE;
4612
4613         if (writeback) {
4614                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4615                 kvm_set_rflags(vcpu, ctxt->eflags);
4616                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4617                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4618                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4619                 kvm_rip_write(vcpu, ctxt->eip);
4620         } else
4621                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4622
4623         return r;
4624 }
4625 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4626
4627 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4628 {
4629         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4630         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4631                                             size, port, &val, 1);
4632         /* do not return to emulator after return from userspace */
4633         vcpu->arch.pio.count = 0;
4634         return ret;
4635 }
4636 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4637
4638 static void tsc_bad(void *info)
4639 {
4640         __this_cpu_write(cpu_tsc_khz, 0);
4641 }
4642
4643 static void tsc_khz_changed(void *data)
4644 {
4645         struct cpufreq_freqs *freq = data;
4646         unsigned long khz = 0;
4647
4648         if (data)
4649                 khz = freq->new;
4650         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4651                 khz = cpufreq_quick_get(raw_smp_processor_id());
4652         if (!khz)
4653                 khz = tsc_khz;
4654         __this_cpu_write(cpu_tsc_khz, khz);
4655 }
4656
4657 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4658                                      void *data)
4659 {
4660         struct cpufreq_freqs *freq = data;
4661         struct kvm *kvm;
4662         struct kvm_vcpu *vcpu;
4663         int i, send_ipi = 0;
4664
4665         /*
4666          * We allow guests to temporarily run on slowing clocks,
4667          * provided we notify them after, or to run on accelerating
4668          * clocks, provided we notify them before.  Thus time never
4669          * goes backwards.
4670          *
4671          * However, we have a problem.  We can't atomically update
4672          * the frequency of a given CPU from this function; it is
4673          * merely a notifier, which can be called from any CPU.
4674          * Changing the TSC frequency at arbitrary points in time
4675          * requires a recomputation of local variables related to
4676          * the TSC for each VCPU.  We must flag these local variables
4677          * to be updated and be sure the update takes place with the
4678          * new frequency before any guests proceed.
4679          *
4680          * Unfortunately, the combination of hotplug CPU and frequency
4681          * change creates an intractable locking scenario; the order
4682          * of when these callouts happen is undefined with respect to
4683          * CPU hotplug, and they can race with each other.  As such,
4684          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4685          * undefined; you can actually have a CPU frequency change take
4686          * place in between the computation of X and the setting of the
4687          * variable.  To protect against this problem, all updates of
4688          * the per_cpu tsc_khz variable are done in an interrupt
4689          * protected IPI, and all callers wishing to update the value
4690          * must wait for a synchronous IPI to complete (which is trivial
4691          * if the caller is on the CPU already).  This establishes the
4692          * necessary total order on variable updates.
4693          *
4694          * Note that because a guest time update may take place
4695          * anytime after the setting of the VCPU's request bit, the
4696          * correct TSC value must be set before the request.  However,
4697          * to ensure the update actually makes it to any guest which
4698          * starts running in hardware virtualization between the set
4699          * and the acquisition of the spinlock, we must also ping the
4700          * CPU after setting the request bit.
4701          *
4702          */
4703
4704         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4705                 return 0;
4706         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4707                 return 0;
4708
4709         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4710
4711         raw_spin_lock(&kvm_lock);
4712         list_for_each_entry(kvm, &vm_list, vm_list) {
4713                 kvm_for_each_vcpu(i, vcpu, kvm) {
4714                         if (vcpu->cpu != freq->cpu)
4715                                 continue;
4716                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4717                         if (vcpu->cpu != smp_processor_id())
4718                                 send_ipi = 1;
4719                 }
4720         }
4721         raw_spin_unlock(&kvm_lock);
4722
4723         if (freq->old < freq->new && send_ipi) {
4724                 /*
4725                  * We upscale the frequency.  Must make the guest
4726                  * doesn't see old kvmclock values while running with
4727                  * the new frequency, otherwise we risk the guest sees
4728                  * time go backwards.
4729                  *
4730                  * In case we update the frequency for another cpu
4731                  * (which might be in guest context) send an interrupt
4732                  * to kick the cpu out of guest context.  Next time
4733                  * guest context is entered kvmclock will be updated,
4734                  * so the guest will not see stale values.
4735                  */
4736                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4737         }
4738         return 0;
4739 }
4740
4741 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4742         .notifier_call  = kvmclock_cpufreq_notifier
4743 };
4744
4745 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4746                                         unsigned long action, void *hcpu)
4747 {
4748         unsigned int cpu = (unsigned long)hcpu;
4749
4750         switch (action) {
4751                 case CPU_ONLINE:
4752                 case CPU_DOWN_FAILED:
4753                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4754                         break;
4755                 case CPU_DOWN_PREPARE:
4756                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4757                         break;
4758         }
4759         return NOTIFY_OK;
4760 }
4761
4762 static struct notifier_block kvmclock_cpu_notifier_block = {
4763         .notifier_call  = kvmclock_cpu_notifier,
4764         .priority = -INT_MAX
4765 };
4766
4767 static void kvm_timer_init(void)
4768 {
4769         int cpu;
4770
4771         max_tsc_khz = tsc_khz;
4772         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4773         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4774 #ifdef CONFIG_CPU_FREQ
4775                 struct cpufreq_policy policy;
4776                 memset(&policy, 0, sizeof(policy));
4777                 cpu = get_cpu();
4778                 cpufreq_get_policy(&policy, cpu);
4779                 if (policy.cpuinfo.max_freq)
4780                         max_tsc_khz = policy.cpuinfo.max_freq;
4781                 put_cpu();
4782 #endif
4783                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4784                                           CPUFREQ_TRANSITION_NOTIFIER);
4785         }
4786         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4787         for_each_online_cpu(cpu)
4788                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4789 }
4790
4791 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4792
4793 int kvm_is_in_guest(void)
4794 {
4795         return __this_cpu_read(current_vcpu) != NULL;
4796 }
4797
4798 static int kvm_is_user_mode(void)
4799 {
4800         int user_mode = 3;
4801
4802         if (__this_cpu_read(current_vcpu))
4803                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
4804
4805         return user_mode != 0;
4806 }
4807
4808 static unsigned long kvm_get_guest_ip(void)
4809 {
4810         unsigned long ip = 0;
4811
4812         if (__this_cpu_read(current_vcpu))
4813                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
4814
4815         return ip;
4816 }
4817
4818 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4819         .is_in_guest            = kvm_is_in_guest,
4820         .is_user_mode           = kvm_is_user_mode,
4821         .get_guest_ip           = kvm_get_guest_ip,
4822 };
4823
4824 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4825 {
4826         __this_cpu_write(current_vcpu, vcpu);
4827 }
4828 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4829
4830 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4831 {
4832         __this_cpu_write(current_vcpu, NULL);
4833 }
4834 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4835
4836 static void kvm_set_mmio_spte_mask(void)
4837 {
4838         u64 mask;
4839         int maxphyaddr = boot_cpu_data.x86_phys_bits;
4840
4841         /*
4842          * Set the reserved bits and the present bit of an paging-structure
4843          * entry to generate page fault with PFER.RSV = 1.
4844          */
4845         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
4846         mask |= 1ull;
4847
4848 #ifdef CONFIG_X86_64
4849         /*
4850          * If reserved bit is not supported, clear the present bit to disable
4851          * mmio page fault.
4852          */
4853         if (maxphyaddr == 52)
4854                 mask &= ~1ull;
4855 #endif
4856
4857         kvm_mmu_set_mmio_spte_mask(mask);
4858 }
4859
4860 int kvm_arch_init(void *opaque)
4861 {
4862         int r;
4863         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4864
4865         if (kvm_x86_ops) {
4866                 printk(KERN_ERR "kvm: already loaded the other module\n");
4867                 r = -EEXIST;
4868                 goto out;
4869         }
4870
4871         if (!ops->cpu_has_kvm_support()) {
4872                 printk(KERN_ERR "kvm: no hardware support\n");
4873                 r = -EOPNOTSUPP;
4874                 goto out;
4875         }
4876         if (ops->disabled_by_bios()) {
4877                 printk(KERN_ERR "kvm: disabled by bios\n");
4878                 r = -EOPNOTSUPP;
4879                 goto out;
4880         }
4881
4882         r = kvm_mmu_module_init();
4883         if (r)
4884                 goto out;
4885
4886         kvm_set_mmio_spte_mask();
4887         kvm_init_msr_list();
4888
4889         kvm_x86_ops = ops;
4890         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4891                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4892
4893         kvm_timer_init();
4894
4895         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4896
4897         if (cpu_has_xsave)
4898                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4899
4900         return 0;
4901
4902 out:
4903         return r;
4904 }
4905
4906 void kvm_arch_exit(void)
4907 {
4908         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4909
4910         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4911                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4912                                             CPUFREQ_TRANSITION_NOTIFIER);
4913         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4914         kvm_x86_ops = NULL;
4915         kvm_mmu_module_exit();
4916 }
4917
4918 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4919 {
4920         ++vcpu->stat.halt_exits;
4921         if (irqchip_in_kernel(vcpu->kvm)) {
4922                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4923                 return 1;
4924         } else {
4925                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4926                 return 0;
4927         }
4928 }
4929 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4930
4931 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4932 {
4933         u64 param, ingpa, outgpa, ret;
4934         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4935         bool fast, longmode;
4936         int cs_db, cs_l;
4937
4938         /*
4939          * hypercall generates UD from non zero cpl and real mode
4940          * per HYPER-V spec
4941          */
4942         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4943                 kvm_queue_exception(vcpu, UD_VECTOR);
4944                 return 0;
4945         }
4946
4947         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4948         longmode = is_long_mode(vcpu) && cs_l == 1;
4949
4950         if (!longmode) {
4951                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4952                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4953                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4954                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4955                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4956                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4957         }
4958 #ifdef CONFIG_X86_64
4959         else {
4960                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4961                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4962                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4963         }
4964 #endif
4965
4966         code = param & 0xffff;
4967         fast = (param >> 16) & 0x1;
4968         rep_cnt = (param >> 32) & 0xfff;
4969         rep_idx = (param >> 48) & 0xfff;
4970
4971         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4972
4973         switch (code) {
4974         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4975                 kvm_vcpu_on_spin(vcpu);
4976                 break;
4977         default:
4978                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4979                 break;
4980         }
4981
4982         ret = res | (((u64)rep_done & 0xfff) << 32);
4983         if (longmode) {
4984                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4985         } else {
4986                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4987                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4988         }
4989
4990         return 1;
4991 }
4992
4993 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4994 {
4995         unsigned long nr, a0, a1, a2, a3, ret;
4996         int r = 1;
4997
4998         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4999                 return kvm_hv_hypercall(vcpu);
5000
5001         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5002         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5003         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5004         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5005         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5006
5007         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5008
5009         if (!is_long_mode(vcpu)) {
5010                 nr &= 0xFFFFFFFF;
5011                 a0 &= 0xFFFFFFFF;
5012                 a1 &= 0xFFFFFFFF;
5013                 a2 &= 0xFFFFFFFF;
5014                 a3 &= 0xFFFFFFFF;
5015         }
5016
5017         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5018                 ret = -KVM_EPERM;
5019                 goto out;
5020         }
5021
5022         switch (nr) {
5023         case KVM_HC_VAPIC_POLL_IRQ:
5024                 ret = 0;
5025                 break;
5026         default:
5027                 ret = -KVM_ENOSYS;
5028                 break;
5029         }
5030 out:
5031         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5032         ++vcpu->stat.hypercalls;
5033         return r;
5034 }
5035 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5036
5037 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5038 {
5039         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5040         char instruction[3];
5041         unsigned long rip = kvm_rip_read(vcpu);
5042
5043         /*
5044          * Blow out the MMU to ensure that no other VCPU has an active mapping
5045          * to ensure that the updated hypercall appears atomically across all
5046          * VCPUs.
5047          */
5048         kvm_mmu_zap_all(vcpu->kvm);
5049
5050         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5051
5052         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5053 }
5054
5055 /*
5056  * Check if userspace requested an interrupt window, and that the
5057  * interrupt window is open.
5058  *
5059  * No need to exit to userspace if we already have an interrupt queued.
5060  */
5061 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5062 {
5063         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5064                 vcpu->run->request_interrupt_window &&
5065                 kvm_arch_interrupt_allowed(vcpu));
5066 }
5067
5068 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5069 {
5070         struct kvm_run *kvm_run = vcpu->run;
5071
5072         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5073         kvm_run->cr8 = kvm_get_cr8(vcpu);
5074         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5075         if (irqchip_in_kernel(vcpu->kvm))
5076                 kvm_run->ready_for_interrupt_injection = 1;
5077         else
5078                 kvm_run->ready_for_interrupt_injection =
5079                         kvm_arch_interrupt_allowed(vcpu) &&
5080                         !kvm_cpu_has_interrupt(vcpu) &&
5081                         !kvm_event_needs_reinjection(vcpu);
5082 }
5083
5084 static void vapic_enter(struct kvm_vcpu *vcpu)
5085 {
5086         struct kvm_lapic *apic = vcpu->arch.apic;
5087         struct page *page;
5088
5089         if (!apic || !apic->vapic_addr)
5090                 return;
5091
5092         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5093
5094         vcpu->arch.apic->vapic_page = page;
5095 }
5096
5097 static void vapic_exit(struct kvm_vcpu *vcpu)
5098 {
5099         struct kvm_lapic *apic = vcpu->arch.apic;
5100         int idx;
5101
5102         if (!apic || !apic->vapic_addr)
5103                 return;
5104
5105         idx = srcu_read_lock(&vcpu->kvm->srcu);
5106         kvm_release_page_dirty(apic->vapic_page);
5107         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5108         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5109 }
5110
5111 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5112 {
5113         int max_irr, tpr;
5114
5115         if (!kvm_x86_ops->update_cr8_intercept)
5116                 return;
5117
5118         if (!vcpu->arch.apic)
5119                 return;
5120
5121         if (!vcpu->arch.apic->vapic_addr)
5122                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5123         else
5124                 max_irr = -1;
5125
5126         if (max_irr != -1)
5127                 max_irr >>= 4;
5128
5129         tpr = kvm_lapic_get_cr8(vcpu);
5130
5131         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5132 }
5133
5134 static void inject_pending_event(struct kvm_vcpu *vcpu)
5135 {
5136         /* try to reinject previous events if any */
5137         if (vcpu->arch.exception.pending) {
5138                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5139                                         vcpu->arch.exception.has_error_code,
5140                                         vcpu->arch.exception.error_code);
5141                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5142                                           vcpu->arch.exception.has_error_code,
5143                                           vcpu->arch.exception.error_code,
5144                                           vcpu->arch.exception.reinject);
5145                 return;
5146         }
5147
5148         if (vcpu->arch.nmi_injected) {
5149                 kvm_x86_ops->set_nmi(vcpu);
5150                 return;
5151         }
5152
5153         if (vcpu->arch.interrupt.pending) {
5154                 kvm_x86_ops->set_irq(vcpu);
5155                 return;
5156         }
5157
5158         /* try to inject new event if pending */
5159         if (vcpu->arch.nmi_pending) {
5160                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5161                         --vcpu->arch.nmi_pending;
5162                         vcpu->arch.nmi_injected = true;
5163                         kvm_x86_ops->set_nmi(vcpu);
5164                 }
5165         } else if (kvm_cpu_has_interrupt(vcpu)) {
5166                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5167                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5168                                             false);
5169                         kvm_x86_ops->set_irq(vcpu);
5170                 }
5171         }
5172 }
5173
5174 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5175 {
5176         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5177                         !vcpu->guest_xcr0_loaded) {
5178                 /* kvm_set_xcr() also depends on this */
5179                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5180                 vcpu->guest_xcr0_loaded = 1;
5181         }
5182 }
5183
5184 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5185 {
5186         if (vcpu->guest_xcr0_loaded) {
5187                 if (vcpu->arch.xcr0 != host_xcr0)
5188                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5189                 vcpu->guest_xcr0_loaded = 0;
5190         }
5191 }
5192
5193 static void process_nmi(struct kvm_vcpu *vcpu)
5194 {
5195         unsigned limit = 2;
5196
5197         /*
5198          * x86 is limited to one NMI running, and one NMI pending after it.
5199          * If an NMI is already in progress, limit further NMIs to just one.
5200          * Otherwise, allow two (and we'll inject the first one immediately).
5201          */
5202         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5203                 limit = 1;
5204
5205         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5206         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5207         kvm_make_request(KVM_REQ_EVENT, vcpu);
5208 }
5209
5210 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5211 {
5212         int r;
5213         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5214                 vcpu->run->request_interrupt_window;
5215         bool req_immediate_exit = 0;
5216
5217         if (vcpu->requests) {
5218                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5219                         kvm_mmu_unload(vcpu);
5220                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5221                         __kvm_migrate_timers(vcpu);
5222                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5223                         r = kvm_guest_time_update(vcpu);
5224                         if (unlikely(r))
5225                                 goto out;
5226                 }
5227                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5228                         kvm_mmu_sync_roots(vcpu);
5229                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5230                         kvm_x86_ops->tlb_flush(vcpu);
5231                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5232                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5233                         r = 0;
5234                         goto out;
5235                 }
5236                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5237                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5238                         r = 0;
5239                         goto out;
5240                 }
5241                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5242                         vcpu->fpu_active = 0;
5243                         kvm_x86_ops->fpu_deactivate(vcpu);
5244                 }
5245                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5246                         /* Page is swapped out. Do synthetic halt */
5247                         vcpu->arch.apf.halted = true;
5248                         r = 1;
5249                         goto out;
5250                 }
5251                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5252                         record_steal_time(vcpu);
5253                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5254                         process_nmi(vcpu);
5255                 req_immediate_exit =
5256                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5257                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5258                         kvm_handle_pmu_event(vcpu);
5259                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5260                         kvm_deliver_pmi(vcpu);
5261         }
5262
5263         r = kvm_mmu_reload(vcpu);
5264         if (unlikely(r))
5265                 goto out;
5266
5267         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5268                 inject_pending_event(vcpu);
5269
5270                 /* enable NMI/IRQ window open exits if needed */
5271                 if (vcpu->arch.nmi_pending)
5272                         kvm_x86_ops->enable_nmi_window(vcpu);
5273                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5274                         kvm_x86_ops->enable_irq_window(vcpu);
5275
5276                 if (kvm_lapic_enabled(vcpu)) {
5277                         update_cr8_intercept(vcpu);
5278                         kvm_lapic_sync_to_vapic(vcpu);
5279                 }
5280         }
5281
5282         preempt_disable();
5283
5284         kvm_x86_ops->prepare_guest_switch(vcpu);
5285         if (vcpu->fpu_active)
5286                 kvm_load_guest_fpu(vcpu);
5287         kvm_load_guest_xcr0(vcpu);
5288
5289         vcpu->mode = IN_GUEST_MODE;
5290
5291         /* We should set ->mode before check ->requests,
5292          * see the comment in make_all_cpus_request.
5293          */
5294         smp_mb();
5295
5296         local_irq_disable();
5297
5298         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5299             || need_resched() || signal_pending(current)) {
5300                 vcpu->mode = OUTSIDE_GUEST_MODE;
5301                 smp_wmb();
5302                 local_irq_enable();
5303                 preempt_enable();
5304                 kvm_x86_ops->cancel_injection(vcpu);
5305                 r = 1;
5306                 goto out;
5307         }
5308
5309         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5310
5311         if (req_immediate_exit)
5312                 smp_send_reschedule(vcpu->cpu);
5313
5314         kvm_guest_enter();
5315
5316         if (unlikely(vcpu->arch.switch_db_regs)) {
5317                 set_debugreg(0, 7);
5318                 set_debugreg(vcpu->arch.eff_db[0], 0);
5319                 set_debugreg(vcpu->arch.eff_db[1], 1);
5320                 set_debugreg(vcpu->arch.eff_db[2], 2);
5321                 set_debugreg(vcpu->arch.eff_db[3], 3);
5322         }
5323
5324         trace_kvm_entry(vcpu->vcpu_id);
5325         kvm_x86_ops->run(vcpu);
5326
5327         /*
5328          * If the guest has used debug registers, at least dr7
5329          * will be disabled while returning to the host.
5330          * If we don't have active breakpoints in the host, we don't
5331          * care about the messed up debug address registers. But if
5332          * we have some of them active, restore the old state.
5333          */
5334         if (hw_breakpoint_active())
5335                 hw_breakpoint_restore();
5336
5337         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5338
5339         vcpu->mode = OUTSIDE_GUEST_MODE;
5340         smp_wmb();
5341         local_irq_enable();
5342
5343         ++vcpu->stat.exits;
5344
5345         /*
5346          * We must have an instruction between local_irq_enable() and
5347          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5348          * the interrupt shadow.  The stat.exits increment will do nicely.
5349          * But we need to prevent reordering, hence this barrier():
5350          */
5351         barrier();
5352
5353         kvm_guest_exit();
5354
5355         preempt_enable();
5356
5357         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5358
5359         /*
5360          * Profile KVM exit RIPs:
5361          */
5362         if (unlikely(prof_on == KVM_PROFILING)) {
5363                 unsigned long rip = kvm_rip_read(vcpu);
5364                 profile_hit(KVM_PROFILING, (void *)rip);
5365         }
5366
5367         if (unlikely(vcpu->arch.tsc_always_catchup))
5368                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5369
5370         kvm_lapic_sync_from_vapic(vcpu);
5371
5372         r = kvm_x86_ops->handle_exit(vcpu);
5373 out:
5374         return r;
5375 }
5376
5377
5378 static int __vcpu_run(struct kvm_vcpu *vcpu)
5379 {
5380         int r;
5381         struct kvm *kvm = vcpu->kvm;
5382
5383         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5384                 pr_debug("vcpu %d received sipi with vector # %x\n",
5385                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5386                 kvm_lapic_reset(vcpu);
5387                 r = kvm_arch_vcpu_reset(vcpu);
5388                 if (r)
5389                         return r;
5390                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5391         }
5392
5393         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5394         vapic_enter(vcpu);
5395
5396         r = 1;
5397         while (r > 0) {
5398                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5399                     !vcpu->arch.apf.halted)
5400                         r = vcpu_enter_guest(vcpu);
5401                 else {
5402                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5403                         kvm_vcpu_block(vcpu);
5404                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5405                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5406                         {
5407                                 switch(vcpu->arch.mp_state) {
5408                                 case KVM_MP_STATE_HALTED:
5409                                         vcpu->arch.mp_state =
5410                                                 KVM_MP_STATE_RUNNABLE;
5411                                 case KVM_MP_STATE_RUNNABLE:
5412                                         vcpu->arch.apf.halted = false;
5413                                         break;
5414                                 case KVM_MP_STATE_SIPI_RECEIVED:
5415                                 default:
5416                                         r = -EINTR;
5417                                         break;
5418                                 }
5419                         }
5420                 }
5421
5422                 if (r <= 0)
5423                         break;
5424
5425                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5426                 if (kvm_cpu_has_pending_timer(vcpu))
5427                         kvm_inject_pending_timer_irqs(vcpu);
5428
5429                 if (dm_request_for_irq_injection(vcpu)) {
5430                         r = -EINTR;
5431                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5432                         ++vcpu->stat.request_irq_exits;
5433                 }
5434
5435                 kvm_check_async_pf_completion(vcpu);
5436
5437                 if (signal_pending(current)) {
5438                         r = -EINTR;
5439                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5440                         ++vcpu->stat.signal_exits;
5441                 }
5442                 if (need_resched()) {
5443                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5444                         kvm_resched(vcpu);
5445                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5446                 }
5447         }
5448
5449         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5450
5451         vapic_exit(vcpu);
5452
5453         return r;
5454 }
5455
5456 static int complete_mmio(struct kvm_vcpu *vcpu)
5457 {
5458         struct kvm_run *run = vcpu->run;
5459         int r;
5460
5461         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5462                 return 1;
5463
5464         if (vcpu->mmio_needed) {
5465                 vcpu->mmio_needed = 0;
5466                 if (!vcpu->mmio_is_write)
5467                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5468                                run->mmio.data, 8);
5469                 vcpu->mmio_index += 8;
5470                 if (vcpu->mmio_index < vcpu->mmio_size) {
5471                         run->exit_reason = KVM_EXIT_MMIO;
5472                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5473                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5474                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5475                         run->mmio.is_write = vcpu->mmio_is_write;
5476                         vcpu->mmio_needed = 1;
5477                         return 0;
5478                 }
5479                 if (vcpu->mmio_is_write)
5480                         return 1;
5481                 vcpu->mmio_read_completed = 1;
5482         }
5483         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5484         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5485         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5486         if (r != EMULATE_DONE)
5487                 return 0;
5488         return 1;
5489 }
5490
5491 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5492 {
5493         int r;
5494         sigset_t sigsaved;
5495
5496         if (!tsk_used_math(current) && init_fpu(current))
5497                 return -ENOMEM;
5498
5499         if (vcpu->sigset_active)
5500                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5501
5502         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5503                 kvm_vcpu_block(vcpu);
5504                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5505                 r = -EAGAIN;
5506                 goto out;
5507         }
5508
5509         /* re-sync apic's tpr */
5510         if (!irqchip_in_kernel(vcpu->kvm)) {
5511                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5512                         r = -EINVAL;
5513                         goto out;
5514                 }
5515         }
5516
5517         r = complete_mmio(vcpu);
5518         if (r <= 0)
5519                 goto out;
5520
5521         r = __vcpu_run(vcpu);
5522
5523 out:
5524         post_kvm_run_save(vcpu);
5525         if (vcpu->sigset_active)
5526                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5527
5528         return r;
5529 }
5530
5531 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5532 {
5533         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5534                 /*
5535                  * We are here if userspace calls get_regs() in the middle of
5536                  * instruction emulation. Registers state needs to be copied
5537                  * back from emulation context to vcpu. Usrapace shouldn't do
5538                  * that usually, but some bad designed PV devices (vmware
5539                  * backdoor interface) need this to work
5540                  */
5541                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5542                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5543                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5544         }
5545         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5546         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5547         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5548         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5549         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5550         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5551         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5552         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5553 #ifdef CONFIG_X86_64
5554         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5555         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5556         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5557         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5558         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5559         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5560         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5561         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5562 #endif
5563
5564         regs->rip = kvm_rip_read(vcpu);
5565         regs->rflags = kvm_get_rflags(vcpu);
5566
5567         return 0;
5568 }
5569
5570 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5571 {
5572         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5573         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5574
5575         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5576         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5577         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5578         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5579         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5580         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5581         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5582         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5583 #ifdef CONFIG_X86_64
5584         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5585         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5586         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5587         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5588         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5589         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5590         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5591         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5592 #endif
5593
5594         kvm_rip_write(vcpu, regs->rip);
5595         kvm_set_rflags(vcpu, regs->rflags);
5596
5597         vcpu->arch.exception.pending = false;
5598
5599         kvm_make_request(KVM_REQ_EVENT, vcpu);
5600
5601         return 0;
5602 }
5603
5604 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5605 {
5606         struct kvm_segment cs;
5607
5608         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5609         *db = cs.db;
5610         *l = cs.l;
5611 }
5612 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5613
5614 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5615                                   struct kvm_sregs *sregs)
5616 {
5617         struct desc_ptr dt;
5618
5619         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5620         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5621         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5622         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5623         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5624         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5625
5626         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5627         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5628
5629         kvm_x86_ops->get_idt(vcpu, &dt);
5630         sregs->idt.limit = dt.size;
5631         sregs->idt.base = dt.address;
5632         kvm_x86_ops->get_gdt(vcpu, &dt);
5633         sregs->gdt.limit = dt.size;
5634         sregs->gdt.base = dt.address;
5635
5636         sregs->cr0 = kvm_read_cr0(vcpu);
5637         sregs->cr2 = vcpu->arch.cr2;
5638         sregs->cr3 = kvm_read_cr3(vcpu);
5639         sregs->cr4 = kvm_read_cr4(vcpu);
5640         sregs->cr8 = kvm_get_cr8(vcpu);
5641         sregs->efer = vcpu->arch.efer;
5642         sregs->apic_base = kvm_get_apic_base(vcpu);
5643
5644         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5645
5646         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5647                 set_bit(vcpu->arch.interrupt.nr,
5648                         (unsigned long *)sregs->interrupt_bitmap);
5649
5650         return 0;
5651 }
5652
5653 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5654                                     struct kvm_mp_state *mp_state)
5655 {
5656         mp_state->mp_state = vcpu->arch.mp_state;
5657         return 0;
5658 }
5659
5660 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5661                                     struct kvm_mp_state *mp_state)
5662 {
5663         vcpu->arch.mp_state = mp_state->mp_state;
5664         kvm_make_request(KVM_REQ_EVENT, vcpu);
5665         return 0;
5666 }
5667
5668 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
5669                     int reason, bool has_error_code, u32 error_code)
5670 {
5671         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5672         int ret;
5673
5674         init_emulate_ctxt(vcpu);
5675
5676         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
5677                                    has_error_code, error_code);
5678
5679         if (ret)
5680                 return EMULATE_FAIL;
5681
5682         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5683         kvm_rip_write(vcpu, ctxt->eip);
5684         kvm_set_rflags(vcpu, ctxt->eflags);
5685         kvm_make_request(KVM_REQ_EVENT, vcpu);
5686         return EMULATE_DONE;
5687 }
5688 EXPORT_SYMBOL_GPL(kvm_task_switch);
5689
5690 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5691                                   struct kvm_sregs *sregs)
5692 {
5693         int mmu_reset_needed = 0;
5694         int pending_vec, max_bits, idx;
5695         struct desc_ptr dt;
5696
5697         dt.size = sregs->idt.limit;
5698         dt.address = sregs->idt.base;
5699         kvm_x86_ops->set_idt(vcpu, &dt);
5700         dt.size = sregs->gdt.limit;
5701         dt.address = sregs->gdt.base;
5702         kvm_x86_ops->set_gdt(vcpu, &dt);
5703
5704         vcpu->arch.cr2 = sregs->cr2;
5705         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5706         vcpu->arch.cr3 = sregs->cr3;
5707         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5708
5709         kvm_set_cr8(vcpu, sregs->cr8);
5710
5711         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5712         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5713         kvm_set_apic_base(vcpu, sregs->apic_base);
5714
5715         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5716         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5717         vcpu->arch.cr0 = sregs->cr0;
5718
5719         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5720         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5721         if (sregs->cr4 & X86_CR4_OSXSAVE)
5722                 kvm_update_cpuid(vcpu);
5723
5724         idx = srcu_read_lock(&vcpu->kvm->srcu);
5725         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5726                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5727                 mmu_reset_needed = 1;
5728         }
5729         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5730
5731         if (mmu_reset_needed)
5732                 kvm_mmu_reset_context(vcpu);
5733
5734         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5735         pending_vec = find_first_bit(
5736                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5737         if (pending_vec < max_bits) {
5738                 kvm_queue_interrupt(vcpu, pending_vec, false);
5739                 pr_debug("Set back pending irq %d\n", pending_vec);
5740         }
5741
5742         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5743         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5744         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5745         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5746         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5747         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5748
5749         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5750         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5751
5752         update_cr8_intercept(vcpu);
5753
5754         /* Older userspace won't unhalt the vcpu on reset. */
5755         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5756             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5757             !is_protmode(vcpu))
5758                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5759
5760         kvm_make_request(KVM_REQ_EVENT, vcpu);
5761
5762         return 0;
5763 }
5764
5765 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5766                                         struct kvm_guest_debug *dbg)
5767 {
5768         unsigned long rflags;
5769         int i, r;
5770
5771         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5772                 r = -EBUSY;
5773                 if (vcpu->arch.exception.pending)
5774                         goto out;
5775                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5776                         kvm_queue_exception(vcpu, DB_VECTOR);
5777                 else
5778                         kvm_queue_exception(vcpu, BP_VECTOR);
5779         }
5780
5781         /*
5782          * Read rflags as long as potentially injected trace flags are still
5783          * filtered out.
5784          */
5785         rflags = kvm_get_rflags(vcpu);
5786
5787         vcpu->guest_debug = dbg->control;
5788         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5789                 vcpu->guest_debug = 0;
5790
5791         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5792                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5793                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5794                 vcpu->arch.switch_db_regs =
5795                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5796         } else {
5797                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5798                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5799                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5800         }
5801
5802         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5803                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5804                         get_segment_base(vcpu, VCPU_SREG_CS);
5805
5806         /*
5807          * Trigger an rflags update that will inject or remove the trace
5808          * flags.
5809          */
5810         kvm_set_rflags(vcpu, rflags);
5811
5812         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5813
5814         r = 0;
5815
5816 out:
5817
5818         return r;
5819 }
5820
5821 /*
5822  * Translate a guest virtual address to a guest physical address.
5823  */
5824 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5825                                     struct kvm_translation *tr)
5826 {
5827         unsigned long vaddr = tr->linear_address;
5828         gpa_t gpa;
5829         int idx;
5830
5831         idx = srcu_read_lock(&vcpu->kvm->srcu);
5832         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5833         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5834         tr->physical_address = gpa;
5835         tr->valid = gpa != UNMAPPED_GVA;
5836         tr->writeable = 1;
5837         tr->usermode = 0;
5838
5839         return 0;
5840 }
5841
5842 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5843 {
5844         struct i387_fxsave_struct *fxsave =
5845                         &vcpu->arch.guest_fpu.state->fxsave;
5846
5847         memcpy(fpu->fpr, fxsave->st_space, 128);
5848         fpu->fcw = fxsave->cwd;
5849         fpu->fsw = fxsave->swd;
5850         fpu->ftwx = fxsave->twd;
5851         fpu->last_opcode = fxsave->fop;
5852         fpu->last_ip = fxsave->rip;
5853         fpu->last_dp = fxsave->rdp;
5854         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5855
5856         return 0;
5857 }
5858
5859 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5860 {
5861         struct i387_fxsave_struct *fxsave =
5862                         &vcpu->arch.guest_fpu.state->fxsave;
5863
5864         memcpy(fxsave->st_space, fpu->fpr, 128);
5865         fxsave->cwd = fpu->fcw;
5866         fxsave->swd = fpu->fsw;
5867         fxsave->twd = fpu->ftwx;
5868         fxsave->fop = fpu->last_opcode;
5869         fxsave->rip = fpu->last_ip;
5870         fxsave->rdp = fpu->last_dp;
5871         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5872
5873         return 0;
5874 }
5875
5876 int fx_init(struct kvm_vcpu *vcpu)
5877 {
5878         int err;
5879
5880         err = fpu_alloc(&vcpu->arch.guest_fpu);
5881         if (err)
5882                 return err;
5883
5884         fpu_finit(&vcpu->arch.guest_fpu);
5885
5886         /*
5887          * Ensure guest xcr0 is valid for loading
5888          */
5889         vcpu->arch.xcr0 = XSTATE_FP;
5890
5891         vcpu->arch.cr0 |= X86_CR0_ET;
5892
5893         return 0;
5894 }
5895 EXPORT_SYMBOL_GPL(fx_init);
5896
5897 static void fx_free(struct kvm_vcpu *vcpu)
5898 {
5899         fpu_free(&vcpu->arch.guest_fpu);
5900 }
5901
5902 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5903 {
5904         if (vcpu->guest_fpu_loaded)
5905                 return;
5906
5907         /*
5908          * Restore all possible states in the guest,
5909          * and assume host would use all available bits.
5910          * Guest xcr0 would be loaded later.
5911          */
5912         kvm_put_guest_xcr0(vcpu);
5913         vcpu->guest_fpu_loaded = 1;
5914         unlazy_fpu(current);
5915         fpu_restore_checking(&vcpu->arch.guest_fpu);
5916         trace_kvm_fpu(1);
5917 }
5918
5919 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5920 {
5921         kvm_put_guest_xcr0(vcpu);
5922
5923         if (!vcpu->guest_fpu_loaded)
5924                 return;
5925
5926         vcpu->guest_fpu_loaded = 0;
5927         fpu_save_init(&vcpu->arch.guest_fpu);
5928         ++vcpu->stat.fpu_reload;
5929         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5930         trace_kvm_fpu(0);
5931 }
5932
5933 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5934 {
5935         kvmclock_reset(vcpu);
5936
5937         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5938         fx_free(vcpu);
5939         kvm_x86_ops->vcpu_free(vcpu);
5940 }
5941
5942 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5943                                                 unsigned int id)
5944 {
5945         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5946                 printk_once(KERN_WARNING
5947                 "kvm: SMP vm created on host with unstable TSC; "
5948                 "guest TSC will not be reliable\n");
5949         return kvm_x86_ops->vcpu_create(kvm, id);
5950 }
5951
5952 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5953 {
5954         int r;
5955
5956         vcpu->arch.mtrr_state.have_fixed = 1;
5957         vcpu_load(vcpu);
5958         r = kvm_arch_vcpu_reset(vcpu);
5959         if (r == 0)
5960                 r = kvm_mmu_setup(vcpu);
5961         vcpu_put(vcpu);
5962
5963         return r;
5964 }
5965
5966 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5967 {
5968         vcpu->arch.apf.msr_val = 0;
5969
5970         vcpu_load(vcpu);
5971         kvm_mmu_unload(vcpu);
5972         vcpu_put(vcpu);
5973
5974         fx_free(vcpu);
5975         kvm_x86_ops->vcpu_free(vcpu);
5976 }
5977
5978 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5979 {
5980         atomic_set(&vcpu->arch.nmi_queued, 0);
5981         vcpu->arch.nmi_pending = 0;
5982         vcpu->arch.nmi_injected = false;
5983
5984         vcpu->arch.switch_db_regs = 0;
5985         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5986         vcpu->arch.dr6 = DR6_FIXED_1;
5987         vcpu->arch.dr7 = DR7_FIXED_1;
5988
5989         kvm_make_request(KVM_REQ_EVENT, vcpu);
5990         vcpu->arch.apf.msr_val = 0;
5991         vcpu->arch.st.msr_val = 0;
5992
5993         kvmclock_reset(vcpu);
5994
5995         kvm_clear_async_pf_completion_queue(vcpu);
5996         kvm_async_pf_hash_reset(vcpu);
5997         vcpu->arch.apf.halted = false;
5998
5999         kvm_pmu_reset(vcpu);
6000
6001         return kvm_x86_ops->vcpu_reset(vcpu);
6002 }
6003
6004 int kvm_arch_hardware_enable(void *garbage)
6005 {
6006         struct kvm *kvm;
6007         struct kvm_vcpu *vcpu;
6008         int i;
6009         int ret;
6010         u64 local_tsc;
6011         u64 max_tsc = 0;
6012         bool stable, backwards_tsc = false;
6013
6014         kvm_shared_msr_cpu_online();
6015         ret = kvm_x86_ops->hardware_enable(garbage);
6016         if (ret != 0)
6017                 return ret;
6018
6019         local_tsc = native_read_tsc();
6020         stable = !check_tsc_unstable();
6021         list_for_each_entry(kvm, &vm_list, vm_list) {
6022                 kvm_for_each_vcpu(i, vcpu, kvm) {
6023                         if (!stable && vcpu->cpu == smp_processor_id())
6024                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6025                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6026                                 backwards_tsc = true;
6027                                 if (vcpu->arch.last_host_tsc > max_tsc)
6028                                         max_tsc = vcpu->arch.last_host_tsc;
6029                         }
6030                 }
6031         }
6032
6033         /*
6034          * Sometimes, even reliable TSCs go backwards.  This happens on
6035          * platforms that reset TSC during suspend or hibernate actions, but
6036          * maintain synchronization.  We must compensate.  Fortunately, we can
6037          * detect that condition here, which happens early in CPU bringup,
6038          * before any KVM threads can be running.  Unfortunately, we can't
6039          * bring the TSCs fully up to date with real time, as we aren't yet far
6040          * enough into CPU bringup that we know how much real time has actually
6041          * elapsed; our helper function, get_kernel_ns() will be using boot
6042          * variables that haven't been updated yet.
6043          *
6044          * So we simply find the maximum observed TSC above, then record the
6045          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6046          * the adjustment will be applied.  Note that we accumulate
6047          * adjustments, in case multiple suspend cycles happen before some VCPU
6048          * gets a chance to run again.  In the event that no KVM threads get a
6049          * chance to run, we will miss the entire elapsed period, as we'll have
6050          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6051          * loose cycle time.  This isn't too big a deal, since the loss will be
6052          * uniform across all VCPUs (not to mention the scenario is extremely
6053          * unlikely). It is possible that a second hibernate recovery happens
6054          * much faster than a first, causing the observed TSC here to be
6055          * smaller; this would require additional padding adjustment, which is
6056          * why we set last_host_tsc to the local tsc observed here.
6057          *
6058          * N.B. - this code below runs only on platforms with reliable TSC,
6059          * as that is the only way backwards_tsc is set above.  Also note
6060          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6061          * have the same delta_cyc adjustment applied if backwards_tsc
6062          * is detected.  Note further, this adjustment is only done once,
6063          * as we reset last_host_tsc on all VCPUs to stop this from being
6064          * called multiple times (one for each physical CPU bringup).
6065          *
6066          * Platforms with unnreliable TSCs don't have to deal with this, they
6067          * will be compensated by the logic in vcpu_load, which sets the TSC to
6068          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6069          * guarantee that they stay in perfect synchronization.
6070          */
6071         if (backwards_tsc) {
6072                 u64 delta_cyc = max_tsc - local_tsc;
6073                 list_for_each_entry(kvm, &vm_list, vm_list) {
6074                         kvm_for_each_vcpu(i, vcpu, kvm) {
6075                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6076                                 vcpu->arch.last_host_tsc = local_tsc;
6077                         }
6078
6079                         /*
6080                          * We have to disable TSC offset matching.. if you were
6081                          * booting a VM while issuing an S4 host suspend....
6082                          * you may have some problem.  Solving this issue is
6083                          * left as an exercise to the reader.
6084                          */
6085                         kvm->arch.last_tsc_nsec = 0;
6086                         kvm->arch.last_tsc_write = 0;
6087                 }
6088
6089         }
6090         return 0;
6091 }
6092
6093 void kvm_arch_hardware_disable(void *garbage)
6094 {
6095         kvm_x86_ops->hardware_disable(garbage);
6096         drop_user_return_notifiers(garbage);
6097 }
6098
6099 int kvm_arch_hardware_setup(void)
6100 {
6101         return kvm_x86_ops->hardware_setup();
6102 }
6103
6104 void kvm_arch_hardware_unsetup(void)
6105 {
6106         kvm_x86_ops->hardware_unsetup();
6107 }
6108
6109 void kvm_arch_check_processor_compat(void *rtn)
6110 {
6111         kvm_x86_ops->check_processor_compatibility(rtn);
6112 }
6113
6114 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6115 {
6116         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6117 }
6118
6119 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6120 {
6121         struct page *page;
6122         struct kvm *kvm;
6123         int r;
6124
6125         BUG_ON(vcpu->kvm == NULL);
6126         kvm = vcpu->kvm;
6127
6128         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6129         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6130                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6131         else
6132                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6133
6134         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6135         if (!page) {
6136                 r = -ENOMEM;
6137                 goto fail;
6138         }
6139         vcpu->arch.pio_data = page_address(page);
6140
6141         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6142
6143         r = kvm_mmu_create(vcpu);
6144         if (r < 0)
6145                 goto fail_free_pio_data;
6146
6147         if (irqchip_in_kernel(kvm)) {
6148                 r = kvm_create_lapic(vcpu);
6149                 if (r < 0)
6150                         goto fail_mmu_destroy;
6151         }
6152
6153         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6154                                        GFP_KERNEL);
6155         if (!vcpu->arch.mce_banks) {
6156                 r = -ENOMEM;
6157                 goto fail_free_lapic;
6158         }
6159         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6160
6161         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6162                 goto fail_free_mce_banks;
6163
6164         kvm_async_pf_hash_reset(vcpu);
6165         kvm_pmu_init(vcpu);
6166
6167         return 0;
6168 fail_free_mce_banks:
6169         kfree(vcpu->arch.mce_banks);
6170 fail_free_lapic:
6171         kvm_free_lapic(vcpu);
6172 fail_mmu_destroy:
6173         kvm_mmu_destroy(vcpu);
6174 fail_free_pio_data:
6175         free_page((unsigned long)vcpu->arch.pio_data);
6176 fail:
6177         return r;
6178 }
6179
6180 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6181 {
6182         int idx;
6183
6184         kvm_pmu_destroy(vcpu);
6185         kfree(vcpu->arch.mce_banks);
6186         kvm_free_lapic(vcpu);
6187         idx = srcu_read_lock(&vcpu->kvm->srcu);
6188         kvm_mmu_destroy(vcpu);
6189         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6190         free_page((unsigned long)vcpu->arch.pio_data);
6191 }
6192
6193 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6194 {
6195         if (type)
6196                 return -EINVAL;
6197
6198         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6199         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6200
6201         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6202         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6203
6204         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6205
6206         return 0;
6207 }
6208
6209 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6210 {
6211         vcpu_load(vcpu);
6212         kvm_mmu_unload(vcpu);
6213         vcpu_put(vcpu);
6214 }
6215
6216 static void kvm_free_vcpus(struct kvm *kvm)
6217 {
6218         unsigned int i;
6219         struct kvm_vcpu *vcpu;
6220
6221         /*
6222          * Unpin any mmu pages first.
6223          */
6224         kvm_for_each_vcpu(i, vcpu, kvm) {
6225                 kvm_clear_async_pf_completion_queue(vcpu);
6226                 kvm_unload_vcpu_mmu(vcpu);
6227         }
6228         kvm_for_each_vcpu(i, vcpu, kvm)
6229                 kvm_arch_vcpu_free(vcpu);
6230
6231         mutex_lock(&kvm->lock);
6232         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6233                 kvm->vcpus[i] = NULL;
6234
6235         atomic_set(&kvm->online_vcpus, 0);
6236         mutex_unlock(&kvm->lock);
6237 }
6238
6239 void kvm_arch_sync_events(struct kvm *kvm)
6240 {
6241         kvm_free_all_assigned_devices(kvm);
6242         kvm_free_pit(kvm);
6243 }
6244
6245 void kvm_arch_destroy_vm(struct kvm *kvm)
6246 {
6247         kvm_iommu_unmap_guest(kvm);
6248         kfree(kvm->arch.vpic);
6249         kfree(kvm->arch.vioapic);
6250         kvm_free_vcpus(kvm);
6251         if (kvm->arch.apic_access_page)
6252                 put_page(kvm->arch.apic_access_page);
6253         if (kvm->arch.ept_identity_pagetable)
6254                 put_page(kvm->arch.ept_identity_pagetable);
6255 }
6256
6257 void kvm_arch_free_memslot(struct kvm_memory_slot *free,
6258                            struct kvm_memory_slot *dont)
6259 {
6260         int i;
6261
6262         for (i = 0; i < KVM_NR_PAGE_SIZES - 1; ++i) {
6263                 if (!dont || free->arch.lpage_info[i] != dont->arch.lpage_info[i]) {
6264                         vfree(free->arch.lpage_info[i]);
6265                         free->arch.lpage_info[i] = NULL;
6266                 }
6267         }
6268 }
6269
6270 int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
6271 {
6272         int i;
6273
6274         for (i = 0; i < KVM_NR_PAGE_SIZES - 1; ++i) {
6275                 unsigned long ugfn;
6276                 int lpages;
6277                 int level = i + 2;
6278
6279                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
6280                                       slot->base_gfn, level) + 1;
6281
6282                 slot->arch.lpage_info[i] =
6283                         vzalloc(lpages * sizeof(*slot->arch.lpage_info[i]));
6284                 if (!slot->arch.lpage_info[i])
6285                         goto out_free;
6286
6287                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
6288                         slot->arch.lpage_info[i][0].write_count = 1;
6289                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
6290                         slot->arch.lpage_info[i][lpages - 1].write_count = 1;
6291                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
6292                 /*
6293                  * If the gfn and userspace address are not aligned wrt each
6294                  * other, or if explicitly asked to, disable large page
6295                  * support for this slot
6296                  */
6297                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
6298                     !kvm_largepages_enabled()) {
6299                         unsigned long j;
6300
6301                         for (j = 0; j < lpages; ++j)
6302                                 slot->arch.lpage_info[i][j].write_count = 1;
6303                 }
6304         }
6305
6306         return 0;
6307
6308 out_free:
6309         for (i = 0; i < KVM_NR_PAGE_SIZES - 1; ++i) {
6310                 vfree(slot->arch.lpage_info[i]);
6311                 slot->arch.lpage_info[i] = NULL;
6312         }
6313         return -ENOMEM;
6314 }
6315
6316 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6317                                 struct kvm_memory_slot *memslot,
6318                                 struct kvm_memory_slot old,
6319                                 struct kvm_userspace_memory_region *mem,
6320                                 int user_alloc)
6321 {
6322         int npages = memslot->npages;
6323         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6324
6325         /* Prevent internal slot pages from being moved by fork()/COW. */
6326         if (memslot->id >= KVM_MEMORY_SLOTS)
6327                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6328
6329         /*To keep backward compatibility with older userspace,
6330          *x86 needs to hanlde !user_alloc case.
6331          */
6332         if (!user_alloc) {
6333                 if (npages && !old.rmap) {
6334                         unsigned long userspace_addr;
6335
6336                         down_write(&current->mm->mmap_sem);
6337                         userspace_addr = do_mmap(NULL, 0,
6338                                                  npages * PAGE_SIZE,
6339                                                  PROT_READ | PROT_WRITE,
6340                                                  map_flags,
6341                                                  0);
6342                         up_write(&current->mm->mmap_sem);
6343
6344                         if (IS_ERR((void *)userspace_addr))
6345                                 return PTR_ERR((void *)userspace_addr);
6346
6347                         memslot->userspace_addr = userspace_addr;
6348                 }
6349         }
6350
6351
6352         return 0;
6353 }
6354
6355 void kvm_arch_commit_memory_region(struct kvm *kvm,
6356                                 struct kvm_userspace_memory_region *mem,
6357                                 struct kvm_memory_slot old,
6358                                 int user_alloc)
6359 {
6360
6361         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6362
6363         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6364                 int ret;
6365
6366                 down_write(&current->mm->mmap_sem);
6367                 ret = do_munmap(current->mm, old.userspace_addr,
6368                                 old.npages * PAGE_SIZE);
6369                 up_write(&current->mm->mmap_sem);
6370                 if (ret < 0)
6371                         printk(KERN_WARNING
6372                                "kvm_vm_ioctl_set_memory_region: "
6373                                "failed to munmap memory\n");
6374         }
6375
6376         if (!kvm->arch.n_requested_mmu_pages)
6377                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6378
6379         spin_lock(&kvm->mmu_lock);
6380         if (nr_mmu_pages)
6381                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6382         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6383         spin_unlock(&kvm->mmu_lock);
6384 }
6385
6386 void kvm_arch_flush_shadow(struct kvm *kvm)
6387 {
6388         kvm_mmu_zap_all(kvm);
6389         kvm_reload_remote_mmus(kvm);
6390 }
6391
6392 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6393 {
6394         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6395                 !vcpu->arch.apf.halted)
6396                 || !list_empty_careful(&vcpu->async_pf.done)
6397                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6398                 || atomic_read(&vcpu->arch.nmi_queued) ||
6399                 (kvm_arch_interrupt_allowed(vcpu) &&
6400                  kvm_cpu_has_interrupt(vcpu));
6401 }
6402
6403 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6404 {
6405         int me;
6406         int cpu = vcpu->cpu;
6407
6408         if (waitqueue_active(&vcpu->wq)) {
6409                 wake_up_interruptible(&vcpu->wq);
6410                 ++vcpu->stat.halt_wakeup;
6411         }
6412
6413         me = get_cpu();
6414         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6415                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6416                         smp_send_reschedule(cpu);
6417         put_cpu();
6418 }
6419
6420 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6421 {
6422         return kvm_x86_ops->interrupt_allowed(vcpu);
6423 }
6424
6425 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6426 {
6427         unsigned long current_rip = kvm_rip_read(vcpu) +
6428                 get_segment_base(vcpu, VCPU_SREG_CS);
6429
6430         return current_rip == linear_rip;
6431 }
6432 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6433
6434 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6435 {
6436         unsigned long rflags;
6437
6438         rflags = kvm_x86_ops->get_rflags(vcpu);
6439         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6440                 rflags &= ~X86_EFLAGS_TF;
6441         return rflags;
6442 }
6443 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6444
6445 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6446 {
6447         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6448             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6449                 rflags |= X86_EFLAGS_TF;
6450         kvm_x86_ops->set_rflags(vcpu, rflags);
6451         kvm_make_request(KVM_REQ_EVENT, vcpu);
6452 }
6453 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6454
6455 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6456 {
6457         int r;
6458
6459         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6460               is_error_page(work->page))
6461                 return;
6462
6463         r = kvm_mmu_reload(vcpu);
6464         if (unlikely(r))
6465                 return;
6466
6467         if (!vcpu->arch.mmu.direct_map &&
6468               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6469                 return;
6470
6471         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6472 }
6473
6474 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6475 {
6476         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6477 }
6478
6479 static inline u32 kvm_async_pf_next_probe(u32 key)
6480 {
6481         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6482 }
6483
6484 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6485 {
6486         u32 key = kvm_async_pf_hash_fn(gfn);
6487
6488         while (vcpu->arch.apf.gfns[key] != ~0)
6489                 key = kvm_async_pf_next_probe(key);
6490
6491         vcpu->arch.apf.gfns[key] = gfn;
6492 }
6493
6494 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6495 {
6496         int i;
6497         u32 key = kvm_async_pf_hash_fn(gfn);
6498
6499         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6500                      (vcpu->arch.apf.gfns[key] != gfn &&
6501                       vcpu->arch.apf.gfns[key] != ~0); i++)
6502                 key = kvm_async_pf_next_probe(key);
6503
6504         return key;
6505 }
6506
6507 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6508 {
6509         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6510 }
6511
6512 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6513 {
6514         u32 i, j, k;
6515
6516         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6517         while (true) {
6518                 vcpu->arch.apf.gfns[i] = ~0;
6519                 do {
6520                         j = kvm_async_pf_next_probe(j);
6521                         if (vcpu->arch.apf.gfns[j] == ~0)
6522                                 return;
6523                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6524                         /*
6525                          * k lies cyclically in ]i,j]
6526                          * |    i.k.j |
6527                          * |....j i.k.| or  |.k..j i...|
6528                          */
6529                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6530                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6531                 i = j;
6532         }
6533 }
6534
6535 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6536 {
6537
6538         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6539                                       sizeof(val));
6540 }
6541
6542 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6543                                      struct kvm_async_pf *work)
6544 {
6545         struct x86_exception fault;
6546
6547         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6548         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6549
6550         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6551             (vcpu->arch.apf.send_user_only &&
6552              kvm_x86_ops->get_cpl(vcpu) == 0))
6553                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6554         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6555                 fault.vector = PF_VECTOR;
6556                 fault.error_code_valid = true;
6557                 fault.error_code = 0;
6558                 fault.nested_page_fault = false;
6559                 fault.address = work->arch.token;
6560                 kvm_inject_page_fault(vcpu, &fault);
6561         }
6562 }
6563
6564 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6565                                  struct kvm_async_pf *work)
6566 {
6567         struct x86_exception fault;
6568
6569         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6570         if (is_error_page(work->page))
6571                 work->arch.token = ~0; /* broadcast wakeup */
6572         else
6573                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6574
6575         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6576             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6577                 fault.vector = PF_VECTOR;
6578                 fault.error_code_valid = true;
6579                 fault.error_code = 0;
6580                 fault.nested_page_fault = false;
6581                 fault.address = work->arch.token;
6582                 kvm_inject_page_fault(vcpu, &fault);
6583         }
6584         vcpu->arch.apf.halted = false;
6585 }
6586
6587 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6588 {
6589         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6590                 return true;
6591         else
6592                 return !kvm_event_needs_reinjection(vcpu) &&
6593                         kvm_x86_ops->interrupt_allowed(vcpu);
6594 }
6595
6596 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6597 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6598 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6599 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6600 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6601 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6602 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6603 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6604 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6605 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6606 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6607 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);