arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <trace/events/kvm.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include "trace.h"
  51
  52 #include <asm/debugreg.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <asm/mtrr.h>
  56 #include <asm/mce.h>
  57 #include <asm/i387.h>
  58 #include <asm/xcr.h>
  59 #include <asm/pvclock.h>
  60 #include <asm/div64.h>
  61
  62 #define MAX_IO_MSRS 256
  63 #define CR0_RESERVED_BITS                                               \
  64         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  65                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  66                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  67 #define CR4_RESERVED_BITS                                               \
  68         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  69                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  70                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  71                           | X86_CR4_OSXSAVE \
  72                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  73
  74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  75
  76 #define KVM_MAX_MCE_BANKS 32
  77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  78
  79 /* EFER defaults:
  80  * - enable syscall per default because its emulated by KVM
  81  * - enable LME and LMA per default on 64 bit KVM
  82  */
  83 #ifdef CONFIG_X86_64
  84 static
  85 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  86 #else
  87 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  88 #endif
  89
  90 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  91 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  92
  93 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  94 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  95                                     struct kvm_cpuid_entry2 __user *entries);
  96
  97 struct kvm_x86_ops *kvm_x86_ops;
  98 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  99
 100 int ignore_msrs = 0;
 101 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
 102
 103 #define KVM_NR_SHARED_MSRS 16
 104
 105 struct kvm_shared_msrs_global {
 106         int nr;
 107         u32 msrs[KVM_NR_SHARED_MSRS];
 108 };
 109
 110 struct kvm_shared_msrs {
 111         struct user_return_notifier urn;
 112         bool registered;
 113         struct kvm_shared_msr_values {
 114                 u64 host;
 115                 u64 curr;
 116         } values[KVM_NR_SHARED_MSRS];
 117 };
 118
 119 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 120 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 121
 122 struct kvm_stats_debugfs_item debugfs_entries[] = {
 123         { "pf_fixed", VCPU_STAT(pf_fixed) },
 124         { "pf_guest", VCPU_STAT(pf_guest) },
 125         { "tlb_flush", VCPU_STAT(tlb_flush) },
 126         { "invlpg", VCPU_STAT(invlpg) },
 127         { "exits", VCPU_STAT(exits) },
 128         { "io_exits", VCPU_STAT(io_exits) },
 129         { "mmio_exits", VCPU_STAT(mmio_exits) },
 130         { "signal_exits", VCPU_STAT(signal_exits) },
 131         { "irq_window", VCPU_STAT(irq_window_exits) },
 132         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 133         { "halt_exits", VCPU_STAT(halt_exits) },
 134         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 135         { "hypercalls", VCPU_STAT(hypercalls) },
 136         { "request_irq", VCPU_STAT(request_irq_exits) },
 137         { "irq_exits", VCPU_STAT(irq_exits) },
 138         { "host_state_reload", VCPU_STAT(host_state_reload) },
 139         { "efer_reload", VCPU_STAT(efer_reload) },
 140         { "fpu_reload", VCPU_STAT(fpu_reload) },
 141         { "insn_emulation", VCPU_STAT(insn_emulation) },
 142         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 143         { "irq_injections", VCPU_STAT(irq_injections) },
 144         { "nmi_injections", VCPU_STAT(nmi_injections) },
 145         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 146         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 147         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 148         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 149         { "mmu_flooded", VM_STAT(mmu_flooded) },
 150         { "mmu_recycled", VM_STAT(mmu_recycled) },
 151         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 152         { "mmu_unsync", VM_STAT(mmu_unsync) },
 153         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 154         { "largepages", VM_STAT(lpages) },
 155         { NULL }
 156 };
 157
 158 u64 __read_mostly host_xcr0;
 159
 160 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 161 {
 162         int i;
 163         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 164                 vcpu->arch.apf.gfns[i] = ~0;
 165 }
 166
 167 static void kvm_on_user_return(struct user_return_notifier *urn)
 168 {
 169         unsigned slot;
 170         struct kvm_shared_msrs *locals
 171                 = container_of(urn, struct kvm_shared_msrs, urn);
 172         struct kvm_shared_msr_values *values;
 173
 174         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 175                 values = &locals->values[slot];
 176                 if (values->host != values->curr) {
 177                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 178                         values->curr = values->host;
 179                 }
 180         }
 181         locals->registered = false;
 182         user_return_notifier_unregister(urn);
 183 }
 184
 185 static void shared_msr_update(unsigned slot, u32 msr)
 186 {
 187         struct kvm_shared_msrs *smsr;
 188         u64 value;
 189
 190         smsr = &__get_cpu_var(shared_msrs);
 191         /* only read, and nobody should modify it at this time,
 192          * so don't need lock */
 193         if (slot >= shared_msrs_global.nr) {
 194                 printk(KERN_ERR "kvm: invalid MSR slot!");
 195                 return;
 196         }
 197         rdmsrl_safe(msr, &value);
 198         smsr->values[slot].host = value;
 199         smsr->values[slot].curr = value;
 200 }
 201
 202 void kvm_define_shared_msr(unsigned slot, u32 msr)
 203 {
 204         if (slot >= shared_msrs_global.nr)
 205                 shared_msrs_global.nr = slot + 1;
 206         shared_msrs_global.msrs[slot] = msr;
 207         /* we need ensured the shared_msr_global have been updated */
 208         smp_wmb();
 209 }
 210 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 211
 212 static void kvm_shared_msr_cpu_online(void)
 213 {
 214         unsigned i;
 215
 216         for (i = 0; i < shared_msrs_global.nr; ++i)
 217                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 218 }
 219
 220 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 221 {
 222         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 223
 224         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 225                 return;
 226         smsr->values[slot].curr = value;
 227         wrmsrl(shared_msrs_global.msrs[slot], value);
 228         if (!smsr->registered) {
 229                 smsr->urn.on_user_return = kvm_on_user_return;
 230                 user_return_notifier_register(&smsr->urn);
 231                 smsr->registered = true;
 232         }
 233 }
 234 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 235
 236 static void drop_user_return_notifiers(void *ignore)
 237 {
 238         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 239
 240         if (smsr->registered)
 241                 kvm_on_user_return(&smsr->urn);
 242 }
 243
 244 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 245 {
 246         if (irqchip_in_kernel(vcpu->kvm))
 247                 return vcpu->arch.apic_base;
 248         else
 249                 return vcpu->arch.apic_base;
 250 }
 251 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 252
 253 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 254 {
 255         /* TODO: reserve bits check */
 256         if (irqchip_in_kernel(vcpu->kvm))
 257                 kvm_lapic_set_base(vcpu, data);
 258         else
 259                 vcpu->arch.apic_base = data;
 260 }
 261 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 262
 263 #define EXCPT_BENIGN            0
 264 #define EXCPT_CONTRIBUTORY      1
 265 #define EXCPT_PF                2
 266
 267 static int exception_class(int vector)
 268 {
 269         switch (vector) {
 270         case PF_VECTOR:
 271                 return EXCPT_PF;
 272         case DE_VECTOR:
 273         case TS_VECTOR:
 274         case NP_VECTOR:
 275         case SS_VECTOR:
 276         case GP_VECTOR:
 277                 return EXCPT_CONTRIBUTORY;
 278         default:
 279                 break;
 280         }
 281         return EXCPT_BENIGN;
 282 }
 283
 284 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 285                 unsigned nr, bool has_error, u32 error_code,
 286                 bool reinject)
 287 {
 288         u32 prev_nr;
 289         int class1, class2;
 290
 291         kvm_make_request(KVM_REQ_EVENT, vcpu);
 292
 293         if (!vcpu->arch.exception.pending) {
 294         queue:
 295                 vcpu->arch.exception.pending = true;
 296                 vcpu->arch.exception.has_error_code = has_error;
 297                 vcpu->arch.exception.nr = nr;
 298                 vcpu->arch.exception.error_code = error_code;
 299                 vcpu->arch.exception.reinject = reinject;
 300                 return;
 301         }
 302
 303         /* to check exception */
 304         prev_nr = vcpu->arch.exception.nr;
 305         if (prev_nr == DF_VECTOR) {
 306                 /* triple fault -> shutdown */
 307                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 308                 return;
 309         }
 310         class1 = exception_class(prev_nr);
 311         class2 = exception_class(nr);
 312         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 313                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 314                 /* generate double fault per SDM Table 5-5 */
 315                 vcpu->arch.exception.pending = true;
 316                 vcpu->arch.exception.has_error_code = true;
 317                 vcpu->arch.exception.nr = DF_VECTOR;
 318                 vcpu->arch.exception.error_code = 0;
 319         } else
 320                 /* replace previous exception with a new one in a hope
 321                    that instruction re-execution will regenerate lost
 322                    exception */
 323                 goto queue;
 324 }
 325
 326 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 327 {
 328         kvm_multiple_exception(vcpu, nr, false, 0, false);
 329 }
 330 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 331
 332 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 333 {
 334         kvm_multiple_exception(vcpu, nr, false, 0, true);
 335 }
 336 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 337
 338 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 339 {
 340         if (err)
 341                 kvm_inject_gp(vcpu, 0);
 342         else
 343                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 344 }
 345 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 346
 347 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 348 {
 349         ++vcpu->stat.pf_guest;
 350         vcpu->arch.cr2 = fault->address;
 351         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 352 }
 353
 354 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 355 {
 356         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 357                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 358         else
 359                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 360 }
 361
 362 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 363 {
 364         kvm_make_request(KVM_REQ_NMI, vcpu);
 365         kvm_make_request(KVM_REQ_EVENT, vcpu);
 366 }
 367 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 368
 369 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 370 {
 371         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 372 }
 373 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 374
 375 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 376 {
 377         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 378 }
 379 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 380
 381 /*
 382  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 383  * a #GP and return false.
 384  */
 385 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 386 {
 387         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 388                 return true;
 389         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 390         return false;
 391 }
 392 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 393
 394 /*
 395  * This function will be used to read from the physical memory of the currently
 396  * running guest. The difference to kvm_read_guest_page is that this function
 397  * can read from guest physical or from the guest's guest physical memory.
 398  */
 399 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 400                             gfn_t ngfn, void *data, int offset, int len,
 401                             u32 access)
 402 {
 403         gfn_t real_gfn;
 404         gpa_t ngpa;
 405
 406         ngpa     = gfn_to_gpa(ngfn);
 407         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 408         if (real_gfn == UNMAPPED_GVA)
 409                 return -EFAULT;
 410
 411         real_gfn = gpa_to_gfn(real_gfn);
 412
 413         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 414 }
 415 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 416
 417 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 418                                void *data, int offset, int len, u32 access)
 419 {
 420         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 421                                        data, offset, len, access);
 422 }
 423
 424 /*
 425  * Load the pae pdptrs.  Return true is they are all valid.
 426  */
 427 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 428 {
 429         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 430         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 431         int i;
 432         int ret;
 433         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 434
 435         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 436                                       offset * sizeof(u64), sizeof(pdpte),
 437                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 438         if (ret < 0) {
 439                 ret = 0;
 440                 goto out;
 441         }
 442         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 443                 if (is_present_gpte(pdpte[i]) &&
 444                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 445                         ret = 0;
 446                         goto out;
 447                 }
 448         }
 449         ret = 1;
 450
 451         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 452         __set_bit(VCPU_EXREG_PDPTR,
 453                   (unsigned long *)&vcpu->arch.regs_avail);
 454         __set_bit(VCPU_EXREG_PDPTR,
 455                   (unsigned long *)&vcpu->arch.regs_dirty);
 456 out:
 457
 458         return ret;
 459 }
 460 EXPORT_SYMBOL_GPL(load_pdptrs);
 461
 462 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 463 {
 464         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 465         bool changed = true;
 466         int offset;
 467         gfn_t gfn;
 468         int r;
 469
 470         if (is_long_mode(vcpu) || !is_pae(vcpu))
 471                 return false;
 472
 473         if (!test_bit(VCPU_EXREG_PDPTR,
 474                       (unsigned long *)&vcpu->arch.regs_avail))
 475                 return true;
 476
 477         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 478         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 479         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 480                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 481         if (r < 0)
 482                 goto out;
 483         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 484 out:
 485
 486         return changed;
 487 }
 488
 489 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 490 {
 491         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 492         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 493                                     X86_CR0_CD | X86_CR0_NW;
 494
 495         cr0 |= X86_CR0_ET;
 496
 497 #ifdef CONFIG_X86_64
 498         if (cr0 & 0xffffffff00000000UL)
 499                 return 1;
 500 #endif
 501
 502         cr0 &= ~CR0_RESERVED_BITS;
 503
 504         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 505                 return 1;
 506
 507         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 508                 return 1;
 509
 510         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 511 #ifdef CONFIG_X86_64
 512                 if ((vcpu->arch.efer & EFER_LME)) {
 513                         int cs_db, cs_l;
 514
 515                         if (!is_pae(vcpu))
 516                                 return 1;
 517                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 518                         if (cs_l)
 519                                 return 1;
 520                 } else
 521 #endif
 522                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 523                                                  kvm_read_cr3(vcpu)))
 524                         return 1;
 525         }
 526
 527         kvm_x86_ops->set_cr0(vcpu, cr0);
 528
 529         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 530                 kvm_clear_async_pf_completion_queue(vcpu);
 531                 kvm_async_pf_hash_reset(vcpu);
 532         }
 533
 534         if ((cr0 ^ old_cr0) & update_bits)
 535                 kvm_mmu_reset_context(vcpu);
 536         return 0;
 537 }
 538 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 539
 540 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 541 {
 542         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 543 }
 544 EXPORT_SYMBOL_GPL(kvm_lmsw);
 545
 546 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 547 {
 548         u64 xcr0;
 549
 550         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 551         if (index != XCR_XFEATURE_ENABLED_MASK)
 552                 return 1;
 553         xcr0 = xcr;
 554         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 555                 return 1;
 556         if (!(xcr0 & XSTATE_FP))
 557                 return 1;
 558         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 559                 return 1;
 560         if (xcr0 & ~host_xcr0)
 561                 return 1;
 562         vcpu->arch.xcr0 = xcr0;
 563         vcpu->guest_xcr0_loaded = 0;
 564         return 0;
 565 }
 566
 567 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 568 {
 569         if (__kvm_set_xcr(vcpu, index, xcr)) {
 570                 kvm_inject_gp(vcpu, 0);
 571                 return 1;
 572         }
 573         return 0;
 574 }
 575 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 576
 577 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 578 {
 579         struct kvm_cpuid_entry2 *best;
 580
 581         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 582         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 583 }
 584
 585 static void update_cpuid(struct kvm_vcpu *vcpu)
 586 {
 587         struct kvm_cpuid_entry2 *best;
 588
 589         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 590         if (!best)
 591                 return;
 592
 593         /* Update OSXSAVE bit */
 594         if (cpu_has_xsave && best->function == 0x1) {
 595                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 596                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 597                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 598         }
 599 }
 600
 601 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 602 {
 603         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 604         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 605
 606         if (cr4 & CR4_RESERVED_BITS)
 607                 return 1;
 608
 609         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 610                 return 1;
 611
 612         if (is_long_mode(vcpu)) {
 613                 if (!(cr4 & X86_CR4_PAE))
 614                         return 1;
 615         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 616                    && ((cr4 ^ old_cr4) & pdptr_bits)
 617                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 618                                    kvm_read_cr3(vcpu)))
 619                 return 1;
 620
 621         if (cr4 & X86_CR4_VMXE)
 622                 return 1;
 623
 624         kvm_x86_ops->set_cr4(vcpu, cr4);
 625
 626         if ((cr4 ^ old_cr4) & pdptr_bits)
 627                 kvm_mmu_reset_context(vcpu);
 628
 629         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 630                 update_cpuid(vcpu);
 631
 632         return 0;
 633 }
 634 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 635
 636 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 637 {
 638         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 639                 kvm_mmu_sync_roots(vcpu);
 640                 kvm_mmu_flush_tlb(vcpu);
 641                 return 0;
 642         }
 643
 644         if (is_long_mode(vcpu)) {
 645                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 646                         return 1;
 647         } else {
 648                 if (is_pae(vcpu)) {
 649                         if (cr3 & CR3_PAE_RESERVED_BITS)
 650                                 return 1;
 651                         if (is_paging(vcpu) &&
 652                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 653                                 return 1;
 654                 }
 655                 /*
 656                  * We don't check reserved bits in nonpae mode, because
 657                  * this isn't enforced, and VMware depends on this.
 658                  */
 659         }
 660
 661         /*
 662          * Does the new cr3 value map to physical memory? (Note, we
 663          * catch an invalid cr3 even in real-mode, because it would
 664          * cause trouble later on when we turn on paging anyway.)
 665          *
 666          * A real CPU would silently accept an invalid cr3 and would
 667          * attempt to use it - with largely undefined (and often hard
 668          * to debug) behavior on the guest side.
 669          */
 670         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 671                 return 1;
 672         vcpu->arch.cr3 = cr3;
 673         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 674         vcpu->arch.mmu.new_cr3(vcpu);
 675         return 0;
 676 }
 677 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 678
 679 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 680 {
 681         if (cr8 & CR8_RESERVED_BITS)
 682                 return 1;
 683         if (irqchip_in_kernel(vcpu->kvm))
 684                 kvm_lapic_set_tpr(vcpu, cr8);
 685         else
 686                 vcpu->arch.cr8 = cr8;
 687         return 0;
 688 }
 689 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 690
 691 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 692 {
 693         if (irqchip_in_kernel(vcpu->kvm))
 694                 return kvm_lapic_get_cr8(vcpu);
 695         else
 696                 return vcpu->arch.cr8;
 697 }
 698 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 699
 700 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 701 {
 702         switch (dr) {
 703         case 0 ... 3:
 704                 vcpu->arch.db[dr] = val;
 705                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 706                         vcpu->arch.eff_db[dr] = val;
 707                 break;
 708         case 4:
 709                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 710                         return 1; /* #UD */
 711                 /* fall through */
 712         case 6:
 713                 if (val & 0xffffffff00000000ULL)
 714                         return -1; /* #GP */
 715                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 716                 break;
 717         case 5:
 718                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 719                         return 1; /* #UD */
 720                 /* fall through */
 721         default: /* 7 */
 722                 if (val & 0xffffffff00000000ULL)
 723                         return -1; /* #GP */
 724                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 725                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 726                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 727                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 728                 }
 729                 break;
 730         }
 731
 732         return 0;
 733 }
 734
 735 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 736 {
 737         int res;
 738
 739         res = __kvm_set_dr(vcpu, dr, val);
 740         if (res > 0)
 741                 kvm_queue_exception(vcpu, UD_VECTOR);
 742         else if (res < 0)
 743                 kvm_inject_gp(vcpu, 0);
 744
 745         return res;
 746 }
 747 EXPORT_SYMBOL_GPL(kvm_set_dr);
 748
 749 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 750 {
 751         switch (dr) {
 752         case 0 ... 3:
 753                 *val = vcpu->arch.db[dr];
 754                 break;
 755         case 4:
 756                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 757                         return 1;
 758                 /* fall through */
 759         case 6:
 760                 *val = vcpu->arch.dr6;
 761                 break;
 762         case 5:
 763                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 764                         return 1;
 765                 /* fall through */
 766         default: /* 7 */
 767                 *val = vcpu->arch.dr7;
 768                 break;
 769         }
 770
 771         return 0;
 772 }
 773
 774 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 775 {
 776         if (_kvm_get_dr(vcpu, dr, val)) {
 777                 kvm_queue_exception(vcpu, UD_VECTOR);
 778                 return 1;
 779         }
 780         return 0;
 781 }
 782 EXPORT_SYMBOL_GPL(kvm_get_dr);
 783
 784 /*
 785  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 786  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 787  *
 788  * This list is modified at module load time to reflect the
 789  * capabilities of the host cpu. This capabilities test skips MSRs that are
 790  * kvm-specific. Those are put in the beginning of the list.
 791  */
 792
 793 #define KVM_SAVE_MSRS_BEGIN     8
 794 static u32 msrs_to_save[] = {
 795         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 796         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 797         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 798         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
 799         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 800         MSR_STAR,
 801 #ifdef CONFIG_X86_64
 802         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 803 #endif
 804         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 805 };
 806
 807 static unsigned num_msrs_to_save;
 808
 809 static u32 emulated_msrs[] = {
 810         MSR_IA32_MISC_ENABLE,
 811         MSR_IA32_MCG_STATUS,
 812         MSR_IA32_MCG_CTL,
 813 };
 814
 815 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 816 {
 817         u64 old_efer = vcpu->arch.efer;
 818
 819         if (efer & efer_reserved_bits)
 820                 return 1;
 821
 822         if (is_paging(vcpu)
 823             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 824                 return 1;
 825
 826         if (efer & EFER_FFXSR) {
 827                 struct kvm_cpuid_entry2 *feat;
 828
 829                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 830                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 831                         return 1;
 832         }
 833
 834         if (efer & EFER_SVME) {
 835                 struct kvm_cpuid_entry2 *feat;
 836
 837                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 838                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 839                         return 1;
 840         }
 841
 842         efer &= ~EFER_LMA;
 843         efer |= vcpu->arch.efer & EFER_LMA;
 844
 845         kvm_x86_ops->set_efer(vcpu, efer);
 846
 847         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 848
 849         /* Update reserved bits */
 850         if ((efer ^ old_efer) & EFER_NX)
 851                 kvm_mmu_reset_context(vcpu);
 852
 853         return 0;
 854 }
 855
 856 void kvm_enable_efer_bits(u64 mask)
 857 {
 858        efer_reserved_bits &= ~mask;
 859 }
 860 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 861
 862
 863 /*
 864  * Writes msr value into into the appropriate "register".
 865  * Returns 0 on success, non-0 otherwise.
 866  * Assumes vcpu_load() was already called.
 867  */
 868 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 869 {
 870         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 871 }
 872
 873 /*
 874  * Adapt set_msr() to msr_io()'s calling convention
 875  */
 876 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 877 {
 878         return kvm_set_msr(vcpu, index, *data);
 879 }
 880
 881 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 882 {
 883         int version;
 884         int r;
 885         struct pvclock_wall_clock wc;
 886         struct timespec boot;
 887
 888         if (!wall_clock)
 889                 return;
 890
 891         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 892         if (r)
 893                 return;
 894
 895         if (version & 1)
 896                 ++version;  /* first time write, random junk */
 897
 898         ++version;
 899
 900         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 901
 902         /*
 903          * The guest calculates current wall clock time by adding
 904          * system time (updated by kvm_guest_time_update below) to the
 905          * wall clock specified here.  guest system time equals host
 906          * system time for us, thus we must fill in host boot time here.
 907          */
 908         getboottime(&boot);
 909
 910         wc.sec = boot.tv_sec;
 911         wc.nsec = boot.tv_nsec;
 912         wc.version = version;
 913
 914         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 915
 916         version++;
 917         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 918 }
 919
 920 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 921 {
 922         uint32_t quotient, remainder;
 923
 924         /* Don't try to replace with do_div(), this one calculates
 925          * "(dividend << 32) / divisor" */
 926         __asm__ ( "divl %4"
 927                   : "=a" (quotient), "=d" (remainder)
 928                   : "0" (0), "1" (dividend), "r" (divisor) );
 929         return quotient;
 930 }
 931
 932 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 933                                s8 *pshift, u32 *pmultiplier)
 934 {
 935         uint64_t scaled64;
 936         int32_t  shift = 0;
 937         uint64_t tps64;
 938         uint32_t tps32;
 939
 940         tps64 = base_khz * 1000LL;
 941         scaled64 = scaled_khz * 1000LL;
 942         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 943                 tps64 >>= 1;
 944                 shift--;
 945         }
 946
 947         tps32 = (uint32_t)tps64;
 948         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 949                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 950                         scaled64 >>= 1;
 951                 else
 952                         tps32 <<= 1;
 953                 shift++;
 954         }
 955
 956         *pshift = shift;
 957         *pmultiplier = div_frac(scaled64, tps32);
 958
 959         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 960                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 961 }
 962
 963 static inline u64 get_kernel_ns(void)
 964 {
 965         struct timespec ts;
 966
 967         WARN_ON(preemptible());
 968         ktime_get_ts(&ts);
 969         monotonic_to_bootbased(&ts);
 970         return timespec_to_ns(&ts);
 971 }
 972
 973 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 974 unsigned long max_tsc_khz;
 975
 976 static inline int kvm_tsc_changes_freq(void)
 977 {
 978         int cpu = get_cpu();
 979         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 980                   cpufreq_quick_get(cpu) != 0;
 981         put_cpu();
 982         return ret;
 983 }
 984
 985 static inline u64 nsec_to_cycles(u64 nsec)
 986 {
 987         u64 ret;
 988
 989         WARN_ON(preemptible());
 990         if (kvm_tsc_changes_freq())
 991                 printk_once(KERN_WARNING
 992                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 993         ret = nsec * __this_cpu_read(cpu_tsc_khz);
 994         do_div(ret, USEC_PER_SEC);
 995         return ret;
 996 }
 997
 998 static void kvm_arch_set_tsc_khz(struct kvm *kvm, u32 this_tsc_khz)
 999 {
1000         /* Compute a scale to convert nanoseconds in TSC cycles */
1001         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1002                            &kvm->arch.virtual_tsc_shift,
1003                            &kvm->arch.virtual_tsc_mult);
1004         kvm->arch.virtual_tsc_khz = this_tsc_khz;
1005 }
1006
1007 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1008 {
1009         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1010                                       vcpu->kvm->arch.virtual_tsc_mult,
1011                                       vcpu->kvm->arch.virtual_tsc_shift);
1012         tsc += vcpu->arch.last_tsc_write;
1013         return tsc;
1014 }
1015
1016 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1017 {
1018         struct kvm *kvm = vcpu->kvm;
1019         u64 offset, ns, elapsed;
1020         unsigned long flags;
1021         s64 sdiff;
1022
1023         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1024         offset = data - native_read_tsc();
1025         ns = get_kernel_ns();
1026         elapsed = ns - kvm->arch.last_tsc_nsec;
1027         sdiff = data - kvm->arch.last_tsc_write;
1028         if (sdiff < 0)
1029                 sdiff = -sdiff;
1030
1031         /*
1032          * Special case: close write to TSC within 5 seconds of
1033          * another CPU is interpreted as an attempt to synchronize
1034          * The 5 seconds is to accomodate host load / swapping as
1035          * well as any reset of TSC during the boot process.
1036          *
1037          * In that case, for a reliable TSC, we can match TSC offsets,
1038          * or make a best guest using elapsed value.
1039          */
1040         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1041             elapsed < 5ULL * NSEC_PER_SEC) {
1042                 if (!check_tsc_unstable()) {
1043                         offset = kvm->arch.last_tsc_offset;
1044                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1045                 } else {
1046                         u64 delta = nsec_to_cycles(elapsed);
1047                         offset += delta;
1048                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1049                 }
1050                 ns = kvm->arch.last_tsc_nsec;
1051         }
1052         kvm->arch.last_tsc_nsec = ns;
1053         kvm->arch.last_tsc_write = data;
1054         kvm->arch.last_tsc_offset = offset;
1055         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1056         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1057
1058         /* Reset of TSC must disable overshoot protection below */
1059         vcpu->arch.hv_clock.tsc_timestamp = 0;
1060         vcpu->arch.last_tsc_write = data;
1061         vcpu->arch.last_tsc_nsec = ns;
1062 }
1063 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1064
1065 static int kvm_guest_time_update(struct kvm_vcpu *v)
1066 {
1067         unsigned long flags;
1068         struct kvm_vcpu_arch *vcpu = &v->arch;
1069         void *shared_kaddr;
1070         unsigned long this_tsc_khz;
1071         s64 kernel_ns, max_kernel_ns;
1072         u64 tsc_timestamp;
1073
1074         /* Keep irq disabled to prevent changes to the clock */
1075         local_irq_save(flags);
1076         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1077         kernel_ns = get_kernel_ns();
1078         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1079
1080         if (unlikely(this_tsc_khz == 0)) {
1081                 local_irq_restore(flags);
1082                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1083                 return 1;
1084         }
1085
1086         /*
1087          * We may have to catch up the TSC to match elapsed wall clock
1088          * time for two reasons, even if kvmclock is used.
1089          *   1) CPU could have been running below the maximum TSC rate
1090          *   2) Broken TSC compensation resets the base at each VCPU
1091          *      entry to avoid unknown leaps of TSC even when running
1092          *      again on the same CPU.  This may cause apparent elapsed
1093          *      time to disappear, and the guest to stand still or run
1094          *      very slowly.
1095          */
1096         if (vcpu->tsc_catchup) {
1097                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1098                 if (tsc > tsc_timestamp) {
1099                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1100                         tsc_timestamp = tsc;
1101                 }
1102         }
1103
1104         local_irq_restore(flags);
1105
1106         if (!vcpu->time_page)
1107                 return 0;
1108
1109         /*
1110          * Time as measured by the TSC may go backwards when resetting the base
1111          * tsc_timestamp.  The reason for this is that the TSC resolution is
1112          * higher than the resolution of the other clock scales.  Thus, many
1113          * possible measurments of the TSC correspond to one measurement of any
1114          * other clock, and so a spread of values is possible.  This is not a
1115          * problem for the computation of the nanosecond clock; with TSC rates
1116          * around 1GHZ, there can only be a few cycles which correspond to one
1117          * nanosecond value, and any path through this code will inevitably
1118          * take longer than that.  However, with the kernel_ns value itself,
1119          * the precision may be much lower, down to HZ granularity.  If the
1120          * first sampling of TSC against kernel_ns ends in the low part of the
1121          * range, and the second in the high end of the range, we can get:
1122          *
1123          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1124          *
1125          * As the sampling errors potentially range in the thousands of cycles,
1126          * it is possible such a time value has already been observed by the
1127          * guest.  To protect against this, we must compute the system time as
1128          * observed by the guest and ensure the new system time is greater.
1129          */
1130         max_kernel_ns = 0;
1131         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1132                 max_kernel_ns = vcpu->last_guest_tsc -
1133                                 vcpu->hv_clock.tsc_timestamp;
1134                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1135                                     vcpu->hv_clock.tsc_to_system_mul,
1136                                     vcpu->hv_clock.tsc_shift);
1137                 max_kernel_ns += vcpu->last_kernel_ns;
1138         }
1139
1140         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1141                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1142                                    &vcpu->hv_clock.tsc_shift,
1143                                    &vcpu->hv_clock.tsc_to_system_mul);
1144                 vcpu->hw_tsc_khz = this_tsc_khz;
1145         }
1146
1147         if (max_kernel_ns > kernel_ns)
1148                 kernel_ns = max_kernel_ns;
1149
1150         /* With all the info we got, fill in the values */
1151         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1152         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1153         vcpu->last_kernel_ns = kernel_ns;
1154         vcpu->last_guest_tsc = tsc_timestamp;
1155         vcpu->hv_clock.flags = 0;
1156
1157         /*
1158          * The interface expects us to write an even number signaling that the
1159          * update is finished. Since the guest won't see the intermediate
1160          * state, we just increase by 2 at the end.
1161          */
1162         vcpu->hv_clock.version += 2;
1163
1164         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1165
1166         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1167                sizeof(vcpu->hv_clock));
1168
1169         kunmap_atomic(shared_kaddr, KM_USER0);
1170
1171         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1172         return 0;
1173 }
1174
1175 static bool msr_mtrr_valid(unsigned msr)
1176 {
1177         switch (msr) {
1178         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1179         case MSR_MTRRfix64K_00000:
1180         case MSR_MTRRfix16K_80000:
1181         case MSR_MTRRfix16K_A0000:
1182         case MSR_MTRRfix4K_C0000:
1183         case MSR_MTRRfix4K_C8000:
1184         case MSR_MTRRfix4K_D0000:
1185         case MSR_MTRRfix4K_D8000:
1186         case MSR_MTRRfix4K_E0000:
1187         case MSR_MTRRfix4K_E8000:
1188         case MSR_MTRRfix4K_F0000:
1189         case MSR_MTRRfix4K_F8000:
1190         case MSR_MTRRdefType:
1191         case MSR_IA32_CR_PAT:
1192                 return true;
1193         case 0x2f8:
1194                 return true;
1195         }
1196         return false;
1197 }
1198
1199 static bool valid_pat_type(unsigned t)
1200 {
1201         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1202 }
1203
1204 static bool valid_mtrr_type(unsigned t)
1205 {
1206         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1207 }
1208
1209 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1210 {
1211         int i;
1212
1213         if (!msr_mtrr_valid(msr))
1214                 return false;
1215
1216         if (msr == MSR_IA32_CR_PAT) {
1217                 for (i = 0; i < 8; i++)
1218                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1219                                 return false;
1220                 return true;
1221         } else if (msr == MSR_MTRRdefType) {
1222                 if (data & ~0xcff)
1223                         return false;
1224                 return valid_mtrr_type(data & 0xff);
1225         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1226                 for (i = 0; i < 8 ; i++)
1227                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1228                                 return false;
1229                 return true;
1230         }
1231
1232         /* variable MTRRs */
1233         return valid_mtrr_type(data & 0xff);
1234 }
1235
1236 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1237 {
1238         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1239
1240         if (!mtrr_valid(vcpu, msr, data))
1241                 return 1;
1242
1243         if (msr == MSR_MTRRdefType) {
1244                 vcpu->arch.mtrr_state.def_type = data;
1245                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1246         } else if (msr == MSR_MTRRfix64K_00000)
1247                 p[0] = data;
1248         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1249                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1250         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1251                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1252         else if (msr == MSR_IA32_CR_PAT)
1253                 vcpu->arch.pat = data;
1254         else {  /* Variable MTRRs */
1255                 int idx, is_mtrr_mask;
1256                 u64 *pt;
1257
1258                 idx = (msr - 0x200) / 2;
1259                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1260                 if (!is_mtrr_mask)
1261                         pt =
1262                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1263                 else
1264                         pt =
1265                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1266                 *pt = data;
1267         }
1268
1269         kvm_mmu_reset_context(vcpu);
1270         return 0;
1271 }
1272
1273 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1274 {
1275         u64 mcg_cap = vcpu->arch.mcg_cap;
1276         unsigned bank_num = mcg_cap & 0xff;
1277
1278         switch (msr) {
1279         case MSR_IA32_MCG_STATUS:
1280                 vcpu->arch.mcg_status = data;
1281                 break;
1282         case MSR_IA32_MCG_CTL:
1283                 if (!(mcg_cap & MCG_CTL_P))
1284                         return 1;
1285                 if (data != 0 && data != ~(u64)0)
1286                         return -1;
1287                 vcpu->arch.mcg_ctl = data;
1288                 break;
1289         default:
1290                 if (msr >= MSR_IA32_MC0_CTL &&
1291                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1292                         u32 offset = msr - MSR_IA32_MC0_CTL;
1293                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1294                          * some Linux kernels though clear bit 10 in bank 4 to
1295                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1296                          * this to avoid an uncatched #GP in the guest
1297                          */
1298                         if ((offset & 0x3) == 0 &&
1299                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1300                                 return -1;
1301                         vcpu->arch.mce_banks[offset] = data;
1302                         break;
1303                 }
1304                 return 1;
1305         }
1306         return 0;
1307 }
1308
1309 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1310 {
1311         struct kvm *kvm = vcpu->kvm;
1312         int lm = is_long_mode(vcpu);
1313         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1314                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1315         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1316                 : kvm->arch.xen_hvm_config.blob_size_32;
1317         u32 page_num = data & ~PAGE_MASK;
1318         u64 page_addr = data & PAGE_MASK;
1319         u8 *page;
1320         int r;
1321
1322         r = -E2BIG;
1323         if (page_num >= blob_size)
1324                 goto out;
1325         r = -ENOMEM;
1326         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1327         if (!page)
1328                 goto out;
1329         r = -EFAULT;
1330         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1331                 goto out_free;
1332         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1333                 goto out_free;
1334         r = 0;
1335 out_free:
1336         kfree(page);
1337 out:
1338         return r;
1339 }
1340
1341 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1342 {
1343         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1344 }
1345
1346 static bool kvm_hv_msr_partition_wide(u32 msr)
1347 {
1348         bool r = false;
1349         switch (msr) {
1350         case HV_X64_MSR_GUEST_OS_ID:
1351         case HV_X64_MSR_HYPERCALL:
1352                 r = true;
1353                 break;
1354         }
1355
1356         return r;
1357 }
1358
1359 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1360 {
1361         struct kvm *kvm = vcpu->kvm;
1362
1363         switch (msr) {
1364         case HV_X64_MSR_GUEST_OS_ID:
1365                 kvm->arch.hv_guest_os_id = data;
1366                 /* setting guest os id to zero disables hypercall page */
1367                 if (!kvm->arch.hv_guest_os_id)
1368                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1369                 break;
1370         case HV_X64_MSR_HYPERCALL: {
1371                 u64 gfn;
1372                 unsigned long addr;
1373                 u8 instructions[4];
1374
1375                 /* if guest os id is not set hypercall should remain disabled */
1376                 if (!kvm->arch.hv_guest_os_id)
1377                         break;
1378                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1379                         kvm->arch.hv_hypercall = data;
1380                         break;
1381                 }
1382                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1383                 addr = gfn_to_hva(kvm, gfn);
1384                 if (kvm_is_error_hva(addr))
1385                         return 1;
1386                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1387                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1388                 if (copy_to_user((void __user *)addr, instructions, 4))
1389                         return 1;
1390                 kvm->arch.hv_hypercall = data;
1391                 break;
1392         }
1393         default:
1394                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1395                           "data 0x%llx\n", msr, data);
1396                 return 1;
1397         }
1398         return 0;
1399 }
1400
1401 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1402 {
1403         switch (msr) {
1404         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1405                 unsigned long addr;
1406
1407                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1408                         vcpu->arch.hv_vapic = data;
1409                         break;
1410                 }
1411                 addr = gfn_to_hva(vcpu->kvm, data >>
1412                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1413                 if (kvm_is_error_hva(addr))
1414                         return 1;
1415                 if (clear_user((void __user *)addr, PAGE_SIZE))
1416                         return 1;
1417                 vcpu->arch.hv_vapic = data;
1418                 break;
1419         }
1420         case HV_X64_MSR_EOI:
1421                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1422         case HV_X64_MSR_ICR:
1423                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1424         case HV_X64_MSR_TPR:
1425                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1426         default:
1427                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1428                           "data 0x%llx\n", msr, data);
1429                 return 1;
1430         }
1431
1432         return 0;
1433 }
1434
1435 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1436 {
1437         gpa_t gpa = data & ~0x3f;
1438
1439         /* Bits 2:5 are resrved, Should be zero */
1440         if (data & 0x3c)
1441                 return 1;
1442
1443         vcpu->arch.apf.msr_val = data;
1444
1445         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1446                 kvm_clear_async_pf_completion_queue(vcpu);
1447                 kvm_async_pf_hash_reset(vcpu);
1448                 return 0;
1449         }
1450
1451         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1452                 return 1;
1453
1454         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1455         kvm_async_pf_wakeup_all(vcpu);
1456         return 0;
1457 }
1458
1459 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1460 {
1461         if (vcpu->arch.time_page) {
1462                 kvm_release_page_dirty(vcpu->arch.time_page);
1463                 vcpu->arch.time_page = NULL;
1464         }
1465 }
1466
1467 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1468 {
1469         switch (msr) {
1470         case MSR_EFER:
1471                 return set_efer(vcpu, data);
1472         case MSR_K7_HWCR:
1473                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1474                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1475                 if (data != 0) {
1476                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1477                                 data);
1478                         return 1;
1479                 }
1480                 break;
1481         case MSR_FAM10H_MMIO_CONF_BASE:
1482                 if (data != 0) {
1483                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1484                                 "0x%llx\n", data);
1485                         return 1;
1486                 }
1487                 break;
1488         case MSR_AMD64_NB_CFG:
1489                 break;
1490         case MSR_IA32_DEBUGCTLMSR:
1491                 if (!data) {
1492                         /* We support the non-activated case already */
1493                         break;
1494                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1495                         /* Values other than LBR and BTF are vendor-specific,
1496                            thus reserved and should throw a #GP */
1497                         return 1;
1498                 }
1499                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1500                         __func__, data);
1501                 break;
1502         case MSR_IA32_UCODE_REV:
1503         case MSR_IA32_UCODE_WRITE:
1504         case MSR_VM_HSAVE_PA:
1505         case MSR_AMD64_PATCH_LOADER:
1506                 break;
1507         case 0x200 ... 0x2ff:
1508                 return set_msr_mtrr(vcpu, msr, data);
1509         case MSR_IA32_APICBASE:
1510                 kvm_set_apic_base(vcpu, data);
1511                 break;
1512         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1513                 return kvm_x2apic_msr_write(vcpu, msr, data);
1514         case MSR_IA32_MISC_ENABLE:
1515                 vcpu->arch.ia32_misc_enable_msr = data;
1516                 break;
1517         case MSR_KVM_WALL_CLOCK_NEW:
1518         case MSR_KVM_WALL_CLOCK:
1519                 vcpu->kvm->arch.wall_clock = data;
1520                 kvm_write_wall_clock(vcpu->kvm, data);
1521                 break;
1522         case MSR_KVM_SYSTEM_TIME_NEW:
1523         case MSR_KVM_SYSTEM_TIME: {
1524                 kvmclock_reset(vcpu);
1525
1526                 vcpu->arch.time = data;
1527                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1528
1529                 /* we verify if the enable bit is set... */
1530                 if (!(data & 1))
1531                         break;
1532
1533                 /* ...but clean it before doing the actual write */
1534                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1535
1536                 vcpu->arch.time_page =
1537                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1538
1539                 if (is_error_page(vcpu->arch.time_page)) {
1540                         kvm_release_page_clean(vcpu->arch.time_page);
1541                         vcpu->arch.time_page = NULL;
1542                 }
1543                 break;
1544         }
1545         case MSR_KVM_ASYNC_PF_EN:
1546                 if (kvm_pv_enable_async_pf(vcpu, data))
1547                         return 1;
1548                 break;
1549         case MSR_IA32_MCG_CTL:
1550         case MSR_IA32_MCG_STATUS:
1551         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1552                 return set_msr_mce(vcpu, msr, data);
1553
1554         /* Performance counters are not protected by a CPUID bit,
1555          * so we should check all of them in the generic path for the sake of
1556          * cross vendor migration.
1557          * Writing a zero into the event select MSRs disables them,
1558          * which we perfectly emulate ;-). Any other value should be at least
1559          * reported, some guests depend on them.
1560          */
1561         case MSR_P6_EVNTSEL0:
1562         case MSR_P6_EVNTSEL1:
1563         case MSR_K7_EVNTSEL0:
1564         case MSR_K7_EVNTSEL1:
1565         case MSR_K7_EVNTSEL2:
1566         case MSR_K7_EVNTSEL3:
1567                 if (data != 0)
1568                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1569                                 "0x%x data 0x%llx\n", msr, data);
1570                 break;
1571         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1572          * so we ignore writes to make it happy.
1573          */
1574         case MSR_P6_PERFCTR0:
1575         case MSR_P6_PERFCTR1:
1576         case MSR_K7_PERFCTR0:
1577         case MSR_K7_PERFCTR1:
1578         case MSR_K7_PERFCTR2:
1579         case MSR_K7_PERFCTR3:
1580                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1581                         "0x%x data 0x%llx\n", msr, data);
1582                 break;
1583         case MSR_K7_CLK_CTL:
1584                 /*
1585                  * Ignore all writes to this no longer documented MSR.
1586                  * Writes are only relevant for old K7 processors,
1587                  * all pre-dating SVM, but a recommended workaround from
1588                  * AMD for these chips. It is possible to speicify the
1589                  * affected processor models on the command line, hence
1590                  * the need to ignore the workaround.
1591                  */
1592                 break;
1593         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1594                 if (kvm_hv_msr_partition_wide(msr)) {
1595                         int r;
1596                         mutex_lock(&vcpu->kvm->lock);
1597                         r = set_msr_hyperv_pw(vcpu, msr, data);
1598                         mutex_unlock(&vcpu->kvm->lock);
1599                         return r;
1600                 } else
1601                         return set_msr_hyperv(vcpu, msr, data);
1602                 break;
1603         case MSR_IA32_BBL_CR_CTL3:
1604                 /* Drop writes to this legacy MSR -- see rdmsr
1605                  * counterpart for further detail.
1606                  */
1607                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1608                 break;
1609         default:
1610                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1611                         return xen_hvm_config(vcpu, data);
1612                 if (!ignore_msrs) {
1613                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1614                                 msr, data);
1615                         return 1;
1616                 } else {
1617                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1618                                 msr, data);
1619                         break;
1620                 }
1621         }
1622         return 0;
1623 }
1624 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1625
1626
1627 /*
1628  * Reads an msr value (of 'msr_index') into 'pdata'.
1629  * Returns 0 on success, non-0 otherwise.
1630  * Assumes vcpu_load() was already called.
1631  */
1632 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1633 {
1634         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1635 }
1636
1637 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1638 {
1639         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1640
1641         if (!msr_mtrr_valid(msr))
1642                 return 1;
1643
1644         if (msr == MSR_MTRRdefType)
1645                 *pdata = vcpu->arch.mtrr_state.def_type +
1646                          (vcpu->arch.mtrr_state.enabled << 10);
1647         else if (msr == MSR_MTRRfix64K_00000)
1648                 *pdata = p[0];
1649         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1650                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1651         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1652                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1653         else if (msr == MSR_IA32_CR_PAT)
1654                 *pdata = vcpu->arch.pat;
1655         else {  /* Variable MTRRs */
1656                 int idx, is_mtrr_mask;
1657                 u64 *pt;
1658
1659                 idx = (msr - 0x200) / 2;
1660                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1661                 if (!is_mtrr_mask)
1662                         pt =
1663                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1664                 else
1665                         pt =
1666                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1667                 *pdata = *pt;
1668         }
1669
1670         return 0;
1671 }
1672
1673 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1674 {
1675         u64 data;
1676         u64 mcg_cap = vcpu->arch.mcg_cap;
1677         unsigned bank_num = mcg_cap & 0xff;
1678
1679         switch (msr) {
1680         case MSR_IA32_P5_MC_ADDR:
1681         case MSR_IA32_P5_MC_TYPE:
1682                 data = 0;
1683                 break;
1684         case MSR_IA32_MCG_CAP:
1685                 data = vcpu->arch.mcg_cap;
1686                 break;
1687         case MSR_IA32_MCG_CTL:
1688                 if (!(mcg_cap & MCG_CTL_P))
1689                         return 1;
1690                 data = vcpu->arch.mcg_ctl;
1691                 break;
1692         case MSR_IA32_MCG_STATUS:
1693                 data = vcpu->arch.mcg_status;
1694                 break;
1695         default:
1696                 if (msr >= MSR_IA32_MC0_CTL &&
1697                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1698                         u32 offset = msr - MSR_IA32_MC0_CTL;
1699                         data = vcpu->arch.mce_banks[offset];
1700                         break;
1701                 }
1702                 return 1;
1703         }
1704         *pdata = data;
1705         return 0;
1706 }
1707
1708 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1709 {
1710         u64 data = 0;
1711         struct kvm *kvm = vcpu->kvm;
1712
1713         switch (msr) {
1714         case HV_X64_MSR_GUEST_OS_ID:
1715                 data = kvm->arch.hv_guest_os_id;
1716                 break;
1717         case HV_X64_MSR_HYPERCALL:
1718                 data = kvm->arch.hv_hypercall;
1719                 break;
1720         default:
1721                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1722                 return 1;
1723         }
1724
1725         *pdata = data;
1726         return 0;
1727 }
1728
1729 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1730 {
1731         u64 data = 0;
1732
1733         switch (msr) {
1734         case HV_X64_MSR_VP_INDEX: {
1735                 int r;
1736                 struct kvm_vcpu *v;
1737                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1738                         if (v == vcpu)
1739                                 data = r;
1740                 break;
1741         }
1742         case HV_X64_MSR_EOI:
1743                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1744         case HV_X64_MSR_ICR:
1745                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1746         case HV_X64_MSR_TPR:
1747                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1748         default:
1749                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1750                 return 1;
1751         }
1752         *pdata = data;
1753         return 0;
1754 }
1755
1756 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1757 {
1758         u64 data;
1759
1760         switch (msr) {
1761         case MSR_IA32_PLATFORM_ID:
1762         case MSR_IA32_UCODE_REV:
1763         case MSR_IA32_EBL_CR_POWERON:
1764         case MSR_IA32_DEBUGCTLMSR:
1765         case MSR_IA32_LASTBRANCHFROMIP:
1766         case MSR_IA32_LASTBRANCHTOIP:
1767         case MSR_IA32_LASTINTFROMIP:
1768         case MSR_IA32_LASTINTTOIP:
1769         case MSR_K8_SYSCFG:
1770         case MSR_K7_HWCR:
1771         case MSR_VM_HSAVE_PA:
1772         case MSR_P6_PERFCTR0:
1773         case MSR_P6_PERFCTR1:
1774         case MSR_P6_EVNTSEL0:
1775         case MSR_P6_EVNTSEL1:
1776         case MSR_K7_EVNTSEL0:
1777         case MSR_K7_PERFCTR0:
1778         case MSR_K8_INT_PENDING_MSG:
1779         case MSR_AMD64_NB_CFG:
1780         case MSR_FAM10H_MMIO_CONF_BASE:
1781                 data = 0;
1782                 break;
1783         case MSR_MTRRcap:
1784                 data = 0x500 | KVM_NR_VAR_MTRR;
1785                 break;
1786         case 0x200 ... 0x2ff:
1787                 return get_msr_mtrr(vcpu, msr, pdata);
1788         case 0xcd: /* fsb frequency */
1789                 data = 3;
1790                 break;
1791                 /*
1792                  * MSR_EBC_FREQUENCY_ID
1793                  * Conservative value valid for even the basic CPU models.
1794                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1795                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1796                  * and 266MHz for model 3, or 4. Set Core Clock
1797                  * Frequency to System Bus Frequency Ratio to 1 (bits
1798                  * 31:24) even though these are only valid for CPU
1799                  * models > 2, however guests may end up dividing or
1800                  * multiplying by zero otherwise.
1801                  */
1802         case MSR_EBC_FREQUENCY_ID:
1803                 data = 1 << 24;
1804                 break;
1805         case MSR_IA32_APICBASE:
1806                 data = kvm_get_apic_base(vcpu);
1807                 break;
1808         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1809                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1810                 break;
1811         case MSR_IA32_MISC_ENABLE:
1812                 data = vcpu->arch.ia32_misc_enable_msr;
1813                 break;
1814         case MSR_IA32_PERF_STATUS:
1815                 /* TSC increment by tick */
1816                 data = 1000ULL;
1817                 /* CPU multiplier */
1818                 data |= (((uint64_t)4ULL) << 40);
1819                 break;
1820         case MSR_EFER:
1821                 data = vcpu->arch.efer;
1822                 break;
1823         case MSR_KVM_WALL_CLOCK:
1824         case MSR_KVM_WALL_CLOCK_NEW:
1825                 data = vcpu->kvm->arch.wall_clock;
1826                 break;
1827         case MSR_KVM_SYSTEM_TIME:
1828         case MSR_KVM_SYSTEM_TIME_NEW:
1829                 data = vcpu->arch.time;
1830                 break;
1831         case MSR_KVM_ASYNC_PF_EN:
1832                 data = vcpu->arch.apf.msr_val;
1833                 break;
1834         case MSR_IA32_P5_MC_ADDR:
1835         case MSR_IA32_P5_MC_TYPE:
1836         case MSR_IA32_MCG_CAP:
1837         case MSR_IA32_MCG_CTL:
1838         case MSR_IA32_MCG_STATUS:
1839         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1840                 return get_msr_mce(vcpu, msr, pdata);
1841         case MSR_K7_CLK_CTL:
1842                 /*
1843                  * Provide expected ramp-up count for K7. All other
1844                  * are set to zero, indicating minimum divisors for
1845                  * every field.
1846                  *
1847                  * This prevents guest kernels on AMD host with CPU
1848                  * type 6, model 8 and higher from exploding due to
1849                  * the rdmsr failing.
1850                  */
1851                 data = 0x20000000;
1852                 break;
1853         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1854                 if (kvm_hv_msr_partition_wide(msr)) {
1855                         int r;
1856                         mutex_lock(&vcpu->kvm->lock);
1857                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1858                         mutex_unlock(&vcpu->kvm->lock);
1859                         return r;
1860                 } else
1861                         return get_msr_hyperv(vcpu, msr, pdata);
1862                 break;
1863         case MSR_IA32_BBL_CR_CTL3:
1864                 /* This legacy MSR exists but isn't fully documented in current
1865                  * silicon.  It is however accessed by winxp in very narrow
1866                  * scenarios where it sets bit #19, itself documented as
1867                  * a "reserved" bit.  Best effort attempt to source coherent
1868                  * read data here should the balance of the register be
1869                  * interpreted by the guest:
1870                  *
1871                  * L2 cache control register 3: 64GB range, 256KB size,
1872                  * enabled, latency 0x1, configured
1873                  */
1874                 data = 0xbe702111;
1875                 break;
1876         default:
1877                 if (!ignore_msrs) {
1878                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1879                         return 1;
1880                 } else {
1881                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1882                         data = 0;
1883                 }
1884                 break;
1885         }
1886         *pdata = data;
1887         return 0;
1888 }
1889 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1890
1891 /*
1892  * Read or write a bunch of msrs. All parameters are kernel addresses.
1893  *
1894  * @return number of msrs set successfully.
1895  */
1896 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1897                     struct kvm_msr_entry *entries,
1898                     int (*do_msr)(struct kvm_vcpu *vcpu,
1899                                   unsigned index, u64 *data))
1900 {
1901         int i, idx;
1902
1903         idx = srcu_read_lock(&vcpu->kvm->srcu);
1904         for (i = 0; i < msrs->nmsrs; ++i)
1905                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1906                         break;
1907         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1908
1909         return i;
1910 }
1911
1912 /*
1913  * Read or write a bunch of msrs. Parameters are user addresses.
1914  *
1915  * @return number of msrs set successfully.
1916  */
1917 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1918                   int (*do_msr)(struct kvm_vcpu *vcpu,
1919                                 unsigned index, u64 *data),
1920                   int writeback)
1921 {
1922         struct kvm_msrs msrs;
1923         struct kvm_msr_entry *entries;
1924         int r, n;
1925         unsigned size;
1926
1927         r = -EFAULT;
1928         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1929                 goto out;
1930
1931         r = -E2BIG;
1932         if (msrs.nmsrs >= MAX_IO_MSRS)
1933                 goto out;
1934
1935         r = -ENOMEM;
1936         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1937         entries = kmalloc(size, GFP_KERNEL);
1938         if (!entries)
1939                 goto out;
1940
1941         r = -EFAULT;
1942         if (copy_from_user(entries, user_msrs->entries, size))
1943                 goto out_free;
1944
1945         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1946         if (r < 0)
1947                 goto out_free;
1948
1949         r = -EFAULT;
1950         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1951                 goto out_free;
1952
1953         r = n;
1954
1955 out_free:
1956         kfree(entries);
1957 out:
1958         return r;
1959 }
1960
1961 int kvm_dev_ioctl_check_extension(long ext)
1962 {
1963         int r;
1964
1965         switch (ext) {
1966         case KVM_CAP_IRQCHIP:
1967         case KVM_CAP_HLT:
1968         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1969         case KVM_CAP_SET_TSS_ADDR:
1970         case KVM_CAP_EXT_CPUID:
1971         case KVM_CAP_CLOCKSOURCE:
1972         case KVM_CAP_PIT:
1973         case KVM_CAP_NOP_IO_DELAY:
1974         case KVM_CAP_MP_STATE:
1975         case KVM_CAP_SYNC_MMU:
1976         case KVM_CAP_USER_NMI:
1977         case KVM_CAP_REINJECT_CONTROL:
1978         case KVM_CAP_IRQ_INJECT_STATUS:
1979         case KVM_CAP_ASSIGN_DEV_IRQ:
1980         case KVM_CAP_IRQFD:
1981         case KVM_CAP_IOEVENTFD:
1982         case KVM_CAP_PIT2:
1983         case KVM_CAP_PIT_STATE2:
1984         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1985         case KVM_CAP_XEN_HVM:
1986         case KVM_CAP_ADJUST_CLOCK:
1987         case KVM_CAP_VCPU_EVENTS:
1988         case KVM_CAP_HYPERV:
1989         case KVM_CAP_HYPERV_VAPIC:
1990         case KVM_CAP_HYPERV_SPIN:
1991         case KVM_CAP_PCI_SEGMENT:
1992         case KVM_CAP_DEBUGREGS:
1993         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1994         case KVM_CAP_XSAVE:
1995         case KVM_CAP_ASYNC_PF:
1996                 r = 1;
1997                 break;
1998         case KVM_CAP_COALESCED_MMIO:
1999                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2000                 break;
2001         case KVM_CAP_VAPIC:
2002                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2003                 break;
2004         case KVM_CAP_NR_VCPUS:
2005                 r = KVM_MAX_VCPUS;
2006                 break;
2007         case KVM_CAP_NR_MEMSLOTS:
2008                 r = KVM_MEMORY_SLOTS;
2009                 break;
2010         case KVM_CAP_PV_MMU:    /* obsolete */
2011                 r = 0;
2012                 break;
2013         case KVM_CAP_IOMMU:
2014                 r = iommu_found();
2015                 break;
2016         case KVM_CAP_MCE:
2017                 r = KVM_MAX_MCE_BANKS;
2018                 break;
2019         case KVM_CAP_XCRS:
2020                 r = cpu_has_xsave;
2021                 break;
2022         default:
2023                 r = 0;
2024                 break;
2025         }
2026         return r;
2027
2028 }
2029
2030 long kvm_arch_dev_ioctl(struct file *filp,
2031                         unsigned int ioctl, unsigned long arg)
2032 {
2033         void __user *argp = (void __user *)arg;
2034         long r;
2035
2036         switch (ioctl) {
2037         case KVM_GET_MSR_INDEX_LIST: {
2038                 struct kvm_msr_list __user *user_msr_list = argp;
2039                 struct kvm_msr_list msr_list;
2040                 unsigned n;
2041
2042                 r = -EFAULT;
2043                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2044                         goto out;
2045                 n = msr_list.nmsrs;
2046                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2047                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2048                         goto out;
2049                 r = -E2BIG;
2050                 if (n < msr_list.nmsrs)
2051                         goto out;
2052                 r = -EFAULT;
2053                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2054                                  num_msrs_to_save * sizeof(u32)))
2055                         goto out;
2056                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2057                                  &emulated_msrs,
2058                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2059                         goto out;
2060                 r = 0;
2061                 break;
2062         }
2063         case KVM_GET_SUPPORTED_CPUID: {
2064                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2065                 struct kvm_cpuid2 cpuid;
2066
2067                 r = -EFAULT;
2068                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2069                         goto out;
2070                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2071                                                       cpuid_arg->entries);
2072                 if (r)
2073                         goto out;
2074
2075                 r = -EFAULT;
2076                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2077                         goto out;
2078                 r = 0;
2079                 break;
2080         }
2081         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2082                 u64 mce_cap;
2083
2084                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2085                 r = -EFAULT;
2086                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2087                         goto out;
2088                 r = 0;
2089                 break;
2090         }
2091         default:
2092                 r = -EINVAL;
2093         }
2094 out:
2095         return r;
2096 }
2097
2098 static void wbinvd_ipi(void *garbage)
2099 {
2100         wbinvd();
2101 }
2102
2103 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2104 {
2105         return vcpu->kvm->arch.iommu_domain &&
2106                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2107 }
2108
2109 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2110 {
2111         /* Address WBINVD may be executed by guest */
2112         if (need_emulate_wbinvd(vcpu)) {
2113                 if (kvm_x86_ops->has_wbinvd_exit())
2114                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2115                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2116                         smp_call_function_single(vcpu->cpu,
2117                                         wbinvd_ipi, NULL, 1);
2118         }
2119
2120         kvm_x86_ops->vcpu_load(vcpu, cpu);
2121         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2122                 /* Make sure TSC doesn't go backwards */
2123                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2124                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2125                 if (tsc_delta < 0)
2126                         mark_tsc_unstable("KVM discovered backwards TSC");
2127                 if (check_tsc_unstable()) {
2128                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2129                         vcpu->arch.tsc_catchup = 1;
2130                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2131                 }
2132                 if (vcpu->cpu != cpu)
2133                         kvm_migrate_timers(vcpu);
2134                 vcpu->cpu = cpu;
2135         }
2136 }
2137
2138 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2139 {
2140         kvm_x86_ops->vcpu_put(vcpu);
2141         kvm_put_guest_fpu(vcpu);
2142         vcpu->arch.last_host_tsc = native_read_tsc();
2143 }
2144
2145 static int is_efer_nx(void)
2146 {
2147         unsigned long long efer = 0;
2148
2149         rdmsrl_safe(MSR_EFER, &efer);
2150         return efer & EFER_NX;
2151 }
2152
2153 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2154 {
2155         int i;
2156         struct kvm_cpuid_entry2 *e, *entry;
2157
2158         entry = NULL;
2159         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2160                 e = &vcpu->arch.cpuid_entries[i];
2161                 if (e->function == 0x80000001) {
2162                         entry = e;
2163                         break;
2164                 }
2165         }
2166         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2167                 entry->edx &= ~(1 << 20);
2168                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2169         }
2170 }
2171
2172 /* when an old userspace process fills a new kernel module */
2173 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2174                                     struct kvm_cpuid *cpuid,
2175                                     struct kvm_cpuid_entry __user *entries)
2176 {
2177         int r, i;
2178         struct kvm_cpuid_entry *cpuid_entries;
2179
2180         r = -E2BIG;
2181         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2182                 goto out;
2183         r = -ENOMEM;
2184         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2185         if (!cpuid_entries)
2186                 goto out;
2187         r = -EFAULT;
2188         if (copy_from_user(cpuid_entries, entries,
2189                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2190                 goto out_free;
2191         for (i = 0; i < cpuid->nent; i++) {
2192                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2193                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2194                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2195                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2196                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2197                 vcpu->arch.cpuid_entries[i].index = 0;
2198                 vcpu->arch.cpuid_entries[i].flags = 0;
2199                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2200                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2201                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2202         }
2203         vcpu->arch.cpuid_nent = cpuid->nent;
2204         cpuid_fix_nx_cap(vcpu);
2205         r = 0;
2206         kvm_apic_set_version(vcpu);
2207         kvm_x86_ops->cpuid_update(vcpu);
2208         update_cpuid(vcpu);
2209
2210 out_free:
2211         vfree(cpuid_entries);
2212 out:
2213         return r;
2214 }
2215
2216 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2217                                      struct kvm_cpuid2 *cpuid,
2218                                      struct kvm_cpuid_entry2 __user *entries)
2219 {
2220         int r;
2221
2222         r = -E2BIG;
2223         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2224                 goto out;
2225         r = -EFAULT;
2226         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2227                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2228                 goto out;
2229         vcpu->arch.cpuid_nent = cpuid->nent;
2230         kvm_apic_set_version(vcpu);
2231         kvm_x86_ops->cpuid_update(vcpu);
2232         update_cpuid(vcpu);
2233         return 0;
2234
2235 out:
2236         return r;
2237 }
2238
2239 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2240                                      struct kvm_cpuid2 *cpuid,
2241                                      struct kvm_cpuid_entry2 __user *entries)
2242 {
2243         int r;
2244
2245         r = -E2BIG;
2246         if (cpuid->nent < vcpu->arch.cpuid_nent)
2247                 goto out;
2248         r = -EFAULT;
2249         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2250                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2251                 goto out;
2252         return 0;
2253
2254 out:
2255         cpuid->nent = vcpu->arch.cpuid_nent;
2256         return r;
2257 }
2258
2259 static void cpuid_mask(u32 *word, int wordnum)
2260 {
2261         *word &= boot_cpu_data.x86_capability[wordnum];
2262 }
2263
2264 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2265                            u32 index)
2266 {
2267         entry->function = function;
2268         entry->index = index;
2269         cpuid_count(entry->function, entry->index,
2270                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2271         entry->flags = 0;
2272 }
2273
2274 #define F(x) bit(X86_FEATURE_##x)
2275
2276 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2277                          u32 index, int *nent, int maxnent)
2278 {
2279         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2280 #ifdef CONFIG_X86_64
2281         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2282                                 ? F(GBPAGES) : 0;
2283         unsigned f_lm = F(LM);
2284 #else
2285         unsigned f_gbpages = 0;
2286         unsigned f_lm = 0;
2287 #endif
2288         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2289
2290         /* cpuid 1.edx */
2291         const u32 kvm_supported_word0_x86_features =
2292                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2293                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2294                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2295                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2296                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2297                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2298                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2299                 0 /* HTT, TM, Reserved, PBE */;
2300         /* cpuid 0x80000001.edx */
2301         const u32 kvm_supported_word1_x86_features =
2302                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2303                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2304                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2305                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2306                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2307                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2308                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2309                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2310         /* cpuid 1.ecx */
2311         const u32 kvm_supported_word4_x86_features =
2312                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2313                 0 /* DS-CPL, VMX, SMX, EST */ |
2314                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2315                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2316                 0 /* Reserved, DCA */ | F(XMM4_1) |
2317                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2318                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2319                 F(F16C);
2320         /* cpuid 0x80000001.ecx */
2321         const u32 kvm_supported_word6_x86_features =
2322                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2323                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2324                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2325                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2326
2327         /* all calls to cpuid_count() should be made on the same cpu */
2328         get_cpu();
2329         do_cpuid_1_ent(entry, function, index);
2330         ++*nent;
2331
2332         switch (function) {
2333         case 0:
2334                 entry->eax = min(entry->eax, (u32)0xd);
2335                 break;
2336         case 1:
2337                 entry->edx &= kvm_supported_word0_x86_features;
2338                 cpuid_mask(&entry->edx, 0);
2339                 entry->ecx &= kvm_supported_word4_x86_features;
2340                 cpuid_mask(&entry->ecx, 4);
2341                 /* we support x2apic emulation even if host does not support
2342                  * it since we emulate x2apic in software */
2343                 entry->ecx |= F(X2APIC);
2344                 break;
2345         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2346          * may return different values. This forces us to get_cpu() before
2347          * issuing the first command, and also to emulate this annoying behavior
2348          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2349         case 2: {
2350                 int t, times = entry->eax & 0xff;
2351
2352                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2353                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2354                 for (t = 1; t < times && *nent < maxnent; ++t) {
2355                         do_cpuid_1_ent(&entry[t], function, 0);
2356                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2357                         ++*nent;
2358                 }
2359                 break;
2360         }
2361         /* function 4 and 0xb have additional index. */
2362         case 4: {
2363                 int i, cache_type;
2364
2365                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2366                 /* read more entries until cache_type is zero */
2367                 for (i = 1; *nent < maxnent; ++i) {
2368                         cache_type = entry[i - 1].eax & 0x1f;
2369                         if (!cache_type)
2370                                 break;
2371                         do_cpuid_1_ent(&entry[i], function, i);
2372                         entry[i].flags |=
2373                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2374                         ++*nent;
2375                 }
2376                 break;
2377         }
2378         case 0xb: {
2379                 int i, level_type;
2380
2381                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2382                 /* read more entries until level_type is zero */
2383                 for (i = 1; *nent < maxnent; ++i) {
2384                         level_type = entry[i - 1].ecx & 0xff00;
2385                         if (!level_type)
2386                                 break;
2387                         do_cpuid_1_ent(&entry[i], function, i);
2388                         entry[i].flags |=
2389                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2390                         ++*nent;
2391                 }
2392                 break;
2393         }
2394         case 0xd: {
2395                 int i;
2396
2397                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2398                 for (i = 1; *nent < maxnent; ++i) {
2399                         if (entry[i - 1].eax == 0 && i != 2)
2400                                 break;
2401                         do_cpuid_1_ent(&entry[i], function, i);
2402                         entry[i].flags |=
2403                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2404                         ++*nent;
2405                 }
2406                 break;
2407         }
2408         case KVM_CPUID_SIGNATURE: {
2409                 char signature[12] = "KVMKVMKVM\0\0";
2410                 u32 *sigptr = (u32 *)signature;
2411                 entry->eax = 0;
2412                 entry->ebx = sigptr[0];
2413                 entry->ecx = sigptr[1];
2414                 entry->edx = sigptr[2];
2415                 break;
2416         }
2417         case KVM_CPUID_FEATURES:
2418                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2419                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2420                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2421                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2422                 entry->ebx = 0;
2423                 entry->ecx = 0;
2424                 entry->edx = 0;
2425                 break;
2426         case 0x80000000:
2427                 entry->eax = min(entry->eax, 0x8000001a);
2428                 break;
2429         case 0x80000001:
2430                 entry->edx &= kvm_supported_word1_x86_features;
2431                 cpuid_mask(&entry->edx, 1);
2432                 entry->ecx &= kvm_supported_word6_x86_features;
2433                 cpuid_mask(&entry->ecx, 6);
2434                 break;
2435         }
2436
2437         kvm_x86_ops->set_supported_cpuid(function, entry);
2438
2439         put_cpu();
2440 }
2441
2442 #undef F
2443
2444 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2445                                      struct kvm_cpuid_entry2 __user *entries)
2446 {
2447         struct kvm_cpuid_entry2 *cpuid_entries;
2448         int limit, nent = 0, r = -E2BIG;
2449         u32 func;
2450
2451         if (cpuid->nent < 1)
2452                 goto out;
2453         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2454                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2455         r = -ENOMEM;
2456         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2457         if (!cpuid_entries)
2458                 goto out;
2459
2460         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2461         limit = cpuid_entries[0].eax;
2462         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2463                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2464                              &nent, cpuid->nent);
2465         r = -E2BIG;
2466         if (nent >= cpuid->nent)
2467                 goto out_free;
2468
2469         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2470         limit = cpuid_entries[nent - 1].eax;
2471         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2472                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2473                              &nent, cpuid->nent);
2474
2475
2476
2477         r = -E2BIG;
2478         if (nent >= cpuid->nent)
2479                 goto out_free;
2480
2481         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2482                      cpuid->nent);
2483
2484         r = -E2BIG;
2485         if (nent >= cpuid->nent)
2486                 goto out_free;
2487
2488         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2489                      cpuid->nent);
2490
2491         r = -E2BIG;
2492         if (nent >= cpuid->nent)
2493                 goto out_free;
2494
2495         r = -EFAULT;
2496         if (copy_to_user(entries, cpuid_entries,
2497                          nent * sizeof(struct kvm_cpuid_entry2)))
2498                 goto out_free;
2499         cpuid->nent = nent;
2500         r = 0;
2501
2502 out_free:
2503         vfree(cpuid_entries);
2504 out:
2505         return r;
2506 }
2507
2508 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2509                                     struct kvm_lapic_state *s)
2510 {
2511         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2512
2513         return 0;
2514 }
2515
2516 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2517                                     struct kvm_lapic_state *s)
2518 {
2519         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2520         kvm_apic_post_state_restore(vcpu);
2521         update_cr8_intercept(vcpu);
2522
2523         return 0;
2524 }
2525
2526 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2527                                     struct kvm_interrupt *irq)
2528 {
2529         if (irq->irq < 0 || irq->irq >= 256)
2530                 return -EINVAL;
2531         if (irqchip_in_kernel(vcpu->kvm))
2532                 return -ENXIO;
2533
2534         kvm_queue_interrupt(vcpu, irq->irq, false);
2535         kvm_make_request(KVM_REQ_EVENT, vcpu);
2536
2537         return 0;
2538 }
2539
2540 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2541 {
2542         kvm_inject_nmi(vcpu);
2543
2544         return 0;
2545 }
2546
2547 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2548                                            struct kvm_tpr_access_ctl *tac)
2549 {
2550         if (tac->flags)
2551                 return -EINVAL;
2552         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2553         return 0;
2554 }
2555
2556 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2557                                         u64 mcg_cap)
2558 {
2559         int r;
2560         unsigned bank_num = mcg_cap & 0xff, bank;
2561
2562         r = -EINVAL;
2563         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2564                 goto out;
2565         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2566                 goto out;
2567         r = 0;
2568         vcpu->arch.mcg_cap = mcg_cap;
2569         /* Init IA32_MCG_CTL to all 1s */
2570         if (mcg_cap & MCG_CTL_P)
2571                 vcpu->arch.mcg_ctl = ~(u64)0;
2572         /* Init IA32_MCi_CTL to all 1s */
2573         for (bank = 0; bank < bank_num; bank++)
2574                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2575 out:
2576         return r;
2577 }
2578
2579 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2580                                       struct kvm_x86_mce *mce)
2581 {
2582         u64 mcg_cap = vcpu->arch.mcg_cap;
2583         unsigned bank_num = mcg_cap & 0xff;
2584         u64 *banks = vcpu->arch.mce_banks;
2585
2586         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2587                 return -EINVAL;
2588         /*
2589          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2590          * reporting is disabled
2591          */
2592         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2593             vcpu->arch.mcg_ctl != ~(u64)0)
2594                 return 0;
2595         banks += 4 * mce->bank;
2596         /*
2597          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2598          * reporting is disabled for the bank
2599          */
2600         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2601                 return 0;
2602         if (mce->status & MCI_STATUS_UC) {
2603                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2604                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2605                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2606                         return 0;
2607                 }
2608                 if (banks[1] & MCI_STATUS_VAL)
2609                         mce->status |= MCI_STATUS_OVER;
2610                 banks[2] = mce->addr;
2611                 banks[3] = mce->misc;
2612                 vcpu->arch.mcg_status = mce->mcg_status;
2613                 banks[1] = mce->status;
2614                 kvm_queue_exception(vcpu, MC_VECTOR);
2615         } else if (!(banks[1] & MCI_STATUS_VAL)
2616                    || !(banks[1] & MCI_STATUS_UC)) {
2617                 if (banks[1] & MCI_STATUS_VAL)
2618                         mce->status |= MCI_STATUS_OVER;
2619                 banks[2] = mce->addr;
2620                 banks[3] = mce->misc;
2621                 banks[1] = mce->status;
2622         } else
2623                 banks[1] |= MCI_STATUS_OVER;
2624         return 0;
2625 }
2626
2627 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2628                                                struct kvm_vcpu_events *events)
2629 {
2630         events->exception.injected =
2631                 vcpu->arch.exception.pending &&
2632                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2633         events->exception.nr = vcpu->arch.exception.nr;
2634         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2635         events->exception.pad = 0;
2636         events->exception.error_code = vcpu->arch.exception.error_code;
2637
2638         events->interrupt.injected =
2639                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2640         events->interrupt.nr = vcpu->arch.interrupt.nr;
2641         events->interrupt.soft = 0;
2642         events->interrupt.shadow =
2643                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2644                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2645
2646         events->nmi.injected = vcpu->arch.nmi_injected;
2647         events->nmi.pending = vcpu->arch.nmi_pending;
2648         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2649         events->nmi.pad = 0;
2650
2651         events->sipi_vector = vcpu->arch.sipi_vector;
2652
2653         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2654                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2655                          | KVM_VCPUEVENT_VALID_SHADOW);
2656         memset(&events->reserved, 0, sizeof(events->reserved));
2657 }
2658
2659 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2660                                               struct kvm_vcpu_events *events)
2661 {
2662         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2663                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2664                               | KVM_VCPUEVENT_VALID_SHADOW))
2665                 return -EINVAL;
2666
2667         vcpu->arch.exception.pending = events->exception.injected;
2668         vcpu->arch.exception.nr = events->exception.nr;
2669         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2670         vcpu->arch.exception.error_code = events->exception.error_code;
2671
2672         vcpu->arch.interrupt.pending = events->interrupt.injected;
2673         vcpu->arch.interrupt.nr = events->interrupt.nr;
2674         vcpu->arch.interrupt.soft = events->interrupt.soft;
2675         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2676                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2677                                                   events->interrupt.shadow);
2678
2679         vcpu->arch.nmi_injected = events->nmi.injected;
2680         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2681                 vcpu->arch.nmi_pending = events->nmi.pending;
2682         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2683
2684         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2685                 vcpu->arch.sipi_vector = events->sipi_vector;
2686
2687         kvm_make_request(KVM_REQ_EVENT, vcpu);
2688
2689         return 0;
2690 }
2691
2692 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2693                                              struct kvm_debugregs *dbgregs)
2694 {
2695         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2696         dbgregs->dr6 = vcpu->arch.dr6;
2697         dbgregs->dr7 = vcpu->arch.dr7;
2698         dbgregs->flags = 0;
2699         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2700 }
2701
2702 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2703                                             struct kvm_debugregs *dbgregs)
2704 {
2705         if (dbgregs->flags)
2706                 return -EINVAL;
2707
2708         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2709         vcpu->arch.dr6 = dbgregs->dr6;
2710         vcpu->arch.dr7 = dbgregs->dr7;
2711
2712         return 0;
2713 }
2714
2715 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2716                                          struct kvm_xsave *guest_xsave)
2717 {
2718         if (cpu_has_xsave)
2719                 memcpy(guest_xsave->region,
2720                         &vcpu->arch.guest_fpu.state->xsave,
2721                         xstate_size);
2722         else {
2723                 memcpy(guest_xsave->region,
2724                         &vcpu->arch.guest_fpu.state->fxsave,
2725                         sizeof(struct i387_fxsave_struct));
2726                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2727                         XSTATE_FPSSE;
2728         }
2729 }
2730
2731 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2732                                         struct kvm_xsave *guest_xsave)
2733 {
2734         u64 xstate_bv =
2735                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2736
2737         if (cpu_has_xsave)
2738                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2739                         guest_xsave->region, xstate_size);
2740         else {
2741                 if (xstate_bv & ~XSTATE_FPSSE)
2742                         return -EINVAL;
2743                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2744                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2745         }
2746         return 0;
2747 }
2748
2749 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2750                                         struct kvm_xcrs *guest_xcrs)
2751 {
2752         if (!cpu_has_xsave) {
2753                 guest_xcrs->nr_xcrs = 0;
2754                 return;
2755         }
2756
2757         guest_xcrs->nr_xcrs = 1;
2758         guest_xcrs->flags = 0;
2759         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2760         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2761 }
2762
2763 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2764                                        struct kvm_xcrs *guest_xcrs)
2765 {
2766         int i, r = 0;
2767
2768         if (!cpu_has_xsave)
2769                 return -EINVAL;
2770
2771         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2772                 return -EINVAL;
2773
2774         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2775                 /* Only support XCR0 currently */
2776                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2777                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2778                                 guest_xcrs->xcrs[0].value);
2779                         break;
2780                 }
2781         if (r)
2782                 r = -EINVAL;
2783         return r;
2784 }
2785
2786 long kvm_arch_vcpu_ioctl(struct file *filp,
2787                          unsigned int ioctl, unsigned long arg)
2788 {
2789         struct kvm_vcpu *vcpu = filp->private_data;
2790         void __user *argp = (void __user *)arg;
2791         int r;
2792         union {
2793                 struct kvm_lapic_state *lapic;
2794                 struct kvm_xsave *xsave;
2795                 struct kvm_xcrs *xcrs;
2796                 void *buffer;
2797         } u;
2798
2799         u.buffer = NULL;
2800         switch (ioctl) {
2801         case KVM_GET_LAPIC: {
2802                 r = -EINVAL;
2803                 if (!vcpu->arch.apic)
2804                         goto out;
2805                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2806
2807                 r = -ENOMEM;
2808                 if (!u.lapic)
2809                         goto out;
2810                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2811                 if (r)
2812                         goto out;
2813                 r = -EFAULT;
2814                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2815                         goto out;
2816                 r = 0;
2817                 break;
2818         }
2819         case KVM_SET_LAPIC: {
2820                 r = -EINVAL;
2821                 if (!vcpu->arch.apic)
2822                         goto out;
2823                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2824                 r = -ENOMEM;
2825                 if (!u.lapic)
2826                         goto out;
2827                 r = -EFAULT;
2828                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2829                         goto out;
2830                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2831                 if (r)
2832                         goto out;
2833                 r = 0;
2834                 break;
2835         }
2836         case KVM_INTERRUPT: {
2837                 struct kvm_interrupt irq;
2838
2839                 r = -EFAULT;
2840                 if (copy_from_user(&irq, argp, sizeof irq))
2841                         goto out;
2842                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2843                 if (r)
2844                         goto out;
2845                 r = 0;
2846                 break;
2847         }
2848         case KVM_NMI: {
2849                 r = kvm_vcpu_ioctl_nmi(vcpu);
2850                 if (r)
2851                         goto out;
2852                 r = 0;
2853                 break;
2854         }
2855         case KVM_SET_CPUID: {
2856                 struct kvm_cpuid __user *cpuid_arg = argp;
2857                 struct kvm_cpuid cpuid;
2858
2859                 r = -EFAULT;
2860                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2861                         goto out;
2862                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2863                 if (r)
2864                         goto out;
2865                 break;
2866         }
2867         case KVM_SET_CPUID2: {
2868                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2869                 struct kvm_cpuid2 cpuid;
2870
2871                 r = -EFAULT;
2872                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2873                         goto out;
2874                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2875                                               cpuid_arg->entries);
2876                 if (r)
2877                         goto out;
2878                 break;
2879         }
2880         case KVM_GET_CPUID2: {
2881                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2882                 struct kvm_cpuid2 cpuid;
2883
2884                 r = -EFAULT;
2885                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2886                         goto out;
2887                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2888                                               cpuid_arg->entries);
2889                 if (r)
2890                         goto out;
2891                 r = -EFAULT;
2892                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2893                         goto out;
2894                 r = 0;
2895                 break;
2896         }
2897         case KVM_GET_MSRS:
2898                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2899                 break;
2900         case KVM_SET_MSRS:
2901                 r = msr_io(vcpu, argp, do_set_msr, 0);
2902                 break;
2903         case KVM_TPR_ACCESS_REPORTING: {
2904                 struct kvm_tpr_access_ctl tac;
2905
2906                 r = -EFAULT;
2907                 if (copy_from_user(&tac, argp, sizeof tac))
2908                         goto out;
2909                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2910                 if (r)
2911                         goto out;
2912                 r = -EFAULT;
2913                 if (copy_to_user(argp, &tac, sizeof tac))
2914                         goto out;
2915                 r = 0;
2916                 break;
2917         };
2918         case KVM_SET_VAPIC_ADDR: {
2919                 struct kvm_vapic_addr va;
2920
2921                 r = -EINVAL;
2922                 if (!irqchip_in_kernel(vcpu->kvm))
2923                         goto out;
2924                 r = -EFAULT;
2925                 if (copy_from_user(&va, argp, sizeof va))
2926                         goto out;
2927                 r = 0;
2928                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2929                 break;
2930         }
2931         case KVM_X86_SETUP_MCE: {
2932                 u64 mcg_cap;
2933
2934                 r = -EFAULT;
2935                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2936                         goto out;
2937                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2938                 break;
2939         }
2940         case KVM_X86_SET_MCE: {
2941                 struct kvm_x86_mce mce;
2942
2943                 r = -EFAULT;
2944                 if (copy_from_user(&mce, argp, sizeof mce))
2945                         goto out;
2946                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2947                 break;
2948         }
2949         case KVM_GET_VCPU_EVENTS: {
2950                 struct kvm_vcpu_events events;
2951
2952                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2953
2954                 r = -EFAULT;
2955                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2956                         break;
2957                 r = 0;
2958                 break;
2959         }
2960         case KVM_SET_VCPU_EVENTS: {
2961                 struct kvm_vcpu_events events;
2962
2963                 r = -EFAULT;
2964                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2965                         break;
2966
2967                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2968                 break;
2969         }
2970         case KVM_GET_DEBUGREGS: {
2971                 struct kvm_debugregs dbgregs;
2972
2973                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2974
2975                 r = -EFAULT;
2976                 if (copy_to_user(argp, &dbgregs,
2977                                  sizeof(struct kvm_debugregs)))
2978                         break;
2979                 r = 0;
2980                 break;
2981         }
2982         case KVM_SET_DEBUGREGS: {
2983                 struct kvm_debugregs dbgregs;
2984
2985                 r = -EFAULT;
2986                 if (copy_from_user(&dbgregs, argp,
2987                                    sizeof(struct kvm_debugregs)))
2988                         break;
2989
2990                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2991                 break;
2992         }
2993         case KVM_GET_XSAVE: {
2994                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2995                 r = -ENOMEM;
2996                 if (!u.xsave)
2997                         break;
2998
2999                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3000
3001                 r = -EFAULT;
3002                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3003                         break;
3004                 r = 0;
3005                 break;
3006         }
3007         case KVM_SET_XSAVE: {
3008                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3009                 r = -ENOMEM;
3010                 if (!u.xsave)
3011                         break;
3012
3013                 r = -EFAULT;
3014                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3015                         break;
3016
3017                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3018                 break;
3019         }
3020         case KVM_GET_XCRS: {
3021                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3022                 r = -ENOMEM;
3023                 if (!u.xcrs)
3024                         break;
3025
3026                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3027
3028                 r = -EFAULT;
3029                 if (copy_to_user(argp, u.xcrs,
3030                                  sizeof(struct kvm_xcrs)))
3031                         break;
3032                 r = 0;
3033                 break;
3034         }
3035         case KVM_SET_XCRS: {
3036                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3037                 r = -ENOMEM;
3038                 if (!u.xcrs)
3039                         break;
3040
3041                 r = -EFAULT;
3042                 if (copy_from_user(u.xcrs, argp,
3043                                    sizeof(struct kvm_xcrs)))
3044                         break;
3045
3046                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3047                 break;
3048         }
3049         default:
3050                 r = -EINVAL;
3051         }
3052 out:
3053         kfree(u.buffer);
3054         return r;
3055 }
3056
3057 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3058 {
3059         int ret;
3060
3061         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3062                 return -1;
3063         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3064         return ret;
3065 }
3066
3067 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3068                                               u64 ident_addr)
3069 {
3070         kvm->arch.ept_identity_map_addr = ident_addr;
3071         return 0;
3072 }
3073
3074 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3075                                           u32 kvm_nr_mmu_pages)
3076 {
3077         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3078                 return -EINVAL;
3079
3080         mutex_lock(&kvm->slots_lock);
3081         spin_lock(&kvm->mmu_lock);
3082
3083         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3084         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3085
3086         spin_unlock(&kvm->mmu_lock);
3087         mutex_unlock(&kvm->slots_lock);
3088         return 0;
3089 }
3090
3091 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3092 {
3093         return kvm->arch.n_max_mmu_pages;
3094 }
3095
3096 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3097 {
3098         int r;
3099
3100         r = 0;
3101         switch (chip->chip_id) {
3102         case KVM_IRQCHIP_PIC_MASTER:
3103                 memcpy(&chip->chip.pic,
3104                         &pic_irqchip(kvm)->pics[0],
3105                         sizeof(struct kvm_pic_state));
3106                 break;
3107         case KVM_IRQCHIP_PIC_SLAVE:
3108                 memcpy(&chip->chip.pic,
3109                         &pic_irqchip(kvm)->pics[1],
3110                         sizeof(struct kvm_pic_state));
3111                 break;
3112         case KVM_IRQCHIP_IOAPIC:
3113                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3114                 break;
3115         default:
3116                 r = -EINVAL;
3117                 break;
3118         }
3119         return r;
3120 }
3121
3122 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3123 {
3124         int r;
3125
3126         r = 0;
3127         switch (chip->chip_id) {
3128         case KVM_IRQCHIP_PIC_MASTER:
3129                 spin_lock(&pic_irqchip(kvm)->lock);
3130                 memcpy(&pic_irqchip(kvm)->pics[0],
3131                         &chip->chip.pic,
3132                         sizeof(struct kvm_pic_state));
3133                 spin_unlock(&pic_irqchip(kvm)->lock);
3134                 break;
3135         case KVM_IRQCHIP_PIC_SLAVE:
3136                 spin_lock(&pic_irqchip(kvm)->lock);
3137                 memcpy(&pic_irqchip(kvm)->pics[1],
3138                         &chip->chip.pic,
3139                         sizeof(struct kvm_pic_state));
3140                 spin_unlock(&pic_irqchip(kvm)->lock);
3141                 break;
3142         case KVM_IRQCHIP_IOAPIC:
3143                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3144                 break;
3145         default:
3146                 r = -EINVAL;
3147                 break;
3148         }
3149         kvm_pic_update_irq(pic_irqchip(kvm));
3150         return r;
3151 }
3152
3153 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3154 {
3155         int r = 0;
3156
3157         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3158         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3159         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3160         return r;
3161 }
3162
3163 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3164 {
3165         int r = 0;
3166
3167         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3168         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3169         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3170         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3171         return r;
3172 }
3173
3174 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3175 {
3176         int r = 0;
3177
3178         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3179         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3180                 sizeof(ps->channels));
3181         ps->flags = kvm->arch.vpit->pit_state.flags;
3182         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3183         memset(&ps->reserved, 0, sizeof(ps->reserved));
3184         return r;
3185 }
3186
3187 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3188 {
3189         int r = 0, start = 0;
3190         u32 prev_legacy, cur_legacy;
3191         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3192         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3193         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3194         if (!prev_legacy && cur_legacy)
3195                 start = 1;
3196         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3197                sizeof(kvm->arch.vpit->pit_state.channels));
3198         kvm->arch.vpit->pit_state.flags = ps->flags;
3199         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3200         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3201         return r;
3202 }
3203
3204 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3205                                  struct kvm_reinject_control *control)
3206 {
3207         if (!kvm->arch.vpit)
3208                 return -ENXIO;
3209         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3210         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3211         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3212         return 0;
3213 }
3214
3215 /*
3216  * Get (and clear) the dirty memory log for a memory slot.
3217  */
3218 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3219                                       struct kvm_dirty_log *log)
3220 {
3221         int r, i;
3222         struct kvm_memory_slot *memslot;
3223         unsigned long n;
3224         unsigned long is_dirty = 0;
3225
3226         mutex_lock(&kvm->slots_lock);
3227
3228         r = -EINVAL;
3229         if (log->slot >= KVM_MEMORY_SLOTS)
3230                 goto out;
3231
3232         memslot = &kvm->memslots->memslots[log->slot];
3233         r = -ENOENT;
3234         if (!memslot->dirty_bitmap)
3235                 goto out;
3236
3237         n = kvm_dirty_bitmap_bytes(memslot);
3238
3239         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3240                 is_dirty = memslot->dirty_bitmap[i];
3241
3242         /* If nothing is dirty, don't bother messing with page tables. */
3243         if (is_dirty) {
3244                 struct kvm_memslots *slots, *old_slots;
3245                 unsigned long *dirty_bitmap;
3246
3247                 dirty_bitmap = memslot->dirty_bitmap_head;
3248                 if (memslot->dirty_bitmap == dirty_bitmap)
3249                         dirty_bitmap += n / sizeof(long);
3250                 memset(dirty_bitmap, 0, n);
3251
3252                 r = -ENOMEM;
3253                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3254                 if (!slots)
3255                         goto out;
3256                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3257                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3258                 slots->generation++;
3259
3260                 old_slots = kvm->memslots;
3261                 rcu_assign_pointer(kvm->memslots, slots);
3262                 synchronize_srcu_expedited(&kvm->srcu);
3263                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3264                 kfree(old_slots);
3265
3266                 spin_lock(&kvm->mmu_lock);
3267                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3268                 spin_unlock(&kvm->mmu_lock);
3269
3270                 r = -EFAULT;
3271                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3272                         goto out;
3273         } else {
3274                 r = -EFAULT;
3275                 if (clear_user(log->dirty_bitmap, n))
3276                         goto out;
3277         }
3278
3279         r = 0;
3280 out:
3281         mutex_unlock(&kvm->slots_lock);
3282         return r;
3283 }
3284
3285 long kvm_arch_vm_ioctl(struct file *filp,
3286                        unsigned int ioctl, unsigned long arg)
3287 {
3288         struct kvm *kvm = filp->private_data;
3289         void __user *argp = (void __user *)arg;
3290         int r = -ENOTTY;
3291         /*
3292          * This union makes it completely explicit to gcc-3.x
3293          * that these two variables' stack usage should be
3294          * combined, not added together.
3295          */
3296         union {
3297                 struct kvm_pit_state ps;
3298                 struct kvm_pit_state2 ps2;
3299                 struct kvm_pit_config pit_config;
3300         } u;
3301
3302         switch (ioctl) {
3303         case KVM_SET_TSS_ADDR:
3304                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3305                 if (r < 0)
3306                         goto out;
3307                 break;
3308         case KVM_SET_IDENTITY_MAP_ADDR: {
3309                 u64 ident_addr;
3310
3311                 r = -EFAULT;
3312                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3313                         goto out;
3314                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3315                 if (r < 0)
3316                         goto out;
3317                 break;
3318         }
3319         case KVM_SET_NR_MMU_PAGES:
3320                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3321                 if (r)
3322                         goto out;
3323                 break;
3324         case KVM_GET_NR_MMU_PAGES:
3325                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3326                 break;
3327         case KVM_CREATE_IRQCHIP: {
3328                 struct kvm_pic *vpic;
3329
3330                 mutex_lock(&kvm->lock);
3331                 r = -EEXIST;
3332                 if (kvm->arch.vpic)
3333                         goto create_irqchip_unlock;
3334                 r = -ENOMEM;
3335                 vpic = kvm_create_pic(kvm);
3336                 if (vpic) {
3337                         r = kvm_ioapic_init(kvm);
3338                         if (r) {
3339                                 mutex_lock(&kvm->slots_lock);
3340                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3341                                                           &vpic->dev);
3342                                 mutex_unlock(&kvm->slots_lock);
3343                                 kfree(vpic);
3344                                 goto create_irqchip_unlock;
3345                         }
3346                 } else
3347                         goto create_irqchip_unlock;
3348                 smp_wmb();
3349                 kvm->arch.vpic = vpic;
3350                 smp_wmb();
3351                 r = kvm_setup_default_irq_routing(kvm);
3352                 if (r) {
3353                         mutex_lock(&kvm->slots_lock);
3354                         mutex_lock(&kvm->irq_lock);
3355                         kvm_ioapic_destroy(kvm);
3356                         kvm_destroy_pic(kvm);
3357                         mutex_unlock(&kvm->irq_lock);
3358                         mutex_unlock(&kvm->slots_lock);
3359                 }
3360         create_irqchip_unlock:
3361                 mutex_unlock(&kvm->lock);
3362                 break;
3363         }
3364         case KVM_CREATE_PIT:
3365                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3366                 goto create_pit;
3367         case KVM_CREATE_PIT2:
3368                 r = -EFAULT;
3369                 if (copy_from_user(&u.pit_config, argp,
3370                                    sizeof(struct kvm_pit_config)))
3371                         goto out;
3372         create_pit:
3373                 mutex_lock(&kvm->slots_lock);
3374                 r = -EEXIST;
3375                 if (kvm->arch.vpit)
3376                         goto create_pit_unlock;
3377                 r = -ENOMEM;
3378                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3379                 if (kvm->arch.vpit)
3380                         r = 0;
3381         create_pit_unlock:
3382                 mutex_unlock(&kvm->slots_lock);
3383                 break;
3384         case KVM_IRQ_LINE_STATUS:
3385         case KVM_IRQ_LINE: {
3386                 struct kvm_irq_level irq_event;
3387
3388                 r = -EFAULT;
3389                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3390                         goto out;
3391                 r = -ENXIO;
3392                 if (irqchip_in_kernel(kvm)) {
3393                         __s32 status;
3394                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3395                                         irq_event.irq, irq_event.level);
3396                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3397                                 r = -EFAULT;
3398                                 irq_event.status = status;
3399                                 if (copy_to_user(argp, &irq_event,
3400                                                         sizeof irq_event))
3401                                         goto out;
3402                         }
3403                         r = 0;
3404                 }
3405                 break;
3406         }
3407         case KVM_GET_IRQCHIP: {
3408                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3409                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3410
3411                 r = -ENOMEM;
3412                 if (!chip)
3413                         goto out;
3414                 r = -EFAULT;
3415                 if (copy_from_user(chip, argp, sizeof *chip))
3416                         goto get_irqchip_out;
3417                 r = -ENXIO;
3418                 if (!irqchip_in_kernel(kvm))
3419                         goto get_irqchip_out;
3420                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3421                 if (r)
3422                         goto get_irqchip_out;
3423                 r = -EFAULT;
3424                 if (copy_to_user(argp, chip, sizeof *chip))
3425                         goto get_irqchip_out;
3426                 r = 0;
3427         get_irqchip_out:
3428                 kfree(chip);
3429                 if (r)
3430                         goto out;
3431                 break;
3432         }
3433         case KVM_SET_IRQCHIP: {
3434                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3435                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3436
3437                 r = -ENOMEM;
3438                 if (!chip)
3439                         goto out;
3440                 r = -EFAULT;
3441                 if (copy_from_user(chip, argp, sizeof *chip))
3442                         goto set_irqchip_out;
3443                 r = -ENXIO;
3444                 if (!irqchip_in_kernel(kvm))
3445                         goto set_irqchip_out;
3446                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3447                 if (r)
3448                         goto set_irqchip_out;
3449                 r = 0;
3450         set_irqchip_out:
3451                 kfree(chip);
3452                 if (r)
3453                         goto out;
3454                 break;
3455         }
3456         case KVM_GET_PIT: {
3457                 r = -EFAULT;
3458                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3459                         goto out;
3460                 r = -ENXIO;
3461                 if (!kvm->arch.vpit)
3462                         goto out;
3463                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3464                 if (r)
3465                         goto out;
3466                 r = -EFAULT;
3467                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3468                         goto out;
3469                 r = 0;
3470                 break;
3471         }
3472         case KVM_SET_PIT: {
3473                 r = -EFAULT;
3474                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3475                         goto out;
3476                 r = -ENXIO;
3477                 if (!kvm->arch.vpit)
3478                         goto out;
3479                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3480                 if (r)
3481                         goto out;
3482                 r = 0;
3483                 break;
3484         }
3485         case KVM_GET_PIT2: {
3486                 r = -ENXIO;
3487                 if (!kvm->arch.vpit)
3488                         goto out;
3489                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3490                 if (r)
3491                         goto out;
3492                 r = -EFAULT;
3493                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3494                         goto out;
3495                 r = 0;
3496                 break;
3497         }
3498         case KVM_SET_PIT2: {
3499                 r = -EFAULT;
3500                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3501                         goto out;
3502                 r = -ENXIO;
3503                 if (!kvm->arch.vpit)
3504                         goto out;
3505                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3506                 if (r)
3507                         goto out;
3508                 r = 0;
3509                 break;
3510         }
3511         case KVM_REINJECT_CONTROL: {
3512                 struct kvm_reinject_control control;
3513                 r =  -EFAULT;
3514                 if (copy_from_user(&control, argp, sizeof(control)))
3515                         goto out;
3516                 r = kvm_vm_ioctl_reinject(kvm, &control);
3517                 if (r)
3518                         goto out;
3519                 r = 0;
3520                 break;
3521         }
3522         case KVM_XEN_HVM_CONFIG: {
3523                 r = -EFAULT;
3524                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3525                                    sizeof(struct kvm_xen_hvm_config)))
3526                         goto out;
3527                 r = -EINVAL;
3528                 if (kvm->arch.xen_hvm_config.flags)
3529                         goto out;
3530                 r = 0;
3531                 break;
3532         }
3533         case KVM_SET_CLOCK: {
3534                 struct kvm_clock_data user_ns;
3535                 u64 now_ns;
3536                 s64 delta;
3537
3538                 r = -EFAULT;
3539                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3540                         goto out;
3541
3542                 r = -EINVAL;
3543                 if (user_ns.flags)
3544                         goto out;
3545
3546                 r = 0;
3547                 local_irq_disable();
3548                 now_ns = get_kernel_ns();
3549                 delta = user_ns.clock - now_ns;
3550                 local_irq_enable();
3551                 kvm->arch.kvmclock_offset = delta;
3552                 break;
3553         }
3554         case KVM_GET_CLOCK: {
3555                 struct kvm_clock_data user_ns;
3556                 u64 now_ns;
3557
3558                 local_irq_disable();
3559                 now_ns = get_kernel_ns();
3560                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3561                 local_irq_enable();
3562                 user_ns.flags = 0;
3563                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3564
3565                 r = -EFAULT;
3566                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3567                         goto out;
3568                 r = 0;
3569                 break;
3570         }
3571
3572         default:
3573                 ;
3574         }
3575 out:
3576         return r;
3577 }
3578
3579 static void kvm_init_msr_list(void)
3580 {
3581         u32 dummy[2];
3582         unsigned i, j;
3583
3584         /* skip the first msrs in the list. KVM-specific */
3585         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3586                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3587                         continue;
3588                 if (j < i)
3589                         msrs_to_save[j] = msrs_to_save[i];
3590                 j++;
3591         }
3592         num_msrs_to_save = j;
3593 }
3594
3595 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3596                            const void *v)
3597 {
3598         if (vcpu->arch.apic &&
3599             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3600                 return 0;
3601
3602         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3603 }
3604
3605 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3606 {
3607         if (vcpu->arch.apic &&
3608             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3609                 return 0;
3610
3611         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3612 }
3613
3614 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3615                         struct kvm_segment *var, int seg)
3616 {
3617         kvm_x86_ops->set_segment(vcpu, var, seg);
3618 }
3619
3620 void kvm_get_segment(struct kvm_vcpu *vcpu,
3621                      struct kvm_segment *var, int seg)
3622 {
3623         kvm_x86_ops->get_segment(vcpu, var, seg);
3624 }
3625
3626 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3627 {
3628         return gpa;
3629 }
3630
3631 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3632 {
3633         gpa_t t_gpa;
3634         struct x86_exception exception;
3635
3636         BUG_ON(!mmu_is_nested(vcpu));
3637
3638         /* NPT walks are always user-walks */
3639         access |= PFERR_USER_MASK;
3640         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3641
3642         return t_gpa;
3643 }
3644
3645 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3646                               struct x86_exception *exception)
3647 {
3648         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3649         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3650 }
3651
3652  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3653                                 struct x86_exception *exception)
3654 {
3655         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3656         access |= PFERR_FETCH_MASK;
3657         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3658 }
3659
3660 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3661                                struct x86_exception *exception)
3662 {
3663         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3664         access |= PFERR_WRITE_MASK;
3665         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3666 }
3667
3668 /* uses this to access any guest's mapped memory without checking CPL */
3669 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3670                                 struct x86_exception *exception)
3671 {
3672         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3673 }
3674
3675 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3676                                       struct kvm_vcpu *vcpu, u32 access,
3677                                       struct x86_exception *exception)
3678 {
3679         void *data = val;
3680         int r = X86EMUL_CONTINUE;
3681
3682         while (bytes) {
3683                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3684                                                             exception);
3685                 unsigned offset = addr & (PAGE_SIZE-1);
3686                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3687                 int ret;
3688
3689                 if (gpa == UNMAPPED_GVA)
3690                         return X86EMUL_PROPAGATE_FAULT;
3691                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3692                 if (ret < 0) {
3693                         r = X86EMUL_IO_NEEDED;
3694                         goto out;
3695                 }
3696
3697                 bytes -= toread;
3698                 data += toread;
3699                 addr += toread;
3700         }
3701 out:
3702         return r;
3703 }
3704
3705 /* used for instruction fetching */
3706 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3707                                 struct kvm_vcpu *vcpu,
3708                                 struct x86_exception *exception)
3709 {
3710         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3711         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3712                                           access | PFERR_FETCH_MASK,
3713                                           exception);
3714 }
3715
3716 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3717                                struct kvm_vcpu *vcpu,
3718                                struct x86_exception *exception)
3719 {
3720         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3721         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3722                                           exception);
3723 }
3724
3725 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3726                                       struct kvm_vcpu *vcpu,
3727                                       struct x86_exception *exception)
3728 {
3729         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3730 }
3731
3732 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3733                                        unsigned int bytes,
3734                                        struct kvm_vcpu *vcpu,
3735                                        struct x86_exception *exception)
3736 {
3737         void *data = val;
3738         int r = X86EMUL_CONTINUE;
3739
3740         while (bytes) {
3741                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3742                                                              PFERR_WRITE_MASK,
3743                                                              exception);
3744                 unsigned offset = addr & (PAGE_SIZE-1);
3745                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3746                 int ret;
3747
3748                 if (gpa == UNMAPPED_GVA)
3749                         return X86EMUL_PROPAGATE_FAULT;
3750                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3751                 if (ret < 0) {
3752                         r = X86EMUL_IO_NEEDED;
3753                         goto out;
3754                 }
3755
3756                 bytes -= towrite;
3757                 data += towrite;
3758                 addr += towrite;
3759         }
3760 out:
3761         return r;
3762 }
3763
3764 static int emulator_read_emulated(unsigned long addr,
3765                                   void *val,
3766                                   unsigned int bytes,
3767                                   struct x86_exception *exception,
3768                                   struct kvm_vcpu *vcpu)
3769 {
3770         gpa_t                 gpa;
3771
3772         if (vcpu->mmio_read_completed) {
3773                 memcpy(val, vcpu->mmio_data, bytes);
3774                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3775                                vcpu->mmio_phys_addr, *(u64 *)val);
3776                 vcpu->mmio_read_completed = 0;
3777                 return X86EMUL_CONTINUE;
3778         }
3779
3780         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, exception);
3781
3782         if (gpa == UNMAPPED_GVA)
3783                 return X86EMUL_PROPAGATE_FAULT;
3784
3785         /* For APIC access vmexit */
3786         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3787                 goto mmio;
3788
3789         if (kvm_read_guest_virt(addr, val, bytes, vcpu, exception)
3790             == X86EMUL_CONTINUE)
3791                 return X86EMUL_CONTINUE;
3792
3793 mmio:
3794         /*
3795          * Is this MMIO handled locally?
3796          */
3797         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3798                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3799                 return X86EMUL_CONTINUE;
3800         }
3801
3802         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3803
3804         vcpu->mmio_needed = 1;
3805         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3806         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3807         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3808         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3809
3810         return X86EMUL_IO_NEEDED;
3811 }
3812
3813 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3814                         const void *val, int bytes)
3815 {
3816         int ret;
3817
3818         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3819         if (ret < 0)
3820                 return 0;
3821         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3822         return 1;
3823 }
3824
3825 static int emulator_write_emulated_onepage(unsigned long addr,
3826                                            const void *val,
3827                                            unsigned int bytes,
3828                                            struct x86_exception *exception,
3829                                            struct kvm_vcpu *vcpu)
3830 {
3831         gpa_t                 gpa;
3832
3833         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, exception);
3834
3835         if (gpa == UNMAPPED_GVA)
3836                 return X86EMUL_PROPAGATE_FAULT;
3837
3838         /* For APIC access vmexit */
3839         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3840                 goto mmio;
3841
3842         if (emulator_write_phys(vcpu, gpa, val, bytes))
3843                 return X86EMUL_CONTINUE;
3844
3845 mmio:
3846         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3847         /*
3848          * Is this MMIO handled locally?
3849          */
3850         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3851                 return X86EMUL_CONTINUE;
3852
3853         vcpu->mmio_needed = 1;
3854         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3855         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3856         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3857         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3858         memcpy(vcpu->run->mmio.data, val, bytes);
3859
3860         return X86EMUL_CONTINUE;
3861 }
3862
3863 int emulator_write_emulated(unsigned long addr,
3864                             const void *val,
3865                             unsigned int bytes,
3866                             struct x86_exception *exception,
3867                             struct kvm_vcpu *vcpu)
3868 {
3869         /* Crossing a page boundary? */
3870         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3871                 int rc, now;
3872
3873                 now = -addr & ~PAGE_MASK;
3874                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
3875                                                      vcpu);
3876                 if (rc != X86EMUL_CONTINUE)
3877                         return rc;
3878                 addr += now;
3879                 val += now;
3880                 bytes -= now;
3881         }
3882         return emulator_write_emulated_onepage(addr, val, bytes, exception,
3883                                                vcpu);
3884 }
3885
3886 #define CMPXCHG_TYPE(t, ptr, old, new) \
3887         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3888
3889 #ifdef CONFIG_X86_64
3890 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3891 #else
3892 #  define CMPXCHG64(ptr, old, new) \
3893         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3894 #endif
3895
3896 static int emulator_cmpxchg_emulated(unsigned long addr,
3897                                      const void *old,
3898                                      const void *new,
3899                                      unsigned int bytes,
3900                                      struct x86_exception *exception,
3901                                      struct kvm_vcpu *vcpu)
3902 {
3903         gpa_t gpa;
3904         struct page *page;
3905         char *kaddr;
3906         bool exchanged;
3907
3908         /* guests cmpxchg8b have to be emulated atomically */
3909         if (bytes > 8 || (bytes & (bytes - 1)))
3910                 goto emul_write;
3911
3912         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3913
3914         if (gpa == UNMAPPED_GVA ||
3915             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3916                 goto emul_write;
3917
3918         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3919                 goto emul_write;
3920
3921         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3922         if (is_error_page(page)) {
3923                 kvm_release_page_clean(page);
3924                 goto emul_write;
3925         }
3926
3927         kaddr = kmap_atomic(page, KM_USER0);
3928         kaddr += offset_in_page(gpa);
3929         switch (bytes) {
3930         case 1:
3931                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3932                 break;
3933         case 2:
3934                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3935                 break;
3936         case 4:
3937                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3938                 break;
3939         case 8:
3940                 exchanged = CMPXCHG64(kaddr, old, new);
3941                 break;
3942         default:
3943                 BUG();
3944         }
3945         kunmap_atomic(kaddr, KM_USER0);
3946         kvm_release_page_dirty(page);
3947
3948         if (!exchanged)
3949                 return X86EMUL_CMPXCHG_FAILED;
3950
3951         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3952
3953         return X86EMUL_CONTINUE;
3954
3955 emul_write:
3956         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3957
3958         return emulator_write_emulated(addr, new, bytes, exception, vcpu);
3959 }
3960
3961 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3962 {
3963         /* TODO: String I/O for in kernel device */
3964         int r;
3965
3966         if (vcpu->arch.pio.in)
3967                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3968                                     vcpu->arch.pio.size, pd);
3969         else
3970                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3971                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3972                                      pd);
3973         return r;
3974 }
3975
3976
3977 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3978                              unsigned int count, struct kvm_vcpu *vcpu)
3979 {
3980         if (vcpu->arch.pio.count)
3981                 goto data_avail;
3982
3983         trace_kvm_pio(0, port, size, count);
3984
3985         vcpu->arch.pio.port = port;
3986         vcpu->arch.pio.in = 1;
3987         vcpu->arch.pio.count  = count;
3988         vcpu->arch.pio.size = size;
3989
3990         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3991         data_avail:
3992                 memcpy(val, vcpu->arch.pio_data, size * count);
3993                 vcpu->arch.pio.count = 0;
3994                 return 1;
3995         }
3996
3997         vcpu->run->exit_reason = KVM_EXIT_IO;
3998         vcpu->run->io.direction = KVM_EXIT_IO_IN;
3999         vcpu->run->io.size = size;
4000         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4001         vcpu->run->io.count = count;
4002         vcpu->run->io.port = port;
4003
4004         return 0;
4005 }
4006
4007 static int emulator_pio_out_emulated(int size, unsigned short port,
4008                               const void *val, unsigned int count,
4009                               struct kvm_vcpu *vcpu)
4010 {
4011         trace_kvm_pio(1, port, size, count);
4012
4013         vcpu->arch.pio.port = port;
4014         vcpu->arch.pio.in = 0;
4015         vcpu->arch.pio.count = count;
4016         vcpu->arch.pio.size = size;
4017
4018         memcpy(vcpu->arch.pio_data, val, size * count);
4019
4020         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4021                 vcpu->arch.pio.count = 0;
4022                 return 1;
4023         }
4024
4025         vcpu->run->exit_reason = KVM_EXIT_IO;
4026         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4027         vcpu->run->io.size = size;
4028         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4029         vcpu->run->io.count = count;
4030         vcpu->run->io.port = port;
4031
4032         return 0;
4033 }
4034
4035 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4036 {
4037         return kvm_x86_ops->get_segment_base(vcpu, seg);
4038 }
4039
4040 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
4041 {
4042         kvm_mmu_invlpg(vcpu, address);
4043         return X86EMUL_CONTINUE;
4044 }
4045
4046 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4047 {
4048         if (!need_emulate_wbinvd(vcpu))
4049                 return X86EMUL_CONTINUE;
4050
4051         if (kvm_x86_ops->has_wbinvd_exit()) {
4052                 int cpu = get_cpu();
4053
4054                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4055                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4056                                 wbinvd_ipi, NULL, 1);
4057                 put_cpu();
4058                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4059         } else
4060                 wbinvd();
4061         return X86EMUL_CONTINUE;
4062 }
4063 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4064
4065 int emulate_clts(struct kvm_vcpu *vcpu)
4066 {
4067         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
4068         kvm_x86_ops->fpu_activate(vcpu);
4069         return X86EMUL_CONTINUE;
4070 }
4071
4072 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
4073 {
4074         return _kvm_get_dr(vcpu, dr, dest);
4075 }
4076
4077 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
4078 {
4079
4080         return __kvm_set_dr(vcpu, dr, value);
4081 }
4082
4083 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4084 {
4085         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4086 }
4087
4088 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
4089 {
4090         unsigned long value;
4091
4092         switch (cr) {
4093         case 0:
4094                 value = kvm_read_cr0(vcpu);
4095                 break;
4096         case 2:
4097                 value = vcpu->arch.cr2;
4098                 break;
4099         case 3:
4100                 value = kvm_read_cr3(vcpu);
4101                 break;
4102         case 4:
4103                 value = kvm_read_cr4(vcpu);
4104                 break;
4105         case 8:
4106                 value = kvm_get_cr8(vcpu);
4107                 break;
4108         default:
4109                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4110                 return 0;
4111         }
4112
4113         return value;
4114 }
4115
4116 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
4117 {
4118         int res = 0;
4119
4120         switch (cr) {
4121         case 0:
4122                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4123                 break;
4124         case 2:
4125                 vcpu->arch.cr2 = val;
4126                 break;
4127         case 3:
4128                 res = kvm_set_cr3(vcpu, val);
4129                 break;
4130         case 4:
4131                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4132                 break;
4133         case 8:
4134                 res = kvm_set_cr8(vcpu, val);
4135                 break;
4136         default:
4137                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4138                 res = -1;
4139         }
4140
4141         return res;
4142 }
4143
4144 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4145 {
4146         return kvm_x86_ops->get_cpl(vcpu);
4147 }
4148
4149 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4150 {
4151         kvm_x86_ops->get_gdt(vcpu, dt);
4152 }
4153
4154 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4155 {
4156         kvm_x86_ops->get_idt(vcpu, dt);
4157 }
4158
4159 static unsigned long emulator_get_cached_segment_base(int seg,
4160                                                       struct kvm_vcpu *vcpu)
4161 {
4162         return get_segment_base(vcpu, seg);
4163 }
4164
4165 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
4166                                            struct kvm_vcpu *vcpu)
4167 {
4168         struct kvm_segment var;
4169
4170         kvm_get_segment(vcpu, &var, seg);
4171
4172         if (var.unusable)
4173                 return false;
4174
4175         if (var.g)
4176                 var.limit >>= 12;
4177         set_desc_limit(desc, var.limit);
4178         set_desc_base(desc, (unsigned long)var.base);
4179         desc->type = var.type;
4180         desc->s = var.s;
4181         desc->dpl = var.dpl;
4182         desc->p = var.present;
4183         desc->avl = var.avl;
4184         desc->l = var.l;
4185         desc->d = var.db;
4186         desc->g = var.g;
4187
4188         return true;
4189 }
4190
4191 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4192                                            struct kvm_vcpu *vcpu)
4193 {
4194         struct kvm_segment var;
4195
4196         /* needed to preserve selector */
4197         kvm_get_segment(vcpu, &var, seg);
4198
4199         var.base = get_desc_base(desc);
4200         var.limit = get_desc_limit(desc);
4201         if (desc->g)
4202                 var.limit = (var.limit << 12) | 0xfff;
4203         var.type = desc->type;
4204         var.present = desc->p;
4205         var.dpl = desc->dpl;
4206         var.db = desc->d;
4207         var.s = desc->s;
4208         var.l = desc->l;
4209         var.g = desc->g;
4210         var.avl = desc->avl;
4211         var.present = desc->p;
4212         var.unusable = !var.present;
4213         var.padding = 0;
4214
4215         kvm_set_segment(vcpu, &var, seg);
4216         return;
4217 }
4218
4219 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4220 {
4221         struct kvm_segment kvm_seg;
4222
4223         kvm_get_segment(vcpu, &kvm_seg, seg);
4224         return kvm_seg.selector;
4225 }
4226
4227 static void emulator_set_segment_selector(u16 sel, int seg,
4228                                           struct kvm_vcpu *vcpu)
4229 {
4230         struct kvm_segment kvm_seg;
4231
4232         kvm_get_segment(vcpu, &kvm_seg, seg);
4233         kvm_seg.selector = sel;
4234         kvm_set_segment(vcpu, &kvm_seg, seg);
4235 }
4236
4237 static struct x86_emulate_ops emulate_ops = {
4238         .read_std            = kvm_read_guest_virt_system,
4239         .write_std           = kvm_write_guest_virt_system,
4240         .fetch               = kvm_fetch_guest_virt,
4241         .read_emulated       = emulator_read_emulated,
4242         .write_emulated      = emulator_write_emulated,
4243         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4244         .pio_in_emulated     = emulator_pio_in_emulated,
4245         .pio_out_emulated    = emulator_pio_out_emulated,
4246         .get_cached_descriptor = emulator_get_cached_descriptor,
4247         .set_cached_descriptor = emulator_set_cached_descriptor,
4248         .get_segment_selector = emulator_get_segment_selector,
4249         .set_segment_selector = emulator_set_segment_selector,
4250         .get_cached_segment_base = emulator_get_cached_segment_base,
4251         .get_gdt             = emulator_get_gdt,
4252         .get_idt             = emulator_get_idt,
4253         .get_cr              = emulator_get_cr,
4254         .set_cr              = emulator_set_cr,
4255         .cpl                 = emulator_get_cpl,
4256         .get_dr              = emulator_get_dr,
4257         .set_dr              = emulator_set_dr,
4258         .set_msr             = kvm_set_msr,
4259         .get_msr             = kvm_get_msr,
4260 };
4261
4262 static void cache_all_regs(struct kvm_vcpu *vcpu)
4263 {
4264         kvm_register_read(vcpu, VCPU_REGS_RAX);
4265         kvm_register_read(vcpu, VCPU_REGS_RSP);
4266         kvm_register_read(vcpu, VCPU_REGS_RIP);
4267         vcpu->arch.regs_dirty = ~0;
4268 }
4269
4270 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4271 {
4272         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4273         /*
4274          * an sti; sti; sequence only disable interrupts for the first
4275          * instruction. So, if the last instruction, be it emulated or
4276          * not, left the system with the INT_STI flag enabled, it
4277          * means that the last instruction is an sti. We should not
4278          * leave the flag on in this case. The same goes for mov ss
4279          */
4280         if (!(int_shadow & mask))
4281                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4282 }
4283
4284 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4285 {
4286         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4287         if (ctxt->exception.vector == PF_VECTOR)
4288                 kvm_propagate_fault(vcpu, &ctxt->exception);
4289         else if (ctxt->exception.error_code_valid)
4290                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4291                                       ctxt->exception.error_code);
4292         else
4293                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4294 }
4295
4296 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4297 {
4298         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4299         int cs_db, cs_l;
4300
4301         cache_all_regs(vcpu);
4302
4303         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4304
4305         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4306         vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4307         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4308         vcpu->arch.emulate_ctxt.mode =
4309                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4310                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4311                 ? X86EMUL_MODE_VM86 : cs_l
4312                 ? X86EMUL_MODE_PROT64 : cs_db
4313                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4314         memset(c, 0, sizeof(struct decode_cache));
4315         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4316 }
4317
4318 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq)
4319 {
4320         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4321         int ret;
4322
4323         init_emulate_ctxt(vcpu);
4324
4325         vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4326         vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4327         vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip;
4328         ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4329
4330         if (ret != X86EMUL_CONTINUE)
4331                 return EMULATE_FAIL;
4332
4333         vcpu->arch.emulate_ctxt.eip = c->eip;
4334         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4335         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4336         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4337
4338         if (irq == NMI_VECTOR)
4339                 vcpu->arch.nmi_pending = false;
4340         else
4341                 vcpu->arch.interrupt.pending = false;
4342
4343         return EMULATE_DONE;
4344 }
4345 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4346
4347 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4348 {
4349         int r = EMULATE_DONE;
4350
4351         ++vcpu->stat.insn_emulation_fail;
4352         trace_kvm_emulate_insn_failed(vcpu);
4353         if (!is_guest_mode(vcpu)) {
4354                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4355                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4356                 vcpu->run->internal.ndata = 0;
4357                 r = EMULATE_FAIL;
4358         }
4359         kvm_queue_exception(vcpu, UD_VECTOR);
4360
4361         return r;
4362 }
4363
4364 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4365 {
4366         gpa_t gpa;
4367
4368         if (tdp_enabled)
4369                 return false;
4370
4371         /*
4372          * if emulation was due to access to shadowed page table
4373          * and it failed try to unshadow page and re-entetr the
4374          * guest to let CPU execute the instruction.
4375          */
4376         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4377                 return true;
4378
4379         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4380
4381         if (gpa == UNMAPPED_GVA)
4382                 return true; /* let cpu generate fault */
4383
4384         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4385                 return true;
4386
4387         return false;
4388 }
4389
4390 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4391                             unsigned long cr2,
4392                             int emulation_type,
4393                             void *insn,
4394                             int insn_len)
4395 {
4396         int r;
4397         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4398
4399         kvm_clear_exception_queue(vcpu);
4400         vcpu->arch.mmio_fault_cr2 = cr2;
4401         /*
4402          * TODO: fix emulate.c to use guest_read/write_register
4403          * instead of direct ->regs accesses, can save hundred cycles
4404          * on Intel for instructions that don't read/change RSP, for
4405          * for example.
4406          */
4407         cache_all_regs(vcpu);
4408
4409         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4410                 init_emulate_ctxt(vcpu);
4411                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4412                 vcpu->arch.emulate_ctxt.have_exception = false;
4413                 vcpu->arch.emulate_ctxt.perm_ok = false;
4414
4415                 vcpu->arch.emulate_ctxt.only_vendor_specific_insn
4416                         = emulation_type & EMULTYPE_TRAP_UD;
4417
4418                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, insn, insn_len);
4419
4420                 trace_kvm_emulate_insn_start(vcpu);
4421                 ++vcpu->stat.insn_emulation;
4422                 if (r)  {
4423                         if (emulation_type & EMULTYPE_TRAP_UD)
4424                                 return EMULATE_FAIL;
4425                         if (reexecute_instruction(vcpu, cr2))
4426                                 return EMULATE_DONE;
4427                         if (emulation_type & EMULTYPE_SKIP)
4428                                 return EMULATE_FAIL;
4429                         return handle_emulation_failure(vcpu);
4430                 }
4431         }
4432
4433         if (emulation_type & EMULTYPE_SKIP) {
4434                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4435                 return EMULATE_DONE;
4436         }
4437
4438         /* this is needed for vmware backdor interface to work since it
4439            changes registers values  during IO operation */
4440         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4441
4442 restart:
4443         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4444
4445         if (r == EMULATION_FAILED) {
4446                 if (reexecute_instruction(vcpu, cr2))
4447                         return EMULATE_DONE;
4448
4449                 return handle_emulation_failure(vcpu);
4450         }
4451
4452         if (vcpu->arch.emulate_ctxt.have_exception) {
4453                 inject_emulated_exception(vcpu);
4454                 r = EMULATE_DONE;
4455         } else if (vcpu->arch.pio.count) {
4456                 if (!vcpu->arch.pio.in)
4457                         vcpu->arch.pio.count = 0;
4458                 r = EMULATE_DO_MMIO;
4459         } else if (vcpu->mmio_needed) {
4460                 if (vcpu->mmio_is_write)
4461                         vcpu->mmio_needed = 0;
4462                 r = EMULATE_DO_MMIO;
4463         } else if (r == EMULATION_RESTART)
4464                 goto restart;
4465         else
4466                 r = EMULATE_DONE;
4467
4468         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4469         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4470         kvm_make_request(KVM_REQ_EVENT, vcpu);
4471         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4472         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4473
4474         return r;
4475 }
4476 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4477
4478 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4479 {
4480         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4481         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4482         /* do not return to emulator after return from userspace */
4483         vcpu->arch.pio.count = 0;
4484         return ret;
4485 }
4486 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4487
4488 static void tsc_bad(void *info)
4489 {
4490         __this_cpu_write(cpu_tsc_khz, 0);
4491 }
4492
4493 static void tsc_khz_changed(void *data)
4494 {
4495         struct cpufreq_freqs *freq = data;
4496         unsigned long khz = 0;
4497
4498         if (data)
4499                 khz = freq->new;
4500         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4501                 khz = cpufreq_quick_get(raw_smp_processor_id());
4502         if (!khz)
4503                 khz = tsc_khz;
4504         __this_cpu_write(cpu_tsc_khz, khz);
4505 }
4506
4507 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4508                                      void *data)
4509 {
4510         struct cpufreq_freqs *freq = data;
4511         struct kvm *kvm;
4512         struct kvm_vcpu *vcpu;
4513         int i, send_ipi = 0;
4514
4515         /*
4516          * We allow guests to temporarily run on slowing clocks,
4517          * provided we notify them after, or to run on accelerating
4518          * clocks, provided we notify them before.  Thus time never
4519          * goes backwards.
4520          *
4521          * However, we have a problem.  We can't atomically update
4522          * the frequency of a given CPU from this function; it is
4523          * merely a notifier, which can be called from any CPU.
4524          * Changing the TSC frequency at arbitrary points in time
4525          * requires a recomputation of local variables related to
4526          * the TSC for each VCPU.  We must flag these local variables
4527          * to be updated and be sure the update takes place with the
4528          * new frequency before any guests proceed.
4529          *
4530          * Unfortunately, the combination of hotplug CPU and frequency
4531          * change creates an intractable locking scenario; the order
4532          * of when these callouts happen is undefined with respect to
4533          * CPU hotplug, and they can race with each other.  As such,
4534          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4535          * undefined; you can actually have a CPU frequency change take
4536          * place in between the computation of X and the setting of the
4537          * variable.  To protect against this problem, all updates of
4538          * the per_cpu tsc_khz variable are done in an interrupt
4539          * protected IPI, and all callers wishing to update the value
4540          * must wait for a synchronous IPI to complete (which is trivial
4541          * if the caller is on the CPU already).  This establishes the
4542          * necessary total order on variable updates.
4543          *
4544          * Note that because a guest time update may take place
4545          * anytime after the setting of the VCPU's request bit, the
4546          * correct TSC value must be set before the request.  However,
4547          * to ensure the update actually makes it to any guest which
4548          * starts running in hardware virtualization between the set
4549          * and the acquisition of the spinlock, we must also ping the
4550          * CPU after setting the request bit.
4551          *
4552          */
4553
4554         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4555                 return 0;
4556         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4557                 return 0;
4558
4559         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4560
4561         raw_spin_lock(&kvm_lock);
4562         list_for_each_entry(kvm, &vm_list, vm_list) {
4563                 kvm_for_each_vcpu(i, vcpu, kvm) {
4564                         if (vcpu->cpu != freq->cpu)
4565                                 continue;
4566                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4567                         if (vcpu->cpu != smp_processor_id())
4568                                 send_ipi = 1;
4569                 }
4570         }
4571         raw_spin_unlock(&kvm_lock);
4572
4573         if (freq->old < freq->new && send_ipi) {
4574                 /*
4575                  * We upscale the frequency.  Must make the guest
4576                  * doesn't see old kvmclock values while running with
4577                  * the new frequency, otherwise we risk the guest sees
4578                  * time go backwards.
4579                  *
4580                  * In case we update the frequency for another cpu
4581                  * (which might be in guest context) send an interrupt
4582                  * to kick the cpu out of guest context.  Next time
4583                  * guest context is entered kvmclock will be updated,
4584                  * so the guest will not see stale values.
4585                  */
4586                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4587         }
4588         return 0;
4589 }
4590
4591 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4592         .notifier_call  = kvmclock_cpufreq_notifier
4593 };
4594
4595 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4596                                         unsigned long action, void *hcpu)
4597 {
4598         unsigned int cpu = (unsigned long)hcpu;
4599
4600         switch (action) {
4601                 case CPU_ONLINE:
4602                 case CPU_DOWN_FAILED:
4603                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4604                         break;
4605                 case CPU_DOWN_PREPARE:
4606                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4607                         break;
4608         }
4609         return NOTIFY_OK;
4610 }
4611
4612 static struct notifier_block kvmclock_cpu_notifier_block = {
4613         .notifier_call  = kvmclock_cpu_notifier,
4614         .priority = -INT_MAX
4615 };
4616
4617 static void kvm_timer_init(void)
4618 {
4619         int cpu;
4620
4621         max_tsc_khz = tsc_khz;
4622         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4623         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4624 #ifdef CONFIG_CPU_FREQ
4625                 struct cpufreq_policy policy;
4626                 memset(&policy, 0, sizeof(policy));
4627                 cpu = get_cpu();
4628                 cpufreq_get_policy(&policy, cpu);
4629                 if (policy.cpuinfo.max_freq)
4630                         max_tsc_khz = policy.cpuinfo.max_freq;
4631                 put_cpu();
4632 #endif
4633                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4634                                           CPUFREQ_TRANSITION_NOTIFIER);
4635         }
4636         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4637         for_each_online_cpu(cpu)
4638                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4639 }
4640
4641 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4642
4643 static int kvm_is_in_guest(void)
4644 {
4645         return percpu_read(current_vcpu) != NULL;
4646 }
4647
4648 static int kvm_is_user_mode(void)
4649 {
4650         int user_mode = 3;
4651
4652         if (percpu_read(current_vcpu))
4653                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4654
4655         return user_mode != 0;
4656 }
4657
4658 static unsigned long kvm_get_guest_ip(void)
4659 {
4660         unsigned long ip = 0;
4661
4662         if (percpu_read(current_vcpu))
4663                 ip = kvm_rip_read(percpu_read(current_vcpu));
4664
4665         return ip;
4666 }
4667
4668 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4669         .is_in_guest            = kvm_is_in_guest,
4670         .is_user_mode           = kvm_is_user_mode,
4671         .get_guest_ip           = kvm_get_guest_ip,
4672 };
4673
4674 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4675 {
4676         percpu_write(current_vcpu, vcpu);
4677 }
4678 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4679
4680 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4681 {
4682         percpu_write(current_vcpu, NULL);
4683 }
4684 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4685
4686 int kvm_arch_init(void *opaque)
4687 {
4688         int r;
4689         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4690
4691         if (kvm_x86_ops) {
4692                 printk(KERN_ERR "kvm: already loaded the other module\n");
4693                 r = -EEXIST;
4694                 goto out;
4695         }
4696
4697         if (!ops->cpu_has_kvm_support()) {
4698                 printk(KERN_ERR "kvm: no hardware support\n");
4699                 r = -EOPNOTSUPP;
4700                 goto out;
4701         }
4702         if (ops->disabled_by_bios()) {
4703                 printk(KERN_ERR "kvm: disabled by bios\n");
4704                 r = -EOPNOTSUPP;
4705                 goto out;
4706         }
4707
4708         r = kvm_mmu_module_init();
4709         if (r)
4710                 goto out;
4711
4712         kvm_init_msr_list();
4713
4714         kvm_x86_ops = ops;
4715         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4716         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4717                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4718
4719         kvm_timer_init();
4720
4721         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4722
4723         if (cpu_has_xsave)
4724                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4725
4726         return 0;
4727
4728 out:
4729         return r;
4730 }
4731
4732 void kvm_arch_exit(void)
4733 {
4734         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4735
4736         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4737                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4738                                             CPUFREQ_TRANSITION_NOTIFIER);
4739         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4740         kvm_x86_ops = NULL;
4741         kvm_mmu_module_exit();
4742 }
4743
4744 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4745 {
4746         ++vcpu->stat.halt_exits;
4747         if (irqchip_in_kernel(vcpu->kvm)) {
4748                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4749                 return 1;
4750         } else {
4751                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4752                 return 0;
4753         }
4754 }
4755 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4756
4757 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4758                            unsigned long a1)
4759 {
4760         if (is_long_mode(vcpu))
4761                 return a0;
4762         else
4763                 return a0 | ((gpa_t)a1 << 32);
4764 }
4765
4766 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4767 {
4768         u64 param, ingpa, outgpa, ret;
4769         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4770         bool fast, longmode;
4771         int cs_db, cs_l;
4772
4773         /*
4774          * hypercall generates UD from non zero cpl and real mode
4775          * per HYPER-V spec
4776          */
4777         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4778                 kvm_queue_exception(vcpu, UD_VECTOR);
4779                 return 0;
4780         }
4781
4782         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4783         longmode = is_long_mode(vcpu) && cs_l == 1;
4784
4785         if (!longmode) {
4786                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4787                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4788                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4789                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4790                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4791                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4792         }
4793 #ifdef CONFIG_X86_64
4794         else {
4795                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4796                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4797                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4798         }
4799 #endif
4800
4801         code = param & 0xffff;
4802         fast = (param >> 16) & 0x1;
4803         rep_cnt = (param >> 32) & 0xfff;
4804         rep_idx = (param >> 48) & 0xfff;
4805
4806         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4807
4808         switch (code) {
4809         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4810                 kvm_vcpu_on_spin(vcpu);
4811                 break;
4812         default:
4813                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4814                 break;
4815         }
4816
4817         ret = res | (((u64)rep_done & 0xfff) << 32);
4818         if (longmode) {
4819                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4820         } else {
4821                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4822                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4823         }
4824
4825         return 1;
4826 }
4827
4828 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4829 {
4830         unsigned long nr, a0, a1, a2, a3, ret;
4831         int r = 1;
4832
4833         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4834                 return kvm_hv_hypercall(vcpu);
4835
4836         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4837         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4838         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4839         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4840         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4841
4842         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4843
4844         if (!is_long_mode(vcpu)) {
4845                 nr &= 0xFFFFFFFF;
4846                 a0 &= 0xFFFFFFFF;
4847                 a1 &= 0xFFFFFFFF;
4848                 a2 &= 0xFFFFFFFF;
4849                 a3 &= 0xFFFFFFFF;
4850         }
4851
4852         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4853                 ret = -KVM_EPERM;
4854                 goto out;
4855         }
4856
4857         switch (nr) {
4858         case KVM_HC_VAPIC_POLL_IRQ:
4859                 ret = 0;
4860                 break;
4861         case KVM_HC_MMU_OP:
4862                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4863                 break;
4864         default:
4865                 ret = -KVM_ENOSYS;
4866                 break;
4867         }
4868 out:
4869         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4870         ++vcpu->stat.hypercalls;
4871         return r;
4872 }
4873 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4874
4875 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4876 {
4877         char instruction[3];
4878         unsigned long rip = kvm_rip_read(vcpu);
4879
4880         /*
4881          * Blow out the MMU to ensure that no other VCPU has an active mapping
4882          * to ensure that the updated hypercall appears atomically across all
4883          * VCPUs.
4884          */
4885         kvm_mmu_zap_all(vcpu->kvm);
4886
4887         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4888
4889         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4890 }
4891
4892 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4893 {
4894         struct desc_ptr dt = { limit, base };
4895
4896         kvm_x86_ops->set_gdt(vcpu, &dt);
4897 }
4898
4899 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4900 {
4901         struct desc_ptr dt = { limit, base };
4902
4903         kvm_x86_ops->set_idt(vcpu, &dt);
4904 }
4905
4906 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4907 {
4908         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4909         int j, nent = vcpu->arch.cpuid_nent;
4910
4911         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4912         /* when no next entry is found, the current entry[i] is reselected */
4913         for (j = i + 1; ; j = (j + 1) % nent) {
4914                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4915                 if (ej->function == e->function) {
4916                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4917                         return j;
4918                 }
4919         }
4920         return 0; /* silence gcc, even though control never reaches here */
4921 }
4922
4923 /* find an entry with matching function, matching index (if needed), and that
4924  * should be read next (if it's stateful) */
4925 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4926         u32 function, u32 index)
4927 {
4928         if (e->function != function)
4929                 return 0;
4930         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4931                 return 0;
4932         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4933             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4934                 return 0;
4935         return 1;
4936 }
4937
4938 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4939                                               u32 function, u32 index)
4940 {
4941         int i;
4942         struct kvm_cpuid_entry2 *best = NULL;
4943
4944         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4945                 struct kvm_cpuid_entry2 *e;
4946
4947                 e = &vcpu->arch.cpuid_entries[i];
4948                 if (is_matching_cpuid_entry(e, function, index)) {
4949                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4950                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4951                         best = e;
4952                         break;
4953                 }
4954                 /*
4955                  * Both basic or both extended?
4956                  */
4957                 if (((e->function ^ function) & 0x80000000) == 0)
4958                         if (!best || e->function > best->function)
4959                                 best = e;
4960         }
4961         return best;
4962 }
4963 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4964
4965 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4966 {
4967         struct kvm_cpuid_entry2 *best;
4968
4969         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4970         if (!best || best->eax < 0x80000008)
4971                 goto not_found;
4972         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4973         if (best)
4974                 return best->eax & 0xff;
4975 not_found:
4976         return 36;
4977 }
4978
4979 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4980 {
4981         u32 function, index;
4982         struct kvm_cpuid_entry2 *best;
4983
4984         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4985         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4986         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4987         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4988         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4989         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4990         best = kvm_find_cpuid_entry(vcpu, function, index);
4991         if (best) {
4992                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4993                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4994                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4995                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4996         }
4997         kvm_x86_ops->skip_emulated_instruction(vcpu);
4998         trace_kvm_cpuid(function,
4999                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5000                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5001                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5002                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5003 }
5004 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5005
5006 /*
5007  * Check if userspace requested an interrupt window, and that the
5008  * interrupt window is open.
5009  *
5010  * No need to exit to userspace if we already have an interrupt queued.
5011  */
5012 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5013 {
5014         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5015                 vcpu->run->request_interrupt_window &&
5016                 kvm_arch_interrupt_allowed(vcpu));
5017 }
5018
5019 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5020 {
5021         struct kvm_run *kvm_run = vcpu->run;
5022
5023         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5024         kvm_run->cr8 = kvm_get_cr8(vcpu);
5025         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5026         if (irqchip_in_kernel(vcpu->kvm))
5027                 kvm_run->ready_for_interrupt_injection = 1;
5028         else
5029                 kvm_run->ready_for_interrupt_injection =
5030                         kvm_arch_interrupt_allowed(vcpu) &&
5031                         !kvm_cpu_has_interrupt(vcpu) &&
5032                         !kvm_event_needs_reinjection(vcpu);
5033 }
5034
5035 static void vapic_enter(struct kvm_vcpu *vcpu)
5036 {
5037         struct kvm_lapic *apic = vcpu->arch.apic;
5038         struct page *page;
5039
5040         if (!apic || !apic->vapic_addr)
5041                 return;
5042
5043         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5044
5045         vcpu->arch.apic->vapic_page = page;
5046 }
5047
5048 static void vapic_exit(struct kvm_vcpu *vcpu)
5049 {
5050         struct kvm_lapic *apic = vcpu->arch.apic;
5051         int idx;
5052
5053         if (!apic || !apic->vapic_addr)
5054                 return;
5055
5056         idx = srcu_read_lock(&vcpu->kvm->srcu);
5057         kvm_release_page_dirty(apic->vapic_page);
5058         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5059         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5060 }
5061
5062 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5063 {
5064         int max_irr, tpr;
5065
5066         if (!kvm_x86_ops->update_cr8_intercept)
5067                 return;
5068
5069         if (!vcpu->arch.apic)
5070                 return;
5071
5072         if (!vcpu->arch.apic->vapic_addr)
5073                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5074         else
5075                 max_irr = -1;
5076
5077         if (max_irr != -1)
5078                 max_irr >>= 4;
5079
5080         tpr = kvm_lapic_get_cr8(vcpu);
5081
5082         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5083 }
5084
5085 static void inject_pending_event(struct kvm_vcpu *vcpu)
5086 {
5087         /* try to reinject previous events if any */
5088         if (vcpu->arch.exception.pending) {
5089                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5090                                         vcpu->arch.exception.has_error_code,
5091                                         vcpu->arch.exception.error_code);
5092                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5093                                           vcpu->arch.exception.has_error_code,
5094                                           vcpu->arch.exception.error_code,
5095                                           vcpu->arch.exception.reinject);
5096                 return;
5097         }
5098
5099         if (vcpu->arch.nmi_injected) {
5100                 kvm_x86_ops->set_nmi(vcpu);
5101                 return;
5102         }
5103
5104         if (vcpu->arch.interrupt.pending) {
5105                 kvm_x86_ops->set_irq(vcpu);
5106                 return;
5107         }
5108
5109         /* try to inject new event if pending */
5110         if (vcpu->arch.nmi_pending) {
5111                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5112                         vcpu->arch.nmi_pending = false;
5113                         vcpu->arch.nmi_injected = true;
5114                         kvm_x86_ops->set_nmi(vcpu);
5115                 }
5116         } else if (kvm_cpu_has_interrupt(vcpu)) {
5117                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5118                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5119                                             false);
5120                         kvm_x86_ops->set_irq(vcpu);
5121                 }
5122         }
5123 }
5124
5125 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5126 {
5127         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5128                         !vcpu->guest_xcr0_loaded) {
5129                 /* kvm_set_xcr() also depends on this */
5130                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5131                 vcpu->guest_xcr0_loaded = 1;
5132         }
5133 }
5134
5135 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5136 {
5137         if (vcpu->guest_xcr0_loaded) {
5138                 if (vcpu->arch.xcr0 != host_xcr0)
5139                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5140                 vcpu->guest_xcr0_loaded = 0;
5141         }
5142 }
5143
5144 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5145 {
5146         int r;
5147         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5148                 vcpu->run->request_interrupt_window;
5149
5150         if (vcpu->requests) {
5151                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5152                         kvm_mmu_unload(vcpu);
5153                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5154                         __kvm_migrate_timers(vcpu);
5155                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5156                         r = kvm_guest_time_update(vcpu);
5157                         if (unlikely(r))
5158                                 goto out;
5159                 }
5160                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5161                         kvm_mmu_sync_roots(vcpu);
5162                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5163                         kvm_x86_ops->tlb_flush(vcpu);
5164                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5165                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5166                         r = 0;
5167                         goto out;
5168                 }
5169                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5170                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5171                         r = 0;
5172                         goto out;
5173                 }
5174                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5175                         vcpu->fpu_active = 0;
5176                         kvm_x86_ops->fpu_deactivate(vcpu);
5177                 }
5178                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5179                         /* Page is swapped out. Do synthetic halt */
5180                         vcpu->arch.apf.halted = true;
5181                         r = 1;
5182                         goto out;
5183                 }
5184                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5185                         vcpu->arch.nmi_pending = true;
5186         }
5187
5188         r = kvm_mmu_reload(vcpu);
5189         if (unlikely(r))
5190                 goto out;
5191
5192         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5193                 inject_pending_event(vcpu);
5194
5195                 /* enable NMI/IRQ window open exits if needed */
5196                 if (vcpu->arch.nmi_pending)
5197                         kvm_x86_ops->enable_nmi_window(vcpu);
5198                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5199                         kvm_x86_ops->enable_irq_window(vcpu);
5200
5201                 if (kvm_lapic_enabled(vcpu)) {
5202                         update_cr8_intercept(vcpu);
5203                         kvm_lapic_sync_to_vapic(vcpu);
5204                 }
5205         }
5206
5207         preempt_disable();
5208
5209         kvm_x86_ops->prepare_guest_switch(vcpu);
5210         if (vcpu->fpu_active)
5211                 kvm_load_guest_fpu(vcpu);
5212         kvm_load_guest_xcr0(vcpu);
5213
5214         vcpu->mode = IN_GUEST_MODE;
5215
5216         /* We should set ->mode before check ->requests,
5217          * see the comment in make_all_cpus_request.
5218          */
5219         smp_mb();
5220
5221         local_irq_disable();
5222
5223         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5224             || need_resched() || signal_pending(current)) {
5225                 vcpu->mode = OUTSIDE_GUEST_MODE;
5226                 smp_wmb();
5227                 local_irq_enable();
5228                 preempt_enable();
5229                 kvm_x86_ops->cancel_injection(vcpu);
5230                 r = 1;
5231                 goto out;
5232         }
5233
5234         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5235
5236         kvm_guest_enter();
5237
5238         if (unlikely(vcpu->arch.switch_db_regs)) {
5239                 set_debugreg(0, 7);
5240                 set_debugreg(vcpu->arch.eff_db[0], 0);
5241                 set_debugreg(vcpu->arch.eff_db[1], 1);
5242                 set_debugreg(vcpu->arch.eff_db[2], 2);
5243                 set_debugreg(vcpu->arch.eff_db[3], 3);
5244         }
5245
5246         trace_kvm_entry(vcpu->vcpu_id);
5247         kvm_x86_ops->run(vcpu);
5248
5249         /*
5250          * If the guest has used debug registers, at least dr7
5251          * will be disabled while returning to the host.
5252          * If we don't have active breakpoints in the host, we don't
5253          * care about the messed up debug address registers. But if
5254          * we have some of them active, restore the old state.
5255          */
5256         if (hw_breakpoint_active())
5257                 hw_breakpoint_restore();
5258
5259         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5260
5261         vcpu->mode = OUTSIDE_GUEST_MODE;
5262         smp_wmb();
5263         local_irq_enable();
5264
5265         ++vcpu->stat.exits;
5266
5267         /*
5268          * We must have an instruction between local_irq_enable() and
5269          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5270          * the interrupt shadow.  The stat.exits increment will do nicely.
5271          * But we need to prevent reordering, hence this barrier():
5272          */
5273         barrier();
5274
5275         kvm_guest_exit();
5276
5277         preempt_enable();
5278
5279         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5280
5281         /*
5282          * Profile KVM exit RIPs:
5283          */
5284         if (unlikely(prof_on == KVM_PROFILING)) {
5285                 unsigned long rip = kvm_rip_read(vcpu);
5286                 profile_hit(KVM_PROFILING, (void *)rip);
5287         }
5288
5289
5290         kvm_lapic_sync_from_vapic(vcpu);
5291
5292         r = kvm_x86_ops->handle_exit(vcpu);
5293 out:
5294         return r;
5295 }
5296
5297
5298 static int __vcpu_run(struct kvm_vcpu *vcpu)
5299 {
5300         int r;
5301         struct kvm *kvm = vcpu->kvm;
5302
5303         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5304                 pr_debug("vcpu %d received sipi with vector # %x\n",
5305                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5306                 kvm_lapic_reset(vcpu);
5307                 r = kvm_arch_vcpu_reset(vcpu);
5308                 if (r)
5309                         return r;
5310                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5311         }
5312
5313         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5314         vapic_enter(vcpu);
5315
5316         r = 1;
5317         while (r > 0) {
5318                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5319                     !vcpu->arch.apf.halted)
5320                         r = vcpu_enter_guest(vcpu);
5321                 else {
5322                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5323                         kvm_vcpu_block(vcpu);
5324                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5325                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5326                         {
5327                                 switch(vcpu->arch.mp_state) {
5328                                 case KVM_MP_STATE_HALTED:
5329                                         vcpu->arch.mp_state =
5330                                                 KVM_MP_STATE_RUNNABLE;
5331                                 case KVM_MP_STATE_RUNNABLE:
5332                                         vcpu->arch.apf.halted = false;
5333                                         break;
5334                                 case KVM_MP_STATE_SIPI_RECEIVED:
5335                                 default:
5336                                         r = -EINTR;
5337                                         break;
5338                                 }
5339                         }
5340                 }
5341
5342                 if (r <= 0)
5343                         break;
5344
5345                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5346                 if (kvm_cpu_has_pending_timer(vcpu))
5347                         kvm_inject_pending_timer_irqs(vcpu);
5348
5349                 if (dm_request_for_irq_injection(vcpu)) {
5350                         r = -EINTR;
5351                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5352                         ++vcpu->stat.request_irq_exits;
5353                 }
5354
5355                 kvm_check_async_pf_completion(vcpu);
5356
5357                 if (signal_pending(current)) {
5358                         r = -EINTR;
5359                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5360                         ++vcpu->stat.signal_exits;
5361                 }
5362                 if (need_resched()) {
5363                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5364                         kvm_resched(vcpu);
5365                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5366                 }
5367         }
5368
5369         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5370
5371         vapic_exit(vcpu);
5372
5373         return r;
5374 }
5375
5376 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5377 {
5378         int r;
5379         sigset_t sigsaved;
5380
5381         if (!tsk_used_math(current) && init_fpu(current))
5382                 return -ENOMEM;
5383
5384         if (vcpu->sigset_active)
5385                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5386
5387         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5388                 kvm_vcpu_block(vcpu);
5389                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5390                 r = -EAGAIN;
5391                 goto out;
5392         }
5393
5394         /* re-sync apic's tpr */
5395         if (!irqchip_in_kernel(vcpu->kvm)) {
5396                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5397                         r = -EINVAL;
5398                         goto out;
5399                 }
5400         }
5401
5402         if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5403                 if (vcpu->mmio_needed) {
5404                         memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5405                         vcpu->mmio_read_completed = 1;
5406                         vcpu->mmio_needed = 0;
5407                 }
5408                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5409                 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5410                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5411                 if (r != EMULATE_DONE) {
5412                         r = 0;
5413                         goto out;
5414                 }
5415         }
5416         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5417                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5418                                      kvm_run->hypercall.ret);
5419
5420         r = __vcpu_run(vcpu);
5421
5422 out:
5423         post_kvm_run_save(vcpu);
5424         if (vcpu->sigset_active)
5425                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5426
5427         return r;
5428 }
5429
5430 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5431 {
5432         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5433         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5434         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5435         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5436         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5437         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5438         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5439         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5440 #ifdef CONFIG_X86_64
5441         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5442         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5443         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5444         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5445         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5446         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5447         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5448         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5449 #endif
5450
5451         regs->rip = kvm_rip_read(vcpu);
5452         regs->rflags = kvm_get_rflags(vcpu);
5453
5454         return 0;
5455 }
5456
5457 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5458 {
5459         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5460         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5461         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5462         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5463         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5464         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5465         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5466         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5467 #ifdef CONFIG_X86_64
5468         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5469         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5470         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5471         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5472         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5473         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5474         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5475         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5476 #endif
5477
5478         kvm_rip_write(vcpu, regs->rip);
5479         kvm_set_rflags(vcpu, regs->rflags);
5480
5481         vcpu->arch.exception.pending = false;
5482
5483         kvm_make_request(KVM_REQ_EVENT, vcpu);
5484
5485         return 0;
5486 }
5487
5488 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5489 {
5490         struct kvm_segment cs;
5491
5492         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5493         *db = cs.db;
5494         *l = cs.l;
5495 }
5496 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5497
5498 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5499                                   struct kvm_sregs *sregs)
5500 {
5501         struct desc_ptr dt;
5502
5503         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5504         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5505         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5506         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5507         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5508         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5509
5510         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5511         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5512
5513         kvm_x86_ops->get_idt(vcpu, &dt);
5514         sregs->idt.limit = dt.size;
5515         sregs->idt.base = dt.address;
5516         kvm_x86_ops->get_gdt(vcpu, &dt);
5517         sregs->gdt.limit = dt.size;
5518         sregs->gdt.base = dt.address;
5519
5520         sregs->cr0 = kvm_read_cr0(vcpu);
5521         sregs->cr2 = vcpu->arch.cr2;
5522         sregs->cr3 = kvm_read_cr3(vcpu);
5523         sregs->cr4 = kvm_read_cr4(vcpu);
5524         sregs->cr8 = kvm_get_cr8(vcpu);
5525         sregs->efer = vcpu->arch.efer;
5526         sregs->apic_base = kvm_get_apic_base(vcpu);
5527
5528         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5529
5530         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5531                 set_bit(vcpu->arch.interrupt.nr,
5532                         (unsigned long *)sregs->interrupt_bitmap);
5533
5534         return 0;
5535 }
5536
5537 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5538                                     struct kvm_mp_state *mp_state)
5539 {
5540         mp_state->mp_state = vcpu->arch.mp_state;
5541         return 0;
5542 }
5543
5544 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5545                                     struct kvm_mp_state *mp_state)
5546 {
5547         vcpu->arch.mp_state = mp_state->mp_state;
5548         kvm_make_request(KVM_REQ_EVENT, vcpu);
5549         return 0;
5550 }
5551
5552 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5553                     bool has_error_code, u32 error_code)
5554 {
5555         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5556         int ret;
5557
5558         init_emulate_ctxt(vcpu);
5559
5560         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5561                                    tss_selector, reason, has_error_code,
5562                                    error_code);
5563
5564         if (ret)
5565                 return EMULATE_FAIL;
5566
5567         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5568         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5569         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5570         kvm_make_request(KVM_REQ_EVENT, vcpu);
5571         return EMULATE_DONE;
5572 }
5573 EXPORT_SYMBOL_GPL(kvm_task_switch);
5574
5575 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5576                                   struct kvm_sregs *sregs)
5577 {
5578         int mmu_reset_needed = 0;
5579         int pending_vec, max_bits, idx;
5580         struct desc_ptr dt;
5581
5582         dt.size = sregs->idt.limit;
5583         dt.address = sregs->idt.base;
5584         kvm_x86_ops->set_idt(vcpu, &dt);
5585         dt.size = sregs->gdt.limit;
5586         dt.address = sregs->gdt.base;
5587         kvm_x86_ops->set_gdt(vcpu, &dt);
5588
5589         vcpu->arch.cr2 = sregs->cr2;
5590         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5591         vcpu->arch.cr3 = sregs->cr3;
5592         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5593
5594         kvm_set_cr8(vcpu, sregs->cr8);
5595
5596         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5597         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5598         kvm_set_apic_base(vcpu, sregs->apic_base);
5599
5600         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5601         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5602         vcpu->arch.cr0 = sregs->cr0;
5603
5604         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5605         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5606         if (sregs->cr4 & X86_CR4_OSXSAVE)
5607                 update_cpuid(vcpu);
5608
5609         idx = srcu_read_lock(&vcpu->kvm->srcu);
5610         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5611                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5612                 mmu_reset_needed = 1;
5613         }
5614         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5615
5616         if (mmu_reset_needed)
5617                 kvm_mmu_reset_context(vcpu);
5618
5619         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5620         pending_vec = find_first_bit(
5621                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5622         if (pending_vec < max_bits) {
5623                 kvm_queue_interrupt(vcpu, pending_vec, false);
5624                 pr_debug("Set back pending irq %d\n", pending_vec);
5625         }
5626
5627         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5628         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5629         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5630         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5631         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5632         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5633
5634         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5635         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5636
5637         update_cr8_intercept(vcpu);
5638
5639         /* Older userspace won't unhalt the vcpu on reset. */
5640         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5641             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5642             !is_protmode(vcpu))
5643                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5644
5645         kvm_make_request(KVM_REQ_EVENT, vcpu);
5646
5647         return 0;
5648 }
5649
5650 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5651                                         struct kvm_guest_debug *dbg)
5652 {
5653         unsigned long rflags;
5654         int i, r;
5655
5656         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5657                 r = -EBUSY;
5658                 if (vcpu->arch.exception.pending)
5659                         goto out;
5660                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5661                         kvm_queue_exception(vcpu, DB_VECTOR);
5662                 else
5663                         kvm_queue_exception(vcpu, BP_VECTOR);
5664         }
5665
5666         /*
5667          * Read rflags as long as potentially injected trace flags are still
5668          * filtered out.
5669          */
5670         rflags = kvm_get_rflags(vcpu);
5671
5672         vcpu->guest_debug = dbg->control;
5673         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5674                 vcpu->guest_debug = 0;
5675
5676         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5677                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5678                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5679                 vcpu->arch.switch_db_regs =
5680                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5681         } else {
5682                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5683                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5684                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5685         }
5686
5687         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5688                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5689                         get_segment_base(vcpu, VCPU_SREG_CS);
5690
5691         /*
5692          * Trigger an rflags update that will inject or remove the trace
5693          * flags.
5694          */
5695         kvm_set_rflags(vcpu, rflags);
5696
5697         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5698
5699         r = 0;
5700
5701 out:
5702
5703         return r;
5704 }
5705
5706 /*
5707  * Translate a guest virtual address to a guest physical address.
5708  */
5709 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5710                                     struct kvm_translation *tr)
5711 {
5712         unsigned long vaddr = tr->linear_address;
5713         gpa_t gpa;
5714         int idx;
5715
5716         idx = srcu_read_lock(&vcpu->kvm->srcu);
5717         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5718         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5719         tr->physical_address = gpa;
5720         tr->valid = gpa != UNMAPPED_GVA;
5721         tr->writeable = 1;
5722         tr->usermode = 0;
5723
5724         return 0;
5725 }
5726
5727 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5728 {
5729         struct i387_fxsave_struct *fxsave =
5730                         &vcpu->arch.guest_fpu.state->fxsave;
5731
5732         memcpy(fpu->fpr, fxsave->st_space, 128);
5733         fpu->fcw = fxsave->cwd;
5734         fpu->fsw = fxsave->swd;
5735         fpu->ftwx = fxsave->twd;
5736         fpu->last_opcode = fxsave->fop;
5737         fpu->last_ip = fxsave->rip;
5738         fpu->last_dp = fxsave->rdp;
5739         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5740
5741         return 0;
5742 }
5743
5744 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5745 {
5746         struct i387_fxsave_struct *fxsave =
5747                         &vcpu->arch.guest_fpu.state->fxsave;
5748
5749         memcpy(fxsave->st_space, fpu->fpr, 128);
5750         fxsave->cwd = fpu->fcw;
5751         fxsave->swd = fpu->fsw;
5752         fxsave->twd = fpu->ftwx;
5753         fxsave->fop = fpu->last_opcode;
5754         fxsave->rip = fpu->last_ip;
5755         fxsave->rdp = fpu->last_dp;
5756         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5757
5758         return 0;
5759 }
5760
5761 int fx_init(struct kvm_vcpu *vcpu)
5762 {
5763         int err;
5764
5765         err = fpu_alloc(&vcpu->arch.guest_fpu);
5766         if (err)
5767                 return err;
5768
5769         fpu_finit(&vcpu->arch.guest_fpu);
5770
5771         /*
5772          * Ensure guest xcr0 is valid for loading
5773          */
5774         vcpu->arch.xcr0 = XSTATE_FP;
5775
5776         vcpu->arch.cr0 |= X86_CR0_ET;
5777
5778         return 0;
5779 }
5780 EXPORT_SYMBOL_GPL(fx_init);
5781
5782 static void fx_free(struct kvm_vcpu *vcpu)
5783 {
5784         fpu_free(&vcpu->arch.guest_fpu);
5785 }
5786
5787 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5788 {
5789         if (vcpu->guest_fpu_loaded)
5790                 return;
5791
5792         /*
5793          * Restore all possible states in the guest,
5794          * and assume host would use all available bits.
5795          * Guest xcr0 would be loaded later.
5796          */
5797         kvm_put_guest_xcr0(vcpu);
5798         vcpu->guest_fpu_loaded = 1;
5799         unlazy_fpu(current);
5800         fpu_restore_checking(&vcpu->arch.guest_fpu);
5801         trace_kvm_fpu(1);
5802 }
5803
5804 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5805 {
5806         kvm_put_guest_xcr0(vcpu);
5807
5808         if (!vcpu->guest_fpu_loaded)
5809                 return;
5810
5811         vcpu->guest_fpu_loaded = 0;
5812         fpu_save_init(&vcpu->arch.guest_fpu);
5813         ++vcpu->stat.fpu_reload;
5814         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5815         trace_kvm_fpu(0);
5816 }
5817
5818 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5819 {
5820         kvmclock_reset(vcpu);
5821
5822         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5823         fx_free(vcpu);
5824         kvm_x86_ops->vcpu_free(vcpu);
5825 }
5826
5827 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5828                                                 unsigned int id)
5829 {
5830         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5831                 printk_once(KERN_WARNING
5832                 "kvm: SMP vm created on host with unstable TSC; "
5833                 "guest TSC will not be reliable\n");
5834         return kvm_x86_ops->vcpu_create(kvm, id);
5835 }
5836
5837 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5838 {
5839         int r;
5840
5841         vcpu->arch.mtrr_state.have_fixed = 1;
5842         vcpu_load(vcpu);
5843         r = kvm_arch_vcpu_reset(vcpu);
5844         if (r == 0)
5845                 r = kvm_mmu_setup(vcpu);
5846         vcpu_put(vcpu);
5847         if (r < 0)
5848                 goto free_vcpu;
5849
5850         return 0;
5851 free_vcpu:
5852         kvm_x86_ops->vcpu_free(vcpu);
5853         return r;
5854 }
5855
5856 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5857 {
5858         vcpu->arch.apf.msr_val = 0;
5859
5860         vcpu_load(vcpu);
5861         kvm_mmu_unload(vcpu);
5862         vcpu_put(vcpu);
5863
5864         fx_free(vcpu);
5865         kvm_x86_ops->vcpu_free(vcpu);
5866 }
5867
5868 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5869 {
5870         vcpu->arch.nmi_pending = false;
5871         vcpu->arch.nmi_injected = false;
5872
5873         vcpu->arch.switch_db_regs = 0;
5874         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5875         vcpu->arch.dr6 = DR6_FIXED_1;
5876         vcpu->arch.dr7 = DR7_FIXED_1;
5877
5878         kvm_make_request(KVM_REQ_EVENT, vcpu);
5879         vcpu->arch.apf.msr_val = 0;
5880
5881         kvmclock_reset(vcpu);
5882
5883         kvm_clear_async_pf_completion_queue(vcpu);
5884         kvm_async_pf_hash_reset(vcpu);
5885         vcpu->arch.apf.halted = false;
5886
5887         return kvm_x86_ops->vcpu_reset(vcpu);
5888 }
5889
5890 int kvm_arch_hardware_enable(void *garbage)
5891 {
5892         struct kvm *kvm;
5893         struct kvm_vcpu *vcpu;
5894         int i;
5895
5896         kvm_shared_msr_cpu_online();
5897         list_for_each_entry(kvm, &vm_list, vm_list)
5898                 kvm_for_each_vcpu(i, vcpu, kvm)
5899                         if (vcpu->cpu == smp_processor_id())
5900                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5901         return kvm_x86_ops->hardware_enable(garbage);
5902 }
5903
5904 void kvm_arch_hardware_disable(void *garbage)
5905 {
5906         kvm_x86_ops->hardware_disable(garbage);
5907         drop_user_return_notifiers(garbage);
5908 }
5909
5910 int kvm_arch_hardware_setup(void)
5911 {
5912         return kvm_x86_ops->hardware_setup();
5913 }
5914
5915 void kvm_arch_hardware_unsetup(void)
5916 {
5917         kvm_x86_ops->hardware_unsetup();
5918 }
5919
5920 void kvm_arch_check_processor_compat(void *rtn)
5921 {
5922         kvm_x86_ops->check_processor_compatibility(rtn);
5923 }
5924
5925 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5926 {
5927         struct page *page;
5928         struct kvm *kvm;
5929         int r;
5930
5931         BUG_ON(vcpu->kvm == NULL);
5932         kvm = vcpu->kvm;
5933
5934         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5935         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5936         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5937         vcpu->arch.mmu.translate_gpa = translate_gpa;
5938         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5939         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5940                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5941         else
5942                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5943
5944         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5945         if (!page) {
5946                 r = -ENOMEM;
5947                 goto fail;
5948         }
5949         vcpu->arch.pio_data = page_address(page);
5950
5951         if (!kvm->arch.virtual_tsc_khz)
5952                 kvm_arch_set_tsc_khz(kvm, max_tsc_khz);
5953
5954         r = kvm_mmu_create(vcpu);
5955         if (r < 0)
5956                 goto fail_free_pio_data;
5957
5958         if (irqchip_in_kernel(kvm)) {
5959                 r = kvm_create_lapic(vcpu);
5960                 if (r < 0)
5961                         goto fail_mmu_destroy;
5962         }
5963
5964         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5965                                        GFP_KERNEL);
5966         if (!vcpu->arch.mce_banks) {
5967                 r = -ENOMEM;
5968                 goto fail_free_lapic;
5969         }
5970         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5971
5972         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5973                 goto fail_free_mce_banks;
5974
5975         kvm_async_pf_hash_reset(vcpu);
5976
5977         return 0;
5978 fail_free_mce_banks:
5979         kfree(vcpu->arch.mce_banks);
5980 fail_free_lapic:
5981         kvm_free_lapic(vcpu);
5982 fail_mmu_destroy:
5983         kvm_mmu_destroy(vcpu);
5984 fail_free_pio_data:
5985         free_page((unsigned long)vcpu->arch.pio_data);
5986 fail:
5987         return r;
5988 }
5989
5990 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5991 {
5992         int idx;
5993
5994         kfree(vcpu->arch.mce_banks);
5995         kvm_free_lapic(vcpu);
5996         idx = srcu_read_lock(&vcpu->kvm->srcu);
5997         kvm_mmu_destroy(vcpu);
5998         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5999         free_page((unsigned long)vcpu->arch.pio_data);
6000 }
6001
6002 int kvm_arch_init_vm(struct kvm *kvm)
6003 {
6004         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6005         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6006
6007         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6008         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6009
6010         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6011
6012         return 0;
6013 }
6014
6015 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6016 {
6017         vcpu_load(vcpu);
6018         kvm_mmu_unload(vcpu);
6019         vcpu_put(vcpu);
6020 }
6021
6022 static void kvm_free_vcpus(struct kvm *kvm)
6023 {
6024         unsigned int i;
6025         struct kvm_vcpu *vcpu;
6026
6027         /*
6028          * Unpin any mmu pages first.
6029          */
6030         kvm_for_each_vcpu(i, vcpu, kvm) {
6031                 kvm_clear_async_pf_completion_queue(vcpu);
6032                 kvm_unload_vcpu_mmu(vcpu);
6033         }
6034         kvm_for_each_vcpu(i, vcpu, kvm)
6035                 kvm_arch_vcpu_free(vcpu);
6036
6037         mutex_lock(&kvm->lock);
6038         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6039                 kvm->vcpus[i] = NULL;
6040
6041         atomic_set(&kvm->online_vcpus, 0);
6042         mutex_unlock(&kvm->lock);
6043 }
6044
6045 void kvm_arch_sync_events(struct kvm *kvm)
6046 {
6047         kvm_free_all_assigned_devices(kvm);
6048         kvm_free_pit(kvm);
6049 }
6050
6051 void kvm_arch_destroy_vm(struct kvm *kvm)
6052 {
6053         kvm_iommu_unmap_guest(kvm);
6054         kfree(kvm->arch.vpic);
6055         kfree(kvm->arch.vioapic);
6056         kvm_free_vcpus(kvm);
6057         if (kvm->arch.apic_access_page)
6058                 put_page(kvm->arch.apic_access_page);
6059         if (kvm->arch.ept_identity_pagetable)
6060                 put_page(kvm->arch.ept_identity_pagetable);
6061 }
6062
6063 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6064                                 struct kvm_memory_slot *memslot,
6065                                 struct kvm_memory_slot old,
6066                                 struct kvm_userspace_memory_region *mem,
6067                                 int user_alloc)
6068 {
6069         int npages = memslot->npages;
6070         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6071
6072         /* Prevent internal slot pages from being moved by fork()/COW. */
6073         if (memslot->id >= KVM_MEMORY_SLOTS)
6074                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6075
6076         /*To keep backward compatibility with older userspace,
6077          *x86 needs to hanlde !user_alloc case.
6078          */
6079         if (!user_alloc) {
6080                 if (npages && !old.rmap) {
6081                         unsigned long userspace_addr;
6082
6083                         down_write(&current->mm->mmap_sem);
6084                         userspace_addr = do_mmap(NULL, 0,
6085                                                  npages * PAGE_SIZE,
6086                                                  PROT_READ | PROT_WRITE,
6087                                                  map_flags,
6088                                                  0);
6089                         up_write(&current->mm->mmap_sem);
6090
6091                         if (IS_ERR((void *)userspace_addr))
6092                                 return PTR_ERR((void *)userspace_addr);
6093
6094                         memslot->userspace_addr = userspace_addr;
6095                 }
6096         }
6097
6098
6099         return 0;
6100 }
6101
6102 void kvm_arch_commit_memory_region(struct kvm *kvm,
6103                                 struct kvm_userspace_memory_region *mem,
6104                                 struct kvm_memory_slot old,
6105                                 int user_alloc)
6106 {
6107
6108         int npages = mem->memory_size >> PAGE_SHIFT;
6109
6110         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6111                 int ret;
6112
6113                 down_write(&current->mm->mmap_sem);
6114                 ret = do_munmap(current->mm, old.userspace_addr,
6115                                 old.npages * PAGE_SIZE);
6116                 up_write(&current->mm->mmap_sem);
6117                 if (ret < 0)
6118                         printk(KERN_WARNING
6119                                "kvm_vm_ioctl_set_memory_region: "
6120                                "failed to munmap memory\n");
6121         }
6122
6123         spin_lock(&kvm->mmu_lock);
6124         if (!kvm->arch.n_requested_mmu_pages) {
6125                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6126                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6127         }
6128
6129         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6130         spin_unlock(&kvm->mmu_lock);
6131 }
6132
6133 void kvm_arch_flush_shadow(struct kvm *kvm)
6134 {
6135         kvm_mmu_zap_all(kvm);
6136         kvm_reload_remote_mmus(kvm);
6137 }
6138
6139 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6140 {
6141         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6142                 !vcpu->arch.apf.halted)
6143                 || !list_empty_careful(&vcpu->async_pf.done)
6144                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6145                 || vcpu->arch.nmi_pending ||
6146                 (kvm_arch_interrupt_allowed(vcpu) &&
6147                  kvm_cpu_has_interrupt(vcpu));
6148 }
6149
6150 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6151 {
6152         int me;
6153         int cpu = vcpu->cpu;
6154
6155         if (waitqueue_active(&vcpu->wq)) {
6156                 wake_up_interruptible(&vcpu->wq);
6157                 ++vcpu->stat.halt_wakeup;
6158         }
6159
6160         me = get_cpu();
6161         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6162                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6163                         smp_send_reschedule(cpu);
6164         put_cpu();
6165 }
6166
6167 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6168 {
6169         return kvm_x86_ops->interrupt_allowed(vcpu);
6170 }
6171
6172 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6173 {
6174         unsigned long current_rip = kvm_rip_read(vcpu) +
6175                 get_segment_base(vcpu, VCPU_SREG_CS);
6176
6177         return current_rip == linear_rip;
6178 }
6179 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6180
6181 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6182 {
6183         unsigned long rflags;
6184
6185         rflags = kvm_x86_ops->get_rflags(vcpu);
6186         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6187                 rflags &= ~X86_EFLAGS_TF;
6188         return rflags;
6189 }
6190 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6191
6192 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6193 {
6194         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6195             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6196                 rflags |= X86_EFLAGS_TF;
6197         kvm_x86_ops->set_rflags(vcpu, rflags);
6198         kvm_make_request(KVM_REQ_EVENT, vcpu);
6199 }
6200 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6201
6202 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6203 {
6204         int r;
6205
6206         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6207               is_error_page(work->page))
6208                 return;
6209
6210         r = kvm_mmu_reload(vcpu);
6211         if (unlikely(r))
6212                 return;
6213
6214         if (!vcpu->arch.mmu.direct_map &&
6215               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6216                 return;
6217
6218         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6219 }
6220
6221 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6222 {
6223         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6224 }
6225
6226 static inline u32 kvm_async_pf_next_probe(u32 key)
6227 {
6228         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6229 }
6230
6231 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6232 {
6233         u32 key = kvm_async_pf_hash_fn(gfn);
6234
6235         while (vcpu->arch.apf.gfns[key] != ~0)
6236                 key = kvm_async_pf_next_probe(key);
6237
6238         vcpu->arch.apf.gfns[key] = gfn;
6239 }
6240
6241 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6242 {
6243         int i;
6244         u32 key = kvm_async_pf_hash_fn(gfn);
6245
6246         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6247                      (vcpu->arch.apf.gfns[key] != gfn &&
6248                       vcpu->arch.apf.gfns[key] != ~0); i++)
6249                 key = kvm_async_pf_next_probe(key);
6250
6251         return key;
6252 }
6253
6254 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6255 {
6256         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6257 }
6258
6259 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6260 {
6261         u32 i, j, k;
6262
6263         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6264         while (true) {
6265                 vcpu->arch.apf.gfns[i] = ~0;
6266                 do {
6267                         j = kvm_async_pf_next_probe(j);
6268                         if (vcpu->arch.apf.gfns[j] == ~0)
6269                                 return;
6270                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6271                         /*
6272                          * k lies cyclically in ]i,j]
6273                          * |    i.k.j |
6274                          * |....j i.k.| or  |.k..j i...|
6275                          */
6276                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6277                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6278                 i = j;
6279         }
6280 }
6281
6282 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6283 {
6284
6285         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6286                                       sizeof(val));
6287 }
6288
6289 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6290                                      struct kvm_async_pf *work)
6291 {
6292         struct x86_exception fault;
6293
6294         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6295         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6296
6297         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6298             (vcpu->arch.apf.send_user_only &&
6299              kvm_x86_ops->get_cpl(vcpu) == 0))
6300                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6301         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6302                 fault.vector = PF_VECTOR;
6303                 fault.error_code_valid = true;
6304                 fault.error_code = 0;
6305                 fault.nested_page_fault = false;
6306                 fault.address = work->arch.token;
6307                 kvm_inject_page_fault(vcpu, &fault);
6308         }
6309 }
6310
6311 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6312                                  struct kvm_async_pf *work)
6313 {
6314         struct x86_exception fault;
6315
6316         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6317         if (is_error_page(work->page))
6318                 work->arch.token = ~0; /* broadcast wakeup */
6319         else
6320                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6321
6322         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6323             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6324                 fault.vector = PF_VECTOR;
6325                 fault.error_code_valid = true;
6326                 fault.error_code = 0;
6327                 fault.nested_page_fault = false;
6328                 fault.address = work->arch.token;
6329                 kvm_inject_page_fault(vcpu, &fault);
6330         }
6331         vcpu->arch.apf.halted = false;
6332 }
6333
6334 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6335 {
6336         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6337                 return true;
6338         else
6339                 return !kvm_event_needs_reinjection(vcpu) &&
6340                         kvm_x86_ops->interrupt_allowed(vcpu);
6341 }
6342
6343 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6344 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6345 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6346 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6347 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6348 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6349 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6350 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6351 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6352 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6353 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6354 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);