2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
49 #define CREATE_TRACE_POINTS
52 #include <asm/debugreg.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
62 #define MAX_IO_MSRS 256
63 #define CR0_RESERVED_BITS \
64 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
65 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
66 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
67 #define CR4_RESERVED_BITS \
68 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
69 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
70 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
72 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
76 #define KVM_MAX_MCE_BANKS 32
77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
80 * - enable syscall per default because its emulated by KVM
81 * - enable LME and LMA per default on 64 bit KVM
84 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
86 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
93 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
94 struct kvm_cpuid_entry2 __user *entries);
96 struct kvm_x86_ops *kvm_x86_ops;
97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
100 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
102 #define KVM_NR_SHARED_MSRS 16
104 struct kvm_shared_msrs_global {
106 u32 msrs[KVM_NR_SHARED_MSRS];
109 struct kvm_shared_msrs {
110 struct user_return_notifier urn;
112 struct kvm_shared_msr_values {
115 } values[KVM_NR_SHARED_MSRS];
118 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
119 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
121 struct kvm_stats_debugfs_item debugfs_entries[] = {
122 { "pf_fixed", VCPU_STAT(pf_fixed) },
123 { "pf_guest", VCPU_STAT(pf_guest) },
124 { "tlb_flush", VCPU_STAT(tlb_flush) },
125 { "invlpg", VCPU_STAT(invlpg) },
126 { "exits", VCPU_STAT(exits) },
127 { "io_exits", VCPU_STAT(io_exits) },
128 { "mmio_exits", VCPU_STAT(mmio_exits) },
129 { "signal_exits", VCPU_STAT(signal_exits) },
130 { "irq_window", VCPU_STAT(irq_window_exits) },
131 { "nmi_window", VCPU_STAT(nmi_window_exits) },
132 { "halt_exits", VCPU_STAT(halt_exits) },
133 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
134 { "hypercalls", VCPU_STAT(hypercalls) },
135 { "request_irq", VCPU_STAT(request_irq_exits) },
136 { "irq_exits", VCPU_STAT(irq_exits) },
137 { "host_state_reload", VCPU_STAT(host_state_reload) },
138 { "efer_reload", VCPU_STAT(efer_reload) },
139 { "fpu_reload", VCPU_STAT(fpu_reload) },
140 { "insn_emulation", VCPU_STAT(insn_emulation) },
141 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
142 { "irq_injections", VCPU_STAT(irq_injections) },
143 { "nmi_injections", VCPU_STAT(nmi_injections) },
144 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
145 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
146 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
147 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
148 { "mmu_flooded", VM_STAT(mmu_flooded) },
149 { "mmu_recycled", VM_STAT(mmu_recycled) },
150 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
151 { "mmu_unsync", VM_STAT(mmu_unsync) },
152 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
153 { "largepages", VM_STAT(lpages) },
157 u64 __read_mostly host_xcr0;
159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
162 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
163 vcpu->arch.apf.gfns[i] = ~0;
166 static void kvm_on_user_return(struct user_return_notifier *urn)
169 struct kvm_shared_msrs *locals
170 = container_of(urn, struct kvm_shared_msrs, urn);
171 struct kvm_shared_msr_values *values;
173 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
174 values = &locals->values[slot];
175 if (values->host != values->curr) {
176 wrmsrl(shared_msrs_global.msrs[slot], values->host);
177 values->curr = values->host;
180 locals->registered = false;
181 user_return_notifier_unregister(urn);
184 static void shared_msr_update(unsigned slot, u32 msr)
186 struct kvm_shared_msrs *smsr;
189 smsr = &__get_cpu_var(shared_msrs);
190 /* only read, and nobody should modify it at this time,
191 * so don't need lock */
192 if (slot >= shared_msrs_global.nr) {
193 printk(KERN_ERR "kvm: invalid MSR slot!");
196 rdmsrl_safe(msr, &value);
197 smsr->values[slot].host = value;
198 smsr->values[slot].curr = value;
201 void kvm_define_shared_msr(unsigned slot, u32 msr)
203 if (slot >= shared_msrs_global.nr)
204 shared_msrs_global.nr = slot + 1;
205 shared_msrs_global.msrs[slot] = msr;
206 /* we need ensured the shared_msr_global have been updated */
209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
211 static void kvm_shared_msr_cpu_online(void)
215 for (i = 0; i < shared_msrs_global.nr; ++i)
216 shared_msr_update(i, shared_msrs_global.msrs[i]);
219 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
221 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
223 if (((value ^ smsr->values[slot].curr) & mask) == 0)
225 smsr->values[slot].curr = value;
226 wrmsrl(shared_msrs_global.msrs[slot], value);
227 if (!smsr->registered) {
228 smsr->urn.on_user_return = kvm_on_user_return;
229 user_return_notifier_register(&smsr->urn);
230 smsr->registered = true;
233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
235 static void drop_user_return_notifiers(void *ignore)
237 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
239 if (smsr->registered)
240 kvm_on_user_return(&smsr->urn);
243 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
245 if (irqchip_in_kernel(vcpu->kvm))
246 return vcpu->arch.apic_base;
248 return vcpu->arch.apic_base;
250 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
252 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
254 /* TODO: reserve bits check */
255 if (irqchip_in_kernel(vcpu->kvm))
256 kvm_lapic_set_base(vcpu, data);
258 vcpu->arch.apic_base = data;
260 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
262 #define EXCPT_BENIGN 0
263 #define EXCPT_CONTRIBUTORY 1
266 static int exception_class(int vector)
276 return EXCPT_CONTRIBUTORY;
283 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
284 unsigned nr, bool has_error, u32 error_code,
290 kvm_make_request(KVM_REQ_EVENT, vcpu);
292 if (!vcpu->arch.exception.pending) {
294 vcpu->arch.exception.pending = true;
295 vcpu->arch.exception.has_error_code = has_error;
296 vcpu->arch.exception.nr = nr;
297 vcpu->arch.exception.error_code = error_code;
298 vcpu->arch.exception.reinject = reinject;
302 /* to check exception */
303 prev_nr = vcpu->arch.exception.nr;
304 if (prev_nr == DF_VECTOR) {
305 /* triple fault -> shutdown */
306 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
309 class1 = exception_class(prev_nr);
310 class2 = exception_class(nr);
311 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
312 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
313 /* generate double fault per SDM Table 5-5 */
314 vcpu->arch.exception.pending = true;
315 vcpu->arch.exception.has_error_code = true;
316 vcpu->arch.exception.nr = DF_VECTOR;
317 vcpu->arch.exception.error_code = 0;
319 /* replace previous exception with a new one in a hope
320 that instruction re-execution will regenerate lost
325 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
327 kvm_multiple_exception(vcpu, nr, false, 0, false);
329 EXPORT_SYMBOL_GPL(kvm_queue_exception);
331 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
333 kvm_multiple_exception(vcpu, nr, false, 0, true);
335 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
337 void kvm_inject_page_fault(struct kvm_vcpu *vcpu)
339 unsigned error_code = vcpu->arch.fault.error_code;
341 ++vcpu->stat.pf_guest;
342 vcpu->arch.cr2 = vcpu->arch.fault.address;
343 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
346 void kvm_propagate_fault(struct kvm_vcpu *vcpu)
348 if (mmu_is_nested(vcpu) && !vcpu->arch.fault.nested)
349 vcpu->arch.nested_mmu.inject_page_fault(vcpu);
351 vcpu->arch.mmu.inject_page_fault(vcpu);
353 vcpu->arch.fault.nested = false;
356 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
358 kvm_make_request(KVM_REQ_EVENT, vcpu);
359 vcpu->arch.nmi_pending = 1;
361 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
363 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
365 kvm_multiple_exception(vcpu, nr, true, error_code, false);
367 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
369 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
371 kvm_multiple_exception(vcpu, nr, true, error_code, true);
373 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
376 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
377 * a #GP and return false.
379 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
381 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
383 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
386 EXPORT_SYMBOL_GPL(kvm_require_cpl);
389 * This function will be used to read from the physical memory of the currently
390 * running guest. The difference to kvm_read_guest_page is that this function
391 * can read from guest physical or from the guest's guest physical memory.
393 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
394 gfn_t ngfn, void *data, int offset, int len,
400 ngpa = gfn_to_gpa(ngfn);
401 real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
402 if (real_gfn == UNMAPPED_GVA)
405 real_gfn = gpa_to_gfn(real_gfn);
407 return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
409 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
411 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
412 void *data, int offset, int len, u32 access)
414 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
415 data, offset, len, access);
419 * Load the pae pdptrs. Return true is they are all valid.
421 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
423 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
424 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
427 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
429 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
430 offset * sizeof(u64), sizeof(pdpte),
431 PFERR_USER_MASK|PFERR_WRITE_MASK);
436 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
437 if (is_present_gpte(pdpte[i]) &&
438 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
445 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
446 __set_bit(VCPU_EXREG_PDPTR,
447 (unsigned long *)&vcpu->arch.regs_avail);
448 __set_bit(VCPU_EXREG_PDPTR,
449 (unsigned long *)&vcpu->arch.regs_dirty);
454 EXPORT_SYMBOL_GPL(load_pdptrs);
456 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
458 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
464 if (is_long_mode(vcpu) || !is_pae(vcpu))
467 if (!test_bit(VCPU_EXREG_PDPTR,
468 (unsigned long *)&vcpu->arch.regs_avail))
471 gfn = (vcpu->arch.cr3 & ~31u) >> PAGE_SHIFT;
472 offset = (vcpu->arch.cr3 & ~31u) & (PAGE_SIZE - 1);
473 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
474 PFERR_USER_MASK | PFERR_WRITE_MASK);
477 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
483 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
485 unsigned long old_cr0 = kvm_read_cr0(vcpu);
486 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
487 X86_CR0_CD | X86_CR0_NW;
492 if (cr0 & 0xffffffff00000000UL)
496 cr0 &= ~CR0_RESERVED_BITS;
498 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
501 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
504 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
506 if ((vcpu->arch.efer & EFER_LME)) {
511 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
516 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
521 kvm_x86_ops->set_cr0(vcpu, cr0);
523 if ((cr0 ^ old_cr0) & update_bits)
524 kvm_mmu_reset_context(vcpu);
527 EXPORT_SYMBOL_GPL(kvm_set_cr0);
529 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
531 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
533 EXPORT_SYMBOL_GPL(kvm_lmsw);
535 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
539 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
540 if (index != XCR_XFEATURE_ENABLED_MASK)
543 if (kvm_x86_ops->get_cpl(vcpu) != 0)
545 if (!(xcr0 & XSTATE_FP))
547 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
549 if (xcr0 & ~host_xcr0)
551 vcpu->arch.xcr0 = xcr0;
552 vcpu->guest_xcr0_loaded = 0;
556 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
558 if (__kvm_set_xcr(vcpu, index, xcr)) {
559 kvm_inject_gp(vcpu, 0);
564 EXPORT_SYMBOL_GPL(kvm_set_xcr);
566 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
568 struct kvm_cpuid_entry2 *best;
570 best = kvm_find_cpuid_entry(vcpu, 1, 0);
571 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
574 static void update_cpuid(struct kvm_vcpu *vcpu)
576 struct kvm_cpuid_entry2 *best;
578 best = kvm_find_cpuid_entry(vcpu, 1, 0);
582 /* Update OSXSAVE bit */
583 if (cpu_has_xsave && best->function == 0x1) {
584 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
585 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
586 best->ecx |= bit(X86_FEATURE_OSXSAVE);
590 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
592 unsigned long old_cr4 = kvm_read_cr4(vcpu);
593 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
595 if (cr4 & CR4_RESERVED_BITS)
598 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
601 if (is_long_mode(vcpu)) {
602 if (!(cr4 & X86_CR4_PAE))
604 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
605 && ((cr4 ^ old_cr4) & pdptr_bits)
606 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3))
609 if (cr4 & X86_CR4_VMXE)
612 kvm_x86_ops->set_cr4(vcpu, cr4);
614 if ((cr4 ^ old_cr4) & pdptr_bits)
615 kvm_mmu_reset_context(vcpu);
617 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
622 EXPORT_SYMBOL_GPL(kvm_set_cr4);
624 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
626 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
627 kvm_mmu_sync_roots(vcpu);
628 kvm_mmu_flush_tlb(vcpu);
632 if (is_long_mode(vcpu)) {
633 if (cr3 & CR3_L_MODE_RESERVED_BITS)
637 if (cr3 & CR3_PAE_RESERVED_BITS)
639 if (is_paging(vcpu) &&
640 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
644 * We don't check reserved bits in nonpae mode, because
645 * this isn't enforced, and VMware depends on this.
650 * Does the new cr3 value map to physical memory? (Note, we
651 * catch an invalid cr3 even in real-mode, because it would
652 * cause trouble later on when we turn on paging anyway.)
654 * A real CPU would silently accept an invalid cr3 and would
655 * attempt to use it - with largely undefined (and often hard
656 * to debug) behavior on the guest side.
658 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
660 vcpu->arch.cr3 = cr3;
661 vcpu->arch.mmu.new_cr3(vcpu);
664 EXPORT_SYMBOL_GPL(kvm_set_cr3);
666 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
668 if (cr8 & CR8_RESERVED_BITS)
670 if (irqchip_in_kernel(vcpu->kvm))
671 kvm_lapic_set_tpr(vcpu, cr8);
673 vcpu->arch.cr8 = cr8;
677 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
679 if (__kvm_set_cr8(vcpu, cr8))
680 kvm_inject_gp(vcpu, 0);
682 EXPORT_SYMBOL_GPL(kvm_set_cr8);
684 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
686 if (irqchip_in_kernel(vcpu->kvm))
687 return kvm_lapic_get_cr8(vcpu);
689 return vcpu->arch.cr8;
691 EXPORT_SYMBOL_GPL(kvm_get_cr8);
693 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
697 vcpu->arch.db[dr] = val;
698 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
699 vcpu->arch.eff_db[dr] = val;
702 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
706 if (val & 0xffffffff00000000ULL)
708 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
711 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
715 if (val & 0xffffffff00000000ULL)
717 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
718 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
719 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
720 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
728 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
732 res = __kvm_set_dr(vcpu, dr, val);
734 kvm_queue_exception(vcpu, UD_VECTOR);
736 kvm_inject_gp(vcpu, 0);
740 EXPORT_SYMBOL_GPL(kvm_set_dr);
742 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
746 *val = vcpu->arch.db[dr];
749 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
753 *val = vcpu->arch.dr6;
756 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
760 *val = vcpu->arch.dr7;
767 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
769 if (_kvm_get_dr(vcpu, dr, val)) {
770 kvm_queue_exception(vcpu, UD_VECTOR);
775 EXPORT_SYMBOL_GPL(kvm_get_dr);
778 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
779 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
781 * This list is modified at module load time to reflect the
782 * capabilities of the host cpu. This capabilities test skips MSRs that are
783 * kvm-specific. Those are put in the beginning of the list.
786 #define KVM_SAVE_MSRS_BEGIN 8
787 static u32 msrs_to_save[] = {
788 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
789 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
790 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
791 HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
792 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
795 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
797 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
800 static unsigned num_msrs_to_save;
802 static u32 emulated_msrs[] = {
803 MSR_IA32_MISC_ENABLE,
808 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
810 u64 old_efer = vcpu->arch.efer;
812 if (efer & efer_reserved_bits)
816 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
819 if (efer & EFER_FFXSR) {
820 struct kvm_cpuid_entry2 *feat;
822 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
823 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
827 if (efer & EFER_SVME) {
828 struct kvm_cpuid_entry2 *feat;
830 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
831 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
836 efer |= vcpu->arch.efer & EFER_LMA;
838 kvm_x86_ops->set_efer(vcpu, efer);
840 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
842 /* Update reserved bits */
843 if ((efer ^ old_efer) & EFER_NX)
844 kvm_mmu_reset_context(vcpu);
849 void kvm_enable_efer_bits(u64 mask)
851 efer_reserved_bits &= ~mask;
853 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
857 * Writes msr value into into the appropriate "register".
858 * Returns 0 on success, non-0 otherwise.
859 * Assumes vcpu_load() was already called.
861 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
863 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
867 * Adapt set_msr() to msr_io()'s calling convention
869 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
871 return kvm_set_msr(vcpu, index, *data);
874 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
878 struct pvclock_wall_clock wc;
879 struct timespec boot;
884 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
889 ++version; /* first time write, random junk */
893 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
896 * The guest calculates current wall clock time by adding
897 * system time (updated by kvm_guest_time_update below) to the
898 * wall clock specified here. guest system time equals host
899 * system time for us, thus we must fill in host boot time here.
903 wc.sec = boot.tv_sec;
904 wc.nsec = boot.tv_nsec;
905 wc.version = version;
907 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
910 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
913 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
915 uint32_t quotient, remainder;
917 /* Don't try to replace with do_div(), this one calculates
918 * "(dividend << 32) / divisor" */
920 : "=a" (quotient), "=d" (remainder)
921 : "0" (0), "1" (dividend), "r" (divisor) );
925 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
926 s8 *pshift, u32 *pmultiplier)
933 tps64 = base_khz * 1000LL;
934 scaled64 = scaled_khz * 1000LL;
935 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
940 tps32 = (uint32_t)tps64;
941 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
942 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
950 *pmultiplier = div_frac(scaled64, tps32);
952 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
953 __func__, base_khz, scaled_khz, shift, *pmultiplier);
956 static inline u64 get_kernel_ns(void)
960 WARN_ON(preemptible());
962 monotonic_to_bootbased(&ts);
963 return timespec_to_ns(&ts);
966 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
967 unsigned long max_tsc_khz;
969 static inline int kvm_tsc_changes_freq(void)
972 int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
973 cpufreq_quick_get(cpu) != 0;
978 static inline u64 nsec_to_cycles(u64 nsec)
982 WARN_ON(preemptible());
983 if (kvm_tsc_changes_freq())
984 printk_once(KERN_WARNING
985 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
986 ret = nsec * __get_cpu_var(cpu_tsc_khz);
987 do_div(ret, USEC_PER_SEC);
991 static void kvm_arch_set_tsc_khz(struct kvm *kvm, u32 this_tsc_khz)
993 /* Compute a scale to convert nanoseconds in TSC cycles */
994 kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
995 &kvm->arch.virtual_tsc_shift,
996 &kvm->arch.virtual_tsc_mult);
997 kvm->arch.virtual_tsc_khz = this_tsc_khz;
1000 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1002 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1003 vcpu->kvm->arch.virtual_tsc_mult,
1004 vcpu->kvm->arch.virtual_tsc_shift);
1005 tsc += vcpu->arch.last_tsc_write;
1009 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1011 struct kvm *kvm = vcpu->kvm;
1012 u64 offset, ns, elapsed;
1013 unsigned long flags;
1016 spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1017 offset = data - native_read_tsc();
1018 ns = get_kernel_ns();
1019 elapsed = ns - kvm->arch.last_tsc_nsec;
1020 sdiff = data - kvm->arch.last_tsc_write;
1025 * Special case: close write to TSC within 5 seconds of
1026 * another CPU is interpreted as an attempt to synchronize
1027 * The 5 seconds is to accomodate host load / swapping as
1028 * well as any reset of TSC during the boot process.
1030 * In that case, for a reliable TSC, we can match TSC offsets,
1031 * or make a best guest using elapsed value.
1033 if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1034 elapsed < 5ULL * NSEC_PER_SEC) {
1035 if (!check_tsc_unstable()) {
1036 offset = kvm->arch.last_tsc_offset;
1037 pr_debug("kvm: matched tsc offset for %llu\n", data);
1039 u64 delta = nsec_to_cycles(elapsed);
1041 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1043 ns = kvm->arch.last_tsc_nsec;
1045 kvm->arch.last_tsc_nsec = ns;
1046 kvm->arch.last_tsc_write = data;
1047 kvm->arch.last_tsc_offset = offset;
1048 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1049 spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1051 /* Reset of TSC must disable overshoot protection below */
1052 vcpu->arch.hv_clock.tsc_timestamp = 0;
1053 vcpu->arch.last_tsc_write = data;
1054 vcpu->arch.last_tsc_nsec = ns;
1056 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1058 static int kvm_guest_time_update(struct kvm_vcpu *v)
1060 unsigned long flags;
1061 struct kvm_vcpu_arch *vcpu = &v->arch;
1063 unsigned long this_tsc_khz;
1064 s64 kernel_ns, max_kernel_ns;
1067 /* Keep irq disabled to prevent changes to the clock */
1068 local_irq_save(flags);
1069 kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1070 kernel_ns = get_kernel_ns();
1071 this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1073 if (unlikely(this_tsc_khz == 0)) {
1074 local_irq_restore(flags);
1075 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1080 * We may have to catch up the TSC to match elapsed wall clock
1081 * time for two reasons, even if kvmclock is used.
1082 * 1) CPU could have been running below the maximum TSC rate
1083 * 2) Broken TSC compensation resets the base at each VCPU
1084 * entry to avoid unknown leaps of TSC even when running
1085 * again on the same CPU. This may cause apparent elapsed
1086 * time to disappear, and the guest to stand still or run
1089 if (vcpu->tsc_catchup) {
1090 u64 tsc = compute_guest_tsc(v, kernel_ns);
1091 if (tsc > tsc_timestamp) {
1092 kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1093 tsc_timestamp = tsc;
1097 local_irq_restore(flags);
1099 if (!vcpu->time_page)
1103 * Time as measured by the TSC may go backwards when resetting the base
1104 * tsc_timestamp. The reason for this is that the TSC resolution is
1105 * higher than the resolution of the other clock scales. Thus, many
1106 * possible measurments of the TSC correspond to one measurement of any
1107 * other clock, and so a spread of values is possible. This is not a
1108 * problem for the computation of the nanosecond clock; with TSC rates
1109 * around 1GHZ, there can only be a few cycles which correspond to one
1110 * nanosecond value, and any path through this code will inevitably
1111 * take longer than that. However, with the kernel_ns value itself,
1112 * the precision may be much lower, down to HZ granularity. If the
1113 * first sampling of TSC against kernel_ns ends in the low part of the
1114 * range, and the second in the high end of the range, we can get:
1116 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1118 * As the sampling errors potentially range in the thousands of cycles,
1119 * it is possible such a time value has already been observed by the
1120 * guest. To protect against this, we must compute the system time as
1121 * observed by the guest and ensure the new system time is greater.
1124 if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1125 max_kernel_ns = vcpu->last_guest_tsc -
1126 vcpu->hv_clock.tsc_timestamp;
1127 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1128 vcpu->hv_clock.tsc_to_system_mul,
1129 vcpu->hv_clock.tsc_shift);
1130 max_kernel_ns += vcpu->last_kernel_ns;
1133 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1134 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1135 &vcpu->hv_clock.tsc_shift,
1136 &vcpu->hv_clock.tsc_to_system_mul);
1137 vcpu->hw_tsc_khz = this_tsc_khz;
1140 if (max_kernel_ns > kernel_ns)
1141 kernel_ns = max_kernel_ns;
1143 /* With all the info we got, fill in the values */
1144 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1145 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1146 vcpu->last_kernel_ns = kernel_ns;
1147 vcpu->last_guest_tsc = tsc_timestamp;
1148 vcpu->hv_clock.flags = 0;
1151 * The interface expects us to write an even number signaling that the
1152 * update is finished. Since the guest won't see the intermediate
1153 * state, we just increase by 2 at the end.
1155 vcpu->hv_clock.version += 2;
1157 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1159 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1160 sizeof(vcpu->hv_clock));
1162 kunmap_atomic(shared_kaddr, KM_USER0);
1164 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1168 static bool msr_mtrr_valid(unsigned msr)
1171 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1172 case MSR_MTRRfix64K_00000:
1173 case MSR_MTRRfix16K_80000:
1174 case MSR_MTRRfix16K_A0000:
1175 case MSR_MTRRfix4K_C0000:
1176 case MSR_MTRRfix4K_C8000:
1177 case MSR_MTRRfix4K_D0000:
1178 case MSR_MTRRfix4K_D8000:
1179 case MSR_MTRRfix4K_E0000:
1180 case MSR_MTRRfix4K_E8000:
1181 case MSR_MTRRfix4K_F0000:
1182 case MSR_MTRRfix4K_F8000:
1183 case MSR_MTRRdefType:
1184 case MSR_IA32_CR_PAT:
1192 static bool valid_pat_type(unsigned t)
1194 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1197 static bool valid_mtrr_type(unsigned t)
1199 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1202 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1206 if (!msr_mtrr_valid(msr))
1209 if (msr == MSR_IA32_CR_PAT) {
1210 for (i = 0; i < 8; i++)
1211 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1214 } else if (msr == MSR_MTRRdefType) {
1217 return valid_mtrr_type(data & 0xff);
1218 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1219 for (i = 0; i < 8 ; i++)
1220 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1225 /* variable MTRRs */
1226 return valid_mtrr_type(data & 0xff);
1229 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1231 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1233 if (!mtrr_valid(vcpu, msr, data))
1236 if (msr == MSR_MTRRdefType) {
1237 vcpu->arch.mtrr_state.def_type = data;
1238 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1239 } else if (msr == MSR_MTRRfix64K_00000)
1241 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1242 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1243 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1244 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1245 else if (msr == MSR_IA32_CR_PAT)
1246 vcpu->arch.pat = data;
1247 else { /* Variable MTRRs */
1248 int idx, is_mtrr_mask;
1251 idx = (msr - 0x200) / 2;
1252 is_mtrr_mask = msr - 0x200 - 2 * idx;
1255 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1258 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1262 kvm_mmu_reset_context(vcpu);
1266 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1268 u64 mcg_cap = vcpu->arch.mcg_cap;
1269 unsigned bank_num = mcg_cap & 0xff;
1272 case MSR_IA32_MCG_STATUS:
1273 vcpu->arch.mcg_status = data;
1275 case MSR_IA32_MCG_CTL:
1276 if (!(mcg_cap & MCG_CTL_P))
1278 if (data != 0 && data != ~(u64)0)
1280 vcpu->arch.mcg_ctl = data;
1283 if (msr >= MSR_IA32_MC0_CTL &&
1284 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1285 u32 offset = msr - MSR_IA32_MC0_CTL;
1286 /* only 0 or all 1s can be written to IA32_MCi_CTL
1287 * some Linux kernels though clear bit 10 in bank 4 to
1288 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1289 * this to avoid an uncatched #GP in the guest
1291 if ((offset & 0x3) == 0 &&
1292 data != 0 && (data | (1 << 10)) != ~(u64)0)
1294 vcpu->arch.mce_banks[offset] = data;
1302 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1304 struct kvm *kvm = vcpu->kvm;
1305 int lm = is_long_mode(vcpu);
1306 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1307 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1308 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1309 : kvm->arch.xen_hvm_config.blob_size_32;
1310 u32 page_num = data & ~PAGE_MASK;
1311 u64 page_addr = data & PAGE_MASK;
1316 if (page_num >= blob_size)
1319 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1323 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1325 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1334 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1336 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1339 static bool kvm_hv_msr_partition_wide(u32 msr)
1343 case HV_X64_MSR_GUEST_OS_ID:
1344 case HV_X64_MSR_HYPERCALL:
1352 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1354 struct kvm *kvm = vcpu->kvm;
1357 case HV_X64_MSR_GUEST_OS_ID:
1358 kvm->arch.hv_guest_os_id = data;
1359 /* setting guest os id to zero disables hypercall page */
1360 if (!kvm->arch.hv_guest_os_id)
1361 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1363 case HV_X64_MSR_HYPERCALL: {
1368 /* if guest os id is not set hypercall should remain disabled */
1369 if (!kvm->arch.hv_guest_os_id)
1371 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1372 kvm->arch.hv_hypercall = data;
1375 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1376 addr = gfn_to_hva(kvm, gfn);
1377 if (kvm_is_error_hva(addr))
1379 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1380 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1381 if (copy_to_user((void __user *)addr, instructions, 4))
1383 kvm->arch.hv_hypercall = data;
1387 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1388 "data 0x%llx\n", msr, data);
1394 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1397 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1400 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1401 vcpu->arch.hv_vapic = data;
1404 addr = gfn_to_hva(vcpu->kvm, data >>
1405 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1406 if (kvm_is_error_hva(addr))
1408 if (clear_user((void __user *)addr, PAGE_SIZE))
1410 vcpu->arch.hv_vapic = data;
1413 case HV_X64_MSR_EOI:
1414 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1415 case HV_X64_MSR_ICR:
1416 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1417 case HV_X64_MSR_TPR:
1418 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1420 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1421 "data 0x%llx\n", msr, data);
1428 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1430 gpa_t gpa = data & ~0x3f;
1432 /* Bits 2:5 are resrved, Should be zero */
1436 vcpu->arch.apf.msr_val = data;
1438 if (!(data & KVM_ASYNC_PF_ENABLED)) {
1439 kvm_clear_async_pf_completion_queue(vcpu);
1440 kvm_async_pf_hash_reset(vcpu);
1444 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1447 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1448 kvm_async_pf_wakeup_all(vcpu);
1452 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1456 return set_efer(vcpu, data);
1458 data &= ~(u64)0x40; /* ignore flush filter disable */
1459 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1461 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1466 case MSR_FAM10H_MMIO_CONF_BASE:
1468 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1473 case MSR_AMD64_NB_CFG:
1475 case MSR_IA32_DEBUGCTLMSR:
1477 /* We support the non-activated case already */
1479 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1480 /* Values other than LBR and BTF are vendor-specific,
1481 thus reserved and should throw a #GP */
1484 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1487 case MSR_IA32_UCODE_REV:
1488 case MSR_IA32_UCODE_WRITE:
1489 case MSR_VM_HSAVE_PA:
1490 case MSR_AMD64_PATCH_LOADER:
1492 case 0x200 ... 0x2ff:
1493 return set_msr_mtrr(vcpu, msr, data);
1494 case MSR_IA32_APICBASE:
1495 kvm_set_apic_base(vcpu, data);
1497 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1498 return kvm_x2apic_msr_write(vcpu, msr, data);
1499 case MSR_IA32_MISC_ENABLE:
1500 vcpu->arch.ia32_misc_enable_msr = data;
1502 case MSR_KVM_WALL_CLOCK_NEW:
1503 case MSR_KVM_WALL_CLOCK:
1504 vcpu->kvm->arch.wall_clock = data;
1505 kvm_write_wall_clock(vcpu->kvm, data);
1507 case MSR_KVM_SYSTEM_TIME_NEW:
1508 case MSR_KVM_SYSTEM_TIME: {
1509 if (vcpu->arch.time_page) {
1510 kvm_release_page_dirty(vcpu->arch.time_page);
1511 vcpu->arch.time_page = NULL;
1514 vcpu->arch.time = data;
1515 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1517 /* we verify if the enable bit is set... */
1521 /* ...but clean it before doing the actual write */
1522 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1524 vcpu->arch.time_page =
1525 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1527 if (is_error_page(vcpu->arch.time_page)) {
1528 kvm_release_page_clean(vcpu->arch.time_page);
1529 vcpu->arch.time_page = NULL;
1533 case MSR_KVM_ASYNC_PF_EN:
1534 if (kvm_pv_enable_async_pf(vcpu, data))
1537 case MSR_IA32_MCG_CTL:
1538 case MSR_IA32_MCG_STATUS:
1539 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1540 return set_msr_mce(vcpu, msr, data);
1542 /* Performance counters are not protected by a CPUID bit,
1543 * so we should check all of them in the generic path for the sake of
1544 * cross vendor migration.
1545 * Writing a zero into the event select MSRs disables them,
1546 * which we perfectly emulate ;-). Any other value should be at least
1547 * reported, some guests depend on them.
1549 case MSR_P6_EVNTSEL0:
1550 case MSR_P6_EVNTSEL1:
1551 case MSR_K7_EVNTSEL0:
1552 case MSR_K7_EVNTSEL1:
1553 case MSR_K7_EVNTSEL2:
1554 case MSR_K7_EVNTSEL3:
1556 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1557 "0x%x data 0x%llx\n", msr, data);
1559 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1560 * so we ignore writes to make it happy.
1562 case MSR_P6_PERFCTR0:
1563 case MSR_P6_PERFCTR1:
1564 case MSR_K7_PERFCTR0:
1565 case MSR_K7_PERFCTR1:
1566 case MSR_K7_PERFCTR2:
1567 case MSR_K7_PERFCTR3:
1568 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1569 "0x%x data 0x%llx\n", msr, data);
1571 case MSR_K7_CLK_CTL:
1573 * Ignore all writes to this no longer documented MSR.
1574 * Writes are only relevant for old K7 processors,
1575 * all pre-dating SVM, but a recommended workaround from
1576 * AMD for these chips. It is possible to speicify the
1577 * affected processor models on the command line, hence
1578 * the need to ignore the workaround.
1581 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1582 if (kvm_hv_msr_partition_wide(msr)) {
1584 mutex_lock(&vcpu->kvm->lock);
1585 r = set_msr_hyperv_pw(vcpu, msr, data);
1586 mutex_unlock(&vcpu->kvm->lock);
1589 return set_msr_hyperv(vcpu, msr, data);
1592 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1593 return xen_hvm_config(vcpu, data);
1595 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1599 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1606 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1610 * Reads an msr value (of 'msr_index') into 'pdata'.
1611 * Returns 0 on success, non-0 otherwise.
1612 * Assumes vcpu_load() was already called.
1614 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1616 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1619 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1621 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1623 if (!msr_mtrr_valid(msr))
1626 if (msr == MSR_MTRRdefType)
1627 *pdata = vcpu->arch.mtrr_state.def_type +
1628 (vcpu->arch.mtrr_state.enabled << 10);
1629 else if (msr == MSR_MTRRfix64K_00000)
1631 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1632 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1633 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1634 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1635 else if (msr == MSR_IA32_CR_PAT)
1636 *pdata = vcpu->arch.pat;
1637 else { /* Variable MTRRs */
1638 int idx, is_mtrr_mask;
1641 idx = (msr - 0x200) / 2;
1642 is_mtrr_mask = msr - 0x200 - 2 * idx;
1645 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1648 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1655 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1658 u64 mcg_cap = vcpu->arch.mcg_cap;
1659 unsigned bank_num = mcg_cap & 0xff;
1662 case MSR_IA32_P5_MC_ADDR:
1663 case MSR_IA32_P5_MC_TYPE:
1666 case MSR_IA32_MCG_CAP:
1667 data = vcpu->arch.mcg_cap;
1669 case MSR_IA32_MCG_CTL:
1670 if (!(mcg_cap & MCG_CTL_P))
1672 data = vcpu->arch.mcg_ctl;
1674 case MSR_IA32_MCG_STATUS:
1675 data = vcpu->arch.mcg_status;
1678 if (msr >= MSR_IA32_MC0_CTL &&
1679 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1680 u32 offset = msr - MSR_IA32_MC0_CTL;
1681 data = vcpu->arch.mce_banks[offset];
1690 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1693 struct kvm *kvm = vcpu->kvm;
1696 case HV_X64_MSR_GUEST_OS_ID:
1697 data = kvm->arch.hv_guest_os_id;
1699 case HV_X64_MSR_HYPERCALL:
1700 data = kvm->arch.hv_hypercall;
1703 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1711 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1716 case HV_X64_MSR_VP_INDEX: {
1719 kvm_for_each_vcpu(r, v, vcpu->kvm)
1724 case HV_X64_MSR_EOI:
1725 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1726 case HV_X64_MSR_ICR:
1727 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1728 case HV_X64_MSR_TPR:
1729 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1731 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1738 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1743 case MSR_IA32_PLATFORM_ID:
1744 case MSR_IA32_UCODE_REV:
1745 case MSR_IA32_EBL_CR_POWERON:
1746 case MSR_IA32_DEBUGCTLMSR:
1747 case MSR_IA32_LASTBRANCHFROMIP:
1748 case MSR_IA32_LASTBRANCHTOIP:
1749 case MSR_IA32_LASTINTFROMIP:
1750 case MSR_IA32_LASTINTTOIP:
1753 case MSR_VM_HSAVE_PA:
1754 case MSR_P6_PERFCTR0:
1755 case MSR_P6_PERFCTR1:
1756 case MSR_P6_EVNTSEL0:
1757 case MSR_P6_EVNTSEL1:
1758 case MSR_K7_EVNTSEL0:
1759 case MSR_K7_PERFCTR0:
1760 case MSR_K8_INT_PENDING_MSG:
1761 case MSR_AMD64_NB_CFG:
1762 case MSR_FAM10H_MMIO_CONF_BASE:
1766 data = 0x500 | KVM_NR_VAR_MTRR;
1768 case 0x200 ... 0x2ff:
1769 return get_msr_mtrr(vcpu, msr, pdata);
1770 case 0xcd: /* fsb frequency */
1774 * MSR_EBC_FREQUENCY_ID
1775 * Conservative value valid for even the basic CPU models.
1776 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1777 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1778 * and 266MHz for model 3, or 4. Set Core Clock
1779 * Frequency to System Bus Frequency Ratio to 1 (bits
1780 * 31:24) even though these are only valid for CPU
1781 * models > 2, however guests may end up dividing or
1782 * multiplying by zero otherwise.
1784 case MSR_EBC_FREQUENCY_ID:
1787 case MSR_IA32_APICBASE:
1788 data = kvm_get_apic_base(vcpu);
1790 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1791 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1793 case MSR_IA32_MISC_ENABLE:
1794 data = vcpu->arch.ia32_misc_enable_msr;
1796 case MSR_IA32_PERF_STATUS:
1797 /* TSC increment by tick */
1799 /* CPU multiplier */
1800 data |= (((uint64_t)4ULL) << 40);
1803 data = vcpu->arch.efer;
1805 case MSR_KVM_WALL_CLOCK:
1806 case MSR_KVM_WALL_CLOCK_NEW:
1807 data = vcpu->kvm->arch.wall_clock;
1809 case MSR_KVM_SYSTEM_TIME:
1810 case MSR_KVM_SYSTEM_TIME_NEW:
1811 data = vcpu->arch.time;
1813 case MSR_KVM_ASYNC_PF_EN:
1814 data = vcpu->arch.apf.msr_val;
1816 case MSR_IA32_P5_MC_ADDR:
1817 case MSR_IA32_P5_MC_TYPE:
1818 case MSR_IA32_MCG_CAP:
1819 case MSR_IA32_MCG_CTL:
1820 case MSR_IA32_MCG_STATUS:
1821 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1822 return get_msr_mce(vcpu, msr, pdata);
1823 case MSR_K7_CLK_CTL:
1825 * Provide expected ramp-up count for K7. All other
1826 * are set to zero, indicating minimum divisors for
1829 * This prevents guest kernels on AMD host with CPU
1830 * type 6, model 8 and higher from exploding due to
1831 * the rdmsr failing.
1835 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1836 if (kvm_hv_msr_partition_wide(msr)) {
1838 mutex_lock(&vcpu->kvm->lock);
1839 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1840 mutex_unlock(&vcpu->kvm->lock);
1843 return get_msr_hyperv(vcpu, msr, pdata);
1847 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1850 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1858 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1861 * Read or write a bunch of msrs. All parameters are kernel addresses.
1863 * @return number of msrs set successfully.
1865 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1866 struct kvm_msr_entry *entries,
1867 int (*do_msr)(struct kvm_vcpu *vcpu,
1868 unsigned index, u64 *data))
1872 idx = srcu_read_lock(&vcpu->kvm->srcu);
1873 for (i = 0; i < msrs->nmsrs; ++i)
1874 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1876 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1882 * Read or write a bunch of msrs. Parameters are user addresses.
1884 * @return number of msrs set successfully.
1886 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1887 int (*do_msr)(struct kvm_vcpu *vcpu,
1888 unsigned index, u64 *data),
1891 struct kvm_msrs msrs;
1892 struct kvm_msr_entry *entries;
1897 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1901 if (msrs.nmsrs >= MAX_IO_MSRS)
1905 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1906 entries = kmalloc(size, GFP_KERNEL);
1911 if (copy_from_user(entries, user_msrs->entries, size))
1914 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1919 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1930 int kvm_dev_ioctl_check_extension(long ext)
1935 case KVM_CAP_IRQCHIP:
1937 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1938 case KVM_CAP_SET_TSS_ADDR:
1939 case KVM_CAP_EXT_CPUID:
1940 case KVM_CAP_CLOCKSOURCE:
1942 case KVM_CAP_NOP_IO_DELAY:
1943 case KVM_CAP_MP_STATE:
1944 case KVM_CAP_SYNC_MMU:
1945 case KVM_CAP_REINJECT_CONTROL:
1946 case KVM_CAP_IRQ_INJECT_STATUS:
1947 case KVM_CAP_ASSIGN_DEV_IRQ:
1949 case KVM_CAP_IOEVENTFD:
1951 case KVM_CAP_PIT_STATE2:
1952 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1953 case KVM_CAP_XEN_HVM:
1954 case KVM_CAP_ADJUST_CLOCK:
1955 case KVM_CAP_VCPU_EVENTS:
1956 case KVM_CAP_HYPERV:
1957 case KVM_CAP_HYPERV_VAPIC:
1958 case KVM_CAP_HYPERV_SPIN:
1959 case KVM_CAP_PCI_SEGMENT:
1960 case KVM_CAP_DEBUGREGS:
1961 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1963 case KVM_CAP_ASYNC_PF:
1966 case KVM_CAP_COALESCED_MMIO:
1967 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1970 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1972 case KVM_CAP_NR_VCPUS:
1975 case KVM_CAP_NR_MEMSLOTS:
1976 r = KVM_MEMORY_SLOTS;
1978 case KVM_CAP_PV_MMU: /* obsolete */
1985 r = KVM_MAX_MCE_BANKS;
1998 long kvm_arch_dev_ioctl(struct file *filp,
1999 unsigned int ioctl, unsigned long arg)
2001 void __user *argp = (void __user *)arg;
2005 case KVM_GET_MSR_INDEX_LIST: {
2006 struct kvm_msr_list __user *user_msr_list = argp;
2007 struct kvm_msr_list msr_list;
2011 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2014 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2015 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2018 if (n < msr_list.nmsrs)
2021 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2022 num_msrs_to_save * sizeof(u32)))
2024 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2026 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2031 case KVM_GET_SUPPORTED_CPUID: {
2032 struct kvm_cpuid2 __user *cpuid_arg = argp;
2033 struct kvm_cpuid2 cpuid;
2036 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2038 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2039 cpuid_arg->entries);
2044 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2049 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2052 mce_cap = KVM_MCE_CAP_SUPPORTED;
2054 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2066 static void wbinvd_ipi(void *garbage)
2071 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2073 return vcpu->kvm->arch.iommu_domain &&
2074 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2077 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2079 /* Address WBINVD may be executed by guest */
2080 if (need_emulate_wbinvd(vcpu)) {
2081 if (kvm_x86_ops->has_wbinvd_exit())
2082 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2083 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2084 smp_call_function_single(vcpu->cpu,
2085 wbinvd_ipi, NULL, 1);
2088 kvm_x86_ops->vcpu_load(vcpu, cpu);
2089 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2090 /* Make sure TSC doesn't go backwards */
2091 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2092 native_read_tsc() - vcpu->arch.last_host_tsc;
2094 mark_tsc_unstable("KVM discovered backwards TSC");
2095 if (check_tsc_unstable()) {
2096 kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2097 vcpu->arch.tsc_catchup = 1;
2098 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2100 if (vcpu->cpu != cpu)
2101 kvm_migrate_timers(vcpu);
2106 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2108 kvm_x86_ops->vcpu_put(vcpu);
2109 kvm_put_guest_fpu(vcpu);
2110 vcpu->arch.last_host_tsc = native_read_tsc();
2113 static int is_efer_nx(void)
2115 unsigned long long efer = 0;
2117 rdmsrl_safe(MSR_EFER, &efer);
2118 return efer & EFER_NX;
2121 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2124 struct kvm_cpuid_entry2 *e, *entry;
2127 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2128 e = &vcpu->arch.cpuid_entries[i];
2129 if (e->function == 0x80000001) {
2134 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2135 entry->edx &= ~(1 << 20);
2136 printk(KERN_INFO "kvm: guest NX capability removed\n");
2140 /* when an old userspace process fills a new kernel module */
2141 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2142 struct kvm_cpuid *cpuid,
2143 struct kvm_cpuid_entry __user *entries)
2146 struct kvm_cpuid_entry *cpuid_entries;
2149 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2152 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2156 if (copy_from_user(cpuid_entries, entries,
2157 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2159 for (i = 0; i < cpuid->nent; i++) {
2160 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2161 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2162 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2163 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2164 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2165 vcpu->arch.cpuid_entries[i].index = 0;
2166 vcpu->arch.cpuid_entries[i].flags = 0;
2167 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2168 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2169 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2171 vcpu->arch.cpuid_nent = cpuid->nent;
2172 cpuid_fix_nx_cap(vcpu);
2174 kvm_apic_set_version(vcpu);
2175 kvm_x86_ops->cpuid_update(vcpu);
2179 vfree(cpuid_entries);
2184 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2185 struct kvm_cpuid2 *cpuid,
2186 struct kvm_cpuid_entry2 __user *entries)
2191 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2194 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2195 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2197 vcpu->arch.cpuid_nent = cpuid->nent;
2198 kvm_apic_set_version(vcpu);
2199 kvm_x86_ops->cpuid_update(vcpu);
2207 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2208 struct kvm_cpuid2 *cpuid,
2209 struct kvm_cpuid_entry2 __user *entries)
2214 if (cpuid->nent < vcpu->arch.cpuid_nent)
2217 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2218 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2223 cpuid->nent = vcpu->arch.cpuid_nent;
2227 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2230 entry->function = function;
2231 entry->index = index;
2232 cpuid_count(entry->function, entry->index,
2233 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2237 #define F(x) bit(X86_FEATURE_##x)
2239 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2240 u32 index, int *nent, int maxnent)
2242 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2243 #ifdef CONFIG_X86_64
2244 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2246 unsigned f_lm = F(LM);
2248 unsigned f_gbpages = 0;
2251 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2254 const u32 kvm_supported_word0_x86_features =
2255 F(FPU) | F(VME) | F(DE) | F(PSE) |
2256 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2257 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2258 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2259 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2260 0 /* Reserved, DS, ACPI */ | F(MMX) |
2261 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2262 0 /* HTT, TM, Reserved, PBE */;
2263 /* cpuid 0x80000001.edx */
2264 const u32 kvm_supported_word1_x86_features =
2265 F(FPU) | F(VME) | F(DE) | F(PSE) |
2266 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2267 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2268 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2269 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2270 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2271 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2272 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2274 const u32 kvm_supported_word4_x86_features =
2275 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2276 0 /* DS-CPL, VMX, SMX, EST */ |
2277 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2278 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2279 0 /* Reserved, DCA */ | F(XMM4_1) |
2280 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2281 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2283 /* cpuid 0x80000001.ecx */
2284 const u32 kvm_supported_word6_x86_features =
2285 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2286 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2287 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2288 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2290 /* all calls to cpuid_count() should be made on the same cpu */
2292 do_cpuid_1_ent(entry, function, index);
2297 entry->eax = min(entry->eax, (u32)0xd);
2300 entry->edx &= kvm_supported_word0_x86_features;
2301 entry->ecx &= kvm_supported_word4_x86_features;
2302 /* we support x2apic emulation even if host does not support
2303 * it since we emulate x2apic in software */
2304 entry->ecx |= F(X2APIC);
2306 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2307 * may return different values. This forces us to get_cpu() before
2308 * issuing the first command, and also to emulate this annoying behavior
2309 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2311 int t, times = entry->eax & 0xff;
2313 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2314 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2315 for (t = 1; t < times && *nent < maxnent; ++t) {
2316 do_cpuid_1_ent(&entry[t], function, 0);
2317 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2322 /* function 4 and 0xb have additional index. */
2326 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2327 /* read more entries until cache_type is zero */
2328 for (i = 1; *nent < maxnent; ++i) {
2329 cache_type = entry[i - 1].eax & 0x1f;
2332 do_cpuid_1_ent(&entry[i], function, i);
2334 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2342 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2343 /* read more entries until level_type is zero */
2344 for (i = 1; *nent < maxnent; ++i) {
2345 level_type = entry[i - 1].ecx & 0xff00;
2348 do_cpuid_1_ent(&entry[i], function, i);
2350 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2358 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2359 for (i = 1; *nent < maxnent; ++i) {
2360 if (entry[i - 1].eax == 0 && i != 2)
2362 do_cpuid_1_ent(&entry[i], function, i);
2364 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2369 case KVM_CPUID_SIGNATURE: {
2370 char signature[12] = "KVMKVMKVM\0\0";
2371 u32 *sigptr = (u32 *)signature;
2373 entry->ebx = sigptr[0];
2374 entry->ecx = sigptr[1];
2375 entry->edx = sigptr[2];
2378 case KVM_CPUID_FEATURES:
2379 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2380 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2381 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2382 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2388 entry->eax = min(entry->eax, 0x8000001a);
2391 entry->edx &= kvm_supported_word1_x86_features;
2392 entry->ecx &= kvm_supported_word6_x86_features;
2396 kvm_x86_ops->set_supported_cpuid(function, entry);
2403 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2404 struct kvm_cpuid_entry2 __user *entries)
2406 struct kvm_cpuid_entry2 *cpuid_entries;
2407 int limit, nent = 0, r = -E2BIG;
2410 if (cpuid->nent < 1)
2412 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2413 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2415 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2419 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2420 limit = cpuid_entries[0].eax;
2421 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2422 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2423 &nent, cpuid->nent);
2425 if (nent >= cpuid->nent)
2428 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2429 limit = cpuid_entries[nent - 1].eax;
2430 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2431 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2432 &nent, cpuid->nent);
2437 if (nent >= cpuid->nent)
2440 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2444 if (nent >= cpuid->nent)
2447 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2451 if (nent >= cpuid->nent)
2455 if (copy_to_user(entries, cpuid_entries,
2456 nent * sizeof(struct kvm_cpuid_entry2)))
2462 vfree(cpuid_entries);
2467 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2468 struct kvm_lapic_state *s)
2470 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2475 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2476 struct kvm_lapic_state *s)
2478 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2479 kvm_apic_post_state_restore(vcpu);
2480 update_cr8_intercept(vcpu);
2485 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2486 struct kvm_interrupt *irq)
2488 if (irq->irq < 0 || irq->irq >= 256)
2490 if (irqchip_in_kernel(vcpu->kvm))
2493 kvm_queue_interrupt(vcpu, irq->irq, false);
2494 kvm_make_request(KVM_REQ_EVENT, vcpu);
2499 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2501 kvm_inject_nmi(vcpu);
2506 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2507 struct kvm_tpr_access_ctl *tac)
2511 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2515 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2519 unsigned bank_num = mcg_cap & 0xff, bank;
2522 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2524 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2527 vcpu->arch.mcg_cap = mcg_cap;
2528 /* Init IA32_MCG_CTL to all 1s */
2529 if (mcg_cap & MCG_CTL_P)
2530 vcpu->arch.mcg_ctl = ~(u64)0;
2531 /* Init IA32_MCi_CTL to all 1s */
2532 for (bank = 0; bank < bank_num; bank++)
2533 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2538 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2539 struct kvm_x86_mce *mce)
2541 u64 mcg_cap = vcpu->arch.mcg_cap;
2542 unsigned bank_num = mcg_cap & 0xff;
2543 u64 *banks = vcpu->arch.mce_banks;
2545 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2548 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2549 * reporting is disabled
2551 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2552 vcpu->arch.mcg_ctl != ~(u64)0)
2554 banks += 4 * mce->bank;
2556 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2557 * reporting is disabled for the bank
2559 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2561 if (mce->status & MCI_STATUS_UC) {
2562 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2563 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2564 printk(KERN_DEBUG "kvm: set_mce: "
2565 "injects mce exception while "
2566 "previous one is in progress!\n");
2567 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2570 if (banks[1] & MCI_STATUS_VAL)
2571 mce->status |= MCI_STATUS_OVER;
2572 banks[2] = mce->addr;
2573 banks[3] = mce->misc;
2574 vcpu->arch.mcg_status = mce->mcg_status;
2575 banks[1] = mce->status;
2576 kvm_queue_exception(vcpu, MC_VECTOR);
2577 } else if (!(banks[1] & MCI_STATUS_VAL)
2578 || !(banks[1] & MCI_STATUS_UC)) {
2579 if (banks[1] & MCI_STATUS_VAL)
2580 mce->status |= MCI_STATUS_OVER;
2581 banks[2] = mce->addr;
2582 banks[3] = mce->misc;
2583 banks[1] = mce->status;
2585 banks[1] |= MCI_STATUS_OVER;
2589 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2590 struct kvm_vcpu_events *events)
2592 events->exception.injected =
2593 vcpu->arch.exception.pending &&
2594 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2595 events->exception.nr = vcpu->arch.exception.nr;
2596 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2597 events->exception.pad = 0;
2598 events->exception.error_code = vcpu->arch.exception.error_code;
2600 events->interrupt.injected =
2601 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2602 events->interrupt.nr = vcpu->arch.interrupt.nr;
2603 events->interrupt.soft = 0;
2604 events->interrupt.shadow =
2605 kvm_x86_ops->get_interrupt_shadow(vcpu,
2606 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2608 events->nmi.injected = vcpu->arch.nmi_injected;
2609 events->nmi.pending = vcpu->arch.nmi_pending;
2610 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2611 events->nmi.pad = 0;
2613 events->sipi_vector = vcpu->arch.sipi_vector;
2615 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2616 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2617 | KVM_VCPUEVENT_VALID_SHADOW);
2618 memset(&events->reserved, 0, sizeof(events->reserved));
2621 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2622 struct kvm_vcpu_events *events)
2624 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2625 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2626 | KVM_VCPUEVENT_VALID_SHADOW))
2629 vcpu->arch.exception.pending = events->exception.injected;
2630 vcpu->arch.exception.nr = events->exception.nr;
2631 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2632 vcpu->arch.exception.error_code = events->exception.error_code;
2634 vcpu->arch.interrupt.pending = events->interrupt.injected;
2635 vcpu->arch.interrupt.nr = events->interrupt.nr;
2636 vcpu->arch.interrupt.soft = events->interrupt.soft;
2637 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2638 kvm_pic_clear_isr_ack(vcpu->kvm);
2639 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2640 kvm_x86_ops->set_interrupt_shadow(vcpu,
2641 events->interrupt.shadow);
2643 vcpu->arch.nmi_injected = events->nmi.injected;
2644 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2645 vcpu->arch.nmi_pending = events->nmi.pending;
2646 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2648 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2649 vcpu->arch.sipi_vector = events->sipi_vector;
2651 kvm_make_request(KVM_REQ_EVENT, vcpu);
2656 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2657 struct kvm_debugregs *dbgregs)
2659 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2660 dbgregs->dr6 = vcpu->arch.dr6;
2661 dbgregs->dr7 = vcpu->arch.dr7;
2663 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2666 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2667 struct kvm_debugregs *dbgregs)
2672 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2673 vcpu->arch.dr6 = dbgregs->dr6;
2674 vcpu->arch.dr7 = dbgregs->dr7;
2679 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2680 struct kvm_xsave *guest_xsave)
2683 memcpy(guest_xsave->region,
2684 &vcpu->arch.guest_fpu.state->xsave,
2687 memcpy(guest_xsave->region,
2688 &vcpu->arch.guest_fpu.state->fxsave,
2689 sizeof(struct i387_fxsave_struct));
2690 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2695 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2696 struct kvm_xsave *guest_xsave)
2699 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2702 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2703 guest_xsave->region, xstate_size);
2705 if (xstate_bv & ~XSTATE_FPSSE)
2707 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2708 guest_xsave->region, sizeof(struct i387_fxsave_struct));
2713 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2714 struct kvm_xcrs *guest_xcrs)
2716 if (!cpu_has_xsave) {
2717 guest_xcrs->nr_xcrs = 0;
2721 guest_xcrs->nr_xcrs = 1;
2722 guest_xcrs->flags = 0;
2723 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2724 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2727 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2728 struct kvm_xcrs *guest_xcrs)
2735 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2738 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2739 /* Only support XCR0 currently */
2740 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2741 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2742 guest_xcrs->xcrs[0].value);
2750 long kvm_arch_vcpu_ioctl(struct file *filp,
2751 unsigned int ioctl, unsigned long arg)
2753 struct kvm_vcpu *vcpu = filp->private_data;
2754 void __user *argp = (void __user *)arg;
2757 struct kvm_lapic_state *lapic;
2758 struct kvm_xsave *xsave;
2759 struct kvm_xcrs *xcrs;
2765 case KVM_GET_LAPIC: {
2767 if (!vcpu->arch.apic)
2769 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2774 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2778 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2783 case KVM_SET_LAPIC: {
2785 if (!vcpu->arch.apic)
2787 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2792 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2794 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2800 case KVM_INTERRUPT: {
2801 struct kvm_interrupt irq;
2804 if (copy_from_user(&irq, argp, sizeof irq))
2806 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2813 r = kvm_vcpu_ioctl_nmi(vcpu);
2819 case KVM_SET_CPUID: {
2820 struct kvm_cpuid __user *cpuid_arg = argp;
2821 struct kvm_cpuid cpuid;
2824 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2826 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2831 case KVM_SET_CPUID2: {
2832 struct kvm_cpuid2 __user *cpuid_arg = argp;
2833 struct kvm_cpuid2 cpuid;
2836 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2838 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2839 cpuid_arg->entries);
2844 case KVM_GET_CPUID2: {
2845 struct kvm_cpuid2 __user *cpuid_arg = argp;
2846 struct kvm_cpuid2 cpuid;
2849 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2851 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2852 cpuid_arg->entries);
2856 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2862 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2865 r = msr_io(vcpu, argp, do_set_msr, 0);
2867 case KVM_TPR_ACCESS_REPORTING: {
2868 struct kvm_tpr_access_ctl tac;
2871 if (copy_from_user(&tac, argp, sizeof tac))
2873 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2877 if (copy_to_user(argp, &tac, sizeof tac))
2882 case KVM_SET_VAPIC_ADDR: {
2883 struct kvm_vapic_addr va;
2886 if (!irqchip_in_kernel(vcpu->kvm))
2889 if (copy_from_user(&va, argp, sizeof va))
2892 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2895 case KVM_X86_SETUP_MCE: {
2899 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2901 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2904 case KVM_X86_SET_MCE: {
2905 struct kvm_x86_mce mce;
2908 if (copy_from_user(&mce, argp, sizeof mce))
2910 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2913 case KVM_GET_VCPU_EVENTS: {
2914 struct kvm_vcpu_events events;
2916 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2919 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2924 case KVM_SET_VCPU_EVENTS: {
2925 struct kvm_vcpu_events events;
2928 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2931 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2934 case KVM_GET_DEBUGREGS: {
2935 struct kvm_debugregs dbgregs;
2937 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2940 if (copy_to_user(argp, &dbgregs,
2941 sizeof(struct kvm_debugregs)))
2946 case KVM_SET_DEBUGREGS: {
2947 struct kvm_debugregs dbgregs;
2950 if (copy_from_user(&dbgregs, argp,
2951 sizeof(struct kvm_debugregs)))
2954 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2957 case KVM_GET_XSAVE: {
2958 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2963 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2966 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2971 case KVM_SET_XSAVE: {
2972 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2978 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2981 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2984 case KVM_GET_XCRS: {
2985 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2990 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2993 if (copy_to_user(argp, u.xcrs,
2994 sizeof(struct kvm_xcrs)))
2999 case KVM_SET_XCRS: {
3000 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3006 if (copy_from_user(u.xcrs, argp,
3007 sizeof(struct kvm_xcrs)))
3010 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3021 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3025 if (addr > (unsigned int)(-3 * PAGE_SIZE))
3027 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3031 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3034 kvm->arch.ept_identity_map_addr = ident_addr;
3038 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3039 u32 kvm_nr_mmu_pages)
3041 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3044 mutex_lock(&kvm->slots_lock);
3045 spin_lock(&kvm->mmu_lock);
3047 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3048 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3050 spin_unlock(&kvm->mmu_lock);
3051 mutex_unlock(&kvm->slots_lock);
3055 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3057 return kvm->arch.n_max_mmu_pages;
3060 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3065 switch (chip->chip_id) {
3066 case KVM_IRQCHIP_PIC_MASTER:
3067 memcpy(&chip->chip.pic,
3068 &pic_irqchip(kvm)->pics[0],
3069 sizeof(struct kvm_pic_state));
3071 case KVM_IRQCHIP_PIC_SLAVE:
3072 memcpy(&chip->chip.pic,
3073 &pic_irqchip(kvm)->pics[1],
3074 sizeof(struct kvm_pic_state));
3076 case KVM_IRQCHIP_IOAPIC:
3077 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3086 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3091 switch (chip->chip_id) {
3092 case KVM_IRQCHIP_PIC_MASTER:
3093 spin_lock(&pic_irqchip(kvm)->lock);
3094 memcpy(&pic_irqchip(kvm)->pics[0],
3096 sizeof(struct kvm_pic_state));
3097 spin_unlock(&pic_irqchip(kvm)->lock);
3099 case KVM_IRQCHIP_PIC_SLAVE:
3100 spin_lock(&pic_irqchip(kvm)->lock);
3101 memcpy(&pic_irqchip(kvm)->pics[1],
3103 sizeof(struct kvm_pic_state));
3104 spin_unlock(&pic_irqchip(kvm)->lock);
3106 case KVM_IRQCHIP_IOAPIC:
3107 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3113 kvm_pic_update_irq(pic_irqchip(kvm));
3117 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3121 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3122 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3123 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3127 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3131 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3132 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3133 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3134 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3138 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3142 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3143 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3144 sizeof(ps->channels));
3145 ps->flags = kvm->arch.vpit->pit_state.flags;
3146 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3147 memset(&ps->reserved, 0, sizeof(ps->reserved));
3151 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3153 int r = 0, start = 0;
3154 u32 prev_legacy, cur_legacy;
3155 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3156 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3157 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3158 if (!prev_legacy && cur_legacy)
3160 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3161 sizeof(kvm->arch.vpit->pit_state.channels));
3162 kvm->arch.vpit->pit_state.flags = ps->flags;
3163 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3164 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3168 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3169 struct kvm_reinject_control *control)
3171 if (!kvm->arch.vpit)
3173 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3174 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3175 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3180 * Get (and clear) the dirty memory log for a memory slot.
3182 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3183 struct kvm_dirty_log *log)
3186 struct kvm_memory_slot *memslot;
3188 unsigned long is_dirty = 0;
3190 mutex_lock(&kvm->slots_lock);
3193 if (log->slot >= KVM_MEMORY_SLOTS)
3196 memslot = &kvm->memslots->memslots[log->slot];
3198 if (!memslot->dirty_bitmap)
3201 n = kvm_dirty_bitmap_bytes(memslot);
3203 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3204 is_dirty = memslot->dirty_bitmap[i];
3206 /* If nothing is dirty, don't bother messing with page tables. */
3208 struct kvm_memslots *slots, *old_slots;
3209 unsigned long *dirty_bitmap;
3211 dirty_bitmap = memslot->dirty_bitmap_head;
3212 if (memslot->dirty_bitmap == dirty_bitmap)
3213 dirty_bitmap += n / sizeof(long);
3214 memset(dirty_bitmap, 0, n);
3217 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3220 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3221 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3222 slots->generation++;
3224 old_slots = kvm->memslots;
3225 rcu_assign_pointer(kvm->memslots, slots);
3226 synchronize_srcu_expedited(&kvm->srcu);
3227 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3230 spin_lock(&kvm->mmu_lock);
3231 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3232 spin_unlock(&kvm->mmu_lock);
3235 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3239 if (clear_user(log->dirty_bitmap, n))
3245 mutex_unlock(&kvm->slots_lock);
3249 long kvm_arch_vm_ioctl(struct file *filp,
3250 unsigned int ioctl, unsigned long arg)
3252 struct kvm *kvm = filp->private_data;
3253 void __user *argp = (void __user *)arg;
3256 * This union makes it completely explicit to gcc-3.x
3257 * that these two variables' stack usage should be
3258 * combined, not added together.
3261 struct kvm_pit_state ps;
3262 struct kvm_pit_state2 ps2;
3263 struct kvm_pit_config pit_config;
3267 case KVM_SET_TSS_ADDR:
3268 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3272 case KVM_SET_IDENTITY_MAP_ADDR: {
3276 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3278 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3283 case KVM_SET_NR_MMU_PAGES:
3284 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3288 case KVM_GET_NR_MMU_PAGES:
3289 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3291 case KVM_CREATE_IRQCHIP: {
3292 struct kvm_pic *vpic;
3294 mutex_lock(&kvm->lock);
3297 goto create_irqchip_unlock;
3299 vpic = kvm_create_pic(kvm);
3301 r = kvm_ioapic_init(kvm);
3303 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3306 goto create_irqchip_unlock;
3309 goto create_irqchip_unlock;
3311 kvm->arch.vpic = vpic;
3313 r = kvm_setup_default_irq_routing(kvm);
3315 mutex_lock(&kvm->irq_lock);
3316 kvm_ioapic_destroy(kvm);
3317 kvm_destroy_pic(kvm);
3318 mutex_unlock(&kvm->irq_lock);
3320 create_irqchip_unlock:
3321 mutex_unlock(&kvm->lock);
3324 case KVM_CREATE_PIT:
3325 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3327 case KVM_CREATE_PIT2:
3329 if (copy_from_user(&u.pit_config, argp,
3330 sizeof(struct kvm_pit_config)))
3333 mutex_lock(&kvm->slots_lock);
3336 goto create_pit_unlock;
3338 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3342 mutex_unlock(&kvm->slots_lock);
3344 case KVM_IRQ_LINE_STATUS:
3345 case KVM_IRQ_LINE: {
3346 struct kvm_irq_level irq_event;
3349 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3352 if (irqchip_in_kernel(kvm)) {
3354 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3355 irq_event.irq, irq_event.level);
3356 if (ioctl == KVM_IRQ_LINE_STATUS) {
3358 irq_event.status = status;
3359 if (copy_to_user(argp, &irq_event,
3367 case KVM_GET_IRQCHIP: {
3368 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3369 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3375 if (copy_from_user(chip, argp, sizeof *chip))
3376 goto get_irqchip_out;
3378 if (!irqchip_in_kernel(kvm))
3379 goto get_irqchip_out;
3380 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3382 goto get_irqchip_out;
3384 if (copy_to_user(argp, chip, sizeof *chip))
3385 goto get_irqchip_out;
3393 case KVM_SET_IRQCHIP: {
3394 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3395 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3401 if (copy_from_user(chip, argp, sizeof *chip))
3402 goto set_irqchip_out;
3404 if (!irqchip_in_kernel(kvm))
3405 goto set_irqchip_out;
3406 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3408 goto set_irqchip_out;
3418 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3421 if (!kvm->arch.vpit)
3423 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3427 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3434 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3437 if (!kvm->arch.vpit)
3439 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3445 case KVM_GET_PIT2: {
3447 if (!kvm->arch.vpit)
3449 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3453 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3458 case KVM_SET_PIT2: {
3460 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3463 if (!kvm->arch.vpit)
3465 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3471 case KVM_REINJECT_CONTROL: {
3472 struct kvm_reinject_control control;
3474 if (copy_from_user(&control, argp, sizeof(control)))
3476 r = kvm_vm_ioctl_reinject(kvm, &control);
3482 case KVM_XEN_HVM_CONFIG: {
3484 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3485 sizeof(struct kvm_xen_hvm_config)))
3488 if (kvm->arch.xen_hvm_config.flags)
3493 case KVM_SET_CLOCK: {
3494 struct kvm_clock_data user_ns;
3499 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3507 local_irq_disable();
3508 now_ns = get_kernel_ns();
3509 delta = user_ns.clock - now_ns;
3511 kvm->arch.kvmclock_offset = delta;
3514 case KVM_GET_CLOCK: {
3515 struct kvm_clock_data user_ns;
3518 local_irq_disable();
3519 now_ns = get_kernel_ns();
3520 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3523 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3526 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3539 static void kvm_init_msr_list(void)
3544 /* skip the first msrs in the list. KVM-specific */
3545 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3546 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3549 msrs_to_save[j] = msrs_to_save[i];
3552 num_msrs_to_save = j;
3555 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3558 if (vcpu->arch.apic &&
3559 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3562 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3565 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3567 if (vcpu->arch.apic &&
3568 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3571 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3574 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3575 struct kvm_segment *var, int seg)
3577 kvm_x86_ops->set_segment(vcpu, var, seg);
3580 void kvm_get_segment(struct kvm_vcpu *vcpu,
3581 struct kvm_segment *var, int seg)
3583 kvm_x86_ops->get_segment(vcpu, var, seg);
3586 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3591 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3596 BUG_ON(!mmu_is_nested(vcpu));
3598 /* NPT walks are always user-walks */
3599 access |= PFERR_USER_MASK;
3600 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &error);
3601 if (t_gpa == UNMAPPED_GVA)
3602 vcpu->arch.fault.nested = true;
3607 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3609 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3610 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3613 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3615 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3616 access |= PFERR_FETCH_MASK;
3617 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3620 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3622 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3623 access |= PFERR_WRITE_MASK;
3624 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3627 /* uses this to access any guest's mapped memory without checking CPL */
3628 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3630 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, error);
3633 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3634 struct kvm_vcpu *vcpu, u32 access,
3638 int r = X86EMUL_CONTINUE;
3641 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3643 unsigned offset = addr & (PAGE_SIZE-1);
3644 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3647 if (gpa == UNMAPPED_GVA) {
3648 r = X86EMUL_PROPAGATE_FAULT;
3651 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3653 r = X86EMUL_IO_NEEDED;
3665 /* used for instruction fetching */
3666 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3667 struct kvm_vcpu *vcpu, u32 *error)
3669 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3670 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3671 access | PFERR_FETCH_MASK, error);
3674 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3675 struct kvm_vcpu *vcpu, u32 *error)
3677 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3678 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3682 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3683 struct kvm_vcpu *vcpu, u32 *error)
3685 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3688 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3690 struct kvm_vcpu *vcpu,
3694 int r = X86EMUL_CONTINUE;
3697 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3700 unsigned offset = addr & (PAGE_SIZE-1);
3701 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3704 if (gpa == UNMAPPED_GVA) {
3705 r = X86EMUL_PROPAGATE_FAULT;
3708 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3710 r = X86EMUL_IO_NEEDED;
3722 static int emulator_read_emulated(unsigned long addr,
3725 unsigned int *error_code,
3726 struct kvm_vcpu *vcpu)
3730 if (vcpu->mmio_read_completed) {
3731 memcpy(val, vcpu->mmio_data, bytes);
3732 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3733 vcpu->mmio_phys_addr, *(u64 *)val);
3734 vcpu->mmio_read_completed = 0;
3735 return X86EMUL_CONTINUE;
3738 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3740 if (gpa == UNMAPPED_GVA)
3741 return X86EMUL_PROPAGATE_FAULT;
3743 /* For APIC access vmexit */
3744 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3747 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3748 == X86EMUL_CONTINUE)
3749 return X86EMUL_CONTINUE;
3753 * Is this MMIO handled locally?
3755 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3756 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3757 return X86EMUL_CONTINUE;
3760 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3762 vcpu->mmio_needed = 1;
3763 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3764 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3765 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3766 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3768 return X86EMUL_IO_NEEDED;
3771 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3772 const void *val, int bytes)
3776 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3779 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3783 static int emulator_write_emulated_onepage(unsigned long addr,
3786 unsigned int *error_code,
3787 struct kvm_vcpu *vcpu)
3791 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3793 if (gpa == UNMAPPED_GVA)
3794 return X86EMUL_PROPAGATE_FAULT;
3796 /* For APIC access vmexit */
3797 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3800 if (emulator_write_phys(vcpu, gpa, val, bytes))
3801 return X86EMUL_CONTINUE;
3804 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3806 * Is this MMIO handled locally?
3808 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3809 return X86EMUL_CONTINUE;
3811 vcpu->mmio_needed = 1;
3812 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3813 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3814 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3815 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3816 memcpy(vcpu->run->mmio.data, val, bytes);
3818 return X86EMUL_CONTINUE;
3821 int emulator_write_emulated(unsigned long addr,
3824 unsigned int *error_code,
3825 struct kvm_vcpu *vcpu)
3827 /* Crossing a page boundary? */
3828 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3831 now = -addr & ~PAGE_MASK;
3832 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3834 if (rc != X86EMUL_CONTINUE)
3840 return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3844 #define CMPXCHG_TYPE(t, ptr, old, new) \
3845 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3847 #ifdef CONFIG_X86_64
3848 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3850 # define CMPXCHG64(ptr, old, new) \
3851 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3854 static int emulator_cmpxchg_emulated(unsigned long addr,
3858 unsigned int *error_code,
3859 struct kvm_vcpu *vcpu)
3866 /* guests cmpxchg8b have to be emulated atomically */
3867 if (bytes > 8 || (bytes & (bytes - 1)))
3870 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3872 if (gpa == UNMAPPED_GVA ||
3873 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3876 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3879 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3880 if (is_error_page(page)) {
3881 kvm_release_page_clean(page);
3885 kaddr = kmap_atomic(page, KM_USER0);
3886 kaddr += offset_in_page(gpa);
3889 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3892 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3895 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3898 exchanged = CMPXCHG64(kaddr, old, new);
3903 kunmap_atomic(kaddr, KM_USER0);
3904 kvm_release_page_dirty(page);
3907 return X86EMUL_CMPXCHG_FAILED;
3909 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3911 return X86EMUL_CONTINUE;
3914 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3916 return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3919 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3921 /* TODO: String I/O for in kernel device */
3924 if (vcpu->arch.pio.in)
3925 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3926 vcpu->arch.pio.size, pd);
3928 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3929 vcpu->arch.pio.port, vcpu->arch.pio.size,
3935 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3936 unsigned int count, struct kvm_vcpu *vcpu)
3938 if (vcpu->arch.pio.count)
3941 trace_kvm_pio(0, port, size, 1);
3943 vcpu->arch.pio.port = port;
3944 vcpu->arch.pio.in = 1;
3945 vcpu->arch.pio.count = count;
3946 vcpu->arch.pio.size = size;
3948 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3950 memcpy(val, vcpu->arch.pio_data, size * count);
3951 vcpu->arch.pio.count = 0;
3955 vcpu->run->exit_reason = KVM_EXIT_IO;
3956 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3957 vcpu->run->io.size = size;
3958 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3959 vcpu->run->io.count = count;
3960 vcpu->run->io.port = port;
3965 static int emulator_pio_out_emulated(int size, unsigned short port,
3966 const void *val, unsigned int count,
3967 struct kvm_vcpu *vcpu)
3969 trace_kvm_pio(1, port, size, 1);
3971 vcpu->arch.pio.port = port;
3972 vcpu->arch.pio.in = 0;
3973 vcpu->arch.pio.count = count;
3974 vcpu->arch.pio.size = size;
3976 memcpy(vcpu->arch.pio_data, val, size * count);
3978 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3979 vcpu->arch.pio.count = 0;
3983 vcpu->run->exit_reason = KVM_EXIT_IO;
3984 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3985 vcpu->run->io.size = size;
3986 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3987 vcpu->run->io.count = count;
3988 vcpu->run->io.port = port;
3993 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3995 return kvm_x86_ops->get_segment_base(vcpu, seg);
3998 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
4000 kvm_mmu_invlpg(vcpu, address);
4001 return X86EMUL_CONTINUE;
4004 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4006 if (!need_emulate_wbinvd(vcpu))
4007 return X86EMUL_CONTINUE;
4009 if (kvm_x86_ops->has_wbinvd_exit()) {
4010 int cpu = get_cpu();
4012 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4013 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4014 wbinvd_ipi, NULL, 1);
4016 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4019 return X86EMUL_CONTINUE;
4021 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4023 int emulate_clts(struct kvm_vcpu *vcpu)
4025 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
4026 kvm_x86_ops->fpu_activate(vcpu);
4027 return X86EMUL_CONTINUE;
4030 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
4032 return _kvm_get_dr(vcpu, dr, dest);
4035 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
4038 return __kvm_set_dr(vcpu, dr, value);
4041 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4043 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4046 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
4048 unsigned long value;
4052 value = kvm_read_cr0(vcpu);
4055 value = vcpu->arch.cr2;
4058 value = vcpu->arch.cr3;
4061 value = kvm_read_cr4(vcpu);
4064 value = kvm_get_cr8(vcpu);
4067 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4074 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
4080 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4083 vcpu->arch.cr2 = val;
4086 res = kvm_set_cr3(vcpu, val);
4089 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4092 res = __kvm_set_cr8(vcpu, val & 0xfUL);
4095 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4102 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4104 return kvm_x86_ops->get_cpl(vcpu);
4107 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4109 kvm_x86_ops->get_gdt(vcpu, dt);
4112 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4114 kvm_x86_ops->get_idt(vcpu, dt);
4117 static unsigned long emulator_get_cached_segment_base(int seg,
4118 struct kvm_vcpu *vcpu)
4120 return get_segment_base(vcpu, seg);
4123 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
4124 struct kvm_vcpu *vcpu)
4126 struct kvm_segment var;
4128 kvm_get_segment(vcpu, &var, seg);
4135 set_desc_limit(desc, var.limit);
4136 set_desc_base(desc, (unsigned long)var.base);
4137 desc->type = var.type;
4139 desc->dpl = var.dpl;
4140 desc->p = var.present;
4141 desc->avl = var.avl;
4149 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4150 struct kvm_vcpu *vcpu)
4152 struct kvm_segment var;
4154 /* needed to preserve selector */
4155 kvm_get_segment(vcpu, &var, seg);
4157 var.base = get_desc_base(desc);
4158 var.limit = get_desc_limit(desc);
4160 var.limit = (var.limit << 12) | 0xfff;
4161 var.type = desc->type;
4162 var.present = desc->p;
4163 var.dpl = desc->dpl;
4168 var.avl = desc->avl;
4169 var.present = desc->p;
4170 var.unusable = !var.present;
4173 kvm_set_segment(vcpu, &var, seg);
4177 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4179 struct kvm_segment kvm_seg;
4181 kvm_get_segment(vcpu, &kvm_seg, seg);
4182 return kvm_seg.selector;
4185 static void emulator_set_segment_selector(u16 sel, int seg,
4186 struct kvm_vcpu *vcpu)
4188 struct kvm_segment kvm_seg;
4190 kvm_get_segment(vcpu, &kvm_seg, seg);
4191 kvm_seg.selector = sel;
4192 kvm_set_segment(vcpu, &kvm_seg, seg);
4195 static struct x86_emulate_ops emulate_ops = {
4196 .read_std = kvm_read_guest_virt_system,
4197 .write_std = kvm_write_guest_virt_system,
4198 .fetch = kvm_fetch_guest_virt,
4199 .read_emulated = emulator_read_emulated,
4200 .write_emulated = emulator_write_emulated,
4201 .cmpxchg_emulated = emulator_cmpxchg_emulated,
4202 .pio_in_emulated = emulator_pio_in_emulated,
4203 .pio_out_emulated = emulator_pio_out_emulated,
4204 .get_cached_descriptor = emulator_get_cached_descriptor,
4205 .set_cached_descriptor = emulator_set_cached_descriptor,
4206 .get_segment_selector = emulator_get_segment_selector,
4207 .set_segment_selector = emulator_set_segment_selector,
4208 .get_cached_segment_base = emulator_get_cached_segment_base,
4209 .get_gdt = emulator_get_gdt,
4210 .get_idt = emulator_get_idt,
4211 .get_cr = emulator_get_cr,
4212 .set_cr = emulator_set_cr,
4213 .cpl = emulator_get_cpl,
4214 .get_dr = emulator_get_dr,
4215 .set_dr = emulator_set_dr,
4216 .set_msr = kvm_set_msr,
4217 .get_msr = kvm_get_msr,
4220 static void cache_all_regs(struct kvm_vcpu *vcpu)
4222 kvm_register_read(vcpu, VCPU_REGS_RAX);
4223 kvm_register_read(vcpu, VCPU_REGS_RSP);
4224 kvm_register_read(vcpu, VCPU_REGS_RIP);
4225 vcpu->arch.regs_dirty = ~0;
4228 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4230 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4232 * an sti; sti; sequence only disable interrupts for the first
4233 * instruction. So, if the last instruction, be it emulated or
4234 * not, left the system with the INT_STI flag enabled, it
4235 * means that the last instruction is an sti. We should not
4236 * leave the flag on in this case. The same goes for mov ss
4238 if (!(int_shadow & mask))
4239 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4242 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4244 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4245 if (ctxt->exception == PF_VECTOR)
4246 kvm_propagate_fault(vcpu);
4247 else if (ctxt->error_code_valid)
4248 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
4250 kvm_queue_exception(vcpu, ctxt->exception);
4253 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4255 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4258 cache_all_regs(vcpu);
4260 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4262 vcpu->arch.emulate_ctxt.vcpu = vcpu;
4263 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4264 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4265 vcpu->arch.emulate_ctxt.mode =
4266 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4267 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4268 ? X86EMUL_MODE_VM86 : cs_l
4269 ? X86EMUL_MODE_PROT64 : cs_db
4270 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4271 memset(c, 0, sizeof(struct decode_cache));
4272 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4275 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq)
4277 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4280 init_emulate_ctxt(vcpu);
4282 vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4283 vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4284 vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip;
4285 ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4287 if (ret != X86EMUL_CONTINUE)
4288 return EMULATE_FAIL;
4290 vcpu->arch.emulate_ctxt.eip = c->eip;
4291 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4292 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4293 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4295 if (irq == NMI_VECTOR)
4296 vcpu->arch.nmi_pending = false;
4298 vcpu->arch.interrupt.pending = false;
4300 return EMULATE_DONE;
4302 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4304 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4306 ++vcpu->stat.insn_emulation_fail;
4307 trace_kvm_emulate_insn_failed(vcpu);
4308 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4309 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4310 vcpu->run->internal.ndata = 0;
4311 kvm_queue_exception(vcpu, UD_VECTOR);
4312 return EMULATE_FAIL;
4315 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4323 * if emulation was due to access to shadowed page table
4324 * and it failed try to unshadow page and re-entetr the
4325 * guest to let CPU execute the instruction.
4327 if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4330 gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4332 if (gpa == UNMAPPED_GVA)
4333 return true; /* let cpu generate fault */
4335 if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4341 int emulate_instruction(struct kvm_vcpu *vcpu,
4347 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4349 kvm_clear_exception_queue(vcpu);
4350 vcpu->arch.mmio_fault_cr2 = cr2;
4352 * TODO: fix emulate.c to use guest_read/write_register
4353 * instead of direct ->regs accesses, can save hundred cycles
4354 * on Intel for instructions that don't read/change RSP, for
4357 cache_all_regs(vcpu);
4359 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4360 init_emulate_ctxt(vcpu);
4361 vcpu->arch.emulate_ctxt.interruptibility = 0;
4362 vcpu->arch.emulate_ctxt.exception = -1;
4363 vcpu->arch.emulate_ctxt.perm_ok = false;
4365 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4366 if (r == X86EMUL_PROPAGATE_FAULT)
4369 trace_kvm_emulate_insn_start(vcpu);
4371 /* Only allow emulation of specific instructions on #UD
4372 * (namely VMMCALL, sysenter, sysexit, syscall)*/
4373 if (emulation_type & EMULTYPE_TRAP_UD) {
4375 return EMULATE_FAIL;
4377 case 0x01: /* VMMCALL */
4378 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4379 return EMULATE_FAIL;
4381 case 0x34: /* sysenter */
4382 case 0x35: /* sysexit */
4383 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4384 return EMULATE_FAIL;
4386 case 0x05: /* syscall */
4387 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4388 return EMULATE_FAIL;
4391 return EMULATE_FAIL;
4394 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4395 return EMULATE_FAIL;
4398 ++vcpu->stat.insn_emulation;
4400 if (reexecute_instruction(vcpu, cr2))
4401 return EMULATE_DONE;
4402 if (emulation_type & EMULTYPE_SKIP)
4403 return EMULATE_FAIL;
4404 return handle_emulation_failure(vcpu);
4408 if (emulation_type & EMULTYPE_SKIP) {
4409 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4410 return EMULATE_DONE;
4413 /* this is needed for vmware backdor interface to work since it
4414 changes registers values during IO operation */
4415 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4418 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4420 if (r == EMULATION_FAILED) {
4421 if (reexecute_instruction(vcpu, cr2))
4422 return EMULATE_DONE;
4424 return handle_emulation_failure(vcpu);
4428 if (vcpu->arch.emulate_ctxt.exception >= 0) {
4429 inject_emulated_exception(vcpu);
4431 } else if (vcpu->arch.pio.count) {
4432 if (!vcpu->arch.pio.in)
4433 vcpu->arch.pio.count = 0;
4434 r = EMULATE_DO_MMIO;
4435 } else if (vcpu->mmio_needed) {
4436 if (vcpu->mmio_is_write)
4437 vcpu->mmio_needed = 0;
4438 r = EMULATE_DO_MMIO;
4439 } else if (r == EMULATION_RESTART)
4444 toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4445 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4446 kvm_make_request(KVM_REQ_EVENT, vcpu);
4447 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4448 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4452 EXPORT_SYMBOL_GPL(emulate_instruction);
4454 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4456 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4457 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4458 /* do not return to emulator after return from userspace */
4459 vcpu->arch.pio.count = 0;
4462 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4464 static void tsc_bad(void *info)
4466 __get_cpu_var(cpu_tsc_khz) = 0;
4469 static void tsc_khz_changed(void *data)
4471 struct cpufreq_freqs *freq = data;
4472 unsigned long khz = 0;
4476 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4477 khz = cpufreq_quick_get(raw_smp_processor_id());
4480 __get_cpu_var(cpu_tsc_khz) = khz;
4483 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4486 struct cpufreq_freqs *freq = data;
4488 struct kvm_vcpu *vcpu;
4489 int i, send_ipi = 0;
4492 * We allow guests to temporarily run on slowing clocks,
4493 * provided we notify them after, or to run on accelerating
4494 * clocks, provided we notify them before. Thus time never
4497 * However, we have a problem. We can't atomically update
4498 * the frequency of a given CPU from this function; it is
4499 * merely a notifier, which can be called from any CPU.
4500 * Changing the TSC frequency at arbitrary points in time
4501 * requires a recomputation of local variables related to
4502 * the TSC for each VCPU. We must flag these local variables
4503 * to be updated and be sure the update takes place with the
4504 * new frequency before any guests proceed.
4506 * Unfortunately, the combination of hotplug CPU and frequency
4507 * change creates an intractable locking scenario; the order
4508 * of when these callouts happen is undefined with respect to
4509 * CPU hotplug, and they can race with each other. As such,
4510 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4511 * undefined; you can actually have a CPU frequency change take
4512 * place in between the computation of X and the setting of the
4513 * variable. To protect against this problem, all updates of
4514 * the per_cpu tsc_khz variable are done in an interrupt
4515 * protected IPI, and all callers wishing to update the value
4516 * must wait for a synchronous IPI to complete (which is trivial
4517 * if the caller is on the CPU already). This establishes the
4518 * necessary total order on variable updates.
4520 * Note that because a guest time update may take place
4521 * anytime after the setting of the VCPU's request bit, the
4522 * correct TSC value must be set before the request. However,
4523 * to ensure the update actually makes it to any guest which
4524 * starts running in hardware virtualization between the set
4525 * and the acquisition of the spinlock, we must also ping the
4526 * CPU after setting the request bit.
4530 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4532 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4535 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4537 spin_lock(&kvm_lock);
4538 list_for_each_entry(kvm, &vm_list, vm_list) {
4539 kvm_for_each_vcpu(i, vcpu, kvm) {
4540 if (vcpu->cpu != freq->cpu)
4542 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4543 if (vcpu->cpu != smp_processor_id())
4547 spin_unlock(&kvm_lock);
4549 if (freq->old < freq->new && send_ipi) {
4551 * We upscale the frequency. Must make the guest
4552 * doesn't see old kvmclock values while running with
4553 * the new frequency, otherwise we risk the guest sees
4554 * time go backwards.
4556 * In case we update the frequency for another cpu
4557 * (which might be in guest context) send an interrupt
4558 * to kick the cpu out of guest context. Next time
4559 * guest context is entered kvmclock will be updated,
4560 * so the guest will not see stale values.
4562 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4567 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4568 .notifier_call = kvmclock_cpufreq_notifier
4571 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4572 unsigned long action, void *hcpu)
4574 unsigned int cpu = (unsigned long)hcpu;
4578 case CPU_DOWN_FAILED:
4579 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4581 case CPU_DOWN_PREPARE:
4582 smp_call_function_single(cpu, tsc_bad, NULL, 1);
4588 static struct notifier_block kvmclock_cpu_notifier_block = {
4589 .notifier_call = kvmclock_cpu_notifier,
4590 .priority = -INT_MAX
4593 static void kvm_timer_init(void)
4597 max_tsc_khz = tsc_khz;
4598 register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4599 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4600 #ifdef CONFIG_CPU_FREQ
4601 struct cpufreq_policy policy;
4602 memset(&policy, 0, sizeof(policy));
4604 cpufreq_get_policy(&policy, cpu);
4605 if (policy.cpuinfo.max_freq)
4606 max_tsc_khz = policy.cpuinfo.max_freq;
4609 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4610 CPUFREQ_TRANSITION_NOTIFIER);
4612 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4613 for_each_online_cpu(cpu)
4614 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4617 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4619 static int kvm_is_in_guest(void)
4621 return percpu_read(current_vcpu) != NULL;
4624 static int kvm_is_user_mode(void)
4628 if (percpu_read(current_vcpu))
4629 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4631 return user_mode != 0;
4634 static unsigned long kvm_get_guest_ip(void)
4636 unsigned long ip = 0;
4638 if (percpu_read(current_vcpu))
4639 ip = kvm_rip_read(percpu_read(current_vcpu));
4644 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4645 .is_in_guest = kvm_is_in_guest,
4646 .is_user_mode = kvm_is_user_mode,
4647 .get_guest_ip = kvm_get_guest_ip,
4650 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4652 percpu_write(current_vcpu, vcpu);
4654 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4656 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4658 percpu_write(current_vcpu, NULL);
4660 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4662 int kvm_arch_init(void *opaque)
4665 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4668 printk(KERN_ERR "kvm: already loaded the other module\n");
4673 if (!ops->cpu_has_kvm_support()) {
4674 printk(KERN_ERR "kvm: no hardware support\n");
4678 if (ops->disabled_by_bios()) {
4679 printk(KERN_ERR "kvm: disabled by bios\n");
4684 r = kvm_mmu_module_init();
4688 kvm_init_msr_list();
4691 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4692 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4693 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4697 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4700 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4708 void kvm_arch_exit(void)
4710 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4712 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4713 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4714 CPUFREQ_TRANSITION_NOTIFIER);
4715 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4717 kvm_mmu_module_exit();
4720 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4722 ++vcpu->stat.halt_exits;
4723 if (irqchip_in_kernel(vcpu->kvm)) {
4724 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4727 vcpu->run->exit_reason = KVM_EXIT_HLT;
4731 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4733 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4736 if (is_long_mode(vcpu))
4739 return a0 | ((gpa_t)a1 << 32);
4742 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4744 u64 param, ingpa, outgpa, ret;
4745 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4746 bool fast, longmode;
4750 * hypercall generates UD from non zero cpl and real mode
4753 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4754 kvm_queue_exception(vcpu, UD_VECTOR);
4758 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4759 longmode = is_long_mode(vcpu) && cs_l == 1;
4762 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4763 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4764 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4765 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4766 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4767 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4769 #ifdef CONFIG_X86_64
4771 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4772 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4773 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4777 code = param & 0xffff;
4778 fast = (param >> 16) & 0x1;
4779 rep_cnt = (param >> 32) & 0xfff;
4780 rep_idx = (param >> 48) & 0xfff;
4782 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4785 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4786 kvm_vcpu_on_spin(vcpu);
4789 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4793 ret = res | (((u64)rep_done & 0xfff) << 32);
4795 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4797 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4798 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4804 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4806 unsigned long nr, a0, a1, a2, a3, ret;
4809 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4810 return kvm_hv_hypercall(vcpu);
4812 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4813 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4814 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4815 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4816 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4818 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4820 if (!is_long_mode(vcpu)) {
4828 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4834 case KVM_HC_VAPIC_POLL_IRQ:
4838 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4845 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4846 ++vcpu->stat.hypercalls;
4849 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4851 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4853 char instruction[3];
4854 unsigned long rip = kvm_rip_read(vcpu);
4857 * Blow out the MMU to ensure that no other VCPU has an active mapping
4858 * to ensure that the updated hypercall appears atomically across all
4861 kvm_mmu_zap_all(vcpu->kvm);
4863 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4865 return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4868 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4870 struct desc_ptr dt = { limit, base };
4872 kvm_x86_ops->set_gdt(vcpu, &dt);
4875 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4877 struct desc_ptr dt = { limit, base };
4879 kvm_x86_ops->set_idt(vcpu, &dt);
4882 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4884 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4885 int j, nent = vcpu->arch.cpuid_nent;
4887 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4888 /* when no next entry is found, the current entry[i] is reselected */
4889 for (j = i + 1; ; j = (j + 1) % nent) {
4890 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4891 if (ej->function == e->function) {
4892 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4896 return 0; /* silence gcc, even though control never reaches here */
4899 /* find an entry with matching function, matching index (if needed), and that
4900 * should be read next (if it's stateful) */
4901 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4902 u32 function, u32 index)
4904 if (e->function != function)
4906 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4908 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4909 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4914 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4915 u32 function, u32 index)
4918 struct kvm_cpuid_entry2 *best = NULL;
4920 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4921 struct kvm_cpuid_entry2 *e;
4923 e = &vcpu->arch.cpuid_entries[i];
4924 if (is_matching_cpuid_entry(e, function, index)) {
4925 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4926 move_to_next_stateful_cpuid_entry(vcpu, i);
4931 * Both basic or both extended?
4933 if (((e->function ^ function) & 0x80000000) == 0)
4934 if (!best || e->function > best->function)
4939 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4941 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4943 struct kvm_cpuid_entry2 *best;
4945 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4946 if (!best || best->eax < 0x80000008)
4948 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4950 return best->eax & 0xff;
4955 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4957 u32 function, index;
4958 struct kvm_cpuid_entry2 *best;
4960 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4961 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4962 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4963 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4964 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4965 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4966 best = kvm_find_cpuid_entry(vcpu, function, index);
4968 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4969 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4970 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4971 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4973 kvm_x86_ops->skip_emulated_instruction(vcpu);
4974 trace_kvm_cpuid(function,
4975 kvm_register_read(vcpu, VCPU_REGS_RAX),
4976 kvm_register_read(vcpu, VCPU_REGS_RBX),
4977 kvm_register_read(vcpu, VCPU_REGS_RCX),
4978 kvm_register_read(vcpu, VCPU_REGS_RDX));
4980 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4983 * Check if userspace requested an interrupt window, and that the
4984 * interrupt window is open.
4986 * No need to exit to userspace if we already have an interrupt queued.
4988 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4990 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4991 vcpu->run->request_interrupt_window &&
4992 kvm_arch_interrupt_allowed(vcpu));
4995 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4997 struct kvm_run *kvm_run = vcpu->run;
4999 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5000 kvm_run->cr8 = kvm_get_cr8(vcpu);
5001 kvm_run->apic_base = kvm_get_apic_base(vcpu);
5002 if (irqchip_in_kernel(vcpu->kvm))
5003 kvm_run->ready_for_interrupt_injection = 1;
5005 kvm_run->ready_for_interrupt_injection =
5006 kvm_arch_interrupt_allowed(vcpu) &&
5007 !kvm_cpu_has_interrupt(vcpu) &&
5008 !kvm_event_needs_reinjection(vcpu);
5011 static void vapic_enter(struct kvm_vcpu *vcpu)
5013 struct kvm_lapic *apic = vcpu->arch.apic;
5016 if (!apic || !apic->vapic_addr)
5019 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5021 vcpu->arch.apic->vapic_page = page;
5024 static void vapic_exit(struct kvm_vcpu *vcpu)
5026 struct kvm_lapic *apic = vcpu->arch.apic;
5029 if (!apic || !apic->vapic_addr)
5032 idx = srcu_read_lock(&vcpu->kvm->srcu);
5033 kvm_release_page_dirty(apic->vapic_page);
5034 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5035 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5038 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5042 if (!kvm_x86_ops->update_cr8_intercept)
5045 if (!vcpu->arch.apic)
5048 if (!vcpu->arch.apic->vapic_addr)
5049 max_irr = kvm_lapic_find_highest_irr(vcpu);
5056 tpr = kvm_lapic_get_cr8(vcpu);
5058 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5061 static void inject_pending_event(struct kvm_vcpu *vcpu)
5063 /* try to reinject previous events if any */
5064 if (vcpu->arch.exception.pending) {
5065 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5066 vcpu->arch.exception.has_error_code,
5067 vcpu->arch.exception.error_code);
5068 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5069 vcpu->arch.exception.has_error_code,
5070 vcpu->arch.exception.error_code,
5071 vcpu->arch.exception.reinject);
5075 if (vcpu->arch.nmi_injected) {
5076 kvm_x86_ops->set_nmi(vcpu);
5080 if (vcpu->arch.interrupt.pending) {
5081 kvm_x86_ops->set_irq(vcpu);
5085 /* try to inject new event if pending */
5086 if (vcpu->arch.nmi_pending) {
5087 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5088 vcpu->arch.nmi_pending = false;
5089 vcpu->arch.nmi_injected = true;
5090 kvm_x86_ops->set_nmi(vcpu);
5092 } else if (kvm_cpu_has_interrupt(vcpu)) {
5093 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5094 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5096 kvm_x86_ops->set_irq(vcpu);
5101 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5103 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5104 !vcpu->guest_xcr0_loaded) {
5105 /* kvm_set_xcr() also depends on this */
5106 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5107 vcpu->guest_xcr0_loaded = 1;
5111 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5113 if (vcpu->guest_xcr0_loaded) {
5114 if (vcpu->arch.xcr0 != host_xcr0)
5115 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5116 vcpu->guest_xcr0_loaded = 0;
5120 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5123 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5124 vcpu->run->request_interrupt_window;
5126 if (vcpu->requests) {
5127 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5128 kvm_mmu_unload(vcpu);
5129 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5130 __kvm_migrate_timers(vcpu);
5131 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5132 r = kvm_guest_time_update(vcpu);
5136 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5137 kvm_mmu_sync_roots(vcpu);
5138 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5139 kvm_x86_ops->tlb_flush(vcpu);
5140 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5141 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5145 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5146 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5150 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5151 vcpu->fpu_active = 0;
5152 kvm_x86_ops->fpu_deactivate(vcpu);
5154 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5155 /* Page is swapped out. Do synthetic halt */
5156 vcpu->arch.apf.halted = true;
5162 r = kvm_mmu_reload(vcpu);
5166 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5167 inject_pending_event(vcpu);
5169 /* enable NMI/IRQ window open exits if needed */
5170 if (vcpu->arch.nmi_pending)
5171 kvm_x86_ops->enable_nmi_window(vcpu);
5172 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5173 kvm_x86_ops->enable_irq_window(vcpu);
5175 if (kvm_lapic_enabled(vcpu)) {
5176 update_cr8_intercept(vcpu);
5177 kvm_lapic_sync_to_vapic(vcpu);
5183 kvm_x86_ops->prepare_guest_switch(vcpu);
5184 if (vcpu->fpu_active)
5185 kvm_load_guest_fpu(vcpu);
5186 kvm_load_guest_xcr0(vcpu);
5188 atomic_set(&vcpu->guest_mode, 1);
5191 local_irq_disable();
5193 if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
5194 || need_resched() || signal_pending(current)) {
5195 atomic_set(&vcpu->guest_mode, 0);
5199 kvm_x86_ops->cancel_injection(vcpu);
5204 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5208 if (unlikely(vcpu->arch.switch_db_regs)) {
5210 set_debugreg(vcpu->arch.eff_db[0], 0);
5211 set_debugreg(vcpu->arch.eff_db[1], 1);
5212 set_debugreg(vcpu->arch.eff_db[2], 2);
5213 set_debugreg(vcpu->arch.eff_db[3], 3);
5216 trace_kvm_entry(vcpu->vcpu_id);
5217 kvm_x86_ops->run(vcpu);
5220 * If the guest has used debug registers, at least dr7
5221 * will be disabled while returning to the host.
5222 * If we don't have active breakpoints in the host, we don't
5223 * care about the messed up debug address registers. But if
5224 * we have some of them active, restore the old state.
5226 if (hw_breakpoint_active())
5227 hw_breakpoint_restore();
5229 kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5231 atomic_set(&vcpu->guest_mode, 0);
5238 * We must have an instruction between local_irq_enable() and
5239 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5240 * the interrupt shadow. The stat.exits increment will do nicely.
5241 * But we need to prevent reordering, hence this barrier():
5249 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5252 * Profile KVM exit RIPs:
5254 if (unlikely(prof_on == KVM_PROFILING)) {
5255 unsigned long rip = kvm_rip_read(vcpu);
5256 profile_hit(KVM_PROFILING, (void *)rip);
5260 kvm_lapic_sync_from_vapic(vcpu);
5262 r = kvm_x86_ops->handle_exit(vcpu);
5268 static int __vcpu_run(struct kvm_vcpu *vcpu)
5271 struct kvm *kvm = vcpu->kvm;
5273 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5274 pr_debug("vcpu %d received sipi with vector # %x\n",
5275 vcpu->vcpu_id, vcpu->arch.sipi_vector);
5276 kvm_lapic_reset(vcpu);
5277 r = kvm_arch_vcpu_reset(vcpu);
5280 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5283 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5288 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5289 !vcpu->arch.apf.halted)
5290 r = vcpu_enter_guest(vcpu);
5292 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5293 kvm_vcpu_block(vcpu);
5294 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5295 if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5297 switch(vcpu->arch.mp_state) {
5298 case KVM_MP_STATE_HALTED:
5299 vcpu->arch.mp_state =
5300 KVM_MP_STATE_RUNNABLE;
5301 case KVM_MP_STATE_RUNNABLE:
5302 vcpu->arch.apf.halted = false;
5304 case KVM_MP_STATE_SIPI_RECEIVED:
5315 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5316 if (kvm_cpu_has_pending_timer(vcpu))
5317 kvm_inject_pending_timer_irqs(vcpu);
5319 if (dm_request_for_irq_injection(vcpu)) {
5321 vcpu->run->exit_reason = KVM_EXIT_INTR;
5322 ++vcpu->stat.request_irq_exits;
5325 kvm_check_async_pf_completion(vcpu);
5327 if (signal_pending(current)) {
5329 vcpu->run->exit_reason = KVM_EXIT_INTR;
5330 ++vcpu->stat.signal_exits;
5332 if (need_resched()) {
5333 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5335 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5339 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5346 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5351 if (vcpu->sigset_active)
5352 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5354 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5355 kvm_vcpu_block(vcpu);
5356 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5361 /* re-sync apic's tpr */
5362 if (!irqchip_in_kernel(vcpu->kvm))
5363 kvm_set_cr8(vcpu, kvm_run->cr8);
5365 if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5366 if (vcpu->mmio_needed) {
5367 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5368 vcpu->mmio_read_completed = 1;
5369 vcpu->mmio_needed = 0;
5371 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5372 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5373 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5374 if (r != EMULATE_DONE) {
5379 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5380 kvm_register_write(vcpu, VCPU_REGS_RAX,
5381 kvm_run->hypercall.ret);
5383 r = __vcpu_run(vcpu);
5386 post_kvm_run_save(vcpu);
5387 if (vcpu->sigset_active)
5388 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5393 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5395 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5396 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5397 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5398 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5399 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5400 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5401 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5402 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5403 #ifdef CONFIG_X86_64
5404 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5405 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5406 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5407 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5408 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5409 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5410 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5411 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5414 regs->rip = kvm_rip_read(vcpu);
5415 regs->rflags = kvm_get_rflags(vcpu);
5420 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5422 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5423 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5424 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5425 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5426 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5427 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5428 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5429 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5430 #ifdef CONFIG_X86_64
5431 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5432 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5433 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5434 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5435 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5436 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5437 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5438 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5441 kvm_rip_write(vcpu, regs->rip);
5442 kvm_set_rflags(vcpu, regs->rflags);
5444 vcpu->arch.exception.pending = false;
5446 kvm_make_request(KVM_REQ_EVENT, vcpu);
5451 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5453 struct kvm_segment cs;
5455 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5459 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5461 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5462 struct kvm_sregs *sregs)
5466 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5467 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5468 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5469 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5470 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5471 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5473 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5474 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5476 kvm_x86_ops->get_idt(vcpu, &dt);
5477 sregs->idt.limit = dt.size;
5478 sregs->idt.base = dt.address;
5479 kvm_x86_ops->get_gdt(vcpu, &dt);
5480 sregs->gdt.limit = dt.size;
5481 sregs->gdt.base = dt.address;
5483 sregs->cr0 = kvm_read_cr0(vcpu);
5484 sregs->cr2 = vcpu->arch.cr2;
5485 sregs->cr3 = vcpu->arch.cr3;
5486 sregs->cr4 = kvm_read_cr4(vcpu);
5487 sregs->cr8 = kvm_get_cr8(vcpu);
5488 sregs->efer = vcpu->arch.efer;
5489 sregs->apic_base = kvm_get_apic_base(vcpu);
5491 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5493 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5494 set_bit(vcpu->arch.interrupt.nr,
5495 (unsigned long *)sregs->interrupt_bitmap);
5500 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5501 struct kvm_mp_state *mp_state)
5503 mp_state->mp_state = vcpu->arch.mp_state;
5507 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5508 struct kvm_mp_state *mp_state)
5510 vcpu->arch.mp_state = mp_state->mp_state;
5511 kvm_make_request(KVM_REQ_EVENT, vcpu);
5515 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5516 bool has_error_code, u32 error_code)
5518 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5521 init_emulate_ctxt(vcpu);
5523 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5524 tss_selector, reason, has_error_code,
5528 return EMULATE_FAIL;
5530 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5531 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5532 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5533 kvm_make_request(KVM_REQ_EVENT, vcpu);
5534 return EMULATE_DONE;
5536 EXPORT_SYMBOL_GPL(kvm_task_switch);
5538 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5539 struct kvm_sregs *sregs)
5541 int mmu_reset_needed = 0;
5542 int pending_vec, max_bits;
5545 dt.size = sregs->idt.limit;
5546 dt.address = sregs->idt.base;
5547 kvm_x86_ops->set_idt(vcpu, &dt);
5548 dt.size = sregs->gdt.limit;
5549 dt.address = sregs->gdt.base;
5550 kvm_x86_ops->set_gdt(vcpu, &dt);
5552 vcpu->arch.cr2 = sregs->cr2;
5553 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5554 vcpu->arch.cr3 = sregs->cr3;
5556 kvm_set_cr8(vcpu, sregs->cr8);
5558 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5559 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5560 kvm_set_apic_base(vcpu, sregs->apic_base);
5562 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5563 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5564 vcpu->arch.cr0 = sregs->cr0;
5566 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5567 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5568 if (sregs->cr4 & X86_CR4_OSXSAVE)
5570 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5571 load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3);
5572 mmu_reset_needed = 1;
5575 if (mmu_reset_needed)
5576 kvm_mmu_reset_context(vcpu);
5578 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5579 pending_vec = find_first_bit(
5580 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5581 if (pending_vec < max_bits) {
5582 kvm_queue_interrupt(vcpu, pending_vec, false);
5583 pr_debug("Set back pending irq %d\n", pending_vec);
5584 if (irqchip_in_kernel(vcpu->kvm))
5585 kvm_pic_clear_isr_ack(vcpu->kvm);
5588 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5589 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5590 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5591 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5592 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5593 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5595 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5596 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5598 update_cr8_intercept(vcpu);
5600 /* Older userspace won't unhalt the vcpu on reset. */
5601 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5602 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5604 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5606 kvm_make_request(KVM_REQ_EVENT, vcpu);
5611 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5612 struct kvm_guest_debug *dbg)
5614 unsigned long rflags;
5617 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5619 if (vcpu->arch.exception.pending)
5621 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5622 kvm_queue_exception(vcpu, DB_VECTOR);
5624 kvm_queue_exception(vcpu, BP_VECTOR);
5628 * Read rflags as long as potentially injected trace flags are still
5631 rflags = kvm_get_rflags(vcpu);
5633 vcpu->guest_debug = dbg->control;
5634 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5635 vcpu->guest_debug = 0;
5637 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5638 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5639 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5640 vcpu->arch.switch_db_regs =
5641 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5643 for (i = 0; i < KVM_NR_DB_REGS; i++)
5644 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5645 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5648 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5649 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5650 get_segment_base(vcpu, VCPU_SREG_CS);
5653 * Trigger an rflags update that will inject or remove the trace
5656 kvm_set_rflags(vcpu, rflags);
5658 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5668 * Translate a guest virtual address to a guest physical address.
5670 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5671 struct kvm_translation *tr)
5673 unsigned long vaddr = tr->linear_address;
5677 idx = srcu_read_lock(&vcpu->kvm->srcu);
5678 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5679 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5680 tr->physical_address = gpa;
5681 tr->valid = gpa != UNMAPPED_GVA;
5688 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5690 struct i387_fxsave_struct *fxsave =
5691 &vcpu->arch.guest_fpu.state->fxsave;
5693 memcpy(fpu->fpr, fxsave->st_space, 128);
5694 fpu->fcw = fxsave->cwd;
5695 fpu->fsw = fxsave->swd;
5696 fpu->ftwx = fxsave->twd;
5697 fpu->last_opcode = fxsave->fop;
5698 fpu->last_ip = fxsave->rip;
5699 fpu->last_dp = fxsave->rdp;
5700 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5705 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5707 struct i387_fxsave_struct *fxsave =
5708 &vcpu->arch.guest_fpu.state->fxsave;
5710 memcpy(fxsave->st_space, fpu->fpr, 128);
5711 fxsave->cwd = fpu->fcw;
5712 fxsave->swd = fpu->fsw;
5713 fxsave->twd = fpu->ftwx;
5714 fxsave->fop = fpu->last_opcode;
5715 fxsave->rip = fpu->last_ip;
5716 fxsave->rdp = fpu->last_dp;
5717 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5722 int fx_init(struct kvm_vcpu *vcpu)
5726 err = fpu_alloc(&vcpu->arch.guest_fpu);
5730 fpu_finit(&vcpu->arch.guest_fpu);
5733 * Ensure guest xcr0 is valid for loading
5735 vcpu->arch.xcr0 = XSTATE_FP;
5737 vcpu->arch.cr0 |= X86_CR0_ET;
5741 EXPORT_SYMBOL_GPL(fx_init);
5743 static void fx_free(struct kvm_vcpu *vcpu)
5745 fpu_free(&vcpu->arch.guest_fpu);
5748 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5750 if (vcpu->guest_fpu_loaded)
5754 * Restore all possible states in the guest,
5755 * and assume host would use all available bits.
5756 * Guest xcr0 would be loaded later.
5758 kvm_put_guest_xcr0(vcpu);
5759 vcpu->guest_fpu_loaded = 1;
5760 unlazy_fpu(current);
5761 fpu_restore_checking(&vcpu->arch.guest_fpu);
5765 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5767 kvm_put_guest_xcr0(vcpu);
5769 if (!vcpu->guest_fpu_loaded)
5772 vcpu->guest_fpu_loaded = 0;
5773 fpu_save_init(&vcpu->arch.guest_fpu);
5774 ++vcpu->stat.fpu_reload;
5775 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5779 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5781 if (vcpu->arch.time_page) {
5782 kvm_release_page_dirty(vcpu->arch.time_page);
5783 vcpu->arch.time_page = NULL;
5786 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5788 kvm_x86_ops->vcpu_free(vcpu);
5791 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5794 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5795 printk_once(KERN_WARNING
5796 "kvm: SMP vm created on host with unstable TSC; "
5797 "guest TSC will not be reliable\n");
5798 return kvm_x86_ops->vcpu_create(kvm, id);
5801 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5805 vcpu->arch.mtrr_state.have_fixed = 1;
5807 r = kvm_arch_vcpu_reset(vcpu);
5809 r = kvm_mmu_setup(vcpu);
5816 kvm_x86_ops->vcpu_free(vcpu);
5820 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5822 vcpu->arch.apf.msr_val = 0;
5825 kvm_mmu_unload(vcpu);
5829 kvm_x86_ops->vcpu_free(vcpu);
5832 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5834 vcpu->arch.nmi_pending = false;
5835 vcpu->arch.nmi_injected = false;
5837 vcpu->arch.switch_db_regs = 0;
5838 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5839 vcpu->arch.dr6 = DR6_FIXED_1;
5840 vcpu->arch.dr7 = DR7_FIXED_1;
5842 kvm_make_request(KVM_REQ_EVENT, vcpu);
5843 vcpu->arch.apf.msr_val = 0;
5845 kvm_clear_async_pf_completion_queue(vcpu);
5846 kvm_async_pf_hash_reset(vcpu);
5847 vcpu->arch.apf.halted = false;
5849 return kvm_x86_ops->vcpu_reset(vcpu);
5852 int kvm_arch_hardware_enable(void *garbage)
5855 struct kvm_vcpu *vcpu;
5858 kvm_shared_msr_cpu_online();
5859 list_for_each_entry(kvm, &vm_list, vm_list)
5860 kvm_for_each_vcpu(i, vcpu, kvm)
5861 if (vcpu->cpu == smp_processor_id())
5862 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5863 return kvm_x86_ops->hardware_enable(garbage);
5866 void kvm_arch_hardware_disable(void *garbage)
5868 kvm_x86_ops->hardware_disable(garbage);
5869 drop_user_return_notifiers(garbage);
5872 int kvm_arch_hardware_setup(void)
5874 return kvm_x86_ops->hardware_setup();
5877 void kvm_arch_hardware_unsetup(void)
5879 kvm_x86_ops->hardware_unsetup();
5882 void kvm_arch_check_processor_compat(void *rtn)
5884 kvm_x86_ops->check_processor_compatibility(rtn);
5887 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5893 BUG_ON(vcpu->kvm == NULL);
5896 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5897 vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5898 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5899 vcpu->arch.mmu.translate_gpa = translate_gpa;
5900 vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5901 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5902 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5904 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5906 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5911 vcpu->arch.pio_data = page_address(page);
5913 if (!kvm->arch.virtual_tsc_khz)
5914 kvm_arch_set_tsc_khz(kvm, max_tsc_khz);
5916 r = kvm_mmu_create(vcpu);
5918 goto fail_free_pio_data;
5920 if (irqchip_in_kernel(kvm)) {
5921 r = kvm_create_lapic(vcpu);
5923 goto fail_mmu_destroy;
5926 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5928 if (!vcpu->arch.mce_banks) {
5930 goto fail_free_lapic;
5932 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5934 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5935 goto fail_free_mce_banks;
5937 kvm_async_pf_hash_reset(vcpu);
5940 fail_free_mce_banks:
5941 kfree(vcpu->arch.mce_banks);
5943 kvm_free_lapic(vcpu);
5945 kvm_mmu_destroy(vcpu);
5947 free_page((unsigned long)vcpu->arch.pio_data);
5952 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5956 kfree(vcpu->arch.mce_banks);
5957 kvm_free_lapic(vcpu);
5958 idx = srcu_read_lock(&vcpu->kvm->srcu);
5959 kvm_mmu_destroy(vcpu);
5960 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5961 free_page((unsigned long)vcpu->arch.pio_data);
5964 struct kvm *kvm_arch_create_vm(void)
5966 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5969 return ERR_PTR(-ENOMEM);
5971 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5972 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5974 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5975 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5977 spin_lock_init(&kvm->arch.tsc_write_lock);
5982 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5985 kvm_mmu_unload(vcpu);
5989 static void kvm_free_vcpus(struct kvm *kvm)
5992 struct kvm_vcpu *vcpu;
5995 * Unpin any mmu pages first.
5997 kvm_for_each_vcpu(i, vcpu, kvm) {
5998 kvm_clear_async_pf_completion_queue(vcpu);
5999 kvm_unload_vcpu_mmu(vcpu);
6001 kvm_for_each_vcpu(i, vcpu, kvm)
6002 kvm_arch_vcpu_free(vcpu);
6004 mutex_lock(&kvm->lock);
6005 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6006 kvm->vcpus[i] = NULL;
6008 atomic_set(&kvm->online_vcpus, 0);
6009 mutex_unlock(&kvm->lock);
6012 void kvm_arch_sync_events(struct kvm *kvm)
6014 kvm_free_all_assigned_devices(kvm);
6018 void kvm_arch_destroy_vm(struct kvm *kvm)
6020 kvm_iommu_unmap_guest(kvm);
6021 kfree(kvm->arch.vpic);
6022 kfree(kvm->arch.vioapic);
6023 kvm_free_vcpus(kvm);
6024 kvm_free_physmem(kvm);
6025 if (kvm->arch.apic_access_page)
6026 put_page(kvm->arch.apic_access_page);
6027 if (kvm->arch.ept_identity_pagetable)
6028 put_page(kvm->arch.ept_identity_pagetable);
6029 cleanup_srcu_struct(&kvm->srcu);
6033 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6034 struct kvm_memory_slot *memslot,
6035 struct kvm_memory_slot old,
6036 struct kvm_userspace_memory_region *mem,
6039 int npages = memslot->npages;
6040 int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6042 /* Prevent internal slot pages from being moved by fork()/COW. */
6043 if (memslot->id >= KVM_MEMORY_SLOTS)
6044 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6046 /*To keep backward compatibility with older userspace,
6047 *x86 needs to hanlde !user_alloc case.
6050 if (npages && !old.rmap) {
6051 unsigned long userspace_addr;
6053 down_write(¤t->mm->mmap_sem);
6054 userspace_addr = do_mmap(NULL, 0,
6056 PROT_READ | PROT_WRITE,
6059 up_write(¤t->mm->mmap_sem);
6061 if (IS_ERR((void *)userspace_addr))
6062 return PTR_ERR((void *)userspace_addr);
6064 memslot->userspace_addr = userspace_addr;
6072 void kvm_arch_commit_memory_region(struct kvm *kvm,
6073 struct kvm_userspace_memory_region *mem,
6074 struct kvm_memory_slot old,
6078 int npages = mem->memory_size >> PAGE_SHIFT;
6080 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6083 down_write(¤t->mm->mmap_sem);
6084 ret = do_munmap(current->mm, old.userspace_addr,
6085 old.npages * PAGE_SIZE);
6086 up_write(¤t->mm->mmap_sem);
6089 "kvm_vm_ioctl_set_memory_region: "
6090 "failed to munmap memory\n");
6093 spin_lock(&kvm->mmu_lock);
6094 if (!kvm->arch.n_requested_mmu_pages) {
6095 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6096 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6099 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6100 spin_unlock(&kvm->mmu_lock);
6103 void kvm_arch_flush_shadow(struct kvm *kvm)
6105 kvm_mmu_zap_all(kvm);
6106 kvm_reload_remote_mmus(kvm);
6109 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6111 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6112 !vcpu->arch.apf.halted)
6113 || !list_empty_careful(&vcpu->async_pf.done)
6114 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6115 || vcpu->arch.nmi_pending ||
6116 (kvm_arch_interrupt_allowed(vcpu) &&
6117 kvm_cpu_has_interrupt(vcpu));
6120 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6123 int cpu = vcpu->cpu;
6125 if (waitqueue_active(&vcpu->wq)) {
6126 wake_up_interruptible(&vcpu->wq);
6127 ++vcpu->stat.halt_wakeup;
6131 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6132 if (atomic_xchg(&vcpu->guest_mode, 0))
6133 smp_send_reschedule(cpu);
6137 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6139 return kvm_x86_ops->interrupt_allowed(vcpu);
6142 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6144 unsigned long current_rip = kvm_rip_read(vcpu) +
6145 get_segment_base(vcpu, VCPU_SREG_CS);
6147 return current_rip == linear_rip;
6149 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6151 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6153 unsigned long rflags;
6155 rflags = kvm_x86_ops->get_rflags(vcpu);
6156 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6157 rflags &= ~X86_EFLAGS_TF;
6160 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6162 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6164 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6165 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6166 rflags |= X86_EFLAGS_TF;
6167 kvm_x86_ops->set_rflags(vcpu, rflags);
6168 kvm_make_request(KVM_REQ_EVENT, vcpu);
6170 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6172 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6176 if (!vcpu->arch.mmu.direct_map || is_error_page(work->page))
6179 r = kvm_mmu_reload(vcpu);
6183 vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6186 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6188 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6191 static inline u32 kvm_async_pf_next_probe(u32 key)
6193 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6196 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6198 u32 key = kvm_async_pf_hash_fn(gfn);
6200 while (vcpu->arch.apf.gfns[key] != ~0)
6201 key = kvm_async_pf_next_probe(key);
6203 vcpu->arch.apf.gfns[key] = gfn;
6206 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6209 u32 key = kvm_async_pf_hash_fn(gfn);
6211 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6212 (vcpu->arch.apf.gfns[key] != gfn ||
6213 vcpu->arch.apf.gfns[key] == ~0); i++)
6214 key = kvm_async_pf_next_probe(key);
6219 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6221 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6224 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6228 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6230 vcpu->arch.apf.gfns[i] = ~0;
6232 j = kvm_async_pf_next_probe(j);
6233 if (vcpu->arch.apf.gfns[j] == ~0)
6235 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6237 * k lies cyclically in ]i,j]
6239 * |....j i.k.| or |.k..j i...|
6241 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6242 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6247 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6250 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6254 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6255 struct kvm_async_pf *work)
6257 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6258 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6260 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6261 (vcpu->arch.apf.send_user_only &&
6262 kvm_x86_ops->get_cpl(vcpu) == 0))
6263 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6264 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6265 vcpu->arch.fault.error_code = 0;
6266 vcpu->arch.fault.address = work->arch.token;
6267 kvm_inject_page_fault(vcpu);
6271 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6272 struct kvm_async_pf *work)
6274 trace_kvm_async_pf_ready(work->arch.token, work->gva);
6275 if (is_error_page(work->page))
6276 work->arch.token = ~0; /* broadcast wakeup */
6278 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6280 if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6281 !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6282 vcpu->arch.fault.error_code = 0;
6283 vcpu->arch.fault.address = work->arch.token;
6284 kvm_inject_page_fault(vcpu);
6288 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6290 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6293 return !kvm_event_needs_reinjection(vcpu) &&
6294 kvm_x86_ops->interrupt_allowed(vcpu);
6297 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6298 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6299 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6300 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6301 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6302 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6303 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6304 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6305 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6306 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6307 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6308 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);