arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <trace/events/kvm.h>
  55
  56 #define CREATE_TRACE_POINTS
  57 #include "trace.h"
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67
  68 #define MAX_IO_MSRS 256
  69 #define KVM_MAX_MCE_BANKS 32
  70 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  71
  72 #define emul_to_vcpu(ctxt) \
  73         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  74
  75 /* EFER defaults:
  76  * - enable syscall per default because its emulated by KVM
  77  * - enable LME and LMA per default on 64 bit KVM
  78  */
  79 #ifdef CONFIG_X86_64
  80 static
  81 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  82 #else
  83 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  84 #endif
  85
  86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  88
  89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  90 static void process_nmi(struct kvm_vcpu *vcpu);
  91 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  92
  93 struct kvm_x86_ops *kvm_x86_ops;
  94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  95
  96 static bool ignore_msrs = 0;
  97 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  98
  99 unsigned int min_timer_period_us = 500;
 100 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 101
 102 static bool __read_mostly kvmclock_periodic_sync = true;
 103 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 104
 105 bool kvm_has_tsc_control;
 106 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 107 u32  kvm_max_guest_tsc_khz;
 108 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 109
 110 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 111 static u32 tsc_tolerance_ppm = 250;
 112 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 113
 114 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 115 unsigned int lapic_timer_advance_ns = 0;
 116 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 117
 118 static bool backwards_tsc_observed = false;
 119
 120 #define KVM_NR_SHARED_MSRS 16
 121
 122 struct kvm_shared_msrs_global {
 123         int nr;
 124         u32 msrs[KVM_NR_SHARED_MSRS];
 125 };
 126
 127 struct kvm_shared_msrs {
 128         struct user_return_notifier urn;
 129         bool registered;
 130         struct kvm_shared_msr_values {
 131                 u64 host;
 132                 u64 curr;
 133         } values[KVM_NR_SHARED_MSRS];
 134 };
 135
 136 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 137 static struct kvm_shared_msrs __percpu *shared_msrs;
 138
 139 struct kvm_stats_debugfs_item debugfs_entries[] = {
 140         { "pf_fixed", VCPU_STAT(pf_fixed) },
 141         { "pf_guest", VCPU_STAT(pf_guest) },
 142         { "tlb_flush", VCPU_STAT(tlb_flush) },
 143         { "invlpg", VCPU_STAT(invlpg) },
 144         { "exits", VCPU_STAT(exits) },
 145         { "io_exits", VCPU_STAT(io_exits) },
 146         { "mmio_exits", VCPU_STAT(mmio_exits) },
 147         { "signal_exits", VCPU_STAT(signal_exits) },
 148         { "irq_window", VCPU_STAT(irq_window_exits) },
 149         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 150         { "halt_exits", VCPU_STAT(halt_exits) },
 151         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 152         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 153         { "hypercalls", VCPU_STAT(hypercalls) },
 154         { "request_irq", VCPU_STAT(request_irq_exits) },
 155         { "irq_exits", VCPU_STAT(irq_exits) },
 156         { "host_state_reload", VCPU_STAT(host_state_reload) },
 157         { "efer_reload", VCPU_STAT(efer_reload) },
 158         { "fpu_reload", VCPU_STAT(fpu_reload) },
 159         { "insn_emulation", VCPU_STAT(insn_emulation) },
 160         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 161         { "irq_injections", VCPU_STAT(irq_injections) },
 162         { "nmi_injections", VCPU_STAT(nmi_injections) },
 163         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 164         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 165         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 166         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 167         { "mmu_flooded", VM_STAT(mmu_flooded) },
 168         { "mmu_recycled", VM_STAT(mmu_recycled) },
 169         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 170         { "mmu_unsync", VM_STAT(mmu_unsync) },
 171         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 172         { "largepages", VM_STAT(lpages) },
 173         { NULL }
 174 };
 175
 176 u64 __read_mostly host_xcr0;
 177
 178 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 179
 180 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 181 {
 182         int i;
 183         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 184                 vcpu->arch.apf.gfns[i] = ~0;
 185 }
 186
 187 static void kvm_on_user_return(struct user_return_notifier *urn)
 188 {
 189         unsigned slot;
 190         struct kvm_shared_msrs *locals
 191                 = container_of(urn, struct kvm_shared_msrs, urn);
 192         struct kvm_shared_msr_values *values;
 193
 194         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 195                 values = &locals->values[slot];
 196                 if (values->host != values->curr) {
 197                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 198                         values->curr = values->host;
 199                 }
 200         }
 201         locals->registered = false;
 202         user_return_notifier_unregister(urn);
 203 }
 204
 205 static void shared_msr_update(unsigned slot, u32 msr)
 206 {
 207         u64 value;
 208         unsigned int cpu = smp_processor_id();
 209         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 210
 211         /* only read, and nobody should modify it at this time,
 212          * so don't need lock */
 213         if (slot >= shared_msrs_global.nr) {
 214                 printk(KERN_ERR "kvm: invalid MSR slot!");
 215                 return;
 216         }
 217         rdmsrl_safe(msr, &value);
 218         smsr->values[slot].host = value;
 219         smsr->values[slot].curr = value;
 220 }
 221
 222 void kvm_define_shared_msr(unsigned slot, u32 msr)
 223 {
 224         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 225         if (slot >= shared_msrs_global.nr)
 226                 shared_msrs_global.nr = slot + 1;
 227         shared_msrs_global.msrs[slot] = msr;
 228         /* we need ensured the shared_msr_global have been updated */
 229         smp_wmb();
 230 }
 231 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 232
 233 static void kvm_shared_msr_cpu_online(void)
 234 {
 235         unsigned i;
 236
 237         for (i = 0; i < shared_msrs_global.nr; ++i)
 238                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 239 }
 240
 241 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 242 {
 243         unsigned int cpu = smp_processor_id();
 244         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 245         int err;
 246
 247         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 248                 return 0;
 249         smsr->values[slot].curr = value;
 250         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 251         if (err)
 252                 return 1;
 253
 254         if (!smsr->registered) {
 255                 smsr->urn.on_user_return = kvm_on_user_return;
 256                 user_return_notifier_register(&smsr->urn);
 257                 smsr->registered = true;
 258         }
 259         return 0;
 260 }
 261 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 262
 263 static void drop_user_return_notifiers(void)
 264 {
 265         unsigned int cpu = smp_processor_id();
 266         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 267
 268         if (smsr->registered)
 269                 kvm_on_user_return(&smsr->urn);
 270 }
 271
 272 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 273 {
 274         return vcpu->arch.apic_base;
 275 }
 276 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 277
 278 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 279 {
 280         u64 old_state = vcpu->arch.apic_base &
 281                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 282         u64 new_state = msr_info->data &
 283                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 284         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 285                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 286
 287         if (!msr_info->host_initiated &&
 288             ((msr_info->data & reserved_bits) != 0 ||
 289              new_state == X2APIC_ENABLE ||
 290              (new_state == MSR_IA32_APICBASE_ENABLE &&
 291               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 292              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 293               old_state == 0)))
 294                 return 1;
 295
 296         kvm_lapic_set_base(vcpu, msr_info->data);
 297         return 0;
 298 }
 299 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 300
 301 asmlinkage __visible void kvm_spurious_fault(void)
 302 {
 303         /* Fault while not rebooting.  We want the trace. */
 304         BUG();
 305 }
 306 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 307
 308 #define EXCPT_BENIGN            0
 309 #define EXCPT_CONTRIBUTORY      1
 310 #define EXCPT_PF                2
 311
 312 static int exception_class(int vector)
 313 {
 314         switch (vector) {
 315         case PF_VECTOR:
 316                 return EXCPT_PF;
 317         case DE_VECTOR:
 318         case TS_VECTOR:
 319         case NP_VECTOR:
 320         case SS_VECTOR:
 321         case GP_VECTOR:
 322                 return EXCPT_CONTRIBUTORY;
 323         default:
 324                 break;
 325         }
 326         return EXCPT_BENIGN;
 327 }
 328
 329 #define EXCPT_FAULT             0
 330 #define EXCPT_TRAP              1
 331 #define EXCPT_ABORT             2
 332 #define EXCPT_INTERRUPT         3
 333
 334 static int exception_type(int vector)
 335 {
 336         unsigned int mask;
 337
 338         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 339                 return EXCPT_INTERRUPT;
 340
 341         mask = 1 << vector;
 342
 343         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 344         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 345                 return EXCPT_TRAP;
 346
 347         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 348                 return EXCPT_ABORT;
 349
 350         /* Reserved exceptions will result in fault */
 351         return EXCPT_FAULT;
 352 }
 353
 354 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 355                 unsigned nr, bool has_error, u32 error_code,
 356                 bool reinject)
 357 {
 358         u32 prev_nr;
 359         int class1, class2;
 360
 361         kvm_make_request(KVM_REQ_EVENT, vcpu);
 362
 363         if (!vcpu->arch.exception.pending) {
 364         queue:
 365                 if (has_error && !is_protmode(vcpu))
 366                         has_error = false;
 367                 vcpu->arch.exception.pending = true;
 368                 vcpu->arch.exception.has_error_code = has_error;
 369                 vcpu->arch.exception.nr = nr;
 370                 vcpu->arch.exception.error_code = error_code;
 371                 vcpu->arch.exception.reinject = reinject;
 372                 return;
 373         }
 374
 375         /* to check exception */
 376         prev_nr = vcpu->arch.exception.nr;
 377         if (prev_nr == DF_VECTOR) {
 378                 /* triple fault -> shutdown */
 379                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 380                 return;
 381         }
 382         class1 = exception_class(prev_nr);
 383         class2 = exception_class(nr);
 384         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 385                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 386                 /* generate double fault per SDM Table 5-5 */
 387                 vcpu->arch.exception.pending = true;
 388                 vcpu->arch.exception.has_error_code = true;
 389                 vcpu->arch.exception.nr = DF_VECTOR;
 390                 vcpu->arch.exception.error_code = 0;
 391         } else
 392                 /* replace previous exception with a new one in a hope
 393                    that instruction re-execution will regenerate lost
 394                    exception */
 395                 goto queue;
 396 }
 397
 398 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 399 {
 400         kvm_multiple_exception(vcpu, nr, false, 0, false);
 401 }
 402 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 403
 404 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 405 {
 406         kvm_multiple_exception(vcpu, nr, false, 0, true);
 407 }
 408 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 409
 410 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 411 {
 412         if (err)
 413                 kvm_inject_gp(vcpu, 0);
 414         else
 415                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 416 }
 417 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 418
 419 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 420 {
 421         ++vcpu->stat.pf_guest;
 422         vcpu->arch.cr2 = fault->address;
 423         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 424 }
 425 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 426
 427 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 428 {
 429         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 430                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 431         else
 432                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 433
 434         return fault->nested_page_fault;
 435 }
 436
 437 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 438 {
 439         atomic_inc(&vcpu->arch.nmi_queued);
 440         kvm_make_request(KVM_REQ_NMI, vcpu);
 441 }
 442 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 443
 444 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 445 {
 446         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 447 }
 448 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 449
 450 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 451 {
 452         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 453 }
 454 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 455
 456 /*
 457  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 458  * a #GP and return false.
 459  */
 460 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 461 {
 462         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 463                 return true;
 464         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 465         return false;
 466 }
 467 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 468
 469 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 470 {
 471         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 472                 return true;
 473
 474         kvm_queue_exception(vcpu, UD_VECTOR);
 475         return false;
 476 }
 477 EXPORT_SYMBOL_GPL(kvm_require_dr);
 478
 479 /*
 480  * This function will be used to read from the physical memory of the currently
 481  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 482  * can read from guest physical or from the guest's guest physical memory.
 483  */
 484 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 485                             gfn_t ngfn, void *data, int offset, int len,
 486                             u32 access)
 487 {
 488         struct x86_exception exception;
 489         gfn_t real_gfn;
 490         gpa_t ngpa;
 491
 492         ngpa     = gfn_to_gpa(ngfn);
 493         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 494         if (real_gfn == UNMAPPED_GVA)
 495                 return -EFAULT;
 496
 497         real_gfn = gpa_to_gfn(real_gfn);
 498
 499         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 500 }
 501 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 502
 503 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 504                                void *data, int offset, int len, u32 access)
 505 {
 506         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 507                                        data, offset, len, access);
 508 }
 509
 510 /*
 511  * Load the pae pdptrs.  Return true is they are all valid.
 512  */
 513 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 514 {
 515         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 516         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 517         int i;
 518         int ret;
 519         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 520
 521         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 522                                       offset * sizeof(u64), sizeof(pdpte),
 523                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 524         if (ret < 0) {
 525                 ret = 0;
 526                 goto out;
 527         }
 528         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 529                 if (is_present_gpte(pdpte[i]) &&
 530                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 531                         ret = 0;
 532                         goto out;
 533                 }
 534         }
 535         ret = 1;
 536
 537         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 538         __set_bit(VCPU_EXREG_PDPTR,
 539                   (unsigned long *)&vcpu->arch.regs_avail);
 540         __set_bit(VCPU_EXREG_PDPTR,
 541                   (unsigned long *)&vcpu->arch.regs_dirty);
 542 out:
 543
 544         return ret;
 545 }
 546 EXPORT_SYMBOL_GPL(load_pdptrs);
 547
 548 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 549 {
 550         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 551         bool changed = true;
 552         int offset;
 553         gfn_t gfn;
 554         int r;
 555
 556         if (is_long_mode(vcpu) || !is_pae(vcpu))
 557                 return false;
 558
 559         if (!test_bit(VCPU_EXREG_PDPTR,
 560                       (unsigned long *)&vcpu->arch.regs_avail))
 561                 return true;
 562
 563         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 564         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 565         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 566                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 567         if (r < 0)
 568                 goto out;
 569         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 570 out:
 571
 572         return changed;
 573 }
 574
 575 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 576 {
 577         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 578         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 579
 580         cr0 |= X86_CR0_ET;
 581
 582 #ifdef CONFIG_X86_64
 583         if (cr0 & 0xffffffff00000000UL)
 584                 return 1;
 585 #endif
 586
 587         cr0 &= ~CR0_RESERVED_BITS;
 588
 589         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 590                 return 1;
 591
 592         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 593                 return 1;
 594
 595         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 596 #ifdef CONFIG_X86_64
 597                 if ((vcpu->arch.efer & EFER_LME)) {
 598                         int cs_db, cs_l;
 599
 600                         if (!is_pae(vcpu))
 601                                 return 1;
 602                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 603                         if (cs_l)
 604                                 return 1;
 605                 } else
 606 #endif
 607                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 608                                                  kvm_read_cr3(vcpu)))
 609                         return 1;
 610         }
 611
 612         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 613                 return 1;
 614
 615         kvm_x86_ops->set_cr0(vcpu, cr0);
 616
 617         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 618                 kvm_clear_async_pf_completion_queue(vcpu);
 619                 kvm_async_pf_hash_reset(vcpu);
 620         }
 621
 622         if ((cr0 ^ old_cr0) & update_bits)
 623                 kvm_mmu_reset_context(vcpu);
 624
 625         if ((cr0 ^ old_cr0) & X86_CR0_CD)
 626                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 627
 628         return 0;
 629 }
 630 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 631
 632 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 633 {
 634         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 635 }
 636 EXPORT_SYMBOL_GPL(kvm_lmsw);
 637
 638 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 639 {
 640         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 641                         !vcpu->guest_xcr0_loaded) {
 642                 /* kvm_set_xcr() also depends on this */
 643                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 644                 vcpu->guest_xcr0_loaded = 1;
 645         }
 646 }
 647
 648 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 649 {
 650         if (vcpu->guest_xcr0_loaded) {
 651                 if (vcpu->arch.xcr0 != host_xcr0)
 652                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 653                 vcpu->guest_xcr0_loaded = 0;
 654         }
 655 }
 656
 657 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 658 {
 659         u64 xcr0 = xcr;
 660         u64 old_xcr0 = vcpu->arch.xcr0;
 661         u64 valid_bits;
 662
 663         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 664         if (index != XCR_XFEATURE_ENABLED_MASK)
 665                 return 1;
 666         if (!(xcr0 & XSTATE_FP))
 667                 return 1;
 668         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 669                 return 1;
 670
 671         /*
 672          * Do not allow the guest to set bits that we do not support
 673          * saving.  However, xcr0 bit 0 is always set, even if the
 674          * emulated CPU does not support XSAVE (see fx_init).
 675          */
 676         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 677         if (xcr0 & ~valid_bits)
 678                 return 1;
 679
 680         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 681                 return 1;
 682
 683         if (xcr0 & XSTATE_AVX512) {
 684                 if (!(xcr0 & XSTATE_YMM))
 685                         return 1;
 686                 if ((xcr0 & XSTATE_AVX512) != XSTATE_AVX512)
 687                         return 1;
 688         }
 689         kvm_put_guest_xcr0(vcpu);
 690         vcpu->arch.xcr0 = xcr0;
 691
 692         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 693                 kvm_update_cpuid(vcpu);
 694         return 0;
 695 }
 696
 697 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 698 {
 699         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 700             __kvm_set_xcr(vcpu, index, xcr)) {
 701                 kvm_inject_gp(vcpu, 0);
 702                 return 1;
 703         }
 704         return 0;
 705 }
 706 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 707
 708 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 709 {
 710         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 711         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 712                                    X86_CR4_SMEP | X86_CR4_SMAP;
 713
 714         if (cr4 & CR4_RESERVED_BITS)
 715                 return 1;
 716
 717         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 718                 return 1;
 719
 720         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 721                 return 1;
 722
 723         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 724                 return 1;
 725
 726         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 727                 return 1;
 728
 729         if (is_long_mode(vcpu)) {
 730                 if (!(cr4 & X86_CR4_PAE))
 731                         return 1;
 732         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 733                    && ((cr4 ^ old_cr4) & pdptr_bits)
 734                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 735                                    kvm_read_cr3(vcpu)))
 736                 return 1;
 737
 738         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 739                 if (!guest_cpuid_has_pcid(vcpu))
 740                         return 1;
 741
 742                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 743                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 744                         return 1;
 745         }
 746
 747         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 748                 return 1;
 749
 750         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 751             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 752                 kvm_mmu_reset_context(vcpu);
 753
 754         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 755                 kvm_update_cpuid(vcpu);
 756
 757         return 0;
 758 }
 759 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 760
 761 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 762 {
 763 #ifdef CONFIG_X86_64
 764         cr3 &= ~CR3_PCID_INVD;
 765 #endif
 766
 767         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 768                 kvm_mmu_sync_roots(vcpu);
 769                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 770                 return 0;
 771         }
 772
 773         if (is_long_mode(vcpu)) {
 774                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 775                         return 1;
 776         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 777                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 778                 return 1;
 779
 780         vcpu->arch.cr3 = cr3;
 781         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 782         kvm_mmu_new_cr3(vcpu);
 783         return 0;
 784 }
 785 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 786
 787 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 788 {
 789         if (cr8 & CR8_RESERVED_BITS)
 790                 return 1;
 791         if (irqchip_in_kernel(vcpu->kvm))
 792                 kvm_lapic_set_tpr(vcpu, cr8);
 793         else
 794                 vcpu->arch.cr8 = cr8;
 795         return 0;
 796 }
 797 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 798
 799 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 800 {
 801         if (irqchip_in_kernel(vcpu->kvm))
 802                 return kvm_lapic_get_cr8(vcpu);
 803         else
 804                 return vcpu->arch.cr8;
 805 }
 806 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 807
 808 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 809 {
 810         int i;
 811
 812         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 813                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 814                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 815                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 816         }
 817 }
 818
 819 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 820 {
 821         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 822                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 823 }
 824
 825 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 826 {
 827         unsigned long dr7;
 828
 829         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 830                 dr7 = vcpu->arch.guest_debug_dr7;
 831         else
 832                 dr7 = vcpu->arch.dr7;
 833         kvm_x86_ops->set_dr7(vcpu, dr7);
 834         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 835         if (dr7 & DR7_BP_EN_MASK)
 836                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 837 }
 838
 839 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 840 {
 841         u64 fixed = DR6_FIXED_1;
 842
 843         if (!guest_cpuid_has_rtm(vcpu))
 844                 fixed |= DR6_RTM;
 845         return fixed;
 846 }
 847
 848 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 849 {
 850         switch (dr) {
 851         case 0 ... 3:
 852                 vcpu->arch.db[dr] = val;
 853                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 854                         vcpu->arch.eff_db[dr] = val;
 855                 break;
 856         case 4:
 857                 /* fall through */
 858         case 6:
 859                 if (val & 0xffffffff00000000ULL)
 860                         return -1; /* #GP */
 861                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 862                 kvm_update_dr6(vcpu);
 863                 break;
 864         case 5:
 865                 /* fall through */
 866         default: /* 7 */
 867                 if (val & 0xffffffff00000000ULL)
 868                         return -1; /* #GP */
 869                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 870                 kvm_update_dr7(vcpu);
 871                 break;
 872         }
 873
 874         return 0;
 875 }
 876
 877 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 878 {
 879         if (__kvm_set_dr(vcpu, dr, val)) {
 880                 kvm_inject_gp(vcpu, 0);
 881                 return 1;
 882         }
 883         return 0;
 884 }
 885 EXPORT_SYMBOL_GPL(kvm_set_dr);
 886
 887 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 888 {
 889         switch (dr) {
 890         case 0 ... 3:
 891                 *val = vcpu->arch.db[dr];
 892                 break;
 893         case 4:
 894                 /* fall through */
 895         case 6:
 896                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 897                         *val = vcpu->arch.dr6;
 898                 else
 899                         *val = kvm_x86_ops->get_dr6(vcpu);
 900                 break;
 901         case 5:
 902                 /* fall through */
 903         default: /* 7 */
 904                 *val = vcpu->arch.dr7;
 905                 break;
 906         }
 907         return 0;
 908 }
 909 EXPORT_SYMBOL_GPL(kvm_get_dr);
 910
 911 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 912 {
 913         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 914         u64 data;
 915         int err;
 916
 917         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 918         if (err)
 919                 return err;
 920         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 921         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 922         return err;
 923 }
 924 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 925
 926 /*
 927  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 928  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 929  *
 930  * This list is modified at module load time to reflect the
 931  * capabilities of the host cpu. This capabilities test skips MSRs that are
 932  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 933  * may depend on host virtualization features rather than host cpu features.
 934  */
 935
 936 static u32 msrs_to_save[] = {
 937         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 938         MSR_STAR,
 939 #ifdef CONFIG_X86_64
 940         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 941 #endif
 942         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 943         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 944 };
 945
 946 static unsigned num_msrs_to_save;
 947
 948 static u32 emulated_msrs[] = {
 949         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 950         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 951         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 952         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 953         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 954         MSR_KVM_PV_EOI_EN,
 955
 956         MSR_IA32_TSC_ADJUST,
 957         MSR_IA32_TSCDEADLINE,
 958         MSR_IA32_MISC_ENABLE,
 959         MSR_IA32_MCG_STATUS,
 960         MSR_IA32_MCG_CTL,
 961         MSR_IA32_SMBASE,
 962 };
 963
 964 static unsigned num_emulated_msrs;
 965
 966 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 967 {
 968         if (efer & efer_reserved_bits)
 969                 return false;
 970
 971         if (efer & EFER_FFXSR) {
 972                 struct kvm_cpuid_entry2 *feat;
 973
 974                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 975                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 976                         return false;
 977         }
 978
 979         if (efer & EFER_SVME) {
 980                 struct kvm_cpuid_entry2 *feat;
 981
 982                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 983                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 984                         return false;
 985         }
 986
 987         return true;
 988 }
 989 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 990
 991 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 992 {
 993         u64 old_efer = vcpu->arch.efer;
 994
 995         if (!kvm_valid_efer(vcpu, efer))
 996                 return 1;
 997
 998         if (is_paging(vcpu)
 999             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1000                 return 1;
1001
1002         efer &= ~EFER_LMA;
1003         efer |= vcpu->arch.efer & EFER_LMA;
1004
1005         kvm_x86_ops->set_efer(vcpu, efer);
1006
1007         /* Update reserved bits */
1008         if ((efer ^ old_efer) & EFER_NX)
1009                 kvm_mmu_reset_context(vcpu);
1010
1011         return 0;
1012 }
1013
1014 void kvm_enable_efer_bits(u64 mask)
1015 {
1016        efer_reserved_bits &= ~mask;
1017 }
1018 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1019
1020 /*
1021  * Writes msr value into into the appropriate "register".
1022  * Returns 0 on success, non-0 otherwise.
1023  * Assumes vcpu_load() was already called.
1024  */
1025 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1026 {
1027         switch (msr->index) {
1028         case MSR_FS_BASE:
1029         case MSR_GS_BASE:
1030         case MSR_KERNEL_GS_BASE:
1031         case MSR_CSTAR:
1032         case MSR_LSTAR:
1033                 if (is_noncanonical_address(msr->data))
1034                         return 1;
1035                 break;
1036         case MSR_IA32_SYSENTER_EIP:
1037         case MSR_IA32_SYSENTER_ESP:
1038                 /*
1039                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1040                  * non-canonical address is written on Intel but not on
1041                  * AMD (which ignores the top 32-bits, because it does
1042                  * not implement 64-bit SYSENTER).
1043                  *
1044                  * 64-bit code should hence be able to write a non-canonical
1045                  * value on AMD.  Making the address canonical ensures that
1046                  * vmentry does not fail on Intel after writing a non-canonical
1047                  * value, and that something deterministic happens if the guest
1048                  * invokes 64-bit SYSENTER.
1049                  */
1050                 msr->data = get_canonical(msr->data);
1051         }
1052         return kvm_x86_ops->set_msr(vcpu, msr);
1053 }
1054 EXPORT_SYMBOL_GPL(kvm_set_msr);
1055
1056 /*
1057  * Adapt set_msr() to msr_io()'s calling convention
1058  */
1059 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1060 {
1061         struct msr_data msr;
1062         int r;
1063
1064         msr.index = index;
1065         msr.host_initiated = true;
1066         r = kvm_get_msr(vcpu, &msr);
1067         if (r)
1068                 return r;
1069
1070         *data = msr.data;
1071         return 0;
1072 }
1073
1074 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1075 {
1076         struct msr_data msr;
1077
1078         msr.data = *data;
1079         msr.index = index;
1080         msr.host_initiated = true;
1081         return kvm_set_msr(vcpu, &msr);
1082 }
1083
1084 #ifdef CONFIG_X86_64
1085 struct pvclock_gtod_data {
1086         seqcount_t      seq;
1087
1088         struct { /* extract of a clocksource struct */
1089                 int vclock_mode;
1090                 cycle_t cycle_last;
1091                 cycle_t mask;
1092                 u32     mult;
1093                 u32     shift;
1094         } clock;
1095
1096         u64             boot_ns;
1097         u64             nsec_base;
1098 };
1099
1100 static struct pvclock_gtod_data pvclock_gtod_data;
1101
1102 static void update_pvclock_gtod(struct timekeeper *tk)
1103 {
1104         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1105         u64 boot_ns;
1106
1107         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1108
1109         write_seqcount_begin(&vdata->seq);
1110
1111         /* copy pvclock gtod data */
1112         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1113         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1114         vdata->clock.mask               = tk->tkr_mono.mask;
1115         vdata->clock.mult               = tk->tkr_mono.mult;
1116         vdata->clock.shift              = tk->tkr_mono.shift;
1117
1118         vdata->boot_ns                  = boot_ns;
1119         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1120
1121         write_seqcount_end(&vdata->seq);
1122 }
1123 #endif
1124
1125 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1126 {
1127         /*
1128          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1129          * vcpu_enter_guest.  This function is only called from
1130          * the physical CPU that is running vcpu.
1131          */
1132         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1133 }
1134
1135 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1136 {
1137         int version;
1138         int r;
1139         struct pvclock_wall_clock wc;
1140         struct timespec boot;
1141
1142         if (!wall_clock)
1143                 return;
1144
1145         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1146         if (r)
1147                 return;
1148
1149         if (version & 1)
1150                 ++version;  /* first time write, random junk */
1151
1152         ++version;
1153
1154         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1155
1156         /*
1157          * The guest calculates current wall clock time by adding
1158          * system time (updated by kvm_guest_time_update below) to the
1159          * wall clock specified here.  guest system time equals host
1160          * system time for us, thus we must fill in host boot time here.
1161          */
1162         getboottime(&boot);
1163
1164         if (kvm->arch.kvmclock_offset) {
1165                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1166                 boot = timespec_sub(boot, ts);
1167         }
1168         wc.sec = boot.tv_sec;
1169         wc.nsec = boot.tv_nsec;
1170         wc.version = version;
1171
1172         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1173
1174         version++;
1175         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1176 }
1177
1178 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1179 {
1180         uint32_t quotient, remainder;
1181
1182         /* Don't try to replace with do_div(), this one calculates
1183          * "(dividend << 32) / divisor" */
1184         __asm__ ( "divl %4"
1185                   : "=a" (quotient), "=d" (remainder)
1186                   : "0" (0), "1" (dividend), "r" (divisor) );
1187         return quotient;
1188 }
1189
1190 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1191                                s8 *pshift, u32 *pmultiplier)
1192 {
1193         uint64_t scaled64;
1194         int32_t  shift = 0;
1195         uint64_t tps64;
1196         uint32_t tps32;
1197
1198         tps64 = base_khz * 1000LL;
1199         scaled64 = scaled_khz * 1000LL;
1200         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1201                 tps64 >>= 1;
1202                 shift--;
1203         }
1204
1205         tps32 = (uint32_t)tps64;
1206         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1207                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1208                         scaled64 >>= 1;
1209                 else
1210                         tps32 <<= 1;
1211                 shift++;
1212         }
1213
1214         *pshift = shift;
1215         *pmultiplier = div_frac(scaled64, tps32);
1216
1217         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1218                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1219 }
1220
1221 #ifdef CONFIG_X86_64
1222 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1223 #endif
1224
1225 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1226 static unsigned long max_tsc_khz;
1227
1228 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1229 {
1230         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1231                                    vcpu->arch.virtual_tsc_shift);
1232 }
1233
1234 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1235 {
1236         u64 v = (u64)khz * (1000000 + ppm);
1237         do_div(v, 1000000);
1238         return v;
1239 }
1240
1241 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1242 {
1243         u32 thresh_lo, thresh_hi;
1244         int use_scaling = 0;
1245
1246         /* tsc_khz can be zero if TSC calibration fails */
1247         if (this_tsc_khz == 0)
1248                 return;
1249
1250         /* Compute a scale to convert nanoseconds in TSC cycles */
1251         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1252                            &vcpu->arch.virtual_tsc_shift,
1253                            &vcpu->arch.virtual_tsc_mult);
1254         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1255
1256         /*
1257          * Compute the variation in TSC rate which is acceptable
1258          * within the range of tolerance and decide if the
1259          * rate being applied is within that bounds of the hardware
1260          * rate.  If so, no scaling or compensation need be done.
1261          */
1262         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1263         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1264         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1265                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1266                 use_scaling = 1;
1267         }
1268         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1269 }
1270
1271 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1272 {
1273         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1274                                       vcpu->arch.virtual_tsc_mult,
1275                                       vcpu->arch.virtual_tsc_shift);
1276         tsc += vcpu->arch.this_tsc_write;
1277         return tsc;
1278 }
1279
1280 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1281 {
1282 #ifdef CONFIG_X86_64
1283         bool vcpus_matched;
1284         struct kvm_arch *ka = &vcpu->kvm->arch;
1285         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1286
1287         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1288                          atomic_read(&vcpu->kvm->online_vcpus));
1289
1290         /*
1291          * Once the masterclock is enabled, always perform request in
1292          * order to update it.
1293          *
1294          * In order to enable masterclock, the host clocksource must be TSC
1295          * and the vcpus need to have matched TSCs.  When that happens,
1296          * perform request to enable masterclock.
1297          */
1298         if (ka->use_master_clock ||
1299             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1300                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1301
1302         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1303                             atomic_read(&vcpu->kvm->online_vcpus),
1304                             ka->use_master_clock, gtod->clock.vclock_mode);
1305 #endif
1306 }
1307
1308 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1309 {
1310         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1311         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1312 }
1313
1314 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1315 {
1316         struct kvm *kvm = vcpu->kvm;
1317         u64 offset, ns, elapsed;
1318         unsigned long flags;
1319         s64 usdiff;
1320         bool matched;
1321         bool already_matched;
1322         u64 data = msr->data;
1323
1324         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1325         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1326         ns = get_kernel_ns();
1327         elapsed = ns - kvm->arch.last_tsc_nsec;
1328
1329         if (vcpu->arch.virtual_tsc_khz) {
1330                 int faulted = 0;
1331
1332                 /* n.b - signed multiplication and division required */
1333                 usdiff = data - kvm->arch.last_tsc_write;
1334 #ifdef CONFIG_X86_64
1335                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1336 #else
1337                 /* do_div() only does unsigned */
1338                 asm("1: idivl %[divisor]\n"
1339                     "2: xor %%edx, %%edx\n"
1340                     "   movl $0, %[faulted]\n"
1341                     "3:\n"
1342                     ".section .fixup,\"ax\"\n"
1343                     "4: movl $1, %[faulted]\n"
1344                     "   jmp  3b\n"
1345                     ".previous\n"
1346
1347                 _ASM_EXTABLE(1b, 4b)
1348
1349                 : "=A"(usdiff), [faulted] "=r" (faulted)
1350                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1351
1352 #endif
1353                 do_div(elapsed, 1000);
1354                 usdiff -= elapsed;
1355                 if (usdiff < 0)
1356                         usdiff = -usdiff;
1357
1358                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1359                 if (faulted)
1360                         usdiff = USEC_PER_SEC;
1361         } else
1362                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1363
1364         /*
1365          * Special case: TSC write with a small delta (1 second) of virtual
1366          * cycle time against real time is interpreted as an attempt to
1367          * synchronize the CPU.
1368          *
1369          * For a reliable TSC, we can match TSC offsets, and for an unstable
1370          * TSC, we add elapsed time in this computation.  We could let the
1371          * compensation code attempt to catch up if we fall behind, but
1372          * it's better to try to match offsets from the beginning.
1373          */
1374         if (usdiff < USEC_PER_SEC &&
1375             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1376                 if (!check_tsc_unstable()) {
1377                         offset = kvm->arch.cur_tsc_offset;
1378                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1379                 } else {
1380                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1381                         data += delta;
1382                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1383                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1384                 }
1385                 matched = true;
1386                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1387         } else {
1388                 /*
1389                  * We split periods of matched TSC writes into generations.
1390                  * For each generation, we track the original measured
1391                  * nanosecond time, offset, and write, so if TSCs are in
1392                  * sync, we can match exact offset, and if not, we can match
1393                  * exact software computation in compute_guest_tsc()
1394                  *
1395                  * These values are tracked in kvm->arch.cur_xxx variables.
1396                  */
1397                 kvm->arch.cur_tsc_generation++;
1398                 kvm->arch.cur_tsc_nsec = ns;
1399                 kvm->arch.cur_tsc_write = data;
1400                 kvm->arch.cur_tsc_offset = offset;
1401                 matched = false;
1402                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1403                          kvm->arch.cur_tsc_generation, data);
1404         }
1405
1406         /*
1407          * We also track th most recent recorded KHZ, write and time to
1408          * allow the matching interval to be extended at each write.
1409          */
1410         kvm->arch.last_tsc_nsec = ns;
1411         kvm->arch.last_tsc_write = data;
1412         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1413
1414         vcpu->arch.last_guest_tsc = data;
1415
1416         /* Keep track of which generation this VCPU has synchronized to */
1417         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1418         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1419         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1420
1421         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1422                 update_ia32_tsc_adjust_msr(vcpu, offset);
1423         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1424         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1425
1426         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1427         if (!matched) {
1428                 kvm->arch.nr_vcpus_matched_tsc = 0;
1429         } else if (!already_matched) {
1430                 kvm->arch.nr_vcpus_matched_tsc++;
1431         }
1432
1433         kvm_track_tsc_matching(vcpu);
1434         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1435 }
1436
1437 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1438
1439 #ifdef CONFIG_X86_64
1440
1441 static cycle_t read_tsc(void)
1442 {
1443         cycle_t ret;
1444         u64 last;
1445
1446         /*
1447          * Empirically, a fence (of type that depends on the CPU)
1448          * before rdtsc is enough to ensure that rdtsc is ordered
1449          * with respect to loads.  The various CPU manuals are unclear
1450          * as to whether rdtsc can be reordered with later loads,
1451          * but no one has ever seen it happen.
1452          */
1453         rdtsc_barrier();
1454         ret = (cycle_t)vget_cycles();
1455
1456         last = pvclock_gtod_data.clock.cycle_last;
1457
1458         if (likely(ret >= last))
1459                 return ret;
1460
1461         /*
1462          * GCC likes to generate cmov here, but this branch is extremely
1463          * predictable (it's just a funciton of time and the likely is
1464          * very likely) and there's a data dependence, so force GCC
1465          * to generate a branch instead.  I don't barrier() because
1466          * we don't actually need a barrier, and if this function
1467          * ever gets inlined it will generate worse code.
1468          */
1469         asm volatile ("");
1470         return last;
1471 }
1472
1473 static inline u64 vgettsc(cycle_t *cycle_now)
1474 {
1475         long v;
1476         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1477
1478         *cycle_now = read_tsc();
1479
1480         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1481         return v * gtod->clock.mult;
1482 }
1483
1484 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1485 {
1486         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1487         unsigned long seq;
1488         int mode;
1489         u64 ns;
1490
1491         do {
1492                 seq = read_seqcount_begin(&gtod->seq);
1493                 mode = gtod->clock.vclock_mode;
1494                 ns = gtod->nsec_base;
1495                 ns += vgettsc(cycle_now);
1496                 ns >>= gtod->clock.shift;
1497                 ns += gtod->boot_ns;
1498         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1499         *t = ns;
1500
1501         return mode;
1502 }
1503
1504 /* returns true if host is using tsc clocksource */
1505 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1506 {
1507         /* checked again under seqlock below */
1508         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1509                 return false;
1510
1511         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1512 }
1513 #endif
1514
1515 /*
1516  *
1517  * Assuming a stable TSC across physical CPUS, and a stable TSC
1518  * across virtual CPUs, the following condition is possible.
1519  * Each numbered line represents an event visible to both
1520  * CPUs at the next numbered event.
1521  *
1522  * "timespecX" represents host monotonic time. "tscX" represents
1523  * RDTSC value.
1524  *
1525  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1526  *
1527  * 1.  read timespec0,tsc0
1528  * 2.                                   | timespec1 = timespec0 + N
1529  *                                      | tsc1 = tsc0 + M
1530  * 3. transition to guest               | transition to guest
1531  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1532  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1533  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1534  *
1535  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1536  *
1537  *      - ret0 < ret1
1538  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1539  *              ...
1540  *      - 0 < N - M => M < N
1541  *
1542  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1543  * always the case (the difference between two distinct xtime instances
1544  * might be smaller then the difference between corresponding TSC reads,
1545  * when updating guest vcpus pvclock areas).
1546  *
1547  * To avoid that problem, do not allow visibility of distinct
1548  * system_timestamp/tsc_timestamp values simultaneously: use a master
1549  * copy of host monotonic time values. Update that master copy
1550  * in lockstep.
1551  *
1552  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1553  *
1554  */
1555
1556 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1557 {
1558 #ifdef CONFIG_X86_64
1559         struct kvm_arch *ka = &kvm->arch;
1560         int vclock_mode;
1561         bool host_tsc_clocksource, vcpus_matched;
1562
1563         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1564                         atomic_read(&kvm->online_vcpus));
1565
1566         /*
1567          * If the host uses TSC clock, then passthrough TSC as stable
1568          * to the guest.
1569          */
1570         host_tsc_clocksource = kvm_get_time_and_clockread(
1571                                         &ka->master_kernel_ns,
1572                                         &ka->master_cycle_now);
1573
1574         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1575                                 && !backwards_tsc_observed
1576                                 && !ka->boot_vcpu_runs_old_kvmclock;
1577
1578         if (ka->use_master_clock)
1579                 atomic_set(&kvm_guest_has_master_clock, 1);
1580
1581         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1582         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1583                                         vcpus_matched);
1584 #endif
1585 }
1586
1587 static void kvm_gen_update_masterclock(struct kvm *kvm)
1588 {
1589 #ifdef CONFIG_X86_64
1590         int i;
1591         struct kvm_vcpu *vcpu;
1592         struct kvm_arch *ka = &kvm->arch;
1593
1594         spin_lock(&ka->pvclock_gtod_sync_lock);
1595         kvm_make_mclock_inprogress_request(kvm);
1596         /* no guest entries from this point */
1597         pvclock_update_vm_gtod_copy(kvm);
1598
1599         kvm_for_each_vcpu(i, vcpu, kvm)
1600                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1601
1602         /* guest entries allowed */
1603         kvm_for_each_vcpu(i, vcpu, kvm)
1604                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1605
1606         spin_unlock(&ka->pvclock_gtod_sync_lock);
1607 #endif
1608 }
1609
1610 static int kvm_guest_time_update(struct kvm_vcpu *v)
1611 {
1612         unsigned long flags, this_tsc_khz;
1613         struct kvm_vcpu_arch *vcpu = &v->arch;
1614         struct kvm_arch *ka = &v->kvm->arch;
1615         s64 kernel_ns;
1616         u64 tsc_timestamp, host_tsc;
1617         struct pvclock_vcpu_time_info guest_hv_clock;
1618         u8 pvclock_flags;
1619         bool use_master_clock;
1620
1621         kernel_ns = 0;
1622         host_tsc = 0;
1623
1624         /*
1625          * If the host uses TSC clock, then passthrough TSC as stable
1626          * to the guest.
1627          */
1628         spin_lock(&ka->pvclock_gtod_sync_lock);
1629         use_master_clock = ka->use_master_clock;
1630         if (use_master_clock) {
1631                 host_tsc = ka->master_cycle_now;
1632                 kernel_ns = ka->master_kernel_ns;
1633         }
1634         spin_unlock(&ka->pvclock_gtod_sync_lock);
1635
1636         /* Keep irq disabled to prevent changes to the clock */
1637         local_irq_save(flags);
1638         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1639         if (unlikely(this_tsc_khz == 0)) {
1640                 local_irq_restore(flags);
1641                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1642                 return 1;
1643         }
1644         if (!use_master_clock) {
1645                 host_tsc = native_read_tsc();
1646                 kernel_ns = get_kernel_ns();
1647         }
1648
1649         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1650
1651         /*
1652          * We may have to catch up the TSC to match elapsed wall clock
1653          * time for two reasons, even if kvmclock is used.
1654          *   1) CPU could have been running below the maximum TSC rate
1655          *   2) Broken TSC compensation resets the base at each VCPU
1656          *      entry to avoid unknown leaps of TSC even when running
1657          *      again on the same CPU.  This may cause apparent elapsed
1658          *      time to disappear, and the guest to stand still or run
1659          *      very slowly.
1660          */
1661         if (vcpu->tsc_catchup) {
1662                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1663                 if (tsc > tsc_timestamp) {
1664                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1665                         tsc_timestamp = tsc;
1666                 }
1667         }
1668
1669         local_irq_restore(flags);
1670
1671         if (!vcpu->pv_time_enabled)
1672                 return 0;
1673
1674         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1675                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1676                                    &vcpu->hv_clock.tsc_shift,
1677                                    &vcpu->hv_clock.tsc_to_system_mul);
1678                 vcpu->hw_tsc_khz = this_tsc_khz;
1679         }
1680
1681         /* With all the info we got, fill in the values */
1682         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1683         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1684         vcpu->last_guest_tsc = tsc_timestamp;
1685
1686         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1687                 &guest_hv_clock, sizeof(guest_hv_clock))))
1688                 return 0;
1689
1690         /* This VCPU is paused, but it's legal for a guest to read another
1691          * VCPU's kvmclock, so we really have to follow the specification where
1692          * it says that version is odd if data is being modified, and even after
1693          * it is consistent.
1694          *
1695          * Version field updates must be kept separate.  This is because
1696          * kvm_write_guest_cached might use a "rep movs" instruction, and
1697          * writes within a string instruction are weakly ordered.  So there
1698          * are three writes overall.
1699          *
1700          * As a small optimization, only write the version field in the first
1701          * and third write.  The vcpu->pv_time cache is still valid, because the
1702          * version field is the first in the struct.
1703          */
1704         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1705
1706         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1707         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1708                                 &vcpu->hv_clock,
1709                                 sizeof(vcpu->hv_clock.version));
1710
1711         smp_wmb();
1712
1713         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1714         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1715
1716         if (vcpu->pvclock_set_guest_stopped_request) {
1717                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1718                 vcpu->pvclock_set_guest_stopped_request = false;
1719         }
1720
1721         pvclock_flags |= PVCLOCK_COUNTS_FROM_ZERO;
1722
1723         /* If the host uses TSC clocksource, then it is stable */
1724         if (use_master_clock)
1725                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1726
1727         vcpu->hv_clock.flags = pvclock_flags;
1728
1729         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1730
1731         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1732                                 &vcpu->hv_clock,
1733                                 sizeof(vcpu->hv_clock));
1734
1735         smp_wmb();
1736
1737         vcpu->hv_clock.version++;
1738         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1739                                 &vcpu->hv_clock,
1740                                 sizeof(vcpu->hv_clock.version));
1741         return 0;
1742 }
1743
1744 /*
1745  * kvmclock updates which are isolated to a given vcpu, such as
1746  * vcpu->cpu migration, should not allow system_timestamp from
1747  * the rest of the vcpus to remain static. Otherwise ntp frequency
1748  * correction applies to one vcpu's system_timestamp but not
1749  * the others.
1750  *
1751  * So in those cases, request a kvmclock update for all vcpus.
1752  * We need to rate-limit these requests though, as they can
1753  * considerably slow guests that have a large number of vcpus.
1754  * The time for a remote vcpu to update its kvmclock is bound
1755  * by the delay we use to rate-limit the updates.
1756  */
1757
1758 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1759
1760 static void kvmclock_update_fn(struct work_struct *work)
1761 {
1762         int i;
1763         struct delayed_work *dwork = to_delayed_work(work);
1764         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1765                                            kvmclock_update_work);
1766         struct kvm *kvm = container_of(ka, struct kvm, arch);
1767         struct kvm_vcpu *vcpu;
1768
1769         kvm_for_each_vcpu(i, vcpu, kvm) {
1770                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1771                 kvm_vcpu_kick(vcpu);
1772         }
1773 }
1774
1775 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1776 {
1777         struct kvm *kvm = v->kvm;
1778
1779         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1780         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1781                                         KVMCLOCK_UPDATE_DELAY);
1782 }
1783
1784 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1785
1786 static void kvmclock_sync_fn(struct work_struct *work)
1787 {
1788         struct delayed_work *dwork = to_delayed_work(work);
1789         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1790                                            kvmclock_sync_work);
1791         struct kvm *kvm = container_of(ka, struct kvm, arch);
1792
1793         if (!kvmclock_periodic_sync)
1794                 return;
1795
1796         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1797         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1798                                         KVMCLOCK_SYNC_PERIOD);
1799 }
1800
1801 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1802 {
1803         u64 mcg_cap = vcpu->arch.mcg_cap;
1804         unsigned bank_num = mcg_cap & 0xff;
1805
1806         switch (msr) {
1807         case MSR_IA32_MCG_STATUS:
1808                 vcpu->arch.mcg_status = data;
1809                 break;
1810         case MSR_IA32_MCG_CTL:
1811                 if (!(mcg_cap & MCG_CTL_P))
1812                         return 1;
1813                 if (data != 0 && data != ~(u64)0)
1814                         return -1;
1815                 vcpu->arch.mcg_ctl = data;
1816                 break;
1817         default:
1818                 if (msr >= MSR_IA32_MC0_CTL &&
1819                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1820                         u32 offset = msr - MSR_IA32_MC0_CTL;
1821                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1822                          * some Linux kernels though clear bit 10 in bank 4 to
1823                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1824                          * this to avoid an uncatched #GP in the guest
1825                          */
1826                         if ((offset & 0x3) == 0 &&
1827                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1828                                 return -1;
1829                         vcpu->arch.mce_banks[offset] = data;
1830                         break;
1831                 }
1832                 return 1;
1833         }
1834         return 0;
1835 }
1836
1837 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1838 {
1839         struct kvm *kvm = vcpu->kvm;
1840         int lm = is_long_mode(vcpu);
1841         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1842                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1843         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1844                 : kvm->arch.xen_hvm_config.blob_size_32;
1845         u32 page_num = data & ~PAGE_MASK;
1846         u64 page_addr = data & PAGE_MASK;
1847         u8 *page;
1848         int r;
1849
1850         r = -E2BIG;
1851         if (page_num >= blob_size)
1852                 goto out;
1853         r = -ENOMEM;
1854         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1855         if (IS_ERR(page)) {
1856                 r = PTR_ERR(page);
1857                 goto out;
1858         }
1859         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1860                 goto out_free;
1861         r = 0;
1862 out_free:
1863         kfree(page);
1864 out:
1865         return r;
1866 }
1867
1868 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1869 {
1870         gpa_t gpa = data & ~0x3f;
1871
1872         /* Bits 2:5 are reserved, Should be zero */
1873         if (data & 0x3c)
1874                 return 1;
1875
1876         vcpu->arch.apf.msr_val = data;
1877
1878         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1879                 kvm_clear_async_pf_completion_queue(vcpu);
1880                 kvm_async_pf_hash_reset(vcpu);
1881                 return 0;
1882         }
1883
1884         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1885                                         sizeof(u32)))
1886                 return 1;
1887
1888         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1889         kvm_async_pf_wakeup_all(vcpu);
1890         return 0;
1891 }
1892
1893 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1894 {
1895         vcpu->arch.pv_time_enabled = false;
1896 }
1897
1898 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1899 {
1900         u64 delta;
1901
1902         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1903                 return;
1904
1905         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1906         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1907         vcpu->arch.st.accum_steal = delta;
1908 }
1909
1910 static void record_steal_time(struct kvm_vcpu *vcpu)
1911 {
1912         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1913                 return;
1914
1915         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1916                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1917                 return;
1918
1919         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1920         vcpu->arch.st.steal.version += 2;
1921         vcpu->arch.st.accum_steal = 0;
1922
1923         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1924                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1925 }
1926
1927 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1928 {
1929         bool pr = false;
1930         u32 msr = msr_info->index;
1931         u64 data = msr_info->data;
1932
1933         switch (msr) {
1934         case MSR_AMD64_NB_CFG:
1935         case MSR_IA32_UCODE_REV:
1936         case MSR_IA32_UCODE_WRITE:
1937         case MSR_VM_HSAVE_PA:
1938         case MSR_AMD64_PATCH_LOADER:
1939         case MSR_AMD64_BU_CFG2:
1940                 break;
1941
1942         case MSR_EFER:
1943                 return set_efer(vcpu, data);
1944         case MSR_K7_HWCR:
1945                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1946                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1947                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1948                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
1949                 if (data != 0) {
1950                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1951                                     data);
1952                         return 1;
1953                 }
1954                 break;
1955         case MSR_FAM10H_MMIO_CONF_BASE:
1956                 if (data != 0) {
1957                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1958                                     "0x%llx\n", data);
1959                         return 1;
1960                 }
1961                 break;
1962         case MSR_IA32_DEBUGCTLMSR:
1963                 if (!data) {
1964                         /* We support the non-activated case already */
1965                         break;
1966                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1967                         /* Values other than LBR and BTF are vendor-specific,
1968                            thus reserved and should throw a #GP */
1969                         return 1;
1970                 }
1971                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1972                             __func__, data);
1973                 break;
1974         case 0x200 ... 0x2ff:
1975                 return kvm_mtrr_set_msr(vcpu, msr, data);
1976         case MSR_IA32_APICBASE:
1977                 return kvm_set_apic_base(vcpu, msr_info);
1978         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1979                 return kvm_x2apic_msr_write(vcpu, msr, data);
1980         case MSR_IA32_TSCDEADLINE:
1981                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1982                 break;
1983         case MSR_IA32_TSC_ADJUST:
1984                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
1985                         if (!msr_info->host_initiated) {
1986                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
1987                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
1988                         }
1989                         vcpu->arch.ia32_tsc_adjust_msr = data;
1990                 }
1991                 break;
1992         case MSR_IA32_MISC_ENABLE:
1993                 vcpu->arch.ia32_misc_enable_msr = data;
1994                 break;
1995         case MSR_IA32_SMBASE:
1996                 if (!msr_info->host_initiated)
1997                         return 1;
1998                 vcpu->arch.smbase = data;
1999                 break;
2000         case MSR_KVM_WALL_CLOCK_NEW:
2001         case MSR_KVM_WALL_CLOCK:
2002                 vcpu->kvm->arch.wall_clock = data;
2003                 kvm_write_wall_clock(vcpu->kvm, data);
2004                 break;
2005         case MSR_KVM_SYSTEM_TIME_NEW:
2006         case MSR_KVM_SYSTEM_TIME: {
2007                 u64 gpa_offset;
2008                 struct kvm_arch *ka = &vcpu->kvm->arch;
2009
2010                 kvmclock_reset(vcpu);
2011
2012                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2013                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2014
2015                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2016                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2017                                         &vcpu->requests);
2018
2019                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2020
2021                         ka->kvmclock_offset = -get_kernel_ns();
2022                 }
2023
2024                 vcpu->arch.time = data;
2025                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2026
2027                 /* we verify if the enable bit is set... */
2028                 if (!(data & 1))
2029                         break;
2030
2031                 gpa_offset = data & ~(PAGE_MASK | 1);
2032
2033                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2034                      &vcpu->arch.pv_time, data & ~1ULL,
2035                      sizeof(struct pvclock_vcpu_time_info)))
2036                         vcpu->arch.pv_time_enabled = false;
2037                 else
2038                         vcpu->arch.pv_time_enabled = true;
2039
2040                 break;
2041         }
2042         case MSR_KVM_ASYNC_PF_EN:
2043                 if (kvm_pv_enable_async_pf(vcpu, data))
2044                         return 1;
2045                 break;
2046         case MSR_KVM_STEAL_TIME:
2047
2048                 if (unlikely(!sched_info_on()))
2049                         return 1;
2050
2051                 if (data & KVM_STEAL_RESERVED_MASK)
2052                         return 1;
2053
2054                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2055                                                 data & KVM_STEAL_VALID_BITS,
2056                                                 sizeof(struct kvm_steal_time)))
2057                         return 1;
2058
2059                 vcpu->arch.st.msr_val = data;
2060
2061                 if (!(data & KVM_MSR_ENABLED))
2062                         break;
2063
2064                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2065
2066                 preempt_disable();
2067                 accumulate_steal_time(vcpu);
2068                 preempt_enable();
2069
2070                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2071
2072                 break;
2073         case MSR_KVM_PV_EOI_EN:
2074                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2075                         return 1;
2076                 break;
2077
2078         case MSR_IA32_MCG_CTL:
2079         case MSR_IA32_MCG_STATUS:
2080         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2081                 return set_msr_mce(vcpu, msr, data);
2082
2083         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2084         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2085                 pr = true; /* fall through */
2086         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2087         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2088                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2089                         return kvm_pmu_set_msr(vcpu, msr_info);
2090
2091                 if (pr || data != 0)
2092                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2093                                     "0x%x data 0x%llx\n", msr, data);
2094                 break;
2095         case MSR_K7_CLK_CTL:
2096                 /*
2097                  * Ignore all writes to this no longer documented MSR.
2098                  * Writes are only relevant for old K7 processors,
2099                  * all pre-dating SVM, but a recommended workaround from
2100                  * AMD for these chips. It is possible to specify the
2101                  * affected processor models on the command line, hence
2102                  * the need to ignore the workaround.
2103                  */
2104                 break;
2105         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2106                 return kvm_hv_set_msr_common(vcpu, msr, data);
2107         case MSR_IA32_BBL_CR_CTL3:
2108                 /* Drop writes to this legacy MSR -- see rdmsr
2109                  * counterpart for further detail.
2110                  */
2111                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2112                 break;
2113         case MSR_AMD64_OSVW_ID_LENGTH:
2114                 if (!guest_cpuid_has_osvw(vcpu))
2115                         return 1;
2116                 vcpu->arch.osvw.length = data;
2117                 break;
2118         case MSR_AMD64_OSVW_STATUS:
2119                 if (!guest_cpuid_has_osvw(vcpu))
2120                         return 1;
2121                 vcpu->arch.osvw.status = data;
2122                 break;
2123         default:
2124                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2125                         return xen_hvm_config(vcpu, data);
2126                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2127                         return kvm_pmu_set_msr(vcpu, msr_info);
2128                 if (!ignore_msrs) {
2129                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2130                                     msr, data);
2131                         return 1;
2132                 } else {
2133                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2134                                     msr, data);
2135                         break;
2136                 }
2137         }
2138         return 0;
2139 }
2140 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2141
2142
2143 /*
2144  * Reads an msr value (of 'msr_index') into 'pdata'.
2145  * Returns 0 on success, non-0 otherwise.
2146  * Assumes vcpu_load() was already called.
2147  */
2148 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2149 {
2150         return kvm_x86_ops->get_msr(vcpu, msr);
2151 }
2152 EXPORT_SYMBOL_GPL(kvm_get_msr);
2153
2154 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2155 {
2156         u64 data;
2157         u64 mcg_cap = vcpu->arch.mcg_cap;
2158         unsigned bank_num = mcg_cap & 0xff;
2159
2160         switch (msr) {
2161         case MSR_IA32_P5_MC_ADDR:
2162         case MSR_IA32_P5_MC_TYPE:
2163                 data = 0;
2164                 break;
2165         case MSR_IA32_MCG_CAP:
2166                 data = vcpu->arch.mcg_cap;
2167                 break;
2168         case MSR_IA32_MCG_CTL:
2169                 if (!(mcg_cap & MCG_CTL_P))
2170                         return 1;
2171                 data = vcpu->arch.mcg_ctl;
2172                 break;
2173         case MSR_IA32_MCG_STATUS:
2174                 data = vcpu->arch.mcg_status;
2175                 break;
2176         default:
2177                 if (msr >= MSR_IA32_MC0_CTL &&
2178                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2179                         u32 offset = msr - MSR_IA32_MC0_CTL;
2180                         data = vcpu->arch.mce_banks[offset];
2181                         break;
2182                 }
2183                 return 1;
2184         }
2185         *pdata = data;
2186         return 0;
2187 }
2188
2189 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2190 {
2191         switch (msr_info->index) {
2192         case MSR_IA32_PLATFORM_ID:
2193         case MSR_IA32_EBL_CR_POWERON:
2194         case MSR_IA32_DEBUGCTLMSR:
2195         case MSR_IA32_LASTBRANCHFROMIP:
2196         case MSR_IA32_LASTBRANCHTOIP:
2197         case MSR_IA32_LASTINTFROMIP:
2198         case MSR_IA32_LASTINTTOIP:
2199         case MSR_K8_SYSCFG:
2200         case MSR_K7_HWCR:
2201         case MSR_VM_HSAVE_PA:
2202         case MSR_K8_INT_PENDING_MSG:
2203         case MSR_AMD64_NB_CFG:
2204         case MSR_FAM10H_MMIO_CONF_BASE:
2205         case MSR_AMD64_BU_CFG2:
2206                 msr_info->data = 0;
2207                 break;
2208         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2209         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2210         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2211         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2212                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2213                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2214                 msr_info->data = 0;
2215                 break;
2216         case MSR_IA32_UCODE_REV:
2217                 msr_info->data = 0x100000000ULL;
2218                 break;
2219         case MSR_MTRRcap:
2220         case 0x200 ... 0x2ff:
2221                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2222         case 0xcd: /* fsb frequency */
2223                 msr_info->data = 3;
2224                 break;
2225                 /*
2226                  * MSR_EBC_FREQUENCY_ID
2227                  * Conservative value valid for even the basic CPU models.
2228                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2229                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2230                  * and 266MHz for model 3, or 4. Set Core Clock
2231                  * Frequency to System Bus Frequency Ratio to 1 (bits
2232                  * 31:24) even though these are only valid for CPU
2233                  * models > 2, however guests may end up dividing or
2234                  * multiplying by zero otherwise.
2235                  */
2236         case MSR_EBC_FREQUENCY_ID:
2237                 msr_info->data = 1 << 24;
2238                 break;
2239         case MSR_IA32_APICBASE:
2240                 msr_info->data = kvm_get_apic_base(vcpu);
2241                 break;
2242         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2243                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2244                 break;
2245         case MSR_IA32_TSCDEADLINE:
2246                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2247                 break;
2248         case MSR_IA32_TSC_ADJUST:
2249                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2250                 break;
2251         case MSR_IA32_MISC_ENABLE:
2252                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2253                 break;
2254         case MSR_IA32_SMBASE:
2255                 if (!msr_info->host_initiated)
2256                         return 1;
2257                 msr_info->data = vcpu->arch.smbase;
2258                 break;
2259         case MSR_IA32_PERF_STATUS:
2260                 /* TSC increment by tick */
2261                 msr_info->data = 1000ULL;
2262                 /* CPU multiplier */
2263                 msr_info->data |= (((uint64_t)4ULL) << 40);
2264                 break;
2265         case MSR_EFER:
2266                 msr_info->data = vcpu->arch.efer;
2267                 break;
2268         case MSR_KVM_WALL_CLOCK:
2269         case MSR_KVM_WALL_CLOCK_NEW:
2270                 msr_info->data = vcpu->kvm->arch.wall_clock;
2271                 break;
2272         case MSR_KVM_SYSTEM_TIME:
2273         case MSR_KVM_SYSTEM_TIME_NEW:
2274                 msr_info->data = vcpu->arch.time;
2275                 break;
2276         case MSR_KVM_ASYNC_PF_EN:
2277                 msr_info->data = vcpu->arch.apf.msr_val;
2278                 break;
2279         case MSR_KVM_STEAL_TIME:
2280                 msr_info->data = vcpu->arch.st.msr_val;
2281                 break;
2282         case MSR_KVM_PV_EOI_EN:
2283                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2284                 break;
2285         case MSR_IA32_P5_MC_ADDR:
2286         case MSR_IA32_P5_MC_TYPE:
2287         case MSR_IA32_MCG_CAP:
2288         case MSR_IA32_MCG_CTL:
2289         case MSR_IA32_MCG_STATUS:
2290         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2291                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2292         case MSR_K7_CLK_CTL:
2293                 /*
2294                  * Provide expected ramp-up count for K7. All other
2295                  * are set to zero, indicating minimum divisors for
2296                  * every field.
2297                  *
2298                  * This prevents guest kernels on AMD host with CPU
2299                  * type 6, model 8 and higher from exploding due to
2300                  * the rdmsr failing.
2301                  */
2302                 msr_info->data = 0x20000000;
2303                 break;
2304         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2305                 return kvm_hv_get_msr_common(vcpu,
2306                                              msr_info->index, &msr_info->data);
2307                 break;
2308         case MSR_IA32_BBL_CR_CTL3:
2309                 /* This legacy MSR exists but isn't fully documented in current
2310                  * silicon.  It is however accessed by winxp in very narrow
2311                  * scenarios where it sets bit #19, itself documented as
2312                  * a "reserved" bit.  Best effort attempt to source coherent
2313                  * read data here should the balance of the register be
2314                  * interpreted by the guest:
2315                  *
2316                  * L2 cache control register 3: 64GB range, 256KB size,
2317                  * enabled, latency 0x1, configured
2318                  */
2319                 msr_info->data = 0xbe702111;
2320                 break;
2321         case MSR_AMD64_OSVW_ID_LENGTH:
2322                 if (!guest_cpuid_has_osvw(vcpu))
2323                         return 1;
2324                 msr_info->data = vcpu->arch.osvw.length;
2325                 break;
2326         case MSR_AMD64_OSVW_STATUS:
2327                 if (!guest_cpuid_has_osvw(vcpu))
2328                         return 1;
2329                 msr_info->data = vcpu->arch.osvw.status;
2330                 break;
2331         default:
2332                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2333                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2334                 if (!ignore_msrs) {
2335                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2336                         return 1;
2337                 } else {
2338                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2339                         msr_info->data = 0;
2340                 }
2341                 break;
2342         }
2343         return 0;
2344 }
2345 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2346
2347 /*
2348  * Read or write a bunch of msrs. All parameters are kernel addresses.
2349  *
2350  * @return number of msrs set successfully.
2351  */
2352 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2353                     struct kvm_msr_entry *entries,
2354                     int (*do_msr)(struct kvm_vcpu *vcpu,
2355                                   unsigned index, u64 *data))
2356 {
2357         int i, idx;
2358
2359         idx = srcu_read_lock(&vcpu->kvm->srcu);
2360         for (i = 0; i < msrs->nmsrs; ++i)
2361                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2362                         break;
2363         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2364
2365         return i;
2366 }
2367
2368 /*
2369  * Read or write a bunch of msrs. Parameters are user addresses.
2370  *
2371  * @return number of msrs set successfully.
2372  */
2373 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2374                   int (*do_msr)(struct kvm_vcpu *vcpu,
2375                                 unsigned index, u64 *data),
2376                   int writeback)
2377 {
2378         struct kvm_msrs msrs;
2379         struct kvm_msr_entry *entries;
2380         int r, n;
2381         unsigned size;
2382
2383         r = -EFAULT;
2384         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2385                 goto out;
2386
2387         r = -E2BIG;
2388         if (msrs.nmsrs >= MAX_IO_MSRS)
2389                 goto out;
2390
2391         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2392         entries = memdup_user(user_msrs->entries, size);
2393         if (IS_ERR(entries)) {
2394                 r = PTR_ERR(entries);
2395                 goto out;
2396         }
2397
2398         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2399         if (r < 0)
2400                 goto out_free;
2401
2402         r = -EFAULT;
2403         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2404                 goto out_free;
2405
2406         r = n;
2407
2408 out_free:
2409         kfree(entries);
2410 out:
2411         return r;
2412 }
2413
2414 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2415 {
2416         int r;
2417
2418         switch (ext) {
2419         case KVM_CAP_IRQCHIP:
2420         case KVM_CAP_HLT:
2421         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2422         case KVM_CAP_SET_TSS_ADDR:
2423         case KVM_CAP_EXT_CPUID:
2424         case KVM_CAP_EXT_EMUL_CPUID:
2425         case KVM_CAP_CLOCKSOURCE:
2426         case KVM_CAP_PIT:
2427         case KVM_CAP_NOP_IO_DELAY:
2428         case KVM_CAP_MP_STATE:
2429         case KVM_CAP_SYNC_MMU:
2430         case KVM_CAP_USER_NMI:
2431         case KVM_CAP_REINJECT_CONTROL:
2432         case KVM_CAP_IRQ_INJECT_STATUS:
2433         case KVM_CAP_IOEVENTFD:
2434         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2435         case KVM_CAP_PIT2:
2436         case KVM_CAP_PIT_STATE2:
2437         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2438         case KVM_CAP_XEN_HVM:
2439         case KVM_CAP_ADJUST_CLOCK:
2440         case KVM_CAP_VCPU_EVENTS:
2441         case KVM_CAP_HYPERV:
2442         case KVM_CAP_HYPERV_VAPIC:
2443         case KVM_CAP_HYPERV_SPIN:
2444         case KVM_CAP_PCI_SEGMENT:
2445         case KVM_CAP_DEBUGREGS:
2446         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2447         case KVM_CAP_XSAVE:
2448         case KVM_CAP_ASYNC_PF:
2449         case KVM_CAP_GET_TSC_KHZ:
2450         case KVM_CAP_KVMCLOCK_CTRL:
2451         case KVM_CAP_READONLY_MEM:
2452         case KVM_CAP_HYPERV_TIME:
2453         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2454         case KVM_CAP_TSC_DEADLINE_TIMER:
2455         case KVM_CAP_ENABLE_CAP_VM:
2456         case KVM_CAP_DISABLE_QUIRKS:
2457 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2458         case KVM_CAP_ASSIGN_DEV_IRQ:
2459         case KVM_CAP_PCI_2_3:
2460 #endif
2461                 r = 1;
2462                 break;
2463         case KVM_CAP_X86_SMM:
2464                 /* SMBASE is usually relocated above 1M on modern chipsets,
2465                  * and SMM handlers might indeed rely on 4G segment limits,
2466                  * so do not report SMM to be available if real mode is
2467                  * emulated via vm86 mode.  Still, do not go to great lengths
2468                  * to avoid userspace's usage of the feature, because it is a
2469                  * fringe case that is not enabled except via specific settings
2470                  * of the module parameters.
2471                  */
2472                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2473                 break;
2474         case KVM_CAP_COALESCED_MMIO:
2475                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2476                 break;
2477         case KVM_CAP_VAPIC:
2478                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2479                 break;
2480         case KVM_CAP_NR_VCPUS:
2481                 r = KVM_SOFT_MAX_VCPUS;
2482                 break;
2483         case KVM_CAP_MAX_VCPUS:
2484                 r = KVM_MAX_VCPUS;
2485                 break;
2486         case KVM_CAP_NR_MEMSLOTS:
2487                 r = KVM_USER_MEM_SLOTS;
2488                 break;
2489         case KVM_CAP_PV_MMU:    /* obsolete */
2490                 r = 0;
2491                 break;
2492 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2493         case KVM_CAP_IOMMU:
2494                 r = iommu_present(&pci_bus_type);
2495                 break;
2496 #endif
2497         case KVM_CAP_MCE:
2498                 r = KVM_MAX_MCE_BANKS;
2499                 break;
2500         case KVM_CAP_XCRS:
2501                 r = cpu_has_xsave;
2502                 break;
2503         case KVM_CAP_TSC_CONTROL:
2504                 r = kvm_has_tsc_control;
2505                 break;
2506         default:
2507                 r = 0;
2508                 break;
2509         }
2510         return r;
2511
2512 }
2513
2514 long kvm_arch_dev_ioctl(struct file *filp,
2515                         unsigned int ioctl, unsigned long arg)
2516 {
2517         void __user *argp = (void __user *)arg;
2518         long r;
2519
2520         switch (ioctl) {
2521         case KVM_GET_MSR_INDEX_LIST: {
2522                 struct kvm_msr_list __user *user_msr_list = argp;
2523                 struct kvm_msr_list msr_list;
2524                 unsigned n;
2525
2526                 r = -EFAULT;
2527                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2528                         goto out;
2529                 n = msr_list.nmsrs;
2530                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2531                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2532                         goto out;
2533                 r = -E2BIG;
2534                 if (n < msr_list.nmsrs)
2535                         goto out;
2536                 r = -EFAULT;
2537                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2538                                  num_msrs_to_save * sizeof(u32)))
2539                         goto out;
2540                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2541                                  &emulated_msrs,
2542                                  num_emulated_msrs * sizeof(u32)))
2543                         goto out;
2544                 r = 0;
2545                 break;
2546         }
2547         case KVM_GET_SUPPORTED_CPUID:
2548         case KVM_GET_EMULATED_CPUID: {
2549                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2550                 struct kvm_cpuid2 cpuid;
2551
2552                 r = -EFAULT;
2553                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2554                         goto out;
2555
2556                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2557                                             ioctl);
2558                 if (r)
2559                         goto out;
2560
2561                 r = -EFAULT;
2562                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2563                         goto out;
2564                 r = 0;
2565                 break;
2566         }
2567         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2568                 u64 mce_cap;
2569
2570                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2571                 r = -EFAULT;
2572                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2573                         goto out;
2574                 r = 0;
2575                 break;
2576         }
2577         default:
2578                 r = -EINVAL;
2579         }
2580 out:
2581         return r;
2582 }
2583
2584 static void wbinvd_ipi(void *garbage)
2585 {
2586         wbinvd();
2587 }
2588
2589 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2590 {
2591         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2592 }
2593
2594 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2595 {
2596         /* Address WBINVD may be executed by guest */
2597         if (need_emulate_wbinvd(vcpu)) {
2598                 if (kvm_x86_ops->has_wbinvd_exit())
2599                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2600                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2601                         smp_call_function_single(vcpu->cpu,
2602                                         wbinvd_ipi, NULL, 1);
2603         }
2604
2605         kvm_x86_ops->vcpu_load(vcpu, cpu);
2606
2607         /* Apply any externally detected TSC adjustments (due to suspend) */
2608         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2609                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2610                 vcpu->arch.tsc_offset_adjustment = 0;
2611                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2612         }
2613
2614         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2615                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2616                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2617                 if (tsc_delta < 0)
2618                         mark_tsc_unstable("KVM discovered backwards TSC");
2619                 if (check_tsc_unstable()) {
2620                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2621                                                 vcpu->arch.last_guest_tsc);
2622                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2623                         vcpu->arch.tsc_catchup = 1;
2624                 }
2625                 /*
2626                  * On a host with synchronized TSC, there is no need to update
2627                  * kvmclock on vcpu->cpu migration
2628                  */
2629                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2630                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2631                 if (vcpu->cpu != cpu)
2632                         kvm_migrate_timers(vcpu);
2633                 vcpu->cpu = cpu;
2634         }
2635
2636         accumulate_steal_time(vcpu);
2637         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2638 }
2639
2640 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2641 {
2642         kvm_x86_ops->vcpu_put(vcpu);
2643         kvm_put_guest_fpu(vcpu);
2644         vcpu->arch.last_host_tsc = native_read_tsc();
2645 }
2646
2647 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2648                                     struct kvm_lapic_state *s)
2649 {
2650         kvm_x86_ops->sync_pir_to_irr(vcpu);
2651         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2652
2653         return 0;
2654 }
2655
2656 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2657                                     struct kvm_lapic_state *s)
2658 {
2659         kvm_apic_post_state_restore(vcpu, s);
2660         update_cr8_intercept(vcpu);
2661
2662         return 0;
2663 }
2664
2665 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2666                                     struct kvm_interrupt *irq)
2667 {
2668         if (irq->irq >= KVM_NR_INTERRUPTS)
2669                 return -EINVAL;
2670         if (irqchip_in_kernel(vcpu->kvm))
2671                 return -ENXIO;
2672
2673         kvm_queue_interrupt(vcpu, irq->irq, false);
2674         kvm_make_request(KVM_REQ_EVENT, vcpu);
2675
2676         return 0;
2677 }
2678
2679 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2680 {
2681         kvm_inject_nmi(vcpu);
2682
2683         return 0;
2684 }
2685
2686 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2687 {
2688         kvm_make_request(KVM_REQ_SMI, vcpu);
2689
2690         return 0;
2691 }
2692
2693 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2694                                            struct kvm_tpr_access_ctl *tac)
2695 {
2696         if (tac->flags)
2697                 return -EINVAL;
2698         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2699         return 0;
2700 }
2701
2702 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2703                                         u64 mcg_cap)
2704 {
2705         int r;
2706         unsigned bank_num = mcg_cap & 0xff, bank;
2707
2708         r = -EINVAL;
2709         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2710                 goto out;
2711         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2712                 goto out;
2713         r = 0;
2714         vcpu->arch.mcg_cap = mcg_cap;
2715         /* Init IA32_MCG_CTL to all 1s */
2716         if (mcg_cap & MCG_CTL_P)
2717                 vcpu->arch.mcg_ctl = ~(u64)0;
2718         /* Init IA32_MCi_CTL to all 1s */
2719         for (bank = 0; bank < bank_num; bank++)
2720                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2721 out:
2722         return r;
2723 }
2724
2725 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2726                                       struct kvm_x86_mce *mce)
2727 {
2728         u64 mcg_cap = vcpu->arch.mcg_cap;
2729         unsigned bank_num = mcg_cap & 0xff;
2730         u64 *banks = vcpu->arch.mce_banks;
2731
2732         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2733                 return -EINVAL;
2734         /*
2735          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2736          * reporting is disabled
2737          */
2738         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2739             vcpu->arch.mcg_ctl != ~(u64)0)
2740                 return 0;
2741         banks += 4 * mce->bank;
2742         /*
2743          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2744          * reporting is disabled for the bank
2745          */
2746         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2747                 return 0;
2748         if (mce->status & MCI_STATUS_UC) {
2749                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2750                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2751                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2752                         return 0;
2753                 }
2754                 if (banks[1] & MCI_STATUS_VAL)
2755                         mce->status |= MCI_STATUS_OVER;
2756                 banks[2] = mce->addr;
2757                 banks[3] = mce->misc;
2758                 vcpu->arch.mcg_status = mce->mcg_status;
2759                 banks[1] = mce->status;
2760                 kvm_queue_exception(vcpu, MC_VECTOR);
2761         } else if (!(banks[1] & MCI_STATUS_VAL)
2762                    || !(banks[1] & MCI_STATUS_UC)) {
2763                 if (banks[1] & MCI_STATUS_VAL)
2764                         mce->status |= MCI_STATUS_OVER;
2765                 banks[2] = mce->addr;
2766                 banks[3] = mce->misc;
2767                 banks[1] = mce->status;
2768         } else
2769                 banks[1] |= MCI_STATUS_OVER;
2770         return 0;
2771 }
2772
2773 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2774                                                struct kvm_vcpu_events *events)
2775 {
2776         process_nmi(vcpu);
2777         events->exception.injected =
2778                 vcpu->arch.exception.pending &&
2779                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2780         events->exception.nr = vcpu->arch.exception.nr;
2781         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2782         events->exception.pad = 0;
2783         events->exception.error_code = vcpu->arch.exception.error_code;
2784
2785         events->interrupt.injected =
2786                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2787         events->interrupt.nr = vcpu->arch.interrupt.nr;
2788         events->interrupt.soft = 0;
2789         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2790
2791         events->nmi.injected = vcpu->arch.nmi_injected;
2792         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2793         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2794         events->nmi.pad = 0;
2795
2796         events->sipi_vector = 0; /* never valid when reporting to user space */
2797
2798         events->smi.smm = is_smm(vcpu);
2799         events->smi.pending = vcpu->arch.smi_pending;
2800         events->smi.smm_inside_nmi =
2801                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2802         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2803
2804         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2805                          | KVM_VCPUEVENT_VALID_SHADOW
2806                          | KVM_VCPUEVENT_VALID_SMM);
2807         memset(&events->reserved, 0, sizeof(events->reserved));
2808 }
2809
2810 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2811                                               struct kvm_vcpu_events *events)
2812 {
2813         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2814                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2815                               | KVM_VCPUEVENT_VALID_SHADOW
2816                               | KVM_VCPUEVENT_VALID_SMM))
2817                 return -EINVAL;
2818
2819         process_nmi(vcpu);
2820         vcpu->arch.exception.pending = events->exception.injected;
2821         vcpu->arch.exception.nr = events->exception.nr;
2822         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2823         vcpu->arch.exception.error_code = events->exception.error_code;
2824
2825         vcpu->arch.interrupt.pending = events->interrupt.injected;
2826         vcpu->arch.interrupt.nr = events->interrupt.nr;
2827         vcpu->arch.interrupt.soft = events->interrupt.soft;
2828         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2829                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2830                                                   events->interrupt.shadow);
2831
2832         vcpu->arch.nmi_injected = events->nmi.injected;
2833         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2834                 vcpu->arch.nmi_pending = events->nmi.pending;
2835         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2836
2837         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2838             kvm_vcpu_has_lapic(vcpu))
2839                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2840
2841         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2842                 if (events->smi.smm)
2843                         vcpu->arch.hflags |= HF_SMM_MASK;
2844                 else
2845                         vcpu->arch.hflags &= ~HF_SMM_MASK;
2846                 vcpu->arch.smi_pending = events->smi.pending;
2847                 if (events->smi.smm_inside_nmi)
2848                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2849                 else
2850                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
2851                 if (kvm_vcpu_has_lapic(vcpu)) {
2852                         if (events->smi.latched_init)
2853                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2854                         else
2855                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2856                 }
2857         }
2858
2859         kvm_make_request(KVM_REQ_EVENT, vcpu);
2860
2861         return 0;
2862 }
2863
2864 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2865                                              struct kvm_debugregs *dbgregs)
2866 {
2867         unsigned long val;
2868
2869         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2870         kvm_get_dr(vcpu, 6, &val);
2871         dbgregs->dr6 = val;
2872         dbgregs->dr7 = vcpu->arch.dr7;
2873         dbgregs->flags = 0;
2874         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2875 }
2876
2877 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2878                                             struct kvm_debugregs *dbgregs)
2879 {
2880         if (dbgregs->flags)
2881                 return -EINVAL;
2882
2883         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2884         kvm_update_dr0123(vcpu);
2885         vcpu->arch.dr6 = dbgregs->dr6;
2886         kvm_update_dr6(vcpu);
2887         vcpu->arch.dr7 = dbgregs->dr7;
2888         kvm_update_dr7(vcpu);
2889
2890         return 0;
2891 }
2892
2893 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
2894
2895 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
2896 {
2897         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
2898         u64 xstate_bv = xsave->header.xfeatures;
2899         u64 valid;
2900
2901         /*
2902          * Copy legacy XSAVE area, to avoid complications with CPUID
2903          * leaves 0 and 1 in the loop below.
2904          */
2905         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
2906
2907         /* Set XSTATE_BV */
2908         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
2909
2910         /*
2911          * Copy each region from the possibly compacted offset to the
2912          * non-compacted offset.
2913          */
2914         valid = xstate_bv & ~XSTATE_FPSSE;
2915         while (valid) {
2916                 u64 feature = valid & -valid;
2917                 int index = fls64(feature) - 1;
2918                 void *src = get_xsave_addr(xsave, feature);
2919
2920                 if (src) {
2921                         u32 size, offset, ecx, edx;
2922                         cpuid_count(XSTATE_CPUID, index,
2923                                     &size, &offset, &ecx, &edx);
2924                         memcpy(dest + offset, src, size);
2925                 }
2926
2927                 valid -= feature;
2928         }
2929 }
2930
2931 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
2932 {
2933         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
2934         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
2935         u64 valid;
2936
2937         /*
2938          * Copy legacy XSAVE area, to avoid complications with CPUID
2939          * leaves 0 and 1 in the loop below.
2940          */
2941         memcpy(xsave, src, XSAVE_HDR_OFFSET);
2942
2943         /* Set XSTATE_BV and possibly XCOMP_BV.  */
2944         xsave->header.xfeatures = xstate_bv;
2945         if (cpu_has_xsaves)
2946                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
2947
2948         /*
2949          * Copy each region from the non-compacted offset to the
2950          * possibly compacted offset.
2951          */
2952         valid = xstate_bv & ~XSTATE_FPSSE;
2953         while (valid) {
2954                 u64 feature = valid & -valid;
2955                 int index = fls64(feature) - 1;
2956                 void *dest = get_xsave_addr(xsave, feature);
2957
2958                 if (dest) {
2959                         u32 size, offset, ecx, edx;
2960                         cpuid_count(XSTATE_CPUID, index,
2961                                     &size, &offset, &ecx, &edx);
2962                         memcpy(dest, src + offset, size);
2963                 }
2964
2965                 valid -= feature;
2966         }
2967 }
2968
2969 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2970                                          struct kvm_xsave *guest_xsave)
2971 {
2972         if (cpu_has_xsave) {
2973                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
2974                 fill_xsave((u8 *) guest_xsave->region, vcpu);
2975         } else {
2976                 memcpy(guest_xsave->region,
2977                         &vcpu->arch.guest_fpu.state.fxsave,
2978                         sizeof(struct fxregs_state));
2979                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2980                         XSTATE_FPSSE;
2981         }
2982 }
2983
2984 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2985                                         struct kvm_xsave *guest_xsave)
2986 {
2987         u64 xstate_bv =
2988                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2989
2990         if (cpu_has_xsave) {
2991                 /*
2992                  * Here we allow setting states that are not present in
2993                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
2994                  * with old userspace.
2995                  */
2996                 if (xstate_bv & ~kvm_supported_xcr0())
2997                         return -EINVAL;
2998                 load_xsave(vcpu, (u8 *)guest_xsave->region);
2999         } else {
3000                 if (xstate_bv & ~XSTATE_FPSSE)
3001                         return -EINVAL;
3002                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3003                         guest_xsave->region, sizeof(struct fxregs_state));
3004         }
3005         return 0;
3006 }
3007
3008 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3009                                         struct kvm_xcrs *guest_xcrs)
3010 {
3011         if (!cpu_has_xsave) {
3012                 guest_xcrs->nr_xcrs = 0;
3013                 return;
3014         }
3015
3016         guest_xcrs->nr_xcrs = 1;
3017         guest_xcrs->flags = 0;
3018         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3019         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3020 }
3021
3022 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3023                                        struct kvm_xcrs *guest_xcrs)
3024 {
3025         int i, r = 0;
3026
3027         if (!cpu_has_xsave)
3028                 return -EINVAL;
3029
3030         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3031                 return -EINVAL;
3032
3033         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3034                 /* Only support XCR0 currently */
3035                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3036                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3037                                 guest_xcrs->xcrs[i].value);
3038                         break;
3039                 }
3040         if (r)
3041                 r = -EINVAL;
3042         return r;
3043 }
3044
3045 /*
3046  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3047  * stopped by the hypervisor.  This function will be called from the host only.
3048  * EINVAL is returned when the host attempts to set the flag for a guest that
3049  * does not support pv clocks.
3050  */
3051 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3052 {
3053         if (!vcpu->arch.pv_time_enabled)
3054                 return -EINVAL;
3055         vcpu->arch.pvclock_set_guest_stopped_request = true;
3056         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3057         return 0;
3058 }
3059
3060 long kvm_arch_vcpu_ioctl(struct file *filp,
3061                          unsigned int ioctl, unsigned long arg)
3062 {
3063         struct kvm_vcpu *vcpu = filp->private_data;
3064         void __user *argp = (void __user *)arg;
3065         int r;
3066         union {
3067                 struct kvm_lapic_state *lapic;
3068                 struct kvm_xsave *xsave;
3069                 struct kvm_xcrs *xcrs;
3070                 void *buffer;
3071         } u;
3072
3073         u.buffer = NULL;
3074         switch (ioctl) {
3075         case KVM_GET_LAPIC: {
3076                 r = -EINVAL;
3077                 if (!vcpu->arch.apic)
3078                         goto out;
3079                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3080
3081                 r = -ENOMEM;
3082                 if (!u.lapic)
3083                         goto out;
3084                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3085                 if (r)
3086                         goto out;
3087                 r = -EFAULT;
3088                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3089                         goto out;
3090                 r = 0;
3091                 break;
3092         }
3093         case KVM_SET_LAPIC: {
3094                 r = -EINVAL;
3095                 if (!vcpu->arch.apic)
3096                         goto out;
3097                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3098                 if (IS_ERR(u.lapic))
3099                         return PTR_ERR(u.lapic);
3100
3101                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3102                 break;
3103         }
3104         case KVM_INTERRUPT: {
3105                 struct kvm_interrupt irq;
3106
3107                 r = -EFAULT;
3108                 if (copy_from_user(&irq, argp, sizeof irq))
3109                         goto out;
3110                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3111                 break;
3112         }
3113         case KVM_NMI: {
3114                 r = kvm_vcpu_ioctl_nmi(vcpu);
3115                 break;
3116         }
3117         case KVM_SMI: {
3118                 r = kvm_vcpu_ioctl_smi(vcpu);
3119                 break;
3120         }
3121         case KVM_SET_CPUID: {
3122                 struct kvm_cpuid __user *cpuid_arg = argp;
3123                 struct kvm_cpuid cpuid;
3124
3125                 r = -EFAULT;
3126                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3127                         goto out;
3128                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3129                 break;
3130         }
3131         case KVM_SET_CPUID2: {
3132                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3133                 struct kvm_cpuid2 cpuid;
3134
3135                 r = -EFAULT;
3136                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3137                         goto out;
3138                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3139                                               cpuid_arg->entries);
3140                 break;
3141         }
3142         case KVM_GET_CPUID2: {
3143                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3144                 struct kvm_cpuid2 cpuid;
3145
3146                 r = -EFAULT;
3147                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3148                         goto out;
3149                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3150                                               cpuid_arg->entries);
3151                 if (r)
3152                         goto out;
3153                 r = -EFAULT;
3154                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3155                         goto out;
3156                 r = 0;
3157                 break;
3158         }
3159         case KVM_GET_MSRS:
3160                 r = msr_io(vcpu, argp, do_get_msr, 1);
3161                 break;
3162         case KVM_SET_MSRS:
3163                 r = msr_io(vcpu, argp, do_set_msr, 0);
3164                 break;
3165         case KVM_TPR_ACCESS_REPORTING: {
3166                 struct kvm_tpr_access_ctl tac;
3167
3168                 r = -EFAULT;
3169                 if (copy_from_user(&tac, argp, sizeof tac))
3170                         goto out;
3171                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3172                 if (r)
3173                         goto out;
3174                 r = -EFAULT;
3175                 if (copy_to_user(argp, &tac, sizeof tac))
3176                         goto out;
3177                 r = 0;
3178                 break;
3179         };
3180         case KVM_SET_VAPIC_ADDR: {
3181                 struct kvm_vapic_addr va;
3182
3183                 r = -EINVAL;
3184                 if (!irqchip_in_kernel(vcpu->kvm))
3185                         goto out;
3186                 r = -EFAULT;
3187                 if (copy_from_user(&va, argp, sizeof va))
3188                         goto out;
3189                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3190                 break;
3191         }
3192         case KVM_X86_SETUP_MCE: {
3193                 u64 mcg_cap;
3194
3195                 r = -EFAULT;
3196                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3197                         goto out;
3198                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3199                 break;
3200         }
3201         case KVM_X86_SET_MCE: {
3202                 struct kvm_x86_mce mce;
3203
3204                 r = -EFAULT;
3205                 if (copy_from_user(&mce, argp, sizeof mce))
3206                         goto out;
3207                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3208                 break;
3209         }
3210         case KVM_GET_VCPU_EVENTS: {
3211                 struct kvm_vcpu_events events;
3212
3213                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3214
3215                 r = -EFAULT;
3216                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3217                         break;
3218                 r = 0;
3219                 break;
3220         }
3221         case KVM_SET_VCPU_EVENTS: {
3222                 struct kvm_vcpu_events events;
3223
3224                 r = -EFAULT;
3225                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3226                         break;
3227
3228                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3229                 break;
3230         }
3231         case KVM_GET_DEBUGREGS: {
3232                 struct kvm_debugregs dbgregs;
3233
3234                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3235
3236                 r = -EFAULT;
3237                 if (copy_to_user(argp, &dbgregs,
3238                                  sizeof(struct kvm_debugregs)))
3239                         break;
3240                 r = 0;
3241                 break;
3242         }
3243         case KVM_SET_DEBUGREGS: {
3244                 struct kvm_debugregs dbgregs;
3245
3246                 r = -EFAULT;
3247                 if (copy_from_user(&dbgregs, argp,
3248                                    sizeof(struct kvm_debugregs)))
3249                         break;
3250
3251                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3252                 break;
3253         }
3254         case KVM_GET_XSAVE: {
3255                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3256                 r = -ENOMEM;
3257                 if (!u.xsave)
3258                         break;
3259
3260                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3261
3262                 r = -EFAULT;
3263                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3264                         break;
3265                 r = 0;
3266                 break;
3267         }
3268         case KVM_SET_XSAVE: {
3269                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3270                 if (IS_ERR(u.xsave))
3271                         return PTR_ERR(u.xsave);
3272
3273                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3274                 break;
3275         }
3276         case KVM_GET_XCRS: {
3277                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3278                 r = -ENOMEM;
3279                 if (!u.xcrs)
3280                         break;
3281
3282                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3283
3284                 r = -EFAULT;
3285                 if (copy_to_user(argp, u.xcrs,
3286                                  sizeof(struct kvm_xcrs)))
3287                         break;
3288                 r = 0;
3289                 break;
3290         }
3291         case KVM_SET_XCRS: {
3292                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3293                 if (IS_ERR(u.xcrs))
3294                         return PTR_ERR(u.xcrs);
3295
3296                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3297                 break;
3298         }
3299         case KVM_SET_TSC_KHZ: {
3300                 u32 user_tsc_khz;
3301
3302                 r = -EINVAL;
3303                 user_tsc_khz = (u32)arg;
3304
3305                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3306                         goto out;
3307
3308                 if (user_tsc_khz == 0)
3309                         user_tsc_khz = tsc_khz;
3310
3311                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3312
3313                 r = 0;
3314                 goto out;
3315         }
3316         case KVM_GET_TSC_KHZ: {
3317                 r = vcpu->arch.virtual_tsc_khz;
3318                 goto out;
3319         }
3320         case KVM_KVMCLOCK_CTRL: {
3321                 r = kvm_set_guest_paused(vcpu);
3322                 goto out;
3323         }
3324         default:
3325                 r = -EINVAL;
3326         }
3327 out:
3328         kfree(u.buffer);
3329         return r;
3330 }
3331
3332 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3333 {
3334         return VM_FAULT_SIGBUS;
3335 }
3336
3337 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3338 {
3339         int ret;
3340
3341         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3342                 return -EINVAL;
3343         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3344         return ret;
3345 }
3346
3347 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3348                                               u64 ident_addr)
3349 {
3350         kvm->arch.ept_identity_map_addr = ident_addr;
3351         return 0;
3352 }
3353
3354 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3355                                           u32 kvm_nr_mmu_pages)
3356 {
3357         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3358                 return -EINVAL;
3359
3360         mutex_lock(&kvm->slots_lock);
3361
3362         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3363         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3364
3365         mutex_unlock(&kvm->slots_lock);
3366         return 0;
3367 }
3368
3369 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3370 {
3371         return kvm->arch.n_max_mmu_pages;
3372 }
3373
3374 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3375 {
3376         int r;
3377
3378         r = 0;
3379         switch (chip->chip_id) {
3380         case KVM_IRQCHIP_PIC_MASTER:
3381                 memcpy(&chip->chip.pic,
3382                         &pic_irqchip(kvm)->pics[0],
3383                         sizeof(struct kvm_pic_state));
3384                 break;
3385         case KVM_IRQCHIP_PIC_SLAVE:
3386                 memcpy(&chip->chip.pic,
3387                         &pic_irqchip(kvm)->pics[1],
3388                         sizeof(struct kvm_pic_state));
3389                 break;
3390         case KVM_IRQCHIP_IOAPIC:
3391                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3392                 break;
3393         default:
3394                 r = -EINVAL;
3395                 break;
3396         }
3397         return r;
3398 }
3399
3400 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3401 {
3402         int r;
3403
3404         r = 0;
3405         switch (chip->chip_id) {
3406         case KVM_IRQCHIP_PIC_MASTER:
3407                 spin_lock(&pic_irqchip(kvm)->lock);
3408                 memcpy(&pic_irqchip(kvm)->pics[0],
3409                         &chip->chip.pic,
3410                         sizeof(struct kvm_pic_state));
3411                 spin_unlock(&pic_irqchip(kvm)->lock);
3412                 break;
3413         case KVM_IRQCHIP_PIC_SLAVE:
3414                 spin_lock(&pic_irqchip(kvm)->lock);
3415                 memcpy(&pic_irqchip(kvm)->pics[1],
3416                         &chip->chip.pic,
3417                         sizeof(struct kvm_pic_state));
3418                 spin_unlock(&pic_irqchip(kvm)->lock);
3419                 break;
3420         case KVM_IRQCHIP_IOAPIC:
3421                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3422                 break;
3423         default:
3424                 r = -EINVAL;
3425                 break;
3426         }
3427         kvm_pic_update_irq(pic_irqchip(kvm));
3428         return r;
3429 }
3430
3431 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3432 {
3433         int r = 0;
3434
3435         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3436         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3437         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3438         return r;
3439 }
3440
3441 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3442 {
3443         int r = 0;
3444
3445         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3446         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3447         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3448         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3449         return r;
3450 }
3451
3452 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3453 {
3454         int r = 0;
3455
3456         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3457         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3458                 sizeof(ps->channels));
3459         ps->flags = kvm->arch.vpit->pit_state.flags;
3460         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3461         memset(&ps->reserved, 0, sizeof(ps->reserved));
3462         return r;
3463 }
3464
3465 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3466 {
3467         int r = 0, start = 0;
3468         u32 prev_legacy, cur_legacy;
3469         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3470         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3471         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3472         if (!prev_legacy && cur_legacy)
3473                 start = 1;
3474         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3475                sizeof(kvm->arch.vpit->pit_state.channels));
3476         kvm->arch.vpit->pit_state.flags = ps->flags;
3477         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3478         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3479         return r;
3480 }
3481
3482 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3483                                  struct kvm_reinject_control *control)
3484 {
3485         if (!kvm->arch.vpit)
3486                 return -ENXIO;
3487         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3488         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3489         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3490         return 0;
3491 }
3492
3493 /**
3494  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3495  * @kvm: kvm instance
3496  * @log: slot id and address to which we copy the log
3497  *
3498  * Steps 1-4 below provide general overview of dirty page logging. See
3499  * kvm_get_dirty_log_protect() function description for additional details.
3500  *
3501  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3502  * always flush the TLB (step 4) even if previous step failed  and the dirty
3503  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3504  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3505  * writes will be marked dirty for next log read.
3506  *
3507  *   1. Take a snapshot of the bit and clear it if needed.
3508  *   2. Write protect the corresponding page.
3509  *   3. Copy the snapshot to the userspace.
3510  *   4. Flush TLB's if needed.
3511  */
3512 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3513 {
3514         bool is_dirty = false;
3515         int r;
3516
3517         mutex_lock(&kvm->slots_lock);
3518
3519         /*
3520          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3521          */
3522         if (kvm_x86_ops->flush_log_dirty)
3523                 kvm_x86_ops->flush_log_dirty(kvm);
3524
3525         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3526
3527         /*
3528          * All the TLBs can be flushed out of mmu lock, see the comments in
3529          * kvm_mmu_slot_remove_write_access().
3530          */
3531         lockdep_assert_held(&kvm->slots_lock);
3532         if (is_dirty)
3533                 kvm_flush_remote_tlbs(kvm);
3534
3535         mutex_unlock(&kvm->slots_lock);
3536         return r;
3537 }
3538
3539 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3540                         bool line_status)
3541 {
3542         if (!irqchip_in_kernel(kvm))
3543                 return -ENXIO;
3544
3545         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3546                                         irq_event->irq, irq_event->level,
3547                                         line_status);
3548         return 0;
3549 }
3550
3551 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3552                                    struct kvm_enable_cap *cap)
3553 {
3554         int r;
3555
3556         if (cap->flags)
3557                 return -EINVAL;
3558
3559         switch (cap->cap) {
3560         case KVM_CAP_DISABLE_QUIRKS:
3561                 kvm->arch.disabled_quirks = cap->args[0];
3562                 r = 0;
3563                 break;
3564         default:
3565                 r = -EINVAL;
3566                 break;
3567         }
3568         return r;
3569 }
3570
3571 long kvm_arch_vm_ioctl(struct file *filp,
3572                        unsigned int ioctl, unsigned long arg)
3573 {
3574         struct kvm *kvm = filp->private_data;
3575         void __user *argp = (void __user *)arg;
3576         int r = -ENOTTY;
3577         /*
3578          * This union makes it completely explicit to gcc-3.x
3579          * that these two variables' stack usage should be
3580          * combined, not added together.
3581          */
3582         union {
3583                 struct kvm_pit_state ps;
3584                 struct kvm_pit_state2 ps2;
3585                 struct kvm_pit_config pit_config;
3586         } u;
3587
3588         switch (ioctl) {
3589         case KVM_SET_TSS_ADDR:
3590                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3591                 break;
3592         case KVM_SET_IDENTITY_MAP_ADDR: {
3593                 u64 ident_addr;
3594
3595                 r = -EFAULT;
3596                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3597                         goto out;
3598                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3599                 break;
3600         }
3601         case KVM_SET_NR_MMU_PAGES:
3602                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3603                 break;
3604         case KVM_GET_NR_MMU_PAGES:
3605                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3606                 break;
3607         case KVM_CREATE_IRQCHIP: {
3608                 struct kvm_pic *vpic;
3609
3610                 mutex_lock(&kvm->lock);
3611                 r = -EEXIST;
3612                 if (kvm->arch.vpic)
3613                         goto create_irqchip_unlock;
3614                 r = -EINVAL;
3615                 if (atomic_read(&kvm->online_vcpus))
3616                         goto create_irqchip_unlock;
3617                 r = -ENOMEM;
3618                 vpic = kvm_create_pic(kvm);
3619                 if (vpic) {
3620                         r = kvm_ioapic_init(kvm);
3621                         if (r) {
3622                                 mutex_lock(&kvm->slots_lock);
3623                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3624                                                           &vpic->dev_master);
3625                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3626                                                           &vpic->dev_slave);
3627                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3628                                                           &vpic->dev_eclr);
3629                                 mutex_unlock(&kvm->slots_lock);
3630                                 kfree(vpic);
3631                                 goto create_irqchip_unlock;
3632                         }
3633                 } else
3634                         goto create_irqchip_unlock;
3635                 smp_wmb();
3636                 kvm->arch.vpic = vpic;
3637                 smp_wmb();
3638                 r = kvm_setup_default_irq_routing(kvm);
3639                 if (r) {
3640                         mutex_lock(&kvm->slots_lock);
3641                         mutex_lock(&kvm->irq_lock);
3642                         kvm_ioapic_destroy(kvm);
3643                         kvm_destroy_pic(kvm);
3644                         mutex_unlock(&kvm->irq_lock);
3645                         mutex_unlock(&kvm->slots_lock);
3646                 }
3647         create_irqchip_unlock:
3648                 mutex_unlock(&kvm->lock);
3649                 break;
3650         }
3651         case KVM_CREATE_PIT:
3652                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3653                 goto create_pit;
3654         case KVM_CREATE_PIT2:
3655                 r = -EFAULT;
3656                 if (copy_from_user(&u.pit_config, argp,
3657                                    sizeof(struct kvm_pit_config)))
3658                         goto out;
3659         create_pit:
3660                 mutex_lock(&kvm->slots_lock);
3661                 r = -EEXIST;
3662                 if (kvm->arch.vpit)
3663                         goto create_pit_unlock;
3664                 r = -ENOMEM;
3665                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3666                 if (kvm->arch.vpit)
3667                         r = 0;
3668         create_pit_unlock:
3669                 mutex_unlock(&kvm->slots_lock);
3670                 break;
3671         case KVM_GET_IRQCHIP: {
3672                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3673                 struct kvm_irqchip *chip;
3674
3675                 chip = memdup_user(argp, sizeof(*chip));
3676                 if (IS_ERR(chip)) {
3677                         r = PTR_ERR(chip);
3678                         goto out;
3679                 }
3680
3681                 r = -ENXIO;
3682                 if (!irqchip_in_kernel(kvm))
3683                         goto get_irqchip_out;
3684                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3685                 if (r)
3686                         goto get_irqchip_out;
3687                 r = -EFAULT;
3688                 if (copy_to_user(argp, chip, sizeof *chip))
3689                         goto get_irqchip_out;
3690                 r = 0;
3691         get_irqchip_out:
3692                 kfree(chip);
3693                 break;
3694         }
3695         case KVM_SET_IRQCHIP: {
3696                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3697                 struct kvm_irqchip *chip;
3698
3699                 chip = memdup_user(argp, sizeof(*chip));
3700                 if (IS_ERR(chip)) {
3701                         r = PTR_ERR(chip);
3702                         goto out;
3703                 }
3704
3705                 r = -ENXIO;
3706                 if (!irqchip_in_kernel(kvm))
3707                         goto set_irqchip_out;
3708                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3709                 if (r)
3710                         goto set_irqchip_out;
3711                 r = 0;
3712         set_irqchip_out:
3713                 kfree(chip);
3714                 break;
3715         }
3716         case KVM_GET_PIT: {
3717                 r = -EFAULT;
3718                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3719                         goto out;
3720                 r = -ENXIO;
3721                 if (!kvm->arch.vpit)
3722                         goto out;
3723                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3724                 if (r)
3725                         goto out;
3726                 r = -EFAULT;
3727                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3728                         goto out;
3729                 r = 0;
3730                 break;
3731         }
3732         case KVM_SET_PIT: {
3733                 r = -EFAULT;
3734                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3735                         goto out;
3736                 r = -ENXIO;
3737                 if (!kvm->arch.vpit)
3738                         goto out;
3739                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3740                 break;
3741         }
3742         case KVM_GET_PIT2: {
3743                 r = -ENXIO;
3744                 if (!kvm->arch.vpit)
3745                         goto out;
3746                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3747                 if (r)
3748                         goto out;
3749                 r = -EFAULT;
3750                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3751                         goto out;
3752                 r = 0;
3753                 break;
3754         }
3755         case KVM_SET_PIT2: {
3756                 r = -EFAULT;
3757                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3758                         goto out;
3759                 r = -ENXIO;
3760                 if (!kvm->arch.vpit)
3761                         goto out;
3762                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3763                 break;
3764         }
3765         case KVM_REINJECT_CONTROL: {
3766                 struct kvm_reinject_control control;
3767                 r =  -EFAULT;
3768                 if (copy_from_user(&control, argp, sizeof(control)))
3769                         goto out;
3770                 r = kvm_vm_ioctl_reinject(kvm, &control);
3771                 break;
3772         }
3773         case KVM_XEN_HVM_CONFIG: {
3774                 r = -EFAULT;
3775                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3776                                    sizeof(struct kvm_xen_hvm_config)))
3777                         goto out;
3778                 r = -EINVAL;
3779                 if (kvm->arch.xen_hvm_config.flags)
3780                         goto out;
3781                 r = 0;
3782                 break;
3783         }
3784         case KVM_SET_CLOCK: {
3785                 struct kvm_clock_data user_ns;
3786                 u64 now_ns;
3787                 s64 delta;
3788
3789                 r = -EFAULT;
3790                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3791                         goto out;
3792
3793                 r = -EINVAL;
3794                 if (user_ns.flags)
3795                         goto out;
3796
3797                 r = 0;
3798                 local_irq_disable();
3799                 now_ns = get_kernel_ns();
3800                 delta = user_ns.clock - now_ns;
3801                 local_irq_enable();
3802                 kvm->arch.kvmclock_offset = delta;
3803                 kvm_gen_update_masterclock(kvm);
3804                 break;
3805         }
3806         case KVM_GET_CLOCK: {
3807                 struct kvm_clock_data user_ns;
3808                 u64 now_ns;
3809
3810                 local_irq_disable();
3811                 now_ns = get_kernel_ns();
3812                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3813                 local_irq_enable();
3814                 user_ns.flags = 0;
3815                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3816
3817                 r = -EFAULT;
3818                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3819                         goto out;
3820                 r = 0;
3821                 break;
3822         }
3823         case KVM_ENABLE_CAP: {
3824                 struct kvm_enable_cap cap;
3825
3826                 r = -EFAULT;
3827                 if (copy_from_user(&cap, argp, sizeof(cap)))
3828                         goto out;
3829                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
3830                 break;
3831         }
3832         default:
3833                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
3834         }
3835 out:
3836         return r;
3837 }
3838
3839 static void kvm_init_msr_list(void)
3840 {
3841         u32 dummy[2];
3842         unsigned i, j;
3843
3844         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
3845                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3846                         continue;
3847
3848                 /*
3849                  * Even MSRs that are valid in the host may not be exposed
3850                  * to the guests in some cases.  We could work around this
3851                  * in VMX with the generic MSR save/load machinery, but it
3852                  * is not really worthwhile since it will really only
3853                  * happen with nested virtualization.
3854                  */
3855                 switch (msrs_to_save[i]) {
3856                 case MSR_IA32_BNDCFGS:
3857                         if (!kvm_x86_ops->mpx_supported())
3858                                 continue;
3859                         break;
3860                 default:
3861                         break;
3862                 }
3863
3864                 if (j < i)
3865                         msrs_to_save[j] = msrs_to_save[i];
3866                 j++;
3867         }
3868         num_msrs_to_save = j;
3869
3870         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
3871                 switch (emulated_msrs[i]) {
3872                 case MSR_IA32_SMBASE:
3873                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
3874                                 continue;
3875                         break;
3876                 default:
3877                         break;
3878                 }
3879
3880                 if (j < i)
3881                         emulated_msrs[j] = emulated_msrs[i];
3882                 j++;
3883         }
3884         num_emulated_msrs = j;
3885 }
3886
3887 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3888                            const void *v)
3889 {
3890         int handled = 0;
3891         int n;
3892
3893         do {
3894                 n = min(len, 8);
3895                 if (!(vcpu->arch.apic &&
3896                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
3897                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
3898                         break;
3899                 handled += n;
3900                 addr += n;
3901                 len -= n;
3902                 v += n;
3903         } while (len);
3904
3905         return handled;
3906 }
3907
3908 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3909 {
3910         int handled = 0;
3911         int n;
3912
3913         do {
3914                 n = min(len, 8);
3915                 if (!(vcpu->arch.apic &&
3916                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
3917                                          addr, n, v))
3918                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
3919                         break;
3920                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3921                 handled += n;
3922                 addr += n;
3923                 len -= n;
3924                 v += n;
3925         } while (len);
3926
3927         return handled;
3928 }
3929
3930 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3931                         struct kvm_segment *var, int seg)
3932 {
3933         kvm_x86_ops->set_segment(vcpu, var, seg);
3934 }
3935
3936 void kvm_get_segment(struct kvm_vcpu *vcpu,
3937                      struct kvm_segment *var, int seg)
3938 {
3939         kvm_x86_ops->get_segment(vcpu, var, seg);
3940 }
3941
3942 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
3943                            struct x86_exception *exception)
3944 {
3945         gpa_t t_gpa;
3946
3947         BUG_ON(!mmu_is_nested(vcpu));
3948
3949         /* NPT walks are always user-walks */
3950         access |= PFERR_USER_MASK;
3951         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
3952
3953         return t_gpa;
3954 }
3955
3956 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3957                               struct x86_exception *exception)
3958 {
3959         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3960         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3961 }
3962
3963  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3964                                 struct x86_exception *exception)
3965 {
3966         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3967         access |= PFERR_FETCH_MASK;
3968         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3969 }
3970
3971 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3972                                struct x86_exception *exception)
3973 {
3974         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3975         access |= PFERR_WRITE_MASK;
3976         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3977 }
3978
3979 /* uses this to access any guest's mapped memory without checking CPL */
3980 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3981                                 struct x86_exception *exception)
3982 {
3983         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3984 }
3985
3986 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3987                                       struct kvm_vcpu *vcpu, u32 access,
3988                                       struct x86_exception *exception)
3989 {
3990         void *data = val;
3991         int r = X86EMUL_CONTINUE;
3992
3993         while (bytes) {
3994                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3995                                                             exception);
3996                 unsigned offset = addr & (PAGE_SIZE-1);
3997                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3998                 int ret;
3999
4000                 if (gpa == UNMAPPED_GVA)
4001                         return X86EMUL_PROPAGATE_FAULT;
4002                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4003                                                offset, toread);
4004                 if (ret < 0) {
4005                         r = X86EMUL_IO_NEEDED;
4006                         goto out;
4007                 }
4008
4009                 bytes -= toread;
4010                 data += toread;
4011                 addr += toread;
4012         }
4013 out:
4014         return r;
4015 }
4016
4017 /* used for instruction fetching */
4018 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4019                                 gva_t addr, void *val, unsigned int bytes,
4020                                 struct x86_exception *exception)
4021 {
4022         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4023         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4024         unsigned offset;
4025         int ret;
4026
4027         /* Inline kvm_read_guest_virt_helper for speed.  */
4028         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4029                                                     exception);
4030         if (unlikely(gpa == UNMAPPED_GVA))
4031                 return X86EMUL_PROPAGATE_FAULT;
4032
4033         offset = addr & (PAGE_SIZE-1);
4034         if (WARN_ON(offset + bytes > PAGE_SIZE))
4035                 bytes = (unsigned)PAGE_SIZE - offset;
4036         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4037                                        offset, bytes);
4038         if (unlikely(ret < 0))
4039                 return X86EMUL_IO_NEEDED;
4040
4041         return X86EMUL_CONTINUE;
4042 }
4043
4044 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4045                                gva_t addr, void *val, unsigned int bytes,
4046                                struct x86_exception *exception)
4047 {
4048         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4049         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4050
4051         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4052                                           exception);
4053 }
4054 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4055
4056 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4057                                       gva_t addr, void *val, unsigned int bytes,
4058                                       struct x86_exception *exception)
4059 {
4060         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4061         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4062 }
4063
4064 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4065                                        gva_t addr, void *val,
4066                                        unsigned int bytes,
4067                                        struct x86_exception *exception)
4068 {
4069         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4070         void *data = val;
4071         int r = X86EMUL_CONTINUE;
4072
4073         while (bytes) {
4074                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4075                                                              PFERR_WRITE_MASK,
4076                                                              exception);
4077                 unsigned offset = addr & (PAGE_SIZE-1);
4078                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4079                 int ret;
4080
4081                 if (gpa == UNMAPPED_GVA)
4082                         return X86EMUL_PROPAGATE_FAULT;
4083                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4084                 if (ret < 0) {
4085                         r = X86EMUL_IO_NEEDED;
4086                         goto out;
4087                 }
4088
4089                 bytes -= towrite;
4090                 data += towrite;
4091                 addr += towrite;
4092         }
4093 out:
4094         return r;
4095 }
4096 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4097
4098 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4099                                 gpa_t *gpa, struct x86_exception *exception,
4100                                 bool write)
4101 {
4102         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4103                 | (write ? PFERR_WRITE_MASK : 0);
4104
4105         if (vcpu_match_mmio_gva(vcpu, gva)
4106             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4107                                  vcpu->arch.access, access)) {
4108                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4109                                         (gva & (PAGE_SIZE - 1));
4110                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4111                 return 1;
4112         }
4113
4114         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4115
4116         if (*gpa == UNMAPPED_GVA)
4117                 return -1;
4118
4119         /* For APIC access vmexit */
4120         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4121                 return 1;
4122
4123         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4124                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4125                 return 1;
4126         }
4127
4128         return 0;
4129 }
4130
4131 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4132                         const void *val, int bytes)
4133 {
4134         int ret;
4135
4136         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4137         if (ret < 0)
4138                 return 0;
4139         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4140         return 1;
4141 }
4142
4143 struct read_write_emulator_ops {
4144         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4145                                   int bytes);
4146         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4147                                   void *val, int bytes);
4148         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4149                                int bytes, void *val);
4150         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4151                                     void *val, int bytes);
4152         bool write;
4153 };
4154
4155 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4156 {
4157         if (vcpu->mmio_read_completed) {
4158                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4159                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4160                 vcpu->mmio_read_completed = 0;
4161                 return 1;
4162         }
4163
4164         return 0;
4165 }
4166
4167 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4168                         void *val, int bytes)
4169 {
4170         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4171 }
4172
4173 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4174                          void *val, int bytes)
4175 {
4176         return emulator_write_phys(vcpu, gpa, val, bytes);
4177 }
4178
4179 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4180 {
4181         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4182         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4183 }
4184
4185 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4186                           void *val, int bytes)
4187 {
4188         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4189         return X86EMUL_IO_NEEDED;
4190 }
4191
4192 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4193                            void *val, int bytes)
4194 {
4195         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4196
4197         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4198         return X86EMUL_CONTINUE;
4199 }
4200
4201 static const struct read_write_emulator_ops read_emultor = {
4202         .read_write_prepare = read_prepare,
4203         .read_write_emulate = read_emulate,
4204         .read_write_mmio = vcpu_mmio_read,
4205         .read_write_exit_mmio = read_exit_mmio,
4206 };
4207
4208 static const struct read_write_emulator_ops write_emultor = {
4209         .read_write_emulate = write_emulate,
4210         .read_write_mmio = write_mmio,
4211         .read_write_exit_mmio = write_exit_mmio,
4212         .write = true,
4213 };
4214
4215 static int emulator_read_write_onepage(unsigned long addr, void *val,
4216                                        unsigned int bytes,
4217                                        struct x86_exception *exception,
4218                                        struct kvm_vcpu *vcpu,
4219                                        const struct read_write_emulator_ops *ops)
4220 {
4221         gpa_t gpa;
4222         int handled, ret;
4223         bool write = ops->write;
4224         struct kvm_mmio_fragment *frag;
4225
4226         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4227
4228         if (ret < 0)
4229                 return X86EMUL_PROPAGATE_FAULT;
4230
4231         /* For APIC access vmexit */
4232         if (ret)
4233                 goto mmio;
4234
4235         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4236                 return X86EMUL_CONTINUE;
4237
4238 mmio:
4239         /*
4240          * Is this MMIO handled locally?
4241          */
4242         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4243         if (handled == bytes)
4244                 return X86EMUL_CONTINUE;
4245
4246         gpa += handled;
4247         bytes -= handled;
4248         val += handled;
4249
4250         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4251         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4252         frag->gpa = gpa;
4253         frag->data = val;
4254         frag->len = bytes;
4255         return X86EMUL_CONTINUE;
4256 }
4257
4258 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4259                         unsigned long addr,
4260                         void *val, unsigned int bytes,
4261                         struct x86_exception *exception,
4262                         const struct read_write_emulator_ops *ops)
4263 {
4264         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4265         gpa_t gpa;
4266         int rc;
4267
4268         if (ops->read_write_prepare &&
4269                   ops->read_write_prepare(vcpu, val, bytes))
4270                 return X86EMUL_CONTINUE;
4271
4272         vcpu->mmio_nr_fragments = 0;
4273
4274         /* Crossing a page boundary? */
4275         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4276                 int now;
4277
4278                 now = -addr & ~PAGE_MASK;
4279                 rc = emulator_read_write_onepage(addr, val, now, exception,
4280                                                  vcpu, ops);
4281
4282                 if (rc != X86EMUL_CONTINUE)
4283                         return rc;
4284                 addr += now;
4285                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4286                         addr = (u32)addr;
4287                 val += now;
4288                 bytes -= now;
4289         }
4290
4291         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4292                                          vcpu, ops);
4293         if (rc != X86EMUL_CONTINUE)
4294                 return rc;
4295
4296         if (!vcpu->mmio_nr_fragments)
4297                 return rc;
4298
4299         gpa = vcpu->mmio_fragments[0].gpa;
4300
4301         vcpu->mmio_needed = 1;
4302         vcpu->mmio_cur_fragment = 0;
4303
4304         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4305         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4306         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4307         vcpu->run->mmio.phys_addr = gpa;
4308
4309         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4310 }
4311
4312 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4313                                   unsigned long addr,
4314                                   void *val,
4315                                   unsigned int bytes,
4316                                   struct x86_exception *exception)
4317 {
4318         return emulator_read_write(ctxt, addr, val, bytes,
4319                                    exception, &read_emultor);
4320 }
4321
4322 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4323                             unsigned long addr,
4324                             const void *val,
4325                             unsigned int bytes,
4326                             struct x86_exception *exception)
4327 {
4328         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4329                                    exception, &write_emultor);
4330 }
4331
4332 #define CMPXCHG_TYPE(t, ptr, old, new) \
4333         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4334
4335 #ifdef CONFIG_X86_64
4336 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4337 #else
4338 #  define CMPXCHG64(ptr, old, new) \
4339         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4340 #endif
4341
4342 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4343                                      unsigned long addr,
4344                                      const void *old,
4345                                      const void *new,
4346                                      unsigned int bytes,
4347                                      struct x86_exception *exception)
4348 {
4349         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4350         gpa_t gpa;
4351         struct page *page;
4352         char *kaddr;
4353         bool exchanged;
4354
4355         /* guests cmpxchg8b have to be emulated atomically */
4356         if (bytes > 8 || (bytes & (bytes - 1)))
4357                 goto emul_write;
4358
4359         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4360
4361         if (gpa == UNMAPPED_GVA ||
4362             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4363                 goto emul_write;
4364
4365         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4366                 goto emul_write;
4367
4368         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4369         if (is_error_page(page))
4370                 goto emul_write;
4371
4372         kaddr = kmap_atomic(page);
4373         kaddr += offset_in_page(gpa);
4374         switch (bytes) {
4375         case 1:
4376                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4377                 break;
4378         case 2:
4379                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4380                 break;
4381         case 4:
4382                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4383                 break;
4384         case 8:
4385                 exchanged = CMPXCHG64(kaddr, old, new);
4386                 break;
4387         default:
4388                 BUG();
4389         }
4390         kunmap_atomic(kaddr);
4391         kvm_release_page_dirty(page);
4392
4393         if (!exchanged)
4394                 return X86EMUL_CMPXCHG_FAILED;
4395
4396         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4397         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4398
4399         return X86EMUL_CONTINUE;
4400
4401 emul_write:
4402         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4403
4404         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4405 }
4406
4407 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4408 {
4409         /* TODO: String I/O for in kernel device */
4410         int r;
4411
4412         if (vcpu->arch.pio.in)
4413                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4414                                     vcpu->arch.pio.size, pd);
4415         else
4416                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4417                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4418                                      pd);
4419         return r;
4420 }
4421
4422 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4423                                unsigned short port, void *val,
4424                                unsigned int count, bool in)
4425 {
4426         vcpu->arch.pio.port = port;
4427         vcpu->arch.pio.in = in;
4428         vcpu->arch.pio.count  = count;
4429         vcpu->arch.pio.size = size;
4430
4431         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4432                 vcpu->arch.pio.count = 0;
4433                 return 1;
4434         }
4435
4436         vcpu->run->exit_reason = KVM_EXIT_IO;
4437         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4438         vcpu->run->io.size = size;
4439         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4440         vcpu->run->io.count = count;
4441         vcpu->run->io.port = port;
4442
4443         return 0;
4444 }
4445
4446 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4447                                     int size, unsigned short port, void *val,
4448                                     unsigned int count)
4449 {
4450         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4451         int ret;
4452
4453         if (vcpu->arch.pio.count)
4454                 goto data_avail;
4455
4456         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4457         if (ret) {
4458 data_avail:
4459                 memcpy(val, vcpu->arch.pio_data, size * count);
4460                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4461                 vcpu->arch.pio.count = 0;
4462                 return 1;
4463         }
4464
4465         return 0;
4466 }
4467
4468 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4469                                      int size, unsigned short port,
4470                                      const void *val, unsigned int count)
4471 {
4472         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4473
4474         memcpy(vcpu->arch.pio_data, val, size * count);
4475         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4476         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4477 }
4478
4479 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4480 {
4481         return kvm_x86_ops->get_segment_base(vcpu, seg);
4482 }
4483
4484 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4485 {
4486         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4487 }
4488
4489 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4490 {
4491         if (!need_emulate_wbinvd(vcpu))
4492                 return X86EMUL_CONTINUE;
4493
4494         if (kvm_x86_ops->has_wbinvd_exit()) {
4495                 int cpu = get_cpu();
4496
4497                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4498                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4499                                 wbinvd_ipi, NULL, 1);
4500                 put_cpu();
4501                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4502         } else
4503                 wbinvd();
4504         return X86EMUL_CONTINUE;
4505 }
4506
4507 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4508 {
4509         kvm_x86_ops->skip_emulated_instruction(vcpu);
4510         return kvm_emulate_wbinvd_noskip(vcpu);
4511 }
4512 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4513
4514
4515
4516 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4517 {
4518         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4519 }
4520
4521 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4522                            unsigned long *dest)
4523 {
4524         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4525 }
4526
4527 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4528                            unsigned long value)
4529 {
4530
4531         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4532 }
4533
4534 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4535 {
4536         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4537 }
4538
4539 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4540 {
4541         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4542         unsigned long value;
4543
4544         switch (cr) {
4545         case 0:
4546                 value = kvm_read_cr0(vcpu);
4547                 break;
4548         case 2:
4549                 value = vcpu->arch.cr2;
4550                 break;
4551         case 3:
4552                 value = kvm_read_cr3(vcpu);
4553                 break;
4554         case 4:
4555                 value = kvm_read_cr4(vcpu);
4556                 break;
4557         case 8:
4558                 value = kvm_get_cr8(vcpu);
4559                 break;
4560         default:
4561                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4562                 return 0;
4563         }
4564
4565         return value;
4566 }
4567
4568 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4569 {
4570         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4571         int res = 0;
4572
4573         switch (cr) {
4574         case 0:
4575                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4576                 break;
4577         case 2:
4578                 vcpu->arch.cr2 = val;
4579                 break;
4580         case 3:
4581                 res = kvm_set_cr3(vcpu, val);
4582                 break;
4583         case 4:
4584                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4585                 break;
4586         case 8:
4587                 res = kvm_set_cr8(vcpu, val);
4588                 break;
4589         default:
4590                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4591                 res = -1;
4592         }
4593
4594         return res;
4595 }
4596
4597 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4598 {
4599         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4600 }
4601
4602 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4603 {
4604         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4605 }
4606
4607 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4608 {
4609         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4610 }
4611
4612 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4613 {
4614         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4615 }
4616
4617 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4618 {
4619         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4620 }
4621
4622 static unsigned long emulator_get_cached_segment_base(
4623         struct x86_emulate_ctxt *ctxt, int seg)
4624 {
4625         return get_segment_base(emul_to_vcpu(ctxt), seg);
4626 }
4627
4628 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4629                                  struct desc_struct *desc, u32 *base3,
4630                                  int seg)
4631 {
4632         struct kvm_segment var;
4633
4634         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4635         *selector = var.selector;
4636
4637         if (var.unusable) {
4638                 memset(desc, 0, sizeof(*desc));
4639                 return false;
4640         }
4641
4642         if (var.g)
4643                 var.limit >>= 12;
4644         set_desc_limit(desc, var.limit);
4645         set_desc_base(desc, (unsigned long)var.base);
4646 #ifdef CONFIG_X86_64
4647         if (base3)
4648                 *base3 = var.base >> 32;
4649 #endif
4650         desc->type = var.type;
4651         desc->s = var.s;
4652         desc->dpl = var.dpl;
4653         desc->p = var.present;
4654         desc->avl = var.avl;
4655         desc->l = var.l;
4656         desc->d = var.db;
4657         desc->g = var.g;
4658
4659         return true;
4660 }
4661
4662 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4663                                  struct desc_struct *desc, u32 base3,
4664                                  int seg)
4665 {
4666         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4667         struct kvm_segment var;
4668
4669         var.selector = selector;
4670         var.base = get_desc_base(desc);
4671 #ifdef CONFIG_X86_64
4672         var.base |= ((u64)base3) << 32;
4673 #endif
4674         var.limit = get_desc_limit(desc);
4675         if (desc->g)
4676                 var.limit = (var.limit << 12) | 0xfff;
4677         var.type = desc->type;
4678         var.dpl = desc->dpl;
4679         var.db = desc->d;
4680         var.s = desc->s;
4681         var.l = desc->l;
4682         var.g = desc->g;
4683         var.avl = desc->avl;
4684         var.present = desc->p;
4685         var.unusable = !var.present;
4686         var.padding = 0;
4687
4688         kvm_set_segment(vcpu, &var, seg);
4689         return;
4690 }
4691
4692 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4693                             u32 msr_index, u64 *pdata)
4694 {
4695         struct msr_data msr;
4696         int r;
4697
4698         msr.index = msr_index;
4699         msr.host_initiated = false;
4700         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4701         if (r)
4702                 return r;
4703
4704         *pdata = msr.data;
4705         return 0;
4706 }
4707
4708 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4709                             u32 msr_index, u64 data)
4710 {
4711         struct msr_data msr;
4712
4713         msr.data = data;
4714         msr.index = msr_index;
4715         msr.host_initiated = false;
4716         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4717 }
4718
4719 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4720 {
4721         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4722
4723         return vcpu->arch.smbase;
4724 }
4725
4726 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4727 {
4728         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4729
4730         vcpu->arch.smbase = smbase;
4731 }
4732
4733 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4734                               u32 pmc)
4735 {
4736         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4737 }
4738
4739 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4740                              u32 pmc, u64 *pdata)
4741 {
4742         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4743 }
4744
4745 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4746 {
4747         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4748 }
4749
4750 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4751 {
4752         preempt_disable();
4753         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4754         /*
4755          * CR0.TS may reference the host fpu state, not the guest fpu state,
4756          * so it may be clear at this point.
4757          */
4758         clts();
4759 }
4760
4761 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4762 {
4763         preempt_enable();
4764 }
4765
4766 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4767                               struct x86_instruction_info *info,
4768                               enum x86_intercept_stage stage)
4769 {
4770         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4771 }
4772
4773 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4774                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4775 {
4776         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4777 }
4778
4779 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4780 {
4781         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4782 }
4783
4784 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4785 {
4786         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4787 }
4788
4789 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4790 {
4791         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4792 }
4793
4794 static const struct x86_emulate_ops emulate_ops = {
4795         .read_gpr            = emulator_read_gpr,
4796         .write_gpr           = emulator_write_gpr,
4797         .read_std            = kvm_read_guest_virt_system,
4798         .write_std           = kvm_write_guest_virt_system,
4799         .fetch               = kvm_fetch_guest_virt,
4800         .read_emulated       = emulator_read_emulated,
4801         .write_emulated      = emulator_write_emulated,
4802         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4803         .invlpg              = emulator_invlpg,
4804         .pio_in_emulated     = emulator_pio_in_emulated,
4805         .pio_out_emulated    = emulator_pio_out_emulated,
4806         .get_segment         = emulator_get_segment,
4807         .set_segment         = emulator_set_segment,
4808         .get_cached_segment_base = emulator_get_cached_segment_base,
4809         .get_gdt             = emulator_get_gdt,
4810         .get_idt             = emulator_get_idt,
4811         .set_gdt             = emulator_set_gdt,
4812         .set_idt             = emulator_set_idt,
4813         .get_cr              = emulator_get_cr,
4814         .set_cr              = emulator_set_cr,
4815         .cpl                 = emulator_get_cpl,
4816         .get_dr              = emulator_get_dr,
4817         .set_dr              = emulator_set_dr,
4818         .get_smbase          = emulator_get_smbase,
4819         .set_smbase          = emulator_set_smbase,
4820         .set_msr             = emulator_set_msr,
4821         .get_msr             = emulator_get_msr,
4822         .check_pmc           = emulator_check_pmc,
4823         .read_pmc            = emulator_read_pmc,
4824         .halt                = emulator_halt,
4825         .wbinvd              = emulator_wbinvd,
4826         .fix_hypercall       = emulator_fix_hypercall,
4827         .get_fpu             = emulator_get_fpu,
4828         .put_fpu             = emulator_put_fpu,
4829         .intercept           = emulator_intercept,
4830         .get_cpuid           = emulator_get_cpuid,
4831         .set_nmi_mask        = emulator_set_nmi_mask,
4832 };
4833
4834 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4835 {
4836         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
4837         /*
4838          * an sti; sti; sequence only disable interrupts for the first
4839          * instruction. So, if the last instruction, be it emulated or
4840          * not, left the system with the INT_STI flag enabled, it
4841          * means that the last instruction is an sti. We should not
4842          * leave the flag on in this case. The same goes for mov ss
4843          */
4844         if (int_shadow & mask)
4845                 mask = 0;
4846         if (unlikely(int_shadow || mask)) {
4847                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4848                 if (!mask)
4849                         kvm_make_request(KVM_REQ_EVENT, vcpu);
4850         }
4851 }
4852
4853 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
4854 {
4855         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4856         if (ctxt->exception.vector == PF_VECTOR)
4857                 return kvm_propagate_fault(vcpu, &ctxt->exception);
4858
4859         if (ctxt->exception.error_code_valid)
4860                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4861                                       ctxt->exception.error_code);
4862         else
4863                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4864         return false;
4865 }
4866
4867 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4868 {
4869         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4870         int cs_db, cs_l;
4871
4872         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4873
4874         ctxt->eflags = kvm_get_rflags(vcpu);
4875         ctxt->eip = kvm_rip_read(vcpu);
4876         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4877                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4878                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
4879                      cs_db                              ? X86EMUL_MODE_PROT32 :
4880                                                           X86EMUL_MODE_PROT16;
4881         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
4882         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
4883         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
4884         ctxt->emul_flags = vcpu->arch.hflags;
4885
4886         init_decode_cache(ctxt);
4887         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4888 }
4889
4890 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4891 {
4892         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4893         int ret;
4894
4895         init_emulate_ctxt(vcpu);
4896
4897         ctxt->op_bytes = 2;
4898         ctxt->ad_bytes = 2;
4899         ctxt->_eip = ctxt->eip + inc_eip;
4900         ret = emulate_int_real(ctxt, irq);
4901
4902         if (ret != X86EMUL_CONTINUE)
4903                 return EMULATE_FAIL;
4904
4905         ctxt->eip = ctxt->_eip;
4906         kvm_rip_write(vcpu, ctxt->eip);
4907         kvm_set_rflags(vcpu, ctxt->eflags);
4908
4909         if (irq == NMI_VECTOR)
4910                 vcpu->arch.nmi_pending = 0;
4911         else
4912                 vcpu->arch.interrupt.pending = false;
4913
4914         return EMULATE_DONE;
4915 }
4916 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4917
4918 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4919 {
4920         int r = EMULATE_DONE;
4921
4922         ++vcpu->stat.insn_emulation_fail;
4923         trace_kvm_emulate_insn_failed(vcpu);
4924         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
4925                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4926                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4927                 vcpu->run->internal.ndata = 0;
4928                 r = EMULATE_FAIL;
4929         }
4930         kvm_queue_exception(vcpu, UD_VECTOR);
4931
4932         return r;
4933 }
4934
4935 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4936                                   bool write_fault_to_shadow_pgtable,
4937                                   int emulation_type)
4938 {
4939         gpa_t gpa = cr2;
4940         pfn_t pfn;
4941
4942         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4943                 return false;
4944
4945         if (!vcpu->arch.mmu.direct_map) {
4946                 /*
4947                  * Write permission should be allowed since only
4948                  * write access need to be emulated.
4949                  */
4950                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4951
4952                 /*
4953                  * If the mapping is invalid in guest, let cpu retry
4954                  * it to generate fault.
4955                  */
4956                 if (gpa == UNMAPPED_GVA)
4957                         return true;
4958         }
4959
4960         /*
4961          * Do not retry the unhandleable instruction if it faults on the
4962          * readonly host memory, otherwise it will goto a infinite loop:
4963          * retry instruction -> write #PF -> emulation fail -> retry
4964          * instruction -> ...
4965          */
4966         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4967
4968         /*
4969          * If the instruction failed on the error pfn, it can not be fixed,
4970          * report the error to userspace.
4971          */
4972         if (is_error_noslot_pfn(pfn))
4973                 return false;
4974
4975         kvm_release_pfn_clean(pfn);
4976
4977         /* The instructions are well-emulated on direct mmu. */
4978         if (vcpu->arch.mmu.direct_map) {
4979                 unsigned int indirect_shadow_pages;
4980
4981                 spin_lock(&vcpu->kvm->mmu_lock);
4982                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4983                 spin_unlock(&vcpu->kvm->mmu_lock);
4984
4985                 if (indirect_shadow_pages)
4986                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4987
4988                 return true;
4989         }
4990
4991         /*
4992          * if emulation was due to access to shadowed page table
4993          * and it failed try to unshadow page and re-enter the
4994          * guest to let CPU execute the instruction.
4995          */
4996         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4997
4998         /*
4999          * If the access faults on its page table, it can not
5000          * be fixed by unprotecting shadow page and it should
5001          * be reported to userspace.
5002          */
5003         return !write_fault_to_shadow_pgtable;
5004 }
5005
5006 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5007                               unsigned long cr2,  int emulation_type)
5008 {
5009         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5010         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5011
5012         last_retry_eip = vcpu->arch.last_retry_eip;
5013         last_retry_addr = vcpu->arch.last_retry_addr;
5014
5015         /*
5016          * If the emulation is caused by #PF and it is non-page_table
5017          * writing instruction, it means the VM-EXIT is caused by shadow
5018          * page protected, we can zap the shadow page and retry this
5019          * instruction directly.
5020          *
5021          * Note: if the guest uses a non-page-table modifying instruction
5022          * on the PDE that points to the instruction, then we will unmap
5023          * the instruction and go to an infinite loop. So, we cache the
5024          * last retried eip and the last fault address, if we meet the eip
5025          * and the address again, we can break out of the potential infinite
5026          * loop.
5027          */
5028         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5029
5030         if (!(emulation_type & EMULTYPE_RETRY))
5031                 return false;
5032
5033         if (x86_page_table_writing_insn(ctxt))
5034                 return false;
5035
5036         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5037                 return false;
5038
5039         vcpu->arch.last_retry_eip = ctxt->eip;
5040         vcpu->arch.last_retry_addr = cr2;
5041
5042         if (!vcpu->arch.mmu.direct_map)
5043                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5044
5045         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5046
5047         return true;
5048 }
5049
5050 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5051 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5052
5053 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5054 {
5055         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5056                 /* This is a good place to trace that we are exiting SMM.  */
5057                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5058
5059                 if (unlikely(vcpu->arch.smi_pending)) {
5060                         kvm_make_request(KVM_REQ_SMI, vcpu);
5061                         vcpu->arch.smi_pending = 0;
5062                 } else {
5063                         /* Process a latched INIT, if any.  */
5064                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5065                 }
5066         }
5067
5068         kvm_mmu_reset_context(vcpu);
5069 }
5070
5071 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5072 {
5073         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5074
5075         vcpu->arch.hflags = emul_flags;
5076
5077         if (changed & HF_SMM_MASK)
5078                 kvm_smm_changed(vcpu);
5079 }
5080
5081 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5082                                 unsigned long *db)
5083 {
5084         u32 dr6 = 0;
5085         int i;
5086         u32 enable, rwlen;
5087
5088         enable = dr7;
5089         rwlen = dr7 >> 16;
5090         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5091                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5092                         dr6 |= (1 << i);
5093         return dr6;
5094 }
5095
5096 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5097 {
5098         struct kvm_run *kvm_run = vcpu->run;
5099
5100         /*
5101          * rflags is the old, "raw" value of the flags.  The new value has
5102          * not been saved yet.
5103          *
5104          * This is correct even for TF set by the guest, because "the
5105          * processor will not generate this exception after the instruction
5106          * that sets the TF flag".
5107          */
5108         if (unlikely(rflags & X86_EFLAGS_TF)) {
5109                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5110                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5111                                                   DR6_RTM;
5112                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5113                         kvm_run->debug.arch.exception = DB_VECTOR;
5114                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5115                         *r = EMULATE_USER_EXIT;
5116                 } else {
5117                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5118                         /*
5119                          * "Certain debug exceptions may clear bit 0-3.  The
5120                          * remaining contents of the DR6 register are never
5121                          * cleared by the processor".
5122                          */
5123                         vcpu->arch.dr6 &= ~15;
5124                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5125                         kvm_queue_exception(vcpu, DB_VECTOR);
5126                 }
5127         }
5128 }
5129
5130 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5131 {
5132         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5133             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5134                 struct kvm_run *kvm_run = vcpu->run;
5135                 unsigned long eip = kvm_get_linear_rip(vcpu);
5136                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5137                                            vcpu->arch.guest_debug_dr7,
5138                                            vcpu->arch.eff_db);
5139
5140                 if (dr6 != 0) {
5141                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5142                         kvm_run->debug.arch.pc = eip;
5143                         kvm_run->debug.arch.exception = DB_VECTOR;
5144                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5145                         *r = EMULATE_USER_EXIT;
5146                         return true;
5147                 }
5148         }
5149
5150         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5151             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5152                 unsigned long eip = kvm_get_linear_rip(vcpu);
5153                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5154                                            vcpu->arch.dr7,
5155                                            vcpu->arch.db);
5156
5157                 if (dr6 != 0) {
5158                         vcpu->arch.dr6 &= ~15;
5159                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5160                         kvm_queue_exception(vcpu, DB_VECTOR);
5161                         *r = EMULATE_DONE;
5162                         return true;
5163                 }
5164         }
5165
5166         return false;
5167 }
5168
5169 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5170                             unsigned long cr2,
5171                             int emulation_type,
5172                             void *insn,
5173                             int insn_len)
5174 {
5175         int r;
5176         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5177         bool writeback = true;
5178         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5179
5180         /*
5181          * Clear write_fault_to_shadow_pgtable here to ensure it is
5182          * never reused.
5183          */
5184         vcpu->arch.write_fault_to_shadow_pgtable = false;
5185         kvm_clear_exception_queue(vcpu);
5186
5187         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5188                 init_emulate_ctxt(vcpu);
5189
5190                 /*
5191                  * We will reenter on the same instruction since
5192                  * we do not set complete_userspace_io.  This does not
5193                  * handle watchpoints yet, those would be handled in
5194                  * the emulate_ops.
5195                  */
5196                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5197                         return r;
5198
5199                 ctxt->interruptibility = 0;
5200                 ctxt->have_exception = false;
5201                 ctxt->exception.vector = -1;
5202                 ctxt->perm_ok = false;
5203
5204                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5205
5206                 r = x86_decode_insn(ctxt, insn, insn_len);
5207
5208                 trace_kvm_emulate_insn_start(vcpu);
5209                 ++vcpu->stat.insn_emulation;
5210                 if (r != EMULATION_OK)  {
5211                         if (emulation_type & EMULTYPE_TRAP_UD)
5212                                 return EMULATE_FAIL;
5213                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5214                                                 emulation_type))
5215                                 return EMULATE_DONE;
5216                         if (emulation_type & EMULTYPE_SKIP)
5217                                 return EMULATE_FAIL;
5218                         return handle_emulation_failure(vcpu);
5219                 }
5220         }
5221
5222         if (emulation_type & EMULTYPE_SKIP) {
5223                 kvm_rip_write(vcpu, ctxt->_eip);
5224                 if (ctxt->eflags & X86_EFLAGS_RF)
5225                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5226                 return EMULATE_DONE;
5227         }
5228
5229         if (retry_instruction(ctxt, cr2, emulation_type))
5230                 return EMULATE_DONE;
5231
5232         /* this is needed for vmware backdoor interface to work since it
5233            changes registers values  during IO operation */
5234         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5235                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5236                 emulator_invalidate_register_cache(ctxt);
5237         }
5238
5239 restart:
5240         r = x86_emulate_insn(ctxt);
5241
5242         if (r == EMULATION_INTERCEPTED)
5243                 return EMULATE_DONE;
5244
5245         if (r == EMULATION_FAILED) {
5246                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5247                                         emulation_type))
5248                         return EMULATE_DONE;
5249
5250                 return handle_emulation_failure(vcpu);
5251         }
5252
5253         if (ctxt->have_exception) {
5254                 r = EMULATE_DONE;
5255                 if (inject_emulated_exception(vcpu))
5256                         return r;
5257         } else if (vcpu->arch.pio.count) {
5258                 if (!vcpu->arch.pio.in) {
5259                         /* FIXME: return into emulator if single-stepping.  */
5260                         vcpu->arch.pio.count = 0;
5261                 } else {
5262                         writeback = false;
5263                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5264                 }
5265                 r = EMULATE_USER_EXIT;
5266         } else if (vcpu->mmio_needed) {
5267                 if (!vcpu->mmio_is_write)
5268                         writeback = false;
5269                 r = EMULATE_USER_EXIT;
5270                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5271         } else if (r == EMULATION_RESTART)
5272                 goto restart;
5273         else
5274                 r = EMULATE_DONE;
5275
5276         if (writeback) {
5277                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5278                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5279                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5280                 if (vcpu->arch.hflags != ctxt->emul_flags)
5281                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5282                 kvm_rip_write(vcpu, ctxt->eip);
5283                 if (r == EMULATE_DONE)
5284                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5285                 if (!ctxt->have_exception ||
5286                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5287                         __kvm_set_rflags(vcpu, ctxt->eflags);
5288
5289                 /*
5290                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5291                  * do nothing, and it will be requested again as soon as
5292                  * the shadow expires.  But we still need to check here,
5293                  * because POPF has no interrupt shadow.
5294                  */
5295                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5296                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5297         } else
5298                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5299
5300         return r;
5301 }
5302 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5303
5304 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5305 {
5306         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5307         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5308                                             size, port, &val, 1);
5309         /* do not return to emulator after return from userspace */
5310         vcpu->arch.pio.count = 0;
5311         return ret;
5312 }
5313 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5314
5315 static void tsc_bad(void *info)
5316 {
5317         __this_cpu_write(cpu_tsc_khz, 0);
5318 }
5319
5320 static void tsc_khz_changed(void *data)
5321 {
5322         struct cpufreq_freqs *freq = data;
5323         unsigned long khz = 0;
5324
5325         if (data)
5326                 khz = freq->new;
5327         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5328                 khz = cpufreq_quick_get(raw_smp_processor_id());
5329         if (!khz)
5330                 khz = tsc_khz;
5331         __this_cpu_write(cpu_tsc_khz, khz);
5332 }
5333
5334 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5335                                      void *data)
5336 {
5337         struct cpufreq_freqs *freq = data;
5338         struct kvm *kvm;
5339         struct kvm_vcpu *vcpu;
5340         int i, send_ipi = 0;
5341
5342         /*
5343          * We allow guests to temporarily run on slowing clocks,
5344          * provided we notify them after, or to run on accelerating
5345          * clocks, provided we notify them before.  Thus time never
5346          * goes backwards.
5347          *
5348          * However, we have a problem.  We can't atomically update
5349          * the frequency of a given CPU from this function; it is
5350          * merely a notifier, which can be called from any CPU.
5351          * Changing the TSC frequency at arbitrary points in time
5352          * requires a recomputation of local variables related to
5353          * the TSC for each VCPU.  We must flag these local variables
5354          * to be updated and be sure the update takes place with the
5355          * new frequency before any guests proceed.
5356          *
5357          * Unfortunately, the combination of hotplug CPU and frequency
5358          * change creates an intractable locking scenario; the order
5359          * of when these callouts happen is undefined with respect to
5360          * CPU hotplug, and they can race with each other.  As such,
5361          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5362          * undefined; you can actually have a CPU frequency change take
5363          * place in between the computation of X and the setting of the
5364          * variable.  To protect against this problem, all updates of
5365          * the per_cpu tsc_khz variable are done in an interrupt
5366          * protected IPI, and all callers wishing to update the value
5367          * must wait for a synchronous IPI to complete (which is trivial
5368          * if the caller is on the CPU already).  This establishes the
5369          * necessary total order on variable updates.
5370          *
5371          * Note that because a guest time update may take place
5372          * anytime after the setting of the VCPU's request bit, the
5373          * correct TSC value must be set before the request.  However,
5374          * to ensure the update actually makes it to any guest which
5375          * starts running in hardware virtualization between the set
5376          * and the acquisition of the spinlock, we must also ping the
5377          * CPU after setting the request bit.
5378          *
5379          */
5380
5381         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5382                 return 0;
5383         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5384                 return 0;
5385
5386         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5387
5388         spin_lock(&kvm_lock);
5389         list_for_each_entry(kvm, &vm_list, vm_list) {
5390                 kvm_for_each_vcpu(i, vcpu, kvm) {
5391                         if (vcpu->cpu != freq->cpu)
5392                                 continue;
5393                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5394                         if (vcpu->cpu != smp_processor_id())
5395                                 send_ipi = 1;
5396                 }
5397         }
5398         spin_unlock(&kvm_lock);
5399
5400         if (freq->old < freq->new && send_ipi) {
5401                 /*
5402                  * We upscale the frequency.  Must make the guest
5403                  * doesn't see old kvmclock values while running with
5404                  * the new frequency, otherwise we risk the guest sees
5405                  * time go backwards.
5406                  *
5407                  * In case we update the frequency for another cpu
5408                  * (which might be in guest context) send an interrupt
5409                  * to kick the cpu out of guest context.  Next time
5410                  * guest context is entered kvmclock will be updated,
5411                  * so the guest will not see stale values.
5412                  */
5413                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5414         }
5415         return 0;
5416 }
5417
5418 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5419         .notifier_call  = kvmclock_cpufreq_notifier
5420 };
5421
5422 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5423                                         unsigned long action, void *hcpu)
5424 {
5425         unsigned int cpu = (unsigned long)hcpu;
5426
5427         switch (action) {
5428                 case CPU_ONLINE:
5429                 case CPU_DOWN_FAILED:
5430                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5431                         break;
5432                 case CPU_DOWN_PREPARE:
5433                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5434                         break;
5435         }
5436         return NOTIFY_OK;
5437 }
5438
5439 static struct notifier_block kvmclock_cpu_notifier_block = {
5440         .notifier_call  = kvmclock_cpu_notifier,
5441         .priority = -INT_MAX
5442 };
5443
5444 static void kvm_timer_init(void)
5445 {
5446         int cpu;
5447
5448         max_tsc_khz = tsc_khz;
5449
5450         cpu_notifier_register_begin();
5451         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5452 #ifdef CONFIG_CPU_FREQ
5453                 struct cpufreq_policy policy;
5454                 memset(&policy, 0, sizeof(policy));
5455                 cpu = get_cpu();
5456                 cpufreq_get_policy(&policy, cpu);
5457                 if (policy.cpuinfo.max_freq)
5458                         max_tsc_khz = policy.cpuinfo.max_freq;
5459                 put_cpu();
5460 #endif
5461                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5462                                           CPUFREQ_TRANSITION_NOTIFIER);
5463         }
5464         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5465         for_each_online_cpu(cpu)
5466                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5467
5468         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5469         cpu_notifier_register_done();
5470
5471 }
5472
5473 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5474
5475 int kvm_is_in_guest(void)
5476 {
5477         return __this_cpu_read(current_vcpu) != NULL;
5478 }
5479
5480 static int kvm_is_user_mode(void)
5481 {
5482         int user_mode = 3;
5483
5484         if (__this_cpu_read(current_vcpu))
5485                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5486
5487         return user_mode != 0;
5488 }
5489
5490 static unsigned long kvm_get_guest_ip(void)
5491 {
5492         unsigned long ip = 0;
5493
5494         if (__this_cpu_read(current_vcpu))
5495                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5496
5497         return ip;
5498 }
5499
5500 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5501         .is_in_guest            = kvm_is_in_guest,
5502         .is_user_mode           = kvm_is_user_mode,
5503         .get_guest_ip           = kvm_get_guest_ip,
5504 };
5505
5506 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5507 {
5508         __this_cpu_write(current_vcpu, vcpu);
5509 }
5510 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5511
5512 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5513 {
5514         __this_cpu_write(current_vcpu, NULL);
5515 }
5516 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5517
5518 static void kvm_set_mmio_spte_mask(void)
5519 {
5520         u64 mask;
5521         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5522
5523         /*
5524          * Set the reserved bits and the present bit of an paging-structure
5525          * entry to generate page fault with PFER.RSV = 1.
5526          */
5527          /* Mask the reserved physical address bits. */
5528         mask = rsvd_bits(maxphyaddr, 51);
5529
5530         /* Bit 62 is always reserved for 32bit host. */
5531         mask |= 0x3ull << 62;
5532
5533         /* Set the present bit. */
5534         mask |= 1ull;
5535
5536 #ifdef CONFIG_X86_64
5537         /*
5538          * If reserved bit is not supported, clear the present bit to disable
5539          * mmio page fault.
5540          */
5541         if (maxphyaddr == 52)
5542                 mask &= ~1ull;
5543 #endif
5544
5545         kvm_mmu_set_mmio_spte_mask(mask);
5546 }
5547
5548 #ifdef CONFIG_X86_64
5549 static void pvclock_gtod_update_fn(struct work_struct *work)
5550 {
5551         struct kvm *kvm;
5552
5553         struct kvm_vcpu *vcpu;
5554         int i;
5555
5556         spin_lock(&kvm_lock);
5557         list_for_each_entry(kvm, &vm_list, vm_list)
5558                 kvm_for_each_vcpu(i, vcpu, kvm)
5559                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5560         atomic_set(&kvm_guest_has_master_clock, 0);
5561         spin_unlock(&kvm_lock);
5562 }
5563
5564 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5565
5566 /*
5567  * Notification about pvclock gtod data update.
5568  */
5569 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5570                                void *priv)
5571 {
5572         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5573         struct timekeeper *tk = priv;
5574
5575         update_pvclock_gtod(tk);
5576
5577         /* disable master clock if host does not trust, or does not
5578          * use, TSC clocksource
5579          */
5580         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5581             atomic_read(&kvm_guest_has_master_clock) != 0)
5582                 queue_work(system_long_wq, &pvclock_gtod_work);
5583
5584         return 0;
5585 }
5586
5587 static struct notifier_block pvclock_gtod_notifier = {
5588         .notifier_call = pvclock_gtod_notify,
5589 };
5590 #endif
5591
5592 int kvm_arch_init(void *opaque)
5593 {
5594         int r;
5595         struct kvm_x86_ops *ops = opaque;
5596
5597         if (kvm_x86_ops) {
5598                 printk(KERN_ERR "kvm: already loaded the other module\n");
5599                 r = -EEXIST;
5600                 goto out;
5601         }
5602
5603         if (!ops->cpu_has_kvm_support()) {
5604                 printk(KERN_ERR "kvm: no hardware support\n");
5605                 r = -EOPNOTSUPP;
5606                 goto out;
5607         }
5608         if (ops->disabled_by_bios()) {
5609                 printk(KERN_ERR "kvm: disabled by bios\n");
5610                 r = -EOPNOTSUPP;
5611                 goto out;
5612         }
5613
5614         r = -ENOMEM;
5615         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5616         if (!shared_msrs) {
5617                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5618                 goto out;
5619         }
5620
5621         r = kvm_mmu_module_init();
5622         if (r)
5623                 goto out_free_percpu;
5624
5625         kvm_set_mmio_spte_mask();
5626
5627         kvm_x86_ops = ops;
5628
5629         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5630                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5631
5632         kvm_timer_init();
5633
5634         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5635
5636         if (cpu_has_xsave)
5637                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5638
5639         kvm_lapic_init();
5640 #ifdef CONFIG_X86_64
5641         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5642 #endif
5643
5644         return 0;
5645
5646 out_free_percpu:
5647         free_percpu(shared_msrs);
5648 out:
5649         return r;
5650 }
5651
5652 void kvm_arch_exit(void)
5653 {
5654         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5655
5656         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5657                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5658                                             CPUFREQ_TRANSITION_NOTIFIER);
5659         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5660 #ifdef CONFIG_X86_64
5661         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5662 #endif
5663         kvm_x86_ops = NULL;
5664         kvm_mmu_module_exit();
5665         free_percpu(shared_msrs);
5666 }
5667
5668 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5669 {
5670         ++vcpu->stat.halt_exits;
5671         if (irqchip_in_kernel(vcpu->kvm)) {
5672                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5673                 return 1;
5674         } else {
5675                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5676                 return 0;
5677         }
5678 }
5679 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5680
5681 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5682 {
5683         kvm_x86_ops->skip_emulated_instruction(vcpu);
5684         return kvm_vcpu_halt(vcpu);
5685 }
5686 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5687
5688 /*
5689  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5690  *
5691  * @apicid - apicid of vcpu to be kicked.
5692  */
5693 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5694 {
5695         struct kvm_lapic_irq lapic_irq;
5696
5697         lapic_irq.shorthand = 0;
5698         lapic_irq.dest_mode = 0;
5699         lapic_irq.dest_id = apicid;
5700         lapic_irq.msi_redir_hint = false;
5701
5702         lapic_irq.delivery_mode = APIC_DM_REMRD;
5703         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5704 }
5705
5706 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5707 {
5708         unsigned long nr, a0, a1, a2, a3, ret;
5709         int op_64_bit, r = 1;
5710
5711         kvm_x86_ops->skip_emulated_instruction(vcpu);
5712
5713         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5714                 return kvm_hv_hypercall(vcpu);
5715
5716         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5717         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5718         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5719         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5720         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5721
5722         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5723
5724         op_64_bit = is_64_bit_mode(vcpu);
5725         if (!op_64_bit) {
5726                 nr &= 0xFFFFFFFF;
5727                 a0 &= 0xFFFFFFFF;
5728                 a1 &= 0xFFFFFFFF;
5729                 a2 &= 0xFFFFFFFF;
5730                 a3 &= 0xFFFFFFFF;
5731         }
5732
5733         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5734                 ret = -KVM_EPERM;
5735                 goto out;
5736         }
5737
5738         switch (nr) {
5739         case KVM_HC_VAPIC_POLL_IRQ:
5740                 ret = 0;
5741                 break;
5742         case KVM_HC_KICK_CPU:
5743                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5744                 ret = 0;
5745                 break;
5746         default:
5747                 ret = -KVM_ENOSYS;
5748                 break;
5749         }
5750 out:
5751         if (!op_64_bit)
5752                 ret = (u32)ret;
5753         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5754         ++vcpu->stat.hypercalls;
5755         return r;
5756 }
5757 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5758
5759 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5760 {
5761         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5762         char instruction[3];
5763         unsigned long rip = kvm_rip_read(vcpu);
5764
5765         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5766
5767         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5768 }
5769
5770 /*
5771  * Check if userspace requested an interrupt window, and that the
5772  * interrupt window is open.
5773  *
5774  * No need to exit to userspace if we already have an interrupt queued.
5775  */
5776 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5777 {
5778         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5779                 vcpu->run->request_interrupt_window &&
5780                 kvm_arch_interrupt_allowed(vcpu));
5781 }
5782
5783 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5784 {
5785         struct kvm_run *kvm_run = vcpu->run;
5786
5787         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5788         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5789         kvm_run->cr8 = kvm_get_cr8(vcpu);
5790         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5791         if (irqchip_in_kernel(vcpu->kvm))
5792                 kvm_run->ready_for_interrupt_injection = 1;
5793         else
5794                 kvm_run->ready_for_interrupt_injection =
5795                         kvm_arch_interrupt_allowed(vcpu) &&
5796                         !kvm_cpu_has_interrupt(vcpu) &&
5797                         !kvm_event_needs_reinjection(vcpu);
5798 }
5799
5800 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5801 {
5802         int max_irr, tpr;
5803
5804         if (!kvm_x86_ops->update_cr8_intercept)
5805                 return;
5806
5807         if (!vcpu->arch.apic)
5808                 return;
5809
5810         if (!vcpu->arch.apic->vapic_addr)
5811                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5812         else
5813                 max_irr = -1;
5814
5815         if (max_irr != -1)
5816                 max_irr >>= 4;
5817
5818         tpr = kvm_lapic_get_cr8(vcpu);
5819
5820         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5821 }
5822
5823 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5824 {
5825         int r;
5826
5827         /* try to reinject previous events if any */
5828         if (vcpu->arch.exception.pending) {
5829                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5830                                         vcpu->arch.exception.has_error_code,
5831                                         vcpu->arch.exception.error_code);
5832
5833                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
5834                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
5835                                              X86_EFLAGS_RF);
5836
5837                 if (vcpu->arch.exception.nr == DB_VECTOR &&
5838                     (vcpu->arch.dr7 & DR7_GD)) {
5839                         vcpu->arch.dr7 &= ~DR7_GD;
5840                         kvm_update_dr7(vcpu);
5841                 }
5842
5843                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5844                                           vcpu->arch.exception.has_error_code,
5845                                           vcpu->arch.exception.error_code,
5846                                           vcpu->arch.exception.reinject);
5847                 return 0;
5848         }
5849
5850         if (vcpu->arch.nmi_injected) {
5851                 kvm_x86_ops->set_nmi(vcpu);
5852                 return 0;
5853         }
5854
5855         if (vcpu->arch.interrupt.pending) {
5856                 kvm_x86_ops->set_irq(vcpu);
5857                 return 0;
5858         }
5859
5860         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5861                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5862                 if (r != 0)
5863                         return r;
5864         }
5865
5866         /* try to inject new event if pending */
5867         if (vcpu->arch.nmi_pending) {
5868                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5869                         --vcpu->arch.nmi_pending;
5870                         vcpu->arch.nmi_injected = true;
5871                         kvm_x86_ops->set_nmi(vcpu);
5872                 }
5873         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5874                 /*
5875                  * Because interrupts can be injected asynchronously, we are
5876                  * calling check_nested_events again here to avoid a race condition.
5877                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
5878                  * proposal and current concerns.  Perhaps we should be setting
5879                  * KVM_REQ_EVENT only on certain events and not unconditionally?
5880                  */
5881                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5882                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5883                         if (r != 0)
5884                                 return r;
5885                 }
5886                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5887                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5888                                             false);
5889                         kvm_x86_ops->set_irq(vcpu);
5890                 }
5891         }
5892         return 0;
5893 }
5894
5895 static void process_nmi(struct kvm_vcpu *vcpu)
5896 {
5897         unsigned limit = 2;
5898
5899         /*
5900          * x86 is limited to one NMI running, and one NMI pending after it.
5901          * If an NMI is already in progress, limit further NMIs to just one.
5902          * Otherwise, allow two (and we'll inject the first one immediately).
5903          */
5904         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5905                 limit = 1;
5906
5907         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5908         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5909         kvm_make_request(KVM_REQ_EVENT, vcpu);
5910 }
5911
5912 #define put_smstate(type, buf, offset, val)                       \
5913         *(type *)((buf) + (offset) - 0x7e00) = val
5914
5915 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
5916 {
5917         u32 flags = 0;
5918         flags |= seg->g       << 23;
5919         flags |= seg->db      << 22;
5920         flags |= seg->l       << 21;
5921         flags |= seg->avl     << 20;
5922         flags |= seg->present << 15;
5923         flags |= seg->dpl     << 13;
5924         flags |= seg->s       << 12;
5925         flags |= seg->type    << 8;
5926         return flags;
5927 }
5928
5929 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
5930 {
5931         struct kvm_segment seg;
5932         int offset;
5933
5934         kvm_get_segment(vcpu, &seg, n);
5935         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
5936
5937         if (n < 3)
5938                 offset = 0x7f84 + n * 12;
5939         else
5940                 offset = 0x7f2c + (n - 3) * 12;
5941
5942         put_smstate(u32, buf, offset + 8, seg.base);
5943         put_smstate(u32, buf, offset + 4, seg.limit);
5944         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
5945 }
5946
5947 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
5948 {
5949         struct kvm_segment seg;
5950         int offset;
5951         u16 flags;
5952
5953         kvm_get_segment(vcpu, &seg, n);
5954         offset = 0x7e00 + n * 16;
5955
5956         flags = process_smi_get_segment_flags(&seg) >> 8;
5957         put_smstate(u16, buf, offset, seg.selector);
5958         put_smstate(u16, buf, offset + 2, flags);
5959         put_smstate(u32, buf, offset + 4, seg.limit);
5960         put_smstate(u64, buf, offset + 8, seg.base);
5961 }
5962
5963 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
5964 {
5965         struct desc_ptr dt;
5966         struct kvm_segment seg;
5967         unsigned long val;
5968         int i;
5969
5970         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
5971         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
5972         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
5973         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
5974
5975         for (i = 0; i < 8; i++)
5976                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
5977
5978         kvm_get_dr(vcpu, 6, &val);
5979         put_smstate(u32, buf, 0x7fcc, (u32)val);
5980         kvm_get_dr(vcpu, 7, &val);
5981         put_smstate(u32, buf, 0x7fc8, (u32)val);
5982
5983         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
5984         put_smstate(u32, buf, 0x7fc4, seg.selector);
5985         put_smstate(u32, buf, 0x7f64, seg.base);
5986         put_smstate(u32, buf, 0x7f60, seg.limit);
5987         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
5988
5989         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
5990         put_smstate(u32, buf, 0x7fc0, seg.selector);
5991         put_smstate(u32, buf, 0x7f80, seg.base);
5992         put_smstate(u32, buf, 0x7f7c, seg.limit);
5993         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
5994
5995         kvm_x86_ops->get_gdt(vcpu, &dt);
5996         put_smstate(u32, buf, 0x7f74, dt.address);
5997         put_smstate(u32, buf, 0x7f70, dt.size);
5998
5999         kvm_x86_ops->get_idt(vcpu, &dt);
6000         put_smstate(u32, buf, 0x7f58, dt.address);
6001         put_smstate(u32, buf, 0x7f54, dt.size);
6002
6003         for (i = 0; i < 6; i++)
6004                 process_smi_save_seg_32(vcpu, buf, i);
6005
6006         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6007
6008         /* revision id */
6009         put_smstate(u32, buf, 0x7efc, 0x00020000);
6010         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6011 }
6012
6013 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6014 {
6015 #ifdef CONFIG_X86_64
6016         struct desc_ptr dt;
6017         struct kvm_segment seg;
6018         unsigned long val;
6019         int i;
6020
6021         for (i = 0; i < 16; i++)
6022                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6023
6024         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6025         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6026
6027         kvm_get_dr(vcpu, 6, &val);
6028         put_smstate(u64, buf, 0x7f68, val);
6029         kvm_get_dr(vcpu, 7, &val);
6030         put_smstate(u64, buf, 0x7f60, val);
6031
6032         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6033         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6034         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6035
6036         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6037
6038         /* revision id */
6039         put_smstate(u32, buf, 0x7efc, 0x00020064);
6040
6041         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6042
6043         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6044         put_smstate(u16, buf, 0x7e90, seg.selector);
6045         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6046         put_smstate(u32, buf, 0x7e94, seg.limit);
6047         put_smstate(u64, buf, 0x7e98, seg.base);
6048
6049         kvm_x86_ops->get_idt(vcpu, &dt);
6050         put_smstate(u32, buf, 0x7e84, dt.size);
6051         put_smstate(u64, buf, 0x7e88, dt.address);
6052
6053         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6054         put_smstate(u16, buf, 0x7e70, seg.selector);
6055         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6056         put_smstate(u32, buf, 0x7e74, seg.limit);
6057         put_smstate(u64, buf, 0x7e78, seg.base);
6058
6059         kvm_x86_ops->get_gdt(vcpu, &dt);
6060         put_smstate(u32, buf, 0x7e64, dt.size);
6061         put_smstate(u64, buf, 0x7e68, dt.address);
6062
6063         for (i = 0; i < 6; i++)
6064                 process_smi_save_seg_64(vcpu, buf, i);
6065 #else
6066         WARN_ON_ONCE(1);
6067 #endif
6068 }
6069
6070 static void process_smi(struct kvm_vcpu *vcpu)
6071 {
6072         struct kvm_segment cs, ds;
6073         char buf[512];
6074         u32 cr0;
6075
6076         if (is_smm(vcpu)) {
6077                 vcpu->arch.smi_pending = true;
6078                 return;
6079         }
6080
6081         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6082         vcpu->arch.hflags |= HF_SMM_MASK;
6083         memset(buf, 0, 512);
6084         if (guest_cpuid_has_longmode(vcpu))
6085                 process_smi_save_state_64(vcpu, buf);
6086         else
6087                 process_smi_save_state_32(vcpu, buf);
6088
6089         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6090
6091         if (kvm_x86_ops->get_nmi_mask(vcpu))
6092                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6093         else
6094                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6095
6096         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6097         kvm_rip_write(vcpu, 0x8000);
6098
6099         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6100         kvm_x86_ops->set_cr0(vcpu, cr0);
6101         vcpu->arch.cr0 = cr0;
6102
6103         kvm_x86_ops->set_cr4(vcpu, 0);
6104
6105         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6106
6107         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6108         cs.base = vcpu->arch.smbase;
6109
6110         ds.selector = 0;
6111         ds.base = 0;
6112
6113         cs.limit    = ds.limit = 0xffffffff;
6114         cs.type     = ds.type = 0x3;
6115         cs.dpl      = ds.dpl = 0;
6116         cs.db       = ds.db = 0;
6117         cs.s        = ds.s = 1;
6118         cs.l        = ds.l = 0;
6119         cs.g        = ds.g = 1;
6120         cs.avl      = ds.avl = 0;
6121         cs.present  = ds.present = 1;
6122         cs.unusable = ds.unusable = 0;
6123         cs.padding  = ds.padding = 0;
6124
6125         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6126         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6127         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6128         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6129         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6130         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6131
6132         if (guest_cpuid_has_longmode(vcpu))
6133                 kvm_x86_ops->set_efer(vcpu, 0);
6134
6135         kvm_update_cpuid(vcpu);
6136         kvm_mmu_reset_context(vcpu);
6137 }
6138
6139 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6140 {
6141         u64 eoi_exit_bitmap[4];
6142         u32 tmr[8];
6143
6144         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6145                 return;
6146
6147         memset(eoi_exit_bitmap, 0, 32);
6148         memset(tmr, 0, 32);
6149
6150         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
6151         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6152         kvm_apic_update_tmr(vcpu, tmr);
6153 }
6154
6155 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6156 {
6157         ++vcpu->stat.tlb_flush;
6158         kvm_x86_ops->tlb_flush(vcpu);
6159 }
6160
6161 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6162 {
6163         struct page *page = NULL;
6164
6165         if (!irqchip_in_kernel(vcpu->kvm))
6166                 return;
6167
6168         if (!kvm_x86_ops->set_apic_access_page_addr)
6169                 return;
6170
6171         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6172         if (is_error_page(page))
6173                 return;
6174         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6175
6176         /*
6177          * Do not pin apic access page in memory, the MMU notifier
6178          * will call us again if it is migrated or swapped out.
6179          */
6180         put_page(page);
6181 }
6182 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6183
6184 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6185                                            unsigned long address)
6186 {
6187         /*
6188          * The physical address of apic access page is stored in the VMCS.
6189          * Update it when it becomes invalid.
6190          */
6191         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6192                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6193 }
6194
6195 /*
6196  * Returns 1 to let vcpu_run() continue the guest execution loop without
6197  * exiting to the userspace.  Otherwise, the value will be returned to the
6198  * userspace.
6199  */
6200 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6201 {
6202         int r;
6203         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
6204                 vcpu->run->request_interrupt_window;
6205         bool req_immediate_exit = false;
6206
6207         if (vcpu->requests) {
6208                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6209                         kvm_mmu_unload(vcpu);
6210                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6211                         __kvm_migrate_timers(vcpu);
6212                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6213                         kvm_gen_update_masterclock(vcpu->kvm);
6214                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6215                         kvm_gen_kvmclock_update(vcpu);
6216                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6217                         r = kvm_guest_time_update(vcpu);
6218                         if (unlikely(r))
6219                                 goto out;
6220                 }
6221                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6222                         kvm_mmu_sync_roots(vcpu);
6223                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6224                         kvm_vcpu_flush_tlb(vcpu);
6225                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6226                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6227                         r = 0;
6228                         goto out;
6229                 }
6230                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6231                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6232                         r = 0;
6233                         goto out;
6234                 }
6235                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6236                         vcpu->fpu_active = 0;
6237                         kvm_x86_ops->fpu_deactivate(vcpu);
6238                 }
6239                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6240                         /* Page is swapped out. Do synthetic halt */
6241                         vcpu->arch.apf.halted = true;
6242                         r = 1;
6243                         goto out;
6244                 }
6245                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6246                         record_steal_time(vcpu);
6247                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6248                         process_smi(vcpu);
6249                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6250                         process_nmi(vcpu);
6251                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6252                         kvm_pmu_handle_event(vcpu);
6253                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6254                         kvm_pmu_deliver_pmi(vcpu);
6255                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6256                         vcpu_scan_ioapic(vcpu);
6257                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6258                         kvm_vcpu_reload_apic_access_page(vcpu);
6259         }
6260
6261         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6262                 kvm_apic_accept_events(vcpu);
6263                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6264                         r = 1;
6265                         goto out;
6266                 }
6267
6268                 if (inject_pending_event(vcpu, req_int_win) != 0)
6269                         req_immediate_exit = true;
6270                 /* enable NMI/IRQ window open exits if needed */
6271                 else if (vcpu->arch.nmi_pending)
6272                         kvm_x86_ops->enable_nmi_window(vcpu);
6273                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6274                         kvm_x86_ops->enable_irq_window(vcpu);
6275
6276                 if (kvm_lapic_enabled(vcpu)) {
6277                         /*
6278                          * Update architecture specific hints for APIC
6279                          * virtual interrupt delivery.
6280                          */
6281                         if (kvm_x86_ops->hwapic_irr_update)
6282                                 kvm_x86_ops->hwapic_irr_update(vcpu,
6283                                         kvm_lapic_find_highest_irr(vcpu));
6284                         update_cr8_intercept(vcpu);
6285                         kvm_lapic_sync_to_vapic(vcpu);
6286                 }
6287         }
6288
6289         r = kvm_mmu_reload(vcpu);
6290         if (unlikely(r)) {
6291                 goto cancel_injection;
6292         }
6293
6294         preempt_disable();
6295
6296         kvm_x86_ops->prepare_guest_switch(vcpu);
6297         if (vcpu->fpu_active)
6298                 kvm_load_guest_fpu(vcpu);
6299         kvm_load_guest_xcr0(vcpu);
6300
6301         vcpu->mode = IN_GUEST_MODE;
6302
6303         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6304
6305         /* We should set ->mode before check ->requests,
6306          * see the comment in make_all_cpus_request.
6307          */
6308         smp_mb__after_srcu_read_unlock();
6309
6310         local_irq_disable();
6311
6312         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6313             || need_resched() || signal_pending(current)) {
6314                 vcpu->mode = OUTSIDE_GUEST_MODE;
6315                 smp_wmb();
6316                 local_irq_enable();
6317                 preempt_enable();
6318                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6319                 r = 1;
6320                 goto cancel_injection;
6321         }
6322
6323         if (req_immediate_exit)
6324                 smp_send_reschedule(vcpu->cpu);
6325
6326         __kvm_guest_enter();
6327
6328         if (unlikely(vcpu->arch.switch_db_regs)) {
6329                 set_debugreg(0, 7);
6330                 set_debugreg(vcpu->arch.eff_db[0], 0);
6331                 set_debugreg(vcpu->arch.eff_db[1], 1);
6332                 set_debugreg(vcpu->arch.eff_db[2], 2);
6333                 set_debugreg(vcpu->arch.eff_db[3], 3);
6334                 set_debugreg(vcpu->arch.dr6, 6);
6335                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6336         }
6337
6338         trace_kvm_entry(vcpu->vcpu_id);
6339         wait_lapic_expire(vcpu);
6340         kvm_x86_ops->run(vcpu);
6341
6342         /*
6343          * Do this here before restoring debug registers on the host.  And
6344          * since we do this before handling the vmexit, a DR access vmexit
6345          * can (a) read the correct value of the debug registers, (b) set
6346          * KVM_DEBUGREG_WONT_EXIT again.
6347          */
6348         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6349                 int i;
6350
6351                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6352                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6353                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6354                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6355         }
6356
6357         /*
6358          * If the guest has used debug registers, at least dr7
6359          * will be disabled while returning to the host.
6360          * If we don't have active breakpoints in the host, we don't
6361          * care about the messed up debug address registers. But if
6362          * we have some of them active, restore the old state.
6363          */
6364         if (hw_breakpoint_active())
6365                 hw_breakpoint_restore();
6366
6367         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6368                                                            native_read_tsc());
6369
6370         vcpu->mode = OUTSIDE_GUEST_MODE;
6371         smp_wmb();
6372
6373         /* Interrupt is enabled by handle_external_intr() */
6374         kvm_x86_ops->handle_external_intr(vcpu);
6375
6376         ++vcpu->stat.exits;
6377
6378         /*
6379          * We must have an instruction between local_irq_enable() and
6380          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6381          * the interrupt shadow.  The stat.exits increment will do nicely.
6382          * But we need to prevent reordering, hence this barrier():
6383          */
6384         barrier();
6385
6386         kvm_guest_exit();
6387
6388         preempt_enable();
6389
6390         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6391
6392         /*
6393          * Profile KVM exit RIPs:
6394          */
6395         if (unlikely(prof_on == KVM_PROFILING)) {
6396                 unsigned long rip = kvm_rip_read(vcpu);
6397                 profile_hit(KVM_PROFILING, (void *)rip);
6398         }
6399
6400         if (unlikely(vcpu->arch.tsc_always_catchup))
6401                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6402
6403         if (vcpu->arch.apic_attention)
6404                 kvm_lapic_sync_from_vapic(vcpu);
6405
6406         r = kvm_x86_ops->handle_exit(vcpu);
6407         return r;
6408
6409 cancel_injection:
6410         kvm_x86_ops->cancel_injection(vcpu);
6411         if (unlikely(vcpu->arch.apic_attention))
6412                 kvm_lapic_sync_from_vapic(vcpu);
6413 out:
6414         return r;
6415 }
6416
6417 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6418 {
6419         if (!kvm_arch_vcpu_runnable(vcpu)) {
6420                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6421                 kvm_vcpu_block(vcpu);
6422                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6423                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6424                         return 1;
6425         }
6426
6427         kvm_apic_accept_events(vcpu);
6428         switch(vcpu->arch.mp_state) {
6429         case KVM_MP_STATE_HALTED:
6430                 vcpu->arch.pv.pv_unhalted = false;
6431                 vcpu->arch.mp_state =
6432                         KVM_MP_STATE_RUNNABLE;
6433         case KVM_MP_STATE_RUNNABLE:
6434                 vcpu->arch.apf.halted = false;
6435                 break;
6436         case KVM_MP_STATE_INIT_RECEIVED:
6437                 break;
6438         default:
6439                 return -EINTR;
6440                 break;
6441         }
6442         return 1;
6443 }
6444
6445 static int vcpu_run(struct kvm_vcpu *vcpu)
6446 {
6447         int r;
6448         struct kvm *kvm = vcpu->kvm;
6449
6450         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6451
6452         for (;;) {
6453                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6454                     !vcpu->arch.apf.halted)
6455                         r = vcpu_enter_guest(vcpu);
6456                 else
6457                         r = vcpu_block(kvm, vcpu);
6458                 if (r <= 0)
6459                         break;
6460
6461                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6462                 if (kvm_cpu_has_pending_timer(vcpu))
6463                         kvm_inject_pending_timer_irqs(vcpu);
6464
6465                 if (dm_request_for_irq_injection(vcpu)) {
6466                         r = -EINTR;
6467                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6468                         ++vcpu->stat.request_irq_exits;
6469                         break;
6470                 }
6471
6472                 kvm_check_async_pf_completion(vcpu);
6473
6474                 if (signal_pending(current)) {
6475                         r = -EINTR;
6476                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6477                         ++vcpu->stat.signal_exits;
6478                         break;
6479                 }
6480                 if (need_resched()) {
6481                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6482                         cond_resched();
6483                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6484                 }
6485         }
6486
6487         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6488
6489         return r;
6490 }
6491
6492 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6493 {
6494         int r;
6495         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6496         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6497         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6498         if (r != EMULATE_DONE)
6499                 return 0;
6500         return 1;
6501 }
6502
6503 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6504 {
6505         BUG_ON(!vcpu->arch.pio.count);
6506
6507         return complete_emulated_io(vcpu);
6508 }
6509
6510 /*
6511  * Implements the following, as a state machine:
6512  *
6513  * read:
6514  *   for each fragment
6515  *     for each mmio piece in the fragment
6516  *       write gpa, len
6517  *       exit
6518  *       copy data
6519  *   execute insn
6520  *
6521  * write:
6522  *   for each fragment
6523  *     for each mmio piece in the fragment
6524  *       write gpa, len
6525  *       copy data
6526  *       exit
6527  */
6528 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6529 {
6530         struct kvm_run *run = vcpu->run;
6531         struct kvm_mmio_fragment *frag;
6532         unsigned len;
6533
6534         BUG_ON(!vcpu->mmio_needed);
6535
6536         /* Complete previous fragment */
6537         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6538         len = min(8u, frag->len);
6539         if (!vcpu->mmio_is_write)
6540                 memcpy(frag->data, run->mmio.data, len);
6541
6542         if (frag->len <= 8) {
6543                 /* Switch to the next fragment. */
6544                 frag++;
6545                 vcpu->mmio_cur_fragment++;
6546         } else {
6547                 /* Go forward to the next mmio piece. */
6548                 frag->data += len;
6549                 frag->gpa += len;
6550                 frag->len -= len;
6551         }
6552
6553         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6554                 vcpu->mmio_needed = 0;
6555
6556                 /* FIXME: return into emulator if single-stepping.  */
6557                 if (vcpu->mmio_is_write)
6558                         return 1;
6559                 vcpu->mmio_read_completed = 1;
6560                 return complete_emulated_io(vcpu);
6561         }
6562
6563         run->exit_reason = KVM_EXIT_MMIO;
6564         run->mmio.phys_addr = frag->gpa;
6565         if (vcpu->mmio_is_write)
6566                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6567         run->mmio.len = min(8u, frag->len);
6568         run->mmio.is_write = vcpu->mmio_is_write;
6569         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6570         return 0;
6571 }
6572
6573
6574 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6575 {
6576         struct fpu *fpu = &current->thread.fpu;
6577         int r;
6578         sigset_t sigsaved;
6579
6580         fpu__activate_curr(fpu);
6581
6582         if (vcpu->sigset_active)
6583                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6584
6585         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6586                 kvm_vcpu_block(vcpu);
6587                 kvm_apic_accept_events(vcpu);
6588                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6589                 r = -EAGAIN;
6590                 goto out;
6591         }
6592
6593         /* re-sync apic's tpr */
6594         if (!irqchip_in_kernel(vcpu->kvm)) {
6595                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6596                         r = -EINVAL;
6597                         goto out;
6598                 }
6599         }
6600
6601         if (unlikely(vcpu->arch.complete_userspace_io)) {
6602                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6603                 vcpu->arch.complete_userspace_io = NULL;
6604                 r = cui(vcpu);
6605                 if (r <= 0)
6606                         goto out;
6607         } else
6608                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6609
6610         r = vcpu_run(vcpu);
6611
6612 out:
6613         post_kvm_run_save(vcpu);
6614         if (vcpu->sigset_active)
6615                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6616
6617         return r;
6618 }
6619
6620 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6621 {
6622         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6623                 /*
6624                  * We are here if userspace calls get_regs() in the middle of
6625                  * instruction emulation. Registers state needs to be copied
6626                  * back from emulation context to vcpu. Userspace shouldn't do
6627                  * that usually, but some bad designed PV devices (vmware
6628                  * backdoor interface) need this to work
6629                  */
6630                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6631                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6632         }
6633         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6634         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6635         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6636         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6637         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6638         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6639         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6640         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6641 #ifdef CONFIG_X86_64
6642         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6643         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6644         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6645         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6646         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6647         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6648         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6649         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6650 #endif
6651
6652         regs->rip = kvm_rip_read(vcpu);
6653         regs->rflags = kvm_get_rflags(vcpu);
6654
6655         return 0;
6656 }
6657
6658 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6659 {
6660         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6661         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6662
6663         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6664         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6665         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6666         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6667         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6668         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6669         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6670         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6671 #ifdef CONFIG_X86_64
6672         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6673         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6674         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6675         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6676         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6677         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6678         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6679         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6680 #endif
6681
6682         kvm_rip_write(vcpu, regs->rip);
6683         kvm_set_rflags(vcpu, regs->rflags);
6684
6685         vcpu->arch.exception.pending = false;
6686
6687         kvm_make_request(KVM_REQ_EVENT, vcpu);
6688
6689         return 0;
6690 }
6691
6692 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6693 {
6694         struct kvm_segment cs;
6695
6696         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6697         *db = cs.db;
6698         *l = cs.l;
6699 }
6700 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6701
6702 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6703                                   struct kvm_sregs *sregs)
6704 {
6705         struct desc_ptr dt;
6706
6707         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6708         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6709         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6710         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6711         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6712         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6713
6714         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6715         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6716
6717         kvm_x86_ops->get_idt(vcpu, &dt);
6718         sregs->idt.limit = dt.size;
6719         sregs->idt.base = dt.address;
6720         kvm_x86_ops->get_gdt(vcpu, &dt);
6721         sregs->gdt.limit = dt.size;
6722         sregs->gdt.base = dt.address;
6723
6724         sregs->cr0 = kvm_read_cr0(vcpu);
6725         sregs->cr2 = vcpu->arch.cr2;
6726         sregs->cr3 = kvm_read_cr3(vcpu);
6727         sregs->cr4 = kvm_read_cr4(vcpu);
6728         sregs->cr8 = kvm_get_cr8(vcpu);
6729         sregs->efer = vcpu->arch.efer;
6730         sregs->apic_base = kvm_get_apic_base(vcpu);
6731
6732         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6733
6734         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6735                 set_bit(vcpu->arch.interrupt.nr,
6736                         (unsigned long *)sregs->interrupt_bitmap);
6737
6738         return 0;
6739 }
6740
6741 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6742                                     struct kvm_mp_state *mp_state)
6743 {
6744         kvm_apic_accept_events(vcpu);
6745         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6746                                         vcpu->arch.pv.pv_unhalted)
6747                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6748         else
6749                 mp_state->mp_state = vcpu->arch.mp_state;
6750
6751         return 0;
6752 }
6753
6754 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6755                                     struct kvm_mp_state *mp_state)
6756 {
6757         if (!kvm_vcpu_has_lapic(vcpu) &&
6758             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6759                 return -EINVAL;
6760
6761         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6762                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6763                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6764         } else
6765                 vcpu->arch.mp_state = mp_state->mp_state;
6766         kvm_make_request(KVM_REQ_EVENT, vcpu);
6767         return 0;
6768 }
6769
6770 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6771                     int reason, bool has_error_code, u32 error_code)
6772 {
6773         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6774         int ret;
6775
6776         init_emulate_ctxt(vcpu);
6777
6778         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6779                                    has_error_code, error_code);
6780
6781         if (ret)
6782                 return EMULATE_FAIL;
6783
6784         kvm_rip_write(vcpu, ctxt->eip);
6785         kvm_set_rflags(vcpu, ctxt->eflags);
6786         kvm_make_request(KVM_REQ_EVENT, vcpu);
6787         return EMULATE_DONE;
6788 }
6789 EXPORT_SYMBOL_GPL(kvm_task_switch);
6790
6791 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6792                                   struct kvm_sregs *sregs)
6793 {
6794         struct msr_data apic_base_msr;
6795         int mmu_reset_needed = 0;
6796         int pending_vec, max_bits, idx;
6797         struct desc_ptr dt;
6798
6799         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6800                 return -EINVAL;
6801
6802         dt.size = sregs->idt.limit;
6803         dt.address = sregs->idt.base;
6804         kvm_x86_ops->set_idt(vcpu, &dt);
6805         dt.size = sregs->gdt.limit;
6806         dt.address = sregs->gdt.base;
6807         kvm_x86_ops->set_gdt(vcpu, &dt);
6808
6809         vcpu->arch.cr2 = sregs->cr2;
6810         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6811         vcpu->arch.cr3 = sregs->cr3;
6812         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6813
6814         kvm_set_cr8(vcpu, sregs->cr8);
6815
6816         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6817         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6818         apic_base_msr.data = sregs->apic_base;
6819         apic_base_msr.host_initiated = true;
6820         kvm_set_apic_base(vcpu, &apic_base_msr);
6821
6822         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6823         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6824         vcpu->arch.cr0 = sregs->cr0;
6825
6826         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6827         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6828         if (sregs->cr4 & X86_CR4_OSXSAVE)
6829                 kvm_update_cpuid(vcpu);
6830
6831         idx = srcu_read_lock(&vcpu->kvm->srcu);
6832         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6833                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6834                 mmu_reset_needed = 1;
6835         }
6836         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6837
6838         if (mmu_reset_needed)
6839                 kvm_mmu_reset_context(vcpu);
6840
6841         max_bits = KVM_NR_INTERRUPTS;
6842         pending_vec = find_first_bit(
6843                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6844         if (pending_vec < max_bits) {
6845                 kvm_queue_interrupt(vcpu, pending_vec, false);
6846                 pr_debug("Set back pending irq %d\n", pending_vec);
6847         }
6848
6849         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6850         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6851         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6852         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6853         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6854         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6855
6856         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6857         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6858
6859         update_cr8_intercept(vcpu);
6860
6861         /* Older userspace won't unhalt the vcpu on reset. */
6862         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6863             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6864             !is_protmode(vcpu))
6865                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6866
6867         kvm_make_request(KVM_REQ_EVENT, vcpu);
6868
6869         return 0;
6870 }
6871
6872 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6873                                         struct kvm_guest_debug *dbg)
6874 {
6875         unsigned long rflags;
6876         int i, r;
6877
6878         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6879                 r = -EBUSY;
6880                 if (vcpu->arch.exception.pending)
6881                         goto out;
6882                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6883                         kvm_queue_exception(vcpu, DB_VECTOR);
6884                 else
6885                         kvm_queue_exception(vcpu, BP_VECTOR);
6886         }
6887
6888         /*
6889          * Read rflags as long as potentially injected trace flags are still
6890          * filtered out.
6891          */
6892         rflags = kvm_get_rflags(vcpu);
6893
6894         vcpu->guest_debug = dbg->control;
6895         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6896                 vcpu->guest_debug = 0;
6897
6898         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6899                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6900                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6901                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6902         } else {
6903                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6904                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6905         }
6906         kvm_update_dr7(vcpu);
6907
6908         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6909                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6910                         get_segment_base(vcpu, VCPU_SREG_CS);
6911
6912         /*
6913          * Trigger an rflags update that will inject or remove the trace
6914          * flags.
6915          */
6916         kvm_set_rflags(vcpu, rflags);
6917
6918         kvm_x86_ops->update_db_bp_intercept(vcpu);
6919
6920         r = 0;
6921
6922 out:
6923
6924         return r;
6925 }
6926
6927 /*
6928  * Translate a guest virtual address to a guest physical address.
6929  */
6930 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6931                                     struct kvm_translation *tr)
6932 {
6933         unsigned long vaddr = tr->linear_address;
6934         gpa_t gpa;
6935         int idx;
6936
6937         idx = srcu_read_lock(&vcpu->kvm->srcu);
6938         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6939         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6940         tr->physical_address = gpa;
6941         tr->valid = gpa != UNMAPPED_GVA;
6942         tr->writeable = 1;
6943         tr->usermode = 0;
6944
6945         return 0;
6946 }
6947
6948 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6949 {
6950         struct fxregs_state *fxsave =
6951                         &vcpu->arch.guest_fpu.state.fxsave;
6952
6953         memcpy(fpu->fpr, fxsave->st_space, 128);
6954         fpu->fcw = fxsave->cwd;
6955         fpu->fsw = fxsave->swd;
6956         fpu->ftwx = fxsave->twd;
6957         fpu->last_opcode = fxsave->fop;
6958         fpu->last_ip = fxsave->rip;
6959         fpu->last_dp = fxsave->rdp;
6960         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6961
6962         return 0;
6963 }
6964
6965 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6966 {
6967         struct fxregs_state *fxsave =
6968                         &vcpu->arch.guest_fpu.state.fxsave;
6969
6970         memcpy(fxsave->st_space, fpu->fpr, 128);
6971         fxsave->cwd = fpu->fcw;
6972         fxsave->swd = fpu->fsw;
6973         fxsave->twd = fpu->ftwx;
6974         fxsave->fop = fpu->last_opcode;
6975         fxsave->rip = fpu->last_ip;
6976         fxsave->rdp = fpu->last_dp;
6977         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6978
6979         return 0;
6980 }
6981
6982 static void fx_init(struct kvm_vcpu *vcpu)
6983 {
6984         fpstate_init(&vcpu->arch.guest_fpu.state);
6985         if (cpu_has_xsaves)
6986                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
6987                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
6988
6989         /*
6990          * Ensure guest xcr0 is valid for loading
6991          */
6992         vcpu->arch.xcr0 = XSTATE_FP;
6993
6994         vcpu->arch.cr0 |= X86_CR0_ET;
6995 }
6996
6997 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6998 {
6999         if (vcpu->guest_fpu_loaded)
7000                 return;
7001
7002         /*
7003          * Restore all possible states in the guest,
7004          * and assume host would use all available bits.
7005          * Guest xcr0 would be loaded later.
7006          */
7007         kvm_put_guest_xcr0(vcpu);
7008         vcpu->guest_fpu_loaded = 1;
7009         __kernel_fpu_begin();
7010         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7011         trace_kvm_fpu(1);
7012 }
7013
7014 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7015 {
7016         kvm_put_guest_xcr0(vcpu);
7017
7018         if (!vcpu->guest_fpu_loaded) {
7019                 vcpu->fpu_counter = 0;
7020                 return;
7021         }
7022
7023         vcpu->guest_fpu_loaded = 0;
7024         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7025         __kernel_fpu_end();
7026         ++vcpu->stat.fpu_reload;
7027         /*
7028          * If using eager FPU mode, or if the guest is a frequent user
7029          * of the FPU, just leave the FPU active for next time.
7030          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7031          * the FPU in bursts will revert to loading it on demand.
7032          */
7033         if (!vcpu->arch.eager_fpu) {
7034                 if (++vcpu->fpu_counter < 5)
7035                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7036         }
7037         trace_kvm_fpu(0);
7038 }
7039
7040 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7041 {
7042         kvmclock_reset(vcpu);
7043
7044         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7045         kvm_x86_ops->vcpu_free(vcpu);
7046 }
7047
7048 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7049                                                 unsigned int id)
7050 {
7051         struct kvm_vcpu *vcpu;
7052
7053         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7054                 printk_once(KERN_WARNING
7055                 "kvm: SMP vm created on host with unstable TSC; "
7056                 "guest TSC will not be reliable\n");
7057
7058         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7059
7060         return vcpu;
7061 }
7062
7063 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7064 {
7065         int r;
7066
7067         kvm_vcpu_mtrr_init(vcpu);
7068         r = vcpu_load(vcpu);
7069         if (r)
7070                 return r;
7071         kvm_vcpu_reset(vcpu, false);
7072         kvm_mmu_setup(vcpu);
7073         vcpu_put(vcpu);
7074         return r;
7075 }
7076
7077 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7078 {
7079         struct msr_data msr;
7080         struct kvm *kvm = vcpu->kvm;
7081
7082         if (vcpu_load(vcpu))
7083                 return;
7084         msr.data = 0x0;
7085         msr.index = MSR_IA32_TSC;
7086         msr.host_initiated = true;
7087         kvm_write_tsc(vcpu, &msr);
7088         vcpu_put(vcpu);
7089
7090         if (!kvmclock_periodic_sync)
7091                 return;
7092
7093         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7094                                         KVMCLOCK_SYNC_PERIOD);
7095 }
7096
7097 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7098 {
7099         int r;
7100         vcpu->arch.apf.msr_val = 0;
7101
7102         r = vcpu_load(vcpu);
7103         BUG_ON(r);
7104         kvm_mmu_unload(vcpu);
7105         vcpu_put(vcpu);
7106
7107         kvm_x86_ops->vcpu_free(vcpu);
7108 }
7109
7110 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7111 {
7112         vcpu->arch.hflags = 0;
7113
7114         atomic_set(&vcpu->arch.nmi_queued, 0);
7115         vcpu->arch.nmi_pending = 0;
7116         vcpu->arch.nmi_injected = false;
7117         kvm_clear_interrupt_queue(vcpu);
7118         kvm_clear_exception_queue(vcpu);
7119
7120         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7121         kvm_update_dr0123(vcpu);
7122         vcpu->arch.dr6 = DR6_INIT;
7123         kvm_update_dr6(vcpu);
7124         vcpu->arch.dr7 = DR7_FIXED_1;
7125         kvm_update_dr7(vcpu);
7126
7127         vcpu->arch.cr2 = 0;
7128
7129         kvm_make_request(KVM_REQ_EVENT, vcpu);
7130         vcpu->arch.apf.msr_val = 0;
7131         vcpu->arch.st.msr_val = 0;
7132
7133         kvmclock_reset(vcpu);
7134
7135         kvm_clear_async_pf_completion_queue(vcpu);
7136         kvm_async_pf_hash_reset(vcpu);
7137         vcpu->arch.apf.halted = false;
7138
7139         if (!init_event) {
7140                 kvm_pmu_reset(vcpu);
7141                 vcpu->arch.smbase = 0x30000;
7142         }
7143
7144         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7145         vcpu->arch.regs_avail = ~0;
7146         vcpu->arch.regs_dirty = ~0;
7147
7148         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7149 }
7150
7151 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7152 {
7153         struct kvm_segment cs;
7154
7155         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7156         cs.selector = vector << 8;
7157         cs.base = vector << 12;
7158         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7159         kvm_rip_write(vcpu, 0);
7160 }
7161
7162 int kvm_arch_hardware_enable(void)
7163 {
7164         struct kvm *kvm;
7165         struct kvm_vcpu *vcpu;
7166         int i;
7167         int ret;
7168         u64 local_tsc;
7169         u64 max_tsc = 0;
7170         bool stable, backwards_tsc = false;
7171
7172         kvm_shared_msr_cpu_online();
7173         ret = kvm_x86_ops->hardware_enable();
7174         if (ret != 0)
7175                 return ret;
7176
7177         local_tsc = native_read_tsc();
7178         stable = !check_tsc_unstable();
7179         list_for_each_entry(kvm, &vm_list, vm_list) {
7180                 kvm_for_each_vcpu(i, vcpu, kvm) {
7181                         if (!stable && vcpu->cpu == smp_processor_id())
7182                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7183                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7184                                 backwards_tsc = true;
7185                                 if (vcpu->arch.last_host_tsc > max_tsc)
7186                                         max_tsc = vcpu->arch.last_host_tsc;
7187                         }
7188                 }
7189         }
7190
7191         /*
7192          * Sometimes, even reliable TSCs go backwards.  This happens on
7193          * platforms that reset TSC during suspend or hibernate actions, but
7194          * maintain synchronization.  We must compensate.  Fortunately, we can
7195          * detect that condition here, which happens early in CPU bringup,
7196          * before any KVM threads can be running.  Unfortunately, we can't
7197          * bring the TSCs fully up to date with real time, as we aren't yet far
7198          * enough into CPU bringup that we know how much real time has actually
7199          * elapsed; our helper function, get_kernel_ns() will be using boot
7200          * variables that haven't been updated yet.
7201          *
7202          * So we simply find the maximum observed TSC above, then record the
7203          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7204          * the adjustment will be applied.  Note that we accumulate
7205          * adjustments, in case multiple suspend cycles happen before some VCPU
7206          * gets a chance to run again.  In the event that no KVM threads get a
7207          * chance to run, we will miss the entire elapsed period, as we'll have
7208          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7209          * loose cycle time.  This isn't too big a deal, since the loss will be
7210          * uniform across all VCPUs (not to mention the scenario is extremely
7211          * unlikely). It is possible that a second hibernate recovery happens
7212          * much faster than a first, causing the observed TSC here to be
7213          * smaller; this would require additional padding adjustment, which is
7214          * why we set last_host_tsc to the local tsc observed here.
7215          *
7216          * N.B. - this code below runs only on platforms with reliable TSC,
7217          * as that is the only way backwards_tsc is set above.  Also note
7218          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7219          * have the same delta_cyc adjustment applied if backwards_tsc
7220          * is detected.  Note further, this adjustment is only done once,
7221          * as we reset last_host_tsc on all VCPUs to stop this from being
7222          * called multiple times (one for each physical CPU bringup).
7223          *
7224          * Platforms with unreliable TSCs don't have to deal with this, they
7225          * will be compensated by the logic in vcpu_load, which sets the TSC to
7226          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7227          * guarantee that they stay in perfect synchronization.
7228          */
7229         if (backwards_tsc) {
7230                 u64 delta_cyc = max_tsc - local_tsc;
7231                 backwards_tsc_observed = true;
7232                 list_for_each_entry(kvm, &vm_list, vm_list) {
7233                         kvm_for_each_vcpu(i, vcpu, kvm) {
7234                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7235                                 vcpu->arch.last_host_tsc = local_tsc;
7236                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7237                         }
7238
7239                         /*
7240                          * We have to disable TSC offset matching.. if you were
7241                          * booting a VM while issuing an S4 host suspend....
7242                          * you may have some problem.  Solving this issue is
7243                          * left as an exercise to the reader.
7244                          */
7245                         kvm->arch.last_tsc_nsec = 0;
7246                         kvm->arch.last_tsc_write = 0;
7247                 }
7248
7249         }
7250         return 0;
7251 }
7252
7253 void kvm_arch_hardware_disable(void)
7254 {
7255         kvm_x86_ops->hardware_disable();
7256         drop_user_return_notifiers();
7257 }
7258
7259 int kvm_arch_hardware_setup(void)
7260 {
7261         int r;
7262
7263         r = kvm_x86_ops->hardware_setup();
7264         if (r != 0)
7265                 return r;
7266
7267         kvm_init_msr_list();
7268         return 0;
7269 }
7270
7271 void kvm_arch_hardware_unsetup(void)
7272 {
7273         kvm_x86_ops->hardware_unsetup();
7274 }
7275
7276 void kvm_arch_check_processor_compat(void *rtn)
7277 {
7278         kvm_x86_ops->check_processor_compatibility(rtn);
7279 }
7280
7281 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7282 {
7283         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
7284 }
7285
7286 struct static_key kvm_no_apic_vcpu __read_mostly;
7287
7288 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7289 {
7290         struct page *page;
7291         struct kvm *kvm;
7292         int r;
7293
7294         BUG_ON(vcpu->kvm == NULL);
7295         kvm = vcpu->kvm;
7296
7297         vcpu->arch.pv.pv_unhalted = false;
7298         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7299         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7300                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7301         else
7302                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7303
7304         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7305         if (!page) {
7306                 r = -ENOMEM;
7307                 goto fail;
7308         }
7309         vcpu->arch.pio_data = page_address(page);
7310
7311         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7312
7313         r = kvm_mmu_create(vcpu);
7314         if (r < 0)
7315                 goto fail_free_pio_data;
7316
7317         if (irqchip_in_kernel(kvm)) {
7318                 r = kvm_create_lapic(vcpu);
7319                 if (r < 0)
7320                         goto fail_mmu_destroy;
7321         } else
7322                 static_key_slow_inc(&kvm_no_apic_vcpu);
7323
7324         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7325                                        GFP_KERNEL);
7326         if (!vcpu->arch.mce_banks) {
7327                 r = -ENOMEM;
7328                 goto fail_free_lapic;
7329         }
7330         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7331
7332         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7333                 r = -ENOMEM;
7334                 goto fail_free_mce_banks;
7335         }
7336
7337         fx_init(vcpu);
7338
7339         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7340         vcpu->arch.pv_time_enabled = false;
7341
7342         vcpu->arch.guest_supported_xcr0 = 0;
7343         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7344
7345         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7346
7347         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7348
7349         kvm_async_pf_hash_reset(vcpu);
7350         kvm_pmu_init(vcpu);
7351
7352         return 0;
7353
7354 fail_free_mce_banks:
7355         kfree(vcpu->arch.mce_banks);
7356 fail_free_lapic:
7357         kvm_free_lapic(vcpu);
7358 fail_mmu_destroy:
7359         kvm_mmu_destroy(vcpu);
7360 fail_free_pio_data:
7361         free_page((unsigned long)vcpu->arch.pio_data);
7362 fail:
7363         return r;
7364 }
7365
7366 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7367 {
7368         int idx;
7369
7370         kvm_pmu_destroy(vcpu);
7371         kfree(vcpu->arch.mce_banks);
7372         kvm_free_lapic(vcpu);
7373         idx = srcu_read_lock(&vcpu->kvm->srcu);
7374         kvm_mmu_destroy(vcpu);
7375         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7376         free_page((unsigned long)vcpu->arch.pio_data);
7377         if (!irqchip_in_kernel(vcpu->kvm))
7378                 static_key_slow_dec(&kvm_no_apic_vcpu);
7379 }
7380
7381 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7382 {
7383         kvm_x86_ops->sched_in(vcpu, cpu);
7384 }
7385
7386 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7387 {
7388         if (type)
7389                 return -EINVAL;
7390
7391         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7392         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7393         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7394         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7395         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7396
7397         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7398         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7399         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7400         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7401                 &kvm->arch.irq_sources_bitmap);
7402
7403         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7404         mutex_init(&kvm->arch.apic_map_lock);
7405         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7406
7407         pvclock_update_vm_gtod_copy(kvm);
7408
7409         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7410         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7411
7412         return 0;
7413 }
7414
7415 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7416 {
7417         int r;
7418         r = vcpu_load(vcpu);
7419         BUG_ON(r);
7420         kvm_mmu_unload(vcpu);
7421         vcpu_put(vcpu);
7422 }
7423
7424 static void kvm_free_vcpus(struct kvm *kvm)
7425 {
7426         unsigned int i;
7427         struct kvm_vcpu *vcpu;
7428
7429         /*
7430          * Unpin any mmu pages first.
7431          */
7432         kvm_for_each_vcpu(i, vcpu, kvm) {
7433                 kvm_clear_async_pf_completion_queue(vcpu);
7434                 kvm_unload_vcpu_mmu(vcpu);
7435         }
7436         kvm_for_each_vcpu(i, vcpu, kvm)
7437                 kvm_arch_vcpu_free(vcpu);
7438
7439         mutex_lock(&kvm->lock);
7440         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7441                 kvm->vcpus[i] = NULL;
7442
7443         atomic_set(&kvm->online_vcpus, 0);
7444         mutex_unlock(&kvm->lock);
7445 }
7446
7447 void kvm_arch_sync_events(struct kvm *kvm)
7448 {
7449         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7450         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7451         kvm_free_all_assigned_devices(kvm);
7452         kvm_free_pit(kvm);
7453 }
7454
7455 int __x86_set_memory_region(struct kvm *kvm,
7456                             const struct kvm_userspace_memory_region *mem)
7457 {
7458         int i, r;
7459
7460         /* Called with kvm->slots_lock held.  */
7461         BUG_ON(mem->slot >= KVM_MEM_SLOTS_NUM);
7462
7463         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7464                 struct kvm_userspace_memory_region m = *mem;
7465
7466                 m.slot |= i << 16;
7467                 r = __kvm_set_memory_region(kvm, &m);
7468                 if (r < 0)
7469                         return r;
7470         }
7471
7472         return 0;
7473 }
7474 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7475
7476 int x86_set_memory_region(struct kvm *kvm,
7477                           const struct kvm_userspace_memory_region *mem)
7478 {
7479         int r;
7480
7481         mutex_lock(&kvm->slots_lock);
7482         r = __x86_set_memory_region(kvm, mem);
7483         mutex_unlock(&kvm->slots_lock);
7484
7485         return r;
7486 }
7487 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7488
7489 void kvm_arch_destroy_vm(struct kvm *kvm)
7490 {
7491         if (current->mm == kvm->mm) {
7492                 /*
7493                  * Free memory regions allocated on behalf of userspace,
7494                  * unless the the memory map has changed due to process exit
7495                  * or fd copying.
7496                  */
7497                 struct kvm_userspace_memory_region mem;
7498                 memset(&mem, 0, sizeof(mem));
7499                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7500                 x86_set_memory_region(kvm, &mem);
7501
7502                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7503                 x86_set_memory_region(kvm, &mem);
7504
7505                 mem.slot = TSS_PRIVATE_MEMSLOT;
7506                 x86_set_memory_region(kvm, &mem);
7507         }
7508         kvm_iommu_unmap_guest(kvm);
7509         kfree(kvm->arch.vpic);
7510         kfree(kvm->arch.vioapic);
7511         kvm_free_vcpus(kvm);
7512         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7513 }
7514
7515 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7516                            struct kvm_memory_slot *dont)
7517 {
7518         int i;
7519
7520         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7521                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7522                         kvfree(free->arch.rmap[i]);
7523                         free->arch.rmap[i] = NULL;
7524                 }
7525                 if (i == 0)
7526                         continue;
7527
7528                 if (!dont || free->arch.lpage_info[i - 1] !=
7529                              dont->arch.lpage_info[i - 1]) {
7530                         kvfree(free->arch.lpage_info[i - 1]);
7531                         free->arch.lpage_info[i - 1] = NULL;
7532                 }
7533         }
7534 }
7535
7536 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7537                             unsigned long npages)
7538 {
7539         int i;
7540
7541         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7542                 unsigned long ugfn;
7543                 int lpages;
7544                 int level = i + 1;
7545
7546                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7547                                       slot->base_gfn, level) + 1;
7548
7549                 slot->arch.rmap[i] =
7550                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7551                 if (!slot->arch.rmap[i])
7552                         goto out_free;
7553                 if (i == 0)
7554                         continue;
7555
7556                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7557                                         sizeof(*slot->arch.lpage_info[i - 1]));
7558                 if (!slot->arch.lpage_info[i - 1])
7559                         goto out_free;
7560
7561                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7562                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7563                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7564                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7565                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7566                 /*
7567                  * If the gfn and userspace address are not aligned wrt each
7568                  * other, or if explicitly asked to, disable large page
7569                  * support for this slot
7570                  */
7571                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7572                     !kvm_largepages_enabled()) {
7573                         unsigned long j;
7574
7575                         for (j = 0; j < lpages; ++j)
7576                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7577                 }
7578         }
7579
7580         return 0;
7581
7582 out_free:
7583         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7584                 kvfree(slot->arch.rmap[i]);
7585                 slot->arch.rmap[i] = NULL;
7586                 if (i == 0)
7587                         continue;
7588
7589                 kvfree(slot->arch.lpage_info[i - 1]);
7590                 slot->arch.lpage_info[i - 1] = NULL;
7591         }
7592         return -ENOMEM;
7593 }
7594
7595 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7596 {
7597         /*
7598          * memslots->generation has been incremented.
7599          * mmio generation may have reached its maximum value.
7600          */
7601         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7602 }
7603
7604 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7605                                 struct kvm_memory_slot *memslot,
7606                                 const struct kvm_userspace_memory_region *mem,
7607                                 enum kvm_mr_change change)
7608 {
7609         /*
7610          * Only private memory slots need to be mapped here since
7611          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7612          */
7613         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7614                 unsigned long userspace_addr;
7615
7616                 /*
7617                  * MAP_SHARED to prevent internal slot pages from being moved
7618                  * by fork()/COW.
7619                  */
7620                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7621                                          PROT_READ | PROT_WRITE,
7622                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7623
7624                 if (IS_ERR((void *)userspace_addr))
7625                         return PTR_ERR((void *)userspace_addr);
7626
7627                 memslot->userspace_addr = userspace_addr;
7628         }
7629
7630         return 0;
7631 }
7632
7633 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7634                                      struct kvm_memory_slot *new)
7635 {
7636         /* Still write protect RO slot */
7637         if (new->flags & KVM_MEM_READONLY) {
7638                 kvm_mmu_slot_remove_write_access(kvm, new);
7639                 return;
7640         }
7641
7642         /*
7643          * Call kvm_x86_ops dirty logging hooks when they are valid.
7644          *
7645          * kvm_x86_ops->slot_disable_log_dirty is called when:
7646          *
7647          *  - KVM_MR_CREATE with dirty logging is disabled
7648          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7649          *
7650          * The reason is, in case of PML, we need to set D-bit for any slots
7651          * with dirty logging disabled in order to eliminate unnecessary GPA
7652          * logging in PML buffer (and potential PML buffer full VMEXT). This
7653          * guarantees leaving PML enabled during guest's lifetime won't have
7654          * any additonal overhead from PML when guest is running with dirty
7655          * logging disabled for memory slots.
7656          *
7657          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7658          * to dirty logging mode.
7659          *
7660          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7661          *
7662          * In case of write protect:
7663          *
7664          * Write protect all pages for dirty logging.
7665          *
7666          * All the sptes including the large sptes which point to this
7667          * slot are set to readonly. We can not create any new large
7668          * spte on this slot until the end of the logging.
7669          *
7670          * See the comments in fast_page_fault().
7671          */
7672         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7673                 if (kvm_x86_ops->slot_enable_log_dirty)
7674                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7675                 else
7676                         kvm_mmu_slot_remove_write_access(kvm, new);
7677         } else {
7678                 if (kvm_x86_ops->slot_disable_log_dirty)
7679                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7680         }
7681 }
7682
7683 void kvm_arch_commit_memory_region(struct kvm *kvm,
7684                                 const struct kvm_userspace_memory_region *mem,
7685                                 const struct kvm_memory_slot *old,
7686                                 const struct kvm_memory_slot *new,
7687                                 enum kvm_mr_change change)
7688 {
7689         int nr_mmu_pages = 0;
7690
7691         if (change == KVM_MR_DELETE && old->id >= KVM_USER_MEM_SLOTS) {
7692                 int ret;
7693
7694                 ret = vm_munmap(old->userspace_addr,
7695                                 old->npages * PAGE_SIZE);
7696                 if (ret < 0)
7697                         printk(KERN_WARNING
7698                                "kvm_vm_ioctl_set_memory_region: "
7699                                "failed to munmap memory\n");
7700         }
7701
7702         if (!kvm->arch.n_requested_mmu_pages)
7703                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7704
7705         if (nr_mmu_pages)
7706                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7707
7708         /*
7709          * Dirty logging tracks sptes in 4k granularity, meaning that large
7710          * sptes have to be split.  If live migration is successful, the guest
7711          * in the source machine will be destroyed and large sptes will be
7712          * created in the destination. However, if the guest continues to run
7713          * in the source machine (for example if live migration fails), small
7714          * sptes will remain around and cause bad performance.
7715          *
7716          * Scan sptes if dirty logging has been stopped, dropping those
7717          * which can be collapsed into a single large-page spte.  Later
7718          * page faults will create the large-page sptes.
7719          */
7720         if ((change != KVM_MR_DELETE) &&
7721                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
7722                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
7723                 kvm_mmu_zap_collapsible_sptes(kvm, new);
7724
7725         /*
7726          * Set up write protection and/or dirty logging for the new slot.
7727          *
7728          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7729          * been zapped so no dirty logging staff is needed for old slot. For
7730          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7731          * new and it's also covered when dealing with the new slot.
7732          *
7733          * FIXME: const-ify all uses of struct kvm_memory_slot.
7734          */
7735         if (change != KVM_MR_DELETE)
7736                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
7737 }
7738
7739 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7740 {
7741         kvm_mmu_invalidate_zap_all_pages(kvm);
7742 }
7743
7744 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7745                                    struct kvm_memory_slot *slot)
7746 {
7747         kvm_mmu_invalidate_zap_all_pages(kvm);
7748 }
7749
7750 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7751 {
7752         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7753                 kvm_x86_ops->check_nested_events(vcpu, false);
7754
7755         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7756                 !vcpu->arch.apf.halted)
7757                 || !list_empty_careful(&vcpu->async_pf.done)
7758                 || kvm_apic_has_events(vcpu)
7759                 || vcpu->arch.pv.pv_unhalted
7760                 || atomic_read(&vcpu->arch.nmi_queued) ||
7761                 (kvm_arch_interrupt_allowed(vcpu) &&
7762                  kvm_cpu_has_interrupt(vcpu));
7763 }
7764
7765 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7766 {
7767         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7768 }
7769
7770 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7771 {
7772         return kvm_x86_ops->interrupt_allowed(vcpu);
7773 }
7774
7775 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
7776 {
7777         if (is_64_bit_mode(vcpu))
7778                 return kvm_rip_read(vcpu);
7779         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
7780                      kvm_rip_read(vcpu));
7781 }
7782 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
7783
7784 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7785 {
7786         return kvm_get_linear_rip(vcpu) == linear_rip;
7787 }
7788 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7789
7790 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7791 {
7792         unsigned long rflags;
7793
7794         rflags = kvm_x86_ops->get_rflags(vcpu);
7795         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7796                 rflags &= ~X86_EFLAGS_TF;
7797         return rflags;
7798 }
7799 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7800
7801 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7802 {
7803         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7804             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7805                 rflags |= X86_EFLAGS_TF;
7806         kvm_x86_ops->set_rflags(vcpu, rflags);
7807 }
7808
7809 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7810 {
7811         __kvm_set_rflags(vcpu, rflags);
7812         kvm_make_request(KVM_REQ_EVENT, vcpu);
7813 }
7814 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7815
7816 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7817 {
7818         int r;
7819
7820         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7821               work->wakeup_all)
7822                 return;
7823
7824         r = kvm_mmu_reload(vcpu);
7825         if (unlikely(r))
7826                 return;
7827
7828         if (!vcpu->arch.mmu.direct_map &&
7829               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7830                 return;
7831
7832         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7833 }
7834
7835 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7836 {
7837         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7838 }
7839
7840 static inline u32 kvm_async_pf_next_probe(u32 key)
7841 {
7842         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7843 }
7844
7845 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7846 {
7847         u32 key = kvm_async_pf_hash_fn(gfn);
7848
7849         while (vcpu->arch.apf.gfns[key] != ~0)
7850                 key = kvm_async_pf_next_probe(key);
7851
7852         vcpu->arch.apf.gfns[key] = gfn;
7853 }
7854
7855 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7856 {
7857         int i;
7858         u32 key = kvm_async_pf_hash_fn(gfn);
7859
7860         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7861                      (vcpu->arch.apf.gfns[key] != gfn &&
7862                       vcpu->arch.apf.gfns[key] != ~0); i++)
7863                 key = kvm_async_pf_next_probe(key);
7864
7865         return key;
7866 }
7867
7868 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7869 {
7870         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7871 }
7872
7873 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7874 {
7875         u32 i, j, k;
7876
7877         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7878         while (true) {
7879                 vcpu->arch.apf.gfns[i] = ~0;
7880                 do {
7881                         j = kvm_async_pf_next_probe(j);
7882                         if (vcpu->arch.apf.gfns[j] == ~0)
7883                                 return;
7884                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7885                         /*
7886                          * k lies cyclically in ]i,j]
7887                          * |    i.k.j |
7888                          * |....j i.k.| or  |.k..j i...|
7889                          */
7890                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7891                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7892                 i = j;
7893         }
7894 }
7895
7896 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7897 {
7898
7899         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7900                                       sizeof(val));
7901 }
7902
7903 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7904                                      struct kvm_async_pf *work)
7905 {
7906         struct x86_exception fault;
7907
7908         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7909         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7910
7911         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7912             (vcpu->arch.apf.send_user_only &&
7913              kvm_x86_ops->get_cpl(vcpu) == 0))
7914                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7915         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7916                 fault.vector = PF_VECTOR;
7917                 fault.error_code_valid = true;
7918                 fault.error_code = 0;
7919                 fault.nested_page_fault = false;
7920                 fault.address = work->arch.token;
7921                 kvm_inject_page_fault(vcpu, &fault);
7922         }
7923 }
7924
7925 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7926                                  struct kvm_async_pf *work)
7927 {
7928         struct x86_exception fault;
7929
7930         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7931         if (work->wakeup_all)
7932                 work->arch.token = ~0; /* broadcast wakeup */
7933         else
7934                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7935
7936         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7937             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7938                 fault.vector = PF_VECTOR;
7939                 fault.error_code_valid = true;
7940                 fault.error_code = 0;
7941                 fault.nested_page_fault = false;
7942                 fault.address = work->arch.token;
7943                 kvm_inject_page_fault(vcpu, &fault);
7944         }
7945         vcpu->arch.apf.halted = false;
7946         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7947 }
7948
7949 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7950 {
7951         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7952                 return true;
7953         else
7954                 return !kvm_event_needs_reinjection(vcpu) &&
7955                         kvm_x86_ops->interrupt_allowed(vcpu);
7956 }
7957
7958 void kvm_arch_start_assignment(struct kvm *kvm)
7959 {
7960         atomic_inc(&kvm->arch.assigned_device_count);
7961 }
7962 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
7963
7964 void kvm_arch_end_assignment(struct kvm *kvm)
7965 {
7966         atomic_dec(&kvm->arch.assigned_device_count);
7967 }
7968 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
7969
7970 bool kvm_arch_has_assigned_device(struct kvm *kvm)
7971 {
7972         return atomic_read(&kvm->arch.assigned_device_count);
7973 }
7974 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
7975
7976 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
7977 {
7978         atomic_inc(&kvm->arch.noncoherent_dma_count);
7979 }
7980 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
7981
7982 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
7983 {
7984         atomic_dec(&kvm->arch.noncoherent_dma_count);
7985 }
7986 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
7987
7988 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
7989 {
7990         return atomic_read(&kvm->arch.noncoherent_dma_count);
7991 }
7992 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
7993
7994 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7995 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7996 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7997 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7998 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7999 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8000 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8001 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8002 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8003 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8004 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8005 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8006 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8007 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8008 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);