arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90
  91 struct kvm_x86_ops *kvm_x86_ops;
  92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  93
  94 static bool ignore_msrs = 0;
  95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  96
  97 unsigned int min_timer_period_us = 500;
  98 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
  99
 100 bool kvm_has_tsc_control;
 101 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 102 u32  kvm_max_guest_tsc_khz;
 103 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 104
 105 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 106 static u32 tsc_tolerance_ppm = 250;
 107 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 108
 109 #define KVM_NR_SHARED_MSRS 16
 110
 111 struct kvm_shared_msrs_global {
 112         int nr;
 113         u32 msrs[KVM_NR_SHARED_MSRS];
 114 };
 115
 116 struct kvm_shared_msrs {
 117         struct user_return_notifier urn;
 118         bool registered;
 119         struct kvm_shared_msr_values {
 120                 u64 host;
 121                 u64 curr;
 122         } values[KVM_NR_SHARED_MSRS];
 123 };
 124
 125 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 126 static struct kvm_shared_msrs __percpu *shared_msrs;
 127
 128 struct kvm_stats_debugfs_item debugfs_entries[] = {
 129         { "pf_fixed", VCPU_STAT(pf_fixed) },
 130         { "pf_guest", VCPU_STAT(pf_guest) },
 131         { "tlb_flush", VCPU_STAT(tlb_flush) },
 132         { "invlpg", VCPU_STAT(invlpg) },
 133         { "exits", VCPU_STAT(exits) },
 134         { "io_exits", VCPU_STAT(io_exits) },
 135         { "mmio_exits", VCPU_STAT(mmio_exits) },
 136         { "signal_exits", VCPU_STAT(signal_exits) },
 137         { "irq_window", VCPU_STAT(irq_window_exits) },
 138         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 139         { "halt_exits", VCPU_STAT(halt_exits) },
 140         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 141         { "hypercalls", VCPU_STAT(hypercalls) },
 142         { "request_irq", VCPU_STAT(request_irq_exits) },
 143         { "irq_exits", VCPU_STAT(irq_exits) },
 144         { "host_state_reload", VCPU_STAT(host_state_reload) },
 145         { "efer_reload", VCPU_STAT(efer_reload) },
 146         { "fpu_reload", VCPU_STAT(fpu_reload) },
 147         { "insn_emulation", VCPU_STAT(insn_emulation) },
 148         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 149         { "irq_injections", VCPU_STAT(irq_injections) },
 150         { "nmi_injections", VCPU_STAT(nmi_injections) },
 151         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 152         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 153         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 154         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 155         { "mmu_flooded", VM_STAT(mmu_flooded) },
 156         { "mmu_recycled", VM_STAT(mmu_recycled) },
 157         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 158         { "mmu_unsync", VM_STAT(mmu_unsync) },
 159         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 160         { "largepages", VM_STAT(lpages) },
 161         { NULL }
 162 };
 163
 164 u64 __read_mostly host_xcr0;
 165
 166 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 167
 168 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 169 {
 170         int i;
 171         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 172                 vcpu->arch.apf.gfns[i] = ~0;
 173 }
 174
 175 static void kvm_on_user_return(struct user_return_notifier *urn)
 176 {
 177         unsigned slot;
 178         struct kvm_shared_msrs *locals
 179                 = container_of(urn, struct kvm_shared_msrs, urn);
 180         struct kvm_shared_msr_values *values;
 181
 182         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 183                 values = &locals->values[slot];
 184                 if (values->host != values->curr) {
 185                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 186                         values->curr = values->host;
 187                 }
 188         }
 189         locals->registered = false;
 190         user_return_notifier_unregister(urn);
 191 }
 192
 193 static void shared_msr_update(unsigned slot, u32 msr)
 194 {
 195         u64 value;
 196         unsigned int cpu = smp_processor_id();
 197         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 198
 199         /* only read, and nobody should modify it at this time,
 200          * so don't need lock */
 201         if (slot >= shared_msrs_global.nr) {
 202                 printk(KERN_ERR "kvm: invalid MSR slot!");
 203                 return;
 204         }
 205         rdmsrl_safe(msr, &value);
 206         smsr->values[slot].host = value;
 207         smsr->values[slot].curr = value;
 208 }
 209
 210 void kvm_define_shared_msr(unsigned slot, u32 msr)
 211 {
 212         if (slot >= shared_msrs_global.nr)
 213                 shared_msrs_global.nr = slot + 1;
 214         shared_msrs_global.msrs[slot] = msr;
 215         /* we need ensured the shared_msr_global have been updated */
 216         smp_wmb();
 217 }
 218 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 219
 220 static void kvm_shared_msr_cpu_online(void)
 221 {
 222         unsigned i;
 223
 224         for (i = 0; i < shared_msrs_global.nr; ++i)
 225                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 226 }
 227
 228 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 229 {
 230         unsigned int cpu = smp_processor_id();
 231         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 232
 233         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 234                 return;
 235         smsr->values[slot].curr = value;
 236         wrmsrl(shared_msrs_global.msrs[slot], value);
 237         if (!smsr->registered) {
 238                 smsr->urn.on_user_return = kvm_on_user_return;
 239                 user_return_notifier_register(&smsr->urn);
 240                 smsr->registered = true;
 241         }
 242 }
 243 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 244
 245 static void drop_user_return_notifiers(void *ignore)
 246 {
 247         unsigned int cpu = smp_processor_id();
 248         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 249
 250         if (smsr->registered)
 251                 kvm_on_user_return(&smsr->urn);
 252 }
 253
 254 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 255 {
 256         return vcpu->arch.apic_base;
 257 }
 258 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 259
 260 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 261 {
 262         /* TODO: reserve bits check */
 263         kvm_lapic_set_base(vcpu, data);
 264 }
 265 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 266
 267 asmlinkage void kvm_spurious_fault(void)
 268 {
 269         /* Fault while not rebooting.  We want the trace. */
 270         BUG();
 271 }
 272 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 273
 274 #define EXCPT_BENIGN            0
 275 #define EXCPT_CONTRIBUTORY      1
 276 #define EXCPT_PF                2
 277
 278 static int exception_class(int vector)
 279 {
 280         switch (vector) {
 281         case PF_VECTOR:
 282                 return EXCPT_PF;
 283         case DE_VECTOR:
 284         case TS_VECTOR:
 285         case NP_VECTOR:
 286         case SS_VECTOR:
 287         case GP_VECTOR:
 288                 return EXCPT_CONTRIBUTORY;
 289         default:
 290                 break;
 291         }
 292         return EXCPT_BENIGN;
 293 }
 294
 295 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 296                 unsigned nr, bool has_error, u32 error_code,
 297                 bool reinject)
 298 {
 299         u32 prev_nr;
 300         int class1, class2;
 301
 302         kvm_make_request(KVM_REQ_EVENT, vcpu);
 303
 304         if (!vcpu->arch.exception.pending) {
 305         queue:
 306                 vcpu->arch.exception.pending = true;
 307                 vcpu->arch.exception.has_error_code = has_error;
 308                 vcpu->arch.exception.nr = nr;
 309                 vcpu->arch.exception.error_code = error_code;
 310                 vcpu->arch.exception.reinject = reinject;
 311                 return;
 312         }
 313
 314         /* to check exception */
 315         prev_nr = vcpu->arch.exception.nr;
 316         if (prev_nr == DF_VECTOR) {
 317                 /* triple fault -> shutdown */
 318                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 319                 return;
 320         }
 321         class1 = exception_class(prev_nr);
 322         class2 = exception_class(nr);
 323         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 324                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 325                 /* generate double fault per SDM Table 5-5 */
 326                 vcpu->arch.exception.pending = true;
 327                 vcpu->arch.exception.has_error_code = true;
 328                 vcpu->arch.exception.nr = DF_VECTOR;
 329                 vcpu->arch.exception.error_code = 0;
 330         } else
 331                 /* replace previous exception with a new one in a hope
 332                    that instruction re-execution will regenerate lost
 333                    exception */
 334                 goto queue;
 335 }
 336
 337 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 338 {
 339         kvm_multiple_exception(vcpu, nr, false, 0, false);
 340 }
 341 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 342
 343 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 344 {
 345         kvm_multiple_exception(vcpu, nr, false, 0, true);
 346 }
 347 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 348
 349 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 350 {
 351         if (err)
 352                 kvm_inject_gp(vcpu, 0);
 353         else
 354                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 355 }
 356 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 357
 358 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 359 {
 360         ++vcpu->stat.pf_guest;
 361         vcpu->arch.cr2 = fault->address;
 362         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 363 }
 364 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 365
 366 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 367 {
 368         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 369                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 370         else
 371                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 372 }
 373
 374 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 375 {
 376         atomic_inc(&vcpu->arch.nmi_queued);
 377         kvm_make_request(KVM_REQ_NMI, vcpu);
 378 }
 379 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 380
 381 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 382 {
 383         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 384 }
 385 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 386
 387 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 388 {
 389         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 390 }
 391 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 392
 393 /*
 394  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 395  * a #GP and return false.
 396  */
 397 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 398 {
 399         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 400                 return true;
 401         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 402         return false;
 403 }
 404 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 405
 406 /*
 407  * This function will be used to read from the physical memory of the currently
 408  * running guest. The difference to kvm_read_guest_page is that this function
 409  * can read from guest physical or from the guest's guest physical memory.
 410  */
 411 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 412                             gfn_t ngfn, void *data, int offset, int len,
 413                             u32 access)
 414 {
 415         gfn_t real_gfn;
 416         gpa_t ngpa;
 417
 418         ngpa     = gfn_to_gpa(ngfn);
 419         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 420         if (real_gfn == UNMAPPED_GVA)
 421                 return -EFAULT;
 422
 423         real_gfn = gpa_to_gfn(real_gfn);
 424
 425         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 426 }
 427 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 428
 429 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 430                                void *data, int offset, int len, u32 access)
 431 {
 432         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 433                                        data, offset, len, access);
 434 }
 435
 436 /*
 437  * Load the pae pdptrs.  Return true is they are all valid.
 438  */
 439 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 440 {
 441         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 442         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 443         int i;
 444         int ret;
 445         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 446
 447         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 448                                       offset * sizeof(u64), sizeof(pdpte),
 449                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 450         if (ret < 0) {
 451                 ret = 0;
 452                 goto out;
 453         }
 454         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 455                 if (is_present_gpte(pdpte[i]) &&
 456                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 457                         ret = 0;
 458                         goto out;
 459                 }
 460         }
 461         ret = 1;
 462
 463         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 464         __set_bit(VCPU_EXREG_PDPTR,
 465                   (unsigned long *)&vcpu->arch.regs_avail);
 466         __set_bit(VCPU_EXREG_PDPTR,
 467                   (unsigned long *)&vcpu->arch.regs_dirty);
 468 out:
 469
 470         return ret;
 471 }
 472 EXPORT_SYMBOL_GPL(load_pdptrs);
 473
 474 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 475 {
 476         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 477         bool changed = true;
 478         int offset;
 479         gfn_t gfn;
 480         int r;
 481
 482         if (is_long_mode(vcpu) || !is_pae(vcpu))
 483                 return false;
 484
 485         if (!test_bit(VCPU_EXREG_PDPTR,
 486                       (unsigned long *)&vcpu->arch.regs_avail))
 487                 return true;
 488
 489         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 490         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 491         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 492                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 493         if (r < 0)
 494                 goto out;
 495         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 496 out:
 497
 498         return changed;
 499 }
 500
 501 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 502 {
 503         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 504         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 505                                     X86_CR0_CD | X86_CR0_NW;
 506
 507         cr0 |= X86_CR0_ET;
 508
 509 #ifdef CONFIG_X86_64
 510         if (cr0 & 0xffffffff00000000UL)
 511                 return 1;
 512 #endif
 513
 514         cr0 &= ~CR0_RESERVED_BITS;
 515
 516         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 517                 return 1;
 518
 519         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 520                 return 1;
 521
 522         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 523 #ifdef CONFIG_X86_64
 524                 if ((vcpu->arch.efer & EFER_LME)) {
 525                         int cs_db, cs_l;
 526
 527                         if (!is_pae(vcpu))
 528                                 return 1;
 529                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 530                         if (cs_l)
 531                                 return 1;
 532                 } else
 533 #endif
 534                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 535                                                  kvm_read_cr3(vcpu)))
 536                         return 1;
 537         }
 538
 539         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 540                 return 1;
 541
 542         kvm_x86_ops->set_cr0(vcpu, cr0);
 543
 544         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 545                 kvm_clear_async_pf_completion_queue(vcpu);
 546                 kvm_async_pf_hash_reset(vcpu);
 547         }
 548
 549         if ((cr0 ^ old_cr0) & update_bits)
 550                 kvm_mmu_reset_context(vcpu);
 551         return 0;
 552 }
 553 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 554
 555 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 556 {
 557         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 558 }
 559 EXPORT_SYMBOL_GPL(kvm_lmsw);
 560
 561 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 562 {
 563         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 564                         !vcpu->guest_xcr0_loaded) {
 565                 /* kvm_set_xcr() also depends on this */
 566                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 567                 vcpu->guest_xcr0_loaded = 1;
 568         }
 569 }
 570
 571 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 572 {
 573         if (vcpu->guest_xcr0_loaded) {
 574                 if (vcpu->arch.xcr0 != host_xcr0)
 575                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 576                 vcpu->guest_xcr0_loaded = 0;
 577         }
 578 }
 579
 580 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 581 {
 582         u64 xcr0;
 583
 584         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 585         if (index != XCR_XFEATURE_ENABLED_MASK)
 586                 return 1;
 587         xcr0 = xcr;
 588         if (!(xcr0 & XSTATE_FP))
 589                 return 1;
 590         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 591                 return 1;
 592         if (xcr0 & ~host_xcr0)
 593                 return 1;
 594         kvm_put_guest_xcr0(vcpu);
 595         vcpu->arch.xcr0 = xcr0;
 596         return 0;
 597 }
 598
 599 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 600 {
 601         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 602             __kvm_set_xcr(vcpu, index, xcr)) {
 603                 kvm_inject_gp(vcpu, 0);
 604                 return 1;
 605         }
 606         return 0;
 607 }
 608 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 609
 610 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 611 {
 612         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 613         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 614                                    X86_CR4_PAE | X86_CR4_SMEP;
 615         if (cr4 & CR4_RESERVED_BITS)
 616                 return 1;
 617
 618         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 619                 return 1;
 620
 621         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 622                 return 1;
 623
 624         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 625                 return 1;
 626
 627         if (is_long_mode(vcpu)) {
 628                 if (!(cr4 & X86_CR4_PAE))
 629                         return 1;
 630         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 631                    && ((cr4 ^ old_cr4) & pdptr_bits)
 632                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 633                                    kvm_read_cr3(vcpu)))
 634                 return 1;
 635
 636         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 637                 if (!guest_cpuid_has_pcid(vcpu))
 638                         return 1;
 639
 640                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 641                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 642                         return 1;
 643         }
 644
 645         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 646                 return 1;
 647
 648         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 649             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 650                 kvm_mmu_reset_context(vcpu);
 651
 652         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 653                 kvm_update_cpuid(vcpu);
 654
 655         return 0;
 656 }
 657 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 658
 659 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 660 {
 661         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 662                 kvm_mmu_sync_roots(vcpu);
 663                 kvm_mmu_flush_tlb(vcpu);
 664                 return 0;
 665         }
 666
 667         if (is_long_mode(vcpu)) {
 668                 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
 669                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
 670                                 return 1;
 671                 } else
 672                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
 673                                 return 1;
 674         } else {
 675                 if (is_pae(vcpu)) {
 676                         if (cr3 & CR3_PAE_RESERVED_BITS)
 677                                 return 1;
 678                         if (is_paging(vcpu) &&
 679                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 680                                 return 1;
 681                 }
 682                 /*
 683                  * We don't check reserved bits in nonpae mode, because
 684                  * this isn't enforced, and VMware depends on this.
 685                  */
 686         }
 687
 688         /*
 689          * Does the new cr3 value map to physical memory? (Note, we
 690          * catch an invalid cr3 even in real-mode, because it would
 691          * cause trouble later on when we turn on paging anyway.)
 692          *
 693          * A real CPU would silently accept an invalid cr3 and would
 694          * attempt to use it - with largely undefined (and often hard
 695          * to debug) behavior on the guest side.
 696          */
 697         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 698                 return 1;
 699         vcpu->arch.cr3 = cr3;
 700         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 701         vcpu->arch.mmu.new_cr3(vcpu);
 702         return 0;
 703 }
 704 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 705
 706 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 707 {
 708         if (cr8 & CR8_RESERVED_BITS)
 709                 return 1;
 710         if (irqchip_in_kernel(vcpu->kvm))
 711                 kvm_lapic_set_tpr(vcpu, cr8);
 712         else
 713                 vcpu->arch.cr8 = cr8;
 714         return 0;
 715 }
 716 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 717
 718 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 719 {
 720         if (irqchip_in_kernel(vcpu->kvm))
 721                 return kvm_lapic_get_cr8(vcpu);
 722         else
 723                 return vcpu->arch.cr8;
 724 }
 725 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 726
 727 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 728 {
 729         unsigned long dr7;
 730
 731         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 732                 dr7 = vcpu->arch.guest_debug_dr7;
 733         else
 734                 dr7 = vcpu->arch.dr7;
 735         kvm_x86_ops->set_dr7(vcpu, dr7);
 736         vcpu->arch.switch_db_regs = (dr7 & DR7_BP_EN_MASK);
 737 }
 738
 739 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 740 {
 741         switch (dr) {
 742         case 0 ... 3:
 743                 vcpu->arch.db[dr] = val;
 744                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 745                         vcpu->arch.eff_db[dr] = val;
 746                 break;
 747         case 4:
 748                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 749                         return 1; /* #UD */
 750                 /* fall through */
 751         case 6:
 752                 if (val & 0xffffffff00000000ULL)
 753                         return -1; /* #GP */
 754                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 755                 break;
 756         case 5:
 757                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 758                         return 1; /* #UD */
 759                 /* fall through */
 760         default: /* 7 */
 761                 if (val & 0xffffffff00000000ULL)
 762                         return -1; /* #GP */
 763                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 764                 kvm_update_dr7(vcpu);
 765                 break;
 766         }
 767
 768         return 0;
 769 }
 770
 771 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 772 {
 773         int res;
 774
 775         res = __kvm_set_dr(vcpu, dr, val);
 776         if (res > 0)
 777                 kvm_queue_exception(vcpu, UD_VECTOR);
 778         else if (res < 0)
 779                 kvm_inject_gp(vcpu, 0);
 780
 781         return res;
 782 }
 783 EXPORT_SYMBOL_GPL(kvm_set_dr);
 784
 785 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 786 {
 787         switch (dr) {
 788         case 0 ... 3:
 789                 *val = vcpu->arch.db[dr];
 790                 break;
 791         case 4:
 792                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 793                         return 1;
 794                 /* fall through */
 795         case 6:
 796                 *val = vcpu->arch.dr6;
 797                 break;
 798         case 5:
 799                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 800                         return 1;
 801                 /* fall through */
 802         default: /* 7 */
 803                 *val = vcpu->arch.dr7;
 804                 break;
 805         }
 806
 807         return 0;
 808 }
 809
 810 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 811 {
 812         if (_kvm_get_dr(vcpu, dr, val)) {
 813                 kvm_queue_exception(vcpu, UD_VECTOR);
 814                 return 1;
 815         }
 816         return 0;
 817 }
 818 EXPORT_SYMBOL_GPL(kvm_get_dr);
 819
 820 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 821 {
 822         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 823         u64 data;
 824         int err;
 825
 826         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 827         if (err)
 828                 return err;
 829         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 830         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 831         return err;
 832 }
 833 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 834
 835 /*
 836  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 837  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 838  *
 839  * This list is modified at module load time to reflect the
 840  * capabilities of the host cpu. This capabilities test skips MSRs that are
 841  * kvm-specific. Those are put in the beginning of the list.
 842  */
 843
 844 #define KVM_SAVE_MSRS_BEGIN     10
 845 static u32 msrs_to_save[] = {
 846         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 847         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 848         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 849         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 850         MSR_KVM_PV_EOI_EN,
 851         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 852         MSR_STAR,
 853 #ifdef CONFIG_X86_64
 854         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 855 #endif
 856         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 857 };
 858
 859 static unsigned num_msrs_to_save;
 860
 861 static const u32 emulated_msrs[] = {
 862         MSR_IA32_TSC_ADJUST,
 863         MSR_IA32_TSCDEADLINE,
 864         MSR_IA32_MISC_ENABLE,
 865         MSR_IA32_MCG_STATUS,
 866         MSR_IA32_MCG_CTL,
 867 };
 868
 869 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 870 {
 871         if (efer & efer_reserved_bits)
 872                 return false;
 873
 874         if (efer & EFER_FFXSR) {
 875                 struct kvm_cpuid_entry2 *feat;
 876
 877                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 878                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 879                         return false;
 880         }
 881
 882         if (efer & EFER_SVME) {
 883                 struct kvm_cpuid_entry2 *feat;
 884
 885                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 886                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 887                         return false;
 888         }
 889
 890         return true;
 891 }
 892 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 893
 894 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 895 {
 896         u64 old_efer = vcpu->arch.efer;
 897
 898         if (!kvm_valid_efer(vcpu, efer))
 899                 return 1;
 900
 901         if (is_paging(vcpu)
 902             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 903                 return 1;
 904
 905         efer &= ~EFER_LMA;
 906         efer |= vcpu->arch.efer & EFER_LMA;
 907
 908         kvm_x86_ops->set_efer(vcpu, efer);
 909
 910         /* Update reserved bits */
 911         if ((efer ^ old_efer) & EFER_NX)
 912                 kvm_mmu_reset_context(vcpu);
 913
 914         return 0;
 915 }
 916
 917 void kvm_enable_efer_bits(u64 mask)
 918 {
 919        efer_reserved_bits &= ~mask;
 920 }
 921 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 922
 923
 924 /*
 925  * Writes msr value into into the appropriate "register".
 926  * Returns 0 on success, non-0 otherwise.
 927  * Assumes vcpu_load() was already called.
 928  */
 929 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 930 {
 931         return kvm_x86_ops->set_msr(vcpu, msr);
 932 }
 933
 934 /*
 935  * Adapt set_msr() to msr_io()'s calling convention
 936  */
 937 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 938 {
 939         struct msr_data msr;
 940
 941         msr.data = *data;
 942         msr.index = index;
 943         msr.host_initiated = true;
 944         return kvm_set_msr(vcpu, &msr);
 945 }
 946
 947 #ifdef CONFIG_X86_64
 948 struct pvclock_gtod_data {
 949         seqcount_t      seq;
 950
 951         struct { /* extract of a clocksource struct */
 952                 int vclock_mode;
 953                 cycle_t cycle_last;
 954                 cycle_t mask;
 955                 u32     mult;
 956                 u32     shift;
 957         } clock;
 958
 959         /* open coded 'struct timespec' */
 960         u64             monotonic_time_snsec;
 961         time_t          monotonic_time_sec;
 962 };
 963
 964 static struct pvclock_gtod_data pvclock_gtod_data;
 965
 966 static void update_pvclock_gtod(struct timekeeper *tk)
 967 {
 968         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
 969
 970         write_seqcount_begin(&vdata->seq);
 971
 972         /* copy pvclock gtod data */
 973         vdata->clock.vclock_mode        = tk->clock->archdata.vclock_mode;
 974         vdata->clock.cycle_last         = tk->clock->cycle_last;
 975         vdata->clock.mask               = tk->clock->mask;
 976         vdata->clock.mult               = tk->mult;
 977         vdata->clock.shift              = tk->shift;
 978
 979         vdata->monotonic_time_sec       = tk->xtime_sec
 980                                         + tk->wall_to_monotonic.tv_sec;
 981         vdata->monotonic_time_snsec     = tk->xtime_nsec
 982                                         + (tk->wall_to_monotonic.tv_nsec
 983                                                 << tk->shift);
 984         while (vdata->monotonic_time_snsec >=
 985                                         (((u64)NSEC_PER_SEC) << tk->shift)) {
 986                 vdata->monotonic_time_snsec -=
 987                                         ((u64)NSEC_PER_SEC) << tk->shift;
 988                 vdata->monotonic_time_sec++;
 989         }
 990
 991         write_seqcount_end(&vdata->seq);
 992 }
 993 #endif
 994
 995
 996 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 997 {
 998         int version;
 999         int r;
1000         struct pvclock_wall_clock wc;
1001         struct timespec boot;
1002
1003         if (!wall_clock)
1004                 return;
1005
1006         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1007         if (r)
1008                 return;
1009
1010         if (version & 1)
1011                 ++version;  /* first time write, random junk */
1012
1013         ++version;
1014
1015         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1016
1017         /*
1018          * The guest calculates current wall clock time by adding
1019          * system time (updated by kvm_guest_time_update below) to the
1020          * wall clock specified here.  guest system time equals host
1021          * system time for us, thus we must fill in host boot time here.
1022          */
1023         getboottime(&boot);
1024
1025         if (kvm->arch.kvmclock_offset) {
1026                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1027                 boot = timespec_sub(boot, ts);
1028         }
1029         wc.sec = boot.tv_sec;
1030         wc.nsec = boot.tv_nsec;
1031         wc.version = version;
1032
1033         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1034
1035         version++;
1036         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1037 }
1038
1039 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1040 {
1041         uint32_t quotient, remainder;
1042
1043         /* Don't try to replace with do_div(), this one calculates
1044          * "(dividend << 32) / divisor" */
1045         __asm__ ( "divl %4"
1046                   : "=a" (quotient), "=d" (remainder)
1047                   : "0" (0), "1" (dividend), "r" (divisor) );
1048         return quotient;
1049 }
1050
1051 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1052                                s8 *pshift, u32 *pmultiplier)
1053 {
1054         uint64_t scaled64;
1055         int32_t  shift = 0;
1056         uint64_t tps64;
1057         uint32_t tps32;
1058
1059         tps64 = base_khz * 1000LL;
1060         scaled64 = scaled_khz * 1000LL;
1061         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1062                 tps64 >>= 1;
1063                 shift--;
1064         }
1065
1066         tps32 = (uint32_t)tps64;
1067         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1068                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1069                         scaled64 >>= 1;
1070                 else
1071                         tps32 <<= 1;
1072                 shift++;
1073         }
1074
1075         *pshift = shift;
1076         *pmultiplier = div_frac(scaled64, tps32);
1077
1078         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1079                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1080 }
1081
1082 static inline u64 get_kernel_ns(void)
1083 {
1084         struct timespec ts;
1085
1086         WARN_ON(preemptible());
1087         ktime_get_ts(&ts);
1088         monotonic_to_bootbased(&ts);
1089         return timespec_to_ns(&ts);
1090 }
1091
1092 #ifdef CONFIG_X86_64
1093 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1094 #endif
1095
1096 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1097 unsigned long max_tsc_khz;
1098
1099 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1100 {
1101         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1102                                    vcpu->arch.virtual_tsc_shift);
1103 }
1104
1105 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1106 {
1107         u64 v = (u64)khz * (1000000 + ppm);
1108         do_div(v, 1000000);
1109         return v;
1110 }
1111
1112 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1113 {
1114         u32 thresh_lo, thresh_hi;
1115         int use_scaling = 0;
1116
1117         /* tsc_khz can be zero if TSC calibration fails */
1118         if (this_tsc_khz == 0)
1119                 return;
1120
1121         /* Compute a scale to convert nanoseconds in TSC cycles */
1122         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1123                            &vcpu->arch.virtual_tsc_shift,
1124                            &vcpu->arch.virtual_tsc_mult);
1125         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1126
1127         /*
1128          * Compute the variation in TSC rate which is acceptable
1129          * within the range of tolerance and decide if the
1130          * rate being applied is within that bounds of the hardware
1131          * rate.  If so, no scaling or compensation need be done.
1132          */
1133         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1134         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1135         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1136                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1137                 use_scaling = 1;
1138         }
1139         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1140 }
1141
1142 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1143 {
1144         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1145                                       vcpu->arch.virtual_tsc_mult,
1146                                       vcpu->arch.virtual_tsc_shift);
1147         tsc += vcpu->arch.this_tsc_write;
1148         return tsc;
1149 }
1150
1151 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1152 {
1153 #ifdef CONFIG_X86_64
1154         bool vcpus_matched;
1155         bool do_request = false;
1156         struct kvm_arch *ka = &vcpu->kvm->arch;
1157         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1158
1159         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1160                          atomic_read(&vcpu->kvm->online_vcpus));
1161
1162         if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1163                 if (!ka->use_master_clock)
1164                         do_request = 1;
1165
1166         if (!vcpus_matched && ka->use_master_clock)
1167                         do_request = 1;
1168
1169         if (do_request)
1170                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1171
1172         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1173                             atomic_read(&vcpu->kvm->online_vcpus),
1174                             ka->use_master_clock, gtod->clock.vclock_mode);
1175 #endif
1176 }
1177
1178 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1179 {
1180         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1181         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1182 }
1183
1184 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1185 {
1186         struct kvm *kvm = vcpu->kvm;
1187         u64 offset, ns, elapsed;
1188         unsigned long flags;
1189         s64 usdiff;
1190         bool matched;
1191         u64 data = msr->data;
1192
1193         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1194         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1195         ns = get_kernel_ns();
1196         elapsed = ns - kvm->arch.last_tsc_nsec;
1197
1198         if (vcpu->arch.virtual_tsc_khz) {
1199                 /* n.b - signed multiplication and division required */
1200                 usdiff = data - kvm->arch.last_tsc_write;
1201 #ifdef CONFIG_X86_64
1202                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1203 #else
1204                 /* do_div() only does unsigned */
1205                 asm("idivl %2; xor %%edx, %%edx"
1206                 : "=A"(usdiff)
1207                 : "A"(usdiff * 1000), "rm"(vcpu->arch.virtual_tsc_khz));
1208 #endif
1209                 do_div(elapsed, 1000);
1210                 usdiff -= elapsed;
1211                 if (usdiff < 0)
1212                         usdiff = -usdiff;
1213         } else
1214                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1215
1216         /*
1217          * Special case: TSC write with a small delta (1 second) of virtual
1218          * cycle time against real time is interpreted as an attempt to
1219          * synchronize the CPU.
1220          *
1221          * For a reliable TSC, we can match TSC offsets, and for an unstable
1222          * TSC, we add elapsed time in this computation.  We could let the
1223          * compensation code attempt to catch up if we fall behind, but
1224          * it's better to try to match offsets from the beginning.
1225          */
1226         if (usdiff < USEC_PER_SEC &&
1227             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1228                 if (!check_tsc_unstable()) {
1229                         offset = kvm->arch.cur_tsc_offset;
1230                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1231                 } else {
1232                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1233                         data += delta;
1234                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1235                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1236                 }
1237                 matched = true;
1238         } else {
1239                 /*
1240                  * We split periods of matched TSC writes into generations.
1241                  * For each generation, we track the original measured
1242                  * nanosecond time, offset, and write, so if TSCs are in
1243                  * sync, we can match exact offset, and if not, we can match
1244                  * exact software computation in compute_guest_tsc()
1245                  *
1246                  * These values are tracked in kvm->arch.cur_xxx variables.
1247                  */
1248                 kvm->arch.cur_tsc_generation++;
1249                 kvm->arch.cur_tsc_nsec = ns;
1250                 kvm->arch.cur_tsc_write = data;
1251                 kvm->arch.cur_tsc_offset = offset;
1252                 matched = false;
1253                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1254                          kvm->arch.cur_tsc_generation, data);
1255         }
1256
1257         /*
1258          * We also track th most recent recorded KHZ, write and time to
1259          * allow the matching interval to be extended at each write.
1260          */
1261         kvm->arch.last_tsc_nsec = ns;
1262         kvm->arch.last_tsc_write = data;
1263         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1264
1265         /* Reset of TSC must disable overshoot protection below */
1266         vcpu->arch.hv_clock.tsc_timestamp = 0;
1267         vcpu->arch.last_guest_tsc = data;
1268
1269         /* Keep track of which generation this VCPU has synchronized to */
1270         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1271         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1272         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1273
1274         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1275                 update_ia32_tsc_adjust_msr(vcpu, offset);
1276         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1277         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1278
1279         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1280         if (matched)
1281                 kvm->arch.nr_vcpus_matched_tsc++;
1282         else
1283                 kvm->arch.nr_vcpus_matched_tsc = 0;
1284
1285         kvm_track_tsc_matching(vcpu);
1286         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1287 }
1288
1289 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1290
1291 #ifdef CONFIG_X86_64
1292
1293 static cycle_t read_tsc(void)
1294 {
1295         cycle_t ret;
1296         u64 last;
1297
1298         /*
1299          * Empirically, a fence (of type that depends on the CPU)
1300          * before rdtsc is enough to ensure that rdtsc is ordered
1301          * with respect to loads.  The various CPU manuals are unclear
1302          * as to whether rdtsc can be reordered with later loads,
1303          * but no one has ever seen it happen.
1304          */
1305         rdtsc_barrier();
1306         ret = (cycle_t)vget_cycles();
1307
1308         last = pvclock_gtod_data.clock.cycle_last;
1309
1310         if (likely(ret >= last))
1311                 return ret;
1312
1313         /*
1314          * GCC likes to generate cmov here, but this branch is extremely
1315          * predictable (it's just a funciton of time and the likely is
1316          * very likely) and there's a data dependence, so force GCC
1317          * to generate a branch instead.  I don't barrier() because
1318          * we don't actually need a barrier, and if this function
1319          * ever gets inlined it will generate worse code.
1320          */
1321         asm volatile ("");
1322         return last;
1323 }
1324
1325 static inline u64 vgettsc(cycle_t *cycle_now)
1326 {
1327         long v;
1328         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1329
1330         *cycle_now = read_tsc();
1331
1332         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1333         return v * gtod->clock.mult;
1334 }
1335
1336 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1337 {
1338         unsigned long seq;
1339         u64 ns;
1340         int mode;
1341         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1342
1343         ts->tv_nsec = 0;
1344         do {
1345                 seq = read_seqcount_begin(&gtod->seq);
1346                 mode = gtod->clock.vclock_mode;
1347                 ts->tv_sec = gtod->monotonic_time_sec;
1348                 ns = gtod->monotonic_time_snsec;
1349                 ns += vgettsc(cycle_now);
1350                 ns >>= gtod->clock.shift;
1351         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1352         timespec_add_ns(ts, ns);
1353
1354         return mode;
1355 }
1356
1357 /* returns true if host is using tsc clocksource */
1358 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1359 {
1360         struct timespec ts;
1361
1362         /* checked again under seqlock below */
1363         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1364                 return false;
1365
1366         if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1367                 return false;
1368
1369         monotonic_to_bootbased(&ts);
1370         *kernel_ns = timespec_to_ns(&ts);
1371
1372         return true;
1373 }
1374 #endif
1375
1376 /*
1377  *
1378  * Assuming a stable TSC across physical CPUS, and a stable TSC
1379  * across virtual CPUs, the following condition is possible.
1380  * Each numbered line represents an event visible to both
1381  * CPUs at the next numbered event.
1382  *
1383  * "timespecX" represents host monotonic time. "tscX" represents
1384  * RDTSC value.
1385  *
1386  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1387  *
1388  * 1.  read timespec0,tsc0
1389  * 2.                                   | timespec1 = timespec0 + N
1390  *                                      | tsc1 = tsc0 + M
1391  * 3. transition to guest               | transition to guest
1392  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1393  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1394  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1395  *
1396  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1397  *
1398  *      - ret0 < ret1
1399  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1400  *              ...
1401  *      - 0 < N - M => M < N
1402  *
1403  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1404  * always the case (the difference between two distinct xtime instances
1405  * might be smaller then the difference between corresponding TSC reads,
1406  * when updating guest vcpus pvclock areas).
1407  *
1408  * To avoid that problem, do not allow visibility of distinct
1409  * system_timestamp/tsc_timestamp values simultaneously: use a master
1410  * copy of host monotonic time values. Update that master copy
1411  * in lockstep.
1412  *
1413  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1414  *
1415  */
1416
1417 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1418 {
1419 #ifdef CONFIG_X86_64
1420         struct kvm_arch *ka = &kvm->arch;
1421         int vclock_mode;
1422         bool host_tsc_clocksource, vcpus_matched;
1423
1424         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1425                         atomic_read(&kvm->online_vcpus));
1426
1427         /*
1428          * If the host uses TSC clock, then passthrough TSC as stable
1429          * to the guest.
1430          */
1431         host_tsc_clocksource = kvm_get_time_and_clockread(
1432                                         &ka->master_kernel_ns,
1433                                         &ka->master_cycle_now);
1434
1435         ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
1436
1437         if (ka->use_master_clock)
1438                 atomic_set(&kvm_guest_has_master_clock, 1);
1439
1440         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1441         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1442                                         vcpus_matched);
1443 #endif
1444 }
1445
1446 static int kvm_guest_time_update(struct kvm_vcpu *v)
1447 {
1448         unsigned long flags, this_tsc_khz;
1449         struct kvm_vcpu_arch *vcpu = &v->arch;
1450         struct kvm_arch *ka = &v->kvm->arch;
1451         s64 kernel_ns, max_kernel_ns;
1452         u64 tsc_timestamp, host_tsc;
1453         struct pvclock_vcpu_time_info guest_hv_clock;
1454         u8 pvclock_flags;
1455         bool use_master_clock;
1456
1457         kernel_ns = 0;
1458         host_tsc = 0;
1459
1460         /*
1461          * If the host uses TSC clock, then passthrough TSC as stable
1462          * to the guest.
1463          */
1464         spin_lock(&ka->pvclock_gtod_sync_lock);
1465         use_master_clock = ka->use_master_clock;
1466         if (use_master_clock) {
1467                 host_tsc = ka->master_cycle_now;
1468                 kernel_ns = ka->master_kernel_ns;
1469         }
1470         spin_unlock(&ka->pvclock_gtod_sync_lock);
1471
1472         /* Keep irq disabled to prevent changes to the clock */
1473         local_irq_save(flags);
1474         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1475         if (unlikely(this_tsc_khz == 0)) {
1476                 local_irq_restore(flags);
1477                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1478                 return 1;
1479         }
1480         if (!use_master_clock) {
1481                 host_tsc = native_read_tsc();
1482                 kernel_ns = get_kernel_ns();
1483         }
1484
1485         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1486
1487         /*
1488          * We may have to catch up the TSC to match elapsed wall clock
1489          * time for two reasons, even if kvmclock is used.
1490          *   1) CPU could have been running below the maximum TSC rate
1491          *   2) Broken TSC compensation resets the base at each VCPU
1492          *      entry to avoid unknown leaps of TSC even when running
1493          *      again on the same CPU.  This may cause apparent elapsed
1494          *      time to disappear, and the guest to stand still or run
1495          *      very slowly.
1496          */
1497         if (vcpu->tsc_catchup) {
1498                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1499                 if (tsc > tsc_timestamp) {
1500                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1501                         tsc_timestamp = tsc;
1502                 }
1503         }
1504
1505         local_irq_restore(flags);
1506
1507         if (!vcpu->pv_time_enabled)
1508                 return 0;
1509
1510         /*
1511          * Time as measured by the TSC may go backwards when resetting the base
1512          * tsc_timestamp.  The reason for this is that the TSC resolution is
1513          * higher than the resolution of the other clock scales.  Thus, many
1514          * possible measurments of the TSC correspond to one measurement of any
1515          * other clock, and so a spread of values is possible.  This is not a
1516          * problem for the computation of the nanosecond clock; with TSC rates
1517          * around 1GHZ, there can only be a few cycles which correspond to one
1518          * nanosecond value, and any path through this code will inevitably
1519          * take longer than that.  However, with the kernel_ns value itself,
1520          * the precision may be much lower, down to HZ granularity.  If the
1521          * first sampling of TSC against kernel_ns ends in the low part of the
1522          * range, and the second in the high end of the range, we can get:
1523          *
1524          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1525          *
1526          * As the sampling errors potentially range in the thousands of cycles,
1527          * it is possible such a time value has already been observed by the
1528          * guest.  To protect against this, we must compute the system time as
1529          * observed by the guest and ensure the new system time is greater.
1530          */
1531         max_kernel_ns = 0;
1532         if (vcpu->hv_clock.tsc_timestamp) {
1533                 max_kernel_ns = vcpu->last_guest_tsc -
1534                                 vcpu->hv_clock.tsc_timestamp;
1535                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1536                                     vcpu->hv_clock.tsc_to_system_mul,
1537                                     vcpu->hv_clock.tsc_shift);
1538                 max_kernel_ns += vcpu->last_kernel_ns;
1539         }
1540
1541         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1542                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1543                                    &vcpu->hv_clock.tsc_shift,
1544                                    &vcpu->hv_clock.tsc_to_system_mul);
1545                 vcpu->hw_tsc_khz = this_tsc_khz;
1546         }
1547
1548         /* with a master <monotonic time, tsc value> tuple,
1549          * pvclock clock reads always increase at the (scaled) rate
1550          * of guest TSC - no need to deal with sampling errors.
1551          */
1552         if (!use_master_clock) {
1553                 if (max_kernel_ns > kernel_ns)
1554                         kernel_ns = max_kernel_ns;
1555         }
1556         /* With all the info we got, fill in the values */
1557         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1558         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1559         vcpu->last_kernel_ns = kernel_ns;
1560         vcpu->last_guest_tsc = tsc_timestamp;
1561
1562         /*
1563          * The interface expects us to write an even number signaling that the
1564          * update is finished. Since the guest won't see the intermediate
1565          * state, we just increase by 2 at the end.
1566          */
1567         vcpu->hv_clock.version += 2;
1568
1569         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1570                 &guest_hv_clock, sizeof(guest_hv_clock))))
1571                 return 0;
1572
1573         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1574         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1575
1576         if (vcpu->pvclock_set_guest_stopped_request) {
1577                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1578                 vcpu->pvclock_set_guest_stopped_request = false;
1579         }
1580
1581         /* If the host uses TSC clocksource, then it is stable */
1582         if (use_master_clock)
1583                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1584
1585         vcpu->hv_clock.flags = pvclock_flags;
1586
1587         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1588                                 &vcpu->hv_clock,
1589                                 sizeof(vcpu->hv_clock));
1590         return 0;
1591 }
1592
1593 static bool msr_mtrr_valid(unsigned msr)
1594 {
1595         switch (msr) {
1596         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1597         case MSR_MTRRfix64K_00000:
1598         case MSR_MTRRfix16K_80000:
1599         case MSR_MTRRfix16K_A0000:
1600         case MSR_MTRRfix4K_C0000:
1601         case MSR_MTRRfix4K_C8000:
1602         case MSR_MTRRfix4K_D0000:
1603         case MSR_MTRRfix4K_D8000:
1604         case MSR_MTRRfix4K_E0000:
1605         case MSR_MTRRfix4K_E8000:
1606         case MSR_MTRRfix4K_F0000:
1607         case MSR_MTRRfix4K_F8000:
1608         case MSR_MTRRdefType:
1609         case MSR_IA32_CR_PAT:
1610                 return true;
1611         case 0x2f8:
1612                 return true;
1613         }
1614         return false;
1615 }
1616
1617 static bool valid_pat_type(unsigned t)
1618 {
1619         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1620 }
1621
1622 static bool valid_mtrr_type(unsigned t)
1623 {
1624         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1625 }
1626
1627 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1628 {
1629         int i;
1630
1631         if (!msr_mtrr_valid(msr))
1632                 return false;
1633
1634         if (msr == MSR_IA32_CR_PAT) {
1635                 for (i = 0; i < 8; i++)
1636                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1637                                 return false;
1638                 return true;
1639         } else if (msr == MSR_MTRRdefType) {
1640                 if (data & ~0xcff)
1641                         return false;
1642                 return valid_mtrr_type(data & 0xff);
1643         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1644                 for (i = 0; i < 8 ; i++)
1645                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1646                                 return false;
1647                 return true;
1648         }
1649
1650         /* variable MTRRs */
1651         return valid_mtrr_type(data & 0xff);
1652 }
1653
1654 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1655 {
1656         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1657
1658         if (!mtrr_valid(vcpu, msr, data))
1659                 return 1;
1660
1661         if (msr == MSR_MTRRdefType) {
1662                 vcpu->arch.mtrr_state.def_type = data;
1663                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1664         } else if (msr == MSR_MTRRfix64K_00000)
1665                 p[0] = data;
1666         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1667                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1668         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1669                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1670         else if (msr == MSR_IA32_CR_PAT)
1671                 vcpu->arch.pat = data;
1672         else {  /* Variable MTRRs */
1673                 int idx, is_mtrr_mask;
1674                 u64 *pt;
1675
1676                 idx = (msr - 0x200) / 2;
1677                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1678                 if (!is_mtrr_mask)
1679                         pt =
1680                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1681                 else
1682                         pt =
1683                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1684                 *pt = data;
1685         }
1686
1687         kvm_mmu_reset_context(vcpu);
1688         return 0;
1689 }
1690
1691 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1692 {
1693         u64 mcg_cap = vcpu->arch.mcg_cap;
1694         unsigned bank_num = mcg_cap & 0xff;
1695
1696         switch (msr) {
1697         case MSR_IA32_MCG_STATUS:
1698                 vcpu->arch.mcg_status = data;
1699                 break;
1700         case MSR_IA32_MCG_CTL:
1701                 if (!(mcg_cap & MCG_CTL_P))
1702                         return 1;
1703                 if (data != 0 && data != ~(u64)0)
1704                         return -1;
1705                 vcpu->arch.mcg_ctl = data;
1706                 break;
1707         default:
1708                 if (msr >= MSR_IA32_MC0_CTL &&
1709                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1710                         u32 offset = msr - MSR_IA32_MC0_CTL;
1711                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1712                          * some Linux kernels though clear bit 10 in bank 4 to
1713                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1714                          * this to avoid an uncatched #GP in the guest
1715                          */
1716                         if ((offset & 0x3) == 0 &&
1717                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1718                                 return -1;
1719                         vcpu->arch.mce_banks[offset] = data;
1720                         break;
1721                 }
1722                 return 1;
1723         }
1724         return 0;
1725 }
1726
1727 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1728 {
1729         struct kvm *kvm = vcpu->kvm;
1730         int lm = is_long_mode(vcpu);
1731         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1732                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1733         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1734                 : kvm->arch.xen_hvm_config.blob_size_32;
1735         u32 page_num = data & ~PAGE_MASK;
1736         u64 page_addr = data & PAGE_MASK;
1737         u8 *page;
1738         int r;
1739
1740         r = -E2BIG;
1741         if (page_num >= blob_size)
1742                 goto out;
1743         r = -ENOMEM;
1744         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1745         if (IS_ERR(page)) {
1746                 r = PTR_ERR(page);
1747                 goto out;
1748         }
1749         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1750                 goto out_free;
1751         r = 0;
1752 out_free:
1753         kfree(page);
1754 out:
1755         return r;
1756 }
1757
1758 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1759 {
1760         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1761 }
1762
1763 static bool kvm_hv_msr_partition_wide(u32 msr)
1764 {
1765         bool r = false;
1766         switch (msr) {
1767         case HV_X64_MSR_GUEST_OS_ID:
1768         case HV_X64_MSR_HYPERCALL:
1769                 r = true;
1770                 break;
1771         }
1772
1773         return r;
1774 }
1775
1776 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1777 {
1778         struct kvm *kvm = vcpu->kvm;
1779
1780         switch (msr) {
1781         case HV_X64_MSR_GUEST_OS_ID:
1782                 kvm->arch.hv_guest_os_id = data;
1783                 /* setting guest os id to zero disables hypercall page */
1784                 if (!kvm->arch.hv_guest_os_id)
1785                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1786                 break;
1787         case HV_X64_MSR_HYPERCALL: {
1788                 u64 gfn;
1789                 unsigned long addr;
1790                 u8 instructions[4];
1791
1792                 /* if guest os id is not set hypercall should remain disabled */
1793                 if (!kvm->arch.hv_guest_os_id)
1794                         break;
1795                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1796                         kvm->arch.hv_hypercall = data;
1797                         break;
1798                 }
1799                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1800                 addr = gfn_to_hva(kvm, gfn);
1801                 if (kvm_is_error_hva(addr))
1802                         return 1;
1803                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1804                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1805                 if (__copy_to_user((void __user *)addr, instructions, 4))
1806                         return 1;
1807                 kvm->arch.hv_hypercall = data;
1808                 break;
1809         }
1810         default:
1811                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1812                             "data 0x%llx\n", msr, data);
1813                 return 1;
1814         }
1815         return 0;
1816 }
1817
1818 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1819 {
1820         switch (msr) {
1821         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1822                 unsigned long addr;
1823
1824                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1825                         vcpu->arch.hv_vapic = data;
1826                         break;
1827                 }
1828                 addr = gfn_to_hva(vcpu->kvm, data >>
1829                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1830                 if (kvm_is_error_hva(addr))
1831                         return 1;
1832                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1833                         return 1;
1834                 vcpu->arch.hv_vapic = data;
1835                 break;
1836         }
1837         case HV_X64_MSR_EOI:
1838                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1839         case HV_X64_MSR_ICR:
1840                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1841         case HV_X64_MSR_TPR:
1842                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1843         default:
1844                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1845                             "data 0x%llx\n", msr, data);
1846                 return 1;
1847         }
1848
1849         return 0;
1850 }
1851
1852 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1853 {
1854         gpa_t gpa = data & ~0x3f;
1855
1856         /* Bits 2:5 are reserved, Should be zero */
1857         if (data & 0x3c)
1858                 return 1;
1859
1860         vcpu->arch.apf.msr_val = data;
1861
1862         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1863                 kvm_clear_async_pf_completion_queue(vcpu);
1864                 kvm_async_pf_hash_reset(vcpu);
1865                 return 0;
1866         }
1867
1868         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1869                                         sizeof(u32)))
1870                 return 1;
1871
1872         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1873         kvm_async_pf_wakeup_all(vcpu);
1874         return 0;
1875 }
1876
1877 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1878 {
1879         vcpu->arch.pv_time_enabled = false;
1880 }
1881
1882 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1883 {
1884         u64 delta;
1885
1886         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1887                 return;
1888
1889         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1890         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1891         vcpu->arch.st.accum_steal = delta;
1892 }
1893
1894 static void record_steal_time(struct kvm_vcpu *vcpu)
1895 {
1896         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1897                 return;
1898
1899         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1900                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1901                 return;
1902
1903         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1904         vcpu->arch.st.steal.version += 2;
1905         vcpu->arch.st.accum_steal = 0;
1906
1907         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1908                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1909 }
1910
1911 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1912 {
1913         bool pr = false;
1914         u32 msr = msr_info->index;
1915         u64 data = msr_info->data;
1916
1917         switch (msr) {
1918         case MSR_AMD64_NB_CFG:
1919         case MSR_IA32_UCODE_REV:
1920         case MSR_IA32_UCODE_WRITE:
1921         case MSR_VM_HSAVE_PA:
1922         case MSR_AMD64_PATCH_LOADER:
1923         case MSR_AMD64_BU_CFG2:
1924                 break;
1925
1926         case MSR_EFER:
1927                 return set_efer(vcpu, data);
1928         case MSR_K7_HWCR:
1929                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1930                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1931                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1932                 if (data != 0) {
1933                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1934                                     data);
1935                         return 1;
1936                 }
1937                 break;
1938         case MSR_FAM10H_MMIO_CONF_BASE:
1939                 if (data != 0) {
1940                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1941                                     "0x%llx\n", data);
1942                         return 1;
1943                 }
1944                 break;
1945         case MSR_IA32_DEBUGCTLMSR:
1946                 if (!data) {
1947                         /* We support the non-activated case already */
1948                         break;
1949                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1950                         /* Values other than LBR and BTF are vendor-specific,
1951                            thus reserved and should throw a #GP */
1952                         return 1;
1953                 }
1954                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1955                             __func__, data);
1956                 break;
1957         case 0x200 ... 0x2ff:
1958                 return set_msr_mtrr(vcpu, msr, data);
1959         case MSR_IA32_APICBASE:
1960                 kvm_set_apic_base(vcpu, data);
1961                 break;
1962         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1963                 return kvm_x2apic_msr_write(vcpu, msr, data);
1964         case MSR_IA32_TSCDEADLINE:
1965                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1966                 break;
1967         case MSR_IA32_TSC_ADJUST:
1968                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
1969                         if (!msr_info->host_initiated) {
1970                                 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
1971                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
1972                         }
1973                         vcpu->arch.ia32_tsc_adjust_msr = data;
1974                 }
1975                 break;
1976         case MSR_IA32_MISC_ENABLE:
1977                 vcpu->arch.ia32_misc_enable_msr = data;
1978                 break;
1979         case MSR_KVM_WALL_CLOCK_NEW:
1980         case MSR_KVM_WALL_CLOCK:
1981                 vcpu->kvm->arch.wall_clock = data;
1982                 kvm_write_wall_clock(vcpu->kvm, data);
1983                 break;
1984         case MSR_KVM_SYSTEM_TIME_NEW:
1985         case MSR_KVM_SYSTEM_TIME: {
1986                 u64 gpa_offset;
1987                 kvmclock_reset(vcpu);
1988
1989                 vcpu->arch.time = data;
1990                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1991
1992                 /* we verify if the enable bit is set... */
1993                 if (!(data & 1))
1994                         break;
1995
1996                 gpa_offset = data & ~(PAGE_MASK | 1);
1997
1998                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
1999                      &vcpu->arch.pv_time, data & ~1ULL,
2000                      sizeof(struct pvclock_vcpu_time_info)))
2001                         vcpu->arch.pv_time_enabled = false;
2002                 else
2003                         vcpu->arch.pv_time_enabled = true;
2004
2005                 break;
2006         }
2007         case MSR_KVM_ASYNC_PF_EN:
2008                 if (kvm_pv_enable_async_pf(vcpu, data))
2009                         return 1;
2010                 break;
2011         case MSR_KVM_STEAL_TIME:
2012
2013                 if (unlikely(!sched_info_on()))
2014                         return 1;
2015
2016                 if (data & KVM_STEAL_RESERVED_MASK)
2017                         return 1;
2018
2019                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2020                                                 data & KVM_STEAL_VALID_BITS,
2021                                                 sizeof(struct kvm_steal_time)))
2022                         return 1;
2023
2024                 vcpu->arch.st.msr_val = data;
2025
2026                 if (!(data & KVM_MSR_ENABLED))
2027                         break;
2028
2029                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2030
2031                 preempt_disable();
2032                 accumulate_steal_time(vcpu);
2033                 preempt_enable();
2034
2035                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2036
2037                 break;
2038         case MSR_KVM_PV_EOI_EN:
2039                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2040                         return 1;
2041                 break;
2042
2043         case MSR_IA32_MCG_CTL:
2044         case MSR_IA32_MCG_STATUS:
2045         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2046                 return set_msr_mce(vcpu, msr, data);
2047
2048         /* Performance counters are not protected by a CPUID bit,
2049          * so we should check all of them in the generic path for the sake of
2050          * cross vendor migration.
2051          * Writing a zero into the event select MSRs disables them,
2052          * which we perfectly emulate ;-). Any other value should be at least
2053          * reported, some guests depend on them.
2054          */
2055         case MSR_K7_EVNTSEL0:
2056         case MSR_K7_EVNTSEL1:
2057         case MSR_K7_EVNTSEL2:
2058         case MSR_K7_EVNTSEL3:
2059                 if (data != 0)
2060                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2061                                     "0x%x data 0x%llx\n", msr, data);
2062                 break;
2063         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2064          * so we ignore writes to make it happy.
2065          */
2066         case MSR_K7_PERFCTR0:
2067         case MSR_K7_PERFCTR1:
2068         case MSR_K7_PERFCTR2:
2069         case MSR_K7_PERFCTR3:
2070                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2071                             "0x%x data 0x%llx\n", msr, data);
2072                 break;
2073         case MSR_P6_PERFCTR0:
2074         case MSR_P6_PERFCTR1:
2075                 pr = true;
2076         case MSR_P6_EVNTSEL0:
2077         case MSR_P6_EVNTSEL1:
2078                 if (kvm_pmu_msr(vcpu, msr))
2079                         return kvm_pmu_set_msr(vcpu, msr_info);
2080
2081                 if (pr || data != 0)
2082                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2083                                     "0x%x data 0x%llx\n", msr, data);
2084                 break;
2085         case MSR_K7_CLK_CTL:
2086                 /*
2087                  * Ignore all writes to this no longer documented MSR.
2088                  * Writes are only relevant for old K7 processors,
2089                  * all pre-dating SVM, but a recommended workaround from
2090                  * AMD for these chips. It is possible to specify the
2091                  * affected processor models on the command line, hence
2092                  * the need to ignore the workaround.
2093                  */
2094                 break;
2095         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2096                 if (kvm_hv_msr_partition_wide(msr)) {
2097                         int r;
2098                         mutex_lock(&vcpu->kvm->lock);
2099                         r = set_msr_hyperv_pw(vcpu, msr, data);
2100                         mutex_unlock(&vcpu->kvm->lock);
2101                         return r;
2102                 } else
2103                         return set_msr_hyperv(vcpu, msr, data);
2104                 break;
2105         case MSR_IA32_BBL_CR_CTL3:
2106                 /* Drop writes to this legacy MSR -- see rdmsr
2107                  * counterpart for further detail.
2108                  */
2109                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2110                 break;
2111         case MSR_AMD64_OSVW_ID_LENGTH:
2112                 if (!guest_cpuid_has_osvw(vcpu))
2113                         return 1;
2114                 vcpu->arch.osvw.length = data;
2115                 break;
2116         case MSR_AMD64_OSVW_STATUS:
2117                 if (!guest_cpuid_has_osvw(vcpu))
2118                         return 1;
2119                 vcpu->arch.osvw.status = data;
2120                 break;
2121         default:
2122                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2123                         return xen_hvm_config(vcpu, data);
2124                 if (kvm_pmu_msr(vcpu, msr))
2125                         return kvm_pmu_set_msr(vcpu, msr_info);
2126                 if (!ignore_msrs) {
2127                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2128                                     msr, data);
2129                         return 1;
2130                 } else {
2131                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2132                                     msr, data);
2133                         break;
2134                 }
2135         }
2136         return 0;
2137 }
2138 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2139
2140
2141 /*
2142  * Reads an msr value (of 'msr_index') into 'pdata'.
2143  * Returns 0 on success, non-0 otherwise.
2144  * Assumes vcpu_load() was already called.
2145  */
2146 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2147 {
2148         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2149 }
2150
2151 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2152 {
2153         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2154
2155         if (!msr_mtrr_valid(msr))
2156                 return 1;
2157
2158         if (msr == MSR_MTRRdefType)
2159                 *pdata = vcpu->arch.mtrr_state.def_type +
2160                          (vcpu->arch.mtrr_state.enabled << 10);
2161         else if (msr == MSR_MTRRfix64K_00000)
2162                 *pdata = p[0];
2163         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2164                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2165         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2166                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2167         else if (msr == MSR_IA32_CR_PAT)
2168                 *pdata = vcpu->arch.pat;
2169         else {  /* Variable MTRRs */
2170                 int idx, is_mtrr_mask;
2171                 u64 *pt;
2172
2173                 idx = (msr - 0x200) / 2;
2174                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2175                 if (!is_mtrr_mask)
2176                         pt =
2177                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2178                 else
2179                         pt =
2180                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2181                 *pdata = *pt;
2182         }
2183
2184         return 0;
2185 }
2186
2187 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2188 {
2189         u64 data;
2190         u64 mcg_cap = vcpu->arch.mcg_cap;
2191         unsigned bank_num = mcg_cap & 0xff;
2192
2193         switch (msr) {
2194         case MSR_IA32_P5_MC_ADDR:
2195         case MSR_IA32_P5_MC_TYPE:
2196                 data = 0;
2197                 break;
2198         case MSR_IA32_MCG_CAP:
2199                 data = vcpu->arch.mcg_cap;
2200                 break;
2201         case MSR_IA32_MCG_CTL:
2202                 if (!(mcg_cap & MCG_CTL_P))
2203                         return 1;
2204                 data = vcpu->arch.mcg_ctl;
2205                 break;
2206         case MSR_IA32_MCG_STATUS:
2207                 data = vcpu->arch.mcg_status;
2208                 break;
2209         default:
2210                 if (msr >= MSR_IA32_MC0_CTL &&
2211                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2212                         u32 offset = msr - MSR_IA32_MC0_CTL;
2213                         data = vcpu->arch.mce_banks[offset];
2214                         break;
2215                 }
2216                 return 1;
2217         }
2218         *pdata = data;
2219         return 0;
2220 }
2221
2222 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2223 {
2224         u64 data = 0;
2225         struct kvm *kvm = vcpu->kvm;
2226
2227         switch (msr) {
2228         case HV_X64_MSR_GUEST_OS_ID:
2229                 data = kvm->arch.hv_guest_os_id;
2230                 break;
2231         case HV_X64_MSR_HYPERCALL:
2232                 data = kvm->arch.hv_hypercall;
2233                 break;
2234         default:
2235                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2236                 return 1;
2237         }
2238
2239         *pdata = data;
2240         return 0;
2241 }
2242
2243 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2244 {
2245         u64 data = 0;
2246
2247         switch (msr) {
2248         case HV_X64_MSR_VP_INDEX: {
2249                 int r;
2250                 struct kvm_vcpu *v;
2251                 kvm_for_each_vcpu(r, v, vcpu->kvm)
2252                         if (v == vcpu)
2253                                 data = r;
2254                 break;
2255         }
2256         case HV_X64_MSR_EOI:
2257                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2258         case HV_X64_MSR_ICR:
2259                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2260         case HV_X64_MSR_TPR:
2261                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2262         case HV_X64_MSR_APIC_ASSIST_PAGE:
2263                 data = vcpu->arch.hv_vapic;
2264                 break;
2265         default:
2266                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2267                 return 1;
2268         }
2269         *pdata = data;
2270         return 0;
2271 }
2272
2273 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2274 {
2275         u64 data;
2276
2277         switch (msr) {
2278         case MSR_IA32_PLATFORM_ID:
2279         case MSR_IA32_EBL_CR_POWERON:
2280         case MSR_IA32_DEBUGCTLMSR:
2281         case MSR_IA32_LASTBRANCHFROMIP:
2282         case MSR_IA32_LASTBRANCHTOIP:
2283         case MSR_IA32_LASTINTFROMIP:
2284         case MSR_IA32_LASTINTTOIP:
2285         case MSR_K8_SYSCFG:
2286         case MSR_K7_HWCR:
2287         case MSR_VM_HSAVE_PA:
2288         case MSR_K7_EVNTSEL0:
2289         case MSR_K7_PERFCTR0:
2290         case MSR_K8_INT_PENDING_MSG:
2291         case MSR_AMD64_NB_CFG:
2292         case MSR_FAM10H_MMIO_CONF_BASE:
2293         case MSR_AMD64_BU_CFG2:
2294                 data = 0;
2295                 break;
2296         case MSR_P6_PERFCTR0:
2297         case MSR_P6_PERFCTR1:
2298         case MSR_P6_EVNTSEL0:
2299         case MSR_P6_EVNTSEL1:
2300                 if (kvm_pmu_msr(vcpu, msr))
2301                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2302                 data = 0;
2303                 break;
2304         case MSR_IA32_UCODE_REV:
2305                 data = 0x100000000ULL;
2306                 break;
2307         case MSR_MTRRcap:
2308                 data = 0x500 | KVM_NR_VAR_MTRR;
2309                 break;
2310         case 0x200 ... 0x2ff:
2311                 return get_msr_mtrr(vcpu, msr, pdata);
2312         case 0xcd: /* fsb frequency */
2313                 data = 3;
2314                 break;
2315                 /*
2316                  * MSR_EBC_FREQUENCY_ID
2317                  * Conservative value valid for even the basic CPU models.
2318                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2319                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2320                  * and 266MHz for model 3, or 4. Set Core Clock
2321                  * Frequency to System Bus Frequency Ratio to 1 (bits
2322                  * 31:24) even though these are only valid for CPU
2323                  * models > 2, however guests may end up dividing or
2324                  * multiplying by zero otherwise.
2325                  */
2326         case MSR_EBC_FREQUENCY_ID:
2327                 data = 1 << 24;
2328                 break;
2329         case MSR_IA32_APICBASE:
2330                 data = kvm_get_apic_base(vcpu);
2331                 break;
2332         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2333                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2334                 break;
2335         case MSR_IA32_TSCDEADLINE:
2336                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2337                 break;
2338         case MSR_IA32_TSC_ADJUST:
2339                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2340                 break;
2341         case MSR_IA32_MISC_ENABLE:
2342                 data = vcpu->arch.ia32_misc_enable_msr;
2343                 break;
2344         case MSR_IA32_PERF_STATUS:
2345                 /* TSC increment by tick */
2346                 data = 1000ULL;
2347                 /* CPU multiplier */
2348                 data |= (((uint64_t)4ULL) << 40);
2349                 break;
2350         case MSR_EFER:
2351                 data = vcpu->arch.efer;
2352                 break;
2353         case MSR_KVM_WALL_CLOCK:
2354         case MSR_KVM_WALL_CLOCK_NEW:
2355                 data = vcpu->kvm->arch.wall_clock;
2356                 break;
2357         case MSR_KVM_SYSTEM_TIME:
2358         case MSR_KVM_SYSTEM_TIME_NEW:
2359                 data = vcpu->arch.time;
2360                 break;
2361         case MSR_KVM_ASYNC_PF_EN:
2362                 data = vcpu->arch.apf.msr_val;
2363                 break;
2364         case MSR_KVM_STEAL_TIME:
2365                 data = vcpu->arch.st.msr_val;
2366                 break;
2367         case MSR_KVM_PV_EOI_EN:
2368                 data = vcpu->arch.pv_eoi.msr_val;
2369                 break;
2370         case MSR_IA32_P5_MC_ADDR:
2371         case MSR_IA32_P5_MC_TYPE:
2372         case MSR_IA32_MCG_CAP:
2373         case MSR_IA32_MCG_CTL:
2374         case MSR_IA32_MCG_STATUS:
2375         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2376                 return get_msr_mce(vcpu, msr, pdata);
2377         case MSR_K7_CLK_CTL:
2378                 /*
2379                  * Provide expected ramp-up count for K7. All other
2380                  * are set to zero, indicating minimum divisors for
2381                  * every field.
2382                  *
2383                  * This prevents guest kernels on AMD host with CPU
2384                  * type 6, model 8 and higher from exploding due to
2385                  * the rdmsr failing.
2386                  */
2387                 data = 0x20000000;
2388                 break;
2389         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2390                 if (kvm_hv_msr_partition_wide(msr)) {
2391                         int r;
2392                         mutex_lock(&vcpu->kvm->lock);
2393                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2394                         mutex_unlock(&vcpu->kvm->lock);
2395                         return r;
2396                 } else
2397                         return get_msr_hyperv(vcpu, msr, pdata);
2398                 break;
2399         case MSR_IA32_BBL_CR_CTL3:
2400                 /* This legacy MSR exists but isn't fully documented in current
2401                  * silicon.  It is however accessed by winxp in very narrow
2402                  * scenarios where it sets bit #19, itself documented as
2403                  * a "reserved" bit.  Best effort attempt to source coherent
2404                  * read data here should the balance of the register be
2405                  * interpreted by the guest:
2406                  *
2407                  * L2 cache control register 3: 64GB range, 256KB size,
2408                  * enabled, latency 0x1, configured
2409                  */
2410                 data = 0xbe702111;
2411                 break;
2412         case MSR_AMD64_OSVW_ID_LENGTH:
2413                 if (!guest_cpuid_has_osvw(vcpu))
2414                         return 1;
2415                 data = vcpu->arch.osvw.length;
2416                 break;
2417         case MSR_AMD64_OSVW_STATUS:
2418                 if (!guest_cpuid_has_osvw(vcpu))
2419                         return 1;
2420                 data = vcpu->arch.osvw.status;
2421                 break;
2422         default:
2423                 if (kvm_pmu_msr(vcpu, msr))
2424                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2425                 if (!ignore_msrs) {
2426                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2427                         return 1;
2428                 } else {
2429                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2430                         data = 0;
2431                 }
2432                 break;
2433         }
2434         *pdata = data;
2435         return 0;
2436 }
2437 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2438
2439 /*
2440  * Read or write a bunch of msrs. All parameters are kernel addresses.
2441  *
2442  * @return number of msrs set successfully.
2443  */
2444 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2445                     struct kvm_msr_entry *entries,
2446                     int (*do_msr)(struct kvm_vcpu *vcpu,
2447                                   unsigned index, u64 *data))
2448 {
2449         int i, idx;
2450
2451         idx = srcu_read_lock(&vcpu->kvm->srcu);
2452         for (i = 0; i < msrs->nmsrs; ++i)
2453                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2454                         break;
2455         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2456
2457         return i;
2458 }
2459
2460 /*
2461  * Read or write a bunch of msrs. Parameters are user addresses.
2462  *
2463  * @return number of msrs set successfully.
2464  */
2465 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2466                   int (*do_msr)(struct kvm_vcpu *vcpu,
2467                                 unsigned index, u64 *data),
2468                   int writeback)
2469 {
2470         struct kvm_msrs msrs;
2471         struct kvm_msr_entry *entries;
2472         int r, n;
2473         unsigned size;
2474
2475         r = -EFAULT;
2476         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2477                 goto out;
2478
2479         r = -E2BIG;
2480         if (msrs.nmsrs >= MAX_IO_MSRS)
2481                 goto out;
2482
2483         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2484         entries = memdup_user(user_msrs->entries, size);
2485         if (IS_ERR(entries)) {
2486                 r = PTR_ERR(entries);
2487                 goto out;
2488         }
2489
2490         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2491         if (r < 0)
2492                 goto out_free;
2493
2494         r = -EFAULT;
2495         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2496                 goto out_free;
2497
2498         r = n;
2499
2500 out_free:
2501         kfree(entries);
2502 out:
2503         return r;
2504 }
2505
2506 int kvm_dev_ioctl_check_extension(long ext)
2507 {
2508         int r;
2509
2510         switch (ext) {
2511         case KVM_CAP_IRQCHIP:
2512         case KVM_CAP_HLT:
2513         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2514         case KVM_CAP_SET_TSS_ADDR:
2515         case KVM_CAP_EXT_CPUID:
2516         case KVM_CAP_CLOCKSOURCE:
2517         case KVM_CAP_PIT:
2518         case KVM_CAP_NOP_IO_DELAY:
2519         case KVM_CAP_MP_STATE:
2520         case KVM_CAP_SYNC_MMU:
2521         case KVM_CAP_USER_NMI:
2522         case KVM_CAP_REINJECT_CONTROL:
2523         case KVM_CAP_IRQ_INJECT_STATUS:
2524         case KVM_CAP_IRQFD:
2525         case KVM_CAP_IOEVENTFD:
2526         case KVM_CAP_PIT2:
2527         case KVM_CAP_PIT_STATE2:
2528         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2529         case KVM_CAP_XEN_HVM:
2530         case KVM_CAP_ADJUST_CLOCK:
2531         case KVM_CAP_VCPU_EVENTS:
2532         case KVM_CAP_HYPERV:
2533         case KVM_CAP_HYPERV_VAPIC:
2534         case KVM_CAP_HYPERV_SPIN:
2535         case KVM_CAP_PCI_SEGMENT:
2536         case KVM_CAP_DEBUGREGS:
2537         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2538         case KVM_CAP_XSAVE:
2539         case KVM_CAP_ASYNC_PF:
2540         case KVM_CAP_GET_TSC_KHZ:
2541         case KVM_CAP_KVMCLOCK_CTRL:
2542         case KVM_CAP_READONLY_MEM:
2543 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2544         case KVM_CAP_ASSIGN_DEV_IRQ:
2545         case KVM_CAP_PCI_2_3:
2546 #endif
2547                 r = 1;
2548                 break;
2549         case KVM_CAP_COALESCED_MMIO:
2550                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2551                 break;
2552         case KVM_CAP_VAPIC:
2553                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2554                 break;
2555         case KVM_CAP_NR_VCPUS:
2556                 r = KVM_SOFT_MAX_VCPUS;
2557                 break;
2558         case KVM_CAP_MAX_VCPUS:
2559                 r = KVM_MAX_VCPUS;
2560                 break;
2561         case KVM_CAP_NR_MEMSLOTS:
2562                 r = KVM_USER_MEM_SLOTS;
2563                 break;
2564         case KVM_CAP_PV_MMU:    /* obsolete */
2565                 r = 0;
2566                 break;
2567 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2568         case KVM_CAP_IOMMU:
2569                 r = iommu_present(&pci_bus_type);
2570                 break;
2571 #endif
2572         case KVM_CAP_MCE:
2573                 r = KVM_MAX_MCE_BANKS;
2574                 break;
2575         case KVM_CAP_XCRS:
2576                 r = cpu_has_xsave;
2577                 break;
2578         case KVM_CAP_TSC_CONTROL:
2579                 r = kvm_has_tsc_control;
2580                 break;
2581         case KVM_CAP_TSC_DEADLINE_TIMER:
2582                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2583                 break;
2584         default:
2585                 r = 0;
2586                 break;
2587         }
2588         return r;
2589
2590 }
2591
2592 long kvm_arch_dev_ioctl(struct file *filp,
2593                         unsigned int ioctl, unsigned long arg)
2594 {
2595         void __user *argp = (void __user *)arg;
2596         long r;
2597
2598         switch (ioctl) {
2599         case KVM_GET_MSR_INDEX_LIST: {
2600                 struct kvm_msr_list __user *user_msr_list = argp;
2601                 struct kvm_msr_list msr_list;
2602                 unsigned n;
2603
2604                 r = -EFAULT;
2605                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2606                         goto out;
2607                 n = msr_list.nmsrs;
2608                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2609                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2610                         goto out;
2611                 r = -E2BIG;
2612                 if (n < msr_list.nmsrs)
2613                         goto out;
2614                 r = -EFAULT;
2615                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2616                                  num_msrs_to_save * sizeof(u32)))
2617                         goto out;
2618                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2619                                  &emulated_msrs,
2620                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2621                         goto out;
2622                 r = 0;
2623                 break;
2624         }
2625         case KVM_GET_SUPPORTED_CPUID: {
2626                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2627                 struct kvm_cpuid2 cpuid;
2628
2629                 r = -EFAULT;
2630                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2631                         goto out;
2632                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2633                                                       cpuid_arg->entries);
2634                 if (r)
2635                         goto out;
2636
2637                 r = -EFAULT;
2638                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2639                         goto out;
2640                 r = 0;
2641                 break;
2642         }
2643         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2644                 u64 mce_cap;
2645
2646                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2647                 r = -EFAULT;
2648                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2649                         goto out;
2650                 r = 0;
2651                 break;
2652         }
2653         default:
2654                 r = -EINVAL;
2655         }
2656 out:
2657         return r;
2658 }
2659
2660 static void wbinvd_ipi(void *garbage)
2661 {
2662         wbinvd();
2663 }
2664
2665 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2666 {
2667         return vcpu->kvm->arch.iommu_domain &&
2668                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2669 }
2670
2671 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2672 {
2673         /* Address WBINVD may be executed by guest */
2674         if (need_emulate_wbinvd(vcpu)) {
2675                 if (kvm_x86_ops->has_wbinvd_exit())
2676                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2677                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2678                         smp_call_function_single(vcpu->cpu,
2679                                         wbinvd_ipi, NULL, 1);
2680         }
2681
2682         kvm_x86_ops->vcpu_load(vcpu, cpu);
2683
2684         /* Apply any externally detected TSC adjustments (due to suspend) */
2685         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2686                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2687                 vcpu->arch.tsc_offset_adjustment = 0;
2688                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2689         }
2690
2691         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2692                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2693                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2694                 if (tsc_delta < 0)
2695                         mark_tsc_unstable("KVM discovered backwards TSC");
2696                 if (check_tsc_unstable()) {
2697                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2698                                                 vcpu->arch.last_guest_tsc);
2699                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2700                         vcpu->arch.tsc_catchup = 1;
2701                 }
2702                 /*
2703                  * On a host with synchronized TSC, there is no need to update
2704                  * kvmclock on vcpu->cpu migration
2705                  */
2706                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2707                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2708                 if (vcpu->cpu != cpu)
2709                         kvm_migrate_timers(vcpu);
2710                 vcpu->cpu = cpu;
2711         }
2712
2713         accumulate_steal_time(vcpu);
2714         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2715 }
2716
2717 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2718 {
2719         kvm_x86_ops->vcpu_put(vcpu);
2720         kvm_put_guest_fpu(vcpu);
2721         vcpu->arch.last_host_tsc = native_read_tsc();
2722 }
2723
2724 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2725                                     struct kvm_lapic_state *s)
2726 {
2727         kvm_x86_ops->sync_pir_to_irr(vcpu);
2728         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2729
2730         return 0;
2731 }
2732
2733 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2734                                     struct kvm_lapic_state *s)
2735 {
2736         kvm_apic_post_state_restore(vcpu, s);
2737         update_cr8_intercept(vcpu);
2738
2739         return 0;
2740 }
2741
2742 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2743                                     struct kvm_interrupt *irq)
2744 {
2745         if (irq->irq >= KVM_NR_INTERRUPTS)
2746                 return -EINVAL;
2747         if (irqchip_in_kernel(vcpu->kvm))
2748                 return -ENXIO;
2749
2750         kvm_queue_interrupt(vcpu, irq->irq, false);
2751         kvm_make_request(KVM_REQ_EVENT, vcpu);
2752
2753         return 0;
2754 }
2755
2756 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2757 {
2758         kvm_inject_nmi(vcpu);
2759
2760         return 0;
2761 }
2762
2763 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2764                                            struct kvm_tpr_access_ctl *tac)
2765 {
2766         if (tac->flags)
2767                 return -EINVAL;
2768         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2769         return 0;
2770 }
2771
2772 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2773                                         u64 mcg_cap)
2774 {
2775         int r;
2776         unsigned bank_num = mcg_cap & 0xff, bank;
2777
2778         r = -EINVAL;
2779         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2780                 goto out;
2781         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2782                 goto out;
2783         r = 0;
2784         vcpu->arch.mcg_cap = mcg_cap;
2785         /* Init IA32_MCG_CTL to all 1s */
2786         if (mcg_cap & MCG_CTL_P)
2787                 vcpu->arch.mcg_ctl = ~(u64)0;
2788         /* Init IA32_MCi_CTL to all 1s */
2789         for (bank = 0; bank < bank_num; bank++)
2790                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2791 out:
2792         return r;
2793 }
2794
2795 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2796                                       struct kvm_x86_mce *mce)
2797 {
2798         u64 mcg_cap = vcpu->arch.mcg_cap;
2799         unsigned bank_num = mcg_cap & 0xff;
2800         u64 *banks = vcpu->arch.mce_banks;
2801
2802         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2803                 return -EINVAL;
2804         /*
2805          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2806          * reporting is disabled
2807          */
2808         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2809             vcpu->arch.mcg_ctl != ~(u64)0)
2810                 return 0;
2811         banks += 4 * mce->bank;
2812         /*
2813          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2814          * reporting is disabled for the bank
2815          */
2816         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2817                 return 0;
2818         if (mce->status & MCI_STATUS_UC) {
2819                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2820                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2821                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2822                         return 0;
2823                 }
2824                 if (banks[1] & MCI_STATUS_VAL)
2825                         mce->status |= MCI_STATUS_OVER;
2826                 banks[2] = mce->addr;
2827                 banks[3] = mce->misc;
2828                 vcpu->arch.mcg_status = mce->mcg_status;
2829                 banks[1] = mce->status;
2830                 kvm_queue_exception(vcpu, MC_VECTOR);
2831         } else if (!(banks[1] & MCI_STATUS_VAL)
2832                    || !(banks[1] & MCI_STATUS_UC)) {
2833                 if (banks[1] & MCI_STATUS_VAL)
2834                         mce->status |= MCI_STATUS_OVER;
2835                 banks[2] = mce->addr;
2836                 banks[3] = mce->misc;
2837                 banks[1] = mce->status;
2838         } else
2839                 banks[1] |= MCI_STATUS_OVER;
2840         return 0;
2841 }
2842
2843 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2844                                                struct kvm_vcpu_events *events)
2845 {
2846         process_nmi(vcpu);
2847         events->exception.injected =
2848                 vcpu->arch.exception.pending &&
2849                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2850         events->exception.nr = vcpu->arch.exception.nr;
2851         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2852         events->exception.pad = 0;
2853         events->exception.error_code = vcpu->arch.exception.error_code;
2854
2855         events->interrupt.injected =
2856                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2857         events->interrupt.nr = vcpu->arch.interrupt.nr;
2858         events->interrupt.soft = 0;
2859         events->interrupt.shadow =
2860                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2861                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2862
2863         events->nmi.injected = vcpu->arch.nmi_injected;
2864         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2865         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2866         events->nmi.pad = 0;
2867
2868         events->sipi_vector = 0; /* never valid when reporting to user space */
2869
2870         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2871                          | KVM_VCPUEVENT_VALID_SHADOW);
2872         memset(&events->reserved, 0, sizeof(events->reserved));
2873 }
2874
2875 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2876                                               struct kvm_vcpu_events *events)
2877 {
2878         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2879                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2880                               | KVM_VCPUEVENT_VALID_SHADOW))
2881                 return -EINVAL;
2882
2883         process_nmi(vcpu);
2884         vcpu->arch.exception.pending = events->exception.injected;
2885         vcpu->arch.exception.nr = events->exception.nr;
2886         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2887         vcpu->arch.exception.error_code = events->exception.error_code;
2888
2889         vcpu->arch.interrupt.pending = events->interrupt.injected;
2890         vcpu->arch.interrupt.nr = events->interrupt.nr;
2891         vcpu->arch.interrupt.soft = events->interrupt.soft;
2892         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2893                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2894                                                   events->interrupt.shadow);
2895
2896         vcpu->arch.nmi_injected = events->nmi.injected;
2897         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2898                 vcpu->arch.nmi_pending = events->nmi.pending;
2899         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2900
2901         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2902             kvm_vcpu_has_lapic(vcpu))
2903                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2904
2905         kvm_make_request(KVM_REQ_EVENT, vcpu);
2906
2907         return 0;
2908 }
2909
2910 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2911                                              struct kvm_debugregs *dbgregs)
2912 {
2913         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2914         dbgregs->dr6 = vcpu->arch.dr6;
2915         dbgregs->dr7 = vcpu->arch.dr7;
2916         dbgregs->flags = 0;
2917         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2918 }
2919
2920 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2921                                             struct kvm_debugregs *dbgregs)
2922 {
2923         if (dbgregs->flags)
2924                 return -EINVAL;
2925
2926         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2927         vcpu->arch.dr6 = dbgregs->dr6;
2928         vcpu->arch.dr7 = dbgregs->dr7;
2929
2930         return 0;
2931 }
2932
2933 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2934                                          struct kvm_xsave *guest_xsave)
2935 {
2936         if (cpu_has_xsave)
2937                 memcpy(guest_xsave->region,
2938                         &vcpu->arch.guest_fpu.state->xsave,
2939                         xstate_size);
2940         else {
2941                 memcpy(guest_xsave->region,
2942                         &vcpu->arch.guest_fpu.state->fxsave,
2943                         sizeof(struct i387_fxsave_struct));
2944                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2945                         XSTATE_FPSSE;
2946         }
2947 }
2948
2949 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2950                                         struct kvm_xsave *guest_xsave)
2951 {
2952         u64 xstate_bv =
2953                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2954
2955         if (cpu_has_xsave)
2956                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2957                         guest_xsave->region, xstate_size);
2958         else {
2959                 if (xstate_bv & ~XSTATE_FPSSE)
2960                         return -EINVAL;
2961                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2962                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2963         }
2964         return 0;
2965 }
2966
2967 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2968                                         struct kvm_xcrs *guest_xcrs)
2969 {
2970         if (!cpu_has_xsave) {
2971                 guest_xcrs->nr_xcrs = 0;
2972                 return;
2973         }
2974
2975         guest_xcrs->nr_xcrs = 1;
2976         guest_xcrs->flags = 0;
2977         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2978         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2979 }
2980
2981 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2982                                        struct kvm_xcrs *guest_xcrs)
2983 {
2984         int i, r = 0;
2985
2986         if (!cpu_has_xsave)
2987                 return -EINVAL;
2988
2989         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2990                 return -EINVAL;
2991
2992         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2993                 /* Only support XCR0 currently */
2994                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2995                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2996                                 guest_xcrs->xcrs[0].value);
2997                         break;
2998                 }
2999         if (r)
3000                 r = -EINVAL;
3001         return r;
3002 }
3003
3004 /*
3005  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3006  * stopped by the hypervisor.  This function will be called from the host only.
3007  * EINVAL is returned when the host attempts to set the flag for a guest that
3008  * does not support pv clocks.
3009  */
3010 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3011 {
3012         if (!vcpu->arch.pv_time_enabled)
3013                 return -EINVAL;
3014         vcpu->arch.pvclock_set_guest_stopped_request = true;
3015         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3016         return 0;
3017 }
3018
3019 long kvm_arch_vcpu_ioctl(struct file *filp,
3020                          unsigned int ioctl, unsigned long arg)
3021 {
3022         struct kvm_vcpu *vcpu = filp->private_data;
3023         void __user *argp = (void __user *)arg;
3024         int r;
3025         union {
3026                 struct kvm_lapic_state *lapic;
3027                 struct kvm_xsave *xsave;
3028                 struct kvm_xcrs *xcrs;
3029                 void *buffer;
3030         } u;
3031
3032         u.buffer = NULL;
3033         switch (ioctl) {
3034         case KVM_GET_LAPIC: {
3035                 r = -EINVAL;
3036                 if (!vcpu->arch.apic)
3037                         goto out;
3038                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3039
3040                 r = -ENOMEM;
3041                 if (!u.lapic)
3042                         goto out;
3043                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3044                 if (r)
3045                         goto out;
3046                 r = -EFAULT;
3047                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3048                         goto out;
3049                 r = 0;
3050                 break;
3051         }
3052         case KVM_SET_LAPIC: {
3053                 r = -EINVAL;
3054                 if (!vcpu->arch.apic)
3055                         goto out;
3056                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3057                 if (IS_ERR(u.lapic))
3058                         return PTR_ERR(u.lapic);
3059
3060                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3061                 break;
3062         }
3063         case KVM_INTERRUPT: {
3064                 struct kvm_interrupt irq;
3065
3066                 r = -EFAULT;
3067                 if (copy_from_user(&irq, argp, sizeof irq))
3068                         goto out;
3069                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3070                 break;
3071         }
3072         case KVM_NMI: {
3073                 r = kvm_vcpu_ioctl_nmi(vcpu);
3074                 break;
3075         }
3076         case KVM_SET_CPUID: {
3077                 struct kvm_cpuid __user *cpuid_arg = argp;
3078                 struct kvm_cpuid cpuid;
3079
3080                 r = -EFAULT;
3081                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3082                         goto out;
3083                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3084                 break;
3085         }
3086         case KVM_SET_CPUID2: {
3087                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3088                 struct kvm_cpuid2 cpuid;
3089
3090                 r = -EFAULT;
3091                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3092                         goto out;
3093                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3094                                               cpuid_arg->entries);
3095                 break;
3096         }
3097         case KVM_GET_CPUID2: {
3098                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3099                 struct kvm_cpuid2 cpuid;
3100
3101                 r = -EFAULT;
3102                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3103                         goto out;
3104                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3105                                               cpuid_arg->entries);
3106                 if (r)
3107                         goto out;
3108                 r = -EFAULT;
3109                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3110                         goto out;
3111                 r = 0;
3112                 break;
3113         }
3114         case KVM_GET_MSRS:
3115                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3116                 break;
3117         case KVM_SET_MSRS:
3118                 r = msr_io(vcpu, argp, do_set_msr, 0);
3119                 break;
3120         case KVM_TPR_ACCESS_REPORTING: {
3121                 struct kvm_tpr_access_ctl tac;
3122
3123                 r = -EFAULT;
3124                 if (copy_from_user(&tac, argp, sizeof tac))
3125                         goto out;
3126                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3127                 if (r)
3128                         goto out;
3129                 r = -EFAULT;
3130                 if (copy_to_user(argp, &tac, sizeof tac))
3131                         goto out;
3132                 r = 0;
3133                 break;
3134         };
3135         case KVM_SET_VAPIC_ADDR: {
3136                 struct kvm_vapic_addr va;
3137
3138                 r = -EINVAL;
3139                 if (!irqchip_in_kernel(vcpu->kvm))
3140                         goto out;
3141                 r = -EFAULT;
3142                 if (copy_from_user(&va, argp, sizeof va))
3143                         goto out;
3144                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3145                 break;
3146         }
3147         case KVM_X86_SETUP_MCE: {
3148                 u64 mcg_cap;
3149
3150                 r = -EFAULT;
3151                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3152                         goto out;
3153                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3154                 break;
3155         }
3156         case KVM_X86_SET_MCE: {
3157                 struct kvm_x86_mce mce;
3158
3159                 r = -EFAULT;
3160                 if (copy_from_user(&mce, argp, sizeof mce))
3161                         goto out;
3162                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3163                 break;
3164         }
3165         case KVM_GET_VCPU_EVENTS: {
3166                 struct kvm_vcpu_events events;
3167
3168                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3169
3170                 r = -EFAULT;
3171                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3172                         break;
3173                 r = 0;
3174                 break;
3175         }
3176         case KVM_SET_VCPU_EVENTS: {
3177                 struct kvm_vcpu_events events;
3178
3179                 r = -EFAULT;
3180                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3181                         break;
3182
3183                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3184                 break;
3185         }
3186         case KVM_GET_DEBUGREGS: {
3187                 struct kvm_debugregs dbgregs;
3188
3189                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3190
3191                 r = -EFAULT;
3192                 if (copy_to_user(argp, &dbgregs,
3193                                  sizeof(struct kvm_debugregs)))
3194                         break;
3195                 r = 0;
3196                 break;
3197         }
3198         case KVM_SET_DEBUGREGS: {
3199                 struct kvm_debugregs dbgregs;
3200
3201                 r = -EFAULT;
3202                 if (copy_from_user(&dbgregs, argp,
3203                                    sizeof(struct kvm_debugregs)))
3204                         break;
3205
3206                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3207                 break;
3208         }
3209         case KVM_GET_XSAVE: {
3210                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3211                 r = -ENOMEM;
3212                 if (!u.xsave)
3213                         break;
3214
3215                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3216
3217                 r = -EFAULT;
3218                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3219                         break;
3220                 r = 0;
3221                 break;
3222         }
3223         case KVM_SET_XSAVE: {
3224                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3225                 if (IS_ERR(u.xsave))
3226                         return PTR_ERR(u.xsave);
3227
3228                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3229                 break;
3230         }
3231         case KVM_GET_XCRS: {
3232                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3233                 r = -ENOMEM;
3234                 if (!u.xcrs)
3235                         break;
3236
3237                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3238
3239                 r = -EFAULT;
3240                 if (copy_to_user(argp, u.xcrs,
3241                                  sizeof(struct kvm_xcrs)))
3242                         break;
3243                 r = 0;
3244                 break;
3245         }
3246         case KVM_SET_XCRS: {
3247                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3248                 if (IS_ERR(u.xcrs))
3249                         return PTR_ERR(u.xcrs);
3250
3251                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3252                 break;
3253         }
3254         case KVM_SET_TSC_KHZ: {
3255                 u32 user_tsc_khz;
3256
3257                 r = -EINVAL;
3258                 user_tsc_khz = (u32)arg;
3259
3260                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3261                         goto out;
3262
3263                 if (user_tsc_khz == 0)
3264                         user_tsc_khz = tsc_khz;
3265
3266                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3267
3268                 r = 0;
3269                 goto out;
3270         }
3271         case KVM_GET_TSC_KHZ: {
3272                 r = vcpu->arch.virtual_tsc_khz;
3273                 goto out;
3274         }
3275         case KVM_KVMCLOCK_CTRL: {
3276                 r = kvm_set_guest_paused(vcpu);
3277                 goto out;
3278         }
3279         default:
3280                 r = -EINVAL;
3281         }
3282 out:
3283         kfree(u.buffer);
3284         return r;
3285 }
3286
3287 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3288 {
3289         return VM_FAULT_SIGBUS;
3290 }
3291
3292 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3293 {
3294         int ret;
3295
3296         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3297                 return -EINVAL;
3298         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3299         return ret;
3300 }
3301
3302 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3303                                               u64 ident_addr)
3304 {
3305         kvm->arch.ept_identity_map_addr = ident_addr;
3306         return 0;
3307 }
3308
3309 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3310                                           u32 kvm_nr_mmu_pages)
3311 {
3312         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3313                 return -EINVAL;
3314
3315         mutex_lock(&kvm->slots_lock);
3316
3317         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3318         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3319
3320         mutex_unlock(&kvm->slots_lock);
3321         return 0;
3322 }
3323
3324 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3325 {
3326         return kvm->arch.n_max_mmu_pages;
3327 }
3328
3329 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3330 {
3331         int r;
3332
3333         r = 0;
3334         switch (chip->chip_id) {
3335         case KVM_IRQCHIP_PIC_MASTER:
3336                 memcpy(&chip->chip.pic,
3337                         &pic_irqchip(kvm)->pics[0],
3338                         sizeof(struct kvm_pic_state));
3339                 break;
3340         case KVM_IRQCHIP_PIC_SLAVE:
3341                 memcpy(&chip->chip.pic,
3342                         &pic_irqchip(kvm)->pics[1],
3343                         sizeof(struct kvm_pic_state));
3344                 break;
3345         case KVM_IRQCHIP_IOAPIC:
3346                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3347                 break;
3348         default:
3349                 r = -EINVAL;
3350                 break;
3351         }
3352         return r;
3353 }
3354
3355 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3356 {
3357         int r;
3358
3359         r = 0;
3360         switch (chip->chip_id) {
3361         case KVM_IRQCHIP_PIC_MASTER:
3362                 spin_lock(&pic_irqchip(kvm)->lock);
3363                 memcpy(&pic_irqchip(kvm)->pics[0],
3364                         &chip->chip.pic,
3365                         sizeof(struct kvm_pic_state));
3366                 spin_unlock(&pic_irqchip(kvm)->lock);
3367                 break;
3368         case KVM_IRQCHIP_PIC_SLAVE:
3369                 spin_lock(&pic_irqchip(kvm)->lock);
3370                 memcpy(&pic_irqchip(kvm)->pics[1],
3371                         &chip->chip.pic,
3372                         sizeof(struct kvm_pic_state));
3373                 spin_unlock(&pic_irqchip(kvm)->lock);
3374                 break;
3375         case KVM_IRQCHIP_IOAPIC:
3376                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3377                 break;
3378         default:
3379                 r = -EINVAL;
3380                 break;
3381         }
3382         kvm_pic_update_irq(pic_irqchip(kvm));
3383         return r;
3384 }
3385
3386 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3387 {
3388         int r = 0;
3389
3390         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3391         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3392         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3393         return r;
3394 }
3395
3396 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3397 {
3398         int r = 0;
3399
3400         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3401         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3402         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3403         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3404         return r;
3405 }
3406
3407 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3408 {
3409         int r = 0;
3410
3411         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3412         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3413                 sizeof(ps->channels));
3414         ps->flags = kvm->arch.vpit->pit_state.flags;
3415         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3416         memset(&ps->reserved, 0, sizeof(ps->reserved));
3417         return r;
3418 }
3419
3420 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3421 {
3422         int r = 0, start = 0;
3423         u32 prev_legacy, cur_legacy;
3424         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3425         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3426         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3427         if (!prev_legacy && cur_legacy)
3428                 start = 1;
3429         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3430                sizeof(kvm->arch.vpit->pit_state.channels));
3431         kvm->arch.vpit->pit_state.flags = ps->flags;
3432         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3433         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3434         return r;
3435 }
3436
3437 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3438                                  struct kvm_reinject_control *control)
3439 {
3440         if (!kvm->arch.vpit)
3441                 return -ENXIO;
3442         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3443         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3444         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3445         return 0;
3446 }
3447
3448 /**
3449  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3450  * @kvm: kvm instance
3451  * @log: slot id and address to which we copy the log
3452  *
3453  * We need to keep it in mind that VCPU threads can write to the bitmap
3454  * concurrently.  So, to avoid losing data, we keep the following order for
3455  * each bit:
3456  *
3457  *   1. Take a snapshot of the bit and clear it if needed.
3458  *   2. Write protect the corresponding page.
3459  *   3. Flush TLB's if needed.
3460  *   4. Copy the snapshot to the userspace.
3461  *
3462  * Between 2 and 3, the guest may write to the page using the remaining TLB
3463  * entry.  This is not a problem because the page will be reported dirty at
3464  * step 4 using the snapshot taken before and step 3 ensures that successive
3465  * writes will be logged for the next call.
3466  */
3467 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3468 {
3469         int r;
3470         struct kvm_memory_slot *memslot;
3471         unsigned long n, i;
3472         unsigned long *dirty_bitmap;
3473         unsigned long *dirty_bitmap_buffer;
3474         bool is_dirty = false;
3475
3476         mutex_lock(&kvm->slots_lock);
3477
3478         r = -EINVAL;
3479         if (log->slot >= KVM_USER_MEM_SLOTS)
3480                 goto out;
3481
3482         memslot = id_to_memslot(kvm->memslots, log->slot);
3483
3484         dirty_bitmap = memslot->dirty_bitmap;
3485         r = -ENOENT;
3486         if (!dirty_bitmap)
3487                 goto out;
3488
3489         n = kvm_dirty_bitmap_bytes(memslot);
3490
3491         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3492         memset(dirty_bitmap_buffer, 0, n);
3493
3494         spin_lock(&kvm->mmu_lock);
3495
3496         for (i = 0; i < n / sizeof(long); i++) {
3497                 unsigned long mask;
3498                 gfn_t offset;
3499
3500                 if (!dirty_bitmap[i])
3501                         continue;
3502
3503                 is_dirty = true;
3504
3505                 mask = xchg(&dirty_bitmap[i], 0);
3506                 dirty_bitmap_buffer[i] = mask;
3507
3508                 offset = i * BITS_PER_LONG;
3509                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3510         }
3511         if (is_dirty)
3512                 kvm_flush_remote_tlbs(kvm);
3513
3514         spin_unlock(&kvm->mmu_lock);
3515
3516         r = -EFAULT;
3517         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3518                 goto out;
3519
3520         r = 0;
3521 out:
3522         mutex_unlock(&kvm->slots_lock);
3523         return r;
3524 }
3525
3526 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3527                         bool line_status)
3528 {
3529         if (!irqchip_in_kernel(kvm))
3530                 return -ENXIO;
3531
3532         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3533                                         irq_event->irq, irq_event->level,
3534                                         line_status);
3535         return 0;
3536 }
3537
3538 long kvm_arch_vm_ioctl(struct file *filp,
3539                        unsigned int ioctl, unsigned long arg)
3540 {
3541         struct kvm *kvm = filp->private_data;
3542         void __user *argp = (void __user *)arg;
3543         int r = -ENOTTY;
3544         /*
3545          * This union makes it completely explicit to gcc-3.x
3546          * that these two variables' stack usage should be
3547          * combined, not added together.
3548          */
3549         union {
3550                 struct kvm_pit_state ps;
3551                 struct kvm_pit_state2 ps2;
3552                 struct kvm_pit_config pit_config;
3553         } u;
3554
3555         switch (ioctl) {
3556         case KVM_SET_TSS_ADDR:
3557                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3558                 break;
3559         case KVM_SET_IDENTITY_MAP_ADDR: {
3560                 u64 ident_addr;
3561
3562                 r = -EFAULT;
3563                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3564                         goto out;
3565                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3566                 break;
3567         }
3568         case KVM_SET_NR_MMU_PAGES:
3569                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3570                 break;
3571         case KVM_GET_NR_MMU_PAGES:
3572                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3573                 break;
3574         case KVM_CREATE_IRQCHIP: {
3575                 struct kvm_pic *vpic;
3576
3577                 mutex_lock(&kvm->lock);
3578                 r = -EEXIST;
3579                 if (kvm->arch.vpic)
3580                         goto create_irqchip_unlock;
3581                 r = -EINVAL;
3582                 if (atomic_read(&kvm->online_vcpus))
3583                         goto create_irqchip_unlock;
3584                 r = -ENOMEM;
3585                 vpic = kvm_create_pic(kvm);
3586                 if (vpic) {
3587                         r = kvm_ioapic_init(kvm);
3588                         if (r) {
3589                                 mutex_lock(&kvm->slots_lock);
3590                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3591                                                           &vpic->dev_master);
3592                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3593                                                           &vpic->dev_slave);
3594                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3595                                                           &vpic->dev_eclr);
3596                                 mutex_unlock(&kvm->slots_lock);
3597                                 kfree(vpic);
3598                                 goto create_irqchip_unlock;
3599                         }
3600                 } else
3601                         goto create_irqchip_unlock;
3602                 smp_wmb();
3603                 kvm->arch.vpic = vpic;
3604                 smp_wmb();
3605                 r = kvm_setup_default_irq_routing(kvm);
3606                 if (r) {
3607                         mutex_lock(&kvm->slots_lock);
3608                         mutex_lock(&kvm->irq_lock);
3609                         kvm_ioapic_destroy(kvm);
3610                         kvm_destroy_pic(kvm);
3611                         mutex_unlock(&kvm->irq_lock);
3612                         mutex_unlock(&kvm->slots_lock);
3613                 }
3614         create_irqchip_unlock:
3615                 mutex_unlock(&kvm->lock);
3616                 break;
3617         }
3618         case KVM_CREATE_PIT:
3619                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3620                 goto create_pit;
3621         case KVM_CREATE_PIT2:
3622                 r = -EFAULT;
3623                 if (copy_from_user(&u.pit_config, argp,
3624                                    sizeof(struct kvm_pit_config)))
3625                         goto out;
3626         create_pit:
3627                 mutex_lock(&kvm->slots_lock);
3628                 r = -EEXIST;
3629                 if (kvm->arch.vpit)
3630                         goto create_pit_unlock;
3631                 r = -ENOMEM;
3632                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3633                 if (kvm->arch.vpit)
3634                         r = 0;
3635         create_pit_unlock:
3636                 mutex_unlock(&kvm->slots_lock);
3637                 break;
3638         case KVM_GET_IRQCHIP: {
3639                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3640                 struct kvm_irqchip *chip;
3641
3642                 chip = memdup_user(argp, sizeof(*chip));
3643                 if (IS_ERR(chip)) {
3644                         r = PTR_ERR(chip);
3645                         goto out;
3646                 }
3647
3648                 r = -ENXIO;
3649                 if (!irqchip_in_kernel(kvm))
3650                         goto get_irqchip_out;
3651                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3652                 if (r)
3653                         goto get_irqchip_out;
3654                 r = -EFAULT;
3655                 if (copy_to_user(argp, chip, sizeof *chip))
3656                         goto get_irqchip_out;
3657                 r = 0;
3658         get_irqchip_out:
3659                 kfree(chip);
3660                 break;
3661         }
3662         case KVM_SET_IRQCHIP: {
3663                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3664                 struct kvm_irqchip *chip;
3665
3666                 chip = memdup_user(argp, sizeof(*chip));
3667                 if (IS_ERR(chip)) {
3668                         r = PTR_ERR(chip);
3669                         goto out;
3670                 }
3671
3672                 r = -ENXIO;
3673                 if (!irqchip_in_kernel(kvm))
3674                         goto set_irqchip_out;
3675                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3676                 if (r)
3677                         goto set_irqchip_out;
3678                 r = 0;
3679         set_irqchip_out:
3680                 kfree(chip);
3681                 break;
3682         }
3683         case KVM_GET_PIT: {
3684                 r = -EFAULT;
3685                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3686                         goto out;
3687                 r = -ENXIO;
3688                 if (!kvm->arch.vpit)
3689                         goto out;
3690                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3691                 if (r)
3692                         goto out;
3693                 r = -EFAULT;
3694                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3695                         goto out;
3696                 r = 0;
3697                 break;
3698         }
3699         case KVM_SET_PIT: {
3700                 r = -EFAULT;
3701                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3702                         goto out;
3703                 r = -ENXIO;
3704                 if (!kvm->arch.vpit)
3705                         goto out;
3706                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3707                 break;
3708         }
3709         case KVM_GET_PIT2: {
3710                 r = -ENXIO;
3711                 if (!kvm->arch.vpit)
3712                         goto out;
3713                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3714                 if (r)
3715                         goto out;
3716                 r = -EFAULT;
3717                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3718                         goto out;
3719                 r = 0;
3720                 break;
3721         }
3722         case KVM_SET_PIT2: {
3723                 r = -EFAULT;
3724                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3725                         goto out;
3726                 r = -ENXIO;
3727                 if (!kvm->arch.vpit)
3728                         goto out;
3729                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3730                 break;
3731         }
3732         case KVM_REINJECT_CONTROL: {
3733                 struct kvm_reinject_control control;
3734                 r =  -EFAULT;
3735                 if (copy_from_user(&control, argp, sizeof(control)))
3736                         goto out;
3737                 r = kvm_vm_ioctl_reinject(kvm, &control);
3738                 break;
3739         }
3740         case KVM_XEN_HVM_CONFIG: {
3741                 r = -EFAULT;
3742                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3743                                    sizeof(struct kvm_xen_hvm_config)))
3744                         goto out;
3745                 r = -EINVAL;
3746                 if (kvm->arch.xen_hvm_config.flags)
3747                         goto out;
3748                 r = 0;
3749                 break;
3750         }
3751         case KVM_SET_CLOCK: {
3752                 struct kvm_clock_data user_ns;
3753                 u64 now_ns;
3754                 s64 delta;
3755
3756                 r = -EFAULT;
3757                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3758                         goto out;
3759
3760                 r = -EINVAL;
3761                 if (user_ns.flags)
3762                         goto out;
3763
3764                 r = 0;
3765                 local_irq_disable();
3766                 now_ns = get_kernel_ns();
3767                 delta = user_ns.clock - now_ns;
3768                 local_irq_enable();
3769                 kvm->arch.kvmclock_offset = delta;
3770                 break;
3771         }
3772         case KVM_GET_CLOCK: {
3773                 struct kvm_clock_data user_ns;
3774                 u64 now_ns;
3775
3776                 local_irq_disable();
3777                 now_ns = get_kernel_ns();
3778                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3779                 local_irq_enable();
3780                 user_ns.flags = 0;
3781                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3782
3783                 r = -EFAULT;
3784                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3785                         goto out;
3786                 r = 0;
3787                 break;
3788         }
3789
3790         default:
3791                 ;
3792         }
3793 out:
3794         return r;
3795 }
3796
3797 static void kvm_init_msr_list(void)
3798 {
3799         u32 dummy[2];
3800         unsigned i, j;
3801
3802         /* skip the first msrs in the list. KVM-specific */
3803         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3804                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3805                         continue;
3806                 if (j < i)
3807                         msrs_to_save[j] = msrs_to_save[i];
3808                 j++;
3809         }
3810         num_msrs_to_save = j;
3811 }
3812
3813 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3814                            const void *v)
3815 {
3816         int handled = 0;
3817         int n;
3818
3819         do {
3820                 n = min(len, 8);
3821                 if (!(vcpu->arch.apic &&
3822                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3823                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3824                         break;
3825                 handled += n;
3826                 addr += n;
3827                 len -= n;
3828                 v += n;
3829         } while (len);
3830
3831         return handled;
3832 }
3833
3834 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3835 {
3836         int handled = 0;
3837         int n;
3838
3839         do {
3840                 n = min(len, 8);
3841                 if (!(vcpu->arch.apic &&
3842                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3843                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3844                         break;
3845                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3846                 handled += n;
3847                 addr += n;
3848                 len -= n;
3849                 v += n;
3850         } while (len);
3851
3852         return handled;
3853 }
3854
3855 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3856                         struct kvm_segment *var, int seg)
3857 {
3858         kvm_x86_ops->set_segment(vcpu, var, seg);
3859 }
3860
3861 void kvm_get_segment(struct kvm_vcpu *vcpu,
3862                      struct kvm_segment *var, int seg)
3863 {
3864         kvm_x86_ops->get_segment(vcpu, var, seg);
3865 }
3866
3867 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3868 {
3869         gpa_t t_gpa;
3870         struct x86_exception exception;
3871
3872         BUG_ON(!mmu_is_nested(vcpu));
3873
3874         /* NPT walks are always user-walks */
3875         access |= PFERR_USER_MASK;
3876         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3877
3878         return t_gpa;
3879 }
3880
3881 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3882                               struct x86_exception *exception)
3883 {
3884         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3885         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3886 }
3887
3888  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3889                                 struct x86_exception *exception)
3890 {
3891         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3892         access |= PFERR_FETCH_MASK;
3893         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3894 }
3895
3896 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3897                                struct x86_exception *exception)
3898 {
3899         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3900         access |= PFERR_WRITE_MASK;
3901         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3902 }
3903
3904 /* uses this to access any guest's mapped memory without checking CPL */
3905 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3906                                 struct x86_exception *exception)
3907 {
3908         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3909 }
3910
3911 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3912                                       struct kvm_vcpu *vcpu, u32 access,
3913                                       struct x86_exception *exception)
3914 {
3915         void *data = val;
3916         int r = X86EMUL_CONTINUE;
3917
3918         while (bytes) {
3919                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3920                                                             exception);
3921                 unsigned offset = addr & (PAGE_SIZE-1);
3922                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3923                 int ret;
3924
3925                 if (gpa == UNMAPPED_GVA)
3926                         return X86EMUL_PROPAGATE_FAULT;
3927                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3928                 if (ret < 0) {
3929                         r = X86EMUL_IO_NEEDED;
3930                         goto out;
3931                 }
3932
3933                 bytes -= toread;
3934                 data += toread;
3935                 addr += toread;
3936         }
3937 out:
3938         return r;
3939 }
3940
3941 /* used for instruction fetching */
3942 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3943                                 gva_t addr, void *val, unsigned int bytes,
3944                                 struct x86_exception *exception)
3945 {
3946         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3947         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3948
3949         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3950                                           access | PFERR_FETCH_MASK,
3951                                           exception);
3952 }
3953
3954 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3955                                gva_t addr, void *val, unsigned int bytes,
3956                                struct x86_exception *exception)
3957 {
3958         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3959         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3960
3961         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3962                                           exception);
3963 }
3964 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3965
3966 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3967                                       gva_t addr, void *val, unsigned int bytes,
3968                                       struct x86_exception *exception)
3969 {
3970         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3971         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3972 }
3973
3974 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3975                                        gva_t addr, void *val,
3976                                        unsigned int bytes,
3977                                        struct x86_exception *exception)
3978 {
3979         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3980         void *data = val;
3981         int r = X86EMUL_CONTINUE;
3982
3983         while (bytes) {
3984                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3985                                                              PFERR_WRITE_MASK,
3986                                                              exception);
3987                 unsigned offset = addr & (PAGE_SIZE-1);
3988                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3989                 int ret;
3990
3991                 if (gpa == UNMAPPED_GVA)
3992                         return X86EMUL_PROPAGATE_FAULT;
3993                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3994                 if (ret < 0) {
3995                         r = X86EMUL_IO_NEEDED;
3996                         goto out;
3997                 }
3998
3999                 bytes -= towrite;
4000                 data += towrite;
4001                 addr += towrite;
4002         }
4003 out:
4004         return r;
4005 }
4006 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4007
4008 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4009                                 gpa_t *gpa, struct x86_exception *exception,
4010                                 bool write)
4011 {
4012         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4013                 | (write ? PFERR_WRITE_MASK : 0);
4014
4015         if (vcpu_match_mmio_gva(vcpu, gva)
4016             && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
4017                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4018                                         (gva & (PAGE_SIZE - 1));
4019                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4020                 return 1;
4021         }
4022
4023         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4024
4025         if (*gpa == UNMAPPED_GVA)
4026                 return -1;
4027
4028         /* For APIC access vmexit */
4029         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4030                 return 1;
4031
4032         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4033                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4034                 return 1;
4035         }
4036
4037         return 0;
4038 }
4039
4040 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4041                         const void *val, int bytes)
4042 {
4043         int ret;
4044
4045         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4046         if (ret < 0)
4047                 return 0;
4048         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4049         return 1;
4050 }
4051
4052 struct read_write_emulator_ops {
4053         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4054                                   int bytes);
4055         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4056                                   void *val, int bytes);
4057         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4058                                int bytes, void *val);
4059         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4060                                     void *val, int bytes);
4061         bool write;
4062 };
4063
4064 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4065 {
4066         if (vcpu->mmio_read_completed) {
4067                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4068                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4069                 vcpu->mmio_read_completed = 0;
4070                 return 1;
4071         }
4072
4073         return 0;
4074 }
4075
4076 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4077                         void *val, int bytes)
4078 {
4079         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4080 }
4081
4082 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4083                          void *val, int bytes)
4084 {
4085         return emulator_write_phys(vcpu, gpa, val, bytes);
4086 }
4087
4088 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4089 {
4090         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4091         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4092 }
4093
4094 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4095                           void *val, int bytes)
4096 {
4097         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4098         return X86EMUL_IO_NEEDED;
4099 }
4100
4101 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4102                            void *val, int bytes)
4103 {
4104         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4105
4106         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4107         return X86EMUL_CONTINUE;
4108 }
4109
4110 static const struct read_write_emulator_ops read_emultor = {
4111         .read_write_prepare = read_prepare,
4112         .read_write_emulate = read_emulate,
4113         .read_write_mmio = vcpu_mmio_read,
4114         .read_write_exit_mmio = read_exit_mmio,
4115 };
4116
4117 static const struct read_write_emulator_ops write_emultor = {
4118         .read_write_emulate = write_emulate,
4119         .read_write_mmio = write_mmio,
4120         .read_write_exit_mmio = write_exit_mmio,
4121         .write = true,
4122 };
4123
4124 static int emulator_read_write_onepage(unsigned long addr, void *val,
4125                                        unsigned int bytes,
4126                                        struct x86_exception *exception,
4127                                        struct kvm_vcpu *vcpu,
4128                                        const struct read_write_emulator_ops *ops)
4129 {
4130         gpa_t gpa;
4131         int handled, ret;
4132         bool write = ops->write;
4133         struct kvm_mmio_fragment *frag;
4134
4135         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4136
4137         if (ret < 0)
4138                 return X86EMUL_PROPAGATE_FAULT;
4139
4140         /* For APIC access vmexit */
4141         if (ret)
4142                 goto mmio;
4143
4144         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4145                 return X86EMUL_CONTINUE;
4146
4147 mmio:
4148         /*
4149          * Is this MMIO handled locally?
4150          */
4151         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4152         if (handled == bytes)
4153                 return X86EMUL_CONTINUE;
4154
4155         gpa += handled;
4156         bytes -= handled;
4157         val += handled;
4158
4159         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4160         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4161         frag->gpa = gpa;
4162         frag->data = val;
4163         frag->len = bytes;
4164         return X86EMUL_CONTINUE;
4165 }
4166
4167 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4168                         void *val, unsigned int bytes,
4169                         struct x86_exception *exception,
4170                         const struct read_write_emulator_ops *ops)
4171 {
4172         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4173         gpa_t gpa;
4174         int rc;
4175
4176         if (ops->read_write_prepare &&
4177                   ops->read_write_prepare(vcpu, val, bytes))
4178                 return X86EMUL_CONTINUE;
4179
4180         vcpu->mmio_nr_fragments = 0;
4181
4182         /* Crossing a page boundary? */
4183         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4184                 int now;
4185
4186                 now = -addr & ~PAGE_MASK;
4187                 rc = emulator_read_write_onepage(addr, val, now, exception,
4188                                                  vcpu, ops);
4189
4190                 if (rc != X86EMUL_CONTINUE)
4191                         return rc;
4192                 addr += now;
4193                 val += now;
4194                 bytes -= now;
4195         }
4196
4197         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4198                                          vcpu, ops);
4199         if (rc != X86EMUL_CONTINUE)
4200                 return rc;
4201
4202         if (!vcpu->mmio_nr_fragments)
4203                 return rc;
4204
4205         gpa = vcpu->mmio_fragments[0].gpa;
4206
4207         vcpu->mmio_needed = 1;
4208         vcpu->mmio_cur_fragment = 0;
4209
4210         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4211         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4212         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4213         vcpu->run->mmio.phys_addr = gpa;
4214
4215         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4216 }
4217
4218 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4219                                   unsigned long addr,
4220                                   void *val,
4221                                   unsigned int bytes,
4222                                   struct x86_exception *exception)
4223 {
4224         return emulator_read_write(ctxt, addr, val, bytes,
4225                                    exception, &read_emultor);
4226 }
4227
4228 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4229                             unsigned long addr,
4230                             const void *val,
4231                             unsigned int bytes,
4232                             struct x86_exception *exception)
4233 {
4234         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4235                                    exception, &write_emultor);
4236 }
4237
4238 #define CMPXCHG_TYPE(t, ptr, old, new) \
4239         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4240
4241 #ifdef CONFIG_X86_64
4242 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4243 #else
4244 #  define CMPXCHG64(ptr, old, new) \
4245         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4246 #endif
4247
4248 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4249                                      unsigned long addr,
4250                                      const void *old,
4251                                      const void *new,
4252                                      unsigned int bytes,
4253                                      struct x86_exception *exception)
4254 {
4255         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4256         gpa_t gpa;
4257         struct page *page;
4258         char *kaddr;
4259         bool exchanged;
4260
4261         /* guests cmpxchg8b have to be emulated atomically */
4262         if (bytes > 8 || (bytes & (bytes - 1)))
4263                 goto emul_write;
4264
4265         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4266
4267         if (gpa == UNMAPPED_GVA ||
4268             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4269                 goto emul_write;
4270
4271         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4272                 goto emul_write;
4273
4274         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4275         if (is_error_page(page))
4276                 goto emul_write;
4277
4278         kaddr = kmap_atomic(page);
4279         kaddr += offset_in_page(gpa);
4280         switch (bytes) {
4281         case 1:
4282                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4283                 break;
4284         case 2:
4285                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4286                 break;
4287         case 4:
4288                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4289                 break;
4290         case 8:
4291                 exchanged = CMPXCHG64(kaddr, old, new);
4292                 break;
4293         default:
4294                 BUG();
4295         }
4296         kunmap_atomic(kaddr);
4297         kvm_release_page_dirty(page);
4298
4299         if (!exchanged)
4300                 return X86EMUL_CMPXCHG_FAILED;
4301
4302         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4303
4304         return X86EMUL_CONTINUE;
4305
4306 emul_write:
4307         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4308
4309         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4310 }
4311
4312 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4313 {
4314         /* TODO: String I/O for in kernel device */
4315         int r;
4316
4317         if (vcpu->arch.pio.in)
4318                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4319                                     vcpu->arch.pio.size, pd);
4320         else
4321                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4322                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4323                                      pd);
4324         return r;
4325 }
4326
4327 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4328                                unsigned short port, void *val,
4329                                unsigned int count, bool in)
4330 {
4331         trace_kvm_pio(!in, port, size, count);
4332
4333         vcpu->arch.pio.port = port;
4334         vcpu->arch.pio.in = in;
4335         vcpu->arch.pio.count  = count;
4336         vcpu->arch.pio.size = size;
4337
4338         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4339                 vcpu->arch.pio.count = 0;
4340                 return 1;
4341         }
4342
4343         vcpu->run->exit_reason = KVM_EXIT_IO;
4344         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4345         vcpu->run->io.size = size;
4346         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4347         vcpu->run->io.count = count;
4348         vcpu->run->io.port = port;
4349
4350         return 0;
4351 }
4352
4353 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4354                                     int size, unsigned short port, void *val,
4355                                     unsigned int count)
4356 {
4357         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4358         int ret;
4359
4360         if (vcpu->arch.pio.count)
4361                 goto data_avail;
4362
4363         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4364         if (ret) {
4365 data_avail:
4366                 memcpy(val, vcpu->arch.pio_data, size * count);
4367                 vcpu->arch.pio.count = 0;
4368                 return 1;
4369         }
4370
4371         return 0;
4372 }
4373
4374 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4375                                      int size, unsigned short port,
4376                                      const void *val, unsigned int count)
4377 {
4378         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4379
4380         memcpy(vcpu->arch.pio_data, val, size * count);
4381         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4382 }
4383
4384 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4385 {
4386         return kvm_x86_ops->get_segment_base(vcpu, seg);
4387 }
4388
4389 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4390 {
4391         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4392 }
4393
4394 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4395 {
4396         if (!need_emulate_wbinvd(vcpu))
4397                 return X86EMUL_CONTINUE;
4398
4399         if (kvm_x86_ops->has_wbinvd_exit()) {
4400                 int cpu = get_cpu();
4401
4402                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4403                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4404                                 wbinvd_ipi, NULL, 1);
4405                 put_cpu();
4406                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4407         } else
4408                 wbinvd();
4409         return X86EMUL_CONTINUE;
4410 }
4411 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4412
4413 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4414 {
4415         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4416 }
4417
4418 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4419 {
4420         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4421 }
4422
4423 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4424 {
4425
4426         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4427 }
4428
4429 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4430 {
4431         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4432 }
4433
4434 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4435 {
4436         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4437         unsigned long value;
4438
4439         switch (cr) {
4440         case 0:
4441                 value = kvm_read_cr0(vcpu);
4442                 break;
4443         case 2:
4444                 value = vcpu->arch.cr2;
4445                 break;
4446         case 3:
4447                 value = kvm_read_cr3(vcpu);
4448                 break;
4449         case 4:
4450                 value = kvm_read_cr4(vcpu);
4451                 break;
4452         case 8:
4453                 value = kvm_get_cr8(vcpu);
4454                 break;
4455         default:
4456                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4457                 return 0;
4458         }
4459
4460         return value;
4461 }
4462
4463 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4464 {
4465         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4466         int res = 0;
4467
4468         switch (cr) {
4469         case 0:
4470                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4471                 break;
4472         case 2:
4473                 vcpu->arch.cr2 = val;
4474                 break;
4475         case 3:
4476                 res = kvm_set_cr3(vcpu, val);
4477                 break;
4478         case 4:
4479                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4480                 break;
4481         case 8:
4482                 res = kvm_set_cr8(vcpu, val);
4483                 break;
4484         default:
4485                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4486                 res = -1;
4487         }
4488
4489         return res;
4490 }
4491
4492 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4493 {
4494         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4495 }
4496
4497 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4498 {
4499         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4500 }
4501
4502 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4503 {
4504         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4505 }
4506
4507 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4508 {
4509         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4510 }
4511
4512 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4513 {
4514         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4515 }
4516
4517 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4518 {
4519         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4520 }
4521
4522 static unsigned long emulator_get_cached_segment_base(
4523         struct x86_emulate_ctxt *ctxt, int seg)
4524 {
4525         return get_segment_base(emul_to_vcpu(ctxt), seg);
4526 }
4527
4528 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4529                                  struct desc_struct *desc, u32 *base3,
4530                                  int seg)
4531 {
4532         struct kvm_segment var;
4533
4534         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4535         *selector = var.selector;
4536
4537         if (var.unusable) {
4538                 memset(desc, 0, sizeof(*desc));
4539                 return false;
4540         }
4541
4542         if (var.g)
4543                 var.limit >>= 12;
4544         set_desc_limit(desc, var.limit);
4545         set_desc_base(desc, (unsigned long)var.base);
4546 #ifdef CONFIG_X86_64
4547         if (base3)
4548                 *base3 = var.base >> 32;
4549 #endif
4550         desc->type = var.type;
4551         desc->s = var.s;
4552         desc->dpl = var.dpl;
4553         desc->p = var.present;
4554         desc->avl = var.avl;
4555         desc->l = var.l;
4556         desc->d = var.db;
4557         desc->g = var.g;
4558
4559         return true;
4560 }
4561
4562 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4563                                  struct desc_struct *desc, u32 base3,
4564                                  int seg)
4565 {
4566         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4567         struct kvm_segment var;
4568
4569         var.selector = selector;
4570         var.base = get_desc_base(desc);
4571 #ifdef CONFIG_X86_64
4572         var.base |= ((u64)base3) << 32;
4573 #endif
4574         var.limit = get_desc_limit(desc);
4575         if (desc->g)
4576                 var.limit = (var.limit << 12) | 0xfff;
4577         var.type = desc->type;
4578         var.present = desc->p;
4579         var.dpl = desc->dpl;
4580         var.db = desc->d;
4581         var.s = desc->s;
4582         var.l = desc->l;
4583         var.g = desc->g;
4584         var.avl = desc->avl;
4585         var.present = desc->p;
4586         var.unusable = !var.present;
4587         var.padding = 0;
4588
4589         kvm_set_segment(vcpu, &var, seg);
4590         return;
4591 }
4592
4593 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4594                             u32 msr_index, u64 *pdata)
4595 {
4596         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4597 }
4598
4599 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4600                             u32 msr_index, u64 data)
4601 {
4602         struct msr_data msr;
4603
4604         msr.data = data;
4605         msr.index = msr_index;
4606         msr.host_initiated = false;
4607         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4608 }
4609
4610 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4611                              u32 pmc, u64 *pdata)
4612 {
4613         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4614 }
4615
4616 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4617 {
4618         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4619 }
4620
4621 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4622 {
4623         preempt_disable();
4624         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4625         /*
4626          * CR0.TS may reference the host fpu state, not the guest fpu state,
4627          * so it may be clear at this point.
4628          */
4629         clts();
4630 }
4631
4632 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4633 {
4634         preempt_enable();
4635 }
4636
4637 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4638                               struct x86_instruction_info *info,
4639                               enum x86_intercept_stage stage)
4640 {
4641         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4642 }
4643
4644 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4645                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4646 {
4647         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4648 }
4649
4650 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4651 {
4652         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4653 }
4654
4655 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4656 {
4657         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4658 }
4659
4660 static const struct x86_emulate_ops emulate_ops = {
4661         .read_gpr            = emulator_read_gpr,
4662         .write_gpr           = emulator_write_gpr,
4663         .read_std            = kvm_read_guest_virt_system,
4664         .write_std           = kvm_write_guest_virt_system,
4665         .fetch               = kvm_fetch_guest_virt,
4666         .read_emulated       = emulator_read_emulated,
4667         .write_emulated      = emulator_write_emulated,
4668         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4669         .invlpg              = emulator_invlpg,
4670         .pio_in_emulated     = emulator_pio_in_emulated,
4671         .pio_out_emulated    = emulator_pio_out_emulated,
4672         .get_segment         = emulator_get_segment,
4673         .set_segment         = emulator_set_segment,
4674         .get_cached_segment_base = emulator_get_cached_segment_base,
4675         .get_gdt             = emulator_get_gdt,
4676         .get_idt             = emulator_get_idt,
4677         .set_gdt             = emulator_set_gdt,
4678         .set_idt             = emulator_set_idt,
4679         .get_cr              = emulator_get_cr,
4680         .set_cr              = emulator_set_cr,
4681         .set_rflags          = emulator_set_rflags,
4682         .cpl                 = emulator_get_cpl,
4683         .get_dr              = emulator_get_dr,
4684         .set_dr              = emulator_set_dr,
4685         .set_msr             = emulator_set_msr,
4686         .get_msr             = emulator_get_msr,
4687         .read_pmc            = emulator_read_pmc,
4688         .halt                = emulator_halt,
4689         .wbinvd              = emulator_wbinvd,
4690         .fix_hypercall       = emulator_fix_hypercall,
4691         .get_fpu             = emulator_get_fpu,
4692         .put_fpu             = emulator_put_fpu,
4693         .intercept           = emulator_intercept,
4694         .get_cpuid           = emulator_get_cpuid,
4695 };
4696
4697 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4698 {
4699         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4700         /*
4701          * an sti; sti; sequence only disable interrupts for the first
4702          * instruction. So, if the last instruction, be it emulated or
4703          * not, left the system with the INT_STI flag enabled, it
4704          * means that the last instruction is an sti. We should not
4705          * leave the flag on in this case. The same goes for mov ss
4706          */
4707         if (!(int_shadow & mask))
4708                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4709 }
4710
4711 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4712 {
4713         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4714         if (ctxt->exception.vector == PF_VECTOR)
4715                 kvm_propagate_fault(vcpu, &ctxt->exception);
4716         else if (ctxt->exception.error_code_valid)
4717                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4718                                       ctxt->exception.error_code);
4719         else
4720                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4721 }
4722
4723 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4724 {
4725         memset(&ctxt->twobyte, 0,
4726                (void *)&ctxt->_regs - (void *)&ctxt->twobyte);
4727
4728         ctxt->fetch.start = 0;
4729         ctxt->fetch.end = 0;
4730         ctxt->io_read.pos = 0;
4731         ctxt->io_read.end = 0;
4732         ctxt->mem_read.pos = 0;
4733         ctxt->mem_read.end = 0;
4734 }
4735
4736 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4737 {
4738         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4739         int cs_db, cs_l;
4740
4741         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4742
4743         ctxt->eflags = kvm_get_rflags(vcpu);
4744         ctxt->eip = kvm_rip_read(vcpu);
4745         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4746                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4747                      cs_l                               ? X86EMUL_MODE_PROT64 :
4748                      cs_db                              ? X86EMUL_MODE_PROT32 :
4749                                                           X86EMUL_MODE_PROT16;
4750         ctxt->guest_mode = is_guest_mode(vcpu);
4751
4752         init_decode_cache(ctxt);
4753         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4754 }
4755
4756 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4757 {
4758         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4759         int ret;
4760
4761         init_emulate_ctxt(vcpu);
4762
4763         ctxt->op_bytes = 2;
4764         ctxt->ad_bytes = 2;
4765         ctxt->_eip = ctxt->eip + inc_eip;
4766         ret = emulate_int_real(ctxt, irq);
4767
4768         if (ret != X86EMUL_CONTINUE)
4769                 return EMULATE_FAIL;
4770
4771         ctxt->eip = ctxt->_eip;
4772         kvm_rip_write(vcpu, ctxt->eip);
4773         kvm_set_rflags(vcpu, ctxt->eflags);
4774
4775         if (irq == NMI_VECTOR)
4776                 vcpu->arch.nmi_pending = 0;
4777         else
4778                 vcpu->arch.interrupt.pending = false;
4779
4780         return EMULATE_DONE;
4781 }
4782 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4783
4784 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4785 {
4786         int r = EMULATE_DONE;
4787
4788         ++vcpu->stat.insn_emulation_fail;
4789         trace_kvm_emulate_insn_failed(vcpu);
4790         if (!is_guest_mode(vcpu)) {
4791                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4792                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4793                 vcpu->run->internal.ndata = 0;
4794                 r = EMULATE_FAIL;
4795         }
4796         kvm_queue_exception(vcpu, UD_VECTOR);
4797
4798         return r;
4799 }
4800
4801 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4802                                   bool write_fault_to_shadow_pgtable,
4803                                   int emulation_type)
4804 {
4805         gpa_t gpa = cr2;
4806         pfn_t pfn;
4807
4808         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4809                 return false;
4810
4811         if (!vcpu->arch.mmu.direct_map) {
4812                 /*
4813                  * Write permission should be allowed since only
4814                  * write access need to be emulated.
4815                  */
4816                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4817
4818                 /*
4819                  * If the mapping is invalid in guest, let cpu retry
4820                  * it to generate fault.
4821                  */
4822                 if (gpa == UNMAPPED_GVA)
4823                         return true;
4824         }
4825
4826         /*
4827          * Do not retry the unhandleable instruction if it faults on the
4828          * readonly host memory, otherwise it will goto a infinite loop:
4829          * retry instruction -> write #PF -> emulation fail -> retry
4830          * instruction -> ...
4831          */
4832         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4833
4834         /*
4835          * If the instruction failed on the error pfn, it can not be fixed,
4836          * report the error to userspace.
4837          */
4838         if (is_error_noslot_pfn(pfn))
4839                 return false;
4840
4841         kvm_release_pfn_clean(pfn);
4842
4843         /* The instructions are well-emulated on direct mmu. */
4844         if (vcpu->arch.mmu.direct_map) {
4845                 unsigned int indirect_shadow_pages;
4846
4847                 spin_lock(&vcpu->kvm->mmu_lock);
4848                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4849                 spin_unlock(&vcpu->kvm->mmu_lock);
4850
4851                 if (indirect_shadow_pages)
4852                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4853
4854                 return true;
4855         }
4856
4857         /*
4858          * if emulation was due to access to shadowed page table
4859          * and it failed try to unshadow page and re-enter the
4860          * guest to let CPU execute the instruction.
4861          */
4862         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4863
4864         /*
4865          * If the access faults on its page table, it can not
4866          * be fixed by unprotecting shadow page and it should
4867          * be reported to userspace.
4868          */
4869         return !write_fault_to_shadow_pgtable;
4870 }
4871
4872 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4873                               unsigned long cr2,  int emulation_type)
4874 {
4875         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4876         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4877
4878         last_retry_eip = vcpu->arch.last_retry_eip;
4879         last_retry_addr = vcpu->arch.last_retry_addr;
4880
4881         /*
4882          * If the emulation is caused by #PF and it is non-page_table
4883          * writing instruction, it means the VM-EXIT is caused by shadow
4884          * page protected, we can zap the shadow page and retry this
4885          * instruction directly.
4886          *
4887          * Note: if the guest uses a non-page-table modifying instruction
4888          * on the PDE that points to the instruction, then we will unmap
4889          * the instruction and go to an infinite loop. So, we cache the
4890          * last retried eip and the last fault address, if we meet the eip
4891          * and the address again, we can break out of the potential infinite
4892          * loop.
4893          */
4894         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4895
4896         if (!(emulation_type & EMULTYPE_RETRY))
4897                 return false;
4898
4899         if (x86_page_table_writing_insn(ctxt))
4900                 return false;
4901
4902         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4903                 return false;
4904
4905         vcpu->arch.last_retry_eip = ctxt->eip;
4906         vcpu->arch.last_retry_addr = cr2;
4907
4908         if (!vcpu->arch.mmu.direct_map)
4909                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4910
4911         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4912
4913         return true;
4914 }
4915
4916 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
4917 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
4918
4919 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4920                             unsigned long cr2,
4921                             int emulation_type,
4922                             void *insn,
4923                             int insn_len)
4924 {
4925         int r;
4926         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4927         bool writeback = true;
4928         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
4929
4930         /*
4931          * Clear write_fault_to_shadow_pgtable here to ensure it is
4932          * never reused.
4933          */
4934         vcpu->arch.write_fault_to_shadow_pgtable = false;
4935         kvm_clear_exception_queue(vcpu);
4936
4937         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4938                 init_emulate_ctxt(vcpu);
4939                 ctxt->interruptibility = 0;
4940                 ctxt->have_exception = false;
4941                 ctxt->perm_ok = false;
4942
4943                 ctxt->only_vendor_specific_insn
4944                         = emulation_type & EMULTYPE_TRAP_UD;
4945
4946                 r = x86_decode_insn(ctxt, insn, insn_len);
4947
4948                 trace_kvm_emulate_insn_start(vcpu);
4949                 ++vcpu->stat.insn_emulation;
4950                 if (r != EMULATION_OK)  {
4951                         if (emulation_type & EMULTYPE_TRAP_UD)
4952                                 return EMULATE_FAIL;
4953                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
4954                                                 emulation_type))
4955                                 return EMULATE_DONE;
4956                         if (emulation_type & EMULTYPE_SKIP)
4957                                 return EMULATE_FAIL;
4958                         return handle_emulation_failure(vcpu);
4959                 }
4960         }
4961
4962         if (emulation_type & EMULTYPE_SKIP) {
4963                 kvm_rip_write(vcpu, ctxt->_eip);
4964                 return EMULATE_DONE;
4965         }
4966
4967         if (retry_instruction(ctxt, cr2, emulation_type))
4968                 return EMULATE_DONE;
4969
4970         /* this is needed for vmware backdoor interface to work since it
4971            changes registers values  during IO operation */
4972         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4973                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4974                 emulator_invalidate_register_cache(ctxt);
4975         }
4976
4977 restart:
4978         r = x86_emulate_insn(ctxt);
4979
4980         if (r == EMULATION_INTERCEPTED)
4981                 return EMULATE_DONE;
4982
4983         if (r == EMULATION_FAILED) {
4984                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
4985                                         emulation_type))
4986                         return EMULATE_DONE;
4987
4988                 return handle_emulation_failure(vcpu);
4989         }
4990
4991         if (ctxt->have_exception) {
4992                 inject_emulated_exception(vcpu);
4993                 r = EMULATE_DONE;
4994         } else if (vcpu->arch.pio.count) {
4995                 if (!vcpu->arch.pio.in)
4996                         vcpu->arch.pio.count = 0;
4997                 else {
4998                         writeback = false;
4999                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5000                 }
5001                 r = EMULATE_DO_MMIO;
5002         } else if (vcpu->mmio_needed) {
5003                 if (!vcpu->mmio_is_write)
5004                         writeback = false;
5005                 r = EMULATE_DO_MMIO;
5006                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5007         } else if (r == EMULATION_RESTART)
5008                 goto restart;
5009         else
5010                 r = EMULATE_DONE;
5011
5012         if (writeback) {
5013                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5014                 kvm_set_rflags(vcpu, ctxt->eflags);
5015                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5016                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5017                 kvm_rip_write(vcpu, ctxt->eip);
5018         } else
5019                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5020
5021         return r;
5022 }
5023 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5024
5025 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5026 {
5027         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5028         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5029                                             size, port, &val, 1);
5030         /* do not return to emulator after return from userspace */
5031         vcpu->arch.pio.count = 0;
5032         return ret;
5033 }
5034 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5035
5036 static void tsc_bad(void *info)
5037 {
5038         __this_cpu_write(cpu_tsc_khz, 0);
5039 }
5040
5041 static void tsc_khz_changed(void *data)
5042 {
5043         struct cpufreq_freqs *freq = data;
5044         unsigned long khz = 0;
5045
5046         if (data)
5047                 khz = freq->new;
5048         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5049                 khz = cpufreq_quick_get(raw_smp_processor_id());
5050         if (!khz)
5051                 khz = tsc_khz;
5052         __this_cpu_write(cpu_tsc_khz, khz);
5053 }
5054
5055 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5056                                      void *data)
5057 {
5058         struct cpufreq_freqs *freq = data;
5059         struct kvm *kvm;
5060         struct kvm_vcpu *vcpu;
5061         int i, send_ipi = 0;
5062
5063         /*
5064          * We allow guests to temporarily run on slowing clocks,
5065          * provided we notify them after, or to run on accelerating
5066          * clocks, provided we notify them before.  Thus time never
5067          * goes backwards.
5068          *
5069          * However, we have a problem.  We can't atomically update
5070          * the frequency of a given CPU from this function; it is
5071          * merely a notifier, which can be called from any CPU.
5072          * Changing the TSC frequency at arbitrary points in time
5073          * requires a recomputation of local variables related to
5074          * the TSC for each VCPU.  We must flag these local variables
5075          * to be updated and be sure the update takes place with the
5076          * new frequency before any guests proceed.
5077          *
5078          * Unfortunately, the combination of hotplug CPU and frequency
5079          * change creates an intractable locking scenario; the order
5080          * of when these callouts happen is undefined with respect to
5081          * CPU hotplug, and they can race with each other.  As such,
5082          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5083          * undefined; you can actually have a CPU frequency change take
5084          * place in between the computation of X and the setting of the
5085          * variable.  To protect against this problem, all updates of
5086          * the per_cpu tsc_khz variable are done in an interrupt
5087          * protected IPI, and all callers wishing to update the value
5088          * must wait for a synchronous IPI to complete (which is trivial
5089          * if the caller is on the CPU already).  This establishes the
5090          * necessary total order on variable updates.
5091          *
5092          * Note that because a guest time update may take place
5093          * anytime after the setting of the VCPU's request bit, the
5094          * correct TSC value must be set before the request.  However,
5095          * to ensure the update actually makes it to any guest which
5096          * starts running in hardware virtualization between the set
5097          * and the acquisition of the spinlock, we must also ping the
5098          * CPU after setting the request bit.
5099          *
5100          */
5101
5102         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5103                 return 0;
5104         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5105                 return 0;
5106
5107         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5108
5109         raw_spin_lock(&kvm_lock);
5110         list_for_each_entry(kvm, &vm_list, vm_list) {
5111                 kvm_for_each_vcpu(i, vcpu, kvm) {
5112                         if (vcpu->cpu != freq->cpu)
5113                                 continue;
5114                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5115                         if (vcpu->cpu != smp_processor_id())
5116                                 send_ipi = 1;
5117                 }
5118         }
5119         raw_spin_unlock(&kvm_lock);
5120
5121         if (freq->old < freq->new && send_ipi) {
5122                 /*
5123                  * We upscale the frequency.  Must make the guest
5124                  * doesn't see old kvmclock values while running with
5125                  * the new frequency, otherwise we risk the guest sees
5126                  * time go backwards.
5127                  *
5128                  * In case we update the frequency for another cpu
5129                  * (which might be in guest context) send an interrupt
5130                  * to kick the cpu out of guest context.  Next time
5131                  * guest context is entered kvmclock will be updated,
5132                  * so the guest will not see stale values.
5133                  */
5134                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5135         }
5136         return 0;
5137 }
5138
5139 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5140         .notifier_call  = kvmclock_cpufreq_notifier
5141 };
5142
5143 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5144                                         unsigned long action, void *hcpu)
5145 {
5146         unsigned int cpu = (unsigned long)hcpu;
5147
5148         switch (action) {
5149                 case CPU_ONLINE:
5150                 case CPU_DOWN_FAILED:
5151                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5152                         break;
5153                 case CPU_DOWN_PREPARE:
5154                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5155                         break;
5156         }
5157         return NOTIFY_OK;
5158 }
5159
5160 static struct notifier_block kvmclock_cpu_notifier_block = {
5161         .notifier_call  = kvmclock_cpu_notifier,
5162         .priority = -INT_MAX
5163 };
5164
5165 static void kvm_timer_init(void)
5166 {
5167         int cpu;
5168
5169         max_tsc_khz = tsc_khz;
5170         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5171         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5172 #ifdef CONFIG_CPU_FREQ
5173                 struct cpufreq_policy policy;
5174                 memset(&policy, 0, sizeof(policy));
5175                 cpu = get_cpu();
5176                 cpufreq_get_policy(&policy, cpu);
5177                 if (policy.cpuinfo.max_freq)
5178                         max_tsc_khz = policy.cpuinfo.max_freq;
5179                 put_cpu();
5180 #endif
5181                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5182                                           CPUFREQ_TRANSITION_NOTIFIER);
5183         }
5184         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5185         for_each_online_cpu(cpu)
5186                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5187 }
5188
5189 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5190
5191 int kvm_is_in_guest(void)
5192 {
5193         return __this_cpu_read(current_vcpu) != NULL;
5194 }
5195
5196 static int kvm_is_user_mode(void)
5197 {
5198         int user_mode = 3;
5199
5200         if (__this_cpu_read(current_vcpu))
5201                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5202
5203         return user_mode != 0;
5204 }
5205
5206 static unsigned long kvm_get_guest_ip(void)
5207 {
5208         unsigned long ip = 0;
5209
5210         if (__this_cpu_read(current_vcpu))
5211                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5212
5213         return ip;
5214 }
5215
5216 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5217         .is_in_guest            = kvm_is_in_guest,
5218         .is_user_mode           = kvm_is_user_mode,
5219         .get_guest_ip           = kvm_get_guest_ip,
5220 };
5221
5222 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5223 {
5224         __this_cpu_write(current_vcpu, vcpu);
5225 }
5226 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5227
5228 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5229 {
5230         __this_cpu_write(current_vcpu, NULL);
5231 }
5232 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5233
5234 static void kvm_set_mmio_spte_mask(void)
5235 {
5236         u64 mask;
5237         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5238
5239         /*
5240          * Set the reserved bits and the present bit of an paging-structure
5241          * entry to generate page fault with PFER.RSV = 1.
5242          */
5243         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5244         mask |= 1ull;
5245
5246 #ifdef CONFIG_X86_64
5247         /*
5248          * If reserved bit is not supported, clear the present bit to disable
5249          * mmio page fault.
5250          */
5251         if (maxphyaddr == 52)
5252                 mask &= ~1ull;
5253 #endif
5254
5255         kvm_mmu_set_mmio_spte_mask(mask);
5256 }
5257
5258 #ifdef CONFIG_X86_64
5259 static void pvclock_gtod_update_fn(struct work_struct *work)
5260 {
5261         struct kvm *kvm;
5262
5263         struct kvm_vcpu *vcpu;
5264         int i;
5265
5266         raw_spin_lock(&kvm_lock);
5267         list_for_each_entry(kvm, &vm_list, vm_list)
5268                 kvm_for_each_vcpu(i, vcpu, kvm)
5269                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5270         atomic_set(&kvm_guest_has_master_clock, 0);
5271         raw_spin_unlock(&kvm_lock);
5272 }
5273
5274 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5275
5276 /*
5277  * Notification about pvclock gtod data update.
5278  */
5279 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5280                                void *priv)
5281 {
5282         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5283         struct timekeeper *tk = priv;
5284
5285         update_pvclock_gtod(tk);
5286
5287         /* disable master clock if host does not trust, or does not
5288          * use, TSC clocksource
5289          */
5290         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5291             atomic_read(&kvm_guest_has_master_clock) != 0)
5292                 queue_work(system_long_wq, &pvclock_gtod_work);
5293
5294         return 0;
5295 }
5296
5297 static struct notifier_block pvclock_gtod_notifier = {
5298         .notifier_call = pvclock_gtod_notify,
5299 };
5300 #endif
5301
5302 int kvm_arch_init(void *opaque)
5303 {
5304         int r;
5305         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5306
5307         if (kvm_x86_ops) {
5308                 printk(KERN_ERR "kvm: already loaded the other module\n");
5309                 r = -EEXIST;
5310                 goto out;
5311         }
5312
5313         if (!ops->cpu_has_kvm_support()) {
5314                 printk(KERN_ERR "kvm: no hardware support\n");
5315                 r = -EOPNOTSUPP;
5316                 goto out;
5317         }
5318         if (ops->disabled_by_bios()) {
5319                 printk(KERN_ERR "kvm: disabled by bios\n");
5320                 r = -EOPNOTSUPP;
5321                 goto out;
5322         }
5323
5324         r = -ENOMEM;
5325         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5326         if (!shared_msrs) {
5327                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5328                 goto out;
5329         }
5330
5331         r = kvm_mmu_module_init();
5332         if (r)
5333                 goto out_free_percpu;
5334
5335         kvm_set_mmio_spte_mask();
5336         kvm_init_msr_list();
5337
5338         kvm_x86_ops = ops;
5339         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5340                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5341
5342         kvm_timer_init();
5343
5344         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5345
5346         if (cpu_has_xsave)
5347                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5348
5349         kvm_lapic_init();
5350 #ifdef CONFIG_X86_64
5351         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5352 #endif
5353
5354         return 0;
5355
5356 out_free_percpu:
5357         free_percpu(shared_msrs);
5358 out:
5359         return r;
5360 }
5361
5362 void kvm_arch_exit(void)
5363 {
5364         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5365
5366         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5367                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5368                                             CPUFREQ_TRANSITION_NOTIFIER);
5369         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5370 #ifdef CONFIG_X86_64
5371         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5372 #endif
5373         kvm_x86_ops = NULL;
5374         kvm_mmu_module_exit();
5375         free_percpu(shared_msrs);
5376 }
5377
5378 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5379 {
5380         ++vcpu->stat.halt_exits;
5381         if (irqchip_in_kernel(vcpu->kvm)) {
5382                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5383                 return 1;
5384         } else {
5385                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5386                 return 0;
5387         }
5388 }
5389 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5390
5391 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5392 {
5393         u64 param, ingpa, outgpa, ret;
5394         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5395         bool fast, longmode;
5396         int cs_db, cs_l;
5397
5398         /*
5399          * hypercall generates UD from non zero cpl and real mode
5400          * per HYPER-V spec
5401          */
5402         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5403                 kvm_queue_exception(vcpu, UD_VECTOR);
5404                 return 0;
5405         }
5406
5407         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5408         longmode = is_long_mode(vcpu) && cs_l == 1;
5409
5410         if (!longmode) {
5411                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5412                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5413                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5414                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5415                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5416                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5417         }
5418 #ifdef CONFIG_X86_64
5419         else {
5420                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5421                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5422                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5423         }
5424 #endif
5425
5426         code = param & 0xffff;
5427         fast = (param >> 16) & 0x1;
5428         rep_cnt = (param >> 32) & 0xfff;
5429         rep_idx = (param >> 48) & 0xfff;
5430
5431         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5432
5433         switch (code) {
5434         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5435                 kvm_vcpu_on_spin(vcpu);
5436                 break;
5437         default:
5438                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5439                 break;
5440         }
5441
5442         ret = res | (((u64)rep_done & 0xfff) << 32);
5443         if (longmode) {
5444                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5445         } else {
5446                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5447                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5448         }
5449
5450         return 1;
5451 }
5452
5453 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5454 {
5455         unsigned long nr, a0, a1, a2, a3, ret;
5456         int r = 1;
5457
5458         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5459                 return kvm_hv_hypercall(vcpu);
5460
5461         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5462         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5463         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5464         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5465         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5466
5467         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5468
5469         if (!is_long_mode(vcpu)) {
5470                 nr &= 0xFFFFFFFF;
5471                 a0 &= 0xFFFFFFFF;
5472                 a1 &= 0xFFFFFFFF;
5473                 a2 &= 0xFFFFFFFF;
5474                 a3 &= 0xFFFFFFFF;
5475         }
5476
5477         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5478                 ret = -KVM_EPERM;
5479                 goto out;
5480         }
5481
5482         switch (nr) {
5483         case KVM_HC_VAPIC_POLL_IRQ:
5484                 ret = 0;
5485                 break;
5486         default:
5487                 ret = -KVM_ENOSYS;
5488                 break;
5489         }
5490 out:
5491         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5492         ++vcpu->stat.hypercalls;
5493         return r;
5494 }
5495 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5496
5497 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5498 {
5499         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5500         char instruction[3];
5501         unsigned long rip = kvm_rip_read(vcpu);
5502
5503         /*
5504          * Blow out the MMU to ensure that no other VCPU has an active mapping
5505          * to ensure that the updated hypercall appears atomically across all
5506          * VCPUs.
5507          */
5508         kvm_mmu_zap_all(vcpu->kvm);
5509
5510         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5511
5512         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5513 }
5514
5515 /*
5516  * Check if userspace requested an interrupt window, and that the
5517  * interrupt window is open.
5518  *
5519  * No need to exit to userspace if we already have an interrupt queued.
5520  */
5521 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5522 {
5523         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5524                 vcpu->run->request_interrupt_window &&
5525                 kvm_arch_interrupt_allowed(vcpu));
5526 }
5527
5528 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5529 {
5530         struct kvm_run *kvm_run = vcpu->run;
5531
5532         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5533         kvm_run->cr8 = kvm_get_cr8(vcpu);
5534         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5535         if (irqchip_in_kernel(vcpu->kvm))
5536                 kvm_run->ready_for_interrupt_injection = 1;
5537         else
5538                 kvm_run->ready_for_interrupt_injection =
5539                         kvm_arch_interrupt_allowed(vcpu) &&
5540                         !kvm_cpu_has_interrupt(vcpu) &&
5541                         !kvm_event_needs_reinjection(vcpu);
5542 }
5543
5544 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5545 {
5546         int max_irr, tpr;
5547
5548         if (!kvm_x86_ops->update_cr8_intercept)
5549                 return;
5550
5551         if (!vcpu->arch.apic)
5552                 return;
5553
5554         if (!vcpu->arch.apic->vapic_addr)
5555                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5556         else
5557                 max_irr = -1;
5558
5559         if (max_irr != -1)
5560                 max_irr >>= 4;
5561
5562         tpr = kvm_lapic_get_cr8(vcpu);
5563
5564         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5565 }
5566
5567 static void inject_pending_event(struct kvm_vcpu *vcpu)
5568 {
5569         /* try to reinject previous events if any */
5570         if (vcpu->arch.exception.pending) {
5571                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5572                                         vcpu->arch.exception.has_error_code,
5573                                         vcpu->arch.exception.error_code);
5574                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5575                                           vcpu->arch.exception.has_error_code,
5576                                           vcpu->arch.exception.error_code,
5577                                           vcpu->arch.exception.reinject);
5578                 return;
5579         }
5580
5581         if (vcpu->arch.nmi_injected) {
5582                 kvm_x86_ops->set_nmi(vcpu);
5583                 return;
5584         }
5585
5586         if (vcpu->arch.interrupt.pending) {
5587                 kvm_x86_ops->set_irq(vcpu);
5588                 return;
5589         }
5590
5591         /* try to inject new event if pending */
5592         if (vcpu->arch.nmi_pending) {
5593                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5594                         --vcpu->arch.nmi_pending;
5595                         vcpu->arch.nmi_injected = true;
5596                         kvm_x86_ops->set_nmi(vcpu);
5597                 }
5598         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5599                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5600                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5601                                             false);
5602                         kvm_x86_ops->set_irq(vcpu);
5603                 }
5604         }
5605 }
5606
5607 static void process_nmi(struct kvm_vcpu *vcpu)
5608 {
5609         unsigned limit = 2;
5610
5611         /*
5612          * x86 is limited to one NMI running, and one NMI pending after it.
5613          * If an NMI is already in progress, limit further NMIs to just one.
5614          * Otherwise, allow two (and we'll inject the first one immediately).
5615          */
5616         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5617                 limit = 1;
5618
5619         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5620         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5621         kvm_make_request(KVM_REQ_EVENT, vcpu);
5622 }
5623
5624 static void kvm_gen_update_masterclock(struct kvm *kvm)
5625 {
5626 #ifdef CONFIG_X86_64
5627         int i;
5628         struct kvm_vcpu *vcpu;
5629         struct kvm_arch *ka = &kvm->arch;
5630
5631         spin_lock(&ka->pvclock_gtod_sync_lock);
5632         kvm_make_mclock_inprogress_request(kvm);
5633         /* no guest entries from this point */
5634         pvclock_update_vm_gtod_copy(kvm);
5635
5636         kvm_for_each_vcpu(i, vcpu, kvm)
5637                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
5638
5639         /* guest entries allowed */
5640         kvm_for_each_vcpu(i, vcpu, kvm)
5641                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
5642
5643         spin_unlock(&ka->pvclock_gtod_sync_lock);
5644 #endif
5645 }
5646
5647 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
5648 {
5649         u64 eoi_exit_bitmap[4];
5650         u32 tmr[8];
5651
5652         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
5653                 return;
5654
5655         memset(eoi_exit_bitmap, 0, 32);
5656         memset(tmr, 0, 32);
5657
5658         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
5659         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
5660         kvm_apic_update_tmr(vcpu, tmr);
5661 }
5662
5663 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5664 {
5665         int r;
5666         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5667                 vcpu->run->request_interrupt_window;
5668         bool req_immediate_exit = false;
5669
5670         if (vcpu->requests) {
5671                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5672                         kvm_mmu_unload(vcpu);
5673                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5674                         __kvm_migrate_timers(vcpu);
5675                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5676                         kvm_gen_update_masterclock(vcpu->kvm);
5677                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5678                         r = kvm_guest_time_update(vcpu);
5679                         if (unlikely(r))
5680                                 goto out;
5681                 }
5682                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5683                         kvm_mmu_sync_roots(vcpu);
5684                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5685                         kvm_x86_ops->tlb_flush(vcpu);
5686                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5687                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5688                         r = 0;
5689                         goto out;
5690                 }
5691                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5692                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5693                         r = 0;
5694                         goto out;
5695                 }
5696                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5697                         vcpu->fpu_active = 0;
5698                         kvm_x86_ops->fpu_deactivate(vcpu);
5699                 }
5700                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5701                         /* Page is swapped out. Do synthetic halt */
5702                         vcpu->arch.apf.halted = true;
5703                         r = 1;
5704                         goto out;
5705                 }
5706                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5707                         record_steal_time(vcpu);
5708                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5709                         process_nmi(vcpu);
5710                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5711                         kvm_handle_pmu_event(vcpu);
5712                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5713                         kvm_deliver_pmi(vcpu);
5714                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
5715                         vcpu_scan_ioapic(vcpu);
5716         }
5717
5718         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5719                 kvm_apic_accept_events(vcpu);
5720                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
5721                         r = 1;
5722                         goto out;
5723                 }
5724
5725                 inject_pending_event(vcpu);
5726
5727                 /* enable NMI/IRQ window open exits if needed */
5728                 if (vcpu->arch.nmi_pending)
5729                         req_immediate_exit =
5730                                 kvm_x86_ops->enable_nmi_window(vcpu) != 0;
5731                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
5732                         req_immediate_exit =
5733                                 kvm_x86_ops->enable_irq_window(vcpu) != 0;
5734
5735                 if (kvm_lapic_enabled(vcpu)) {
5736                         /*
5737                          * Update architecture specific hints for APIC
5738                          * virtual interrupt delivery.
5739                          */
5740                         if (kvm_x86_ops->hwapic_irr_update)
5741                                 kvm_x86_ops->hwapic_irr_update(vcpu,
5742                                         kvm_lapic_find_highest_irr(vcpu));
5743                         update_cr8_intercept(vcpu);
5744                         kvm_lapic_sync_to_vapic(vcpu);
5745                 }
5746         }
5747
5748         r = kvm_mmu_reload(vcpu);
5749         if (unlikely(r)) {
5750                 goto cancel_injection;
5751         }
5752
5753         preempt_disable();
5754
5755         kvm_x86_ops->prepare_guest_switch(vcpu);
5756         if (vcpu->fpu_active)
5757                 kvm_load_guest_fpu(vcpu);
5758         kvm_load_guest_xcr0(vcpu);
5759
5760         vcpu->mode = IN_GUEST_MODE;
5761
5762         /* We should set ->mode before check ->requests,
5763          * see the comment in make_all_cpus_request.
5764          */
5765         smp_mb();
5766
5767         local_irq_disable();
5768
5769         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5770             || need_resched() || signal_pending(current)) {
5771                 vcpu->mode = OUTSIDE_GUEST_MODE;
5772                 smp_wmb();
5773                 local_irq_enable();
5774                 preempt_enable();
5775                 r = 1;
5776                 goto cancel_injection;
5777         }
5778
5779         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5780
5781         if (req_immediate_exit)
5782                 smp_send_reschedule(vcpu->cpu);
5783
5784         kvm_guest_enter();
5785
5786         if (unlikely(vcpu->arch.switch_db_regs)) {
5787                 set_debugreg(0, 7);
5788                 set_debugreg(vcpu->arch.eff_db[0], 0);
5789                 set_debugreg(vcpu->arch.eff_db[1], 1);
5790                 set_debugreg(vcpu->arch.eff_db[2], 2);
5791                 set_debugreg(vcpu->arch.eff_db[3], 3);
5792         }
5793
5794         trace_kvm_entry(vcpu->vcpu_id);
5795         kvm_x86_ops->run(vcpu);
5796
5797         /*
5798          * If the guest has used debug registers, at least dr7
5799          * will be disabled while returning to the host.
5800          * If we don't have active breakpoints in the host, we don't
5801          * care about the messed up debug address registers. But if
5802          * we have some of them active, restore the old state.
5803          */
5804         if (hw_breakpoint_active())
5805                 hw_breakpoint_restore();
5806
5807         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
5808                                                            native_read_tsc());
5809
5810         vcpu->mode = OUTSIDE_GUEST_MODE;
5811         smp_wmb();
5812
5813         /* Interrupt is enabled by handle_external_intr() */
5814         kvm_x86_ops->handle_external_intr(vcpu);
5815
5816         ++vcpu->stat.exits;
5817
5818         /*
5819          * We must have an instruction between local_irq_enable() and
5820          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5821          * the interrupt shadow.  The stat.exits increment will do nicely.
5822          * But we need to prevent reordering, hence this barrier():
5823          */
5824         barrier();
5825
5826         kvm_guest_exit();
5827
5828         preempt_enable();
5829
5830         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5831
5832         /*
5833          * Profile KVM exit RIPs:
5834          */
5835         if (unlikely(prof_on == KVM_PROFILING)) {
5836                 unsigned long rip = kvm_rip_read(vcpu);
5837                 profile_hit(KVM_PROFILING, (void *)rip);
5838         }
5839
5840         if (unlikely(vcpu->arch.tsc_always_catchup))
5841                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5842
5843         if (vcpu->arch.apic_attention)
5844                 kvm_lapic_sync_from_vapic(vcpu);
5845
5846         r = kvm_x86_ops->handle_exit(vcpu);
5847         return r;
5848
5849 cancel_injection:
5850         kvm_x86_ops->cancel_injection(vcpu);
5851         if (unlikely(vcpu->arch.apic_attention))
5852                 kvm_lapic_sync_from_vapic(vcpu);
5853 out:
5854         return r;
5855 }
5856
5857
5858 static int __vcpu_run(struct kvm_vcpu *vcpu)
5859 {
5860         int r;
5861         struct kvm *kvm = vcpu->kvm;
5862
5863         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5864
5865         r = 1;
5866         while (r > 0) {
5867                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5868                     !vcpu->arch.apf.halted)
5869                         r = vcpu_enter_guest(vcpu);
5870                 else {
5871                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5872                         kvm_vcpu_block(vcpu);
5873                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5874                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
5875                                 kvm_apic_accept_events(vcpu);
5876                                 switch(vcpu->arch.mp_state) {
5877                                 case KVM_MP_STATE_HALTED:
5878                                         vcpu->arch.mp_state =
5879                                                 KVM_MP_STATE_RUNNABLE;
5880                                 case KVM_MP_STATE_RUNNABLE:
5881                                         vcpu->arch.apf.halted = false;
5882                                         break;
5883                                 case KVM_MP_STATE_INIT_RECEIVED:
5884                                         break;
5885                                 default:
5886                                         r = -EINTR;
5887                                         break;
5888                                 }
5889                         }
5890                 }
5891
5892                 if (r <= 0)
5893                         break;
5894
5895                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5896                 if (kvm_cpu_has_pending_timer(vcpu))
5897                         kvm_inject_pending_timer_irqs(vcpu);
5898
5899                 if (dm_request_for_irq_injection(vcpu)) {
5900                         r = -EINTR;
5901                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5902                         ++vcpu->stat.request_irq_exits;
5903                 }
5904
5905                 kvm_check_async_pf_completion(vcpu);
5906
5907                 if (signal_pending(current)) {
5908                         r = -EINTR;
5909                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5910                         ++vcpu->stat.signal_exits;
5911                 }
5912                 if (need_resched()) {
5913                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5914                         kvm_resched(vcpu);
5915                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5916                 }
5917         }
5918
5919         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5920
5921         return r;
5922 }
5923
5924 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
5925 {
5926         int r;
5927         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5928         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5929         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5930         if (r != EMULATE_DONE)
5931                 return 0;
5932         return 1;
5933 }
5934
5935 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
5936 {
5937         BUG_ON(!vcpu->arch.pio.count);
5938
5939         return complete_emulated_io(vcpu);
5940 }
5941
5942 /*
5943  * Implements the following, as a state machine:
5944  *
5945  * read:
5946  *   for each fragment
5947  *     for each mmio piece in the fragment
5948  *       write gpa, len
5949  *       exit
5950  *       copy data
5951  *   execute insn
5952  *
5953  * write:
5954  *   for each fragment
5955  *     for each mmio piece in the fragment
5956  *       write gpa, len
5957  *       copy data
5958  *       exit
5959  */
5960 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
5961 {
5962         struct kvm_run *run = vcpu->run;
5963         struct kvm_mmio_fragment *frag;
5964         unsigned len;
5965
5966         BUG_ON(!vcpu->mmio_needed);
5967
5968         /* Complete previous fragment */
5969         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
5970         len = min(8u, frag->len);
5971         if (!vcpu->mmio_is_write)
5972                 memcpy(frag->data, run->mmio.data, len);
5973
5974         if (frag->len <= 8) {
5975                 /* Switch to the next fragment. */
5976                 frag++;
5977                 vcpu->mmio_cur_fragment++;
5978         } else {
5979                 /* Go forward to the next mmio piece. */
5980                 frag->data += len;
5981                 frag->gpa += len;
5982                 frag->len -= len;
5983         }
5984
5985         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
5986                 vcpu->mmio_needed = 0;
5987                 if (vcpu->mmio_is_write)
5988                         return 1;
5989                 vcpu->mmio_read_completed = 1;
5990                 return complete_emulated_io(vcpu);
5991         }
5992
5993         run->exit_reason = KVM_EXIT_MMIO;
5994         run->mmio.phys_addr = frag->gpa;
5995         if (vcpu->mmio_is_write)
5996                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
5997         run->mmio.len = min(8u, frag->len);
5998         run->mmio.is_write = vcpu->mmio_is_write;
5999         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6000         return 0;
6001 }
6002
6003
6004 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6005 {
6006         int r;
6007         sigset_t sigsaved;
6008
6009         if (!tsk_used_math(current) && init_fpu(current))
6010                 return -ENOMEM;
6011
6012         if (vcpu->sigset_active)
6013                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6014
6015         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6016                 kvm_vcpu_block(vcpu);
6017                 kvm_apic_accept_events(vcpu);
6018                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6019                 r = -EAGAIN;
6020                 goto out;
6021         }
6022
6023         /* re-sync apic's tpr */
6024         if (!irqchip_in_kernel(vcpu->kvm)) {
6025                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6026                         r = -EINVAL;
6027                         goto out;
6028                 }
6029         }
6030
6031         if (unlikely(vcpu->arch.complete_userspace_io)) {
6032                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6033                 vcpu->arch.complete_userspace_io = NULL;
6034                 r = cui(vcpu);
6035                 if (r <= 0)
6036                         goto out;
6037         } else
6038                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6039
6040         r = __vcpu_run(vcpu);
6041
6042 out:
6043         post_kvm_run_save(vcpu);
6044         if (vcpu->sigset_active)
6045                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6046
6047         return r;
6048 }
6049
6050 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6051 {
6052         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6053                 /*
6054                  * We are here if userspace calls get_regs() in the middle of
6055                  * instruction emulation. Registers state needs to be copied
6056                  * back from emulation context to vcpu. Userspace shouldn't do
6057                  * that usually, but some bad designed PV devices (vmware
6058                  * backdoor interface) need this to work
6059                  */
6060                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6061                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6062         }
6063         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6064         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6065         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6066         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6067         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6068         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6069         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6070         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6071 #ifdef CONFIG_X86_64
6072         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6073         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6074         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6075         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6076         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6077         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6078         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6079         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6080 #endif
6081
6082         regs->rip = kvm_rip_read(vcpu);
6083         regs->rflags = kvm_get_rflags(vcpu);
6084
6085         return 0;
6086 }
6087
6088 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6089 {
6090         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6091         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6092
6093         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6094         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6095         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6096         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6097         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6098         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6099         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6100         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6101 #ifdef CONFIG_X86_64
6102         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6103         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6104         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6105         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6106         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6107         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6108         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6109         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6110 #endif
6111
6112         kvm_rip_write(vcpu, regs->rip);
6113         kvm_set_rflags(vcpu, regs->rflags);
6114
6115         vcpu->arch.exception.pending = false;
6116
6117         kvm_make_request(KVM_REQ_EVENT, vcpu);
6118
6119         return 0;
6120 }
6121
6122 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6123 {
6124         struct kvm_segment cs;
6125
6126         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6127         *db = cs.db;
6128         *l = cs.l;
6129 }
6130 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6131
6132 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6133                                   struct kvm_sregs *sregs)
6134 {
6135         struct desc_ptr dt;
6136
6137         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6138         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6139         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6140         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6141         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6142         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6143
6144         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6145         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6146
6147         kvm_x86_ops->get_idt(vcpu, &dt);
6148         sregs->idt.limit = dt.size;
6149         sregs->idt.base = dt.address;
6150         kvm_x86_ops->get_gdt(vcpu, &dt);
6151         sregs->gdt.limit = dt.size;
6152         sregs->gdt.base = dt.address;
6153
6154         sregs->cr0 = kvm_read_cr0(vcpu);
6155         sregs->cr2 = vcpu->arch.cr2;
6156         sregs->cr3 = kvm_read_cr3(vcpu);
6157         sregs->cr4 = kvm_read_cr4(vcpu);
6158         sregs->cr8 = kvm_get_cr8(vcpu);
6159         sregs->efer = vcpu->arch.efer;
6160         sregs->apic_base = kvm_get_apic_base(vcpu);
6161
6162         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6163
6164         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6165                 set_bit(vcpu->arch.interrupt.nr,
6166                         (unsigned long *)sregs->interrupt_bitmap);
6167
6168         return 0;
6169 }
6170
6171 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6172                                     struct kvm_mp_state *mp_state)
6173 {
6174         kvm_apic_accept_events(vcpu);
6175         mp_state->mp_state = vcpu->arch.mp_state;
6176         return 0;
6177 }
6178
6179 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6180                                     struct kvm_mp_state *mp_state)
6181 {
6182         if (!kvm_vcpu_has_lapic(vcpu) &&
6183             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6184                 return -EINVAL;
6185
6186         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6187                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6188                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6189         } else
6190                 vcpu->arch.mp_state = mp_state->mp_state;
6191         kvm_make_request(KVM_REQ_EVENT, vcpu);
6192         return 0;
6193 }
6194
6195 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6196                     int reason, bool has_error_code, u32 error_code)
6197 {
6198         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6199         int ret;
6200
6201         init_emulate_ctxt(vcpu);
6202
6203         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6204                                    has_error_code, error_code);
6205
6206         if (ret)
6207                 return EMULATE_FAIL;
6208
6209         kvm_rip_write(vcpu, ctxt->eip);
6210         kvm_set_rflags(vcpu, ctxt->eflags);
6211         kvm_make_request(KVM_REQ_EVENT, vcpu);
6212         return EMULATE_DONE;
6213 }
6214 EXPORT_SYMBOL_GPL(kvm_task_switch);
6215
6216 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6217                                   struct kvm_sregs *sregs)
6218 {
6219         int mmu_reset_needed = 0;
6220         int pending_vec, max_bits, idx;
6221         struct desc_ptr dt;
6222
6223         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6224                 return -EINVAL;
6225
6226         dt.size = sregs->idt.limit;
6227         dt.address = sregs->idt.base;
6228         kvm_x86_ops->set_idt(vcpu, &dt);
6229         dt.size = sregs->gdt.limit;
6230         dt.address = sregs->gdt.base;
6231         kvm_x86_ops->set_gdt(vcpu, &dt);
6232
6233         vcpu->arch.cr2 = sregs->cr2;
6234         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6235         vcpu->arch.cr3 = sregs->cr3;
6236         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6237
6238         kvm_set_cr8(vcpu, sregs->cr8);
6239
6240         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6241         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6242         kvm_set_apic_base(vcpu, sregs->apic_base);
6243
6244         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6245         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6246         vcpu->arch.cr0 = sregs->cr0;
6247
6248         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6249         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6250         if (sregs->cr4 & X86_CR4_OSXSAVE)
6251                 kvm_update_cpuid(vcpu);
6252
6253         idx = srcu_read_lock(&vcpu->kvm->srcu);
6254         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6255                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6256                 mmu_reset_needed = 1;
6257         }
6258         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6259
6260         if (mmu_reset_needed)
6261                 kvm_mmu_reset_context(vcpu);
6262
6263         max_bits = KVM_NR_INTERRUPTS;
6264         pending_vec = find_first_bit(
6265                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6266         if (pending_vec < max_bits) {
6267                 kvm_queue_interrupt(vcpu, pending_vec, false);
6268                 pr_debug("Set back pending irq %d\n", pending_vec);
6269         }
6270
6271         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6272         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6273         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6274         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6275         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6276         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6277
6278         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6279         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6280
6281         update_cr8_intercept(vcpu);
6282
6283         /* Older userspace won't unhalt the vcpu on reset. */
6284         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6285             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6286             !is_protmode(vcpu))
6287                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6288
6289         kvm_make_request(KVM_REQ_EVENT, vcpu);
6290
6291         return 0;
6292 }
6293
6294 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6295                                         struct kvm_guest_debug *dbg)
6296 {
6297         unsigned long rflags;
6298         int i, r;
6299
6300         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6301                 r = -EBUSY;
6302                 if (vcpu->arch.exception.pending)
6303                         goto out;
6304                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6305                         kvm_queue_exception(vcpu, DB_VECTOR);
6306                 else
6307                         kvm_queue_exception(vcpu, BP_VECTOR);
6308         }
6309
6310         /*
6311          * Read rflags as long as potentially injected trace flags are still
6312          * filtered out.
6313          */
6314         rflags = kvm_get_rflags(vcpu);
6315
6316         vcpu->guest_debug = dbg->control;
6317         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6318                 vcpu->guest_debug = 0;
6319
6320         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6321                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6322                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6323                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6324         } else {
6325                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6326                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6327         }
6328         kvm_update_dr7(vcpu);
6329
6330         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6331                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6332                         get_segment_base(vcpu, VCPU_SREG_CS);
6333
6334         /*
6335          * Trigger an rflags update that will inject or remove the trace
6336          * flags.
6337          */
6338         kvm_set_rflags(vcpu, rflags);
6339
6340         kvm_x86_ops->update_db_bp_intercept(vcpu);
6341
6342         r = 0;
6343
6344 out:
6345
6346         return r;
6347 }
6348
6349 /*
6350  * Translate a guest virtual address to a guest physical address.
6351  */
6352 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6353                                     struct kvm_translation *tr)
6354 {
6355         unsigned long vaddr = tr->linear_address;
6356         gpa_t gpa;
6357         int idx;
6358
6359         idx = srcu_read_lock(&vcpu->kvm->srcu);
6360         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6361         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6362         tr->physical_address = gpa;
6363         tr->valid = gpa != UNMAPPED_GVA;
6364         tr->writeable = 1;
6365         tr->usermode = 0;
6366
6367         return 0;
6368 }
6369
6370 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6371 {
6372         struct i387_fxsave_struct *fxsave =
6373                         &vcpu->arch.guest_fpu.state->fxsave;
6374
6375         memcpy(fpu->fpr, fxsave->st_space, 128);
6376         fpu->fcw = fxsave->cwd;
6377         fpu->fsw = fxsave->swd;
6378         fpu->ftwx = fxsave->twd;
6379         fpu->last_opcode = fxsave->fop;
6380         fpu->last_ip = fxsave->rip;
6381         fpu->last_dp = fxsave->rdp;
6382         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6383
6384         return 0;
6385 }
6386
6387 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6388 {
6389         struct i387_fxsave_struct *fxsave =
6390                         &vcpu->arch.guest_fpu.state->fxsave;
6391
6392         memcpy(fxsave->st_space, fpu->fpr, 128);
6393         fxsave->cwd = fpu->fcw;
6394         fxsave->swd = fpu->fsw;
6395         fxsave->twd = fpu->ftwx;
6396         fxsave->fop = fpu->last_opcode;
6397         fxsave->rip = fpu->last_ip;
6398         fxsave->rdp = fpu->last_dp;
6399         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6400
6401         return 0;
6402 }
6403
6404 int fx_init(struct kvm_vcpu *vcpu)
6405 {
6406         int err;
6407
6408         err = fpu_alloc(&vcpu->arch.guest_fpu);
6409         if (err)
6410                 return err;
6411
6412         fpu_finit(&vcpu->arch.guest_fpu);
6413
6414         /*
6415          * Ensure guest xcr0 is valid for loading
6416          */
6417         vcpu->arch.xcr0 = XSTATE_FP;
6418
6419         vcpu->arch.cr0 |= X86_CR0_ET;
6420
6421         return 0;
6422 }
6423 EXPORT_SYMBOL_GPL(fx_init);
6424
6425 static void fx_free(struct kvm_vcpu *vcpu)
6426 {
6427         fpu_free(&vcpu->arch.guest_fpu);
6428 }
6429
6430 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6431 {
6432         if (vcpu->guest_fpu_loaded)
6433                 return;
6434
6435         /*
6436          * Restore all possible states in the guest,
6437          * and assume host would use all available bits.
6438          * Guest xcr0 would be loaded later.
6439          */
6440         kvm_put_guest_xcr0(vcpu);
6441         vcpu->guest_fpu_loaded = 1;
6442         __kernel_fpu_begin();
6443         fpu_restore_checking(&vcpu->arch.guest_fpu);
6444         trace_kvm_fpu(1);
6445 }
6446
6447 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6448 {
6449         kvm_put_guest_xcr0(vcpu);
6450
6451         if (!vcpu->guest_fpu_loaded)
6452                 return;
6453
6454         vcpu->guest_fpu_loaded = 0;
6455         fpu_save_init(&vcpu->arch.guest_fpu);
6456         __kernel_fpu_end();
6457         ++vcpu->stat.fpu_reload;
6458         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6459         trace_kvm_fpu(0);
6460 }
6461
6462 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6463 {
6464         kvmclock_reset(vcpu);
6465
6466         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6467         fx_free(vcpu);
6468         kvm_x86_ops->vcpu_free(vcpu);
6469 }
6470
6471 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6472                                                 unsigned int id)
6473 {
6474         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6475                 printk_once(KERN_WARNING
6476                 "kvm: SMP vm created on host with unstable TSC; "
6477                 "guest TSC will not be reliable\n");
6478         return kvm_x86_ops->vcpu_create(kvm, id);
6479 }
6480
6481 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6482 {
6483         int r;
6484
6485         vcpu->arch.mtrr_state.have_fixed = 1;
6486         r = vcpu_load(vcpu);
6487         if (r)
6488                 return r;
6489         kvm_vcpu_reset(vcpu);
6490         r = kvm_mmu_setup(vcpu);
6491         vcpu_put(vcpu);
6492
6493         return r;
6494 }
6495
6496 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6497 {
6498         int r;
6499         struct msr_data msr;
6500
6501         r = vcpu_load(vcpu);
6502         if (r)
6503                 return r;
6504         msr.data = 0x0;
6505         msr.index = MSR_IA32_TSC;
6506         msr.host_initiated = true;
6507         kvm_write_tsc(vcpu, &msr);
6508         vcpu_put(vcpu);
6509
6510         return r;
6511 }
6512
6513 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6514 {
6515         int r;
6516         vcpu->arch.apf.msr_val = 0;
6517
6518         r = vcpu_load(vcpu);
6519         BUG_ON(r);
6520         kvm_mmu_unload(vcpu);
6521         vcpu_put(vcpu);
6522
6523         fx_free(vcpu);
6524         kvm_x86_ops->vcpu_free(vcpu);
6525 }
6526
6527 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6528 {
6529         atomic_set(&vcpu->arch.nmi_queued, 0);
6530         vcpu->arch.nmi_pending = 0;
6531         vcpu->arch.nmi_injected = false;
6532
6533         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6534         vcpu->arch.dr6 = DR6_FIXED_1;
6535         vcpu->arch.dr7 = DR7_FIXED_1;
6536         kvm_update_dr7(vcpu);
6537
6538         kvm_make_request(KVM_REQ_EVENT, vcpu);
6539         vcpu->arch.apf.msr_val = 0;
6540         vcpu->arch.st.msr_val = 0;
6541
6542         kvmclock_reset(vcpu);
6543
6544         kvm_clear_async_pf_completion_queue(vcpu);
6545         kvm_async_pf_hash_reset(vcpu);
6546         vcpu->arch.apf.halted = false;
6547
6548         kvm_pmu_reset(vcpu);
6549
6550         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6551         vcpu->arch.regs_avail = ~0;
6552         vcpu->arch.regs_dirty = ~0;
6553
6554         kvm_x86_ops->vcpu_reset(vcpu);
6555 }
6556
6557 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector)
6558 {
6559         struct kvm_segment cs;
6560
6561         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6562         cs.selector = vector << 8;
6563         cs.base = vector << 12;
6564         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6565         kvm_rip_write(vcpu, 0);
6566 }
6567
6568 int kvm_arch_hardware_enable(void *garbage)
6569 {
6570         struct kvm *kvm;
6571         struct kvm_vcpu *vcpu;
6572         int i;
6573         int ret;
6574         u64 local_tsc;
6575         u64 max_tsc = 0;
6576         bool stable, backwards_tsc = false;
6577
6578         kvm_shared_msr_cpu_online();
6579         ret = kvm_x86_ops->hardware_enable(garbage);
6580         if (ret != 0)
6581                 return ret;
6582
6583         local_tsc = native_read_tsc();
6584         stable = !check_tsc_unstable();
6585         list_for_each_entry(kvm, &vm_list, vm_list) {
6586                 kvm_for_each_vcpu(i, vcpu, kvm) {
6587                         if (!stable && vcpu->cpu == smp_processor_id())
6588                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6589                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6590                                 backwards_tsc = true;
6591                                 if (vcpu->arch.last_host_tsc > max_tsc)
6592                                         max_tsc = vcpu->arch.last_host_tsc;
6593                         }
6594                 }
6595         }
6596
6597         /*
6598          * Sometimes, even reliable TSCs go backwards.  This happens on
6599          * platforms that reset TSC during suspend or hibernate actions, but
6600          * maintain synchronization.  We must compensate.  Fortunately, we can
6601          * detect that condition here, which happens early in CPU bringup,
6602          * before any KVM threads can be running.  Unfortunately, we can't
6603          * bring the TSCs fully up to date with real time, as we aren't yet far
6604          * enough into CPU bringup that we know how much real time has actually
6605          * elapsed; our helper function, get_kernel_ns() will be using boot
6606          * variables that haven't been updated yet.
6607          *
6608          * So we simply find the maximum observed TSC above, then record the
6609          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6610          * the adjustment will be applied.  Note that we accumulate
6611          * adjustments, in case multiple suspend cycles happen before some VCPU
6612          * gets a chance to run again.  In the event that no KVM threads get a
6613          * chance to run, we will miss the entire elapsed period, as we'll have
6614          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6615          * loose cycle time.  This isn't too big a deal, since the loss will be
6616          * uniform across all VCPUs (not to mention the scenario is extremely
6617          * unlikely). It is possible that a second hibernate recovery happens
6618          * much faster than a first, causing the observed TSC here to be
6619          * smaller; this would require additional padding adjustment, which is
6620          * why we set last_host_tsc to the local tsc observed here.
6621          *
6622          * N.B. - this code below runs only on platforms with reliable TSC,
6623          * as that is the only way backwards_tsc is set above.  Also note
6624          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6625          * have the same delta_cyc adjustment applied if backwards_tsc
6626          * is detected.  Note further, this adjustment is only done once,
6627          * as we reset last_host_tsc on all VCPUs to stop this from being
6628          * called multiple times (one for each physical CPU bringup).
6629          *
6630          * Platforms with unreliable TSCs don't have to deal with this, they
6631          * will be compensated by the logic in vcpu_load, which sets the TSC to
6632          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6633          * guarantee that they stay in perfect synchronization.
6634          */
6635         if (backwards_tsc) {
6636                 u64 delta_cyc = max_tsc - local_tsc;
6637                 list_for_each_entry(kvm, &vm_list, vm_list) {
6638                         kvm_for_each_vcpu(i, vcpu, kvm) {
6639                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6640                                 vcpu->arch.last_host_tsc = local_tsc;
6641                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6642                                         &vcpu->requests);
6643                         }
6644
6645                         /*
6646                          * We have to disable TSC offset matching.. if you were
6647                          * booting a VM while issuing an S4 host suspend....
6648                          * you may have some problem.  Solving this issue is
6649                          * left as an exercise to the reader.
6650                          */
6651                         kvm->arch.last_tsc_nsec = 0;
6652                         kvm->arch.last_tsc_write = 0;
6653                 }
6654
6655         }
6656         return 0;
6657 }
6658
6659 void kvm_arch_hardware_disable(void *garbage)
6660 {
6661         kvm_x86_ops->hardware_disable(garbage);
6662         drop_user_return_notifiers(garbage);
6663 }
6664
6665 int kvm_arch_hardware_setup(void)
6666 {
6667         return kvm_x86_ops->hardware_setup();
6668 }
6669
6670 void kvm_arch_hardware_unsetup(void)
6671 {
6672         kvm_x86_ops->hardware_unsetup();
6673 }
6674
6675 void kvm_arch_check_processor_compat(void *rtn)
6676 {
6677         kvm_x86_ops->check_processor_compatibility(rtn);
6678 }
6679
6680 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6681 {
6682         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6683 }
6684
6685 struct static_key kvm_no_apic_vcpu __read_mostly;
6686
6687 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6688 {
6689         struct page *page;
6690         struct kvm *kvm;
6691         int r;
6692
6693         BUG_ON(vcpu->kvm == NULL);
6694         kvm = vcpu->kvm;
6695
6696         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6697         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6698                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6699         else
6700                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6701
6702         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6703         if (!page) {
6704                 r = -ENOMEM;
6705                 goto fail;
6706         }
6707         vcpu->arch.pio_data = page_address(page);
6708
6709         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6710
6711         r = kvm_mmu_create(vcpu);
6712         if (r < 0)
6713                 goto fail_free_pio_data;
6714
6715         if (irqchip_in_kernel(kvm)) {
6716                 r = kvm_create_lapic(vcpu);
6717                 if (r < 0)
6718                         goto fail_mmu_destroy;
6719         } else
6720                 static_key_slow_inc(&kvm_no_apic_vcpu);
6721
6722         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6723                                        GFP_KERNEL);
6724         if (!vcpu->arch.mce_banks) {
6725                 r = -ENOMEM;
6726                 goto fail_free_lapic;
6727         }
6728         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6729
6730         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
6731                 r = -ENOMEM;
6732                 goto fail_free_mce_banks;
6733         }
6734
6735         r = fx_init(vcpu);
6736         if (r)
6737                 goto fail_free_wbinvd_dirty_mask;
6738
6739         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
6740         vcpu->arch.pv_time_enabled = false;
6741         kvm_async_pf_hash_reset(vcpu);
6742         kvm_pmu_init(vcpu);
6743
6744         return 0;
6745 fail_free_wbinvd_dirty_mask:
6746         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6747 fail_free_mce_banks:
6748         kfree(vcpu->arch.mce_banks);
6749 fail_free_lapic:
6750         kvm_free_lapic(vcpu);
6751 fail_mmu_destroy:
6752         kvm_mmu_destroy(vcpu);
6753 fail_free_pio_data:
6754         free_page((unsigned long)vcpu->arch.pio_data);
6755 fail:
6756         return r;
6757 }
6758
6759 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6760 {
6761         int idx;
6762
6763         kvm_pmu_destroy(vcpu);
6764         kfree(vcpu->arch.mce_banks);
6765         kvm_free_lapic(vcpu);
6766         idx = srcu_read_lock(&vcpu->kvm->srcu);
6767         kvm_mmu_destroy(vcpu);
6768         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6769         free_page((unsigned long)vcpu->arch.pio_data);
6770         if (!irqchip_in_kernel(vcpu->kvm))
6771                 static_key_slow_dec(&kvm_no_apic_vcpu);
6772 }
6773
6774 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6775 {
6776         if (type)
6777                 return -EINVAL;
6778
6779         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6780         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6781
6782         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6783         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6784         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6785         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
6786                 &kvm->arch.irq_sources_bitmap);
6787
6788         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6789         mutex_init(&kvm->arch.apic_map_lock);
6790         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
6791
6792         pvclock_update_vm_gtod_copy(kvm);
6793
6794         return 0;
6795 }
6796
6797 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6798 {
6799         int r;
6800         r = vcpu_load(vcpu);
6801         BUG_ON(r);
6802         kvm_mmu_unload(vcpu);
6803         vcpu_put(vcpu);
6804 }
6805
6806 static void kvm_free_vcpus(struct kvm *kvm)
6807 {
6808         unsigned int i;
6809         struct kvm_vcpu *vcpu;
6810
6811         /*
6812          * Unpin any mmu pages first.
6813          */
6814         kvm_for_each_vcpu(i, vcpu, kvm) {
6815                 kvm_clear_async_pf_completion_queue(vcpu);
6816                 kvm_unload_vcpu_mmu(vcpu);
6817         }
6818         kvm_for_each_vcpu(i, vcpu, kvm)
6819                 kvm_arch_vcpu_free(vcpu);
6820
6821         mutex_lock(&kvm->lock);
6822         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6823                 kvm->vcpus[i] = NULL;
6824
6825         atomic_set(&kvm->online_vcpus, 0);
6826         mutex_unlock(&kvm->lock);
6827 }
6828
6829 void kvm_arch_sync_events(struct kvm *kvm)
6830 {
6831         kvm_free_all_assigned_devices(kvm);
6832         kvm_free_pit(kvm);
6833 }
6834
6835 void kvm_arch_destroy_vm(struct kvm *kvm)
6836 {
6837         if (current->mm == kvm->mm) {
6838                 /*
6839                  * Free memory regions allocated on behalf of userspace,
6840                  * unless the the memory map has changed due to process exit
6841                  * or fd copying.
6842                  */
6843                 struct kvm_userspace_memory_region mem;
6844                 memset(&mem, 0, sizeof(mem));
6845                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
6846                 kvm_set_memory_region(kvm, &mem);
6847
6848                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
6849                 kvm_set_memory_region(kvm, &mem);
6850
6851                 mem.slot = TSS_PRIVATE_MEMSLOT;
6852                 kvm_set_memory_region(kvm, &mem);
6853         }
6854         kvm_iommu_unmap_guest(kvm);
6855         kfree(kvm->arch.vpic);
6856         kfree(kvm->arch.vioapic);
6857         kvm_free_vcpus(kvm);
6858         if (kvm->arch.apic_access_page)
6859                 put_page(kvm->arch.apic_access_page);
6860         if (kvm->arch.ept_identity_pagetable)
6861                 put_page(kvm->arch.ept_identity_pagetable);
6862         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
6863 }
6864
6865 void kvm_arch_free_memslot(struct kvm_memory_slot *free,
6866                            struct kvm_memory_slot *dont)
6867 {
6868         int i;
6869
6870         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6871                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
6872                         kvm_kvfree(free->arch.rmap[i]);
6873                         free->arch.rmap[i] = NULL;
6874                 }
6875                 if (i == 0)
6876                         continue;
6877
6878                 if (!dont || free->arch.lpage_info[i - 1] !=
6879                              dont->arch.lpage_info[i - 1]) {
6880                         kvm_kvfree(free->arch.lpage_info[i - 1]);
6881                         free->arch.lpage_info[i - 1] = NULL;
6882                 }
6883         }
6884 }
6885
6886 int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
6887 {
6888         int i;
6889
6890         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6891                 unsigned long ugfn;
6892                 int lpages;
6893                 int level = i + 1;
6894
6895                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
6896                                       slot->base_gfn, level) + 1;
6897
6898                 slot->arch.rmap[i] =
6899                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
6900                 if (!slot->arch.rmap[i])
6901                         goto out_free;
6902                 if (i == 0)
6903                         continue;
6904
6905                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
6906                                         sizeof(*slot->arch.lpage_info[i - 1]));
6907                 if (!slot->arch.lpage_info[i - 1])
6908                         goto out_free;
6909
6910                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
6911                         slot->arch.lpage_info[i - 1][0].write_count = 1;
6912                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
6913                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
6914                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
6915                 /*
6916                  * If the gfn and userspace address are not aligned wrt each
6917                  * other, or if explicitly asked to, disable large page
6918                  * support for this slot
6919                  */
6920                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
6921                     !kvm_largepages_enabled()) {
6922                         unsigned long j;
6923
6924                         for (j = 0; j < lpages; ++j)
6925                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
6926                 }
6927         }
6928
6929         return 0;
6930
6931 out_free:
6932         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6933                 kvm_kvfree(slot->arch.rmap[i]);
6934                 slot->arch.rmap[i] = NULL;
6935                 if (i == 0)
6936                         continue;
6937
6938                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
6939                 slot->arch.lpage_info[i - 1] = NULL;
6940         }
6941         return -ENOMEM;
6942 }
6943
6944 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6945                                 struct kvm_memory_slot *memslot,
6946                                 struct kvm_userspace_memory_region *mem,
6947                                 enum kvm_mr_change change)
6948 {
6949         /*
6950          * Only private memory slots need to be mapped here since
6951          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
6952          */
6953         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
6954                 unsigned long userspace_addr;
6955
6956                 /*
6957                  * MAP_SHARED to prevent internal slot pages from being moved
6958                  * by fork()/COW.
6959                  */
6960                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
6961                                          PROT_READ | PROT_WRITE,
6962                                          MAP_SHARED | MAP_ANONYMOUS, 0);
6963
6964                 if (IS_ERR((void *)userspace_addr))
6965                         return PTR_ERR((void *)userspace_addr);
6966
6967                 memslot->userspace_addr = userspace_addr;
6968         }
6969
6970         return 0;
6971 }
6972
6973 void kvm_arch_commit_memory_region(struct kvm *kvm,
6974                                 struct kvm_userspace_memory_region *mem,
6975                                 const struct kvm_memory_slot *old,
6976                                 enum kvm_mr_change change)
6977 {
6978
6979         int nr_mmu_pages = 0;
6980
6981         if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
6982                 int ret;
6983
6984                 ret = vm_munmap(old->userspace_addr,
6985                                 old->npages * PAGE_SIZE);
6986                 if (ret < 0)
6987                         printk(KERN_WARNING
6988                                "kvm_vm_ioctl_set_memory_region: "
6989                                "failed to munmap memory\n");
6990         }
6991
6992         if (!kvm->arch.n_requested_mmu_pages)
6993                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6994
6995         if (nr_mmu_pages)
6996                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6997         /*
6998          * Write protect all pages for dirty logging.
6999          * Existing largepage mappings are destroyed here and new ones will
7000          * not be created until the end of the logging.
7001          */
7002         if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
7003                 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
7004         /*
7005          * If memory slot is created, or moved, we need to clear all
7006          * mmio sptes.
7007          */
7008         if ((change == KVM_MR_CREATE) || (change == KVM_MR_MOVE)) {
7009                 kvm_mmu_zap_mmio_sptes(kvm);
7010                 kvm_reload_remote_mmus(kvm);
7011         }
7012 }
7013
7014 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7015 {
7016         kvm_mmu_zap_all(kvm);
7017         kvm_reload_remote_mmus(kvm);
7018 }
7019
7020 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7021                                    struct kvm_memory_slot *slot)
7022 {
7023         kvm_arch_flush_shadow_all(kvm);
7024 }
7025
7026 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7027 {
7028         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7029                 !vcpu->arch.apf.halted)
7030                 || !list_empty_careful(&vcpu->async_pf.done)
7031                 || kvm_apic_has_events(vcpu)
7032                 || atomic_read(&vcpu->arch.nmi_queued) ||
7033                 (kvm_arch_interrupt_allowed(vcpu) &&
7034                  kvm_cpu_has_interrupt(vcpu));
7035 }
7036
7037 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7038 {
7039         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7040 }
7041
7042 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7043 {
7044         return kvm_x86_ops->interrupt_allowed(vcpu);
7045 }
7046
7047 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7048 {
7049         unsigned long current_rip = kvm_rip_read(vcpu) +
7050                 get_segment_base(vcpu, VCPU_SREG_CS);
7051
7052         return current_rip == linear_rip;
7053 }
7054 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7055
7056 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7057 {
7058         unsigned long rflags;
7059
7060         rflags = kvm_x86_ops->get_rflags(vcpu);
7061         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7062                 rflags &= ~X86_EFLAGS_TF;
7063         return rflags;
7064 }
7065 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7066
7067 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7068 {
7069         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7070             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7071                 rflags |= X86_EFLAGS_TF;
7072         kvm_x86_ops->set_rflags(vcpu, rflags);
7073         kvm_make_request(KVM_REQ_EVENT, vcpu);
7074 }
7075 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7076
7077 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7078 {
7079         int r;
7080
7081         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7082               is_error_page(work->page))
7083                 return;
7084
7085         r = kvm_mmu_reload(vcpu);
7086         if (unlikely(r))
7087                 return;
7088
7089         if (!vcpu->arch.mmu.direct_map &&
7090               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7091                 return;
7092
7093         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7094 }
7095
7096 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7097 {
7098         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7099 }
7100
7101 static inline u32 kvm_async_pf_next_probe(u32 key)
7102 {
7103         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7104 }
7105
7106 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7107 {
7108         u32 key = kvm_async_pf_hash_fn(gfn);
7109
7110         while (vcpu->arch.apf.gfns[key] != ~0)
7111                 key = kvm_async_pf_next_probe(key);
7112
7113         vcpu->arch.apf.gfns[key] = gfn;
7114 }
7115
7116 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7117 {
7118         int i;
7119         u32 key = kvm_async_pf_hash_fn(gfn);
7120
7121         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7122                      (vcpu->arch.apf.gfns[key] != gfn &&
7123                       vcpu->arch.apf.gfns[key] != ~0); i++)
7124                 key = kvm_async_pf_next_probe(key);
7125
7126         return key;
7127 }
7128
7129 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7130 {
7131         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7132 }
7133
7134 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7135 {
7136         u32 i, j, k;
7137
7138         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7139         while (true) {
7140                 vcpu->arch.apf.gfns[i] = ~0;
7141                 do {
7142                         j = kvm_async_pf_next_probe(j);
7143                         if (vcpu->arch.apf.gfns[j] == ~0)
7144                                 return;
7145                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7146                         /*
7147                          * k lies cyclically in ]i,j]
7148                          * |    i.k.j |
7149                          * |....j i.k.| or  |.k..j i...|
7150                          */
7151                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7152                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7153                 i = j;
7154         }
7155 }
7156
7157 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7158 {
7159
7160         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7161                                       sizeof(val));
7162 }
7163
7164 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7165                                      struct kvm_async_pf *work)
7166 {
7167         struct x86_exception fault;
7168
7169         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7170         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7171
7172         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7173             (vcpu->arch.apf.send_user_only &&
7174              kvm_x86_ops->get_cpl(vcpu) == 0))
7175                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7176         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7177                 fault.vector = PF_VECTOR;
7178                 fault.error_code_valid = true;
7179                 fault.error_code = 0;
7180                 fault.nested_page_fault = false;
7181                 fault.address = work->arch.token;
7182                 kvm_inject_page_fault(vcpu, &fault);
7183         }
7184 }
7185
7186 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7187                                  struct kvm_async_pf *work)
7188 {
7189         struct x86_exception fault;
7190
7191         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7192         if (is_error_page(work->page))
7193                 work->arch.token = ~0; /* broadcast wakeup */
7194         else
7195                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7196
7197         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7198             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7199                 fault.vector = PF_VECTOR;
7200                 fault.error_code_valid = true;
7201                 fault.error_code = 0;
7202                 fault.nested_page_fault = false;
7203                 fault.address = work->arch.token;
7204                 kvm_inject_page_fault(vcpu, &fault);
7205         }
7206         vcpu->arch.apf.halted = false;
7207         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7208 }
7209
7210 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7211 {
7212         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7213                 return true;
7214         else
7215                 return !kvm_event_needs_reinjection(vcpu) &&
7216                         kvm_x86_ops->interrupt_allowed(vcpu);
7217 }
7218
7219 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7220 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7221 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7222 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7223 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7224 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7225 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7226 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7227 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7228 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7229 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7230 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);