arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <trace/events/kvm.h>
  55
  56 #define CREATE_TRACE_POINTS
  57 #include "trace.h"
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67
  68 #define MAX_IO_MSRS 256
  69 #define KVM_MAX_MCE_BANKS 32
  70 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  71
  72 #define emul_to_vcpu(ctxt) \
  73         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  74
  75 /* EFER defaults:
  76  * - enable syscall per default because its emulated by KVM
  77  * - enable LME and LMA per default on 64 bit KVM
  78  */
  79 #ifdef CONFIG_X86_64
  80 static
  81 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  82 #else
  83 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  84 #endif
  85
  86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  88
  89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  90 static void process_nmi(struct kvm_vcpu *vcpu);
  91 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  92
  93 struct kvm_x86_ops *kvm_x86_ops;
  94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  95
  96 static bool ignore_msrs = 0;
  97 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  98
  99 unsigned int min_timer_period_us = 500;
 100 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 101
 102 static bool __read_mostly kvmclock_periodic_sync = true;
 103 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 104
 105 bool kvm_has_tsc_control;
 106 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 107 u32  kvm_max_guest_tsc_khz;
 108 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 109
 110 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 111 static u32 tsc_tolerance_ppm = 250;
 112 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 113
 114 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 115 unsigned int lapic_timer_advance_ns = 0;
 116 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 117
 118 static bool backwards_tsc_observed = false;
 119
 120 #define KVM_NR_SHARED_MSRS 16
 121
 122 struct kvm_shared_msrs_global {
 123         int nr;
 124         u32 msrs[KVM_NR_SHARED_MSRS];
 125 };
 126
 127 struct kvm_shared_msrs {
 128         struct user_return_notifier urn;
 129         bool registered;
 130         struct kvm_shared_msr_values {
 131                 u64 host;
 132                 u64 curr;
 133         } values[KVM_NR_SHARED_MSRS];
 134 };
 135
 136 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 137 static struct kvm_shared_msrs __percpu *shared_msrs;
 138
 139 struct kvm_stats_debugfs_item debugfs_entries[] = {
 140         { "pf_fixed", VCPU_STAT(pf_fixed) },
 141         { "pf_guest", VCPU_STAT(pf_guest) },
 142         { "tlb_flush", VCPU_STAT(tlb_flush) },
 143         { "invlpg", VCPU_STAT(invlpg) },
 144         { "exits", VCPU_STAT(exits) },
 145         { "io_exits", VCPU_STAT(io_exits) },
 146         { "mmio_exits", VCPU_STAT(mmio_exits) },
 147         { "signal_exits", VCPU_STAT(signal_exits) },
 148         { "irq_window", VCPU_STAT(irq_window_exits) },
 149         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 150         { "halt_exits", VCPU_STAT(halt_exits) },
 151         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 152         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 153         { "hypercalls", VCPU_STAT(hypercalls) },
 154         { "request_irq", VCPU_STAT(request_irq_exits) },
 155         { "irq_exits", VCPU_STAT(irq_exits) },
 156         { "host_state_reload", VCPU_STAT(host_state_reload) },
 157         { "efer_reload", VCPU_STAT(efer_reload) },
 158         { "fpu_reload", VCPU_STAT(fpu_reload) },
 159         { "insn_emulation", VCPU_STAT(insn_emulation) },
 160         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 161         { "irq_injections", VCPU_STAT(irq_injections) },
 162         { "nmi_injections", VCPU_STAT(nmi_injections) },
 163         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 164         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 165         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 166         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 167         { "mmu_flooded", VM_STAT(mmu_flooded) },
 168         { "mmu_recycled", VM_STAT(mmu_recycled) },
 169         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 170         { "mmu_unsync", VM_STAT(mmu_unsync) },
 171         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 172         { "largepages", VM_STAT(lpages) },
 173         { NULL }
 174 };
 175
 176 u64 __read_mostly host_xcr0;
 177
 178 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 179
 180 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 181 {
 182         int i;
 183         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 184                 vcpu->arch.apf.gfns[i] = ~0;
 185 }
 186
 187 static void kvm_on_user_return(struct user_return_notifier *urn)
 188 {
 189         unsigned slot;
 190         struct kvm_shared_msrs *locals
 191                 = container_of(urn, struct kvm_shared_msrs, urn);
 192         struct kvm_shared_msr_values *values;
 193
 194         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 195                 values = &locals->values[slot];
 196                 if (values->host != values->curr) {
 197                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 198                         values->curr = values->host;
 199                 }
 200         }
 201         locals->registered = false;
 202         user_return_notifier_unregister(urn);
 203 }
 204
 205 static void shared_msr_update(unsigned slot, u32 msr)
 206 {
 207         u64 value;
 208         unsigned int cpu = smp_processor_id();
 209         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 210
 211         /* only read, and nobody should modify it at this time,
 212          * so don't need lock */
 213         if (slot >= shared_msrs_global.nr) {
 214                 printk(KERN_ERR "kvm: invalid MSR slot!");
 215                 return;
 216         }
 217         rdmsrl_safe(msr, &value);
 218         smsr->values[slot].host = value;
 219         smsr->values[slot].curr = value;
 220 }
 221
 222 void kvm_define_shared_msr(unsigned slot, u32 msr)
 223 {
 224         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 225         shared_msrs_global.msrs[slot] = msr;
 226         if (slot >= shared_msrs_global.nr)
 227                 shared_msrs_global.nr = slot + 1;
 228 }
 229 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 230
 231 static void kvm_shared_msr_cpu_online(void)
 232 {
 233         unsigned i;
 234
 235         for (i = 0; i < shared_msrs_global.nr; ++i)
 236                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 237 }
 238
 239 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 240 {
 241         unsigned int cpu = smp_processor_id();
 242         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 243         int err;
 244
 245         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 246                 return 0;
 247         smsr->values[slot].curr = value;
 248         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 249         if (err)
 250                 return 1;
 251
 252         if (!smsr->registered) {
 253                 smsr->urn.on_user_return = kvm_on_user_return;
 254                 user_return_notifier_register(&smsr->urn);
 255                 smsr->registered = true;
 256         }
 257         return 0;
 258 }
 259 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 260
 261 static void drop_user_return_notifiers(void)
 262 {
 263         unsigned int cpu = smp_processor_id();
 264         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 265
 266         if (smsr->registered)
 267                 kvm_on_user_return(&smsr->urn);
 268 }
 269
 270 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 271 {
 272         return vcpu->arch.apic_base;
 273 }
 274 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 275
 276 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 277 {
 278         u64 old_state = vcpu->arch.apic_base &
 279                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 280         u64 new_state = msr_info->data &
 281                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 282         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 283                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 284
 285         if (!msr_info->host_initiated &&
 286             ((msr_info->data & reserved_bits) != 0 ||
 287              new_state == X2APIC_ENABLE ||
 288              (new_state == MSR_IA32_APICBASE_ENABLE &&
 289               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 290              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 291               old_state == 0)))
 292                 return 1;
 293
 294         kvm_lapic_set_base(vcpu, msr_info->data);
 295         return 0;
 296 }
 297 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 298
 299 asmlinkage __visible void kvm_spurious_fault(void)
 300 {
 301         /* Fault while not rebooting.  We want the trace. */
 302         BUG();
 303 }
 304 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 305
 306 #define EXCPT_BENIGN            0
 307 #define EXCPT_CONTRIBUTORY      1
 308 #define EXCPT_PF                2
 309
 310 static int exception_class(int vector)
 311 {
 312         switch (vector) {
 313         case PF_VECTOR:
 314                 return EXCPT_PF;
 315         case DE_VECTOR:
 316         case TS_VECTOR:
 317         case NP_VECTOR:
 318         case SS_VECTOR:
 319         case GP_VECTOR:
 320                 return EXCPT_CONTRIBUTORY;
 321         default:
 322                 break;
 323         }
 324         return EXCPT_BENIGN;
 325 }
 326
 327 #define EXCPT_FAULT             0
 328 #define EXCPT_TRAP              1
 329 #define EXCPT_ABORT             2
 330 #define EXCPT_INTERRUPT         3
 331
 332 static int exception_type(int vector)
 333 {
 334         unsigned int mask;
 335
 336         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 337                 return EXCPT_INTERRUPT;
 338
 339         mask = 1 << vector;
 340
 341         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 342         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 343                 return EXCPT_TRAP;
 344
 345         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 346                 return EXCPT_ABORT;
 347
 348         /* Reserved exceptions will result in fault */
 349         return EXCPT_FAULT;
 350 }
 351
 352 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 353                 unsigned nr, bool has_error, u32 error_code,
 354                 bool reinject)
 355 {
 356         u32 prev_nr;
 357         int class1, class2;
 358
 359         kvm_make_request(KVM_REQ_EVENT, vcpu);
 360
 361         if (!vcpu->arch.exception.pending) {
 362         queue:
 363                 if (has_error && !is_protmode(vcpu))
 364                         has_error = false;
 365                 vcpu->arch.exception.pending = true;
 366                 vcpu->arch.exception.has_error_code = has_error;
 367                 vcpu->arch.exception.nr = nr;
 368                 vcpu->arch.exception.error_code = error_code;
 369                 vcpu->arch.exception.reinject = reinject;
 370                 return;
 371         }
 372
 373         /* to check exception */
 374         prev_nr = vcpu->arch.exception.nr;
 375         if (prev_nr == DF_VECTOR) {
 376                 /* triple fault -> shutdown */
 377                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 378                 return;
 379         }
 380         class1 = exception_class(prev_nr);
 381         class2 = exception_class(nr);
 382         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 383                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 384                 /* generate double fault per SDM Table 5-5 */
 385                 vcpu->arch.exception.pending = true;
 386                 vcpu->arch.exception.has_error_code = true;
 387                 vcpu->arch.exception.nr = DF_VECTOR;
 388                 vcpu->arch.exception.error_code = 0;
 389         } else
 390                 /* replace previous exception with a new one in a hope
 391                    that instruction re-execution will regenerate lost
 392                    exception */
 393                 goto queue;
 394 }
 395
 396 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 397 {
 398         kvm_multiple_exception(vcpu, nr, false, 0, false);
 399 }
 400 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 401
 402 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 403 {
 404         kvm_multiple_exception(vcpu, nr, false, 0, true);
 405 }
 406 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 407
 408 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 409 {
 410         if (err)
 411                 kvm_inject_gp(vcpu, 0);
 412         else
 413                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 414 }
 415 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 416
 417 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 418 {
 419         ++vcpu->stat.pf_guest;
 420         vcpu->arch.cr2 = fault->address;
 421         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 422 }
 423 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 424
 425 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 426 {
 427         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 428                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 429         else
 430                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 431
 432         return fault->nested_page_fault;
 433 }
 434
 435 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 436 {
 437         atomic_inc(&vcpu->arch.nmi_queued);
 438         kvm_make_request(KVM_REQ_NMI, vcpu);
 439 }
 440 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 441
 442 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 443 {
 444         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 445 }
 446 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 447
 448 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 449 {
 450         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 451 }
 452 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 453
 454 /*
 455  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 456  * a #GP and return false.
 457  */
 458 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 459 {
 460         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 461                 return true;
 462         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 463         return false;
 464 }
 465 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 466
 467 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 468 {
 469         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 470                 return true;
 471
 472         kvm_queue_exception(vcpu, UD_VECTOR);
 473         return false;
 474 }
 475 EXPORT_SYMBOL_GPL(kvm_require_dr);
 476
 477 /*
 478  * This function will be used to read from the physical memory of the currently
 479  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 480  * can read from guest physical or from the guest's guest physical memory.
 481  */
 482 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 483                             gfn_t ngfn, void *data, int offset, int len,
 484                             u32 access)
 485 {
 486         struct x86_exception exception;
 487         gfn_t real_gfn;
 488         gpa_t ngpa;
 489
 490         ngpa     = gfn_to_gpa(ngfn);
 491         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 492         if (real_gfn == UNMAPPED_GVA)
 493                 return -EFAULT;
 494
 495         real_gfn = gpa_to_gfn(real_gfn);
 496
 497         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 498 }
 499 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 500
 501 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 502                                void *data, int offset, int len, u32 access)
 503 {
 504         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 505                                        data, offset, len, access);
 506 }
 507
 508 /*
 509  * Load the pae pdptrs.  Return true is they are all valid.
 510  */
 511 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 512 {
 513         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 514         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 515         int i;
 516         int ret;
 517         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 518
 519         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 520                                       offset * sizeof(u64), sizeof(pdpte),
 521                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 522         if (ret < 0) {
 523                 ret = 0;
 524                 goto out;
 525         }
 526         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 527                 if (is_present_gpte(pdpte[i]) &&
 528                     (pdpte[i] &
 529                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 530                         ret = 0;
 531                         goto out;
 532                 }
 533         }
 534         ret = 1;
 535
 536         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 537         __set_bit(VCPU_EXREG_PDPTR,
 538                   (unsigned long *)&vcpu->arch.regs_avail);
 539         __set_bit(VCPU_EXREG_PDPTR,
 540                   (unsigned long *)&vcpu->arch.regs_dirty);
 541 out:
 542
 543         return ret;
 544 }
 545 EXPORT_SYMBOL_GPL(load_pdptrs);
 546
 547 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 548 {
 549         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 550         bool changed = true;
 551         int offset;
 552         gfn_t gfn;
 553         int r;
 554
 555         if (is_long_mode(vcpu) || !is_pae(vcpu))
 556                 return false;
 557
 558         if (!test_bit(VCPU_EXREG_PDPTR,
 559                       (unsigned long *)&vcpu->arch.regs_avail))
 560                 return true;
 561
 562         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 563         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 564         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 565                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 566         if (r < 0)
 567                 goto out;
 568         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 569 out:
 570
 571         return changed;
 572 }
 573
 574 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 575 {
 576         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 577         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 578
 579         cr0 |= X86_CR0_ET;
 580
 581 #ifdef CONFIG_X86_64
 582         if (cr0 & 0xffffffff00000000UL)
 583                 return 1;
 584 #endif
 585
 586         cr0 &= ~CR0_RESERVED_BITS;
 587
 588         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 589                 return 1;
 590
 591         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 592                 return 1;
 593
 594         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 595 #ifdef CONFIG_X86_64
 596                 if ((vcpu->arch.efer & EFER_LME)) {
 597                         int cs_db, cs_l;
 598
 599                         if (!is_pae(vcpu))
 600                                 return 1;
 601                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 602                         if (cs_l)
 603                                 return 1;
 604                 } else
 605 #endif
 606                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 607                                                  kvm_read_cr3(vcpu)))
 608                         return 1;
 609         }
 610
 611         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 612                 return 1;
 613
 614         kvm_x86_ops->set_cr0(vcpu, cr0);
 615
 616         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 617                 kvm_clear_async_pf_completion_queue(vcpu);
 618                 kvm_async_pf_hash_reset(vcpu);
 619         }
 620
 621         if ((cr0 ^ old_cr0) & update_bits)
 622                 kvm_mmu_reset_context(vcpu);
 623
 624         if ((cr0 ^ old_cr0) & X86_CR0_CD)
 625                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 626
 627         return 0;
 628 }
 629 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 630
 631 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 632 {
 633         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 634 }
 635 EXPORT_SYMBOL_GPL(kvm_lmsw);
 636
 637 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 638 {
 639         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 640                         !vcpu->guest_xcr0_loaded) {
 641                 /* kvm_set_xcr() also depends on this */
 642                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 643                 vcpu->guest_xcr0_loaded = 1;
 644         }
 645 }
 646
 647 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 648 {
 649         if (vcpu->guest_xcr0_loaded) {
 650                 if (vcpu->arch.xcr0 != host_xcr0)
 651                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 652                 vcpu->guest_xcr0_loaded = 0;
 653         }
 654 }
 655
 656 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 657 {
 658         u64 xcr0 = xcr;
 659         u64 old_xcr0 = vcpu->arch.xcr0;
 660         u64 valid_bits;
 661
 662         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 663         if (index != XCR_XFEATURE_ENABLED_MASK)
 664                 return 1;
 665         if (!(xcr0 & XSTATE_FP))
 666                 return 1;
 667         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 668                 return 1;
 669
 670         /*
 671          * Do not allow the guest to set bits that we do not support
 672          * saving.  However, xcr0 bit 0 is always set, even if the
 673          * emulated CPU does not support XSAVE (see fx_init).
 674          */
 675         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 676         if (xcr0 & ~valid_bits)
 677                 return 1;
 678
 679         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 680                 return 1;
 681
 682         if (xcr0 & XSTATE_AVX512) {
 683                 if (!(xcr0 & XSTATE_YMM))
 684                         return 1;
 685                 if ((xcr0 & XSTATE_AVX512) != XSTATE_AVX512)
 686                         return 1;
 687         }
 688         kvm_put_guest_xcr0(vcpu);
 689         vcpu->arch.xcr0 = xcr0;
 690
 691         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 692                 kvm_update_cpuid(vcpu);
 693         return 0;
 694 }
 695
 696 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 697 {
 698         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 699             __kvm_set_xcr(vcpu, index, xcr)) {
 700                 kvm_inject_gp(vcpu, 0);
 701                 return 1;
 702         }
 703         return 0;
 704 }
 705 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 706
 707 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 708 {
 709         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 710         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 711                                    X86_CR4_SMEP | X86_CR4_SMAP;
 712
 713         if (cr4 & CR4_RESERVED_BITS)
 714                 return 1;
 715
 716         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 717                 return 1;
 718
 719         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 720                 return 1;
 721
 722         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 723                 return 1;
 724
 725         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 726                 return 1;
 727
 728         if (is_long_mode(vcpu)) {
 729                 if (!(cr4 & X86_CR4_PAE))
 730                         return 1;
 731         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 732                    && ((cr4 ^ old_cr4) & pdptr_bits)
 733                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 734                                    kvm_read_cr3(vcpu)))
 735                 return 1;
 736
 737         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 738                 if (!guest_cpuid_has_pcid(vcpu))
 739                         return 1;
 740
 741                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 742                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 743                         return 1;
 744         }
 745
 746         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 747                 return 1;
 748
 749         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 750             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 751                 kvm_mmu_reset_context(vcpu);
 752
 753         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 754                 kvm_update_cpuid(vcpu);
 755
 756         return 0;
 757 }
 758 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 759
 760 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 761 {
 762 #ifdef CONFIG_X86_64
 763         cr3 &= ~CR3_PCID_INVD;
 764 #endif
 765
 766         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 767                 kvm_mmu_sync_roots(vcpu);
 768                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 769                 return 0;
 770         }
 771
 772         if (is_long_mode(vcpu)) {
 773                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 774                         return 1;
 775         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 776                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 777                 return 1;
 778
 779         vcpu->arch.cr3 = cr3;
 780         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 781         kvm_mmu_new_cr3(vcpu);
 782         return 0;
 783 }
 784 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 785
 786 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 787 {
 788         if (cr8 & CR8_RESERVED_BITS)
 789                 return 1;
 790         if (irqchip_in_kernel(vcpu->kvm))
 791                 kvm_lapic_set_tpr(vcpu, cr8);
 792         else
 793                 vcpu->arch.cr8 = cr8;
 794         return 0;
 795 }
 796 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 797
 798 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 799 {
 800         if (irqchip_in_kernel(vcpu->kvm))
 801                 return kvm_lapic_get_cr8(vcpu);
 802         else
 803                 return vcpu->arch.cr8;
 804 }
 805 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 806
 807 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 808 {
 809         int i;
 810
 811         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 812                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 813                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 814                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 815         }
 816 }
 817
 818 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 819 {
 820         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 821                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 822 }
 823
 824 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 825 {
 826         unsigned long dr7;
 827
 828         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 829                 dr7 = vcpu->arch.guest_debug_dr7;
 830         else
 831                 dr7 = vcpu->arch.dr7;
 832         kvm_x86_ops->set_dr7(vcpu, dr7);
 833         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 834         if (dr7 & DR7_BP_EN_MASK)
 835                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 836 }
 837
 838 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 839 {
 840         u64 fixed = DR6_FIXED_1;
 841
 842         if (!guest_cpuid_has_rtm(vcpu))
 843                 fixed |= DR6_RTM;
 844         return fixed;
 845 }
 846
 847 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 848 {
 849         switch (dr) {
 850         case 0 ... 3:
 851                 vcpu->arch.db[dr] = val;
 852                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 853                         vcpu->arch.eff_db[dr] = val;
 854                 break;
 855         case 4:
 856                 /* fall through */
 857         case 6:
 858                 if (val & 0xffffffff00000000ULL)
 859                         return -1; /* #GP */
 860                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 861                 kvm_update_dr6(vcpu);
 862                 break;
 863         case 5:
 864                 /* fall through */
 865         default: /* 7 */
 866                 if (val & 0xffffffff00000000ULL)
 867                         return -1; /* #GP */
 868                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 869                 kvm_update_dr7(vcpu);
 870                 break;
 871         }
 872
 873         return 0;
 874 }
 875
 876 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 877 {
 878         if (__kvm_set_dr(vcpu, dr, val)) {
 879                 kvm_inject_gp(vcpu, 0);
 880                 return 1;
 881         }
 882         return 0;
 883 }
 884 EXPORT_SYMBOL_GPL(kvm_set_dr);
 885
 886 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 887 {
 888         switch (dr) {
 889         case 0 ... 3:
 890                 *val = vcpu->arch.db[dr];
 891                 break;
 892         case 4:
 893                 /* fall through */
 894         case 6:
 895                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 896                         *val = vcpu->arch.dr6;
 897                 else
 898                         *val = kvm_x86_ops->get_dr6(vcpu);
 899                 break;
 900         case 5:
 901                 /* fall through */
 902         default: /* 7 */
 903                 *val = vcpu->arch.dr7;
 904                 break;
 905         }
 906         return 0;
 907 }
 908 EXPORT_SYMBOL_GPL(kvm_get_dr);
 909
 910 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 911 {
 912         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 913         u64 data;
 914         int err;
 915
 916         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 917         if (err)
 918                 return err;
 919         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 920         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 921         return err;
 922 }
 923 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 924
 925 /*
 926  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 927  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 928  *
 929  * This list is modified at module load time to reflect the
 930  * capabilities of the host cpu. This capabilities test skips MSRs that are
 931  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 932  * may depend on host virtualization features rather than host cpu features.
 933  */
 934
 935 static u32 msrs_to_save[] = {
 936         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 937         MSR_STAR,
 938 #ifdef CONFIG_X86_64
 939         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 940 #endif
 941         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 942         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 943 };
 944
 945 static unsigned num_msrs_to_save;
 946
 947 static u32 emulated_msrs[] = {
 948         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 949         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 950         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 951         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 952         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 953         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 954         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 955         MSR_KVM_PV_EOI_EN,
 956
 957         MSR_IA32_TSC_ADJUST,
 958         MSR_IA32_TSCDEADLINE,
 959         MSR_IA32_MISC_ENABLE,
 960         MSR_IA32_MCG_STATUS,
 961         MSR_IA32_MCG_CTL,
 962         MSR_IA32_SMBASE,
 963 };
 964
 965 static unsigned num_emulated_msrs;
 966
 967 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 968 {
 969         if (efer & efer_reserved_bits)
 970                 return false;
 971
 972         if (efer & EFER_FFXSR) {
 973                 struct kvm_cpuid_entry2 *feat;
 974
 975                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 976                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 977                         return false;
 978         }
 979
 980         if (efer & EFER_SVME) {
 981                 struct kvm_cpuid_entry2 *feat;
 982
 983                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 984                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 985                         return false;
 986         }
 987
 988         return true;
 989 }
 990 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 991
 992 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 993 {
 994         u64 old_efer = vcpu->arch.efer;
 995
 996         if (!kvm_valid_efer(vcpu, efer))
 997                 return 1;
 998
 999         if (is_paging(vcpu)
1000             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1001                 return 1;
1002
1003         efer &= ~EFER_LMA;
1004         efer |= vcpu->arch.efer & EFER_LMA;
1005
1006         kvm_x86_ops->set_efer(vcpu, efer);
1007
1008         /* Update reserved bits */
1009         if ((efer ^ old_efer) & EFER_NX)
1010                 kvm_mmu_reset_context(vcpu);
1011
1012         return 0;
1013 }
1014
1015 void kvm_enable_efer_bits(u64 mask)
1016 {
1017        efer_reserved_bits &= ~mask;
1018 }
1019 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1020
1021 /*
1022  * Writes msr value into into the appropriate "register".
1023  * Returns 0 on success, non-0 otherwise.
1024  * Assumes vcpu_load() was already called.
1025  */
1026 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1027 {
1028         switch (msr->index) {
1029         case MSR_FS_BASE:
1030         case MSR_GS_BASE:
1031         case MSR_KERNEL_GS_BASE:
1032         case MSR_CSTAR:
1033         case MSR_LSTAR:
1034                 if (is_noncanonical_address(msr->data))
1035                         return 1;
1036                 break;
1037         case MSR_IA32_SYSENTER_EIP:
1038         case MSR_IA32_SYSENTER_ESP:
1039                 /*
1040                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1041                  * non-canonical address is written on Intel but not on
1042                  * AMD (which ignores the top 32-bits, because it does
1043                  * not implement 64-bit SYSENTER).
1044                  *
1045                  * 64-bit code should hence be able to write a non-canonical
1046                  * value on AMD.  Making the address canonical ensures that
1047                  * vmentry does not fail on Intel after writing a non-canonical
1048                  * value, and that something deterministic happens if the guest
1049                  * invokes 64-bit SYSENTER.
1050                  */
1051                 msr->data = get_canonical(msr->data);
1052         }
1053         return kvm_x86_ops->set_msr(vcpu, msr);
1054 }
1055 EXPORT_SYMBOL_GPL(kvm_set_msr);
1056
1057 /*
1058  * Adapt set_msr() to msr_io()'s calling convention
1059  */
1060 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1061 {
1062         struct msr_data msr;
1063         int r;
1064
1065         msr.index = index;
1066         msr.host_initiated = true;
1067         r = kvm_get_msr(vcpu, &msr);
1068         if (r)
1069                 return r;
1070
1071         *data = msr.data;
1072         return 0;
1073 }
1074
1075 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1076 {
1077         struct msr_data msr;
1078
1079         msr.data = *data;
1080         msr.index = index;
1081         msr.host_initiated = true;
1082         return kvm_set_msr(vcpu, &msr);
1083 }
1084
1085 #ifdef CONFIG_X86_64
1086 struct pvclock_gtod_data {
1087         seqcount_t      seq;
1088
1089         struct { /* extract of a clocksource struct */
1090                 int vclock_mode;
1091                 cycle_t cycle_last;
1092                 cycle_t mask;
1093                 u32     mult;
1094                 u32     shift;
1095         } clock;
1096
1097         u64             boot_ns;
1098         u64             nsec_base;
1099 };
1100
1101 static struct pvclock_gtod_data pvclock_gtod_data;
1102
1103 static void update_pvclock_gtod(struct timekeeper *tk)
1104 {
1105         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1106         u64 boot_ns;
1107
1108         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1109
1110         write_seqcount_begin(&vdata->seq);
1111
1112         /* copy pvclock gtod data */
1113         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1114         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1115         vdata->clock.mask               = tk->tkr_mono.mask;
1116         vdata->clock.mult               = tk->tkr_mono.mult;
1117         vdata->clock.shift              = tk->tkr_mono.shift;
1118
1119         vdata->boot_ns                  = boot_ns;
1120         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1121
1122         write_seqcount_end(&vdata->seq);
1123 }
1124 #endif
1125
1126 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1127 {
1128         /*
1129          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1130          * vcpu_enter_guest.  This function is only called from
1131          * the physical CPU that is running vcpu.
1132          */
1133         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1134 }
1135
1136 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1137 {
1138         int version;
1139         int r;
1140         struct pvclock_wall_clock wc;
1141         struct timespec boot;
1142
1143         if (!wall_clock)
1144                 return;
1145
1146         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1147         if (r)
1148                 return;
1149
1150         if (version & 1)
1151                 ++version;  /* first time write, random junk */
1152
1153         ++version;
1154
1155         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1156
1157         /*
1158          * The guest calculates current wall clock time by adding
1159          * system time (updated by kvm_guest_time_update below) to the
1160          * wall clock specified here.  guest system time equals host
1161          * system time for us, thus we must fill in host boot time here.
1162          */
1163         getboottime(&boot);
1164
1165         if (kvm->arch.kvmclock_offset) {
1166                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1167                 boot = timespec_sub(boot, ts);
1168         }
1169         wc.sec = boot.tv_sec;
1170         wc.nsec = boot.tv_nsec;
1171         wc.version = version;
1172
1173         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1174
1175         version++;
1176         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1177 }
1178
1179 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1180 {
1181         uint32_t quotient, remainder;
1182
1183         /* Don't try to replace with do_div(), this one calculates
1184          * "(dividend << 32) / divisor" */
1185         __asm__ ( "divl %4"
1186                   : "=a" (quotient), "=d" (remainder)
1187                   : "0" (0), "1" (dividend), "r" (divisor) );
1188         return quotient;
1189 }
1190
1191 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1192                                s8 *pshift, u32 *pmultiplier)
1193 {
1194         uint64_t scaled64;
1195         int32_t  shift = 0;
1196         uint64_t tps64;
1197         uint32_t tps32;
1198
1199         tps64 = base_khz * 1000LL;
1200         scaled64 = scaled_khz * 1000LL;
1201         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1202                 tps64 >>= 1;
1203                 shift--;
1204         }
1205
1206         tps32 = (uint32_t)tps64;
1207         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1208                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1209                         scaled64 >>= 1;
1210                 else
1211                         tps32 <<= 1;
1212                 shift++;
1213         }
1214
1215         *pshift = shift;
1216         *pmultiplier = div_frac(scaled64, tps32);
1217
1218         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1219                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1220 }
1221
1222 #ifdef CONFIG_X86_64
1223 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1224 #endif
1225
1226 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1227 static unsigned long max_tsc_khz;
1228
1229 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1230 {
1231         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1232                                    vcpu->arch.virtual_tsc_shift);
1233 }
1234
1235 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1236 {
1237         u64 v = (u64)khz * (1000000 + ppm);
1238         do_div(v, 1000000);
1239         return v;
1240 }
1241
1242 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1243 {
1244         u32 thresh_lo, thresh_hi;
1245         int use_scaling = 0;
1246
1247         /* tsc_khz can be zero if TSC calibration fails */
1248         if (this_tsc_khz == 0)
1249                 return;
1250
1251         /* Compute a scale to convert nanoseconds in TSC cycles */
1252         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1253                            &vcpu->arch.virtual_tsc_shift,
1254                            &vcpu->arch.virtual_tsc_mult);
1255         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1256
1257         /*
1258          * Compute the variation in TSC rate which is acceptable
1259          * within the range of tolerance and decide if the
1260          * rate being applied is within that bounds of the hardware
1261          * rate.  If so, no scaling or compensation need be done.
1262          */
1263         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1264         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1265         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1266                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1267                 use_scaling = 1;
1268         }
1269         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1270 }
1271
1272 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1273 {
1274         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1275                                       vcpu->arch.virtual_tsc_mult,
1276                                       vcpu->arch.virtual_tsc_shift);
1277         tsc += vcpu->arch.this_tsc_write;
1278         return tsc;
1279 }
1280
1281 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1282 {
1283 #ifdef CONFIG_X86_64
1284         bool vcpus_matched;
1285         struct kvm_arch *ka = &vcpu->kvm->arch;
1286         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1287
1288         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1289                          atomic_read(&vcpu->kvm->online_vcpus));
1290
1291         /*
1292          * Once the masterclock is enabled, always perform request in
1293          * order to update it.
1294          *
1295          * In order to enable masterclock, the host clocksource must be TSC
1296          * and the vcpus need to have matched TSCs.  When that happens,
1297          * perform request to enable masterclock.
1298          */
1299         if (ka->use_master_clock ||
1300             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1301                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1302
1303         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1304                             atomic_read(&vcpu->kvm->online_vcpus),
1305                             ka->use_master_clock, gtod->clock.vclock_mode);
1306 #endif
1307 }
1308
1309 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1310 {
1311         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1312         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1313 }
1314
1315 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1316 {
1317         struct kvm *kvm = vcpu->kvm;
1318         u64 offset, ns, elapsed;
1319         unsigned long flags;
1320         s64 usdiff;
1321         bool matched;
1322         bool already_matched;
1323         u64 data = msr->data;
1324
1325         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1326         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1327         ns = get_kernel_ns();
1328         elapsed = ns - kvm->arch.last_tsc_nsec;
1329
1330         if (vcpu->arch.virtual_tsc_khz) {
1331                 int faulted = 0;
1332
1333                 /* n.b - signed multiplication and division required */
1334                 usdiff = data - kvm->arch.last_tsc_write;
1335 #ifdef CONFIG_X86_64
1336                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1337 #else
1338                 /* do_div() only does unsigned */
1339                 asm("1: idivl %[divisor]\n"
1340                     "2: xor %%edx, %%edx\n"
1341                     "   movl $0, %[faulted]\n"
1342                     "3:\n"
1343                     ".section .fixup,\"ax\"\n"
1344                     "4: movl $1, %[faulted]\n"
1345                     "   jmp  3b\n"
1346                     ".previous\n"
1347
1348                 _ASM_EXTABLE(1b, 4b)
1349
1350                 : "=A"(usdiff), [faulted] "=r" (faulted)
1351                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1352
1353 #endif
1354                 do_div(elapsed, 1000);
1355                 usdiff -= elapsed;
1356                 if (usdiff < 0)
1357                         usdiff = -usdiff;
1358
1359                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1360                 if (faulted)
1361                         usdiff = USEC_PER_SEC;
1362         } else
1363                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1364
1365         /*
1366          * Special case: TSC write with a small delta (1 second) of virtual
1367          * cycle time against real time is interpreted as an attempt to
1368          * synchronize the CPU.
1369          *
1370          * For a reliable TSC, we can match TSC offsets, and for an unstable
1371          * TSC, we add elapsed time in this computation.  We could let the
1372          * compensation code attempt to catch up if we fall behind, but
1373          * it's better to try to match offsets from the beginning.
1374          */
1375         if (usdiff < USEC_PER_SEC &&
1376             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1377                 if (!check_tsc_unstable()) {
1378                         offset = kvm->arch.cur_tsc_offset;
1379                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1380                 } else {
1381                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1382                         data += delta;
1383                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1384                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1385                 }
1386                 matched = true;
1387                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1388         } else {
1389                 /*
1390                  * We split periods of matched TSC writes into generations.
1391                  * For each generation, we track the original measured
1392                  * nanosecond time, offset, and write, so if TSCs are in
1393                  * sync, we can match exact offset, and if not, we can match
1394                  * exact software computation in compute_guest_tsc()
1395                  *
1396                  * These values are tracked in kvm->arch.cur_xxx variables.
1397                  */
1398                 kvm->arch.cur_tsc_generation++;
1399                 kvm->arch.cur_tsc_nsec = ns;
1400                 kvm->arch.cur_tsc_write = data;
1401                 kvm->arch.cur_tsc_offset = offset;
1402                 matched = false;
1403                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1404                          kvm->arch.cur_tsc_generation, data);
1405         }
1406
1407         /*
1408          * We also track th most recent recorded KHZ, write and time to
1409          * allow the matching interval to be extended at each write.
1410          */
1411         kvm->arch.last_tsc_nsec = ns;
1412         kvm->arch.last_tsc_write = data;
1413         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1414
1415         vcpu->arch.last_guest_tsc = data;
1416
1417         /* Keep track of which generation this VCPU has synchronized to */
1418         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1419         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1420         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1421
1422         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1423                 update_ia32_tsc_adjust_msr(vcpu, offset);
1424         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1425         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1426
1427         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1428         if (!matched) {
1429                 kvm->arch.nr_vcpus_matched_tsc = 0;
1430         } else if (!already_matched) {
1431                 kvm->arch.nr_vcpus_matched_tsc++;
1432         }
1433
1434         kvm_track_tsc_matching(vcpu);
1435         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1436 }
1437
1438 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1439
1440 #ifdef CONFIG_X86_64
1441
1442 static cycle_t read_tsc(void)
1443 {
1444         cycle_t ret;
1445         u64 last;
1446
1447         /*
1448          * Empirically, a fence (of type that depends on the CPU)
1449          * before rdtsc is enough to ensure that rdtsc is ordered
1450          * with respect to loads.  The various CPU manuals are unclear
1451          * as to whether rdtsc can be reordered with later loads,
1452          * but no one has ever seen it happen.
1453          */
1454         rdtsc_barrier();
1455         ret = (cycle_t)vget_cycles();
1456
1457         last = pvclock_gtod_data.clock.cycle_last;
1458
1459         if (likely(ret >= last))
1460                 return ret;
1461
1462         /*
1463          * GCC likes to generate cmov here, but this branch is extremely
1464          * predictable (it's just a funciton of time and the likely is
1465          * very likely) and there's a data dependence, so force GCC
1466          * to generate a branch instead.  I don't barrier() because
1467          * we don't actually need a barrier, and if this function
1468          * ever gets inlined it will generate worse code.
1469          */
1470         asm volatile ("");
1471         return last;
1472 }
1473
1474 static inline u64 vgettsc(cycle_t *cycle_now)
1475 {
1476         long v;
1477         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1478
1479         *cycle_now = read_tsc();
1480
1481         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1482         return v * gtod->clock.mult;
1483 }
1484
1485 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1486 {
1487         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1488         unsigned long seq;
1489         int mode;
1490         u64 ns;
1491
1492         do {
1493                 seq = read_seqcount_begin(&gtod->seq);
1494                 mode = gtod->clock.vclock_mode;
1495                 ns = gtod->nsec_base;
1496                 ns += vgettsc(cycle_now);
1497                 ns >>= gtod->clock.shift;
1498                 ns += gtod->boot_ns;
1499         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1500         *t = ns;
1501
1502         return mode;
1503 }
1504
1505 /* returns true if host is using tsc clocksource */
1506 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1507 {
1508         /* checked again under seqlock below */
1509         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1510                 return false;
1511
1512         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1513 }
1514 #endif
1515
1516 /*
1517  *
1518  * Assuming a stable TSC across physical CPUS, and a stable TSC
1519  * across virtual CPUs, the following condition is possible.
1520  * Each numbered line represents an event visible to both
1521  * CPUs at the next numbered event.
1522  *
1523  * "timespecX" represents host monotonic time. "tscX" represents
1524  * RDTSC value.
1525  *
1526  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1527  *
1528  * 1.  read timespec0,tsc0
1529  * 2.                                   | timespec1 = timespec0 + N
1530  *                                      | tsc1 = tsc0 + M
1531  * 3. transition to guest               | transition to guest
1532  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1533  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1534  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1535  *
1536  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1537  *
1538  *      - ret0 < ret1
1539  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1540  *              ...
1541  *      - 0 < N - M => M < N
1542  *
1543  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1544  * always the case (the difference between two distinct xtime instances
1545  * might be smaller then the difference between corresponding TSC reads,
1546  * when updating guest vcpus pvclock areas).
1547  *
1548  * To avoid that problem, do not allow visibility of distinct
1549  * system_timestamp/tsc_timestamp values simultaneously: use a master
1550  * copy of host monotonic time values. Update that master copy
1551  * in lockstep.
1552  *
1553  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1554  *
1555  */
1556
1557 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1558 {
1559 #ifdef CONFIG_X86_64
1560         struct kvm_arch *ka = &kvm->arch;
1561         int vclock_mode;
1562         bool host_tsc_clocksource, vcpus_matched;
1563
1564         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1565                         atomic_read(&kvm->online_vcpus));
1566
1567         /*
1568          * If the host uses TSC clock, then passthrough TSC as stable
1569          * to the guest.
1570          */
1571         host_tsc_clocksource = kvm_get_time_and_clockread(
1572                                         &ka->master_kernel_ns,
1573                                         &ka->master_cycle_now);
1574
1575         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1576                                 && !backwards_tsc_observed
1577                                 && !ka->boot_vcpu_runs_old_kvmclock;
1578
1579         if (ka->use_master_clock)
1580                 atomic_set(&kvm_guest_has_master_clock, 1);
1581
1582         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1583         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1584                                         vcpus_matched);
1585 #endif
1586 }
1587
1588 static void kvm_gen_update_masterclock(struct kvm *kvm)
1589 {
1590 #ifdef CONFIG_X86_64
1591         int i;
1592         struct kvm_vcpu *vcpu;
1593         struct kvm_arch *ka = &kvm->arch;
1594
1595         spin_lock(&ka->pvclock_gtod_sync_lock);
1596         kvm_make_mclock_inprogress_request(kvm);
1597         /* no guest entries from this point */
1598         pvclock_update_vm_gtod_copy(kvm);
1599
1600         kvm_for_each_vcpu(i, vcpu, kvm)
1601                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1602
1603         /* guest entries allowed */
1604         kvm_for_each_vcpu(i, vcpu, kvm)
1605                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1606
1607         spin_unlock(&ka->pvclock_gtod_sync_lock);
1608 #endif
1609 }
1610
1611 static int kvm_guest_time_update(struct kvm_vcpu *v)
1612 {
1613         unsigned long flags, this_tsc_khz;
1614         struct kvm_vcpu_arch *vcpu = &v->arch;
1615         struct kvm_arch *ka = &v->kvm->arch;
1616         s64 kernel_ns;
1617         u64 tsc_timestamp, host_tsc;
1618         struct pvclock_vcpu_time_info guest_hv_clock;
1619         u8 pvclock_flags;
1620         bool use_master_clock;
1621
1622         kernel_ns = 0;
1623         host_tsc = 0;
1624
1625         /*
1626          * If the host uses TSC clock, then passthrough TSC as stable
1627          * to the guest.
1628          */
1629         spin_lock(&ka->pvclock_gtod_sync_lock);
1630         use_master_clock = ka->use_master_clock;
1631         if (use_master_clock) {
1632                 host_tsc = ka->master_cycle_now;
1633                 kernel_ns = ka->master_kernel_ns;
1634         }
1635         spin_unlock(&ka->pvclock_gtod_sync_lock);
1636
1637         /* Keep irq disabled to prevent changes to the clock */
1638         local_irq_save(flags);
1639         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1640         if (unlikely(this_tsc_khz == 0)) {
1641                 local_irq_restore(flags);
1642                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1643                 return 1;
1644         }
1645         if (!use_master_clock) {
1646                 host_tsc = native_read_tsc();
1647                 kernel_ns = get_kernel_ns();
1648         }
1649
1650         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1651
1652         /*
1653          * We may have to catch up the TSC to match elapsed wall clock
1654          * time for two reasons, even if kvmclock is used.
1655          *   1) CPU could have been running below the maximum TSC rate
1656          *   2) Broken TSC compensation resets the base at each VCPU
1657          *      entry to avoid unknown leaps of TSC even when running
1658          *      again on the same CPU.  This may cause apparent elapsed
1659          *      time to disappear, and the guest to stand still or run
1660          *      very slowly.
1661          */
1662         if (vcpu->tsc_catchup) {
1663                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1664                 if (tsc > tsc_timestamp) {
1665                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1666                         tsc_timestamp = tsc;
1667                 }
1668         }
1669
1670         local_irq_restore(flags);
1671
1672         if (!vcpu->pv_time_enabled)
1673                 return 0;
1674
1675         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1676                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1677                                    &vcpu->hv_clock.tsc_shift,
1678                                    &vcpu->hv_clock.tsc_to_system_mul);
1679                 vcpu->hw_tsc_khz = this_tsc_khz;
1680         }
1681
1682         /* With all the info we got, fill in the values */
1683         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1684         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1685         vcpu->last_guest_tsc = tsc_timestamp;
1686
1687         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1688                 &guest_hv_clock, sizeof(guest_hv_clock))))
1689                 return 0;
1690
1691         /* This VCPU is paused, but it's legal for a guest to read another
1692          * VCPU's kvmclock, so we really have to follow the specification where
1693          * it says that version is odd if data is being modified, and even after
1694          * it is consistent.
1695          *
1696          * Version field updates must be kept separate.  This is because
1697          * kvm_write_guest_cached might use a "rep movs" instruction, and
1698          * writes within a string instruction are weakly ordered.  So there
1699          * are three writes overall.
1700          *
1701          * As a small optimization, only write the version field in the first
1702          * and third write.  The vcpu->pv_time cache is still valid, because the
1703          * version field is the first in the struct.
1704          */
1705         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1706
1707         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1708         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1709                                 &vcpu->hv_clock,
1710                                 sizeof(vcpu->hv_clock.version));
1711
1712         smp_wmb();
1713
1714         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1715         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1716
1717         if (vcpu->pvclock_set_guest_stopped_request) {
1718                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1719                 vcpu->pvclock_set_guest_stopped_request = false;
1720         }
1721
1722         pvclock_flags |= PVCLOCK_COUNTS_FROM_ZERO;
1723
1724         /* If the host uses TSC clocksource, then it is stable */
1725         if (use_master_clock)
1726                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1727
1728         vcpu->hv_clock.flags = pvclock_flags;
1729
1730         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1731
1732         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1733                                 &vcpu->hv_clock,
1734                                 sizeof(vcpu->hv_clock));
1735
1736         smp_wmb();
1737
1738         vcpu->hv_clock.version++;
1739         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1740                                 &vcpu->hv_clock,
1741                                 sizeof(vcpu->hv_clock.version));
1742         return 0;
1743 }
1744
1745 /*
1746  * kvmclock updates which are isolated to a given vcpu, such as
1747  * vcpu->cpu migration, should not allow system_timestamp from
1748  * the rest of the vcpus to remain static. Otherwise ntp frequency
1749  * correction applies to one vcpu's system_timestamp but not
1750  * the others.
1751  *
1752  * So in those cases, request a kvmclock update for all vcpus.
1753  * We need to rate-limit these requests though, as they can
1754  * considerably slow guests that have a large number of vcpus.
1755  * The time for a remote vcpu to update its kvmclock is bound
1756  * by the delay we use to rate-limit the updates.
1757  */
1758
1759 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1760
1761 static void kvmclock_update_fn(struct work_struct *work)
1762 {
1763         int i;
1764         struct delayed_work *dwork = to_delayed_work(work);
1765         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1766                                            kvmclock_update_work);
1767         struct kvm *kvm = container_of(ka, struct kvm, arch);
1768         struct kvm_vcpu *vcpu;
1769
1770         kvm_for_each_vcpu(i, vcpu, kvm) {
1771                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1772                 kvm_vcpu_kick(vcpu);
1773         }
1774 }
1775
1776 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1777 {
1778         struct kvm *kvm = v->kvm;
1779
1780         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1781         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1782                                         KVMCLOCK_UPDATE_DELAY);
1783 }
1784
1785 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1786
1787 static void kvmclock_sync_fn(struct work_struct *work)
1788 {
1789         struct delayed_work *dwork = to_delayed_work(work);
1790         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1791                                            kvmclock_sync_work);
1792         struct kvm *kvm = container_of(ka, struct kvm, arch);
1793
1794         if (!kvmclock_periodic_sync)
1795                 return;
1796
1797         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1798         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1799                                         KVMCLOCK_SYNC_PERIOD);
1800 }
1801
1802 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1803 {
1804         u64 mcg_cap = vcpu->arch.mcg_cap;
1805         unsigned bank_num = mcg_cap & 0xff;
1806
1807         switch (msr) {
1808         case MSR_IA32_MCG_STATUS:
1809                 vcpu->arch.mcg_status = data;
1810                 break;
1811         case MSR_IA32_MCG_CTL:
1812                 if (!(mcg_cap & MCG_CTL_P))
1813                         return 1;
1814                 if (data != 0 && data != ~(u64)0)
1815                         return -1;
1816                 vcpu->arch.mcg_ctl = data;
1817                 break;
1818         default:
1819                 if (msr >= MSR_IA32_MC0_CTL &&
1820                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1821                         u32 offset = msr - MSR_IA32_MC0_CTL;
1822                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1823                          * some Linux kernels though clear bit 10 in bank 4 to
1824                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1825                          * this to avoid an uncatched #GP in the guest
1826                          */
1827                         if ((offset & 0x3) == 0 &&
1828                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1829                                 return -1;
1830                         vcpu->arch.mce_banks[offset] = data;
1831                         break;
1832                 }
1833                 return 1;
1834         }
1835         return 0;
1836 }
1837
1838 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1839 {
1840         struct kvm *kvm = vcpu->kvm;
1841         int lm = is_long_mode(vcpu);
1842         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1843                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1844         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1845                 : kvm->arch.xen_hvm_config.blob_size_32;
1846         u32 page_num = data & ~PAGE_MASK;
1847         u64 page_addr = data & PAGE_MASK;
1848         u8 *page;
1849         int r;
1850
1851         r = -E2BIG;
1852         if (page_num >= blob_size)
1853                 goto out;
1854         r = -ENOMEM;
1855         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1856         if (IS_ERR(page)) {
1857                 r = PTR_ERR(page);
1858                 goto out;
1859         }
1860         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1861                 goto out_free;
1862         r = 0;
1863 out_free:
1864         kfree(page);
1865 out:
1866         return r;
1867 }
1868
1869 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1870 {
1871         gpa_t gpa = data & ~0x3f;
1872
1873         /* Bits 2:5 are reserved, Should be zero */
1874         if (data & 0x3c)
1875                 return 1;
1876
1877         vcpu->arch.apf.msr_val = data;
1878
1879         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1880                 kvm_clear_async_pf_completion_queue(vcpu);
1881                 kvm_async_pf_hash_reset(vcpu);
1882                 return 0;
1883         }
1884
1885         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1886                                         sizeof(u32)))
1887                 return 1;
1888
1889         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1890         kvm_async_pf_wakeup_all(vcpu);
1891         return 0;
1892 }
1893
1894 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1895 {
1896         vcpu->arch.pv_time_enabled = false;
1897 }
1898
1899 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1900 {
1901         u64 delta;
1902
1903         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1904                 return;
1905
1906         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1907         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1908         vcpu->arch.st.accum_steal = delta;
1909 }
1910
1911 static void record_steal_time(struct kvm_vcpu *vcpu)
1912 {
1913         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1914                 return;
1915
1916         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1917                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1918                 return;
1919
1920         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1921         vcpu->arch.st.steal.version += 2;
1922         vcpu->arch.st.accum_steal = 0;
1923
1924         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1925                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1926 }
1927
1928 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1929 {
1930         bool pr = false;
1931         u32 msr = msr_info->index;
1932         u64 data = msr_info->data;
1933
1934         switch (msr) {
1935         case MSR_AMD64_NB_CFG:
1936         case MSR_IA32_UCODE_REV:
1937         case MSR_IA32_UCODE_WRITE:
1938         case MSR_VM_HSAVE_PA:
1939         case MSR_AMD64_PATCH_LOADER:
1940         case MSR_AMD64_BU_CFG2:
1941                 break;
1942
1943         case MSR_EFER:
1944                 return set_efer(vcpu, data);
1945         case MSR_K7_HWCR:
1946                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1947                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1948                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1949                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
1950                 if (data != 0) {
1951                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1952                                     data);
1953                         return 1;
1954                 }
1955                 break;
1956         case MSR_FAM10H_MMIO_CONF_BASE:
1957                 if (data != 0) {
1958                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1959                                     "0x%llx\n", data);
1960                         return 1;
1961                 }
1962                 break;
1963         case MSR_IA32_DEBUGCTLMSR:
1964                 if (!data) {
1965                         /* We support the non-activated case already */
1966                         break;
1967                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1968                         /* Values other than LBR and BTF are vendor-specific,
1969                            thus reserved and should throw a #GP */
1970                         return 1;
1971                 }
1972                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1973                             __func__, data);
1974                 break;
1975         case 0x200 ... 0x2ff:
1976                 return kvm_mtrr_set_msr(vcpu, msr, data);
1977         case MSR_IA32_APICBASE:
1978                 return kvm_set_apic_base(vcpu, msr_info);
1979         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1980                 return kvm_x2apic_msr_write(vcpu, msr, data);
1981         case MSR_IA32_TSCDEADLINE:
1982                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1983                 break;
1984         case MSR_IA32_TSC_ADJUST:
1985                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
1986                         if (!msr_info->host_initiated) {
1987                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
1988                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
1989                         }
1990                         vcpu->arch.ia32_tsc_adjust_msr = data;
1991                 }
1992                 break;
1993         case MSR_IA32_MISC_ENABLE:
1994                 vcpu->arch.ia32_misc_enable_msr = data;
1995                 break;
1996         case MSR_IA32_SMBASE:
1997                 if (!msr_info->host_initiated)
1998                         return 1;
1999                 vcpu->arch.smbase = data;
2000                 break;
2001         case MSR_KVM_WALL_CLOCK_NEW:
2002         case MSR_KVM_WALL_CLOCK:
2003                 vcpu->kvm->arch.wall_clock = data;
2004                 kvm_write_wall_clock(vcpu->kvm, data);
2005                 break;
2006         case MSR_KVM_SYSTEM_TIME_NEW:
2007         case MSR_KVM_SYSTEM_TIME: {
2008                 u64 gpa_offset;
2009                 struct kvm_arch *ka = &vcpu->kvm->arch;
2010
2011                 kvmclock_reset(vcpu);
2012
2013                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2014                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2015
2016                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2017                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2018                                         &vcpu->requests);
2019
2020                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2021
2022                         ka->kvmclock_offset = -get_kernel_ns();
2023                 }
2024
2025                 vcpu->arch.time = data;
2026                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2027
2028                 /* we verify if the enable bit is set... */
2029                 if (!(data & 1))
2030                         break;
2031
2032                 gpa_offset = data & ~(PAGE_MASK | 1);
2033
2034                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2035                      &vcpu->arch.pv_time, data & ~1ULL,
2036                      sizeof(struct pvclock_vcpu_time_info)))
2037                         vcpu->arch.pv_time_enabled = false;
2038                 else
2039                         vcpu->arch.pv_time_enabled = true;
2040
2041                 break;
2042         }
2043         case MSR_KVM_ASYNC_PF_EN:
2044                 if (kvm_pv_enable_async_pf(vcpu, data))
2045                         return 1;
2046                 break;
2047         case MSR_KVM_STEAL_TIME:
2048
2049                 if (unlikely(!sched_info_on()))
2050                         return 1;
2051
2052                 if (data & KVM_STEAL_RESERVED_MASK)
2053                         return 1;
2054
2055                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2056                                                 data & KVM_STEAL_VALID_BITS,
2057                                                 sizeof(struct kvm_steal_time)))
2058                         return 1;
2059
2060                 vcpu->arch.st.msr_val = data;
2061
2062                 if (!(data & KVM_MSR_ENABLED))
2063                         break;
2064
2065                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2066
2067                 preempt_disable();
2068                 accumulate_steal_time(vcpu);
2069                 preempt_enable();
2070
2071                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2072
2073                 break;
2074         case MSR_KVM_PV_EOI_EN:
2075                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2076                         return 1;
2077                 break;
2078
2079         case MSR_IA32_MCG_CTL:
2080         case MSR_IA32_MCG_STATUS:
2081         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2082                 return set_msr_mce(vcpu, msr, data);
2083
2084         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2085         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2086                 pr = true; /* fall through */
2087         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2088         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2089                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2090                         return kvm_pmu_set_msr(vcpu, msr_info);
2091
2092                 if (pr || data != 0)
2093                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2094                                     "0x%x data 0x%llx\n", msr, data);
2095                 break;
2096         case MSR_K7_CLK_CTL:
2097                 /*
2098                  * Ignore all writes to this no longer documented MSR.
2099                  * Writes are only relevant for old K7 processors,
2100                  * all pre-dating SVM, but a recommended workaround from
2101                  * AMD for these chips. It is possible to specify the
2102                  * affected processor models on the command line, hence
2103                  * the need to ignore the workaround.
2104                  */
2105                 break;
2106         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2107         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2108         case HV_X64_MSR_CRASH_CTL:
2109                 return kvm_hv_set_msr_common(vcpu, msr, data,
2110                                              msr_info->host_initiated);
2111         case MSR_IA32_BBL_CR_CTL3:
2112                 /* Drop writes to this legacy MSR -- see rdmsr
2113                  * counterpart for further detail.
2114                  */
2115                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2116                 break;
2117         case MSR_AMD64_OSVW_ID_LENGTH:
2118                 if (!guest_cpuid_has_osvw(vcpu))
2119                         return 1;
2120                 vcpu->arch.osvw.length = data;
2121                 break;
2122         case MSR_AMD64_OSVW_STATUS:
2123                 if (!guest_cpuid_has_osvw(vcpu))
2124                         return 1;
2125                 vcpu->arch.osvw.status = data;
2126                 break;
2127         default:
2128                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2129                         return xen_hvm_config(vcpu, data);
2130                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2131                         return kvm_pmu_set_msr(vcpu, msr_info);
2132                 if (!ignore_msrs) {
2133                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2134                                     msr, data);
2135                         return 1;
2136                 } else {
2137                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2138                                     msr, data);
2139                         break;
2140                 }
2141         }
2142         return 0;
2143 }
2144 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2145
2146
2147 /*
2148  * Reads an msr value (of 'msr_index') into 'pdata'.
2149  * Returns 0 on success, non-0 otherwise.
2150  * Assumes vcpu_load() was already called.
2151  */
2152 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2153 {
2154         return kvm_x86_ops->get_msr(vcpu, msr);
2155 }
2156 EXPORT_SYMBOL_GPL(kvm_get_msr);
2157
2158 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2159 {
2160         u64 data;
2161         u64 mcg_cap = vcpu->arch.mcg_cap;
2162         unsigned bank_num = mcg_cap & 0xff;
2163
2164         switch (msr) {
2165         case MSR_IA32_P5_MC_ADDR:
2166         case MSR_IA32_P5_MC_TYPE:
2167                 data = 0;
2168                 break;
2169         case MSR_IA32_MCG_CAP:
2170                 data = vcpu->arch.mcg_cap;
2171                 break;
2172         case MSR_IA32_MCG_CTL:
2173                 if (!(mcg_cap & MCG_CTL_P))
2174                         return 1;
2175                 data = vcpu->arch.mcg_ctl;
2176                 break;
2177         case MSR_IA32_MCG_STATUS:
2178                 data = vcpu->arch.mcg_status;
2179                 break;
2180         default:
2181                 if (msr >= MSR_IA32_MC0_CTL &&
2182                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2183                         u32 offset = msr - MSR_IA32_MC0_CTL;
2184                         data = vcpu->arch.mce_banks[offset];
2185                         break;
2186                 }
2187                 return 1;
2188         }
2189         *pdata = data;
2190         return 0;
2191 }
2192
2193 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2194 {
2195         switch (msr_info->index) {
2196         case MSR_IA32_PLATFORM_ID:
2197         case MSR_IA32_EBL_CR_POWERON:
2198         case MSR_IA32_DEBUGCTLMSR:
2199         case MSR_IA32_LASTBRANCHFROMIP:
2200         case MSR_IA32_LASTBRANCHTOIP:
2201         case MSR_IA32_LASTINTFROMIP:
2202         case MSR_IA32_LASTINTTOIP:
2203         case MSR_K8_SYSCFG:
2204         case MSR_K7_HWCR:
2205         case MSR_VM_HSAVE_PA:
2206         case MSR_K8_INT_PENDING_MSG:
2207         case MSR_AMD64_NB_CFG:
2208         case MSR_FAM10H_MMIO_CONF_BASE:
2209         case MSR_AMD64_BU_CFG2:
2210                 msr_info->data = 0;
2211                 break;
2212         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2213         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2214         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2215         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2216                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2217                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2218                 msr_info->data = 0;
2219                 break;
2220         case MSR_IA32_UCODE_REV:
2221                 msr_info->data = 0x100000000ULL;
2222                 break;
2223         case MSR_MTRRcap:
2224         case 0x200 ... 0x2ff:
2225                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2226         case 0xcd: /* fsb frequency */
2227                 msr_info->data = 3;
2228                 break;
2229                 /*
2230                  * MSR_EBC_FREQUENCY_ID
2231                  * Conservative value valid for even the basic CPU models.
2232                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2233                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2234                  * and 266MHz for model 3, or 4. Set Core Clock
2235                  * Frequency to System Bus Frequency Ratio to 1 (bits
2236                  * 31:24) even though these are only valid for CPU
2237                  * models > 2, however guests may end up dividing or
2238                  * multiplying by zero otherwise.
2239                  */
2240         case MSR_EBC_FREQUENCY_ID:
2241                 msr_info->data = 1 << 24;
2242                 break;
2243         case MSR_IA32_APICBASE:
2244                 msr_info->data = kvm_get_apic_base(vcpu);
2245                 break;
2246         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2247                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2248                 break;
2249         case MSR_IA32_TSCDEADLINE:
2250                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2251                 break;
2252         case MSR_IA32_TSC_ADJUST:
2253                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2254                 break;
2255         case MSR_IA32_MISC_ENABLE:
2256                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2257                 break;
2258         case MSR_IA32_SMBASE:
2259                 if (!msr_info->host_initiated)
2260                         return 1;
2261                 msr_info->data = vcpu->arch.smbase;
2262                 break;
2263         case MSR_IA32_PERF_STATUS:
2264                 /* TSC increment by tick */
2265                 msr_info->data = 1000ULL;
2266                 /* CPU multiplier */
2267                 msr_info->data |= (((uint64_t)4ULL) << 40);
2268                 break;
2269         case MSR_EFER:
2270                 msr_info->data = vcpu->arch.efer;
2271                 break;
2272         case MSR_KVM_WALL_CLOCK:
2273         case MSR_KVM_WALL_CLOCK_NEW:
2274                 msr_info->data = vcpu->kvm->arch.wall_clock;
2275                 break;
2276         case MSR_KVM_SYSTEM_TIME:
2277         case MSR_KVM_SYSTEM_TIME_NEW:
2278                 msr_info->data = vcpu->arch.time;
2279                 break;
2280         case MSR_KVM_ASYNC_PF_EN:
2281                 msr_info->data = vcpu->arch.apf.msr_val;
2282                 break;
2283         case MSR_KVM_STEAL_TIME:
2284                 msr_info->data = vcpu->arch.st.msr_val;
2285                 break;
2286         case MSR_KVM_PV_EOI_EN:
2287                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2288                 break;
2289         case MSR_IA32_P5_MC_ADDR:
2290         case MSR_IA32_P5_MC_TYPE:
2291         case MSR_IA32_MCG_CAP:
2292         case MSR_IA32_MCG_CTL:
2293         case MSR_IA32_MCG_STATUS:
2294         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2295                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2296         case MSR_K7_CLK_CTL:
2297                 /*
2298                  * Provide expected ramp-up count for K7. All other
2299                  * are set to zero, indicating minimum divisors for
2300                  * every field.
2301                  *
2302                  * This prevents guest kernels on AMD host with CPU
2303                  * type 6, model 8 and higher from exploding due to
2304                  * the rdmsr failing.
2305                  */
2306                 msr_info->data = 0x20000000;
2307                 break;
2308         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2309         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2310         case HV_X64_MSR_CRASH_CTL:
2311                 return kvm_hv_get_msr_common(vcpu,
2312                                              msr_info->index, &msr_info->data);
2313                 break;
2314         case MSR_IA32_BBL_CR_CTL3:
2315                 /* This legacy MSR exists but isn't fully documented in current
2316                  * silicon.  It is however accessed by winxp in very narrow
2317                  * scenarios where it sets bit #19, itself documented as
2318                  * a "reserved" bit.  Best effort attempt to source coherent
2319                  * read data here should the balance of the register be
2320                  * interpreted by the guest:
2321                  *
2322                  * L2 cache control register 3: 64GB range, 256KB size,
2323                  * enabled, latency 0x1, configured
2324                  */
2325                 msr_info->data = 0xbe702111;
2326                 break;
2327         case MSR_AMD64_OSVW_ID_LENGTH:
2328                 if (!guest_cpuid_has_osvw(vcpu))
2329                         return 1;
2330                 msr_info->data = vcpu->arch.osvw.length;
2331                 break;
2332         case MSR_AMD64_OSVW_STATUS:
2333                 if (!guest_cpuid_has_osvw(vcpu))
2334                         return 1;
2335                 msr_info->data = vcpu->arch.osvw.status;
2336                 break;
2337         default:
2338                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2339                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2340                 if (!ignore_msrs) {
2341                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2342                         return 1;
2343                 } else {
2344                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2345                         msr_info->data = 0;
2346                 }
2347                 break;
2348         }
2349         return 0;
2350 }
2351 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2352
2353 /*
2354  * Read or write a bunch of msrs. All parameters are kernel addresses.
2355  *
2356  * @return number of msrs set successfully.
2357  */
2358 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2359                     struct kvm_msr_entry *entries,
2360                     int (*do_msr)(struct kvm_vcpu *vcpu,
2361                                   unsigned index, u64 *data))
2362 {
2363         int i, idx;
2364
2365         idx = srcu_read_lock(&vcpu->kvm->srcu);
2366         for (i = 0; i < msrs->nmsrs; ++i)
2367                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2368                         break;
2369         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2370
2371         return i;
2372 }
2373
2374 /*
2375  * Read or write a bunch of msrs. Parameters are user addresses.
2376  *
2377  * @return number of msrs set successfully.
2378  */
2379 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2380                   int (*do_msr)(struct kvm_vcpu *vcpu,
2381                                 unsigned index, u64 *data),
2382                   int writeback)
2383 {
2384         struct kvm_msrs msrs;
2385         struct kvm_msr_entry *entries;
2386         int r, n;
2387         unsigned size;
2388
2389         r = -EFAULT;
2390         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2391                 goto out;
2392
2393         r = -E2BIG;
2394         if (msrs.nmsrs >= MAX_IO_MSRS)
2395                 goto out;
2396
2397         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2398         entries = memdup_user(user_msrs->entries, size);
2399         if (IS_ERR(entries)) {
2400                 r = PTR_ERR(entries);
2401                 goto out;
2402         }
2403
2404         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2405         if (r < 0)
2406                 goto out_free;
2407
2408         r = -EFAULT;
2409         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2410                 goto out_free;
2411
2412         r = n;
2413
2414 out_free:
2415         kfree(entries);
2416 out:
2417         return r;
2418 }
2419
2420 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2421 {
2422         int r;
2423
2424         switch (ext) {
2425         case KVM_CAP_IRQCHIP:
2426         case KVM_CAP_HLT:
2427         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2428         case KVM_CAP_SET_TSS_ADDR:
2429         case KVM_CAP_EXT_CPUID:
2430         case KVM_CAP_EXT_EMUL_CPUID:
2431         case KVM_CAP_CLOCKSOURCE:
2432         case KVM_CAP_PIT:
2433         case KVM_CAP_NOP_IO_DELAY:
2434         case KVM_CAP_MP_STATE:
2435         case KVM_CAP_SYNC_MMU:
2436         case KVM_CAP_USER_NMI:
2437         case KVM_CAP_REINJECT_CONTROL:
2438         case KVM_CAP_IRQ_INJECT_STATUS:
2439         case KVM_CAP_IOEVENTFD:
2440         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2441         case KVM_CAP_PIT2:
2442         case KVM_CAP_PIT_STATE2:
2443         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2444         case KVM_CAP_XEN_HVM:
2445         case KVM_CAP_ADJUST_CLOCK:
2446         case KVM_CAP_VCPU_EVENTS:
2447         case KVM_CAP_HYPERV:
2448         case KVM_CAP_HYPERV_VAPIC:
2449         case KVM_CAP_HYPERV_SPIN:
2450         case KVM_CAP_PCI_SEGMENT:
2451         case KVM_CAP_DEBUGREGS:
2452         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2453         case KVM_CAP_XSAVE:
2454         case KVM_CAP_ASYNC_PF:
2455         case KVM_CAP_GET_TSC_KHZ:
2456         case KVM_CAP_KVMCLOCK_CTRL:
2457         case KVM_CAP_READONLY_MEM:
2458         case KVM_CAP_HYPERV_TIME:
2459         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2460         case KVM_CAP_TSC_DEADLINE_TIMER:
2461         case KVM_CAP_ENABLE_CAP_VM:
2462         case KVM_CAP_DISABLE_QUIRKS:
2463         case KVM_CAP_SET_BOOT_CPU_ID:
2464 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2465         case KVM_CAP_ASSIGN_DEV_IRQ:
2466         case KVM_CAP_PCI_2_3:
2467 #endif
2468                 r = 1;
2469                 break;
2470         case KVM_CAP_X86_SMM:
2471                 /* SMBASE is usually relocated above 1M on modern chipsets,
2472                  * and SMM handlers might indeed rely on 4G segment limits,
2473                  * so do not report SMM to be available if real mode is
2474                  * emulated via vm86 mode.  Still, do not go to great lengths
2475                  * to avoid userspace's usage of the feature, because it is a
2476                  * fringe case that is not enabled except via specific settings
2477                  * of the module parameters.
2478                  */
2479                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2480                 break;
2481         case KVM_CAP_COALESCED_MMIO:
2482                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2483                 break;
2484         case KVM_CAP_VAPIC:
2485                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2486                 break;
2487         case KVM_CAP_NR_VCPUS:
2488                 r = KVM_SOFT_MAX_VCPUS;
2489                 break;
2490         case KVM_CAP_MAX_VCPUS:
2491                 r = KVM_MAX_VCPUS;
2492                 break;
2493         case KVM_CAP_NR_MEMSLOTS:
2494                 r = KVM_USER_MEM_SLOTS;
2495                 break;
2496         case KVM_CAP_PV_MMU:    /* obsolete */
2497                 r = 0;
2498                 break;
2499 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2500         case KVM_CAP_IOMMU:
2501                 r = iommu_present(&pci_bus_type);
2502                 break;
2503 #endif
2504         case KVM_CAP_MCE:
2505                 r = KVM_MAX_MCE_BANKS;
2506                 break;
2507         case KVM_CAP_XCRS:
2508                 r = cpu_has_xsave;
2509                 break;
2510         case KVM_CAP_TSC_CONTROL:
2511                 r = kvm_has_tsc_control;
2512                 break;
2513         default:
2514                 r = 0;
2515                 break;
2516         }
2517         return r;
2518
2519 }
2520
2521 long kvm_arch_dev_ioctl(struct file *filp,
2522                         unsigned int ioctl, unsigned long arg)
2523 {
2524         void __user *argp = (void __user *)arg;
2525         long r;
2526
2527         switch (ioctl) {
2528         case KVM_GET_MSR_INDEX_LIST: {
2529                 struct kvm_msr_list __user *user_msr_list = argp;
2530                 struct kvm_msr_list msr_list;
2531                 unsigned n;
2532
2533                 r = -EFAULT;
2534                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2535                         goto out;
2536                 n = msr_list.nmsrs;
2537                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2538                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2539                         goto out;
2540                 r = -E2BIG;
2541                 if (n < msr_list.nmsrs)
2542                         goto out;
2543                 r = -EFAULT;
2544                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2545                                  num_msrs_to_save * sizeof(u32)))
2546                         goto out;
2547                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2548                                  &emulated_msrs,
2549                                  num_emulated_msrs * sizeof(u32)))
2550                         goto out;
2551                 r = 0;
2552                 break;
2553         }
2554         case KVM_GET_SUPPORTED_CPUID:
2555         case KVM_GET_EMULATED_CPUID: {
2556                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2557                 struct kvm_cpuid2 cpuid;
2558
2559                 r = -EFAULT;
2560                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2561                         goto out;
2562
2563                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2564                                             ioctl);
2565                 if (r)
2566                         goto out;
2567
2568                 r = -EFAULT;
2569                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2570                         goto out;
2571                 r = 0;
2572                 break;
2573         }
2574         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2575                 u64 mce_cap;
2576
2577                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2578                 r = -EFAULT;
2579                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2580                         goto out;
2581                 r = 0;
2582                 break;
2583         }
2584         default:
2585                 r = -EINVAL;
2586         }
2587 out:
2588         return r;
2589 }
2590
2591 static void wbinvd_ipi(void *garbage)
2592 {
2593         wbinvd();
2594 }
2595
2596 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2597 {
2598         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2599 }
2600
2601 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2602 {
2603         /* Address WBINVD may be executed by guest */
2604         if (need_emulate_wbinvd(vcpu)) {
2605                 if (kvm_x86_ops->has_wbinvd_exit())
2606                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2607                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2608                         smp_call_function_single(vcpu->cpu,
2609                                         wbinvd_ipi, NULL, 1);
2610         }
2611
2612         kvm_x86_ops->vcpu_load(vcpu, cpu);
2613
2614         /* Apply any externally detected TSC adjustments (due to suspend) */
2615         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2616                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2617                 vcpu->arch.tsc_offset_adjustment = 0;
2618                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2619         }
2620
2621         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2622                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2623                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2624                 if (tsc_delta < 0)
2625                         mark_tsc_unstable("KVM discovered backwards TSC");
2626                 if (check_tsc_unstable()) {
2627                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2628                                                 vcpu->arch.last_guest_tsc);
2629                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2630                         vcpu->arch.tsc_catchup = 1;
2631                 }
2632                 /*
2633                  * On a host with synchronized TSC, there is no need to update
2634                  * kvmclock on vcpu->cpu migration
2635                  */
2636                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2637                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2638                 if (vcpu->cpu != cpu)
2639                         kvm_migrate_timers(vcpu);
2640                 vcpu->cpu = cpu;
2641         }
2642
2643         accumulate_steal_time(vcpu);
2644         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2645 }
2646
2647 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2648 {
2649         kvm_x86_ops->vcpu_put(vcpu);
2650         kvm_put_guest_fpu(vcpu);
2651         vcpu->arch.last_host_tsc = native_read_tsc();
2652 }
2653
2654 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2655                                     struct kvm_lapic_state *s)
2656 {
2657         kvm_x86_ops->sync_pir_to_irr(vcpu);
2658         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2659
2660         return 0;
2661 }
2662
2663 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2664                                     struct kvm_lapic_state *s)
2665 {
2666         kvm_apic_post_state_restore(vcpu, s);
2667         update_cr8_intercept(vcpu);
2668
2669         return 0;
2670 }
2671
2672 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2673                                     struct kvm_interrupt *irq)
2674 {
2675         if (irq->irq >= KVM_NR_INTERRUPTS)
2676                 return -EINVAL;
2677         if (irqchip_in_kernel(vcpu->kvm))
2678                 return -ENXIO;
2679
2680         kvm_queue_interrupt(vcpu, irq->irq, false);
2681         kvm_make_request(KVM_REQ_EVENT, vcpu);
2682
2683         return 0;
2684 }
2685
2686 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2687 {
2688         kvm_inject_nmi(vcpu);
2689
2690         return 0;
2691 }
2692
2693 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2694 {
2695         kvm_make_request(KVM_REQ_SMI, vcpu);
2696
2697         return 0;
2698 }
2699
2700 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2701                                            struct kvm_tpr_access_ctl *tac)
2702 {
2703         if (tac->flags)
2704                 return -EINVAL;
2705         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2706         return 0;
2707 }
2708
2709 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2710                                         u64 mcg_cap)
2711 {
2712         int r;
2713         unsigned bank_num = mcg_cap & 0xff, bank;
2714
2715         r = -EINVAL;
2716         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2717                 goto out;
2718         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2719                 goto out;
2720         r = 0;
2721         vcpu->arch.mcg_cap = mcg_cap;
2722         /* Init IA32_MCG_CTL to all 1s */
2723         if (mcg_cap & MCG_CTL_P)
2724                 vcpu->arch.mcg_ctl = ~(u64)0;
2725         /* Init IA32_MCi_CTL to all 1s */
2726         for (bank = 0; bank < bank_num; bank++)
2727                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2728 out:
2729         return r;
2730 }
2731
2732 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2733                                       struct kvm_x86_mce *mce)
2734 {
2735         u64 mcg_cap = vcpu->arch.mcg_cap;
2736         unsigned bank_num = mcg_cap & 0xff;
2737         u64 *banks = vcpu->arch.mce_banks;
2738
2739         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2740                 return -EINVAL;
2741         /*
2742          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2743          * reporting is disabled
2744          */
2745         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2746             vcpu->arch.mcg_ctl != ~(u64)0)
2747                 return 0;
2748         banks += 4 * mce->bank;
2749         /*
2750          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2751          * reporting is disabled for the bank
2752          */
2753         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2754                 return 0;
2755         if (mce->status & MCI_STATUS_UC) {
2756                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2757                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2758                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2759                         return 0;
2760                 }
2761                 if (banks[1] & MCI_STATUS_VAL)
2762                         mce->status |= MCI_STATUS_OVER;
2763                 banks[2] = mce->addr;
2764                 banks[3] = mce->misc;
2765                 vcpu->arch.mcg_status = mce->mcg_status;
2766                 banks[1] = mce->status;
2767                 kvm_queue_exception(vcpu, MC_VECTOR);
2768         } else if (!(banks[1] & MCI_STATUS_VAL)
2769                    || !(banks[1] & MCI_STATUS_UC)) {
2770                 if (banks[1] & MCI_STATUS_VAL)
2771                         mce->status |= MCI_STATUS_OVER;
2772                 banks[2] = mce->addr;
2773                 banks[3] = mce->misc;
2774                 banks[1] = mce->status;
2775         } else
2776                 banks[1] |= MCI_STATUS_OVER;
2777         return 0;
2778 }
2779
2780 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2781                                                struct kvm_vcpu_events *events)
2782 {
2783         process_nmi(vcpu);
2784         events->exception.injected =
2785                 vcpu->arch.exception.pending &&
2786                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2787         events->exception.nr = vcpu->arch.exception.nr;
2788         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2789         events->exception.pad = 0;
2790         events->exception.error_code = vcpu->arch.exception.error_code;
2791
2792         events->interrupt.injected =
2793                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2794         events->interrupt.nr = vcpu->arch.interrupt.nr;
2795         events->interrupt.soft = 0;
2796         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2797
2798         events->nmi.injected = vcpu->arch.nmi_injected;
2799         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2800         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2801         events->nmi.pad = 0;
2802
2803         events->sipi_vector = 0; /* never valid when reporting to user space */
2804
2805         events->smi.smm = is_smm(vcpu);
2806         events->smi.pending = vcpu->arch.smi_pending;
2807         events->smi.smm_inside_nmi =
2808                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2809         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2810
2811         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2812                          | KVM_VCPUEVENT_VALID_SHADOW
2813                          | KVM_VCPUEVENT_VALID_SMM);
2814         memset(&events->reserved, 0, sizeof(events->reserved));
2815 }
2816
2817 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2818                                               struct kvm_vcpu_events *events)
2819 {
2820         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2821                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2822                               | KVM_VCPUEVENT_VALID_SHADOW
2823                               | KVM_VCPUEVENT_VALID_SMM))
2824                 return -EINVAL;
2825
2826         process_nmi(vcpu);
2827         vcpu->arch.exception.pending = events->exception.injected;
2828         vcpu->arch.exception.nr = events->exception.nr;
2829         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2830         vcpu->arch.exception.error_code = events->exception.error_code;
2831
2832         vcpu->arch.interrupt.pending = events->interrupt.injected;
2833         vcpu->arch.interrupt.nr = events->interrupt.nr;
2834         vcpu->arch.interrupt.soft = events->interrupt.soft;
2835         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2836                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2837                                                   events->interrupt.shadow);
2838
2839         vcpu->arch.nmi_injected = events->nmi.injected;
2840         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2841                 vcpu->arch.nmi_pending = events->nmi.pending;
2842         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2843
2844         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2845             kvm_vcpu_has_lapic(vcpu))
2846                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2847
2848         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2849                 if (events->smi.smm)
2850                         vcpu->arch.hflags |= HF_SMM_MASK;
2851                 else
2852                         vcpu->arch.hflags &= ~HF_SMM_MASK;
2853                 vcpu->arch.smi_pending = events->smi.pending;
2854                 if (events->smi.smm_inside_nmi)
2855                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2856                 else
2857                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
2858                 if (kvm_vcpu_has_lapic(vcpu)) {
2859                         if (events->smi.latched_init)
2860                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2861                         else
2862                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2863                 }
2864         }
2865
2866         kvm_make_request(KVM_REQ_EVENT, vcpu);
2867
2868         return 0;
2869 }
2870
2871 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2872                                              struct kvm_debugregs *dbgregs)
2873 {
2874         unsigned long val;
2875
2876         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2877         kvm_get_dr(vcpu, 6, &val);
2878         dbgregs->dr6 = val;
2879         dbgregs->dr7 = vcpu->arch.dr7;
2880         dbgregs->flags = 0;
2881         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2882 }
2883
2884 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2885                                             struct kvm_debugregs *dbgregs)
2886 {
2887         if (dbgregs->flags)
2888                 return -EINVAL;
2889
2890         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2891         kvm_update_dr0123(vcpu);
2892         vcpu->arch.dr6 = dbgregs->dr6;
2893         kvm_update_dr6(vcpu);
2894         vcpu->arch.dr7 = dbgregs->dr7;
2895         kvm_update_dr7(vcpu);
2896
2897         return 0;
2898 }
2899
2900 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
2901
2902 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
2903 {
2904         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
2905         u64 xstate_bv = xsave->header.xfeatures;
2906         u64 valid;
2907
2908         /*
2909          * Copy legacy XSAVE area, to avoid complications with CPUID
2910          * leaves 0 and 1 in the loop below.
2911          */
2912         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
2913
2914         /* Set XSTATE_BV */
2915         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
2916
2917         /*
2918          * Copy each region from the possibly compacted offset to the
2919          * non-compacted offset.
2920          */
2921         valid = xstate_bv & ~XSTATE_FPSSE;
2922         while (valid) {
2923                 u64 feature = valid & -valid;
2924                 int index = fls64(feature) - 1;
2925                 void *src = get_xsave_addr(xsave, feature);
2926
2927                 if (src) {
2928                         u32 size, offset, ecx, edx;
2929                         cpuid_count(XSTATE_CPUID, index,
2930                                     &size, &offset, &ecx, &edx);
2931                         memcpy(dest + offset, src, size);
2932                 }
2933
2934                 valid -= feature;
2935         }
2936 }
2937
2938 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
2939 {
2940         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
2941         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
2942         u64 valid;
2943
2944         /*
2945          * Copy legacy XSAVE area, to avoid complications with CPUID
2946          * leaves 0 and 1 in the loop below.
2947          */
2948         memcpy(xsave, src, XSAVE_HDR_OFFSET);
2949
2950         /* Set XSTATE_BV and possibly XCOMP_BV.  */
2951         xsave->header.xfeatures = xstate_bv;
2952         if (cpu_has_xsaves)
2953                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
2954
2955         /*
2956          * Copy each region from the non-compacted offset to the
2957          * possibly compacted offset.
2958          */
2959         valid = xstate_bv & ~XSTATE_FPSSE;
2960         while (valid) {
2961                 u64 feature = valid & -valid;
2962                 int index = fls64(feature) - 1;
2963                 void *dest = get_xsave_addr(xsave, feature);
2964
2965                 if (dest) {
2966                         u32 size, offset, ecx, edx;
2967                         cpuid_count(XSTATE_CPUID, index,
2968                                     &size, &offset, &ecx, &edx);
2969                         memcpy(dest, src + offset, size);
2970                 }
2971
2972                 valid -= feature;
2973         }
2974 }
2975
2976 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2977                                          struct kvm_xsave *guest_xsave)
2978 {
2979         if (cpu_has_xsave) {
2980                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
2981                 fill_xsave((u8 *) guest_xsave->region, vcpu);
2982         } else {
2983                 memcpy(guest_xsave->region,
2984                         &vcpu->arch.guest_fpu.state.fxsave,
2985                         sizeof(struct fxregs_state));
2986                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2987                         XSTATE_FPSSE;
2988         }
2989 }
2990
2991 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2992                                         struct kvm_xsave *guest_xsave)
2993 {
2994         u64 xstate_bv =
2995                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2996
2997         if (cpu_has_xsave) {
2998                 /*
2999                  * Here we allow setting states that are not present in
3000                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3001                  * with old userspace.
3002                  */
3003                 if (xstate_bv & ~kvm_supported_xcr0())
3004                         return -EINVAL;
3005                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3006         } else {
3007                 if (xstate_bv & ~XSTATE_FPSSE)
3008                         return -EINVAL;
3009                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3010                         guest_xsave->region, sizeof(struct fxregs_state));
3011         }
3012         return 0;
3013 }
3014
3015 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3016                                         struct kvm_xcrs *guest_xcrs)
3017 {
3018         if (!cpu_has_xsave) {
3019                 guest_xcrs->nr_xcrs = 0;
3020                 return;
3021         }
3022
3023         guest_xcrs->nr_xcrs = 1;
3024         guest_xcrs->flags = 0;
3025         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3026         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3027 }
3028
3029 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3030                                        struct kvm_xcrs *guest_xcrs)
3031 {
3032         int i, r = 0;
3033
3034         if (!cpu_has_xsave)
3035                 return -EINVAL;
3036
3037         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3038                 return -EINVAL;
3039
3040         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3041                 /* Only support XCR0 currently */
3042                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3043                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3044                                 guest_xcrs->xcrs[i].value);
3045                         break;
3046                 }
3047         if (r)
3048                 r = -EINVAL;
3049         return r;
3050 }
3051
3052 /*
3053  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3054  * stopped by the hypervisor.  This function will be called from the host only.
3055  * EINVAL is returned when the host attempts to set the flag for a guest that
3056  * does not support pv clocks.
3057  */
3058 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3059 {
3060         if (!vcpu->arch.pv_time_enabled)
3061                 return -EINVAL;
3062         vcpu->arch.pvclock_set_guest_stopped_request = true;
3063         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3064         return 0;
3065 }
3066
3067 long kvm_arch_vcpu_ioctl(struct file *filp,
3068                          unsigned int ioctl, unsigned long arg)
3069 {
3070         struct kvm_vcpu *vcpu = filp->private_data;
3071         void __user *argp = (void __user *)arg;
3072         int r;
3073         union {
3074                 struct kvm_lapic_state *lapic;
3075                 struct kvm_xsave *xsave;
3076                 struct kvm_xcrs *xcrs;
3077                 void *buffer;
3078         } u;
3079
3080         u.buffer = NULL;
3081         switch (ioctl) {
3082         case KVM_GET_LAPIC: {
3083                 r = -EINVAL;
3084                 if (!vcpu->arch.apic)
3085                         goto out;
3086                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3087
3088                 r = -ENOMEM;
3089                 if (!u.lapic)
3090                         goto out;
3091                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3092                 if (r)
3093                         goto out;
3094                 r = -EFAULT;
3095                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3096                         goto out;
3097                 r = 0;
3098                 break;
3099         }
3100         case KVM_SET_LAPIC: {
3101                 r = -EINVAL;
3102                 if (!vcpu->arch.apic)
3103                         goto out;
3104                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3105                 if (IS_ERR(u.lapic))
3106                         return PTR_ERR(u.lapic);
3107
3108                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3109                 break;
3110         }
3111         case KVM_INTERRUPT: {
3112                 struct kvm_interrupt irq;
3113
3114                 r = -EFAULT;
3115                 if (copy_from_user(&irq, argp, sizeof irq))
3116                         goto out;
3117                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3118                 break;
3119         }
3120         case KVM_NMI: {
3121                 r = kvm_vcpu_ioctl_nmi(vcpu);
3122                 break;
3123         }
3124         case KVM_SMI: {
3125                 r = kvm_vcpu_ioctl_smi(vcpu);
3126                 break;
3127         }
3128         case KVM_SET_CPUID: {
3129                 struct kvm_cpuid __user *cpuid_arg = argp;
3130                 struct kvm_cpuid cpuid;
3131
3132                 r = -EFAULT;
3133                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3134                         goto out;
3135                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3136                 break;
3137         }
3138         case KVM_SET_CPUID2: {
3139                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3140                 struct kvm_cpuid2 cpuid;
3141
3142                 r = -EFAULT;
3143                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3144                         goto out;
3145                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3146                                               cpuid_arg->entries);
3147                 break;
3148         }
3149         case KVM_GET_CPUID2: {
3150                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3151                 struct kvm_cpuid2 cpuid;
3152
3153                 r = -EFAULT;
3154                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3155                         goto out;
3156                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3157                                               cpuid_arg->entries);
3158                 if (r)
3159                         goto out;
3160                 r = -EFAULT;
3161                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3162                         goto out;
3163                 r = 0;
3164                 break;
3165         }
3166         case KVM_GET_MSRS:
3167                 r = msr_io(vcpu, argp, do_get_msr, 1);
3168                 break;
3169         case KVM_SET_MSRS:
3170                 r = msr_io(vcpu, argp, do_set_msr, 0);
3171                 break;
3172         case KVM_TPR_ACCESS_REPORTING: {
3173                 struct kvm_tpr_access_ctl tac;
3174
3175                 r = -EFAULT;
3176                 if (copy_from_user(&tac, argp, sizeof tac))
3177                         goto out;
3178                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3179                 if (r)
3180                         goto out;
3181                 r = -EFAULT;
3182                 if (copy_to_user(argp, &tac, sizeof tac))
3183                         goto out;
3184                 r = 0;
3185                 break;
3186         };
3187         case KVM_SET_VAPIC_ADDR: {
3188                 struct kvm_vapic_addr va;
3189
3190                 r = -EINVAL;
3191                 if (!irqchip_in_kernel(vcpu->kvm))
3192                         goto out;
3193                 r = -EFAULT;
3194                 if (copy_from_user(&va, argp, sizeof va))
3195                         goto out;
3196                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3197                 break;
3198         }
3199         case KVM_X86_SETUP_MCE: {
3200                 u64 mcg_cap;
3201
3202                 r = -EFAULT;
3203                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3204                         goto out;
3205                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3206                 break;
3207         }
3208         case KVM_X86_SET_MCE: {
3209                 struct kvm_x86_mce mce;
3210
3211                 r = -EFAULT;
3212                 if (copy_from_user(&mce, argp, sizeof mce))
3213                         goto out;
3214                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3215                 break;
3216         }
3217         case KVM_GET_VCPU_EVENTS: {
3218                 struct kvm_vcpu_events events;
3219
3220                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3221
3222                 r = -EFAULT;
3223                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3224                         break;
3225                 r = 0;
3226                 break;
3227         }
3228         case KVM_SET_VCPU_EVENTS: {
3229                 struct kvm_vcpu_events events;
3230
3231                 r = -EFAULT;
3232                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3233                         break;
3234
3235                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3236                 break;
3237         }
3238         case KVM_GET_DEBUGREGS: {
3239                 struct kvm_debugregs dbgregs;
3240
3241                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3242
3243                 r = -EFAULT;
3244                 if (copy_to_user(argp, &dbgregs,
3245                                  sizeof(struct kvm_debugregs)))
3246                         break;
3247                 r = 0;
3248                 break;
3249         }
3250         case KVM_SET_DEBUGREGS: {
3251                 struct kvm_debugregs dbgregs;
3252
3253                 r = -EFAULT;
3254                 if (copy_from_user(&dbgregs, argp,
3255                                    sizeof(struct kvm_debugregs)))
3256                         break;
3257
3258                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3259                 break;
3260         }
3261         case KVM_GET_XSAVE: {
3262                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3263                 r = -ENOMEM;
3264                 if (!u.xsave)
3265                         break;
3266
3267                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3268
3269                 r = -EFAULT;
3270                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3271                         break;
3272                 r = 0;
3273                 break;
3274         }
3275         case KVM_SET_XSAVE: {
3276                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3277                 if (IS_ERR(u.xsave))
3278                         return PTR_ERR(u.xsave);
3279
3280                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3281                 break;
3282         }
3283         case KVM_GET_XCRS: {
3284                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3285                 r = -ENOMEM;
3286                 if (!u.xcrs)
3287                         break;
3288
3289                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3290
3291                 r = -EFAULT;
3292                 if (copy_to_user(argp, u.xcrs,
3293                                  sizeof(struct kvm_xcrs)))
3294                         break;
3295                 r = 0;
3296                 break;
3297         }
3298         case KVM_SET_XCRS: {
3299                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3300                 if (IS_ERR(u.xcrs))
3301                         return PTR_ERR(u.xcrs);
3302
3303                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3304                 break;
3305         }
3306         case KVM_SET_TSC_KHZ: {
3307                 u32 user_tsc_khz;
3308
3309                 r = -EINVAL;
3310                 user_tsc_khz = (u32)arg;
3311
3312                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3313                         goto out;
3314
3315                 if (user_tsc_khz == 0)
3316                         user_tsc_khz = tsc_khz;
3317
3318                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3319
3320                 r = 0;
3321                 goto out;
3322         }
3323         case KVM_GET_TSC_KHZ: {
3324                 r = vcpu->arch.virtual_tsc_khz;
3325                 goto out;
3326         }
3327         case KVM_KVMCLOCK_CTRL: {
3328                 r = kvm_set_guest_paused(vcpu);
3329                 goto out;
3330         }
3331         default:
3332                 r = -EINVAL;
3333         }
3334 out:
3335         kfree(u.buffer);
3336         return r;
3337 }
3338
3339 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3340 {
3341         return VM_FAULT_SIGBUS;
3342 }
3343
3344 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3345 {
3346         int ret;
3347
3348         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3349                 return -EINVAL;
3350         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3351         return ret;
3352 }
3353
3354 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3355                                               u64 ident_addr)
3356 {
3357         kvm->arch.ept_identity_map_addr = ident_addr;
3358         return 0;
3359 }
3360
3361 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3362                                           u32 kvm_nr_mmu_pages)
3363 {
3364         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3365                 return -EINVAL;
3366
3367         mutex_lock(&kvm->slots_lock);
3368
3369         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3370         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3371
3372         mutex_unlock(&kvm->slots_lock);
3373         return 0;
3374 }
3375
3376 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3377 {
3378         return kvm->arch.n_max_mmu_pages;
3379 }
3380
3381 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3382 {
3383         int r;
3384
3385         r = 0;
3386         switch (chip->chip_id) {
3387         case KVM_IRQCHIP_PIC_MASTER:
3388                 memcpy(&chip->chip.pic,
3389                         &pic_irqchip(kvm)->pics[0],
3390                         sizeof(struct kvm_pic_state));
3391                 break;
3392         case KVM_IRQCHIP_PIC_SLAVE:
3393                 memcpy(&chip->chip.pic,
3394                         &pic_irqchip(kvm)->pics[1],
3395                         sizeof(struct kvm_pic_state));
3396                 break;
3397         case KVM_IRQCHIP_IOAPIC:
3398                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3399                 break;
3400         default:
3401                 r = -EINVAL;
3402                 break;
3403         }
3404         return r;
3405 }
3406
3407 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3408 {
3409         int r;
3410
3411         r = 0;
3412         switch (chip->chip_id) {
3413         case KVM_IRQCHIP_PIC_MASTER:
3414                 spin_lock(&pic_irqchip(kvm)->lock);
3415                 memcpy(&pic_irqchip(kvm)->pics[0],
3416                         &chip->chip.pic,
3417                         sizeof(struct kvm_pic_state));
3418                 spin_unlock(&pic_irqchip(kvm)->lock);
3419                 break;
3420         case KVM_IRQCHIP_PIC_SLAVE:
3421                 spin_lock(&pic_irqchip(kvm)->lock);
3422                 memcpy(&pic_irqchip(kvm)->pics[1],
3423                         &chip->chip.pic,
3424                         sizeof(struct kvm_pic_state));
3425                 spin_unlock(&pic_irqchip(kvm)->lock);
3426                 break;
3427         case KVM_IRQCHIP_IOAPIC:
3428                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3429                 break;
3430         default:
3431                 r = -EINVAL;
3432                 break;
3433         }
3434         kvm_pic_update_irq(pic_irqchip(kvm));
3435         return r;
3436 }
3437
3438 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3439 {
3440         int r = 0;
3441
3442         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3443         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3444         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3445         return r;
3446 }
3447
3448 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3449 {
3450         int r = 0;
3451
3452         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3453         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3454         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3455         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3456         return r;
3457 }
3458
3459 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3460 {
3461         int r = 0;
3462
3463         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3464         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3465                 sizeof(ps->channels));
3466         ps->flags = kvm->arch.vpit->pit_state.flags;
3467         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3468         memset(&ps->reserved, 0, sizeof(ps->reserved));
3469         return r;
3470 }
3471
3472 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3473 {
3474         int r = 0, start = 0;
3475         u32 prev_legacy, cur_legacy;
3476         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3477         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3478         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3479         if (!prev_legacy && cur_legacy)
3480                 start = 1;
3481         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3482                sizeof(kvm->arch.vpit->pit_state.channels));
3483         kvm->arch.vpit->pit_state.flags = ps->flags;
3484         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3485         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3486         return r;
3487 }
3488
3489 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3490                                  struct kvm_reinject_control *control)
3491 {
3492         if (!kvm->arch.vpit)
3493                 return -ENXIO;
3494         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3495         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3496         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3497         return 0;
3498 }
3499
3500 /**
3501  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3502  * @kvm: kvm instance
3503  * @log: slot id and address to which we copy the log
3504  *
3505  * Steps 1-4 below provide general overview of dirty page logging. See
3506  * kvm_get_dirty_log_protect() function description for additional details.
3507  *
3508  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3509  * always flush the TLB (step 4) even if previous step failed  and the dirty
3510  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3511  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3512  * writes will be marked dirty for next log read.
3513  *
3514  *   1. Take a snapshot of the bit and clear it if needed.
3515  *   2. Write protect the corresponding page.
3516  *   3. Copy the snapshot to the userspace.
3517  *   4. Flush TLB's if needed.
3518  */
3519 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3520 {
3521         bool is_dirty = false;
3522         int r;
3523
3524         mutex_lock(&kvm->slots_lock);
3525
3526         /*
3527          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3528          */
3529         if (kvm_x86_ops->flush_log_dirty)
3530                 kvm_x86_ops->flush_log_dirty(kvm);
3531
3532         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3533
3534         /*
3535          * All the TLBs can be flushed out of mmu lock, see the comments in
3536          * kvm_mmu_slot_remove_write_access().
3537          */
3538         lockdep_assert_held(&kvm->slots_lock);
3539         if (is_dirty)
3540                 kvm_flush_remote_tlbs(kvm);
3541
3542         mutex_unlock(&kvm->slots_lock);
3543         return r;
3544 }
3545
3546 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3547                         bool line_status)
3548 {
3549         if (!irqchip_in_kernel(kvm))
3550                 return -ENXIO;
3551
3552         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3553                                         irq_event->irq, irq_event->level,
3554                                         line_status);
3555         return 0;
3556 }
3557
3558 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3559                                    struct kvm_enable_cap *cap)
3560 {
3561         int r;
3562
3563         if (cap->flags)
3564                 return -EINVAL;
3565
3566         switch (cap->cap) {
3567         case KVM_CAP_DISABLE_QUIRKS:
3568                 kvm->arch.disabled_quirks = cap->args[0];
3569                 r = 0;
3570                 break;
3571         default:
3572                 r = -EINVAL;
3573                 break;
3574         }
3575         return r;
3576 }
3577
3578 long kvm_arch_vm_ioctl(struct file *filp,
3579                        unsigned int ioctl, unsigned long arg)
3580 {
3581         struct kvm *kvm = filp->private_data;
3582         void __user *argp = (void __user *)arg;
3583         int r = -ENOTTY;
3584         /*
3585          * This union makes it completely explicit to gcc-3.x
3586          * that these two variables' stack usage should be
3587          * combined, not added together.
3588          */
3589         union {
3590                 struct kvm_pit_state ps;
3591                 struct kvm_pit_state2 ps2;
3592                 struct kvm_pit_config pit_config;
3593         } u;
3594
3595         switch (ioctl) {
3596         case KVM_SET_TSS_ADDR:
3597                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3598                 break;
3599         case KVM_SET_IDENTITY_MAP_ADDR: {
3600                 u64 ident_addr;
3601
3602                 r = -EFAULT;
3603                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3604                         goto out;
3605                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3606                 break;
3607         }
3608         case KVM_SET_NR_MMU_PAGES:
3609                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3610                 break;
3611         case KVM_GET_NR_MMU_PAGES:
3612                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3613                 break;
3614         case KVM_CREATE_IRQCHIP: {
3615                 struct kvm_pic *vpic;
3616
3617                 mutex_lock(&kvm->lock);
3618                 r = -EEXIST;
3619                 if (kvm->arch.vpic)
3620                         goto create_irqchip_unlock;
3621                 r = -EINVAL;
3622                 if (atomic_read(&kvm->online_vcpus))
3623                         goto create_irqchip_unlock;
3624                 r = -ENOMEM;
3625                 vpic = kvm_create_pic(kvm);
3626                 if (vpic) {
3627                         r = kvm_ioapic_init(kvm);
3628                         if (r) {
3629                                 mutex_lock(&kvm->slots_lock);
3630                                 kvm_destroy_pic(vpic);
3631                                 mutex_unlock(&kvm->slots_lock);
3632                                 goto create_irqchip_unlock;
3633                         }
3634                 } else
3635                         goto create_irqchip_unlock;
3636                 r = kvm_setup_default_irq_routing(kvm);
3637                 if (r) {
3638                         mutex_lock(&kvm->slots_lock);
3639                         mutex_lock(&kvm->irq_lock);
3640                         kvm_ioapic_destroy(kvm);
3641                         kvm_destroy_pic(vpic);
3642                         mutex_unlock(&kvm->irq_lock);
3643                         mutex_unlock(&kvm->slots_lock);
3644                         goto create_irqchip_unlock;
3645                 }
3646                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3647                 smp_wmb();
3648                 kvm->arch.vpic = vpic;
3649         create_irqchip_unlock:
3650                 mutex_unlock(&kvm->lock);
3651                 break;
3652         }
3653         case KVM_CREATE_PIT:
3654                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3655                 goto create_pit;
3656         case KVM_CREATE_PIT2:
3657                 r = -EFAULT;
3658                 if (copy_from_user(&u.pit_config, argp,
3659                                    sizeof(struct kvm_pit_config)))
3660                         goto out;
3661         create_pit:
3662                 mutex_lock(&kvm->slots_lock);
3663                 r = -EEXIST;
3664                 if (kvm->arch.vpit)
3665                         goto create_pit_unlock;
3666                 r = -ENOMEM;
3667                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3668                 if (kvm->arch.vpit)
3669                         r = 0;
3670         create_pit_unlock:
3671                 mutex_unlock(&kvm->slots_lock);
3672                 break;
3673         case KVM_GET_IRQCHIP: {
3674                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3675                 struct kvm_irqchip *chip;
3676
3677                 chip = memdup_user(argp, sizeof(*chip));
3678                 if (IS_ERR(chip)) {
3679                         r = PTR_ERR(chip);
3680                         goto out;
3681                 }
3682
3683                 r = -ENXIO;
3684                 if (!irqchip_in_kernel(kvm))
3685                         goto get_irqchip_out;
3686                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3687                 if (r)
3688                         goto get_irqchip_out;
3689                 r = -EFAULT;
3690                 if (copy_to_user(argp, chip, sizeof *chip))
3691                         goto get_irqchip_out;
3692                 r = 0;
3693         get_irqchip_out:
3694                 kfree(chip);
3695                 break;
3696         }
3697         case KVM_SET_IRQCHIP: {
3698                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3699                 struct kvm_irqchip *chip;
3700
3701                 chip = memdup_user(argp, sizeof(*chip));
3702                 if (IS_ERR(chip)) {
3703                         r = PTR_ERR(chip);
3704                         goto out;
3705                 }
3706
3707                 r = -ENXIO;
3708                 if (!irqchip_in_kernel(kvm))
3709                         goto set_irqchip_out;
3710                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3711                 if (r)
3712                         goto set_irqchip_out;
3713                 r = 0;
3714         set_irqchip_out:
3715                 kfree(chip);
3716                 break;
3717         }
3718         case KVM_GET_PIT: {
3719                 r = -EFAULT;
3720                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3721                         goto out;
3722                 r = -ENXIO;
3723                 if (!kvm->arch.vpit)
3724                         goto out;
3725                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3726                 if (r)
3727                         goto out;
3728                 r = -EFAULT;
3729                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3730                         goto out;
3731                 r = 0;
3732                 break;
3733         }
3734         case KVM_SET_PIT: {
3735                 r = -EFAULT;
3736                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3737                         goto out;
3738                 r = -ENXIO;
3739                 if (!kvm->arch.vpit)
3740                         goto out;
3741                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3742                 break;
3743         }
3744         case KVM_GET_PIT2: {
3745                 r = -ENXIO;
3746                 if (!kvm->arch.vpit)
3747                         goto out;
3748                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3749                 if (r)
3750                         goto out;
3751                 r = -EFAULT;
3752                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3753                         goto out;
3754                 r = 0;
3755                 break;
3756         }
3757         case KVM_SET_PIT2: {
3758                 r = -EFAULT;
3759                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3760                         goto out;
3761                 r = -ENXIO;
3762                 if (!kvm->arch.vpit)
3763                         goto out;
3764                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3765                 break;
3766         }
3767         case KVM_REINJECT_CONTROL: {
3768                 struct kvm_reinject_control control;
3769                 r =  -EFAULT;
3770                 if (copy_from_user(&control, argp, sizeof(control)))
3771                         goto out;
3772                 r = kvm_vm_ioctl_reinject(kvm, &control);
3773                 break;
3774         }
3775         case KVM_SET_BOOT_CPU_ID:
3776                 r = 0;
3777                 mutex_lock(&kvm->lock);
3778                 if (atomic_read(&kvm->online_vcpus) != 0)
3779                         r = -EBUSY;
3780                 else
3781                         kvm->arch.bsp_vcpu_id = arg;
3782                 mutex_unlock(&kvm->lock);
3783                 break;
3784         case KVM_XEN_HVM_CONFIG: {
3785                 r = -EFAULT;
3786                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3787                                    sizeof(struct kvm_xen_hvm_config)))
3788                         goto out;
3789                 r = -EINVAL;
3790                 if (kvm->arch.xen_hvm_config.flags)
3791                         goto out;
3792                 r = 0;
3793                 break;
3794         }
3795         case KVM_SET_CLOCK: {
3796                 struct kvm_clock_data user_ns;
3797                 u64 now_ns;
3798                 s64 delta;
3799
3800                 r = -EFAULT;
3801                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3802                         goto out;
3803
3804                 r = -EINVAL;
3805                 if (user_ns.flags)
3806                         goto out;
3807
3808                 r = 0;
3809                 local_irq_disable();
3810                 now_ns = get_kernel_ns();
3811                 delta = user_ns.clock - now_ns;
3812                 local_irq_enable();
3813                 kvm->arch.kvmclock_offset = delta;
3814                 kvm_gen_update_masterclock(kvm);
3815                 break;
3816         }
3817         case KVM_GET_CLOCK: {
3818                 struct kvm_clock_data user_ns;
3819                 u64 now_ns;
3820
3821                 local_irq_disable();
3822                 now_ns = get_kernel_ns();
3823                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3824                 local_irq_enable();
3825                 user_ns.flags = 0;
3826                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3827
3828                 r = -EFAULT;
3829                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3830                         goto out;
3831                 r = 0;
3832                 break;
3833         }
3834         case KVM_ENABLE_CAP: {
3835                 struct kvm_enable_cap cap;
3836
3837                 r = -EFAULT;
3838                 if (copy_from_user(&cap, argp, sizeof(cap)))
3839                         goto out;
3840                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
3841                 break;
3842         }
3843         default:
3844                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
3845         }
3846 out:
3847         return r;
3848 }
3849
3850 static void kvm_init_msr_list(void)
3851 {
3852         u32 dummy[2];
3853         unsigned i, j;
3854
3855         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
3856                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3857                         continue;
3858
3859                 /*
3860                  * Even MSRs that are valid in the host may not be exposed
3861                  * to the guests in some cases.  We could work around this
3862                  * in VMX with the generic MSR save/load machinery, but it
3863                  * is not really worthwhile since it will really only
3864                  * happen with nested virtualization.
3865                  */
3866                 switch (msrs_to_save[i]) {
3867                 case MSR_IA32_BNDCFGS:
3868                         if (!kvm_x86_ops->mpx_supported())
3869                                 continue;
3870                         break;
3871                 default:
3872                         break;
3873                 }
3874
3875                 if (j < i)
3876                         msrs_to_save[j] = msrs_to_save[i];
3877                 j++;
3878         }
3879         num_msrs_to_save = j;
3880
3881         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
3882                 switch (emulated_msrs[i]) {
3883                 case MSR_IA32_SMBASE:
3884                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
3885                                 continue;
3886                         break;
3887                 default:
3888                         break;
3889                 }
3890
3891                 if (j < i)
3892                         emulated_msrs[j] = emulated_msrs[i];
3893                 j++;
3894         }
3895         num_emulated_msrs = j;
3896 }
3897
3898 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3899                            const void *v)
3900 {
3901         int handled = 0;
3902         int n;
3903
3904         do {
3905                 n = min(len, 8);
3906                 if (!(vcpu->arch.apic &&
3907                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
3908                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
3909                         break;
3910                 handled += n;
3911                 addr += n;
3912                 len -= n;
3913                 v += n;
3914         } while (len);
3915
3916         return handled;
3917 }
3918
3919 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3920 {
3921         int handled = 0;
3922         int n;
3923
3924         do {
3925                 n = min(len, 8);
3926                 if (!(vcpu->arch.apic &&
3927                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
3928                                          addr, n, v))
3929                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
3930                         break;
3931                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3932                 handled += n;
3933                 addr += n;
3934                 len -= n;
3935                 v += n;
3936         } while (len);
3937
3938         return handled;
3939 }
3940
3941 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3942                         struct kvm_segment *var, int seg)
3943 {
3944         kvm_x86_ops->set_segment(vcpu, var, seg);
3945 }
3946
3947 void kvm_get_segment(struct kvm_vcpu *vcpu,
3948                      struct kvm_segment *var, int seg)
3949 {
3950         kvm_x86_ops->get_segment(vcpu, var, seg);
3951 }
3952
3953 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
3954                            struct x86_exception *exception)
3955 {
3956         gpa_t t_gpa;
3957
3958         BUG_ON(!mmu_is_nested(vcpu));
3959
3960         /* NPT walks are always user-walks */
3961         access |= PFERR_USER_MASK;
3962         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
3963
3964         return t_gpa;
3965 }
3966
3967 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3968                               struct x86_exception *exception)
3969 {
3970         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3971         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3972 }
3973
3974  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3975                                 struct x86_exception *exception)
3976 {
3977         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3978         access |= PFERR_FETCH_MASK;
3979         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3980 }
3981
3982 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3983                                struct x86_exception *exception)
3984 {
3985         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3986         access |= PFERR_WRITE_MASK;
3987         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3988 }
3989
3990 /* uses this to access any guest's mapped memory without checking CPL */
3991 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3992                                 struct x86_exception *exception)
3993 {
3994         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3995 }
3996
3997 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3998                                       struct kvm_vcpu *vcpu, u32 access,
3999                                       struct x86_exception *exception)
4000 {
4001         void *data = val;
4002         int r = X86EMUL_CONTINUE;
4003
4004         while (bytes) {
4005                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4006                                                             exception);
4007                 unsigned offset = addr & (PAGE_SIZE-1);
4008                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4009                 int ret;
4010
4011                 if (gpa == UNMAPPED_GVA)
4012                         return X86EMUL_PROPAGATE_FAULT;
4013                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4014                                                offset, toread);
4015                 if (ret < 0) {
4016                         r = X86EMUL_IO_NEEDED;
4017                         goto out;
4018                 }
4019
4020                 bytes -= toread;
4021                 data += toread;
4022                 addr += toread;
4023         }
4024 out:
4025         return r;
4026 }
4027
4028 /* used for instruction fetching */
4029 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4030                                 gva_t addr, void *val, unsigned int bytes,
4031                                 struct x86_exception *exception)
4032 {
4033         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4034         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4035         unsigned offset;
4036         int ret;
4037
4038         /* Inline kvm_read_guest_virt_helper for speed.  */
4039         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4040                                                     exception);
4041         if (unlikely(gpa == UNMAPPED_GVA))
4042                 return X86EMUL_PROPAGATE_FAULT;
4043
4044         offset = addr & (PAGE_SIZE-1);
4045         if (WARN_ON(offset + bytes > PAGE_SIZE))
4046                 bytes = (unsigned)PAGE_SIZE - offset;
4047         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4048                                        offset, bytes);
4049         if (unlikely(ret < 0))
4050                 return X86EMUL_IO_NEEDED;
4051
4052         return X86EMUL_CONTINUE;
4053 }
4054
4055 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4056                                gva_t addr, void *val, unsigned int bytes,
4057                                struct x86_exception *exception)
4058 {
4059         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4060         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4061
4062         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4063                                           exception);
4064 }
4065 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4066
4067 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4068                                       gva_t addr, void *val, unsigned int bytes,
4069                                       struct x86_exception *exception)
4070 {
4071         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4072         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4073 }
4074
4075 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4076                                        gva_t addr, void *val,
4077                                        unsigned int bytes,
4078                                        struct x86_exception *exception)
4079 {
4080         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4081         void *data = val;
4082         int r = X86EMUL_CONTINUE;
4083
4084         while (bytes) {
4085                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4086                                                              PFERR_WRITE_MASK,
4087                                                              exception);
4088                 unsigned offset = addr & (PAGE_SIZE-1);
4089                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4090                 int ret;
4091
4092                 if (gpa == UNMAPPED_GVA)
4093                         return X86EMUL_PROPAGATE_FAULT;
4094                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4095                 if (ret < 0) {
4096                         r = X86EMUL_IO_NEEDED;
4097                         goto out;
4098                 }
4099
4100                 bytes -= towrite;
4101                 data += towrite;
4102                 addr += towrite;
4103         }
4104 out:
4105         return r;
4106 }
4107 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4108
4109 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4110                                 gpa_t *gpa, struct x86_exception *exception,
4111                                 bool write)
4112 {
4113         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4114                 | (write ? PFERR_WRITE_MASK : 0);
4115
4116         if (vcpu_match_mmio_gva(vcpu, gva)
4117             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4118                                  vcpu->arch.access, access)) {
4119                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4120                                         (gva & (PAGE_SIZE - 1));
4121                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4122                 return 1;
4123         }
4124
4125         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4126
4127         if (*gpa == UNMAPPED_GVA)
4128                 return -1;
4129
4130         /* For APIC access vmexit */
4131         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4132                 return 1;
4133
4134         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4135                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4136                 return 1;
4137         }
4138
4139         return 0;
4140 }
4141
4142 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4143                         const void *val, int bytes)
4144 {
4145         int ret;
4146
4147         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4148         if (ret < 0)
4149                 return 0;
4150         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4151         return 1;
4152 }
4153
4154 struct read_write_emulator_ops {
4155         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4156                                   int bytes);
4157         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4158                                   void *val, int bytes);
4159         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4160                                int bytes, void *val);
4161         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4162                                     void *val, int bytes);
4163         bool write;
4164 };
4165
4166 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4167 {
4168         if (vcpu->mmio_read_completed) {
4169                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4170                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4171                 vcpu->mmio_read_completed = 0;
4172                 return 1;
4173         }
4174
4175         return 0;
4176 }
4177
4178 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4179                         void *val, int bytes)
4180 {
4181         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4182 }
4183
4184 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4185                          void *val, int bytes)
4186 {
4187         return emulator_write_phys(vcpu, gpa, val, bytes);
4188 }
4189
4190 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4191 {
4192         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4193         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4194 }
4195
4196 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4197                           void *val, int bytes)
4198 {
4199         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4200         return X86EMUL_IO_NEEDED;
4201 }
4202
4203 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4204                            void *val, int bytes)
4205 {
4206         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4207
4208         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4209         return X86EMUL_CONTINUE;
4210 }
4211
4212 static const struct read_write_emulator_ops read_emultor = {
4213         .read_write_prepare = read_prepare,
4214         .read_write_emulate = read_emulate,
4215         .read_write_mmio = vcpu_mmio_read,
4216         .read_write_exit_mmio = read_exit_mmio,
4217 };
4218
4219 static const struct read_write_emulator_ops write_emultor = {
4220         .read_write_emulate = write_emulate,
4221         .read_write_mmio = write_mmio,
4222         .read_write_exit_mmio = write_exit_mmio,
4223         .write = true,
4224 };
4225
4226 static int emulator_read_write_onepage(unsigned long addr, void *val,
4227                                        unsigned int bytes,
4228                                        struct x86_exception *exception,
4229                                        struct kvm_vcpu *vcpu,
4230                                        const struct read_write_emulator_ops *ops)
4231 {
4232         gpa_t gpa;
4233         int handled, ret;
4234         bool write = ops->write;
4235         struct kvm_mmio_fragment *frag;
4236
4237         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4238
4239         if (ret < 0)
4240                 return X86EMUL_PROPAGATE_FAULT;
4241
4242         /* For APIC access vmexit */
4243         if (ret)
4244                 goto mmio;
4245
4246         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4247                 return X86EMUL_CONTINUE;
4248
4249 mmio:
4250         /*
4251          * Is this MMIO handled locally?
4252          */
4253         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4254         if (handled == bytes)
4255                 return X86EMUL_CONTINUE;
4256
4257         gpa += handled;
4258         bytes -= handled;
4259         val += handled;
4260
4261         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4262         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4263         frag->gpa = gpa;
4264         frag->data = val;
4265         frag->len = bytes;
4266         return X86EMUL_CONTINUE;
4267 }
4268
4269 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4270                         unsigned long addr,
4271                         void *val, unsigned int bytes,
4272                         struct x86_exception *exception,
4273                         const struct read_write_emulator_ops *ops)
4274 {
4275         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4276         gpa_t gpa;
4277         int rc;
4278
4279         if (ops->read_write_prepare &&
4280                   ops->read_write_prepare(vcpu, val, bytes))
4281                 return X86EMUL_CONTINUE;
4282
4283         vcpu->mmio_nr_fragments = 0;
4284
4285         /* Crossing a page boundary? */
4286         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4287                 int now;
4288
4289                 now = -addr & ~PAGE_MASK;
4290                 rc = emulator_read_write_onepage(addr, val, now, exception,
4291                                                  vcpu, ops);
4292
4293                 if (rc != X86EMUL_CONTINUE)
4294                         return rc;
4295                 addr += now;
4296                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4297                         addr = (u32)addr;
4298                 val += now;
4299                 bytes -= now;
4300         }
4301
4302         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4303                                          vcpu, ops);
4304         if (rc != X86EMUL_CONTINUE)
4305                 return rc;
4306
4307         if (!vcpu->mmio_nr_fragments)
4308                 return rc;
4309
4310         gpa = vcpu->mmio_fragments[0].gpa;
4311
4312         vcpu->mmio_needed = 1;
4313         vcpu->mmio_cur_fragment = 0;
4314
4315         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4316         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4317         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4318         vcpu->run->mmio.phys_addr = gpa;
4319
4320         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4321 }
4322
4323 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4324                                   unsigned long addr,
4325                                   void *val,
4326                                   unsigned int bytes,
4327                                   struct x86_exception *exception)
4328 {
4329         return emulator_read_write(ctxt, addr, val, bytes,
4330                                    exception, &read_emultor);
4331 }
4332
4333 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4334                             unsigned long addr,
4335                             const void *val,
4336                             unsigned int bytes,
4337                             struct x86_exception *exception)
4338 {
4339         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4340                                    exception, &write_emultor);
4341 }
4342
4343 #define CMPXCHG_TYPE(t, ptr, old, new) \
4344         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4345
4346 #ifdef CONFIG_X86_64
4347 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4348 #else
4349 #  define CMPXCHG64(ptr, old, new) \
4350         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4351 #endif
4352
4353 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4354                                      unsigned long addr,
4355                                      const void *old,
4356                                      const void *new,
4357                                      unsigned int bytes,
4358                                      struct x86_exception *exception)
4359 {
4360         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4361         gpa_t gpa;
4362         struct page *page;
4363         char *kaddr;
4364         bool exchanged;
4365
4366         /* guests cmpxchg8b have to be emulated atomically */
4367         if (bytes > 8 || (bytes & (bytes - 1)))
4368                 goto emul_write;
4369
4370         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4371
4372         if (gpa == UNMAPPED_GVA ||
4373             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4374                 goto emul_write;
4375
4376         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4377                 goto emul_write;
4378
4379         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4380         if (is_error_page(page))
4381                 goto emul_write;
4382
4383         kaddr = kmap_atomic(page);
4384         kaddr += offset_in_page(gpa);
4385         switch (bytes) {
4386         case 1:
4387                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4388                 break;
4389         case 2:
4390                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4391                 break;
4392         case 4:
4393                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4394                 break;
4395         case 8:
4396                 exchanged = CMPXCHG64(kaddr, old, new);
4397                 break;
4398         default:
4399                 BUG();
4400         }
4401         kunmap_atomic(kaddr);
4402         kvm_release_page_dirty(page);
4403
4404         if (!exchanged)
4405                 return X86EMUL_CMPXCHG_FAILED;
4406
4407         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4408         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4409
4410         return X86EMUL_CONTINUE;
4411
4412 emul_write:
4413         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4414
4415         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4416 }
4417
4418 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4419 {
4420         /* TODO: String I/O for in kernel device */
4421         int r;
4422
4423         if (vcpu->arch.pio.in)
4424                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4425                                     vcpu->arch.pio.size, pd);
4426         else
4427                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4428                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4429                                      pd);
4430         return r;
4431 }
4432
4433 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4434                                unsigned short port, void *val,
4435                                unsigned int count, bool in)
4436 {
4437         vcpu->arch.pio.port = port;
4438         vcpu->arch.pio.in = in;
4439         vcpu->arch.pio.count  = count;
4440         vcpu->arch.pio.size = size;
4441
4442         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4443                 vcpu->arch.pio.count = 0;
4444                 return 1;
4445         }
4446
4447         vcpu->run->exit_reason = KVM_EXIT_IO;
4448         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4449         vcpu->run->io.size = size;
4450         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4451         vcpu->run->io.count = count;
4452         vcpu->run->io.port = port;
4453
4454         return 0;
4455 }
4456
4457 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4458                                     int size, unsigned short port, void *val,
4459                                     unsigned int count)
4460 {
4461         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4462         int ret;
4463
4464         if (vcpu->arch.pio.count)
4465                 goto data_avail;
4466
4467         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4468         if (ret) {
4469 data_avail:
4470                 memcpy(val, vcpu->arch.pio_data, size * count);
4471                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4472                 vcpu->arch.pio.count = 0;
4473                 return 1;
4474         }
4475
4476         return 0;
4477 }
4478
4479 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4480                                      int size, unsigned short port,
4481                                      const void *val, unsigned int count)
4482 {
4483         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4484
4485         memcpy(vcpu->arch.pio_data, val, size * count);
4486         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4487         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4488 }
4489
4490 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4491 {
4492         return kvm_x86_ops->get_segment_base(vcpu, seg);
4493 }
4494
4495 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4496 {
4497         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4498 }
4499
4500 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4501 {
4502         if (!need_emulate_wbinvd(vcpu))
4503                 return X86EMUL_CONTINUE;
4504
4505         if (kvm_x86_ops->has_wbinvd_exit()) {
4506                 int cpu = get_cpu();
4507
4508                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4509                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4510                                 wbinvd_ipi, NULL, 1);
4511                 put_cpu();
4512                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4513         } else
4514                 wbinvd();
4515         return X86EMUL_CONTINUE;
4516 }
4517
4518 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4519 {
4520         kvm_x86_ops->skip_emulated_instruction(vcpu);
4521         return kvm_emulate_wbinvd_noskip(vcpu);
4522 }
4523 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4524
4525
4526
4527 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4528 {
4529         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4530 }
4531
4532 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4533                            unsigned long *dest)
4534 {
4535         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4536 }
4537
4538 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4539                            unsigned long value)
4540 {
4541
4542         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4543 }
4544
4545 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4546 {
4547         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4548 }
4549
4550 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4551 {
4552         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4553         unsigned long value;
4554
4555         switch (cr) {
4556         case 0:
4557                 value = kvm_read_cr0(vcpu);
4558                 break;
4559         case 2:
4560                 value = vcpu->arch.cr2;
4561                 break;
4562         case 3:
4563                 value = kvm_read_cr3(vcpu);
4564                 break;
4565         case 4:
4566                 value = kvm_read_cr4(vcpu);
4567                 break;
4568         case 8:
4569                 value = kvm_get_cr8(vcpu);
4570                 break;
4571         default:
4572                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4573                 return 0;
4574         }
4575
4576         return value;
4577 }
4578
4579 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4580 {
4581         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4582         int res = 0;
4583
4584         switch (cr) {
4585         case 0:
4586                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4587                 break;
4588         case 2:
4589                 vcpu->arch.cr2 = val;
4590                 break;
4591         case 3:
4592                 res = kvm_set_cr3(vcpu, val);
4593                 break;
4594         case 4:
4595                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4596                 break;
4597         case 8:
4598                 res = kvm_set_cr8(vcpu, val);
4599                 break;
4600         default:
4601                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4602                 res = -1;
4603         }
4604
4605         return res;
4606 }
4607
4608 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4609 {
4610         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4611 }
4612
4613 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4614 {
4615         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4616 }
4617
4618 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4619 {
4620         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4621 }
4622
4623 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4624 {
4625         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4626 }
4627
4628 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4629 {
4630         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4631 }
4632
4633 static unsigned long emulator_get_cached_segment_base(
4634         struct x86_emulate_ctxt *ctxt, int seg)
4635 {
4636         return get_segment_base(emul_to_vcpu(ctxt), seg);
4637 }
4638
4639 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4640                                  struct desc_struct *desc, u32 *base3,
4641                                  int seg)
4642 {
4643         struct kvm_segment var;
4644
4645         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4646         *selector = var.selector;
4647
4648         if (var.unusable) {
4649                 memset(desc, 0, sizeof(*desc));
4650                 return false;
4651         }
4652
4653         if (var.g)
4654                 var.limit >>= 12;
4655         set_desc_limit(desc, var.limit);
4656         set_desc_base(desc, (unsigned long)var.base);
4657 #ifdef CONFIG_X86_64
4658         if (base3)
4659                 *base3 = var.base >> 32;
4660 #endif
4661         desc->type = var.type;
4662         desc->s = var.s;
4663         desc->dpl = var.dpl;
4664         desc->p = var.present;
4665         desc->avl = var.avl;
4666         desc->l = var.l;
4667         desc->d = var.db;
4668         desc->g = var.g;
4669
4670         return true;
4671 }
4672
4673 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4674                                  struct desc_struct *desc, u32 base3,
4675                                  int seg)
4676 {
4677         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4678         struct kvm_segment var;
4679
4680         var.selector = selector;
4681         var.base = get_desc_base(desc);
4682 #ifdef CONFIG_X86_64
4683         var.base |= ((u64)base3) << 32;
4684 #endif
4685         var.limit = get_desc_limit(desc);
4686         if (desc->g)
4687                 var.limit = (var.limit << 12) | 0xfff;
4688         var.type = desc->type;
4689         var.dpl = desc->dpl;
4690         var.db = desc->d;
4691         var.s = desc->s;
4692         var.l = desc->l;
4693         var.g = desc->g;
4694         var.avl = desc->avl;
4695         var.present = desc->p;
4696         var.unusable = !var.present;
4697         var.padding = 0;
4698
4699         kvm_set_segment(vcpu, &var, seg);
4700         return;
4701 }
4702
4703 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4704                             u32 msr_index, u64 *pdata)
4705 {
4706         struct msr_data msr;
4707         int r;
4708
4709         msr.index = msr_index;
4710         msr.host_initiated = false;
4711         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4712         if (r)
4713                 return r;
4714
4715         *pdata = msr.data;
4716         return 0;
4717 }
4718
4719 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4720                             u32 msr_index, u64 data)
4721 {
4722         struct msr_data msr;
4723
4724         msr.data = data;
4725         msr.index = msr_index;
4726         msr.host_initiated = false;
4727         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4728 }
4729
4730 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4731 {
4732         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4733
4734         return vcpu->arch.smbase;
4735 }
4736
4737 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4738 {
4739         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4740
4741         vcpu->arch.smbase = smbase;
4742 }
4743
4744 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4745                               u32 pmc)
4746 {
4747         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4748 }
4749
4750 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4751                              u32 pmc, u64 *pdata)
4752 {
4753         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4754 }
4755
4756 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4757 {
4758         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4759 }
4760
4761 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4762 {
4763         preempt_disable();
4764         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4765         /*
4766          * CR0.TS may reference the host fpu state, not the guest fpu state,
4767          * so it may be clear at this point.
4768          */
4769         clts();
4770 }
4771
4772 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4773 {
4774         preempt_enable();
4775 }
4776
4777 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4778                               struct x86_instruction_info *info,
4779                               enum x86_intercept_stage stage)
4780 {
4781         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4782 }
4783
4784 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4785                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4786 {
4787         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4788 }
4789
4790 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4791 {
4792         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4793 }
4794
4795 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4796 {
4797         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4798 }
4799
4800 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4801 {
4802         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4803 }
4804
4805 static const struct x86_emulate_ops emulate_ops = {
4806         .read_gpr            = emulator_read_gpr,
4807         .write_gpr           = emulator_write_gpr,
4808         .read_std            = kvm_read_guest_virt_system,
4809         .write_std           = kvm_write_guest_virt_system,
4810         .fetch               = kvm_fetch_guest_virt,
4811         .read_emulated       = emulator_read_emulated,
4812         .write_emulated      = emulator_write_emulated,
4813         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4814         .invlpg              = emulator_invlpg,
4815         .pio_in_emulated     = emulator_pio_in_emulated,
4816         .pio_out_emulated    = emulator_pio_out_emulated,
4817         .get_segment         = emulator_get_segment,
4818         .set_segment         = emulator_set_segment,
4819         .get_cached_segment_base = emulator_get_cached_segment_base,
4820         .get_gdt             = emulator_get_gdt,
4821         .get_idt             = emulator_get_idt,
4822         .set_gdt             = emulator_set_gdt,
4823         .set_idt             = emulator_set_idt,
4824         .get_cr              = emulator_get_cr,
4825         .set_cr              = emulator_set_cr,
4826         .cpl                 = emulator_get_cpl,
4827         .get_dr              = emulator_get_dr,
4828         .set_dr              = emulator_set_dr,
4829         .get_smbase          = emulator_get_smbase,
4830         .set_smbase          = emulator_set_smbase,
4831         .set_msr             = emulator_set_msr,
4832         .get_msr             = emulator_get_msr,
4833         .check_pmc           = emulator_check_pmc,
4834         .read_pmc            = emulator_read_pmc,
4835         .halt                = emulator_halt,
4836         .wbinvd              = emulator_wbinvd,
4837         .fix_hypercall       = emulator_fix_hypercall,
4838         .get_fpu             = emulator_get_fpu,
4839         .put_fpu             = emulator_put_fpu,
4840         .intercept           = emulator_intercept,
4841         .get_cpuid           = emulator_get_cpuid,
4842         .set_nmi_mask        = emulator_set_nmi_mask,
4843 };
4844
4845 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4846 {
4847         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
4848         /*
4849          * an sti; sti; sequence only disable interrupts for the first
4850          * instruction. So, if the last instruction, be it emulated or
4851          * not, left the system with the INT_STI flag enabled, it
4852          * means that the last instruction is an sti. We should not
4853          * leave the flag on in this case. The same goes for mov ss
4854          */
4855         if (int_shadow & mask)
4856                 mask = 0;
4857         if (unlikely(int_shadow || mask)) {
4858                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4859                 if (!mask)
4860                         kvm_make_request(KVM_REQ_EVENT, vcpu);
4861         }
4862 }
4863
4864 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
4865 {
4866         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4867         if (ctxt->exception.vector == PF_VECTOR)
4868                 return kvm_propagate_fault(vcpu, &ctxt->exception);
4869
4870         if (ctxt->exception.error_code_valid)
4871                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4872                                       ctxt->exception.error_code);
4873         else
4874                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4875         return false;
4876 }
4877
4878 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4879 {
4880         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4881         int cs_db, cs_l;
4882
4883         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4884
4885         ctxt->eflags = kvm_get_rflags(vcpu);
4886         ctxt->eip = kvm_rip_read(vcpu);
4887         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4888                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4889                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
4890                      cs_db                              ? X86EMUL_MODE_PROT32 :
4891                                                           X86EMUL_MODE_PROT16;
4892         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
4893         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
4894         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
4895         ctxt->emul_flags = vcpu->arch.hflags;
4896
4897         init_decode_cache(ctxt);
4898         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4899 }
4900
4901 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4902 {
4903         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4904         int ret;
4905
4906         init_emulate_ctxt(vcpu);
4907
4908         ctxt->op_bytes = 2;
4909         ctxt->ad_bytes = 2;
4910         ctxt->_eip = ctxt->eip + inc_eip;
4911         ret = emulate_int_real(ctxt, irq);
4912
4913         if (ret != X86EMUL_CONTINUE)
4914                 return EMULATE_FAIL;
4915
4916         ctxt->eip = ctxt->_eip;
4917         kvm_rip_write(vcpu, ctxt->eip);
4918         kvm_set_rflags(vcpu, ctxt->eflags);
4919
4920         if (irq == NMI_VECTOR)
4921                 vcpu->arch.nmi_pending = 0;
4922         else
4923                 vcpu->arch.interrupt.pending = false;
4924
4925         return EMULATE_DONE;
4926 }
4927 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4928
4929 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4930 {
4931         int r = EMULATE_DONE;
4932
4933         ++vcpu->stat.insn_emulation_fail;
4934         trace_kvm_emulate_insn_failed(vcpu);
4935         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
4936                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4937                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4938                 vcpu->run->internal.ndata = 0;
4939                 r = EMULATE_FAIL;
4940         }
4941         kvm_queue_exception(vcpu, UD_VECTOR);
4942
4943         return r;
4944 }
4945
4946 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4947                                   bool write_fault_to_shadow_pgtable,
4948                                   int emulation_type)
4949 {
4950         gpa_t gpa = cr2;
4951         pfn_t pfn;
4952
4953         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4954                 return false;
4955
4956         if (!vcpu->arch.mmu.direct_map) {
4957                 /*
4958                  * Write permission should be allowed since only
4959                  * write access need to be emulated.
4960                  */
4961                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4962
4963                 /*
4964                  * If the mapping is invalid in guest, let cpu retry
4965                  * it to generate fault.
4966                  */
4967                 if (gpa == UNMAPPED_GVA)
4968                         return true;
4969         }
4970
4971         /*
4972          * Do not retry the unhandleable instruction if it faults on the
4973          * readonly host memory, otherwise it will goto a infinite loop:
4974          * retry instruction -> write #PF -> emulation fail -> retry
4975          * instruction -> ...
4976          */
4977         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4978
4979         /*
4980          * If the instruction failed on the error pfn, it can not be fixed,
4981          * report the error to userspace.
4982          */
4983         if (is_error_noslot_pfn(pfn))
4984                 return false;
4985
4986         kvm_release_pfn_clean(pfn);
4987
4988         /* The instructions are well-emulated on direct mmu. */
4989         if (vcpu->arch.mmu.direct_map) {
4990                 unsigned int indirect_shadow_pages;
4991
4992                 spin_lock(&vcpu->kvm->mmu_lock);
4993                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4994                 spin_unlock(&vcpu->kvm->mmu_lock);
4995
4996                 if (indirect_shadow_pages)
4997                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4998
4999                 return true;
5000         }
5001
5002         /*
5003          * if emulation was due to access to shadowed page table
5004          * and it failed try to unshadow page and re-enter the
5005          * guest to let CPU execute the instruction.
5006          */
5007         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5008
5009         /*
5010          * If the access faults on its page table, it can not
5011          * be fixed by unprotecting shadow page and it should
5012          * be reported to userspace.
5013          */
5014         return !write_fault_to_shadow_pgtable;
5015 }
5016
5017 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5018                               unsigned long cr2,  int emulation_type)
5019 {
5020         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5021         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5022
5023         last_retry_eip = vcpu->arch.last_retry_eip;
5024         last_retry_addr = vcpu->arch.last_retry_addr;
5025
5026         /*
5027          * If the emulation is caused by #PF and it is non-page_table
5028          * writing instruction, it means the VM-EXIT is caused by shadow
5029          * page protected, we can zap the shadow page and retry this
5030          * instruction directly.
5031          *
5032          * Note: if the guest uses a non-page-table modifying instruction
5033          * on the PDE that points to the instruction, then we will unmap
5034          * the instruction and go to an infinite loop. So, we cache the
5035          * last retried eip and the last fault address, if we meet the eip
5036          * and the address again, we can break out of the potential infinite
5037          * loop.
5038          */
5039         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5040
5041         if (!(emulation_type & EMULTYPE_RETRY))
5042                 return false;
5043
5044         if (x86_page_table_writing_insn(ctxt))
5045                 return false;
5046
5047         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5048                 return false;
5049
5050         vcpu->arch.last_retry_eip = ctxt->eip;
5051         vcpu->arch.last_retry_addr = cr2;
5052
5053         if (!vcpu->arch.mmu.direct_map)
5054                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5055
5056         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5057
5058         return true;
5059 }
5060
5061 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5062 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5063
5064 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5065 {
5066         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5067                 /* This is a good place to trace that we are exiting SMM.  */
5068                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5069
5070                 if (unlikely(vcpu->arch.smi_pending)) {
5071                         kvm_make_request(KVM_REQ_SMI, vcpu);
5072                         vcpu->arch.smi_pending = 0;
5073                 } else {
5074                         /* Process a latched INIT, if any.  */
5075                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5076                 }
5077         }
5078
5079         kvm_mmu_reset_context(vcpu);
5080 }
5081
5082 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5083 {
5084         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5085
5086         vcpu->arch.hflags = emul_flags;
5087
5088         if (changed & HF_SMM_MASK)
5089                 kvm_smm_changed(vcpu);
5090 }
5091
5092 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5093                                 unsigned long *db)
5094 {
5095         u32 dr6 = 0;
5096         int i;
5097         u32 enable, rwlen;
5098
5099         enable = dr7;
5100         rwlen = dr7 >> 16;
5101         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5102                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5103                         dr6 |= (1 << i);
5104         return dr6;
5105 }
5106
5107 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5108 {
5109         struct kvm_run *kvm_run = vcpu->run;
5110
5111         /*
5112          * rflags is the old, "raw" value of the flags.  The new value has
5113          * not been saved yet.
5114          *
5115          * This is correct even for TF set by the guest, because "the
5116          * processor will not generate this exception after the instruction
5117          * that sets the TF flag".
5118          */
5119         if (unlikely(rflags & X86_EFLAGS_TF)) {
5120                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5121                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5122                                                   DR6_RTM;
5123                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5124                         kvm_run->debug.arch.exception = DB_VECTOR;
5125                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5126                         *r = EMULATE_USER_EXIT;
5127                 } else {
5128                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5129                         /*
5130                          * "Certain debug exceptions may clear bit 0-3.  The
5131                          * remaining contents of the DR6 register are never
5132                          * cleared by the processor".
5133                          */
5134                         vcpu->arch.dr6 &= ~15;
5135                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5136                         kvm_queue_exception(vcpu, DB_VECTOR);
5137                 }
5138         }
5139 }
5140
5141 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5142 {
5143         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5144             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5145                 struct kvm_run *kvm_run = vcpu->run;
5146                 unsigned long eip = kvm_get_linear_rip(vcpu);
5147                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5148                                            vcpu->arch.guest_debug_dr7,
5149                                            vcpu->arch.eff_db);
5150
5151                 if (dr6 != 0) {
5152                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5153                         kvm_run->debug.arch.pc = eip;
5154                         kvm_run->debug.arch.exception = DB_VECTOR;
5155                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5156                         *r = EMULATE_USER_EXIT;
5157                         return true;
5158                 }
5159         }
5160
5161         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5162             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5163                 unsigned long eip = kvm_get_linear_rip(vcpu);
5164                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5165                                            vcpu->arch.dr7,
5166                                            vcpu->arch.db);
5167
5168                 if (dr6 != 0) {
5169                         vcpu->arch.dr6 &= ~15;
5170                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5171                         kvm_queue_exception(vcpu, DB_VECTOR);
5172                         *r = EMULATE_DONE;
5173                         return true;
5174                 }
5175         }
5176
5177         return false;
5178 }
5179
5180 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5181                             unsigned long cr2,
5182                             int emulation_type,
5183                             void *insn,
5184                             int insn_len)
5185 {
5186         int r;
5187         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5188         bool writeback = true;
5189         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5190
5191         /*
5192          * Clear write_fault_to_shadow_pgtable here to ensure it is
5193          * never reused.
5194          */
5195         vcpu->arch.write_fault_to_shadow_pgtable = false;
5196         kvm_clear_exception_queue(vcpu);
5197
5198         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5199                 init_emulate_ctxt(vcpu);
5200
5201                 /*
5202                  * We will reenter on the same instruction since
5203                  * we do not set complete_userspace_io.  This does not
5204                  * handle watchpoints yet, those would be handled in
5205                  * the emulate_ops.
5206                  */
5207                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5208                         return r;
5209
5210                 ctxt->interruptibility = 0;
5211                 ctxt->have_exception = false;
5212                 ctxt->exception.vector = -1;
5213                 ctxt->perm_ok = false;
5214
5215                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5216
5217                 r = x86_decode_insn(ctxt, insn, insn_len);
5218
5219                 trace_kvm_emulate_insn_start(vcpu);
5220                 ++vcpu->stat.insn_emulation;
5221                 if (r != EMULATION_OK)  {
5222                         if (emulation_type & EMULTYPE_TRAP_UD)
5223                                 return EMULATE_FAIL;
5224                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5225                                                 emulation_type))
5226                                 return EMULATE_DONE;
5227                         if (emulation_type & EMULTYPE_SKIP)
5228                                 return EMULATE_FAIL;
5229                         return handle_emulation_failure(vcpu);
5230                 }
5231         }
5232
5233         if (emulation_type & EMULTYPE_SKIP) {
5234                 kvm_rip_write(vcpu, ctxt->_eip);
5235                 if (ctxt->eflags & X86_EFLAGS_RF)
5236                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5237                 return EMULATE_DONE;
5238         }
5239
5240         if (retry_instruction(ctxt, cr2, emulation_type))
5241                 return EMULATE_DONE;
5242
5243         /* this is needed for vmware backdoor interface to work since it
5244            changes registers values  during IO operation */
5245         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5246                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5247                 emulator_invalidate_register_cache(ctxt);
5248         }
5249
5250 restart:
5251         r = x86_emulate_insn(ctxt);
5252
5253         if (r == EMULATION_INTERCEPTED)
5254                 return EMULATE_DONE;
5255
5256         if (r == EMULATION_FAILED) {
5257                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5258                                         emulation_type))
5259                         return EMULATE_DONE;
5260
5261                 return handle_emulation_failure(vcpu);
5262         }
5263
5264         if (ctxt->have_exception) {
5265                 r = EMULATE_DONE;
5266                 if (inject_emulated_exception(vcpu))
5267                         return r;
5268         } else if (vcpu->arch.pio.count) {
5269                 if (!vcpu->arch.pio.in) {
5270                         /* FIXME: return into emulator if single-stepping.  */
5271                         vcpu->arch.pio.count = 0;
5272                 } else {
5273                         writeback = false;
5274                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5275                 }
5276                 r = EMULATE_USER_EXIT;
5277         } else if (vcpu->mmio_needed) {
5278                 if (!vcpu->mmio_is_write)
5279                         writeback = false;
5280                 r = EMULATE_USER_EXIT;
5281                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5282         } else if (r == EMULATION_RESTART)
5283                 goto restart;
5284         else
5285                 r = EMULATE_DONE;
5286
5287         if (writeback) {
5288                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5289                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5290                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5291                 if (vcpu->arch.hflags != ctxt->emul_flags)
5292                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5293                 kvm_rip_write(vcpu, ctxt->eip);
5294                 if (r == EMULATE_DONE)
5295                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5296                 if (!ctxt->have_exception ||
5297                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5298                         __kvm_set_rflags(vcpu, ctxt->eflags);
5299
5300                 /*
5301                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5302                  * do nothing, and it will be requested again as soon as
5303                  * the shadow expires.  But we still need to check here,
5304                  * because POPF has no interrupt shadow.
5305                  */
5306                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5307                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5308         } else
5309                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5310
5311         return r;
5312 }
5313 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5314
5315 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5316 {
5317         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5318         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5319                                             size, port, &val, 1);
5320         /* do not return to emulator after return from userspace */
5321         vcpu->arch.pio.count = 0;
5322         return ret;
5323 }
5324 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5325
5326 static void tsc_bad(void *info)
5327 {
5328         __this_cpu_write(cpu_tsc_khz, 0);
5329 }
5330
5331 static void tsc_khz_changed(void *data)
5332 {
5333         struct cpufreq_freqs *freq = data;
5334         unsigned long khz = 0;
5335
5336         if (data)
5337                 khz = freq->new;
5338         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5339                 khz = cpufreq_quick_get(raw_smp_processor_id());
5340         if (!khz)
5341                 khz = tsc_khz;
5342         __this_cpu_write(cpu_tsc_khz, khz);
5343 }
5344
5345 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5346                                      void *data)
5347 {
5348         struct cpufreq_freqs *freq = data;
5349         struct kvm *kvm;
5350         struct kvm_vcpu *vcpu;
5351         int i, send_ipi = 0;
5352
5353         /*
5354          * We allow guests to temporarily run on slowing clocks,
5355          * provided we notify them after, or to run on accelerating
5356          * clocks, provided we notify them before.  Thus time never
5357          * goes backwards.
5358          *
5359          * However, we have a problem.  We can't atomically update
5360          * the frequency of a given CPU from this function; it is
5361          * merely a notifier, which can be called from any CPU.
5362          * Changing the TSC frequency at arbitrary points in time
5363          * requires a recomputation of local variables related to
5364          * the TSC for each VCPU.  We must flag these local variables
5365          * to be updated and be sure the update takes place with the
5366          * new frequency before any guests proceed.
5367          *
5368          * Unfortunately, the combination of hotplug CPU and frequency
5369          * change creates an intractable locking scenario; the order
5370          * of when these callouts happen is undefined with respect to
5371          * CPU hotplug, and they can race with each other.  As such,
5372          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5373          * undefined; you can actually have a CPU frequency change take
5374          * place in between the computation of X and the setting of the
5375          * variable.  To protect against this problem, all updates of
5376          * the per_cpu tsc_khz variable are done in an interrupt
5377          * protected IPI, and all callers wishing to update the value
5378          * must wait for a synchronous IPI to complete (which is trivial
5379          * if the caller is on the CPU already).  This establishes the
5380          * necessary total order on variable updates.
5381          *
5382          * Note that because a guest time update may take place
5383          * anytime after the setting of the VCPU's request bit, the
5384          * correct TSC value must be set before the request.  However,
5385          * to ensure the update actually makes it to any guest which
5386          * starts running in hardware virtualization between the set
5387          * and the acquisition of the spinlock, we must also ping the
5388          * CPU after setting the request bit.
5389          *
5390          */
5391
5392         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5393                 return 0;
5394         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5395                 return 0;
5396
5397         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5398
5399         spin_lock(&kvm_lock);
5400         list_for_each_entry(kvm, &vm_list, vm_list) {
5401                 kvm_for_each_vcpu(i, vcpu, kvm) {
5402                         if (vcpu->cpu != freq->cpu)
5403                                 continue;
5404                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5405                         if (vcpu->cpu != smp_processor_id())
5406                                 send_ipi = 1;
5407                 }
5408         }
5409         spin_unlock(&kvm_lock);
5410
5411         if (freq->old < freq->new && send_ipi) {
5412                 /*
5413                  * We upscale the frequency.  Must make the guest
5414                  * doesn't see old kvmclock values while running with
5415                  * the new frequency, otherwise we risk the guest sees
5416                  * time go backwards.
5417                  *
5418                  * In case we update the frequency for another cpu
5419                  * (which might be in guest context) send an interrupt
5420                  * to kick the cpu out of guest context.  Next time
5421                  * guest context is entered kvmclock will be updated,
5422                  * so the guest will not see stale values.
5423                  */
5424                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5425         }
5426         return 0;
5427 }
5428
5429 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5430         .notifier_call  = kvmclock_cpufreq_notifier
5431 };
5432
5433 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5434                                         unsigned long action, void *hcpu)
5435 {
5436         unsigned int cpu = (unsigned long)hcpu;
5437
5438         switch (action) {
5439                 case CPU_ONLINE:
5440                 case CPU_DOWN_FAILED:
5441                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5442                         break;
5443                 case CPU_DOWN_PREPARE:
5444                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5445                         break;
5446         }
5447         return NOTIFY_OK;
5448 }
5449
5450 static struct notifier_block kvmclock_cpu_notifier_block = {
5451         .notifier_call  = kvmclock_cpu_notifier,
5452         .priority = -INT_MAX
5453 };
5454
5455 static void kvm_timer_init(void)
5456 {
5457         int cpu;
5458
5459         max_tsc_khz = tsc_khz;
5460
5461         cpu_notifier_register_begin();
5462         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5463 #ifdef CONFIG_CPU_FREQ
5464                 struct cpufreq_policy policy;
5465                 memset(&policy, 0, sizeof(policy));
5466                 cpu = get_cpu();
5467                 cpufreq_get_policy(&policy, cpu);
5468                 if (policy.cpuinfo.max_freq)
5469                         max_tsc_khz = policy.cpuinfo.max_freq;
5470                 put_cpu();
5471 #endif
5472                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5473                                           CPUFREQ_TRANSITION_NOTIFIER);
5474         }
5475         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5476         for_each_online_cpu(cpu)
5477                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5478
5479         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5480         cpu_notifier_register_done();
5481
5482 }
5483
5484 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5485
5486 int kvm_is_in_guest(void)
5487 {
5488         return __this_cpu_read(current_vcpu) != NULL;
5489 }
5490
5491 static int kvm_is_user_mode(void)
5492 {
5493         int user_mode = 3;
5494
5495         if (__this_cpu_read(current_vcpu))
5496                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5497
5498         return user_mode != 0;
5499 }
5500
5501 static unsigned long kvm_get_guest_ip(void)
5502 {
5503         unsigned long ip = 0;
5504
5505         if (__this_cpu_read(current_vcpu))
5506                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5507
5508         return ip;
5509 }
5510
5511 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5512         .is_in_guest            = kvm_is_in_guest,
5513         .is_user_mode           = kvm_is_user_mode,
5514         .get_guest_ip           = kvm_get_guest_ip,
5515 };
5516
5517 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5518 {
5519         __this_cpu_write(current_vcpu, vcpu);
5520 }
5521 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5522
5523 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5524 {
5525         __this_cpu_write(current_vcpu, NULL);
5526 }
5527 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5528
5529 static void kvm_set_mmio_spte_mask(void)
5530 {
5531         u64 mask;
5532         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5533
5534         /*
5535          * Set the reserved bits and the present bit of an paging-structure
5536          * entry to generate page fault with PFER.RSV = 1.
5537          */
5538          /* Mask the reserved physical address bits. */
5539         mask = rsvd_bits(maxphyaddr, 51);
5540
5541         /* Bit 62 is always reserved for 32bit host. */
5542         mask |= 0x3ull << 62;
5543
5544         /* Set the present bit. */
5545         mask |= 1ull;
5546
5547 #ifdef CONFIG_X86_64
5548         /*
5549          * If reserved bit is not supported, clear the present bit to disable
5550          * mmio page fault.
5551          */
5552         if (maxphyaddr == 52)
5553                 mask &= ~1ull;
5554 #endif
5555
5556         kvm_mmu_set_mmio_spte_mask(mask);
5557 }
5558
5559 #ifdef CONFIG_X86_64
5560 static void pvclock_gtod_update_fn(struct work_struct *work)
5561 {
5562         struct kvm *kvm;
5563
5564         struct kvm_vcpu *vcpu;
5565         int i;
5566
5567         spin_lock(&kvm_lock);
5568         list_for_each_entry(kvm, &vm_list, vm_list)
5569                 kvm_for_each_vcpu(i, vcpu, kvm)
5570                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5571         atomic_set(&kvm_guest_has_master_clock, 0);
5572         spin_unlock(&kvm_lock);
5573 }
5574
5575 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5576
5577 /*
5578  * Notification about pvclock gtod data update.
5579  */
5580 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5581                                void *priv)
5582 {
5583         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5584         struct timekeeper *tk = priv;
5585
5586         update_pvclock_gtod(tk);
5587
5588         /* disable master clock if host does not trust, or does not
5589          * use, TSC clocksource
5590          */
5591         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5592             atomic_read(&kvm_guest_has_master_clock) != 0)
5593                 queue_work(system_long_wq, &pvclock_gtod_work);
5594
5595         return 0;
5596 }
5597
5598 static struct notifier_block pvclock_gtod_notifier = {
5599         .notifier_call = pvclock_gtod_notify,
5600 };
5601 #endif
5602
5603 int kvm_arch_init(void *opaque)
5604 {
5605         int r;
5606         struct kvm_x86_ops *ops = opaque;
5607
5608         if (kvm_x86_ops) {
5609                 printk(KERN_ERR "kvm: already loaded the other module\n");
5610                 r = -EEXIST;
5611                 goto out;
5612         }
5613
5614         if (!ops->cpu_has_kvm_support()) {
5615                 printk(KERN_ERR "kvm: no hardware support\n");
5616                 r = -EOPNOTSUPP;
5617                 goto out;
5618         }
5619         if (ops->disabled_by_bios()) {
5620                 printk(KERN_ERR "kvm: disabled by bios\n");
5621                 r = -EOPNOTSUPP;
5622                 goto out;
5623         }
5624
5625         r = -ENOMEM;
5626         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5627         if (!shared_msrs) {
5628                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5629                 goto out;
5630         }
5631
5632         r = kvm_mmu_module_init();
5633         if (r)
5634                 goto out_free_percpu;
5635
5636         kvm_set_mmio_spte_mask();
5637
5638         kvm_x86_ops = ops;
5639
5640         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5641                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5642
5643         kvm_timer_init();
5644
5645         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5646
5647         if (cpu_has_xsave)
5648                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5649
5650         kvm_lapic_init();
5651 #ifdef CONFIG_X86_64
5652         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5653 #endif
5654
5655         return 0;
5656
5657 out_free_percpu:
5658         free_percpu(shared_msrs);
5659 out:
5660         return r;
5661 }
5662
5663 void kvm_arch_exit(void)
5664 {
5665         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5666
5667         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5668                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5669                                             CPUFREQ_TRANSITION_NOTIFIER);
5670         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5671 #ifdef CONFIG_X86_64
5672         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5673 #endif
5674         kvm_x86_ops = NULL;
5675         kvm_mmu_module_exit();
5676         free_percpu(shared_msrs);
5677 }
5678
5679 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5680 {
5681         ++vcpu->stat.halt_exits;
5682         if (irqchip_in_kernel(vcpu->kvm)) {
5683                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5684                 return 1;
5685         } else {
5686                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5687                 return 0;
5688         }
5689 }
5690 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5691
5692 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5693 {
5694         kvm_x86_ops->skip_emulated_instruction(vcpu);
5695         return kvm_vcpu_halt(vcpu);
5696 }
5697 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5698
5699 /*
5700  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5701  *
5702  * @apicid - apicid of vcpu to be kicked.
5703  */
5704 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5705 {
5706         struct kvm_lapic_irq lapic_irq;
5707
5708         lapic_irq.shorthand = 0;
5709         lapic_irq.dest_mode = 0;
5710         lapic_irq.dest_id = apicid;
5711         lapic_irq.msi_redir_hint = false;
5712
5713         lapic_irq.delivery_mode = APIC_DM_REMRD;
5714         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5715 }
5716
5717 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5718 {
5719         unsigned long nr, a0, a1, a2, a3, ret;
5720         int op_64_bit, r = 1;
5721
5722         kvm_x86_ops->skip_emulated_instruction(vcpu);
5723
5724         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5725                 return kvm_hv_hypercall(vcpu);
5726
5727         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5728         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5729         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5730         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5731         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5732
5733         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5734
5735         op_64_bit = is_64_bit_mode(vcpu);
5736         if (!op_64_bit) {
5737                 nr &= 0xFFFFFFFF;
5738                 a0 &= 0xFFFFFFFF;
5739                 a1 &= 0xFFFFFFFF;
5740                 a2 &= 0xFFFFFFFF;
5741                 a3 &= 0xFFFFFFFF;
5742         }
5743
5744         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5745                 ret = -KVM_EPERM;
5746                 goto out;
5747         }
5748
5749         switch (nr) {
5750         case KVM_HC_VAPIC_POLL_IRQ:
5751                 ret = 0;
5752                 break;
5753         case KVM_HC_KICK_CPU:
5754                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5755                 ret = 0;
5756                 break;
5757         default:
5758                 ret = -KVM_ENOSYS;
5759                 break;
5760         }
5761 out:
5762         if (!op_64_bit)
5763                 ret = (u32)ret;
5764         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5765         ++vcpu->stat.hypercalls;
5766         return r;
5767 }
5768 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5769
5770 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5771 {
5772         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5773         char instruction[3];
5774         unsigned long rip = kvm_rip_read(vcpu);
5775
5776         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5777
5778         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5779 }
5780
5781 /*
5782  * Check if userspace requested an interrupt window, and that the
5783  * interrupt window is open.
5784  *
5785  * No need to exit to userspace if we already have an interrupt queued.
5786  */
5787 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5788 {
5789         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5790                 vcpu->run->request_interrupt_window &&
5791                 kvm_arch_interrupt_allowed(vcpu));
5792 }
5793
5794 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5795 {
5796         struct kvm_run *kvm_run = vcpu->run;
5797
5798         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5799         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5800         kvm_run->cr8 = kvm_get_cr8(vcpu);
5801         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5802         if (irqchip_in_kernel(vcpu->kvm))
5803                 kvm_run->ready_for_interrupt_injection = 1;
5804         else
5805                 kvm_run->ready_for_interrupt_injection =
5806                         kvm_arch_interrupt_allowed(vcpu) &&
5807                         !kvm_cpu_has_interrupt(vcpu) &&
5808                         !kvm_event_needs_reinjection(vcpu);
5809 }
5810
5811 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5812 {
5813         int max_irr, tpr;
5814
5815         if (!kvm_x86_ops->update_cr8_intercept)
5816                 return;
5817
5818         if (!vcpu->arch.apic)
5819                 return;
5820
5821         if (!vcpu->arch.apic->vapic_addr)
5822                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5823         else
5824                 max_irr = -1;
5825
5826         if (max_irr != -1)
5827                 max_irr >>= 4;
5828
5829         tpr = kvm_lapic_get_cr8(vcpu);
5830
5831         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5832 }
5833
5834 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5835 {
5836         int r;
5837
5838         /* try to reinject previous events if any */
5839         if (vcpu->arch.exception.pending) {
5840                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5841                                         vcpu->arch.exception.has_error_code,
5842                                         vcpu->arch.exception.error_code);
5843
5844                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
5845                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
5846                                              X86_EFLAGS_RF);
5847
5848                 if (vcpu->arch.exception.nr == DB_VECTOR &&
5849                     (vcpu->arch.dr7 & DR7_GD)) {
5850                         vcpu->arch.dr7 &= ~DR7_GD;
5851                         kvm_update_dr7(vcpu);
5852                 }
5853
5854                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5855                                           vcpu->arch.exception.has_error_code,
5856                                           vcpu->arch.exception.error_code,
5857                                           vcpu->arch.exception.reinject);
5858                 return 0;
5859         }
5860
5861         if (vcpu->arch.nmi_injected) {
5862                 kvm_x86_ops->set_nmi(vcpu);
5863                 return 0;
5864         }
5865
5866         if (vcpu->arch.interrupt.pending) {
5867                 kvm_x86_ops->set_irq(vcpu);
5868                 return 0;
5869         }
5870
5871         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5872                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5873                 if (r != 0)
5874                         return r;
5875         }
5876
5877         /* try to inject new event if pending */
5878         if (vcpu->arch.nmi_pending) {
5879                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5880                         --vcpu->arch.nmi_pending;
5881                         vcpu->arch.nmi_injected = true;
5882                         kvm_x86_ops->set_nmi(vcpu);
5883                 }
5884         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5885                 /*
5886                  * Because interrupts can be injected asynchronously, we are
5887                  * calling check_nested_events again here to avoid a race condition.
5888                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
5889                  * proposal and current concerns.  Perhaps we should be setting
5890                  * KVM_REQ_EVENT only on certain events and not unconditionally?
5891                  */
5892                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5893                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5894                         if (r != 0)
5895                                 return r;
5896                 }
5897                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5898                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5899                                             false);
5900                         kvm_x86_ops->set_irq(vcpu);
5901                 }
5902         }
5903         return 0;
5904 }
5905
5906 static void process_nmi(struct kvm_vcpu *vcpu)
5907 {
5908         unsigned limit = 2;
5909
5910         /*
5911          * x86 is limited to one NMI running, and one NMI pending after it.
5912          * If an NMI is already in progress, limit further NMIs to just one.
5913          * Otherwise, allow two (and we'll inject the first one immediately).
5914          */
5915         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5916                 limit = 1;
5917
5918         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5919         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5920         kvm_make_request(KVM_REQ_EVENT, vcpu);
5921 }
5922
5923 #define put_smstate(type, buf, offset, val)                       \
5924         *(type *)((buf) + (offset) - 0x7e00) = val
5925
5926 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
5927 {
5928         u32 flags = 0;
5929         flags |= seg->g       << 23;
5930         flags |= seg->db      << 22;
5931         flags |= seg->l       << 21;
5932         flags |= seg->avl     << 20;
5933         flags |= seg->present << 15;
5934         flags |= seg->dpl     << 13;
5935         flags |= seg->s       << 12;
5936         flags |= seg->type    << 8;
5937         return flags;
5938 }
5939
5940 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
5941 {
5942         struct kvm_segment seg;
5943         int offset;
5944
5945         kvm_get_segment(vcpu, &seg, n);
5946         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
5947
5948         if (n < 3)
5949                 offset = 0x7f84 + n * 12;
5950         else
5951                 offset = 0x7f2c + (n - 3) * 12;
5952
5953         put_smstate(u32, buf, offset + 8, seg.base);
5954         put_smstate(u32, buf, offset + 4, seg.limit);
5955         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
5956 }
5957
5958 #ifdef CONFIG_X86_64
5959 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
5960 {
5961         struct kvm_segment seg;
5962         int offset;
5963         u16 flags;
5964
5965         kvm_get_segment(vcpu, &seg, n);
5966         offset = 0x7e00 + n * 16;
5967
5968         flags = process_smi_get_segment_flags(&seg) >> 8;
5969         put_smstate(u16, buf, offset, seg.selector);
5970         put_smstate(u16, buf, offset + 2, flags);
5971         put_smstate(u32, buf, offset + 4, seg.limit);
5972         put_smstate(u64, buf, offset + 8, seg.base);
5973 }
5974 #endif
5975
5976 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
5977 {
5978         struct desc_ptr dt;
5979         struct kvm_segment seg;
5980         unsigned long val;
5981         int i;
5982
5983         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
5984         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
5985         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
5986         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
5987
5988         for (i = 0; i < 8; i++)
5989                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
5990
5991         kvm_get_dr(vcpu, 6, &val);
5992         put_smstate(u32, buf, 0x7fcc, (u32)val);
5993         kvm_get_dr(vcpu, 7, &val);
5994         put_smstate(u32, buf, 0x7fc8, (u32)val);
5995
5996         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
5997         put_smstate(u32, buf, 0x7fc4, seg.selector);
5998         put_smstate(u32, buf, 0x7f64, seg.base);
5999         put_smstate(u32, buf, 0x7f60, seg.limit);
6000         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6001
6002         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6003         put_smstate(u32, buf, 0x7fc0, seg.selector);
6004         put_smstate(u32, buf, 0x7f80, seg.base);
6005         put_smstate(u32, buf, 0x7f7c, seg.limit);
6006         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6007
6008         kvm_x86_ops->get_gdt(vcpu, &dt);
6009         put_smstate(u32, buf, 0x7f74, dt.address);
6010         put_smstate(u32, buf, 0x7f70, dt.size);
6011
6012         kvm_x86_ops->get_idt(vcpu, &dt);
6013         put_smstate(u32, buf, 0x7f58, dt.address);
6014         put_smstate(u32, buf, 0x7f54, dt.size);
6015
6016         for (i = 0; i < 6; i++)
6017                 process_smi_save_seg_32(vcpu, buf, i);
6018
6019         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6020
6021         /* revision id */
6022         put_smstate(u32, buf, 0x7efc, 0x00020000);
6023         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6024 }
6025
6026 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6027 {
6028 #ifdef CONFIG_X86_64
6029         struct desc_ptr dt;
6030         struct kvm_segment seg;
6031         unsigned long val;
6032         int i;
6033
6034         for (i = 0; i < 16; i++)
6035                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6036
6037         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6038         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6039
6040         kvm_get_dr(vcpu, 6, &val);
6041         put_smstate(u64, buf, 0x7f68, val);
6042         kvm_get_dr(vcpu, 7, &val);
6043         put_smstate(u64, buf, 0x7f60, val);
6044
6045         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6046         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6047         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6048
6049         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6050
6051         /* revision id */
6052         put_smstate(u32, buf, 0x7efc, 0x00020064);
6053
6054         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6055
6056         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6057         put_smstate(u16, buf, 0x7e90, seg.selector);
6058         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6059         put_smstate(u32, buf, 0x7e94, seg.limit);
6060         put_smstate(u64, buf, 0x7e98, seg.base);
6061
6062         kvm_x86_ops->get_idt(vcpu, &dt);
6063         put_smstate(u32, buf, 0x7e84, dt.size);
6064         put_smstate(u64, buf, 0x7e88, dt.address);
6065
6066         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6067         put_smstate(u16, buf, 0x7e70, seg.selector);
6068         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6069         put_smstate(u32, buf, 0x7e74, seg.limit);
6070         put_smstate(u64, buf, 0x7e78, seg.base);
6071
6072         kvm_x86_ops->get_gdt(vcpu, &dt);
6073         put_smstate(u32, buf, 0x7e64, dt.size);
6074         put_smstate(u64, buf, 0x7e68, dt.address);
6075
6076         for (i = 0; i < 6; i++)
6077                 process_smi_save_seg_64(vcpu, buf, i);
6078 #else
6079         WARN_ON_ONCE(1);
6080 #endif
6081 }
6082
6083 static void process_smi(struct kvm_vcpu *vcpu)
6084 {
6085         struct kvm_segment cs, ds;
6086         char buf[512];
6087         u32 cr0;
6088
6089         if (is_smm(vcpu)) {
6090                 vcpu->arch.smi_pending = true;
6091                 return;
6092         }
6093
6094         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6095         vcpu->arch.hflags |= HF_SMM_MASK;
6096         memset(buf, 0, 512);
6097         if (guest_cpuid_has_longmode(vcpu))
6098                 process_smi_save_state_64(vcpu, buf);
6099         else
6100                 process_smi_save_state_32(vcpu, buf);
6101
6102         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6103
6104         if (kvm_x86_ops->get_nmi_mask(vcpu))
6105                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6106         else
6107                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6108
6109         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6110         kvm_rip_write(vcpu, 0x8000);
6111
6112         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6113         kvm_x86_ops->set_cr0(vcpu, cr0);
6114         vcpu->arch.cr0 = cr0;
6115
6116         kvm_x86_ops->set_cr4(vcpu, 0);
6117
6118         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6119
6120         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6121         cs.base = vcpu->arch.smbase;
6122
6123         ds.selector = 0;
6124         ds.base = 0;
6125
6126         cs.limit    = ds.limit = 0xffffffff;
6127         cs.type     = ds.type = 0x3;
6128         cs.dpl      = ds.dpl = 0;
6129         cs.db       = ds.db = 0;
6130         cs.s        = ds.s = 1;
6131         cs.l        = ds.l = 0;
6132         cs.g        = ds.g = 1;
6133         cs.avl      = ds.avl = 0;
6134         cs.present  = ds.present = 1;
6135         cs.unusable = ds.unusable = 0;
6136         cs.padding  = ds.padding = 0;
6137
6138         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6139         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6140         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6141         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6142         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6143         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6144
6145         if (guest_cpuid_has_longmode(vcpu))
6146                 kvm_x86_ops->set_efer(vcpu, 0);
6147
6148         kvm_update_cpuid(vcpu);
6149         kvm_mmu_reset_context(vcpu);
6150 }
6151
6152 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6153 {
6154         u64 eoi_exit_bitmap[4];
6155         u32 tmr[8];
6156
6157         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6158                 return;
6159
6160         memset(eoi_exit_bitmap, 0, 32);
6161         memset(tmr, 0, 32);
6162
6163         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
6164         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6165         kvm_apic_update_tmr(vcpu, tmr);
6166 }
6167
6168 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6169 {
6170         ++vcpu->stat.tlb_flush;
6171         kvm_x86_ops->tlb_flush(vcpu);
6172 }
6173
6174 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6175 {
6176         struct page *page = NULL;
6177
6178         if (!irqchip_in_kernel(vcpu->kvm))
6179                 return;
6180
6181         if (!kvm_x86_ops->set_apic_access_page_addr)
6182                 return;
6183
6184         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6185         if (is_error_page(page))
6186                 return;
6187         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6188
6189         /*
6190          * Do not pin apic access page in memory, the MMU notifier
6191          * will call us again if it is migrated or swapped out.
6192          */
6193         put_page(page);
6194 }
6195 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6196
6197 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6198                                            unsigned long address)
6199 {
6200         /*
6201          * The physical address of apic access page is stored in the VMCS.
6202          * Update it when it becomes invalid.
6203          */
6204         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6205                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6206 }
6207
6208 /*
6209  * Returns 1 to let vcpu_run() continue the guest execution loop without
6210  * exiting to the userspace.  Otherwise, the value will be returned to the
6211  * userspace.
6212  */
6213 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6214 {
6215         int r;
6216         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
6217                 vcpu->run->request_interrupt_window;
6218         bool req_immediate_exit = false;
6219
6220         if (vcpu->requests) {
6221                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6222                         kvm_mmu_unload(vcpu);
6223                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6224                         __kvm_migrate_timers(vcpu);
6225                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6226                         kvm_gen_update_masterclock(vcpu->kvm);
6227                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6228                         kvm_gen_kvmclock_update(vcpu);
6229                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6230                         r = kvm_guest_time_update(vcpu);
6231                         if (unlikely(r))
6232                                 goto out;
6233                 }
6234                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6235                         kvm_mmu_sync_roots(vcpu);
6236                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6237                         kvm_vcpu_flush_tlb(vcpu);
6238                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6239                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6240                         r = 0;
6241                         goto out;
6242                 }
6243                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6244                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6245                         r = 0;
6246                         goto out;
6247                 }
6248                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6249                         vcpu->fpu_active = 0;
6250                         kvm_x86_ops->fpu_deactivate(vcpu);
6251                 }
6252                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6253                         /* Page is swapped out. Do synthetic halt */
6254                         vcpu->arch.apf.halted = true;
6255                         r = 1;
6256                         goto out;
6257                 }
6258                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6259                         record_steal_time(vcpu);
6260                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6261                         process_smi(vcpu);
6262                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6263                         process_nmi(vcpu);
6264                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6265                         kvm_pmu_handle_event(vcpu);
6266                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6267                         kvm_pmu_deliver_pmi(vcpu);
6268                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6269                         vcpu_scan_ioapic(vcpu);
6270                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6271                         kvm_vcpu_reload_apic_access_page(vcpu);
6272                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6273                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6274                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6275                         r = 0;
6276                         goto out;
6277                 }
6278         }
6279
6280         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6281                 kvm_apic_accept_events(vcpu);
6282                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6283                         r = 1;
6284                         goto out;
6285                 }
6286
6287                 if (inject_pending_event(vcpu, req_int_win) != 0)
6288                         req_immediate_exit = true;
6289                 /* enable NMI/IRQ window open exits if needed */
6290                 else if (vcpu->arch.nmi_pending)
6291                         kvm_x86_ops->enable_nmi_window(vcpu);
6292                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6293                         kvm_x86_ops->enable_irq_window(vcpu);
6294
6295                 if (kvm_lapic_enabled(vcpu)) {
6296                         /*
6297                          * Update architecture specific hints for APIC
6298                          * virtual interrupt delivery.
6299                          */
6300                         if (kvm_x86_ops->hwapic_irr_update)
6301                                 kvm_x86_ops->hwapic_irr_update(vcpu,
6302                                         kvm_lapic_find_highest_irr(vcpu));
6303                         update_cr8_intercept(vcpu);
6304                         kvm_lapic_sync_to_vapic(vcpu);
6305                 }
6306         }
6307
6308         r = kvm_mmu_reload(vcpu);
6309         if (unlikely(r)) {
6310                 goto cancel_injection;
6311         }
6312
6313         preempt_disable();
6314
6315         kvm_x86_ops->prepare_guest_switch(vcpu);
6316         if (vcpu->fpu_active)
6317                 kvm_load_guest_fpu(vcpu);
6318         kvm_load_guest_xcr0(vcpu);
6319
6320         vcpu->mode = IN_GUEST_MODE;
6321
6322         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6323
6324         /* We should set ->mode before check ->requests,
6325          * see the comment in make_all_cpus_request.
6326          */
6327         smp_mb__after_srcu_read_unlock();
6328
6329         local_irq_disable();
6330
6331         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6332             || need_resched() || signal_pending(current)) {
6333                 vcpu->mode = OUTSIDE_GUEST_MODE;
6334                 smp_wmb();
6335                 local_irq_enable();
6336                 preempt_enable();
6337                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6338                 r = 1;
6339                 goto cancel_injection;
6340         }
6341
6342         if (req_immediate_exit)
6343                 smp_send_reschedule(vcpu->cpu);
6344
6345         __kvm_guest_enter();
6346
6347         if (unlikely(vcpu->arch.switch_db_regs)) {
6348                 set_debugreg(0, 7);
6349                 set_debugreg(vcpu->arch.eff_db[0], 0);
6350                 set_debugreg(vcpu->arch.eff_db[1], 1);
6351                 set_debugreg(vcpu->arch.eff_db[2], 2);
6352                 set_debugreg(vcpu->arch.eff_db[3], 3);
6353                 set_debugreg(vcpu->arch.dr6, 6);
6354                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6355         }
6356
6357         trace_kvm_entry(vcpu->vcpu_id);
6358         wait_lapic_expire(vcpu);
6359         kvm_x86_ops->run(vcpu);
6360
6361         /*
6362          * Do this here before restoring debug registers on the host.  And
6363          * since we do this before handling the vmexit, a DR access vmexit
6364          * can (a) read the correct value of the debug registers, (b) set
6365          * KVM_DEBUGREG_WONT_EXIT again.
6366          */
6367         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6368                 int i;
6369
6370                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6371                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6372                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6373                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6374         }
6375
6376         /*
6377          * If the guest has used debug registers, at least dr7
6378          * will be disabled while returning to the host.
6379          * If we don't have active breakpoints in the host, we don't
6380          * care about the messed up debug address registers. But if
6381          * we have some of them active, restore the old state.
6382          */
6383         if (hw_breakpoint_active())
6384                 hw_breakpoint_restore();
6385
6386         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6387                                                            native_read_tsc());
6388
6389         vcpu->mode = OUTSIDE_GUEST_MODE;
6390         smp_wmb();
6391
6392         /* Interrupt is enabled by handle_external_intr() */
6393         kvm_x86_ops->handle_external_intr(vcpu);
6394
6395         ++vcpu->stat.exits;
6396
6397         /*
6398          * We must have an instruction between local_irq_enable() and
6399          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6400          * the interrupt shadow.  The stat.exits increment will do nicely.
6401          * But we need to prevent reordering, hence this barrier():
6402          */
6403         barrier();
6404
6405         kvm_guest_exit();
6406
6407         preempt_enable();
6408
6409         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6410
6411         /*
6412          * Profile KVM exit RIPs:
6413          */
6414         if (unlikely(prof_on == KVM_PROFILING)) {
6415                 unsigned long rip = kvm_rip_read(vcpu);
6416                 profile_hit(KVM_PROFILING, (void *)rip);
6417         }
6418
6419         if (unlikely(vcpu->arch.tsc_always_catchup))
6420                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6421
6422         if (vcpu->arch.apic_attention)
6423                 kvm_lapic_sync_from_vapic(vcpu);
6424
6425         r = kvm_x86_ops->handle_exit(vcpu);
6426         return r;
6427
6428 cancel_injection:
6429         kvm_x86_ops->cancel_injection(vcpu);
6430         if (unlikely(vcpu->arch.apic_attention))
6431                 kvm_lapic_sync_from_vapic(vcpu);
6432 out:
6433         return r;
6434 }
6435
6436 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6437 {
6438         if (!kvm_arch_vcpu_runnable(vcpu)) {
6439                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6440                 kvm_vcpu_block(vcpu);
6441                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6442                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6443                         return 1;
6444         }
6445
6446         kvm_apic_accept_events(vcpu);
6447         switch(vcpu->arch.mp_state) {
6448         case KVM_MP_STATE_HALTED:
6449                 vcpu->arch.pv.pv_unhalted = false;
6450                 vcpu->arch.mp_state =
6451                         KVM_MP_STATE_RUNNABLE;
6452         case KVM_MP_STATE_RUNNABLE:
6453                 vcpu->arch.apf.halted = false;
6454                 break;
6455         case KVM_MP_STATE_INIT_RECEIVED:
6456                 break;
6457         default:
6458                 return -EINTR;
6459                 break;
6460         }
6461         return 1;
6462 }
6463
6464 static int vcpu_run(struct kvm_vcpu *vcpu)
6465 {
6466         int r;
6467         struct kvm *kvm = vcpu->kvm;
6468
6469         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6470
6471         for (;;) {
6472                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6473                     !vcpu->arch.apf.halted)
6474                         r = vcpu_enter_guest(vcpu);
6475                 else
6476                         r = vcpu_block(kvm, vcpu);
6477                 if (r <= 0)
6478                         break;
6479
6480                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6481                 if (kvm_cpu_has_pending_timer(vcpu))
6482                         kvm_inject_pending_timer_irqs(vcpu);
6483
6484                 if (dm_request_for_irq_injection(vcpu)) {
6485                         r = -EINTR;
6486                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6487                         ++vcpu->stat.request_irq_exits;
6488                         break;
6489                 }
6490
6491                 kvm_check_async_pf_completion(vcpu);
6492
6493                 if (signal_pending(current)) {
6494                         r = -EINTR;
6495                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6496                         ++vcpu->stat.signal_exits;
6497                         break;
6498                 }
6499                 if (need_resched()) {
6500                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6501                         cond_resched();
6502                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6503                 }
6504         }
6505
6506         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6507
6508         return r;
6509 }
6510
6511 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6512 {
6513         int r;
6514         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6515         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6516         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6517         if (r != EMULATE_DONE)
6518                 return 0;
6519         return 1;
6520 }
6521
6522 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6523 {
6524         BUG_ON(!vcpu->arch.pio.count);
6525
6526         return complete_emulated_io(vcpu);
6527 }
6528
6529 /*
6530  * Implements the following, as a state machine:
6531  *
6532  * read:
6533  *   for each fragment
6534  *     for each mmio piece in the fragment
6535  *       write gpa, len
6536  *       exit
6537  *       copy data
6538  *   execute insn
6539  *
6540  * write:
6541  *   for each fragment
6542  *     for each mmio piece in the fragment
6543  *       write gpa, len
6544  *       copy data
6545  *       exit
6546  */
6547 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6548 {
6549         struct kvm_run *run = vcpu->run;
6550         struct kvm_mmio_fragment *frag;
6551         unsigned len;
6552
6553         BUG_ON(!vcpu->mmio_needed);
6554
6555         /* Complete previous fragment */
6556         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6557         len = min(8u, frag->len);
6558         if (!vcpu->mmio_is_write)
6559                 memcpy(frag->data, run->mmio.data, len);
6560
6561         if (frag->len <= 8) {
6562                 /* Switch to the next fragment. */
6563                 frag++;
6564                 vcpu->mmio_cur_fragment++;
6565         } else {
6566                 /* Go forward to the next mmio piece. */
6567                 frag->data += len;
6568                 frag->gpa += len;
6569                 frag->len -= len;
6570         }
6571
6572         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6573                 vcpu->mmio_needed = 0;
6574
6575                 /* FIXME: return into emulator if single-stepping.  */
6576                 if (vcpu->mmio_is_write)
6577                         return 1;
6578                 vcpu->mmio_read_completed = 1;
6579                 return complete_emulated_io(vcpu);
6580         }
6581
6582         run->exit_reason = KVM_EXIT_MMIO;
6583         run->mmio.phys_addr = frag->gpa;
6584         if (vcpu->mmio_is_write)
6585                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6586         run->mmio.len = min(8u, frag->len);
6587         run->mmio.is_write = vcpu->mmio_is_write;
6588         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6589         return 0;
6590 }
6591
6592
6593 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6594 {
6595         struct fpu *fpu = &current->thread.fpu;
6596         int r;
6597         sigset_t sigsaved;
6598
6599         fpu__activate_curr(fpu);
6600
6601         if (vcpu->sigset_active)
6602                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6603
6604         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6605                 kvm_vcpu_block(vcpu);
6606                 kvm_apic_accept_events(vcpu);
6607                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6608                 r = -EAGAIN;
6609                 goto out;
6610         }
6611
6612         /* re-sync apic's tpr */
6613         if (!irqchip_in_kernel(vcpu->kvm)) {
6614                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6615                         r = -EINVAL;
6616                         goto out;
6617                 }
6618         }
6619
6620         if (unlikely(vcpu->arch.complete_userspace_io)) {
6621                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6622                 vcpu->arch.complete_userspace_io = NULL;
6623                 r = cui(vcpu);
6624                 if (r <= 0)
6625                         goto out;
6626         } else
6627                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6628
6629         r = vcpu_run(vcpu);
6630
6631 out:
6632         post_kvm_run_save(vcpu);
6633         if (vcpu->sigset_active)
6634                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6635
6636         return r;
6637 }
6638
6639 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6640 {
6641         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6642                 /*
6643                  * We are here if userspace calls get_regs() in the middle of
6644                  * instruction emulation. Registers state needs to be copied
6645                  * back from emulation context to vcpu. Userspace shouldn't do
6646                  * that usually, but some bad designed PV devices (vmware
6647                  * backdoor interface) need this to work
6648                  */
6649                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6650                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6651         }
6652         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6653         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6654         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6655         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6656         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6657         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6658         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6659         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6660 #ifdef CONFIG_X86_64
6661         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6662         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6663         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6664         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6665         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6666         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6667         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6668         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6669 #endif
6670
6671         regs->rip = kvm_rip_read(vcpu);
6672         regs->rflags = kvm_get_rflags(vcpu);
6673
6674         return 0;
6675 }
6676
6677 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6678 {
6679         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6680         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6681
6682         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6683         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6684         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6685         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6686         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6687         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6688         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6689         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6690 #ifdef CONFIG_X86_64
6691         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6692         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6693         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6694         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6695         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6696         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6697         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6698         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6699 #endif
6700
6701         kvm_rip_write(vcpu, regs->rip);
6702         kvm_set_rflags(vcpu, regs->rflags);
6703
6704         vcpu->arch.exception.pending = false;
6705
6706         kvm_make_request(KVM_REQ_EVENT, vcpu);
6707
6708         return 0;
6709 }
6710
6711 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6712 {
6713         struct kvm_segment cs;
6714
6715         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6716         *db = cs.db;
6717         *l = cs.l;
6718 }
6719 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6720
6721 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6722                                   struct kvm_sregs *sregs)
6723 {
6724         struct desc_ptr dt;
6725
6726         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6727         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6728         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6729         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6730         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6731         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6732
6733         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6734         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6735
6736         kvm_x86_ops->get_idt(vcpu, &dt);
6737         sregs->idt.limit = dt.size;
6738         sregs->idt.base = dt.address;
6739         kvm_x86_ops->get_gdt(vcpu, &dt);
6740         sregs->gdt.limit = dt.size;
6741         sregs->gdt.base = dt.address;
6742
6743         sregs->cr0 = kvm_read_cr0(vcpu);
6744         sregs->cr2 = vcpu->arch.cr2;
6745         sregs->cr3 = kvm_read_cr3(vcpu);
6746         sregs->cr4 = kvm_read_cr4(vcpu);
6747         sregs->cr8 = kvm_get_cr8(vcpu);
6748         sregs->efer = vcpu->arch.efer;
6749         sregs->apic_base = kvm_get_apic_base(vcpu);
6750
6751         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6752
6753         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6754                 set_bit(vcpu->arch.interrupt.nr,
6755                         (unsigned long *)sregs->interrupt_bitmap);
6756
6757         return 0;
6758 }
6759
6760 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6761                                     struct kvm_mp_state *mp_state)
6762 {
6763         kvm_apic_accept_events(vcpu);
6764         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6765                                         vcpu->arch.pv.pv_unhalted)
6766                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6767         else
6768                 mp_state->mp_state = vcpu->arch.mp_state;
6769
6770         return 0;
6771 }
6772
6773 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6774                                     struct kvm_mp_state *mp_state)
6775 {
6776         if (!kvm_vcpu_has_lapic(vcpu) &&
6777             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6778                 return -EINVAL;
6779
6780         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6781                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6782                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6783         } else
6784                 vcpu->arch.mp_state = mp_state->mp_state;
6785         kvm_make_request(KVM_REQ_EVENT, vcpu);
6786         return 0;
6787 }
6788
6789 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6790                     int reason, bool has_error_code, u32 error_code)
6791 {
6792         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6793         int ret;
6794
6795         init_emulate_ctxt(vcpu);
6796
6797         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6798                                    has_error_code, error_code);
6799
6800         if (ret)
6801                 return EMULATE_FAIL;
6802
6803         kvm_rip_write(vcpu, ctxt->eip);
6804         kvm_set_rflags(vcpu, ctxt->eflags);
6805         kvm_make_request(KVM_REQ_EVENT, vcpu);
6806         return EMULATE_DONE;
6807 }
6808 EXPORT_SYMBOL_GPL(kvm_task_switch);
6809
6810 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6811                                   struct kvm_sregs *sregs)
6812 {
6813         struct msr_data apic_base_msr;
6814         int mmu_reset_needed = 0;
6815         int pending_vec, max_bits, idx;
6816         struct desc_ptr dt;
6817
6818         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6819                 return -EINVAL;
6820
6821         dt.size = sregs->idt.limit;
6822         dt.address = sregs->idt.base;
6823         kvm_x86_ops->set_idt(vcpu, &dt);
6824         dt.size = sregs->gdt.limit;
6825         dt.address = sregs->gdt.base;
6826         kvm_x86_ops->set_gdt(vcpu, &dt);
6827
6828         vcpu->arch.cr2 = sregs->cr2;
6829         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6830         vcpu->arch.cr3 = sregs->cr3;
6831         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6832
6833         kvm_set_cr8(vcpu, sregs->cr8);
6834
6835         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6836         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6837         apic_base_msr.data = sregs->apic_base;
6838         apic_base_msr.host_initiated = true;
6839         kvm_set_apic_base(vcpu, &apic_base_msr);
6840
6841         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6842         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6843         vcpu->arch.cr0 = sregs->cr0;
6844
6845         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6846         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6847         if (sregs->cr4 & X86_CR4_OSXSAVE)
6848                 kvm_update_cpuid(vcpu);
6849
6850         idx = srcu_read_lock(&vcpu->kvm->srcu);
6851         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6852                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6853                 mmu_reset_needed = 1;
6854         }
6855         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6856
6857         if (mmu_reset_needed)
6858                 kvm_mmu_reset_context(vcpu);
6859
6860         max_bits = KVM_NR_INTERRUPTS;
6861         pending_vec = find_first_bit(
6862                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6863         if (pending_vec < max_bits) {
6864                 kvm_queue_interrupt(vcpu, pending_vec, false);
6865                 pr_debug("Set back pending irq %d\n", pending_vec);
6866         }
6867
6868         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6869         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6870         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6871         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6872         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6873         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6874
6875         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6876         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6877
6878         update_cr8_intercept(vcpu);
6879
6880         /* Older userspace won't unhalt the vcpu on reset. */
6881         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6882             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6883             !is_protmode(vcpu))
6884                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6885
6886         kvm_make_request(KVM_REQ_EVENT, vcpu);
6887
6888         return 0;
6889 }
6890
6891 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6892                                         struct kvm_guest_debug *dbg)
6893 {
6894         unsigned long rflags;
6895         int i, r;
6896
6897         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6898                 r = -EBUSY;
6899                 if (vcpu->arch.exception.pending)
6900                         goto out;
6901                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6902                         kvm_queue_exception(vcpu, DB_VECTOR);
6903                 else
6904                         kvm_queue_exception(vcpu, BP_VECTOR);
6905         }
6906
6907         /*
6908          * Read rflags as long as potentially injected trace flags are still
6909          * filtered out.
6910          */
6911         rflags = kvm_get_rflags(vcpu);
6912
6913         vcpu->guest_debug = dbg->control;
6914         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6915                 vcpu->guest_debug = 0;
6916
6917         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6918                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6919                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6920                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6921         } else {
6922                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6923                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6924         }
6925         kvm_update_dr7(vcpu);
6926
6927         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6928                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6929                         get_segment_base(vcpu, VCPU_SREG_CS);
6930
6931         /*
6932          * Trigger an rflags update that will inject or remove the trace
6933          * flags.
6934          */
6935         kvm_set_rflags(vcpu, rflags);
6936
6937         kvm_x86_ops->update_db_bp_intercept(vcpu);
6938
6939         r = 0;
6940
6941 out:
6942
6943         return r;
6944 }
6945
6946 /*
6947  * Translate a guest virtual address to a guest physical address.
6948  */
6949 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6950                                     struct kvm_translation *tr)
6951 {
6952         unsigned long vaddr = tr->linear_address;
6953         gpa_t gpa;
6954         int idx;
6955
6956         idx = srcu_read_lock(&vcpu->kvm->srcu);
6957         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6958         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6959         tr->physical_address = gpa;
6960         tr->valid = gpa != UNMAPPED_GVA;
6961         tr->writeable = 1;
6962         tr->usermode = 0;
6963
6964         return 0;
6965 }
6966
6967 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6968 {
6969         struct fxregs_state *fxsave =
6970                         &vcpu->arch.guest_fpu.state.fxsave;
6971
6972         memcpy(fpu->fpr, fxsave->st_space, 128);
6973         fpu->fcw = fxsave->cwd;
6974         fpu->fsw = fxsave->swd;
6975         fpu->ftwx = fxsave->twd;
6976         fpu->last_opcode = fxsave->fop;
6977         fpu->last_ip = fxsave->rip;
6978         fpu->last_dp = fxsave->rdp;
6979         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6980
6981         return 0;
6982 }
6983
6984 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6985 {
6986         struct fxregs_state *fxsave =
6987                         &vcpu->arch.guest_fpu.state.fxsave;
6988
6989         memcpy(fxsave->st_space, fpu->fpr, 128);
6990         fxsave->cwd = fpu->fcw;
6991         fxsave->swd = fpu->fsw;
6992         fxsave->twd = fpu->ftwx;
6993         fxsave->fop = fpu->last_opcode;
6994         fxsave->rip = fpu->last_ip;
6995         fxsave->rdp = fpu->last_dp;
6996         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6997
6998         return 0;
6999 }
7000
7001 static void fx_init(struct kvm_vcpu *vcpu)
7002 {
7003         fpstate_init(&vcpu->arch.guest_fpu.state);
7004         if (cpu_has_xsaves)
7005                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7006                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7007
7008         /*
7009          * Ensure guest xcr0 is valid for loading
7010          */
7011         vcpu->arch.xcr0 = XSTATE_FP;
7012
7013         vcpu->arch.cr0 |= X86_CR0_ET;
7014 }
7015
7016 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7017 {
7018         if (vcpu->guest_fpu_loaded)
7019                 return;
7020
7021         /*
7022          * Restore all possible states in the guest,
7023          * and assume host would use all available bits.
7024          * Guest xcr0 would be loaded later.
7025          */
7026         kvm_put_guest_xcr0(vcpu);
7027         vcpu->guest_fpu_loaded = 1;
7028         __kernel_fpu_begin();
7029         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7030         trace_kvm_fpu(1);
7031 }
7032
7033 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7034 {
7035         kvm_put_guest_xcr0(vcpu);
7036
7037         if (!vcpu->guest_fpu_loaded) {
7038                 vcpu->fpu_counter = 0;
7039                 return;
7040         }
7041
7042         vcpu->guest_fpu_loaded = 0;
7043         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7044         __kernel_fpu_end();
7045         ++vcpu->stat.fpu_reload;
7046         /*
7047          * If using eager FPU mode, or if the guest is a frequent user
7048          * of the FPU, just leave the FPU active for next time.
7049          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7050          * the FPU in bursts will revert to loading it on demand.
7051          */
7052         if (!vcpu->arch.eager_fpu) {
7053                 if (++vcpu->fpu_counter < 5)
7054                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7055         }
7056         trace_kvm_fpu(0);
7057 }
7058
7059 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7060 {
7061         kvmclock_reset(vcpu);
7062
7063         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7064         kvm_x86_ops->vcpu_free(vcpu);
7065 }
7066
7067 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7068                                                 unsigned int id)
7069 {
7070         struct kvm_vcpu *vcpu;
7071
7072         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7073                 printk_once(KERN_WARNING
7074                 "kvm: SMP vm created on host with unstable TSC; "
7075                 "guest TSC will not be reliable\n");
7076
7077         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7078
7079         return vcpu;
7080 }
7081
7082 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7083 {
7084         int r;
7085
7086         kvm_vcpu_mtrr_init(vcpu);
7087         r = vcpu_load(vcpu);
7088         if (r)
7089                 return r;
7090         kvm_vcpu_reset(vcpu, false);
7091         kvm_mmu_setup(vcpu);
7092         vcpu_put(vcpu);
7093         return r;
7094 }
7095
7096 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7097 {
7098         struct msr_data msr;
7099         struct kvm *kvm = vcpu->kvm;
7100
7101         if (vcpu_load(vcpu))
7102                 return;
7103         msr.data = 0x0;
7104         msr.index = MSR_IA32_TSC;
7105         msr.host_initiated = true;
7106         kvm_write_tsc(vcpu, &msr);
7107         vcpu_put(vcpu);
7108
7109         if (!kvmclock_periodic_sync)
7110                 return;
7111
7112         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7113                                         KVMCLOCK_SYNC_PERIOD);
7114 }
7115
7116 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7117 {
7118         int r;
7119         vcpu->arch.apf.msr_val = 0;
7120
7121         r = vcpu_load(vcpu);
7122         BUG_ON(r);
7123         kvm_mmu_unload(vcpu);
7124         vcpu_put(vcpu);
7125
7126         kvm_x86_ops->vcpu_free(vcpu);
7127 }
7128
7129 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7130 {
7131         vcpu->arch.hflags = 0;
7132
7133         atomic_set(&vcpu->arch.nmi_queued, 0);
7134         vcpu->arch.nmi_pending = 0;
7135         vcpu->arch.nmi_injected = false;
7136         kvm_clear_interrupt_queue(vcpu);
7137         kvm_clear_exception_queue(vcpu);
7138
7139         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7140         kvm_update_dr0123(vcpu);
7141         vcpu->arch.dr6 = DR6_INIT;
7142         kvm_update_dr6(vcpu);
7143         vcpu->arch.dr7 = DR7_FIXED_1;
7144         kvm_update_dr7(vcpu);
7145
7146         vcpu->arch.cr2 = 0;
7147
7148         kvm_make_request(KVM_REQ_EVENT, vcpu);
7149         vcpu->arch.apf.msr_val = 0;
7150         vcpu->arch.st.msr_val = 0;
7151
7152         kvmclock_reset(vcpu);
7153
7154         kvm_clear_async_pf_completion_queue(vcpu);
7155         kvm_async_pf_hash_reset(vcpu);
7156         vcpu->arch.apf.halted = false;
7157
7158         if (!init_event) {
7159                 kvm_pmu_reset(vcpu);
7160                 vcpu->arch.smbase = 0x30000;
7161         }
7162
7163         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7164         vcpu->arch.regs_avail = ~0;
7165         vcpu->arch.regs_dirty = ~0;
7166
7167         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7168 }
7169
7170 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7171 {
7172         struct kvm_segment cs;
7173
7174         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7175         cs.selector = vector << 8;
7176         cs.base = vector << 12;
7177         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7178         kvm_rip_write(vcpu, 0);
7179 }
7180
7181 int kvm_arch_hardware_enable(void)
7182 {
7183         struct kvm *kvm;
7184         struct kvm_vcpu *vcpu;
7185         int i;
7186         int ret;
7187         u64 local_tsc;
7188         u64 max_tsc = 0;
7189         bool stable, backwards_tsc = false;
7190
7191         kvm_shared_msr_cpu_online();
7192         ret = kvm_x86_ops->hardware_enable();
7193         if (ret != 0)
7194                 return ret;
7195
7196         local_tsc = native_read_tsc();
7197         stable = !check_tsc_unstable();
7198         list_for_each_entry(kvm, &vm_list, vm_list) {
7199                 kvm_for_each_vcpu(i, vcpu, kvm) {
7200                         if (!stable && vcpu->cpu == smp_processor_id())
7201                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7202                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7203                                 backwards_tsc = true;
7204                                 if (vcpu->arch.last_host_tsc > max_tsc)
7205                                         max_tsc = vcpu->arch.last_host_tsc;
7206                         }
7207                 }
7208         }
7209
7210         /*
7211          * Sometimes, even reliable TSCs go backwards.  This happens on
7212          * platforms that reset TSC during suspend or hibernate actions, but
7213          * maintain synchronization.  We must compensate.  Fortunately, we can
7214          * detect that condition here, which happens early in CPU bringup,
7215          * before any KVM threads can be running.  Unfortunately, we can't
7216          * bring the TSCs fully up to date with real time, as we aren't yet far
7217          * enough into CPU bringup that we know how much real time has actually
7218          * elapsed; our helper function, get_kernel_ns() will be using boot
7219          * variables that haven't been updated yet.
7220          *
7221          * So we simply find the maximum observed TSC above, then record the
7222          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7223          * the adjustment will be applied.  Note that we accumulate
7224          * adjustments, in case multiple suspend cycles happen before some VCPU
7225          * gets a chance to run again.  In the event that no KVM threads get a
7226          * chance to run, we will miss the entire elapsed period, as we'll have
7227          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7228          * loose cycle time.  This isn't too big a deal, since the loss will be
7229          * uniform across all VCPUs (not to mention the scenario is extremely
7230          * unlikely). It is possible that a second hibernate recovery happens
7231          * much faster than a first, causing the observed TSC here to be
7232          * smaller; this would require additional padding adjustment, which is
7233          * why we set last_host_tsc to the local tsc observed here.
7234          *
7235          * N.B. - this code below runs only on platforms with reliable TSC,
7236          * as that is the only way backwards_tsc is set above.  Also note
7237          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7238          * have the same delta_cyc adjustment applied if backwards_tsc
7239          * is detected.  Note further, this adjustment is only done once,
7240          * as we reset last_host_tsc on all VCPUs to stop this from being
7241          * called multiple times (one for each physical CPU bringup).
7242          *
7243          * Platforms with unreliable TSCs don't have to deal with this, they
7244          * will be compensated by the logic in vcpu_load, which sets the TSC to
7245          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7246          * guarantee that they stay in perfect synchronization.
7247          */
7248         if (backwards_tsc) {
7249                 u64 delta_cyc = max_tsc - local_tsc;
7250                 backwards_tsc_observed = true;
7251                 list_for_each_entry(kvm, &vm_list, vm_list) {
7252                         kvm_for_each_vcpu(i, vcpu, kvm) {
7253                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7254                                 vcpu->arch.last_host_tsc = local_tsc;
7255                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7256                         }
7257
7258                         /*
7259                          * We have to disable TSC offset matching.. if you were
7260                          * booting a VM while issuing an S4 host suspend....
7261                          * you may have some problem.  Solving this issue is
7262                          * left as an exercise to the reader.
7263                          */
7264                         kvm->arch.last_tsc_nsec = 0;
7265                         kvm->arch.last_tsc_write = 0;
7266                 }
7267
7268         }
7269         return 0;
7270 }
7271
7272 void kvm_arch_hardware_disable(void)
7273 {
7274         kvm_x86_ops->hardware_disable();
7275         drop_user_return_notifiers();
7276 }
7277
7278 int kvm_arch_hardware_setup(void)
7279 {
7280         int r;
7281
7282         r = kvm_x86_ops->hardware_setup();
7283         if (r != 0)
7284                 return r;
7285
7286         kvm_init_msr_list();
7287         return 0;
7288 }
7289
7290 void kvm_arch_hardware_unsetup(void)
7291 {
7292         kvm_x86_ops->hardware_unsetup();
7293 }
7294
7295 void kvm_arch_check_processor_compat(void *rtn)
7296 {
7297         kvm_x86_ops->check_processor_compatibility(rtn);
7298 }
7299
7300 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7301 {
7302         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7303 }
7304 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7305
7306 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7307 {
7308         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7309 }
7310
7311 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7312 {
7313         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
7314 }
7315
7316 struct static_key kvm_no_apic_vcpu __read_mostly;
7317
7318 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7319 {
7320         struct page *page;
7321         struct kvm *kvm;
7322         int r;
7323
7324         BUG_ON(vcpu->kvm == NULL);
7325         kvm = vcpu->kvm;
7326
7327         vcpu->arch.pv.pv_unhalted = false;
7328         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7329         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7330                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7331         else
7332                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7333
7334         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7335         if (!page) {
7336                 r = -ENOMEM;
7337                 goto fail;
7338         }
7339         vcpu->arch.pio_data = page_address(page);
7340
7341         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7342
7343         r = kvm_mmu_create(vcpu);
7344         if (r < 0)
7345                 goto fail_free_pio_data;
7346
7347         if (irqchip_in_kernel(kvm)) {
7348                 r = kvm_create_lapic(vcpu);
7349                 if (r < 0)
7350                         goto fail_mmu_destroy;
7351         } else
7352                 static_key_slow_inc(&kvm_no_apic_vcpu);
7353
7354         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7355                                        GFP_KERNEL);
7356         if (!vcpu->arch.mce_banks) {
7357                 r = -ENOMEM;
7358                 goto fail_free_lapic;
7359         }
7360         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7361
7362         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7363                 r = -ENOMEM;
7364                 goto fail_free_mce_banks;
7365         }
7366
7367         fx_init(vcpu);
7368
7369         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7370         vcpu->arch.pv_time_enabled = false;
7371
7372         vcpu->arch.guest_supported_xcr0 = 0;
7373         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7374
7375         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7376
7377         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7378
7379         kvm_async_pf_hash_reset(vcpu);
7380         kvm_pmu_init(vcpu);
7381
7382         return 0;
7383
7384 fail_free_mce_banks:
7385         kfree(vcpu->arch.mce_banks);
7386 fail_free_lapic:
7387         kvm_free_lapic(vcpu);
7388 fail_mmu_destroy:
7389         kvm_mmu_destroy(vcpu);
7390 fail_free_pio_data:
7391         free_page((unsigned long)vcpu->arch.pio_data);
7392 fail:
7393         return r;
7394 }
7395
7396 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7397 {
7398         int idx;
7399
7400         kvm_pmu_destroy(vcpu);
7401         kfree(vcpu->arch.mce_banks);
7402         kvm_free_lapic(vcpu);
7403         idx = srcu_read_lock(&vcpu->kvm->srcu);
7404         kvm_mmu_destroy(vcpu);
7405         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7406         free_page((unsigned long)vcpu->arch.pio_data);
7407         if (!irqchip_in_kernel(vcpu->kvm))
7408                 static_key_slow_dec(&kvm_no_apic_vcpu);
7409 }
7410
7411 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7412 {
7413         kvm_x86_ops->sched_in(vcpu, cpu);
7414 }
7415
7416 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7417 {
7418         if (type)
7419                 return -EINVAL;
7420
7421         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7422         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7423         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7424         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7425         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7426
7427         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7428         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7429         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7430         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7431                 &kvm->arch.irq_sources_bitmap);
7432
7433         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7434         mutex_init(&kvm->arch.apic_map_lock);
7435         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7436
7437         pvclock_update_vm_gtod_copy(kvm);
7438
7439         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7440         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7441
7442         return 0;
7443 }
7444
7445 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7446 {
7447         int r;
7448         r = vcpu_load(vcpu);
7449         BUG_ON(r);
7450         kvm_mmu_unload(vcpu);
7451         vcpu_put(vcpu);
7452 }
7453
7454 static void kvm_free_vcpus(struct kvm *kvm)
7455 {
7456         unsigned int i;
7457         struct kvm_vcpu *vcpu;
7458
7459         /*
7460          * Unpin any mmu pages first.
7461          */
7462         kvm_for_each_vcpu(i, vcpu, kvm) {
7463                 kvm_clear_async_pf_completion_queue(vcpu);
7464                 kvm_unload_vcpu_mmu(vcpu);
7465         }
7466         kvm_for_each_vcpu(i, vcpu, kvm)
7467                 kvm_arch_vcpu_free(vcpu);
7468
7469         mutex_lock(&kvm->lock);
7470         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7471                 kvm->vcpus[i] = NULL;
7472
7473         atomic_set(&kvm->online_vcpus, 0);
7474         mutex_unlock(&kvm->lock);
7475 }
7476
7477 void kvm_arch_sync_events(struct kvm *kvm)
7478 {
7479         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7480         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7481         kvm_free_all_assigned_devices(kvm);
7482         kvm_free_pit(kvm);
7483 }
7484
7485 int __x86_set_memory_region(struct kvm *kvm,
7486                             const struct kvm_userspace_memory_region *mem)
7487 {
7488         int i, r;
7489
7490         /* Called with kvm->slots_lock held.  */
7491         BUG_ON(mem->slot >= KVM_MEM_SLOTS_NUM);
7492
7493         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7494                 struct kvm_userspace_memory_region m = *mem;
7495
7496                 m.slot |= i << 16;
7497                 r = __kvm_set_memory_region(kvm, &m);
7498                 if (r < 0)
7499                         return r;
7500         }
7501
7502         return 0;
7503 }
7504 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7505
7506 int x86_set_memory_region(struct kvm *kvm,
7507                           const struct kvm_userspace_memory_region *mem)
7508 {
7509         int r;
7510
7511         mutex_lock(&kvm->slots_lock);
7512         r = __x86_set_memory_region(kvm, mem);
7513         mutex_unlock(&kvm->slots_lock);
7514
7515         return r;
7516 }
7517 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7518
7519 void kvm_arch_destroy_vm(struct kvm *kvm)
7520 {
7521         if (current->mm == kvm->mm) {
7522                 /*
7523                  * Free memory regions allocated on behalf of userspace,
7524                  * unless the the memory map has changed due to process exit
7525                  * or fd copying.
7526                  */
7527                 struct kvm_userspace_memory_region mem;
7528                 memset(&mem, 0, sizeof(mem));
7529                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7530                 x86_set_memory_region(kvm, &mem);
7531
7532                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7533                 x86_set_memory_region(kvm, &mem);
7534
7535                 mem.slot = TSS_PRIVATE_MEMSLOT;
7536                 x86_set_memory_region(kvm, &mem);
7537         }
7538         kvm_iommu_unmap_guest(kvm);
7539         kfree(kvm->arch.vpic);
7540         kfree(kvm->arch.vioapic);
7541         kvm_free_vcpus(kvm);
7542         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7543 }
7544
7545 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7546                            struct kvm_memory_slot *dont)
7547 {
7548         int i;
7549
7550         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7551                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7552                         kvfree(free->arch.rmap[i]);
7553                         free->arch.rmap[i] = NULL;
7554                 }
7555                 if (i == 0)
7556                         continue;
7557
7558                 if (!dont || free->arch.lpage_info[i - 1] !=
7559                              dont->arch.lpage_info[i - 1]) {
7560                         kvfree(free->arch.lpage_info[i - 1]);
7561                         free->arch.lpage_info[i - 1] = NULL;
7562                 }
7563         }
7564 }
7565
7566 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7567                             unsigned long npages)
7568 {
7569         int i;
7570
7571         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7572                 unsigned long ugfn;
7573                 int lpages;
7574                 int level = i + 1;
7575
7576                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7577                                       slot->base_gfn, level) + 1;
7578
7579                 slot->arch.rmap[i] =
7580                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7581                 if (!slot->arch.rmap[i])
7582                         goto out_free;
7583                 if (i == 0)
7584                         continue;
7585
7586                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7587                                         sizeof(*slot->arch.lpage_info[i - 1]));
7588                 if (!slot->arch.lpage_info[i - 1])
7589                         goto out_free;
7590
7591                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7592                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7593                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7594                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7595                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7596                 /*
7597                  * If the gfn and userspace address are not aligned wrt each
7598                  * other, or if explicitly asked to, disable large page
7599                  * support for this slot
7600                  */
7601                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7602                     !kvm_largepages_enabled()) {
7603                         unsigned long j;
7604
7605                         for (j = 0; j < lpages; ++j)
7606                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7607                 }
7608         }
7609
7610         return 0;
7611
7612 out_free:
7613         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7614                 kvfree(slot->arch.rmap[i]);
7615                 slot->arch.rmap[i] = NULL;
7616                 if (i == 0)
7617                         continue;
7618
7619                 kvfree(slot->arch.lpage_info[i - 1]);
7620                 slot->arch.lpage_info[i - 1] = NULL;
7621         }
7622         return -ENOMEM;
7623 }
7624
7625 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7626 {
7627         /*
7628          * memslots->generation has been incremented.
7629          * mmio generation may have reached its maximum value.
7630          */
7631         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7632 }
7633
7634 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7635                                 struct kvm_memory_slot *memslot,
7636                                 const struct kvm_userspace_memory_region *mem,
7637                                 enum kvm_mr_change change)
7638 {
7639         /*
7640          * Only private memory slots need to be mapped here since
7641          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7642          */
7643         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7644                 unsigned long userspace_addr;
7645
7646                 /*
7647                  * MAP_SHARED to prevent internal slot pages from being moved
7648                  * by fork()/COW.
7649                  */
7650                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7651                                          PROT_READ | PROT_WRITE,
7652                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7653
7654                 if (IS_ERR((void *)userspace_addr))
7655                         return PTR_ERR((void *)userspace_addr);
7656
7657                 memslot->userspace_addr = userspace_addr;
7658         }
7659
7660         return 0;
7661 }
7662
7663 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7664                                      struct kvm_memory_slot *new)
7665 {
7666         /* Still write protect RO slot */
7667         if (new->flags & KVM_MEM_READONLY) {
7668                 kvm_mmu_slot_remove_write_access(kvm, new);
7669                 return;
7670         }
7671
7672         /*
7673          * Call kvm_x86_ops dirty logging hooks when they are valid.
7674          *
7675          * kvm_x86_ops->slot_disable_log_dirty is called when:
7676          *
7677          *  - KVM_MR_CREATE with dirty logging is disabled
7678          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7679          *
7680          * The reason is, in case of PML, we need to set D-bit for any slots
7681          * with dirty logging disabled in order to eliminate unnecessary GPA
7682          * logging in PML buffer (and potential PML buffer full VMEXT). This
7683          * guarantees leaving PML enabled during guest's lifetime won't have
7684          * any additonal overhead from PML when guest is running with dirty
7685          * logging disabled for memory slots.
7686          *
7687          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7688          * to dirty logging mode.
7689          *
7690          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7691          *
7692          * In case of write protect:
7693          *
7694          * Write protect all pages for dirty logging.
7695          *
7696          * All the sptes including the large sptes which point to this
7697          * slot are set to readonly. We can not create any new large
7698          * spte on this slot until the end of the logging.
7699          *
7700          * See the comments in fast_page_fault().
7701          */
7702         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7703                 if (kvm_x86_ops->slot_enable_log_dirty)
7704                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7705                 else
7706                         kvm_mmu_slot_remove_write_access(kvm, new);
7707         } else {
7708                 if (kvm_x86_ops->slot_disable_log_dirty)
7709                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7710         }
7711 }
7712
7713 void kvm_arch_commit_memory_region(struct kvm *kvm,
7714                                 const struct kvm_userspace_memory_region *mem,
7715                                 const struct kvm_memory_slot *old,
7716                                 const struct kvm_memory_slot *new,
7717                                 enum kvm_mr_change change)
7718 {
7719         int nr_mmu_pages = 0;
7720
7721         if (change == KVM_MR_DELETE && old->id >= KVM_USER_MEM_SLOTS) {
7722                 int ret;
7723
7724                 ret = vm_munmap(old->userspace_addr,
7725                                 old->npages * PAGE_SIZE);
7726                 if (ret < 0)
7727                         printk(KERN_WARNING
7728                                "kvm_vm_ioctl_set_memory_region: "
7729                                "failed to munmap memory\n");
7730         }
7731
7732         if (!kvm->arch.n_requested_mmu_pages)
7733                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7734
7735         if (nr_mmu_pages)
7736                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7737
7738         /*
7739          * Dirty logging tracks sptes in 4k granularity, meaning that large
7740          * sptes have to be split.  If live migration is successful, the guest
7741          * in the source machine will be destroyed and large sptes will be
7742          * created in the destination. However, if the guest continues to run
7743          * in the source machine (for example if live migration fails), small
7744          * sptes will remain around and cause bad performance.
7745          *
7746          * Scan sptes if dirty logging has been stopped, dropping those
7747          * which can be collapsed into a single large-page spte.  Later
7748          * page faults will create the large-page sptes.
7749          */
7750         if ((change != KVM_MR_DELETE) &&
7751                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
7752                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
7753                 kvm_mmu_zap_collapsible_sptes(kvm, new);
7754
7755         /*
7756          * Set up write protection and/or dirty logging for the new slot.
7757          *
7758          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7759          * been zapped so no dirty logging staff is needed for old slot. For
7760          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7761          * new and it's also covered when dealing with the new slot.
7762          *
7763          * FIXME: const-ify all uses of struct kvm_memory_slot.
7764          */
7765         if (change != KVM_MR_DELETE)
7766                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
7767 }
7768
7769 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7770 {
7771         kvm_mmu_invalidate_zap_all_pages(kvm);
7772 }
7773
7774 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7775                                    struct kvm_memory_slot *slot)
7776 {
7777         kvm_mmu_invalidate_zap_all_pages(kvm);
7778 }
7779
7780 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7781 {
7782         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7783                 kvm_x86_ops->check_nested_events(vcpu, false);
7784
7785         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7786                 !vcpu->arch.apf.halted)
7787                 || !list_empty_careful(&vcpu->async_pf.done)
7788                 || kvm_apic_has_events(vcpu)
7789                 || vcpu->arch.pv.pv_unhalted
7790                 || atomic_read(&vcpu->arch.nmi_queued) ||
7791                 (kvm_arch_interrupt_allowed(vcpu) &&
7792                  kvm_cpu_has_interrupt(vcpu));
7793 }
7794
7795 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7796 {
7797         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7798 }
7799
7800 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7801 {
7802         return kvm_x86_ops->interrupt_allowed(vcpu);
7803 }
7804
7805 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
7806 {
7807         if (is_64_bit_mode(vcpu))
7808                 return kvm_rip_read(vcpu);
7809         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
7810                      kvm_rip_read(vcpu));
7811 }
7812 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
7813
7814 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7815 {
7816         return kvm_get_linear_rip(vcpu) == linear_rip;
7817 }
7818 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7819
7820 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7821 {
7822         unsigned long rflags;
7823
7824         rflags = kvm_x86_ops->get_rflags(vcpu);
7825         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7826                 rflags &= ~X86_EFLAGS_TF;
7827         return rflags;
7828 }
7829 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7830
7831 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7832 {
7833         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7834             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7835                 rflags |= X86_EFLAGS_TF;
7836         kvm_x86_ops->set_rflags(vcpu, rflags);
7837 }
7838
7839 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7840 {
7841         __kvm_set_rflags(vcpu, rflags);
7842         kvm_make_request(KVM_REQ_EVENT, vcpu);
7843 }
7844 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7845
7846 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7847 {
7848         int r;
7849
7850         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7851               work->wakeup_all)
7852                 return;
7853
7854         r = kvm_mmu_reload(vcpu);
7855         if (unlikely(r))
7856                 return;
7857
7858         if (!vcpu->arch.mmu.direct_map &&
7859               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7860                 return;
7861
7862         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7863 }
7864
7865 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7866 {
7867         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7868 }
7869
7870 static inline u32 kvm_async_pf_next_probe(u32 key)
7871 {
7872         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7873 }
7874
7875 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7876 {
7877         u32 key = kvm_async_pf_hash_fn(gfn);
7878
7879         while (vcpu->arch.apf.gfns[key] != ~0)
7880                 key = kvm_async_pf_next_probe(key);
7881
7882         vcpu->arch.apf.gfns[key] = gfn;
7883 }
7884
7885 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7886 {
7887         int i;
7888         u32 key = kvm_async_pf_hash_fn(gfn);
7889
7890         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7891                      (vcpu->arch.apf.gfns[key] != gfn &&
7892                       vcpu->arch.apf.gfns[key] != ~0); i++)
7893                 key = kvm_async_pf_next_probe(key);
7894
7895         return key;
7896 }
7897
7898 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7899 {
7900         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7901 }
7902
7903 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7904 {
7905         u32 i, j, k;
7906
7907         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7908         while (true) {
7909                 vcpu->arch.apf.gfns[i] = ~0;
7910                 do {
7911                         j = kvm_async_pf_next_probe(j);
7912                         if (vcpu->arch.apf.gfns[j] == ~0)
7913                                 return;
7914                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7915                         /*
7916                          * k lies cyclically in ]i,j]
7917                          * |    i.k.j |
7918                          * |....j i.k.| or  |.k..j i...|
7919                          */
7920                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7921                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7922                 i = j;
7923         }
7924 }
7925
7926 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7927 {
7928
7929         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7930                                       sizeof(val));
7931 }
7932
7933 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7934                                      struct kvm_async_pf *work)
7935 {
7936         struct x86_exception fault;
7937
7938         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7939         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7940
7941         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7942             (vcpu->arch.apf.send_user_only &&
7943              kvm_x86_ops->get_cpl(vcpu) == 0))
7944                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7945         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7946                 fault.vector = PF_VECTOR;
7947                 fault.error_code_valid = true;
7948                 fault.error_code = 0;
7949                 fault.nested_page_fault = false;
7950                 fault.address = work->arch.token;
7951                 kvm_inject_page_fault(vcpu, &fault);
7952         }
7953 }
7954
7955 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7956                                  struct kvm_async_pf *work)
7957 {
7958         struct x86_exception fault;
7959
7960         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7961         if (work->wakeup_all)
7962                 work->arch.token = ~0; /* broadcast wakeup */
7963         else
7964                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7965
7966         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7967             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7968                 fault.vector = PF_VECTOR;
7969                 fault.error_code_valid = true;
7970                 fault.error_code = 0;
7971                 fault.nested_page_fault = false;
7972                 fault.address = work->arch.token;
7973                 kvm_inject_page_fault(vcpu, &fault);
7974         }
7975         vcpu->arch.apf.halted = false;
7976         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7977 }
7978
7979 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7980 {
7981         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7982                 return true;
7983         else
7984                 return !kvm_event_needs_reinjection(vcpu) &&
7985                         kvm_x86_ops->interrupt_allowed(vcpu);
7986 }
7987
7988 void kvm_arch_start_assignment(struct kvm *kvm)
7989 {
7990         atomic_inc(&kvm->arch.assigned_device_count);
7991 }
7992 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
7993
7994 void kvm_arch_end_assignment(struct kvm *kvm)
7995 {
7996         atomic_dec(&kvm->arch.assigned_device_count);
7997 }
7998 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
7999
8000 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8001 {
8002         return atomic_read(&kvm->arch.assigned_device_count);
8003 }
8004 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8005
8006 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8007 {
8008         atomic_inc(&kvm->arch.noncoherent_dma_count);
8009 }
8010 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8011
8012 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8013 {
8014         atomic_dec(&kvm->arch.noncoherent_dma_count);
8015 }
8016 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8017
8018 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8019 {
8020         return atomic_read(&kvm->arch.noncoherent_dma_count);
8021 }
8022 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8023
8024 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8025 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8026 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8027 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8028 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8029 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8030 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8031 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8032 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8033 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8034 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8035 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8036 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8037 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8038 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);