2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
10 #include <linux/interrupt.h>
11 #include <linux/seq_file.h>
12 #include <linux/debugfs.h>
13 #include <linux/pfn.h>
14 #include <linux/percpu.h>
15 #include <linux/gfp.h>
16 #include <linux/pci.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <asm/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
29 * The current flushing context - we pass it instead of 5 arguments:
39 unsigned force_split : 1;
45 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
46 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
47 * entries change the page attribute in parallel to some other cpu
48 * splitting a large page entry along with changing the attribute.
50 static DEFINE_SPINLOCK(cpa_lock);
52 #define CPA_FLUSHTLB 1
54 #define CPA_PAGES_ARRAY 4
57 static unsigned long direct_pages_count[PG_LEVEL_NUM];
59 void update_page_count(int level, unsigned long pages)
61 /* Protect against CPA */
63 direct_pages_count[level] += pages;
64 spin_unlock(&pgd_lock);
67 static void split_page_count(int level)
69 direct_pages_count[level]--;
70 direct_pages_count[level - 1] += PTRS_PER_PTE;
73 void arch_report_meminfo(struct seq_file *m)
75 seq_printf(m, "DirectMap4k: %8lu kB\n",
76 direct_pages_count[PG_LEVEL_4K] << 2);
77 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
78 seq_printf(m, "DirectMap2M: %8lu kB\n",
79 direct_pages_count[PG_LEVEL_2M] << 11);
81 seq_printf(m, "DirectMap4M: %8lu kB\n",
82 direct_pages_count[PG_LEVEL_2M] << 12);
86 seq_printf(m, "DirectMap1G: %8lu kB\n",
87 direct_pages_count[PG_LEVEL_1G] << 20);
91 static inline void split_page_count(int level) { }
96 static inline unsigned long highmap_start_pfn(void)
98 return __pa_symbol(_text) >> PAGE_SHIFT;
101 static inline unsigned long highmap_end_pfn(void)
103 return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
108 #ifdef CONFIG_DEBUG_PAGEALLOC
109 # define debug_pagealloc 1
111 # define debug_pagealloc 0
115 within(unsigned long addr, unsigned long start, unsigned long end)
117 return addr >= start && addr < end;
125 * clflush_cache_range - flush a cache range with clflush
126 * @vaddr: virtual start address
127 * @size: number of bytes to flush
129 * clflush is an unordered instruction which needs fencing with mfence
130 * to avoid ordering issues.
132 void clflush_cache_range(void *vaddr, unsigned int size)
134 void *vend = vaddr + size - 1;
138 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
141 * Flush any possible final partial cacheline:
147 EXPORT_SYMBOL_GPL(clflush_cache_range);
149 static void __cpa_flush_all(void *arg)
151 unsigned long cache = (unsigned long)arg;
154 * Flush all to work around Errata in early athlons regarding
155 * large page flushing.
159 if (cache && boot_cpu_data.x86 >= 4)
163 static void cpa_flush_all(unsigned long cache)
165 BUG_ON(irqs_disabled());
167 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
170 static void __cpa_flush_range(void *arg)
173 * We could optimize that further and do individual per page
174 * tlb invalidates for a low number of pages. Caveat: we must
175 * flush the high aliases on 64bit as well.
180 static void cpa_flush_range(unsigned long start, int numpages, int cache)
182 unsigned int i, level;
185 BUG_ON(irqs_disabled());
186 WARN_ON(PAGE_ALIGN(start) != start);
188 on_each_cpu(__cpa_flush_range, NULL, 1);
194 * We only need to flush on one CPU,
195 * clflush is a MESI-coherent instruction that
196 * will cause all other CPUs to flush the same
199 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
200 pte_t *pte = lookup_address(addr, &level);
203 * Only flush present addresses:
205 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
206 clflush_cache_range((void *) addr, PAGE_SIZE);
210 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
211 int in_flags, struct page **pages)
213 unsigned int i, level;
214 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
216 BUG_ON(irqs_disabled());
218 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
220 if (!cache || do_wbinvd)
224 * We only need to flush on one CPU,
225 * clflush is a MESI-coherent instruction that
226 * will cause all other CPUs to flush the same
229 for (i = 0; i < numpages; i++) {
233 if (in_flags & CPA_PAGES_ARRAY)
234 addr = (unsigned long)page_address(pages[i]);
238 pte = lookup_address(addr, &level);
241 * Only flush present addresses:
243 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
244 clflush_cache_range((void *)addr, PAGE_SIZE);
249 * Certain areas of memory on x86 require very specific protection flags,
250 * for example the BIOS area or kernel text. Callers don't always get this
251 * right (again, ioremap() on BIOS memory is not uncommon) so this function
252 * checks and fixes these known static required protection bits.
254 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
257 pgprot_t forbidden = __pgprot(0);
260 * The BIOS area between 640k and 1Mb needs to be executable for
261 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
263 #ifdef CONFIG_PCI_BIOS
264 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
265 pgprot_val(forbidden) |= _PAGE_NX;
269 * The kernel text needs to be executable for obvious reasons
270 * Does not cover __inittext since that is gone later on. On
271 * 64bit we do not enforce !NX on the low mapping
273 if (within(address, (unsigned long)_text, (unsigned long)_etext))
274 pgprot_val(forbidden) |= _PAGE_NX;
277 * The .rodata section needs to be read-only. Using the pfn
278 * catches all aliases.
280 if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
281 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
282 pgprot_val(forbidden) |= _PAGE_RW;
284 #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
286 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
287 * kernel text mappings for the large page aligned text, rodata sections
288 * will be always read-only. For the kernel identity mappings covering
289 * the holes caused by this alignment can be anything that user asks.
291 * This will preserve the large page mappings for kernel text/data
294 if (kernel_set_to_readonly &&
295 within(address, (unsigned long)_text,
296 (unsigned long)__end_rodata_hpage_align)) {
300 * Don't enforce the !RW mapping for the kernel text mapping,
301 * if the current mapping is already using small page mapping.
302 * No need to work hard to preserve large page mappings in this
305 * This also fixes the Linux Xen paravirt guest boot failure
306 * (because of unexpected read-only mappings for kernel identity
307 * mappings). In this paravirt guest case, the kernel text
308 * mapping and the kernel identity mapping share the same
309 * page-table pages. Thus we can't really use different
310 * protections for the kernel text and identity mappings. Also,
311 * these shared mappings are made of small page mappings.
312 * Thus this don't enforce !RW mapping for small page kernel
313 * text mapping logic will help Linux Xen parvirt guest boot
316 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
317 pgprot_val(forbidden) |= _PAGE_RW;
321 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
326 static pte_t *__lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
332 *level = PG_LEVEL_NONE;
337 pud = pud_offset(pgd, address);
341 *level = PG_LEVEL_1G;
342 if (pud_large(*pud) || !pud_present(*pud))
345 pmd = pmd_offset(pud, address);
349 *level = PG_LEVEL_2M;
350 if (pmd_large(*pmd) || !pmd_present(*pmd))
353 *level = PG_LEVEL_4K;
355 return pte_offset_kernel(pmd, address);
359 * Lookup the page table entry for a virtual address. Return a pointer
360 * to the entry and the level of the mapping.
362 * Note: We return pud and pmd either when the entry is marked large
363 * or when the present bit is not set. Otherwise we would return a
364 * pointer to a nonexisting mapping.
366 pte_t *lookup_address(unsigned long address, unsigned int *level)
368 return __lookup_address_in_pgd(pgd_offset_k(address), address, level);
370 EXPORT_SYMBOL_GPL(lookup_address);
372 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
376 return __lookup_address_in_pgd(cpa->pgd + pgd_index(address),
379 return lookup_address(address, level);
383 * This is necessary because __pa() does not work on some
384 * kinds of memory, like vmalloc() or the alloc_remap()
385 * areas on 32-bit NUMA systems. The percpu areas can
386 * end up in this kind of memory, for instance.
388 * This could be optimized, but it is only intended to be
389 * used at inititalization time, and keeping it
390 * unoptimized should increase the testing coverage for
391 * the more obscure platforms.
393 phys_addr_t slow_virt_to_phys(void *__virt_addr)
395 unsigned long virt_addr = (unsigned long)__virt_addr;
396 phys_addr_t phys_addr;
397 unsigned long offset;
403 pte = lookup_address(virt_addr, &level);
405 psize = page_level_size(level);
406 pmask = page_level_mask(level);
407 offset = virt_addr & ~pmask;
408 phys_addr = pte_pfn(*pte) << PAGE_SHIFT;
409 return (phys_addr | offset);
411 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
414 * Set the new pmd in all the pgds we know about:
416 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
419 set_pte_atomic(kpte, pte);
421 if (!SHARED_KERNEL_PMD) {
424 list_for_each_entry(page, &pgd_list, lru) {
429 pgd = (pgd_t *)page_address(page) + pgd_index(address);
430 pud = pud_offset(pgd, address);
431 pmd = pmd_offset(pud, address);
432 set_pte_atomic((pte_t *)pmd, pte);
439 try_preserve_large_page(pte_t *kpte, unsigned long address,
440 struct cpa_data *cpa)
442 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn;
443 pte_t new_pte, old_pte, *tmp;
444 pgprot_t old_prot, new_prot, req_prot;
448 if (cpa->force_split)
451 spin_lock(&pgd_lock);
453 * Check for races, another CPU might have split this page
456 tmp = lookup_address(address, &level);
465 psize = page_level_size(level);
466 pmask = page_level_mask(level);
474 * Calculate the number of pages, which fit into this large
475 * page starting at address:
477 nextpage_addr = (address + psize) & pmask;
478 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
479 if (numpages < cpa->numpages)
480 cpa->numpages = numpages;
483 * We are safe now. Check whether the new pgprot is the same:
486 old_prot = req_prot = pte_pgprot(old_pte);
488 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
489 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
492 * Set the PSE and GLOBAL flags only if the PRESENT flag is
493 * set otherwise pmd_present/pmd_huge will return true even on
494 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
495 * for the ancient hardware that doesn't support it.
497 if (pgprot_val(req_prot) & _PAGE_PRESENT)
498 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
500 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
502 req_prot = canon_pgprot(req_prot);
505 * old_pte points to the large page base address. So we need
506 * to add the offset of the virtual address:
508 pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
511 new_prot = static_protections(req_prot, address, pfn);
514 * We need to check the full range, whether
515 * static_protection() requires a different pgprot for one of
516 * the pages in the range we try to preserve:
518 addr = address & pmask;
519 pfn = pte_pfn(old_pte);
520 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
521 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
523 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
528 * If there are no changes, return. maxpages has been updated
531 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
537 * We need to change the attributes. Check, whether we can
538 * change the large page in one go. We request a split, when
539 * the address is not aligned and the number of pages is
540 * smaller than the number of pages in the large page. Note
541 * that we limited the number of possible pages already to
542 * the number of pages in the large page.
544 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
546 * The address is aligned and the number of pages
547 * covers the full page.
549 new_pte = pfn_pte(pte_pfn(old_pte), new_prot);
550 __set_pmd_pte(kpte, address, new_pte);
551 cpa->flags |= CPA_FLUSHTLB;
556 spin_unlock(&pgd_lock);
562 __split_large_page(pte_t *kpte, unsigned long address, struct page *base)
564 pte_t *pbase = (pte_t *)page_address(base);
565 unsigned long pfn, pfninc = 1;
566 unsigned int i, level;
570 spin_lock(&pgd_lock);
572 * Check for races, another CPU might have split this page
575 tmp = lookup_address(address, &level);
577 spin_unlock(&pgd_lock);
581 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
582 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
584 * If we ever want to utilize the PAT bit, we need to
585 * update this function to make sure it's converted from
586 * bit 12 to bit 7 when we cross from the 2MB level to
589 WARN_ON_ONCE(pgprot_val(ref_prot) & _PAGE_PAT_LARGE);
592 if (level == PG_LEVEL_1G) {
593 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
595 * Set the PSE flags only if the PRESENT flag is set
596 * otherwise pmd_present/pmd_huge will return true
597 * even on a non present pmd.
599 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
600 pgprot_val(ref_prot) |= _PAGE_PSE;
602 pgprot_val(ref_prot) &= ~_PAGE_PSE;
607 * Set the GLOBAL flags only if the PRESENT flag is set
608 * otherwise pmd/pte_present will return true even on a non
609 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
610 * for the ancient hardware that doesn't support it.
612 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
613 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
615 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
618 * Get the target pfn from the original entry:
620 pfn = pte_pfn(*kpte);
621 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
622 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
624 if (pfn_range_is_mapped(PFN_DOWN(__pa(address)),
625 PFN_DOWN(__pa(address)) + 1))
626 split_page_count(level);
629 * Install the new, split up pagetable.
631 * We use the standard kernel pagetable protections for the new
632 * pagetable protections, the actual ptes set above control the
633 * primary protection behavior:
635 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
638 * Intel Atom errata AAH41 workaround.
640 * The real fix should be in hw or in a microcode update, but
641 * we also probabilistically try to reduce the window of having
642 * a large TLB mixed with 4K TLBs while instruction fetches are
646 spin_unlock(&pgd_lock);
651 static int split_large_page(pte_t *kpte, unsigned long address)
655 if (!debug_pagealloc)
656 spin_unlock(&cpa_lock);
657 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
658 if (!debug_pagealloc)
659 spin_lock(&cpa_lock);
663 if (__split_large_page(kpte, address, base))
669 #define unmap_pmd_range(pud, start, pre_end) do {} while (0)
671 static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
673 pud_t *pud = pud_offset(pgd, start);
676 * Not on a GB page boundary?
678 if (start & (PUD_SIZE - 1)) {
679 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
680 unsigned long pre_end = min_t(unsigned long, end, next_page);
682 unmap_pmd_range(pud, start, pre_end);
689 * Try to unmap in 1G chunks?
691 while (end - start >= PUD_SIZE) {
696 unmap_pmd_range(pud, start, start + PUD_SIZE);
706 unmap_pmd_range(pud, start, end);
709 * No need to try to free the PUD page because we'll free it in
710 * populate_pgd's error path
714 static int alloc_pte_page(pmd_t *pmd)
716 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
720 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
724 static int alloc_pmd_page(pud_t *pud)
726 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
730 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
734 static void populate_pte(struct cpa_data *cpa,
735 unsigned long start, unsigned long end,
736 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
740 pte = pte_offset_kernel(pmd, start);
742 while (num_pages-- && start < end) {
744 /* deal with the NX bit */
745 if (!(pgprot_val(pgprot) & _PAGE_NX))
746 cpa->pfn &= ~_PAGE_NX;
748 set_pte(pte, pfn_pte(cpa->pfn >> PAGE_SHIFT, pgprot));
751 cpa->pfn += PAGE_SIZE;
756 static int populate_pmd(struct cpa_data *cpa,
757 unsigned long start, unsigned long end,
758 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
760 unsigned int cur_pages = 0;
764 * Not on a 2M boundary?
766 if (start & (PMD_SIZE - 1)) {
767 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
768 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
770 pre_end = min_t(unsigned long, pre_end, next_page);
771 cur_pages = (pre_end - start) >> PAGE_SHIFT;
772 cur_pages = min_t(unsigned int, num_pages, cur_pages);
777 pmd = pmd_offset(pud, start);
779 if (alloc_pte_page(pmd))
782 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
788 * We mapped them all?
790 if (num_pages == cur_pages)
793 while (end - start >= PMD_SIZE) {
796 * We cannot use a 1G page so allocate a PMD page if needed.
799 if (alloc_pmd_page(pud))
802 pmd = pmd_offset(pud, start);
804 set_pmd(pmd, __pmd(cpa->pfn | _PAGE_PSE | massage_pgprot(pgprot)));
807 cpa->pfn += PMD_SIZE;
808 cur_pages += PMD_SIZE >> PAGE_SHIFT;
812 * Map trailing 4K pages.
815 pmd = pmd_offset(pud, start);
817 if (alloc_pte_page(pmd))
820 populate_pte(cpa, start, end, num_pages - cur_pages,
826 static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
833 end = start + (cpa->numpages << PAGE_SHIFT);
836 * Not on a Gb page boundary? => map everything up to it with
839 if (start & (PUD_SIZE - 1)) {
840 unsigned long pre_end;
841 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
843 pre_end = min_t(unsigned long, end, next_page);
844 cur_pages = (pre_end - start) >> PAGE_SHIFT;
845 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
847 pud = pud_offset(pgd, start);
853 if (alloc_pmd_page(pud))
856 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
864 /* We mapped them all? */
865 if (cpa->numpages == cur_pages)
868 pud = pud_offset(pgd, start);
871 * Map everything starting from the Gb boundary, possibly with 1G pages
873 while (end - start >= PUD_SIZE) {
874 set_pud(pud, __pud(cpa->pfn | _PAGE_PSE | massage_pgprot(pgprot)));
877 cpa->pfn += PUD_SIZE;
878 cur_pages += PUD_SIZE >> PAGE_SHIFT;
882 /* Map trailing leftover */
886 pud = pud_offset(pgd, start);
888 if (alloc_pmd_page(pud))
891 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
902 * Restrictions for kernel page table do not necessarily apply when mapping in
905 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
907 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
908 bool allocd_pgd = false;
910 pud_t *pud = NULL; /* shut up gcc */
913 pgd_entry = cpa->pgd + pgd_index(addr);
916 * Allocate a PUD page and hand it down for mapping.
918 if (pgd_none(*pgd_entry)) {
919 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
923 set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
927 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
928 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
930 ret = populate_pud(cpa, addr, pgd_entry, pgprot);
932 unmap_pud_range(pgd_entry, addr,
933 addr + (cpa->numpages << PAGE_SHIFT));
937 * If I allocated this PUD page, I can just as well
938 * free it in this error path.
940 pgd_clear(pgd_entry);
941 free_page((unsigned long)pud);
949 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
953 * Ignore all non primary paths.
959 * Ignore the NULL PTE for kernel identity mapping, as it is expected
961 * Also set numpages to '1' indicating that we processed cpa req for
962 * one virtual address page and its pfn. TBD: numpages can be set based
963 * on the initial value and the level returned by lookup_address().
965 if (within(vaddr, PAGE_OFFSET,
966 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
968 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
971 WARN(1, KERN_WARNING "CPA: called for zero pte. "
972 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
979 static int __change_page_attr(struct cpa_data *cpa, int primary)
981 unsigned long address;
984 pte_t *kpte, old_pte;
986 if (cpa->flags & CPA_PAGES_ARRAY) {
987 struct page *page = cpa->pages[cpa->curpage];
988 if (unlikely(PageHighMem(page)))
990 address = (unsigned long)page_address(page);
991 } else if (cpa->flags & CPA_ARRAY)
992 address = cpa->vaddr[cpa->curpage];
994 address = *cpa->vaddr;
996 kpte = lookup_address(address, &level);
998 return __cpa_process_fault(cpa, address, primary);
1001 if (!pte_val(old_pte))
1002 return __cpa_process_fault(cpa, address, primary);
1004 if (level == PG_LEVEL_4K) {
1006 pgprot_t new_prot = pte_pgprot(old_pte);
1007 unsigned long pfn = pte_pfn(old_pte);
1009 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1010 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1012 new_prot = static_protections(new_prot, address, pfn);
1015 * Set the GLOBAL flags only if the PRESENT flag is
1016 * set otherwise pte_present will return true even on
1017 * a non present pte. The canon_pgprot will clear
1018 * _PAGE_GLOBAL for the ancient hardware that doesn't
1021 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1022 pgprot_val(new_prot) |= _PAGE_GLOBAL;
1024 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1027 * We need to keep the pfn from the existing PTE,
1028 * after all we're only going to change it's attributes
1029 * not the memory it points to
1031 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1034 * Do we really change anything ?
1036 if (pte_val(old_pte) != pte_val(new_pte)) {
1037 set_pte_atomic(kpte, new_pte);
1038 cpa->flags |= CPA_FLUSHTLB;
1045 * Check, whether we can keep the large page intact
1046 * and just change the pte:
1048 do_split = try_preserve_large_page(kpte, address, cpa);
1050 * When the range fits into the existing large page,
1051 * return. cp->numpages and cpa->tlbflush have been updated in
1058 * We have to split the large page:
1060 err = split_large_page(kpte, address);
1063 * Do a global flush tlb after splitting the large page
1064 * and before we do the actual change page attribute in the PTE.
1066 * With out this, we violate the TLB application note, that says
1067 * "The TLBs may contain both ordinary and large-page
1068 * translations for a 4-KByte range of linear addresses. This
1069 * may occur if software modifies the paging structures so that
1070 * the page size used for the address range changes. If the two
1071 * translations differ with respect to page frame or attributes
1072 * (e.g., permissions), processor behavior is undefined and may
1073 * be implementation-specific."
1075 * We do this global tlb flush inside the cpa_lock, so that we
1076 * don't allow any other cpu, with stale tlb entries change the
1077 * page attribute in parallel, that also falls into the
1078 * just split large page entry.
1087 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1089 static int cpa_process_alias(struct cpa_data *cpa)
1091 struct cpa_data alias_cpa;
1092 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1093 unsigned long vaddr;
1096 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1100 * No need to redo, when the primary call touched the direct
1103 if (cpa->flags & CPA_PAGES_ARRAY) {
1104 struct page *page = cpa->pages[cpa->curpage];
1105 if (unlikely(PageHighMem(page)))
1107 vaddr = (unsigned long)page_address(page);
1108 } else if (cpa->flags & CPA_ARRAY)
1109 vaddr = cpa->vaddr[cpa->curpage];
1111 vaddr = *cpa->vaddr;
1113 if (!(within(vaddr, PAGE_OFFSET,
1114 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1117 alias_cpa.vaddr = &laddr;
1118 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1120 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1125 #ifdef CONFIG_X86_64
1127 * If the primary call didn't touch the high mapping already
1128 * and the physical address is inside the kernel map, we need
1129 * to touch the high mapped kernel as well:
1131 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1132 within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
1133 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1134 __START_KERNEL_map - phys_base;
1136 alias_cpa.vaddr = &temp_cpa_vaddr;
1137 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1140 * The high mapping range is imprecise, so ignore the
1143 __change_page_attr_set_clr(&alias_cpa, 0);
1150 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1152 int ret, numpages = cpa->numpages;
1156 * Store the remaining nr of pages for the large page
1157 * preservation check.
1159 cpa->numpages = numpages;
1160 /* for array changes, we can't use large page */
1161 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1164 if (!debug_pagealloc)
1165 spin_lock(&cpa_lock);
1166 ret = __change_page_attr(cpa, checkalias);
1167 if (!debug_pagealloc)
1168 spin_unlock(&cpa_lock);
1173 ret = cpa_process_alias(cpa);
1179 * Adjust the number of pages with the result of the
1180 * CPA operation. Either a large page has been
1181 * preserved or a single page update happened.
1183 BUG_ON(cpa->numpages > numpages);
1184 numpages -= cpa->numpages;
1185 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1188 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1194 static inline int cache_attr(pgprot_t attr)
1196 return pgprot_val(attr) &
1197 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
1200 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1201 pgprot_t mask_set, pgprot_t mask_clr,
1202 int force_split, int in_flag,
1203 struct page **pages)
1205 struct cpa_data cpa;
1206 int ret, cache, checkalias;
1207 unsigned long baddr = 0;
1210 * Check, if we are requested to change a not supported
1213 mask_set = canon_pgprot(mask_set);
1214 mask_clr = canon_pgprot(mask_clr);
1215 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1218 /* Ensure we are PAGE_SIZE aligned */
1219 if (in_flag & CPA_ARRAY) {
1221 for (i = 0; i < numpages; i++) {
1222 if (addr[i] & ~PAGE_MASK) {
1223 addr[i] &= PAGE_MASK;
1227 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1229 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1230 * No need to cehck in that case
1232 if (*addr & ~PAGE_MASK) {
1235 * People should not be passing in unaligned addresses:
1240 * Save address for cache flush. *addr is modified in the call
1241 * to __change_page_attr_set_clr() below.
1246 /* Must avoid aliasing mappings in the highmem code */
1247 kmap_flush_unused();
1253 cpa.numpages = numpages;
1254 cpa.mask_set = mask_set;
1255 cpa.mask_clr = mask_clr;
1258 cpa.force_split = force_split;
1260 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1261 cpa.flags |= in_flag;
1263 /* No alias checking for _NX bit modifications */
1264 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1266 ret = __change_page_attr_set_clr(&cpa, checkalias);
1269 * Check whether we really changed something:
1271 if (!(cpa.flags & CPA_FLUSHTLB))
1275 * No need to flush, when we did not set any of the caching
1278 cache = cache_attr(mask_set);
1281 * On success we use clflush, when the CPU supports it to
1282 * avoid the wbindv. If the CPU does not support it and in the
1283 * error case we fall back to cpa_flush_all (which uses
1286 if (!ret && cpu_has_clflush) {
1287 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1288 cpa_flush_array(addr, numpages, cache,
1291 cpa_flush_range(baddr, numpages, cache);
1293 cpa_flush_all(cache);
1299 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1300 pgprot_t mask, int array)
1302 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1303 (array ? CPA_ARRAY : 0), NULL);
1306 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1307 pgprot_t mask, int array)
1309 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1310 (array ? CPA_ARRAY : 0), NULL);
1313 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1316 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1317 CPA_PAGES_ARRAY, pages);
1320 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1323 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1324 CPA_PAGES_ARRAY, pages);
1327 int _set_memory_uc(unsigned long addr, int numpages)
1330 * for now UC MINUS. see comments in ioremap_nocache()
1332 return change_page_attr_set(&addr, numpages,
1333 __pgprot(_PAGE_CACHE_UC_MINUS), 0);
1336 int set_memory_uc(unsigned long addr, int numpages)
1341 * for now UC MINUS. see comments in ioremap_nocache()
1343 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1344 _PAGE_CACHE_UC_MINUS, NULL);
1348 ret = _set_memory_uc(addr, numpages);
1355 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1359 EXPORT_SYMBOL(set_memory_uc);
1361 static int _set_memory_array(unsigned long *addr, int addrinarray,
1362 unsigned long new_type)
1368 * for now UC MINUS. see comments in ioremap_nocache()
1370 for (i = 0; i < addrinarray; i++) {
1371 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1377 ret = change_page_attr_set(addr, addrinarray,
1378 __pgprot(_PAGE_CACHE_UC_MINUS), 1);
1380 if (!ret && new_type == _PAGE_CACHE_WC)
1381 ret = change_page_attr_set_clr(addr, addrinarray,
1382 __pgprot(_PAGE_CACHE_WC),
1383 __pgprot(_PAGE_CACHE_MASK),
1384 0, CPA_ARRAY, NULL);
1391 for (j = 0; j < i; j++)
1392 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1397 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1399 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_UC_MINUS);
1401 EXPORT_SYMBOL(set_memory_array_uc);
1403 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1405 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_WC);
1407 EXPORT_SYMBOL(set_memory_array_wc);
1409 int _set_memory_wc(unsigned long addr, int numpages)
1412 unsigned long addr_copy = addr;
1414 ret = change_page_attr_set(&addr, numpages,
1415 __pgprot(_PAGE_CACHE_UC_MINUS), 0);
1417 ret = change_page_attr_set_clr(&addr_copy, numpages,
1418 __pgprot(_PAGE_CACHE_WC),
1419 __pgprot(_PAGE_CACHE_MASK),
1425 int set_memory_wc(unsigned long addr, int numpages)
1430 return set_memory_uc(addr, numpages);
1432 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1433 _PAGE_CACHE_WC, NULL);
1437 ret = _set_memory_wc(addr, numpages);
1444 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1448 EXPORT_SYMBOL(set_memory_wc);
1450 int _set_memory_wb(unsigned long addr, int numpages)
1452 return change_page_attr_clear(&addr, numpages,
1453 __pgprot(_PAGE_CACHE_MASK), 0);
1456 int set_memory_wb(unsigned long addr, int numpages)
1460 ret = _set_memory_wb(addr, numpages);
1464 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1467 EXPORT_SYMBOL(set_memory_wb);
1469 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1474 ret = change_page_attr_clear(addr, addrinarray,
1475 __pgprot(_PAGE_CACHE_MASK), 1);
1479 for (i = 0; i < addrinarray; i++)
1480 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1484 EXPORT_SYMBOL(set_memory_array_wb);
1486 int set_memory_x(unsigned long addr, int numpages)
1488 if (!(__supported_pte_mask & _PAGE_NX))
1491 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1493 EXPORT_SYMBOL(set_memory_x);
1495 int set_memory_nx(unsigned long addr, int numpages)
1497 if (!(__supported_pte_mask & _PAGE_NX))
1500 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1502 EXPORT_SYMBOL(set_memory_nx);
1504 int set_memory_ro(unsigned long addr, int numpages)
1506 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1508 EXPORT_SYMBOL_GPL(set_memory_ro);
1510 int set_memory_rw(unsigned long addr, int numpages)
1512 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1514 EXPORT_SYMBOL_GPL(set_memory_rw);
1516 int set_memory_np(unsigned long addr, int numpages)
1518 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1521 int set_memory_4k(unsigned long addr, int numpages)
1523 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1524 __pgprot(0), 1, 0, NULL);
1527 int set_pages_uc(struct page *page, int numpages)
1529 unsigned long addr = (unsigned long)page_address(page);
1531 return set_memory_uc(addr, numpages);
1533 EXPORT_SYMBOL(set_pages_uc);
1535 static int _set_pages_array(struct page **pages, int addrinarray,
1536 unsigned long new_type)
1538 unsigned long start;
1544 for (i = 0; i < addrinarray; i++) {
1545 if (PageHighMem(pages[i]))
1547 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1548 end = start + PAGE_SIZE;
1549 if (reserve_memtype(start, end, new_type, NULL))
1553 ret = cpa_set_pages_array(pages, addrinarray,
1554 __pgprot(_PAGE_CACHE_UC_MINUS));
1555 if (!ret && new_type == _PAGE_CACHE_WC)
1556 ret = change_page_attr_set_clr(NULL, addrinarray,
1557 __pgprot(_PAGE_CACHE_WC),
1558 __pgprot(_PAGE_CACHE_MASK),
1559 0, CPA_PAGES_ARRAY, pages);
1562 return 0; /* Success */
1565 for (i = 0; i < free_idx; i++) {
1566 if (PageHighMem(pages[i]))
1568 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1569 end = start + PAGE_SIZE;
1570 free_memtype(start, end);
1575 int set_pages_array_uc(struct page **pages, int addrinarray)
1577 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_UC_MINUS);
1579 EXPORT_SYMBOL(set_pages_array_uc);
1581 int set_pages_array_wc(struct page **pages, int addrinarray)
1583 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_WC);
1585 EXPORT_SYMBOL(set_pages_array_wc);
1587 int set_pages_wb(struct page *page, int numpages)
1589 unsigned long addr = (unsigned long)page_address(page);
1591 return set_memory_wb(addr, numpages);
1593 EXPORT_SYMBOL(set_pages_wb);
1595 int set_pages_array_wb(struct page **pages, int addrinarray)
1598 unsigned long start;
1602 retval = cpa_clear_pages_array(pages, addrinarray,
1603 __pgprot(_PAGE_CACHE_MASK));
1607 for (i = 0; i < addrinarray; i++) {
1608 if (PageHighMem(pages[i]))
1610 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1611 end = start + PAGE_SIZE;
1612 free_memtype(start, end);
1617 EXPORT_SYMBOL(set_pages_array_wb);
1619 int set_pages_x(struct page *page, int numpages)
1621 unsigned long addr = (unsigned long)page_address(page);
1623 return set_memory_x(addr, numpages);
1625 EXPORT_SYMBOL(set_pages_x);
1627 int set_pages_nx(struct page *page, int numpages)
1629 unsigned long addr = (unsigned long)page_address(page);
1631 return set_memory_nx(addr, numpages);
1633 EXPORT_SYMBOL(set_pages_nx);
1635 int set_pages_ro(struct page *page, int numpages)
1637 unsigned long addr = (unsigned long)page_address(page);
1639 return set_memory_ro(addr, numpages);
1642 int set_pages_rw(struct page *page, int numpages)
1644 unsigned long addr = (unsigned long)page_address(page);
1646 return set_memory_rw(addr, numpages);
1649 #ifdef CONFIG_DEBUG_PAGEALLOC
1651 static int __set_pages_p(struct page *page, int numpages)
1653 unsigned long tempaddr = (unsigned long) page_address(page);
1654 struct cpa_data cpa = { .vaddr = &tempaddr,
1655 .numpages = numpages,
1656 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1657 .mask_clr = __pgprot(0),
1661 * No alias checking needed for setting present flag. otherwise,
1662 * we may need to break large pages for 64-bit kernel text
1663 * mappings (this adds to complexity if we want to do this from
1664 * atomic context especially). Let's keep it simple!
1666 return __change_page_attr_set_clr(&cpa, 0);
1669 static int __set_pages_np(struct page *page, int numpages)
1671 unsigned long tempaddr = (unsigned long) page_address(page);
1672 struct cpa_data cpa = { .vaddr = &tempaddr,
1673 .numpages = numpages,
1674 .mask_set = __pgprot(0),
1675 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1679 * No alias checking needed for setting not present flag. otherwise,
1680 * we may need to break large pages for 64-bit kernel text
1681 * mappings (this adds to complexity if we want to do this from
1682 * atomic context especially). Let's keep it simple!
1684 return __change_page_attr_set_clr(&cpa, 0);
1687 void kernel_map_pages(struct page *page, int numpages, int enable)
1689 if (PageHighMem(page))
1692 debug_check_no_locks_freed(page_address(page),
1693 numpages * PAGE_SIZE);
1697 * The return value is ignored as the calls cannot fail.
1698 * Large pages for identity mappings are not used at boot time
1699 * and hence no memory allocations during large page split.
1702 __set_pages_p(page, numpages);
1704 __set_pages_np(page, numpages);
1707 * We should perform an IPI and flush all tlbs,
1708 * but that can deadlock->flush only current cpu:
1712 arch_flush_lazy_mmu_mode();
1715 #ifdef CONFIG_HIBERNATION
1717 bool kernel_page_present(struct page *page)
1722 if (PageHighMem(page))
1725 pte = lookup_address((unsigned long)page_address(page), &level);
1726 return (pte_val(*pte) & _PAGE_PRESENT);
1729 #endif /* CONFIG_HIBERNATION */
1731 #endif /* CONFIG_DEBUG_PAGEALLOC */
1734 * The testcases use internal knowledge of the implementation that shouldn't
1735 * be exposed to the rest of the kernel. Include these directly here.
1737 #ifdef CONFIG_CPA_DEBUG
1738 #include "pageattr-test.c"