2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
10 #include <linux/interrupt.h>
11 #include <linux/seq_file.h>
12 #include <linux/debugfs.h>
13 #include <linux/pfn.h>
14 #include <linux/percpu.h>
15 #include <linux/gfp.h>
16 #include <linux/pci.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <asm/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
29 * The current flushing context - we pass it instead of 5 arguments:
39 unsigned force_split : 1;
45 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
46 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
47 * entries change the page attribute in parallel to some other cpu
48 * splitting a large page entry along with changing the attribute.
50 static DEFINE_SPINLOCK(cpa_lock);
52 #define CPA_FLUSHTLB 1
54 #define CPA_PAGES_ARRAY 4
57 static unsigned long direct_pages_count[PG_LEVEL_NUM];
59 void update_page_count(int level, unsigned long pages)
61 /* Protect against CPA */
63 direct_pages_count[level] += pages;
64 spin_unlock(&pgd_lock);
67 static void split_page_count(int level)
69 direct_pages_count[level]--;
70 direct_pages_count[level - 1] += PTRS_PER_PTE;
73 void arch_report_meminfo(struct seq_file *m)
75 seq_printf(m, "DirectMap4k: %8lu kB\n",
76 direct_pages_count[PG_LEVEL_4K] << 2);
77 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
78 seq_printf(m, "DirectMap2M: %8lu kB\n",
79 direct_pages_count[PG_LEVEL_2M] << 11);
81 seq_printf(m, "DirectMap4M: %8lu kB\n",
82 direct_pages_count[PG_LEVEL_2M] << 12);
86 seq_printf(m, "DirectMap1G: %8lu kB\n",
87 direct_pages_count[PG_LEVEL_1G] << 20);
91 static inline void split_page_count(int level) { }
96 static inline unsigned long highmap_start_pfn(void)
98 return __pa_symbol(_text) >> PAGE_SHIFT;
101 static inline unsigned long highmap_end_pfn(void)
103 return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
108 #ifdef CONFIG_DEBUG_PAGEALLOC
109 # define debug_pagealloc 1
111 # define debug_pagealloc 0
115 within(unsigned long addr, unsigned long start, unsigned long end)
117 return addr >= start && addr < end;
125 * clflush_cache_range - flush a cache range with clflush
126 * @vaddr: virtual start address
127 * @size: number of bytes to flush
129 * clflush is an unordered instruction which needs fencing with mfence
130 * to avoid ordering issues.
132 void clflush_cache_range(void *vaddr, unsigned int size)
134 void *vend = vaddr + size - 1;
138 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
141 * Flush any possible final partial cacheline:
147 EXPORT_SYMBOL_GPL(clflush_cache_range);
149 static void __cpa_flush_all(void *arg)
151 unsigned long cache = (unsigned long)arg;
154 * Flush all to work around Errata in early athlons regarding
155 * large page flushing.
159 if (cache && boot_cpu_data.x86 >= 4)
163 static void cpa_flush_all(unsigned long cache)
165 BUG_ON(irqs_disabled());
167 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
170 static void __cpa_flush_range(void *arg)
173 * We could optimize that further and do individual per page
174 * tlb invalidates for a low number of pages. Caveat: we must
175 * flush the high aliases on 64bit as well.
180 static void cpa_flush_range(unsigned long start, int numpages, int cache)
182 unsigned int i, level;
185 BUG_ON(irqs_disabled());
186 WARN_ON(PAGE_ALIGN(start) != start);
188 on_each_cpu(__cpa_flush_range, NULL, 1);
194 * We only need to flush on one CPU,
195 * clflush is a MESI-coherent instruction that
196 * will cause all other CPUs to flush the same
199 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
200 pte_t *pte = lookup_address(addr, &level);
203 * Only flush present addresses:
205 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
206 clflush_cache_range((void *) addr, PAGE_SIZE);
210 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
211 int in_flags, struct page **pages)
213 unsigned int i, level;
214 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
216 BUG_ON(irqs_disabled());
218 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
220 if (!cache || do_wbinvd)
224 * We only need to flush on one CPU,
225 * clflush is a MESI-coherent instruction that
226 * will cause all other CPUs to flush the same
229 for (i = 0; i < numpages; i++) {
233 if (in_flags & CPA_PAGES_ARRAY)
234 addr = (unsigned long)page_address(pages[i]);
238 pte = lookup_address(addr, &level);
241 * Only flush present addresses:
243 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
244 clflush_cache_range((void *)addr, PAGE_SIZE);
249 * Certain areas of memory on x86 require very specific protection flags,
250 * for example the BIOS area or kernel text. Callers don't always get this
251 * right (again, ioremap() on BIOS memory is not uncommon) so this function
252 * checks and fixes these known static required protection bits.
254 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
257 pgprot_t forbidden = __pgprot(0);
260 * The BIOS area between 640k and 1Mb needs to be executable for
261 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
263 #ifdef CONFIG_PCI_BIOS
264 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
265 pgprot_val(forbidden) |= _PAGE_NX;
269 * The kernel text needs to be executable for obvious reasons
270 * Does not cover __inittext since that is gone later on. On
271 * 64bit we do not enforce !NX on the low mapping
273 if (within(address, (unsigned long)_text, (unsigned long)_etext))
274 pgprot_val(forbidden) |= _PAGE_NX;
277 * The .rodata section needs to be read-only. Using the pfn
278 * catches all aliases.
280 if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
281 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
282 pgprot_val(forbidden) |= _PAGE_RW;
284 #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
286 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
287 * kernel text mappings for the large page aligned text, rodata sections
288 * will be always read-only. For the kernel identity mappings covering
289 * the holes caused by this alignment can be anything that user asks.
291 * This will preserve the large page mappings for kernel text/data
294 if (kernel_set_to_readonly &&
295 within(address, (unsigned long)_text,
296 (unsigned long)__end_rodata_hpage_align)) {
300 * Don't enforce the !RW mapping for the kernel text mapping,
301 * if the current mapping is already using small page mapping.
302 * No need to work hard to preserve large page mappings in this
305 * This also fixes the Linux Xen paravirt guest boot failure
306 * (because of unexpected read-only mappings for kernel identity
307 * mappings). In this paravirt guest case, the kernel text
308 * mapping and the kernel identity mapping share the same
309 * page-table pages. Thus we can't really use different
310 * protections for the kernel text and identity mappings. Also,
311 * these shared mappings are made of small page mappings.
312 * Thus this don't enforce !RW mapping for small page kernel
313 * text mapping logic will help Linux Xen parvirt guest boot
316 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
317 pgprot_val(forbidden) |= _PAGE_RW;
321 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
326 static pte_t *__lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
332 *level = PG_LEVEL_NONE;
337 pud = pud_offset(pgd, address);
341 *level = PG_LEVEL_1G;
342 if (pud_large(*pud) || !pud_present(*pud))
345 pmd = pmd_offset(pud, address);
349 *level = PG_LEVEL_2M;
350 if (pmd_large(*pmd) || !pmd_present(*pmd))
353 *level = PG_LEVEL_4K;
355 return pte_offset_kernel(pmd, address);
359 * Lookup the page table entry for a virtual address. Return a pointer
360 * to the entry and the level of the mapping.
362 * Note: We return pud and pmd either when the entry is marked large
363 * or when the present bit is not set. Otherwise we would return a
364 * pointer to a nonexisting mapping.
366 pte_t *lookup_address(unsigned long address, unsigned int *level)
368 return __lookup_address_in_pgd(pgd_offset_k(address), address, level);
370 EXPORT_SYMBOL_GPL(lookup_address);
372 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
376 return __lookup_address_in_pgd(cpa->pgd + pgd_index(address),
379 return lookup_address(address, level);
383 * This is necessary because __pa() does not work on some
384 * kinds of memory, like vmalloc() or the alloc_remap()
385 * areas on 32-bit NUMA systems. The percpu areas can
386 * end up in this kind of memory, for instance.
388 * This could be optimized, but it is only intended to be
389 * used at inititalization time, and keeping it
390 * unoptimized should increase the testing coverage for
391 * the more obscure platforms.
393 phys_addr_t slow_virt_to_phys(void *__virt_addr)
395 unsigned long virt_addr = (unsigned long)__virt_addr;
396 phys_addr_t phys_addr;
397 unsigned long offset;
403 pte = lookup_address(virt_addr, &level);
405 psize = page_level_size(level);
406 pmask = page_level_mask(level);
407 offset = virt_addr & ~pmask;
408 phys_addr = pte_pfn(*pte) << PAGE_SHIFT;
409 return (phys_addr | offset);
411 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
414 * Set the new pmd in all the pgds we know about:
416 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
419 set_pte_atomic(kpte, pte);
421 if (!SHARED_KERNEL_PMD) {
424 list_for_each_entry(page, &pgd_list, lru) {
429 pgd = (pgd_t *)page_address(page) + pgd_index(address);
430 pud = pud_offset(pgd, address);
431 pmd = pmd_offset(pud, address);
432 set_pte_atomic((pte_t *)pmd, pte);
439 try_preserve_large_page(pte_t *kpte, unsigned long address,
440 struct cpa_data *cpa)
442 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn;
443 pte_t new_pte, old_pte, *tmp;
444 pgprot_t old_prot, new_prot, req_prot;
448 if (cpa->force_split)
451 spin_lock(&pgd_lock);
453 * Check for races, another CPU might have split this page
456 tmp = lookup_address(address, &level);
465 psize = page_level_size(level);
466 pmask = page_level_mask(level);
474 * Calculate the number of pages, which fit into this large
475 * page starting at address:
477 nextpage_addr = (address + psize) & pmask;
478 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
479 if (numpages < cpa->numpages)
480 cpa->numpages = numpages;
483 * We are safe now. Check whether the new pgprot is the same:
486 old_prot = req_prot = pte_pgprot(old_pte);
488 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
489 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
492 * Set the PSE and GLOBAL flags only if the PRESENT flag is
493 * set otherwise pmd_present/pmd_huge will return true even on
494 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
495 * for the ancient hardware that doesn't support it.
497 if (pgprot_val(req_prot) & _PAGE_PRESENT)
498 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
500 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
502 req_prot = canon_pgprot(req_prot);
505 * old_pte points to the large page base address. So we need
506 * to add the offset of the virtual address:
508 pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
511 new_prot = static_protections(req_prot, address, pfn);
514 * We need to check the full range, whether
515 * static_protection() requires a different pgprot for one of
516 * the pages in the range we try to preserve:
518 addr = address & pmask;
519 pfn = pte_pfn(old_pte);
520 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
521 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
523 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
528 * If there are no changes, return. maxpages has been updated
531 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
537 * We need to change the attributes. Check, whether we can
538 * change the large page in one go. We request a split, when
539 * the address is not aligned and the number of pages is
540 * smaller than the number of pages in the large page. Note
541 * that we limited the number of possible pages already to
542 * the number of pages in the large page.
544 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
546 * The address is aligned and the number of pages
547 * covers the full page.
549 new_pte = pfn_pte(pte_pfn(old_pte), new_prot);
550 __set_pmd_pte(kpte, address, new_pte);
551 cpa->flags |= CPA_FLUSHTLB;
556 spin_unlock(&pgd_lock);
562 __split_large_page(pte_t *kpte, unsigned long address, struct page *base)
564 pte_t *pbase = (pte_t *)page_address(base);
565 unsigned long pfn, pfninc = 1;
566 unsigned int i, level;
570 spin_lock(&pgd_lock);
572 * Check for races, another CPU might have split this page
575 tmp = lookup_address(address, &level);
577 spin_unlock(&pgd_lock);
581 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
582 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
584 * If we ever want to utilize the PAT bit, we need to
585 * update this function to make sure it's converted from
586 * bit 12 to bit 7 when we cross from the 2MB level to
589 WARN_ON_ONCE(pgprot_val(ref_prot) & _PAGE_PAT_LARGE);
592 if (level == PG_LEVEL_1G) {
593 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
595 * Set the PSE flags only if the PRESENT flag is set
596 * otherwise pmd_present/pmd_huge will return true
597 * even on a non present pmd.
599 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
600 pgprot_val(ref_prot) |= _PAGE_PSE;
602 pgprot_val(ref_prot) &= ~_PAGE_PSE;
607 * Set the GLOBAL flags only if the PRESENT flag is set
608 * otherwise pmd/pte_present will return true even on a non
609 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
610 * for the ancient hardware that doesn't support it.
612 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
613 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
615 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
618 * Get the target pfn from the original entry:
620 pfn = pte_pfn(*kpte);
621 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
622 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
624 if (pfn_range_is_mapped(PFN_DOWN(__pa(address)),
625 PFN_DOWN(__pa(address)) + 1))
626 split_page_count(level);
629 * Install the new, split up pagetable.
631 * We use the standard kernel pagetable protections for the new
632 * pagetable protections, the actual ptes set above control the
633 * primary protection behavior:
635 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
638 * Intel Atom errata AAH41 workaround.
640 * The real fix should be in hw or in a microcode update, but
641 * we also probabilistically try to reduce the window of having
642 * a large TLB mixed with 4K TLBs while instruction fetches are
646 spin_unlock(&pgd_lock);
651 static int split_large_page(pte_t *kpte, unsigned long address)
655 if (!debug_pagealloc)
656 spin_unlock(&cpa_lock);
657 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
658 if (!debug_pagealloc)
659 spin_lock(&cpa_lock);
663 if (__split_large_page(kpte, address, base))
669 static bool try_to_free_pte_page(pte_t *pte)
673 for (i = 0; i < PTRS_PER_PTE; i++)
674 if (!pte_none(pte[i]))
677 free_page((unsigned long)pte);
681 static bool try_to_free_pmd_page(pmd_t *pmd)
685 for (i = 0; i < PTRS_PER_PMD; i++)
686 if (!pmd_none(pmd[i]))
689 free_page((unsigned long)pmd);
693 static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
695 pte_t *pte = pte_offset_kernel(pmd, start);
697 while (start < end) {
698 set_pte(pte, __pte(0));
704 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
711 static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
712 unsigned long start, unsigned long end)
714 if (unmap_pte_range(pmd, start, end))
715 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
719 static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
721 pmd_t *pmd = pmd_offset(pud, start);
724 * Not on a 2MB page boundary?
726 if (start & (PMD_SIZE - 1)) {
727 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
728 unsigned long pre_end = min_t(unsigned long, end, next_page);
730 __unmap_pmd_range(pud, pmd, start, pre_end);
737 * Try to unmap in 2M chunks.
739 while (end - start >= PMD_SIZE) {
743 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
753 return __unmap_pmd_range(pud, pmd, start, end);
756 * Try again to free the PMD page if haven't succeeded above.
759 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
763 static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
765 pud_t *pud = pud_offset(pgd, start);
768 * Not on a GB page boundary?
770 if (start & (PUD_SIZE - 1)) {
771 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
772 unsigned long pre_end = min_t(unsigned long, end, next_page);
774 unmap_pmd_range(pud, start, pre_end);
781 * Try to unmap in 1G chunks?
783 while (end - start >= PUD_SIZE) {
788 unmap_pmd_range(pud, start, start + PUD_SIZE);
798 unmap_pmd_range(pud, start, end);
801 * No need to try to free the PUD page because we'll free it in
802 * populate_pgd's error path
806 static int alloc_pte_page(pmd_t *pmd)
808 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
812 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
816 static int alloc_pmd_page(pud_t *pud)
818 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
822 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
826 static void populate_pte(struct cpa_data *cpa,
827 unsigned long start, unsigned long end,
828 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
832 pte = pte_offset_kernel(pmd, start);
834 while (num_pages-- && start < end) {
836 /* deal with the NX bit */
837 if (!(pgprot_val(pgprot) & _PAGE_NX))
838 cpa->pfn &= ~_PAGE_NX;
840 set_pte(pte, pfn_pte(cpa->pfn >> PAGE_SHIFT, pgprot));
843 cpa->pfn += PAGE_SIZE;
848 static int populate_pmd(struct cpa_data *cpa,
849 unsigned long start, unsigned long end,
850 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
852 unsigned int cur_pages = 0;
856 * Not on a 2M boundary?
858 if (start & (PMD_SIZE - 1)) {
859 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
860 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
862 pre_end = min_t(unsigned long, pre_end, next_page);
863 cur_pages = (pre_end - start) >> PAGE_SHIFT;
864 cur_pages = min_t(unsigned int, num_pages, cur_pages);
869 pmd = pmd_offset(pud, start);
871 if (alloc_pte_page(pmd))
874 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
880 * We mapped them all?
882 if (num_pages == cur_pages)
885 while (end - start >= PMD_SIZE) {
888 * We cannot use a 1G page so allocate a PMD page if needed.
891 if (alloc_pmd_page(pud))
894 pmd = pmd_offset(pud, start);
896 set_pmd(pmd, __pmd(cpa->pfn | _PAGE_PSE | massage_pgprot(pgprot)));
899 cpa->pfn += PMD_SIZE;
900 cur_pages += PMD_SIZE >> PAGE_SHIFT;
904 * Map trailing 4K pages.
907 pmd = pmd_offset(pud, start);
909 if (alloc_pte_page(pmd))
912 populate_pte(cpa, start, end, num_pages - cur_pages,
918 static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
925 end = start + (cpa->numpages << PAGE_SHIFT);
928 * Not on a Gb page boundary? => map everything up to it with
931 if (start & (PUD_SIZE - 1)) {
932 unsigned long pre_end;
933 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
935 pre_end = min_t(unsigned long, end, next_page);
936 cur_pages = (pre_end - start) >> PAGE_SHIFT;
937 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
939 pud = pud_offset(pgd, start);
945 if (alloc_pmd_page(pud))
948 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
956 /* We mapped them all? */
957 if (cpa->numpages == cur_pages)
960 pud = pud_offset(pgd, start);
963 * Map everything starting from the Gb boundary, possibly with 1G pages
965 while (end - start >= PUD_SIZE) {
966 set_pud(pud, __pud(cpa->pfn | _PAGE_PSE | massage_pgprot(pgprot)));
969 cpa->pfn += PUD_SIZE;
970 cur_pages += PUD_SIZE >> PAGE_SHIFT;
974 /* Map trailing leftover */
978 pud = pud_offset(pgd, start);
980 if (alloc_pmd_page(pud))
983 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
994 * Restrictions for kernel page table do not necessarily apply when mapping in
997 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
999 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1000 bool allocd_pgd = false;
1002 pud_t *pud = NULL; /* shut up gcc */
1005 pgd_entry = cpa->pgd + pgd_index(addr);
1008 * Allocate a PUD page and hand it down for mapping.
1010 if (pgd_none(*pgd_entry)) {
1011 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1015 set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
1019 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1020 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1022 ret = populate_pud(cpa, addr, pgd_entry, pgprot);
1024 unmap_pud_range(pgd_entry, addr,
1025 addr + (cpa->numpages << PAGE_SHIFT));
1029 * If I allocated this PUD page, I can just as well
1030 * free it in this error path.
1032 pgd_clear(pgd_entry);
1033 free_page((unsigned long)pud);
1037 cpa->numpages = ret;
1041 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1045 * Ignore all non primary paths.
1051 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1053 * Also set numpages to '1' indicating that we processed cpa req for
1054 * one virtual address page and its pfn. TBD: numpages can be set based
1055 * on the initial value and the level returned by lookup_address().
1057 if (within(vaddr, PAGE_OFFSET,
1058 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1060 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1063 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1064 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1071 static int __change_page_attr(struct cpa_data *cpa, int primary)
1073 unsigned long address;
1076 pte_t *kpte, old_pte;
1078 if (cpa->flags & CPA_PAGES_ARRAY) {
1079 struct page *page = cpa->pages[cpa->curpage];
1080 if (unlikely(PageHighMem(page)))
1082 address = (unsigned long)page_address(page);
1083 } else if (cpa->flags & CPA_ARRAY)
1084 address = cpa->vaddr[cpa->curpage];
1086 address = *cpa->vaddr;
1088 kpte = lookup_address(address, &level);
1090 return __cpa_process_fault(cpa, address, primary);
1093 if (!pte_val(old_pte))
1094 return __cpa_process_fault(cpa, address, primary);
1096 if (level == PG_LEVEL_4K) {
1098 pgprot_t new_prot = pte_pgprot(old_pte);
1099 unsigned long pfn = pte_pfn(old_pte);
1101 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1102 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1104 new_prot = static_protections(new_prot, address, pfn);
1107 * Set the GLOBAL flags only if the PRESENT flag is
1108 * set otherwise pte_present will return true even on
1109 * a non present pte. The canon_pgprot will clear
1110 * _PAGE_GLOBAL for the ancient hardware that doesn't
1113 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1114 pgprot_val(new_prot) |= _PAGE_GLOBAL;
1116 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1119 * We need to keep the pfn from the existing PTE,
1120 * after all we're only going to change it's attributes
1121 * not the memory it points to
1123 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1126 * Do we really change anything ?
1128 if (pte_val(old_pte) != pte_val(new_pte)) {
1129 set_pte_atomic(kpte, new_pte);
1130 cpa->flags |= CPA_FLUSHTLB;
1137 * Check, whether we can keep the large page intact
1138 * and just change the pte:
1140 do_split = try_preserve_large_page(kpte, address, cpa);
1142 * When the range fits into the existing large page,
1143 * return. cp->numpages and cpa->tlbflush have been updated in
1150 * We have to split the large page:
1152 err = split_large_page(kpte, address);
1155 * Do a global flush tlb after splitting the large page
1156 * and before we do the actual change page attribute in the PTE.
1158 * With out this, we violate the TLB application note, that says
1159 * "The TLBs may contain both ordinary and large-page
1160 * translations for a 4-KByte range of linear addresses. This
1161 * may occur if software modifies the paging structures so that
1162 * the page size used for the address range changes. If the two
1163 * translations differ with respect to page frame or attributes
1164 * (e.g., permissions), processor behavior is undefined and may
1165 * be implementation-specific."
1167 * We do this global tlb flush inside the cpa_lock, so that we
1168 * don't allow any other cpu, with stale tlb entries change the
1169 * page attribute in parallel, that also falls into the
1170 * just split large page entry.
1179 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1181 static int cpa_process_alias(struct cpa_data *cpa)
1183 struct cpa_data alias_cpa;
1184 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1185 unsigned long vaddr;
1188 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1192 * No need to redo, when the primary call touched the direct
1195 if (cpa->flags & CPA_PAGES_ARRAY) {
1196 struct page *page = cpa->pages[cpa->curpage];
1197 if (unlikely(PageHighMem(page)))
1199 vaddr = (unsigned long)page_address(page);
1200 } else if (cpa->flags & CPA_ARRAY)
1201 vaddr = cpa->vaddr[cpa->curpage];
1203 vaddr = *cpa->vaddr;
1205 if (!(within(vaddr, PAGE_OFFSET,
1206 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1209 alias_cpa.vaddr = &laddr;
1210 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1212 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1217 #ifdef CONFIG_X86_64
1219 * If the primary call didn't touch the high mapping already
1220 * and the physical address is inside the kernel map, we need
1221 * to touch the high mapped kernel as well:
1223 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1224 within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
1225 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1226 __START_KERNEL_map - phys_base;
1228 alias_cpa.vaddr = &temp_cpa_vaddr;
1229 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1232 * The high mapping range is imprecise, so ignore the
1235 __change_page_attr_set_clr(&alias_cpa, 0);
1242 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1244 int ret, numpages = cpa->numpages;
1248 * Store the remaining nr of pages for the large page
1249 * preservation check.
1251 cpa->numpages = numpages;
1252 /* for array changes, we can't use large page */
1253 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1256 if (!debug_pagealloc)
1257 spin_lock(&cpa_lock);
1258 ret = __change_page_attr(cpa, checkalias);
1259 if (!debug_pagealloc)
1260 spin_unlock(&cpa_lock);
1265 ret = cpa_process_alias(cpa);
1271 * Adjust the number of pages with the result of the
1272 * CPA operation. Either a large page has been
1273 * preserved or a single page update happened.
1275 BUG_ON(cpa->numpages > numpages);
1276 numpages -= cpa->numpages;
1277 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1280 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1286 static inline int cache_attr(pgprot_t attr)
1288 return pgprot_val(attr) &
1289 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
1292 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1293 pgprot_t mask_set, pgprot_t mask_clr,
1294 int force_split, int in_flag,
1295 struct page **pages)
1297 struct cpa_data cpa;
1298 int ret, cache, checkalias;
1299 unsigned long baddr = 0;
1302 * Check, if we are requested to change a not supported
1305 mask_set = canon_pgprot(mask_set);
1306 mask_clr = canon_pgprot(mask_clr);
1307 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1310 /* Ensure we are PAGE_SIZE aligned */
1311 if (in_flag & CPA_ARRAY) {
1313 for (i = 0; i < numpages; i++) {
1314 if (addr[i] & ~PAGE_MASK) {
1315 addr[i] &= PAGE_MASK;
1319 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1321 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1322 * No need to cehck in that case
1324 if (*addr & ~PAGE_MASK) {
1327 * People should not be passing in unaligned addresses:
1332 * Save address for cache flush. *addr is modified in the call
1333 * to __change_page_attr_set_clr() below.
1338 /* Must avoid aliasing mappings in the highmem code */
1339 kmap_flush_unused();
1345 cpa.numpages = numpages;
1346 cpa.mask_set = mask_set;
1347 cpa.mask_clr = mask_clr;
1350 cpa.force_split = force_split;
1352 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1353 cpa.flags |= in_flag;
1355 /* No alias checking for _NX bit modifications */
1356 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1358 ret = __change_page_attr_set_clr(&cpa, checkalias);
1361 * Check whether we really changed something:
1363 if (!(cpa.flags & CPA_FLUSHTLB))
1367 * No need to flush, when we did not set any of the caching
1370 cache = cache_attr(mask_set);
1373 * On success we use clflush, when the CPU supports it to
1374 * avoid the wbindv. If the CPU does not support it and in the
1375 * error case we fall back to cpa_flush_all (which uses
1378 if (!ret && cpu_has_clflush) {
1379 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1380 cpa_flush_array(addr, numpages, cache,
1383 cpa_flush_range(baddr, numpages, cache);
1385 cpa_flush_all(cache);
1391 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1392 pgprot_t mask, int array)
1394 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1395 (array ? CPA_ARRAY : 0), NULL);
1398 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1399 pgprot_t mask, int array)
1401 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1402 (array ? CPA_ARRAY : 0), NULL);
1405 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1408 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1409 CPA_PAGES_ARRAY, pages);
1412 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1415 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1416 CPA_PAGES_ARRAY, pages);
1419 int _set_memory_uc(unsigned long addr, int numpages)
1422 * for now UC MINUS. see comments in ioremap_nocache()
1424 return change_page_attr_set(&addr, numpages,
1425 __pgprot(_PAGE_CACHE_UC_MINUS), 0);
1428 int set_memory_uc(unsigned long addr, int numpages)
1433 * for now UC MINUS. see comments in ioremap_nocache()
1435 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1436 _PAGE_CACHE_UC_MINUS, NULL);
1440 ret = _set_memory_uc(addr, numpages);
1447 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1451 EXPORT_SYMBOL(set_memory_uc);
1453 static int _set_memory_array(unsigned long *addr, int addrinarray,
1454 unsigned long new_type)
1460 * for now UC MINUS. see comments in ioremap_nocache()
1462 for (i = 0; i < addrinarray; i++) {
1463 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1469 ret = change_page_attr_set(addr, addrinarray,
1470 __pgprot(_PAGE_CACHE_UC_MINUS), 1);
1472 if (!ret && new_type == _PAGE_CACHE_WC)
1473 ret = change_page_attr_set_clr(addr, addrinarray,
1474 __pgprot(_PAGE_CACHE_WC),
1475 __pgprot(_PAGE_CACHE_MASK),
1476 0, CPA_ARRAY, NULL);
1483 for (j = 0; j < i; j++)
1484 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1489 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1491 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_UC_MINUS);
1493 EXPORT_SYMBOL(set_memory_array_uc);
1495 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1497 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_WC);
1499 EXPORT_SYMBOL(set_memory_array_wc);
1501 int _set_memory_wc(unsigned long addr, int numpages)
1504 unsigned long addr_copy = addr;
1506 ret = change_page_attr_set(&addr, numpages,
1507 __pgprot(_PAGE_CACHE_UC_MINUS), 0);
1509 ret = change_page_attr_set_clr(&addr_copy, numpages,
1510 __pgprot(_PAGE_CACHE_WC),
1511 __pgprot(_PAGE_CACHE_MASK),
1517 int set_memory_wc(unsigned long addr, int numpages)
1522 return set_memory_uc(addr, numpages);
1524 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1525 _PAGE_CACHE_WC, NULL);
1529 ret = _set_memory_wc(addr, numpages);
1536 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1540 EXPORT_SYMBOL(set_memory_wc);
1542 int _set_memory_wb(unsigned long addr, int numpages)
1544 return change_page_attr_clear(&addr, numpages,
1545 __pgprot(_PAGE_CACHE_MASK), 0);
1548 int set_memory_wb(unsigned long addr, int numpages)
1552 ret = _set_memory_wb(addr, numpages);
1556 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1559 EXPORT_SYMBOL(set_memory_wb);
1561 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1566 ret = change_page_attr_clear(addr, addrinarray,
1567 __pgprot(_PAGE_CACHE_MASK), 1);
1571 for (i = 0; i < addrinarray; i++)
1572 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1576 EXPORT_SYMBOL(set_memory_array_wb);
1578 int set_memory_x(unsigned long addr, int numpages)
1580 if (!(__supported_pte_mask & _PAGE_NX))
1583 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1585 EXPORT_SYMBOL(set_memory_x);
1587 int set_memory_nx(unsigned long addr, int numpages)
1589 if (!(__supported_pte_mask & _PAGE_NX))
1592 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1594 EXPORT_SYMBOL(set_memory_nx);
1596 int set_memory_ro(unsigned long addr, int numpages)
1598 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1600 EXPORT_SYMBOL_GPL(set_memory_ro);
1602 int set_memory_rw(unsigned long addr, int numpages)
1604 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1606 EXPORT_SYMBOL_GPL(set_memory_rw);
1608 int set_memory_np(unsigned long addr, int numpages)
1610 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1613 int set_memory_4k(unsigned long addr, int numpages)
1615 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1616 __pgprot(0), 1, 0, NULL);
1619 int set_pages_uc(struct page *page, int numpages)
1621 unsigned long addr = (unsigned long)page_address(page);
1623 return set_memory_uc(addr, numpages);
1625 EXPORT_SYMBOL(set_pages_uc);
1627 static int _set_pages_array(struct page **pages, int addrinarray,
1628 unsigned long new_type)
1630 unsigned long start;
1636 for (i = 0; i < addrinarray; i++) {
1637 if (PageHighMem(pages[i]))
1639 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1640 end = start + PAGE_SIZE;
1641 if (reserve_memtype(start, end, new_type, NULL))
1645 ret = cpa_set_pages_array(pages, addrinarray,
1646 __pgprot(_PAGE_CACHE_UC_MINUS));
1647 if (!ret && new_type == _PAGE_CACHE_WC)
1648 ret = change_page_attr_set_clr(NULL, addrinarray,
1649 __pgprot(_PAGE_CACHE_WC),
1650 __pgprot(_PAGE_CACHE_MASK),
1651 0, CPA_PAGES_ARRAY, pages);
1654 return 0; /* Success */
1657 for (i = 0; i < free_idx; i++) {
1658 if (PageHighMem(pages[i]))
1660 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1661 end = start + PAGE_SIZE;
1662 free_memtype(start, end);
1667 int set_pages_array_uc(struct page **pages, int addrinarray)
1669 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_UC_MINUS);
1671 EXPORT_SYMBOL(set_pages_array_uc);
1673 int set_pages_array_wc(struct page **pages, int addrinarray)
1675 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_WC);
1677 EXPORT_SYMBOL(set_pages_array_wc);
1679 int set_pages_wb(struct page *page, int numpages)
1681 unsigned long addr = (unsigned long)page_address(page);
1683 return set_memory_wb(addr, numpages);
1685 EXPORT_SYMBOL(set_pages_wb);
1687 int set_pages_array_wb(struct page **pages, int addrinarray)
1690 unsigned long start;
1694 retval = cpa_clear_pages_array(pages, addrinarray,
1695 __pgprot(_PAGE_CACHE_MASK));
1699 for (i = 0; i < addrinarray; i++) {
1700 if (PageHighMem(pages[i]))
1702 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1703 end = start + PAGE_SIZE;
1704 free_memtype(start, end);
1709 EXPORT_SYMBOL(set_pages_array_wb);
1711 int set_pages_x(struct page *page, int numpages)
1713 unsigned long addr = (unsigned long)page_address(page);
1715 return set_memory_x(addr, numpages);
1717 EXPORT_SYMBOL(set_pages_x);
1719 int set_pages_nx(struct page *page, int numpages)
1721 unsigned long addr = (unsigned long)page_address(page);
1723 return set_memory_nx(addr, numpages);
1725 EXPORT_SYMBOL(set_pages_nx);
1727 int set_pages_ro(struct page *page, int numpages)
1729 unsigned long addr = (unsigned long)page_address(page);
1731 return set_memory_ro(addr, numpages);
1734 int set_pages_rw(struct page *page, int numpages)
1736 unsigned long addr = (unsigned long)page_address(page);
1738 return set_memory_rw(addr, numpages);
1741 #ifdef CONFIG_DEBUG_PAGEALLOC
1743 static int __set_pages_p(struct page *page, int numpages)
1745 unsigned long tempaddr = (unsigned long) page_address(page);
1746 struct cpa_data cpa = { .vaddr = &tempaddr,
1747 .numpages = numpages,
1748 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1749 .mask_clr = __pgprot(0),
1753 * No alias checking needed for setting present flag. otherwise,
1754 * we may need to break large pages for 64-bit kernel text
1755 * mappings (this adds to complexity if we want to do this from
1756 * atomic context especially). Let's keep it simple!
1758 return __change_page_attr_set_clr(&cpa, 0);
1761 static int __set_pages_np(struct page *page, int numpages)
1763 unsigned long tempaddr = (unsigned long) page_address(page);
1764 struct cpa_data cpa = { .vaddr = &tempaddr,
1765 .numpages = numpages,
1766 .mask_set = __pgprot(0),
1767 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1771 * No alias checking needed for setting not present flag. otherwise,
1772 * we may need to break large pages for 64-bit kernel text
1773 * mappings (this adds to complexity if we want to do this from
1774 * atomic context especially). Let's keep it simple!
1776 return __change_page_attr_set_clr(&cpa, 0);
1779 void kernel_map_pages(struct page *page, int numpages, int enable)
1781 if (PageHighMem(page))
1784 debug_check_no_locks_freed(page_address(page),
1785 numpages * PAGE_SIZE);
1789 * The return value is ignored as the calls cannot fail.
1790 * Large pages for identity mappings are not used at boot time
1791 * and hence no memory allocations during large page split.
1794 __set_pages_p(page, numpages);
1796 __set_pages_np(page, numpages);
1799 * We should perform an IPI and flush all tlbs,
1800 * but that can deadlock->flush only current cpu:
1804 arch_flush_lazy_mmu_mode();
1807 #ifdef CONFIG_HIBERNATION
1809 bool kernel_page_present(struct page *page)
1814 if (PageHighMem(page))
1817 pte = lookup_address((unsigned long)page_address(page), &level);
1818 return (pte_val(*pte) & _PAGE_PRESENT);
1821 #endif /* CONFIG_HIBERNATION */
1823 #endif /* CONFIG_DEBUG_PAGEALLOC */
1826 * The testcases use internal knowledge of the implementation that shouldn't
1827 * be exposed to the rest of the kernel. Include these directly here.
1829 #ifdef CONFIG_CPA_DEBUG
1830 #include "pageattr-test.c"