2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
10 #include <linux/interrupt.h>
11 #include <linux/seq_file.h>
12 #include <linux/debugfs.h>
13 #include <linux/pfn.h>
14 #include <linux/percpu.h>
15 #include <linux/gfp.h>
16 #include <linux/pci.h>
17 #include <linux/vmalloc.h>
20 #include <asm/processor.h>
21 #include <asm/tlbflush.h>
22 #include <asm/sections.h>
23 #include <asm/setup.h>
24 #include <asm/uaccess.h>
25 #include <asm/pgalloc.h>
26 #include <asm/proto.h>
30 * The current flushing context - we pass it instead of 5 arguments:
40 unsigned force_split : 1;
46 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
47 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
48 * entries change the page attribute in parallel to some other cpu
49 * splitting a large page entry along with changing the attribute.
51 static DEFINE_SPINLOCK(cpa_lock);
53 #define CPA_FLUSHTLB 1
55 #define CPA_PAGES_ARRAY 4
58 static unsigned long direct_pages_count[PG_LEVEL_NUM];
60 void update_page_count(int level, unsigned long pages)
62 /* Protect against CPA */
64 direct_pages_count[level] += pages;
65 spin_unlock(&pgd_lock);
68 static void split_page_count(int level)
70 direct_pages_count[level]--;
71 direct_pages_count[level - 1] += PTRS_PER_PTE;
74 void arch_report_meminfo(struct seq_file *m)
76 seq_printf(m, "DirectMap4k: %8lu kB\n",
77 direct_pages_count[PG_LEVEL_4K] << 2);
78 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
79 seq_printf(m, "DirectMap2M: %8lu kB\n",
80 direct_pages_count[PG_LEVEL_2M] << 11);
82 seq_printf(m, "DirectMap4M: %8lu kB\n",
83 direct_pages_count[PG_LEVEL_2M] << 12);
86 seq_printf(m, "DirectMap1G: %8lu kB\n",
87 direct_pages_count[PG_LEVEL_1G] << 20);
90 static inline void split_page_count(int level) { }
95 static inline unsigned long highmap_start_pfn(void)
97 return __pa_symbol(_text) >> PAGE_SHIFT;
100 static inline unsigned long highmap_end_pfn(void)
102 return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
107 #ifdef CONFIG_DEBUG_PAGEALLOC
108 # define debug_pagealloc 1
110 # define debug_pagealloc 0
114 within(unsigned long addr, unsigned long start, unsigned long end)
116 return addr >= start && addr < end;
124 * clflush_cache_range - flush a cache range with clflush
125 * @vaddr: virtual start address
126 * @size: number of bytes to flush
128 * clflushopt is an unordered instruction which needs fencing with mfence or
129 * sfence to avoid ordering issues.
131 void clflush_cache_range(void *vaddr, unsigned int size)
133 unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1;
134 void *vend = vaddr + size;
139 for (p = (void *)((unsigned long)vaddr & ~clflush_mask);
140 p < vend; p += boot_cpu_data.x86_clflush_size)
145 EXPORT_SYMBOL_GPL(clflush_cache_range);
147 static void __cpa_flush_all(void *arg)
149 unsigned long cache = (unsigned long)arg;
152 * Flush all to work around Errata in early athlons regarding
153 * large page flushing.
157 if (cache && boot_cpu_data.x86 >= 4)
161 static void cpa_flush_all(unsigned long cache)
163 BUG_ON(irqs_disabled());
165 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
168 static void __cpa_flush_range(void *arg)
171 * We could optimize that further and do individual per page
172 * tlb invalidates for a low number of pages. Caveat: we must
173 * flush the high aliases on 64bit as well.
178 static void cpa_flush_range(unsigned long start, int numpages, int cache)
180 unsigned int i, level;
183 BUG_ON(irqs_disabled());
184 WARN_ON(PAGE_ALIGN(start) != start);
186 on_each_cpu(__cpa_flush_range, NULL, 1);
192 * We only need to flush on one CPU,
193 * clflush is a MESI-coherent instruction that
194 * will cause all other CPUs to flush the same
197 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
198 pte_t *pte = lookup_address(addr, &level);
201 * Only flush present addresses:
203 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
204 clflush_cache_range((void *) addr, PAGE_SIZE);
208 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
209 int in_flags, struct page **pages)
211 unsigned int i, level;
212 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
214 BUG_ON(irqs_disabled());
216 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
218 if (!cache || do_wbinvd)
222 * We only need to flush on one CPU,
223 * clflush is a MESI-coherent instruction that
224 * will cause all other CPUs to flush the same
227 for (i = 0; i < numpages; i++) {
231 if (in_flags & CPA_PAGES_ARRAY)
232 addr = (unsigned long)page_address(pages[i]);
236 pte = lookup_address(addr, &level);
239 * Only flush present addresses:
241 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
242 clflush_cache_range((void *)addr, PAGE_SIZE);
247 * Certain areas of memory on x86 require very specific protection flags,
248 * for example the BIOS area or kernel text. Callers don't always get this
249 * right (again, ioremap() on BIOS memory is not uncommon) so this function
250 * checks and fixes these known static required protection bits.
252 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
255 pgprot_t forbidden = __pgprot(0);
258 * The BIOS area between 640k and 1Mb needs to be executable for
259 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
261 #ifdef CONFIG_PCI_BIOS
262 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
263 pgprot_val(forbidden) |= _PAGE_NX;
267 * The kernel text needs to be executable for obvious reasons
268 * Does not cover __inittext since that is gone later on. On
269 * 64bit we do not enforce !NX on the low mapping
271 if (within(address, (unsigned long)_text, (unsigned long)_etext))
272 pgprot_val(forbidden) |= _PAGE_NX;
275 * The .rodata section needs to be read-only. Using the pfn
276 * catches all aliases.
278 if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
279 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
280 pgprot_val(forbidden) |= _PAGE_RW;
282 #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
284 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
285 * kernel text mappings for the large page aligned text, rodata sections
286 * will be always read-only. For the kernel identity mappings covering
287 * the holes caused by this alignment can be anything that user asks.
289 * This will preserve the large page mappings for kernel text/data
292 if (kernel_set_to_readonly &&
293 within(address, (unsigned long)_text,
294 (unsigned long)__end_rodata_hpage_align)) {
298 * Don't enforce the !RW mapping for the kernel text mapping,
299 * if the current mapping is already using small page mapping.
300 * No need to work hard to preserve large page mappings in this
303 * This also fixes the Linux Xen paravirt guest boot failure
304 * (because of unexpected read-only mappings for kernel identity
305 * mappings). In this paravirt guest case, the kernel text
306 * mapping and the kernel identity mapping share the same
307 * page-table pages. Thus we can't really use different
308 * protections for the kernel text and identity mappings. Also,
309 * these shared mappings are made of small page mappings.
310 * Thus this don't enforce !RW mapping for small page kernel
311 * text mapping logic will help Linux Xen parvirt guest boot
314 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
315 pgprot_val(forbidden) |= _PAGE_RW;
319 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
325 * Lookup the page table entry for a virtual address in a specific pgd.
326 * Return a pointer to the entry and the level of the mapping.
328 pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
334 *level = PG_LEVEL_NONE;
339 pud = pud_offset(pgd, address);
343 *level = PG_LEVEL_1G;
344 if (pud_large(*pud) || !pud_present(*pud))
347 pmd = pmd_offset(pud, address);
351 *level = PG_LEVEL_2M;
352 if (pmd_large(*pmd) || !pmd_present(*pmd))
355 *level = PG_LEVEL_4K;
357 return pte_offset_kernel(pmd, address);
361 * Lookup the page table entry for a virtual address. Return a pointer
362 * to the entry and the level of the mapping.
364 * Note: We return pud and pmd either when the entry is marked large
365 * or when the present bit is not set. Otherwise we would return a
366 * pointer to a nonexisting mapping.
368 pte_t *lookup_address(unsigned long address, unsigned int *level)
370 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
372 EXPORT_SYMBOL_GPL(lookup_address);
374 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
378 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
381 return lookup_address(address, level);
385 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
386 * or NULL if not present.
388 pmd_t *lookup_pmd_address(unsigned long address)
393 pgd = pgd_offset_k(address);
397 pud = pud_offset(pgd, address);
398 if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
401 return pmd_offset(pud, address);
405 * This is necessary because __pa() does not work on some
406 * kinds of memory, like vmalloc() or the alloc_remap()
407 * areas on 32-bit NUMA systems. The percpu areas can
408 * end up in this kind of memory, for instance.
410 * This could be optimized, but it is only intended to be
411 * used at inititalization time, and keeping it
412 * unoptimized should increase the testing coverage for
413 * the more obscure platforms.
415 phys_addr_t slow_virt_to_phys(void *__virt_addr)
417 unsigned long virt_addr = (unsigned long)__virt_addr;
418 phys_addr_t phys_addr;
419 unsigned long offset;
424 pte = lookup_address(virt_addr, &level);
426 pmask = page_level_mask(level);
427 offset = virt_addr & ~pmask;
428 phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
429 return (phys_addr | offset);
431 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
434 * Set the new pmd in all the pgds we know about:
436 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
439 set_pte_atomic(kpte, pte);
441 if (!SHARED_KERNEL_PMD) {
444 list_for_each_entry(page, &pgd_list, lru) {
449 pgd = (pgd_t *)page_address(page) + pgd_index(address);
450 pud = pud_offset(pgd, address);
451 pmd = pmd_offset(pud, address);
452 set_pte_atomic((pte_t *)pmd, pte);
459 try_preserve_large_page(pte_t *kpte, unsigned long address,
460 struct cpa_data *cpa)
462 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn;
463 pte_t new_pte, old_pte, *tmp;
464 pgprot_t old_prot, new_prot, req_prot;
468 if (cpa->force_split)
471 spin_lock(&pgd_lock);
473 * Check for races, another CPU might have split this page
476 tmp = _lookup_address_cpa(cpa, address, &level);
485 psize = page_level_size(level);
486 pmask = page_level_mask(level);
494 * Calculate the number of pages, which fit into this large
495 * page starting at address:
497 nextpage_addr = (address + psize) & pmask;
498 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
499 if (numpages < cpa->numpages)
500 cpa->numpages = numpages;
503 * We are safe now. Check whether the new pgprot is the same:
504 * Convert protection attributes to 4k-format, as cpa->mask* are set
508 old_prot = req_prot = pgprot_large_2_4k(pte_pgprot(old_pte));
510 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
511 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
514 * req_prot is in format of 4k pages. It must be converted to large
515 * page format: the caching mode includes the PAT bit located at
516 * different bit positions in the two formats.
518 req_prot = pgprot_4k_2_large(req_prot);
521 * Set the PSE and GLOBAL flags only if the PRESENT flag is
522 * set otherwise pmd_present/pmd_huge will return true even on
523 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
524 * for the ancient hardware that doesn't support it.
526 if (pgprot_val(req_prot) & _PAGE_PRESENT)
527 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
529 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
531 req_prot = canon_pgprot(req_prot);
534 * old_pte points to the large page base address. So we need
535 * to add the offset of the virtual address:
537 pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
540 new_prot = static_protections(req_prot, address, pfn);
543 * We need to check the full range, whether
544 * static_protection() requires a different pgprot for one of
545 * the pages in the range we try to preserve:
547 addr = address & pmask;
548 pfn = pte_pfn(old_pte);
549 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
550 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
552 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
557 * If there are no changes, return. maxpages has been updated
560 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
566 * We need to change the attributes. Check, whether we can
567 * change the large page in one go. We request a split, when
568 * the address is not aligned and the number of pages is
569 * smaller than the number of pages in the large page. Note
570 * that we limited the number of possible pages already to
571 * the number of pages in the large page.
573 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
575 * The address is aligned and the number of pages
576 * covers the full page.
578 new_pte = pfn_pte(pte_pfn(old_pte), new_prot);
579 __set_pmd_pte(kpte, address, new_pte);
580 cpa->flags |= CPA_FLUSHTLB;
585 spin_unlock(&pgd_lock);
591 __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
594 pte_t *pbase = (pte_t *)page_address(base);
595 unsigned long pfn, pfninc = 1;
596 unsigned int i, level;
600 spin_lock(&pgd_lock);
602 * Check for races, another CPU might have split this page
605 tmp = _lookup_address_cpa(cpa, address, &level);
607 spin_unlock(&pgd_lock);
611 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
612 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
614 /* promote PAT bit to correct position */
615 if (level == PG_LEVEL_2M)
616 ref_prot = pgprot_large_2_4k(ref_prot);
619 if (level == PG_LEVEL_1G) {
620 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
622 * Set the PSE flags only if the PRESENT flag is set
623 * otherwise pmd_present/pmd_huge will return true
624 * even on a non present pmd.
626 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
627 pgprot_val(ref_prot) |= _PAGE_PSE;
629 pgprot_val(ref_prot) &= ~_PAGE_PSE;
634 * Set the GLOBAL flags only if the PRESENT flag is set
635 * otherwise pmd/pte_present will return true even on a non
636 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
637 * for the ancient hardware that doesn't support it.
639 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
640 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
642 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
645 * Get the target pfn from the original entry:
647 pfn = pte_pfn(*kpte);
648 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
649 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
651 if (virt_addr_valid(address)) {
652 unsigned long pfn = PFN_DOWN(__pa(address));
654 if (pfn_range_is_mapped(pfn, pfn + 1))
655 split_page_count(level);
659 * Install the new, split up pagetable.
661 * We use the standard kernel pagetable protections for the new
662 * pagetable protections, the actual ptes set above control the
663 * primary protection behavior:
665 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
668 * Intel Atom errata AAH41 workaround.
670 * The real fix should be in hw or in a microcode update, but
671 * we also probabilistically try to reduce the window of having
672 * a large TLB mixed with 4K TLBs while instruction fetches are
676 spin_unlock(&pgd_lock);
681 static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
682 unsigned long address)
686 if (!debug_pagealloc)
687 spin_unlock(&cpa_lock);
688 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
689 if (!debug_pagealloc)
690 spin_lock(&cpa_lock);
694 if (__split_large_page(cpa, kpte, address, base))
700 static bool try_to_free_pte_page(pte_t *pte)
704 for (i = 0; i < PTRS_PER_PTE; i++)
705 if (!pte_none(pte[i]))
708 free_page((unsigned long)pte);
712 static bool try_to_free_pmd_page(pmd_t *pmd)
716 for (i = 0; i < PTRS_PER_PMD; i++)
717 if (!pmd_none(pmd[i]))
720 free_page((unsigned long)pmd);
724 static bool try_to_free_pud_page(pud_t *pud)
728 for (i = 0; i < PTRS_PER_PUD; i++)
729 if (!pud_none(pud[i]))
732 free_page((unsigned long)pud);
736 static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
738 pte_t *pte = pte_offset_kernel(pmd, start);
740 while (start < end) {
741 set_pte(pte, __pte(0));
747 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
754 static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
755 unsigned long start, unsigned long end)
757 if (unmap_pte_range(pmd, start, end))
758 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
762 static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
764 pmd_t *pmd = pmd_offset(pud, start);
767 * Not on a 2MB page boundary?
769 if (start & (PMD_SIZE - 1)) {
770 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
771 unsigned long pre_end = min_t(unsigned long, end, next_page);
773 __unmap_pmd_range(pud, pmd, start, pre_end);
780 * Try to unmap in 2M chunks.
782 while (end - start >= PMD_SIZE) {
786 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
796 return __unmap_pmd_range(pud, pmd, start, end);
799 * Try again to free the PMD page if haven't succeeded above.
802 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
806 static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
808 pud_t *pud = pud_offset(pgd, start);
811 * Not on a GB page boundary?
813 if (start & (PUD_SIZE - 1)) {
814 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
815 unsigned long pre_end = min_t(unsigned long, end, next_page);
817 unmap_pmd_range(pud, start, pre_end);
824 * Try to unmap in 1G chunks?
826 while (end - start >= PUD_SIZE) {
831 unmap_pmd_range(pud, start, start + PUD_SIZE);
841 unmap_pmd_range(pud, start, end);
844 * No need to try to free the PUD page because we'll free it in
845 * populate_pgd's error path
849 static void unmap_pgd_range(pgd_t *root, unsigned long addr, unsigned long end)
851 pgd_t *pgd_entry = root + pgd_index(addr);
853 unmap_pud_range(pgd_entry, addr, end);
855 if (try_to_free_pud_page((pud_t *)pgd_page_vaddr(*pgd_entry)))
856 pgd_clear(pgd_entry);
859 static int alloc_pte_page(pmd_t *pmd)
861 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
865 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
869 static int alloc_pmd_page(pud_t *pud)
871 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
875 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
879 static void populate_pte(struct cpa_data *cpa,
880 unsigned long start, unsigned long end,
881 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
885 pte = pte_offset_kernel(pmd, start);
887 while (num_pages-- && start < end) {
889 /* deal with the NX bit */
890 if (!(pgprot_val(pgprot) & _PAGE_NX))
891 cpa->pfn &= ~_PAGE_NX;
893 set_pte(pte, pfn_pte(cpa->pfn >> PAGE_SHIFT, pgprot));
896 cpa->pfn += PAGE_SIZE;
901 static int populate_pmd(struct cpa_data *cpa,
902 unsigned long start, unsigned long end,
903 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
905 unsigned int cur_pages = 0;
910 * Not on a 2M boundary?
912 if (start & (PMD_SIZE - 1)) {
913 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
914 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
916 pre_end = min_t(unsigned long, pre_end, next_page);
917 cur_pages = (pre_end - start) >> PAGE_SHIFT;
918 cur_pages = min_t(unsigned int, num_pages, cur_pages);
923 pmd = pmd_offset(pud, start);
925 if (alloc_pte_page(pmd))
928 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
934 * We mapped them all?
936 if (num_pages == cur_pages)
939 pmd_pgprot = pgprot_4k_2_large(pgprot);
941 while (end - start >= PMD_SIZE) {
944 * We cannot use a 1G page so allocate a PMD page if needed.
947 if (alloc_pmd_page(pud))
950 pmd = pmd_offset(pud, start);
952 set_pmd(pmd, __pmd(cpa->pfn | _PAGE_PSE |
953 massage_pgprot(pmd_pgprot)));
956 cpa->pfn += PMD_SIZE;
957 cur_pages += PMD_SIZE >> PAGE_SHIFT;
961 * Map trailing 4K pages.
964 pmd = pmd_offset(pud, start);
966 if (alloc_pte_page(pmd))
969 populate_pte(cpa, start, end, num_pages - cur_pages,
975 static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
983 end = start + (cpa->numpages << PAGE_SHIFT);
986 * Not on a Gb page boundary? => map everything up to it with
989 if (start & (PUD_SIZE - 1)) {
990 unsigned long pre_end;
991 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
993 pre_end = min_t(unsigned long, end, next_page);
994 cur_pages = (pre_end - start) >> PAGE_SHIFT;
995 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
997 pud = pud_offset(pgd, start);
1003 if (alloc_pmd_page(pud))
1006 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1014 /* We mapped them all? */
1015 if (cpa->numpages == cur_pages)
1018 pud = pud_offset(pgd, start);
1019 pud_pgprot = pgprot_4k_2_large(pgprot);
1022 * Map everything starting from the Gb boundary, possibly with 1G pages
1024 while (end - start >= PUD_SIZE) {
1025 set_pud(pud, __pud(cpa->pfn | _PAGE_PSE |
1026 massage_pgprot(pud_pgprot)));
1029 cpa->pfn += PUD_SIZE;
1030 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1034 /* Map trailing leftover */
1038 pud = pud_offset(pgd, start);
1040 if (alloc_pmd_page(pud))
1043 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1054 * Restrictions for kernel page table do not necessarily apply when mapping in
1057 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1059 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1060 pud_t *pud = NULL; /* shut up gcc */
1064 pgd_entry = cpa->pgd + pgd_index(addr);
1067 * Allocate a PUD page and hand it down for mapping.
1069 if (pgd_none(*pgd_entry)) {
1070 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1074 set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
1077 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1078 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1080 ret = populate_pud(cpa, addr, pgd_entry, pgprot);
1082 unmap_pgd_range(cpa->pgd, addr,
1083 addr + (cpa->numpages << PAGE_SHIFT));
1087 cpa->numpages = ret;
1091 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1095 return populate_pgd(cpa, vaddr);
1098 * Ignore all non primary paths.
1104 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1106 * Also set numpages to '1' indicating that we processed cpa req for
1107 * one virtual address page and its pfn. TBD: numpages can be set based
1108 * on the initial value and the level returned by lookup_address().
1110 if (within(vaddr, PAGE_OFFSET,
1111 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1113 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1116 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1117 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1124 static int __change_page_attr(struct cpa_data *cpa, int primary)
1126 unsigned long address;
1129 pte_t *kpte, old_pte;
1131 if (cpa->flags & CPA_PAGES_ARRAY) {
1132 struct page *page = cpa->pages[cpa->curpage];
1133 if (unlikely(PageHighMem(page)))
1135 address = (unsigned long)page_address(page);
1136 } else if (cpa->flags & CPA_ARRAY)
1137 address = cpa->vaddr[cpa->curpage];
1139 address = *cpa->vaddr;
1141 kpte = _lookup_address_cpa(cpa, address, &level);
1143 return __cpa_process_fault(cpa, address, primary);
1146 if (!pte_val(old_pte))
1147 return __cpa_process_fault(cpa, address, primary);
1149 if (level == PG_LEVEL_4K) {
1151 pgprot_t new_prot = pte_pgprot(old_pte);
1152 unsigned long pfn = pte_pfn(old_pte);
1154 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1155 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1157 new_prot = static_protections(new_prot, address, pfn);
1160 * Set the GLOBAL flags only if the PRESENT flag is
1161 * set otherwise pte_present will return true even on
1162 * a non present pte. The canon_pgprot will clear
1163 * _PAGE_GLOBAL for the ancient hardware that doesn't
1166 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1167 pgprot_val(new_prot) |= _PAGE_GLOBAL;
1169 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1172 * We need to keep the pfn from the existing PTE,
1173 * after all we're only going to change it's attributes
1174 * not the memory it points to
1176 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1179 * Do we really change anything ?
1181 if (pte_val(old_pte) != pte_val(new_pte)) {
1182 set_pte_atomic(kpte, new_pte);
1183 cpa->flags |= CPA_FLUSHTLB;
1190 * Check, whether we can keep the large page intact
1191 * and just change the pte:
1193 do_split = try_preserve_large_page(kpte, address, cpa);
1195 * When the range fits into the existing large page,
1196 * return. cp->numpages and cpa->tlbflush have been updated in
1203 * We have to split the large page:
1205 err = split_large_page(cpa, kpte, address);
1208 * Do a global flush tlb after splitting the large page
1209 * and before we do the actual change page attribute in the PTE.
1211 * With out this, we violate the TLB application note, that says
1212 * "The TLBs may contain both ordinary and large-page
1213 * translations for a 4-KByte range of linear addresses. This
1214 * may occur if software modifies the paging structures so that
1215 * the page size used for the address range changes. If the two
1216 * translations differ with respect to page frame or attributes
1217 * (e.g., permissions), processor behavior is undefined and may
1218 * be implementation-specific."
1220 * We do this global tlb flush inside the cpa_lock, so that we
1221 * don't allow any other cpu, with stale tlb entries change the
1222 * page attribute in parallel, that also falls into the
1223 * just split large page entry.
1232 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1234 static int cpa_process_alias(struct cpa_data *cpa)
1236 struct cpa_data alias_cpa;
1237 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1238 unsigned long vaddr;
1241 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1245 * No need to redo, when the primary call touched the direct
1248 if (cpa->flags & CPA_PAGES_ARRAY) {
1249 struct page *page = cpa->pages[cpa->curpage];
1250 if (unlikely(PageHighMem(page)))
1252 vaddr = (unsigned long)page_address(page);
1253 } else if (cpa->flags & CPA_ARRAY)
1254 vaddr = cpa->vaddr[cpa->curpage];
1256 vaddr = *cpa->vaddr;
1258 if (!(within(vaddr, PAGE_OFFSET,
1259 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1262 alias_cpa.vaddr = &laddr;
1263 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1265 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1270 #ifdef CONFIG_X86_64
1272 * If the primary call didn't touch the high mapping already
1273 * and the physical address is inside the kernel map, we need
1274 * to touch the high mapped kernel as well:
1276 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1277 within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
1278 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1279 __START_KERNEL_map - phys_base;
1281 alias_cpa.vaddr = &temp_cpa_vaddr;
1282 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1285 * The high mapping range is imprecise, so ignore the
1288 __change_page_attr_set_clr(&alias_cpa, 0);
1295 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1297 int ret, numpages = cpa->numpages;
1301 * Store the remaining nr of pages for the large page
1302 * preservation check.
1304 cpa->numpages = numpages;
1305 /* for array changes, we can't use large page */
1306 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1309 if (!debug_pagealloc)
1310 spin_lock(&cpa_lock);
1311 ret = __change_page_attr(cpa, checkalias);
1312 if (!debug_pagealloc)
1313 spin_unlock(&cpa_lock);
1318 ret = cpa_process_alias(cpa);
1324 * Adjust the number of pages with the result of the
1325 * CPA operation. Either a large page has been
1326 * preserved or a single page update happened.
1328 BUG_ON(cpa->numpages > numpages);
1329 numpages -= cpa->numpages;
1330 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1333 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1339 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1340 pgprot_t mask_set, pgprot_t mask_clr,
1341 int force_split, int in_flag,
1342 struct page **pages)
1344 struct cpa_data cpa;
1345 int ret, cache, checkalias;
1346 unsigned long baddr = 0;
1348 memset(&cpa, 0, sizeof(cpa));
1351 * Check, if we are requested to change a not supported
1354 mask_set = canon_pgprot(mask_set);
1355 mask_clr = canon_pgprot(mask_clr);
1356 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1359 /* Ensure we are PAGE_SIZE aligned */
1360 if (in_flag & CPA_ARRAY) {
1362 for (i = 0; i < numpages; i++) {
1363 if (addr[i] & ~PAGE_MASK) {
1364 addr[i] &= PAGE_MASK;
1368 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1370 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1371 * No need to cehck in that case
1373 if (*addr & ~PAGE_MASK) {
1376 * People should not be passing in unaligned addresses:
1381 * Save address for cache flush. *addr is modified in the call
1382 * to __change_page_attr_set_clr() below.
1387 /* Must avoid aliasing mappings in the highmem code */
1388 kmap_flush_unused();
1394 cpa.numpages = numpages;
1395 cpa.mask_set = mask_set;
1396 cpa.mask_clr = mask_clr;
1399 cpa.force_split = force_split;
1401 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1402 cpa.flags |= in_flag;
1404 /* No alias checking for _NX bit modifications */
1405 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1407 ret = __change_page_attr_set_clr(&cpa, checkalias);
1410 * Check whether we really changed something:
1412 if (!(cpa.flags & CPA_FLUSHTLB))
1416 * No need to flush, when we did not set any of the caching
1419 cache = !!pgprot2cachemode(mask_set);
1422 * On success we use CLFLUSH, when the CPU supports it to
1423 * avoid the WBINVD. If the CPU does not support it and in the
1424 * error case we fall back to cpa_flush_all (which uses
1427 if (!ret && cpu_has_clflush) {
1428 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1429 cpa_flush_array(addr, numpages, cache,
1432 cpa_flush_range(baddr, numpages, cache);
1434 cpa_flush_all(cache);
1440 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1441 pgprot_t mask, int array)
1443 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1444 (array ? CPA_ARRAY : 0), NULL);
1447 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1448 pgprot_t mask, int array)
1450 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1451 (array ? CPA_ARRAY : 0), NULL);
1454 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1457 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1458 CPA_PAGES_ARRAY, pages);
1461 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1464 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1465 CPA_PAGES_ARRAY, pages);
1468 int _set_memory_uc(unsigned long addr, int numpages)
1471 * for now UC MINUS. see comments in ioremap_nocache()
1472 * If you really need strong UC use ioremap_uc(), but note
1473 * that you cannot override IO areas with set_memory_*() as
1474 * these helpers cannot work with IO memory.
1476 return change_page_attr_set(&addr, numpages,
1477 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1481 int set_memory_uc(unsigned long addr, int numpages)
1486 * for now UC MINUS. see comments in ioremap_nocache()
1488 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1489 _PAGE_CACHE_MODE_UC_MINUS, NULL);
1493 ret = _set_memory_uc(addr, numpages);
1500 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1504 EXPORT_SYMBOL(set_memory_uc);
1506 static int _set_memory_array(unsigned long *addr, int addrinarray,
1507 enum page_cache_mode new_type)
1509 enum page_cache_mode set_type;
1513 for (i = 0; i < addrinarray; i++) {
1514 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1520 /* If WC, set to UC- first and then WC */
1521 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1522 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1524 ret = change_page_attr_set(addr, addrinarray,
1525 cachemode2pgprot(set_type), 1);
1527 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1528 ret = change_page_attr_set_clr(addr, addrinarray,
1530 _PAGE_CACHE_MODE_WC),
1531 __pgprot(_PAGE_CACHE_MASK),
1532 0, CPA_ARRAY, NULL);
1539 for (j = 0; j < i; j++)
1540 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1545 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1547 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1549 EXPORT_SYMBOL(set_memory_array_uc);
1551 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1553 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1555 EXPORT_SYMBOL(set_memory_array_wc);
1557 int set_memory_array_wt(unsigned long *addr, int addrinarray)
1559 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1561 EXPORT_SYMBOL_GPL(set_memory_array_wt);
1563 int _set_memory_wc(unsigned long addr, int numpages)
1566 unsigned long addr_copy = addr;
1568 ret = change_page_attr_set(&addr, numpages,
1569 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1572 ret = change_page_attr_set_clr(&addr_copy, numpages,
1574 _PAGE_CACHE_MODE_WC),
1575 __pgprot(_PAGE_CACHE_MASK),
1581 int set_memory_wc(unsigned long addr, int numpages)
1585 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1586 _PAGE_CACHE_MODE_WC, NULL);
1590 ret = _set_memory_wc(addr, numpages);
1592 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1596 EXPORT_SYMBOL(set_memory_wc);
1598 int _set_memory_wt(unsigned long addr, int numpages)
1600 return change_page_attr_set(&addr, numpages,
1601 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1604 int set_memory_wt(unsigned long addr, int numpages)
1608 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1609 _PAGE_CACHE_MODE_WT, NULL);
1613 ret = _set_memory_wt(addr, numpages);
1615 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1619 EXPORT_SYMBOL_GPL(set_memory_wt);
1621 int _set_memory_wb(unsigned long addr, int numpages)
1623 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1624 return change_page_attr_clear(&addr, numpages,
1625 __pgprot(_PAGE_CACHE_MASK), 0);
1628 int set_memory_wb(unsigned long addr, int numpages)
1632 ret = _set_memory_wb(addr, numpages);
1636 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1639 EXPORT_SYMBOL(set_memory_wb);
1641 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1646 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1647 ret = change_page_attr_clear(addr, addrinarray,
1648 __pgprot(_PAGE_CACHE_MASK), 1);
1652 for (i = 0; i < addrinarray; i++)
1653 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1657 EXPORT_SYMBOL(set_memory_array_wb);
1659 int set_memory_x(unsigned long addr, int numpages)
1661 if (!(__supported_pte_mask & _PAGE_NX))
1664 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1666 EXPORT_SYMBOL(set_memory_x);
1668 int set_memory_nx(unsigned long addr, int numpages)
1670 if (!(__supported_pte_mask & _PAGE_NX))
1673 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1675 EXPORT_SYMBOL(set_memory_nx);
1677 int set_memory_ro(unsigned long addr, int numpages)
1679 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1682 int set_memory_rw(unsigned long addr, int numpages)
1684 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1687 int set_memory_np(unsigned long addr, int numpages)
1689 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1692 int set_memory_4k(unsigned long addr, int numpages)
1694 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1695 __pgprot(0), 1, 0, NULL);
1698 int set_pages_uc(struct page *page, int numpages)
1700 unsigned long addr = (unsigned long)page_address(page);
1702 return set_memory_uc(addr, numpages);
1704 EXPORT_SYMBOL(set_pages_uc);
1706 static int _set_pages_array(struct page **pages, int addrinarray,
1707 enum page_cache_mode new_type)
1709 unsigned long start;
1711 enum page_cache_mode set_type;
1716 for (i = 0; i < addrinarray; i++) {
1717 if (PageHighMem(pages[i]))
1719 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1720 end = start + PAGE_SIZE;
1721 if (reserve_memtype(start, end, new_type, NULL))
1725 /* If WC, set to UC- first and then WC */
1726 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1727 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1729 ret = cpa_set_pages_array(pages, addrinarray,
1730 cachemode2pgprot(set_type));
1731 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1732 ret = change_page_attr_set_clr(NULL, addrinarray,
1734 _PAGE_CACHE_MODE_WC),
1735 __pgprot(_PAGE_CACHE_MASK),
1736 0, CPA_PAGES_ARRAY, pages);
1739 return 0; /* Success */
1742 for (i = 0; i < free_idx; i++) {
1743 if (PageHighMem(pages[i]))
1745 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1746 end = start + PAGE_SIZE;
1747 free_memtype(start, end);
1752 int set_pages_array_uc(struct page **pages, int addrinarray)
1754 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1756 EXPORT_SYMBOL(set_pages_array_uc);
1758 int set_pages_array_wc(struct page **pages, int addrinarray)
1760 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
1762 EXPORT_SYMBOL(set_pages_array_wc);
1764 int set_pages_array_wt(struct page **pages, int addrinarray)
1766 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1768 EXPORT_SYMBOL_GPL(set_pages_array_wt);
1770 int set_pages_wb(struct page *page, int numpages)
1772 unsigned long addr = (unsigned long)page_address(page);
1774 return set_memory_wb(addr, numpages);
1776 EXPORT_SYMBOL(set_pages_wb);
1778 int set_pages_array_wb(struct page **pages, int addrinarray)
1781 unsigned long start;
1785 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1786 retval = cpa_clear_pages_array(pages, addrinarray,
1787 __pgprot(_PAGE_CACHE_MASK));
1791 for (i = 0; i < addrinarray; i++) {
1792 if (PageHighMem(pages[i]))
1794 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1795 end = start + PAGE_SIZE;
1796 free_memtype(start, end);
1801 EXPORT_SYMBOL(set_pages_array_wb);
1803 int set_pages_x(struct page *page, int numpages)
1805 unsigned long addr = (unsigned long)page_address(page);
1807 return set_memory_x(addr, numpages);
1809 EXPORT_SYMBOL(set_pages_x);
1811 int set_pages_nx(struct page *page, int numpages)
1813 unsigned long addr = (unsigned long)page_address(page);
1815 return set_memory_nx(addr, numpages);
1817 EXPORT_SYMBOL(set_pages_nx);
1819 int set_pages_ro(struct page *page, int numpages)
1821 unsigned long addr = (unsigned long)page_address(page);
1823 return set_memory_ro(addr, numpages);
1826 int set_pages_rw(struct page *page, int numpages)
1828 unsigned long addr = (unsigned long)page_address(page);
1830 return set_memory_rw(addr, numpages);
1833 #ifdef CONFIG_DEBUG_PAGEALLOC
1835 static int __set_pages_p(struct page *page, int numpages)
1837 unsigned long tempaddr = (unsigned long) page_address(page);
1838 struct cpa_data cpa = { .vaddr = &tempaddr,
1840 .numpages = numpages,
1841 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1842 .mask_clr = __pgprot(0),
1846 * No alias checking needed for setting present flag. otherwise,
1847 * we may need to break large pages for 64-bit kernel text
1848 * mappings (this adds to complexity if we want to do this from
1849 * atomic context especially). Let's keep it simple!
1851 return __change_page_attr_set_clr(&cpa, 0);
1854 static int __set_pages_np(struct page *page, int numpages)
1856 unsigned long tempaddr = (unsigned long) page_address(page);
1857 struct cpa_data cpa = { .vaddr = &tempaddr,
1859 .numpages = numpages,
1860 .mask_set = __pgprot(0),
1861 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1865 * No alias checking needed for setting not present flag. otherwise,
1866 * we may need to break large pages for 64-bit kernel text
1867 * mappings (this adds to complexity if we want to do this from
1868 * atomic context especially). Let's keep it simple!
1870 return __change_page_attr_set_clr(&cpa, 0);
1873 void __kernel_map_pages(struct page *page, int numpages, int enable)
1875 if (PageHighMem(page))
1878 debug_check_no_locks_freed(page_address(page),
1879 numpages * PAGE_SIZE);
1883 * The return value is ignored as the calls cannot fail.
1884 * Large pages for identity mappings are not used at boot time
1885 * and hence no memory allocations during large page split.
1888 __set_pages_p(page, numpages);
1890 __set_pages_np(page, numpages);
1893 * We should perform an IPI and flush all tlbs,
1894 * but that can deadlock->flush only current cpu:
1898 arch_flush_lazy_mmu_mode();
1901 #ifdef CONFIG_HIBERNATION
1903 bool kernel_page_present(struct page *page)
1908 if (PageHighMem(page))
1911 pte = lookup_address((unsigned long)page_address(page), &level);
1912 return (pte_val(*pte) & _PAGE_PRESENT);
1915 #endif /* CONFIG_HIBERNATION */
1917 #endif /* CONFIG_DEBUG_PAGEALLOC */
1919 int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
1920 unsigned numpages, unsigned long page_flags)
1922 int retval = -EINVAL;
1924 struct cpa_data cpa = {
1928 .numpages = numpages,
1929 .mask_set = __pgprot(0),
1930 .mask_clr = __pgprot(0),
1934 if (!(__supported_pte_mask & _PAGE_NX))
1937 if (!(page_flags & _PAGE_NX))
1938 cpa.mask_clr = __pgprot(_PAGE_NX);
1940 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
1942 retval = __change_page_attr_set_clr(&cpa, 0);
1949 void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
1952 unmap_pgd_range(root, address, address + (numpages << PAGE_SHIFT));
1956 * The testcases use internal knowledge of the implementation that shouldn't
1957 * be exposed to the rest of the kernel. Include these directly here.
1959 #ifdef CONFIG_CPA_DEBUG
1960 #include "pageattr-test.c"