2 * arch/xtensa/kernel/entry.S
4 * Low-level exception handling
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 * Copyright (C) 2004 - 2008 by Tensilica Inc.
12 * Chris Zankel <chris@zankel.net>
16 #include <linux/linkage.h>
17 #include <asm/asm-offsets.h>
18 #include <asm/processor.h>
19 #include <asm/coprocessor.h>
20 #include <asm/thread_info.h>
21 #include <asm/uaccess.h>
22 #include <asm/unistd.h>
23 #include <asm/ptrace.h>
24 #include <asm/current.h>
25 #include <asm/pgtable.h>
27 #include <asm/signal.h>
28 #include <asm/tlbflush.h>
29 #include <variant/tie-asm.h>
31 /* Unimplemented features. */
33 #undef KERNEL_STACK_OVERFLOW_CHECK
34 #undef PREEMPTIBLE_KERNEL
35 #undef ALLOCA_EXCEPTION_IN_IRAM
43 * Macro to find first bit set in WINDOWBASE from the left + 1
50 .macro ffs_ws bit mask
53 nsau \bit, \mask # 32-WSBITS ... 31 (32 iff 0)
54 addi \bit, \bit, WSBITS - 32 + 1 # uppest bit set -> return 1
58 _bltui \mask, 0x10000, 99f
60 extui \mask, \mask, 16, 16
63 99: _bltui \mask, 0x100, 99f
67 99: _bltui \mask, 0x10, 99f
70 99: _bltui \mask, 0x4, 99f
73 99: _bltui \mask, 0x2, 99f
80 /* ----------------- DEFAULT FIRST LEVEL EXCEPTION HANDLERS ----------------- */
83 * First-level exception handler for user exceptions.
84 * Save some special registers, extra states and all registers in the AR
85 * register file that were in use in the user task, and jump to the common
87 * We save SAR (used to calculate WMASK), and WB and WS (we don't have to
88 * save them for kernel exceptions).
90 * Entry condition for user_exception:
92 * a0: trashed, original value saved on stack (PT_AREG0)
94 * a2: new stack pointer, original value in depc
96 * depc: a2, original value saved on stack (PT_DEPC)
99 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
100 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
102 * Entry condition for _user_exception:
104 * a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC
105 * excsave has been restored, and
106 * stack pointer (a1) has been set.
108 * Note: _user_exception might be at an odd address. Don't use call0..call12
111 ENTRY(user_exception)
113 /* Save a2, a3, and depc, restore excsave_1 and set SP. */
117 s32i a1, a2, PT_AREG1
118 s32i a0, a2, PT_AREG2
119 s32i a3, a2, PT_AREG3
122 .globl _user_exception
125 /* Save SAR and turn off single stepping */
131 s32i a2, a1, PT_ICOUNTLEVEL
133 #if XCHAL_HAVE_THREADPTR
135 s32i a2, a1, PT_THREADPTR
138 /* Rotate ws so that the current windowbase is at bit0. */
139 /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */
144 s32i a2, a1, PT_WINDOWBASE
145 s32i a3, a1, PT_WINDOWSTART
146 slli a2, a3, 32-WSBITS
148 srli a2, a2, 32-WSBITS
149 s32i a2, a1, PT_WMASK # needed for restoring registers
151 /* Save only live registers. */
154 s32i a4, a1, PT_AREG4
155 s32i a5, a1, PT_AREG5
156 s32i a6, a1, PT_AREG6
157 s32i a7, a1, PT_AREG7
159 s32i a8, a1, PT_AREG8
160 s32i a9, a1, PT_AREG9
161 s32i a10, a1, PT_AREG10
162 s32i a11, a1, PT_AREG11
164 s32i a12, a1, PT_AREG12
165 s32i a13, a1, PT_AREG13
166 s32i a14, a1, PT_AREG14
167 s32i a15, a1, PT_AREG15
168 _bnei a2, 1, 1f # only one valid frame?
170 /* Only one valid frame, skip saving regs. */
174 /* Save the remaining registers.
175 * We have to save all registers up to the first '1' from
176 * the right, except the current frame (bit 0).
177 * Assume a2 is: 001001000110001
178 * All register frames starting from the top field to the marked '1'
182 1: addi a3, a2, -1 # eliminate '1' in bit 0: yyyyxxww0
183 neg a3, a3 # yyyyxxww0 -> YYYYXXWW1+1
184 and a3, a3, a2 # max. only one bit is set
186 /* Find number of frames to save */
188 ffs_ws a0, a3 # number of frames to the '1' from left
190 /* Store information into WMASK:
191 * bits 0..3: xxx1 masked lower 4 bits of the rotated windowstart,
192 * bits 4...: number of valid 4-register frames
195 slli a3, a0, 4 # number of frames to save in bits 8..4
196 extui a2, a2, 0, 4 # mask for the first 16 registers
198 s32i a2, a1, PT_WMASK # needed when we restore the reg-file
200 /* Save 4 registers at a time */
203 s32i a0, a5, PT_AREG_END - 16
204 s32i a1, a5, PT_AREG_END - 12
205 s32i a2, a5, PT_AREG_END - 8
206 s32i a3, a5, PT_AREG_END - 4
211 /* WINDOWBASE still in SAR! */
213 rsr a2, sar # original WINDOWBASE
217 wsr a3, windowstart # set corresponding WINDOWSTART bit
218 wsr a2, windowbase # and WINDOWSTART
221 /* We are back to the original stack pointer (a1) */
223 2: /* Now, jump to the common exception handler. */
227 ENDPROC(user_exception)
230 * First-level exit handler for kernel exceptions
231 * Save special registers and the live window frame.
232 * Note: Even though we changes the stack pointer, we don't have to do a
233 * MOVSP here, as we do that when we return from the exception.
234 * (See comment in the kernel exception exit code)
236 * Entry condition for kernel_exception:
238 * a0: trashed, original value saved on stack (PT_AREG0)
240 * a2: new stack pointer, original in DEPC
242 * depc: a2, original value saved on stack (PT_DEPC)
245 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
246 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
248 * Entry condition for _kernel_exception:
250 * a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC
251 * excsave has been restored, and
252 * stack pointer (a1) has been set.
254 * Note: _kernel_exception might be at an odd address. Don't use call0..call12
257 ENTRY(kernel_exception)
259 /* Save a0, a2, a3, DEPC and set SP. */
261 xsr a3, excsave1 # restore a3, excsave_1
262 rsr a0, depc # get a2
263 s32i a1, a2, PT_AREG1
264 s32i a0, a2, PT_AREG2
265 s32i a3, a2, PT_AREG3
268 .globl _kernel_exception
271 /* Save SAR and turn off single stepping */
277 s32i a2, a1, PT_ICOUNTLEVEL
279 /* Rotate ws so that the current windowbase is at bit0. */
280 /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */
282 rsr a2, windowbase # don't need to save these, we only
283 rsr a3, windowstart # need shifted windowstart: windowmask
285 slli a2, a3, 32-WSBITS
287 srli a2, a2, 32-WSBITS
288 s32i a2, a1, PT_WMASK # needed for kernel_exception_exit
290 /* Save only the live window-frame */
293 s32i a4, a1, PT_AREG4
294 s32i a5, a1, PT_AREG5
295 s32i a6, a1, PT_AREG6
296 s32i a7, a1, PT_AREG7
298 s32i a8, a1, PT_AREG8
299 s32i a9, a1, PT_AREG9
300 s32i a10, a1, PT_AREG10
301 s32i a11, a1, PT_AREG11
303 s32i a12, a1, PT_AREG12
304 s32i a13, a1, PT_AREG13
305 s32i a14, a1, PT_AREG14
306 s32i a15, a1, PT_AREG15
310 #ifdef KERNEL_STACK_OVERFLOW_CHECK
312 /* Stack overflow check, for debugging */
313 extui a2, a1, TASK_SIZE_BITS,XX
315 _bge a2, a3, out_of_stack_panic
320 * This is the common exception handler.
321 * We get here from the user exception handler or simply by falling through
322 * from the kernel exception handler.
323 * Save the remaining special registers, switch to kernel mode, and jump
324 * to the second-level exception handler.
330 /* Save some registers, disable loops and clear the syscall flag. */
334 s32i a2, a1, PT_DEBUGCAUSE
339 s32i a2, a1, PT_SYSCALL
341 s32i a3, a1, PT_EXCVADDR
343 s32i a2, a1, PT_LCOUNT
345 /* It is now save to restore the EXC_TABLE_FIXUP variable. */
350 s32i a0, a1, PT_EXCCAUSE
351 s32i a3, a2, EXC_TABLE_FIXUP
353 /* All unrecoverable states are saved on stack, now, and a1 is valid,
354 * so we can allow exceptions and interrupts (*) again.
355 * Set PS(EXCM = 0, UM = 0, RING = 0, OWB = 0, WOE = 1, INTLEVEL = X)
357 * (*) We only allow interrupts if they were previously enabled and
358 * we're not handling an IRQ
362 addi a0, a0, -EXCCAUSE_LEVEL1_INTERRUPT
364 extui a3, a3, PS_INTLEVEL_SHIFT, PS_INTLEVEL_WIDTH
366 moveqz a3, a2, a0 # a3 = LOCKLEVEL iff interrupt
367 movi a2, 1 << PS_WOE_BIT
372 s32i a3, a1, PT_PS # save ps
374 /* Save lbeg, lend */
383 #if XCHAL_HAVE_S32C1I
385 s32i a2, a1, PT_SCOMPARE1
388 /* Save optional registers. */
390 save_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT
392 #ifdef CONFIG_TRACE_IRQFLAGS
394 /* Double exception means we came here with an exception
395 * while PS.EXCM was set, i.e. interrupts disabled.
397 bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
398 l32i a4, a1, PT_EXCCAUSE
399 bnei a4, EXCCAUSE_LEVEL1_INTERRUPT, 1f
400 /* We came here with an interrupt means interrupts were enabled
401 * and we've just disabled them.
403 movi a4, trace_hardirqs_off
408 /* Go to second-level dispatcher. Set up parameters to pass to the
409 * exception handler and call the exception handler.
413 mov a6, a1 # pass stack frame
414 mov a7, a0 # pass EXCCAUSE
416 l32i a4, a4, EXC_TABLE_DEFAULT # load handler
418 /* Call the second-level handler */
422 /* Jump here for exception exit */
423 .global common_exception_return
424 common_exception_return:
426 #ifdef CONFIG_TRACE_IRQFLAGS
428 /* Double exception means we came here with an exception
429 * while PS.EXCM was set, i.e. interrupts disabled.
431 bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
432 l32i a4, a1, PT_EXCCAUSE
433 bnei a4, EXCCAUSE_LEVEL1_INTERRUPT, 1f
434 /* We came here with an interrupt means interrupts were enabled
435 * and we'll reenable them on return.
437 movi a4, trace_hardirqs_on
442 /* Jump if we are returning from kernel exceptions. */
444 1: l32i a3, a1, PT_PS
445 _bbci.l a3, PS_UM_BIT, 4f
449 /* Specific to a user exception exit:
450 * We need to check some flags for signal handling and rescheduling,
451 * and have to restore WB and WS, extra states, and all registers
452 * in the register file that were in use in the user task.
453 * Note that we don't disable interrupts here.
456 GET_THREAD_INFO(a2,a1)
457 l32i a4, a2, TI_FLAGS
459 _bbsi.l a4, TIF_NEED_RESCHED, 3f
460 _bbsi.l a4, TIF_NOTIFY_RESUME, 2f
461 _bbci.l a4, TIF_SIGPENDING, 4f
463 2: l32i a4, a1, PT_DEPC
464 bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 4f
466 /* Call do_signal() */
468 movi a4, do_notify_resume # int do_notify_resume(struct pt_regs*)
475 movi a4, schedule # void schedule (void)
479 4: /* Restore optional registers. */
481 load_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT
483 /* Restore SCOMPARE1 */
485 #if XCHAL_HAVE_S32C1I
486 l32i a2, a1, PT_SCOMPARE1
489 wsr a3, ps /* disable interrupts */
491 _bbci.l a3, PS_UM_BIT, kernel_exception_exit
495 /* Restore the state of the task and return from the exception. */
497 /* Switch to the user thread WINDOWBASE. Save SP temporarily in DEPC */
499 l32i a2, a1, PT_WINDOWBASE
500 l32i a3, a1, PT_WINDOWSTART
501 wsr a1, depc # use DEPC as temp storage
502 wsr a3, windowstart # restore WINDOWSTART
503 ssr a2 # preserve user's WB in the SAR
504 wsr a2, windowbase # switch to user's saved WB
506 rsr a1, depc # restore stack pointer
507 l32i a2, a1, PT_WMASK # register frames saved (in bits 4...9)
508 rotw -1 # we restore a4..a7
509 _bltui a6, 16, 1f # only have to restore current window?
511 /* The working registers are a0 and a3. We are restoring to
512 * a4..a7. Be careful not to destroy what we have just restored.
513 * Note: wmask has the format YYYYM:
514 * Y: number of registers saved in groups of 4
515 * M: 4 bit mask of first 16 registers
521 2: rotw -1 # a0..a3 become a4..a7
522 addi a3, a7, -4*4 # next iteration
523 addi a2, a6, -16 # decrementing Y in WMASK
524 l32i a4, a3, PT_AREG_END + 0
525 l32i a5, a3, PT_AREG_END + 4
526 l32i a6, a3, PT_AREG_END + 8
527 l32i a7, a3, PT_AREG_END + 12
530 /* Clear unrestored registers (don't leak anything to user-land */
532 1: rsr a0, windowbase
536 extui a3, a3, 0, WBBITS
546 /* We are back were we were when we started.
547 * Note: a2 still contains WMASK (if we've returned to the original
548 * frame where we had loaded a2), or at least the lower 4 bits
549 * (if we have restored WSBITS-1 frames).
552 #if XCHAL_HAVE_THREADPTR
553 l32i a3, a1, PT_THREADPTR
557 2: j common_exception_exit
559 /* This is the kernel exception exit.
560 * We avoided to do a MOVSP when we entered the exception, but we
561 * have to do it here.
564 kernel_exception_exit:
566 #ifdef PREEMPTIBLE_KERNEL
568 #ifdef CONFIG_PREEMPT
571 * Note: We've just returned from a call4, so we have
572 * at least 4 addt'l regs.
575 /* Check current_thread_info->preempt_count */
578 l32i a3, a2, TI_PREEMPT
581 l32i a2, a2, TI_FLAGS
589 /* Check if we have to do a movsp.
591 * We only have to do a movsp if the previous window-frame has
592 * been spilled to the *temporary* exception stack instead of the
593 * task's stack. This is the case if the corresponding bit in
594 * WINDOWSTART for the previous window-frame was set before
595 * (not spilled) but is zero now (spilled).
596 * If this bit is zero, all other bits except the one for the
597 * current window frame are also zero. So, we can use a simple test:
598 * 'and' WINDOWSTART and WINDOWSTART-1:
600 * (XXXXXX1[0]* - 1) AND XXXXXX1[0]* = XXXXXX0[0]*
602 * The result is zero only if one bit was set.
604 * (Note: We might have gone through several task switches before
605 * we come back to the current task, so WINDOWBASE might be
606 * different from the time the exception occurred.)
609 /* Test WINDOWSTART before and after the exception.
610 * We actually have WMASK, so we only have to test if it is 1 or not.
613 l32i a2, a1, PT_WMASK
614 _beqi a2, 1, common_exception_exit # Spilled before exception,jump
616 /* Test WINDOWSTART now. If spilled, do the movsp */
621 _bnez a3, common_exception_exit
623 /* Do a movsp (we returned from a call4, so we have at least a0..a7) */
628 s32i a3, a1, PT_SIZE+0
629 s32i a4, a1, PT_SIZE+4
632 s32i a3, a1, PT_SIZE+8
633 s32i a4, a1, PT_SIZE+12
635 /* Common exception exit.
636 * We restore the special register and the current window frame, and
637 * return from the exception.
639 * Note: We expect a2 to hold PT_WMASK
642 common_exception_exit:
644 /* Restore address registers. */
647 l32i a4, a1, PT_AREG4
648 l32i a5, a1, PT_AREG5
649 l32i a6, a1, PT_AREG6
650 l32i a7, a1, PT_AREG7
652 l32i a8, a1, PT_AREG8
653 l32i a9, a1, PT_AREG9
654 l32i a10, a1, PT_AREG10
655 l32i a11, a1, PT_AREG11
657 l32i a12, a1, PT_AREG12
658 l32i a13, a1, PT_AREG13
659 l32i a14, a1, PT_AREG14
660 l32i a15, a1, PT_AREG15
662 /* Restore PC, SAR */
664 1: l32i a2, a1, PT_PC
669 /* Restore LBEG, LEND, LCOUNT */
674 l32i a2, a1, PT_LCOUNT
678 /* We control single stepping through the ICOUNTLEVEL register. */
680 l32i a2, a1, PT_ICOUNTLEVEL
685 /* Check if it was double exception. */
688 l32i a3, a1, PT_AREG3
689 l32i a2, a1, PT_AREG2
690 _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
692 /* Restore a0...a3 and return */
694 l32i a0, a1, PT_AREG0
695 l32i a1, a1, PT_AREG1
699 l32i a0, a1, PT_AREG0
700 l32i a1, a1, PT_AREG1
703 ENDPROC(kernel_exception)
706 * Debug exception handler.
708 * Currently, we don't support KGDB, so only user application can be debugged.
710 * When we get here, a0 is trashed and saved to excsave[debuglevel]
713 ENTRY(debug_exception)
715 rsr a0, SREG_EPS + XCHAL_DEBUGLEVEL
716 bbsi.l a0, PS_EXCM_BIT, 1f # exception mode
718 /* Set EPC1 and EXCCAUSE */
720 wsr a2, depc # save a2 temporarily
721 rsr a2, SREG_EPC + XCHAL_DEBUGLEVEL
724 movi a2, EXCCAUSE_MAPPED_DEBUG
727 /* Restore PS to the value before the debug exc but with PS.EXCM set.*/
729 movi a2, 1 << PS_EXCM_BIT
731 movi a0, debug_exception # restore a3, debug jump vector
733 xsr a0, SREG_EXCSAVE + XCHAL_DEBUGLEVEL
735 /* Switch to kernel/user stack, restore jump vector, and save a0 */
737 bbsi.l a2, PS_UM_BIT, 2f # jump if user mode
739 addi a2, a1, -16-PT_SIZE # assume kernel stack
740 s32i a0, a2, PT_AREG0
742 s32i a1, a2, PT_AREG1
743 s32i a0, a2, PT_DEPC # mark it as a regular exception
745 s32i a3, a2, PT_AREG3
746 s32i a0, a2, PT_AREG2
751 l32i a2, a2, EXC_TABLE_KSTK # load kernel stack pointer
752 s32i a0, a2, PT_AREG0
754 s32i a1, a2, PT_AREG1
757 s32i a3, a2, PT_AREG3
758 s32i a0, a2, PT_AREG2
762 /* Debug exception while in exception mode. */
765 ENDPROC(debug_exception)
768 * We get here in case of an unrecoverable exception.
769 * The only thing we can do is to be nice and print a panic message.
770 * We only produce a single stack frame for panic, so ???
775 * - a0 contains the caller address; original value saved in excsave1.
776 * - the original a0 contains a valid return address (backtrace) or 0.
777 * - a2 contains a valid stackpointer
781 * - If the stack pointer could be invalid, the caller has to setup a
782 * dummy stack pointer (e.g. the stack of the init_task)
784 * - If the return address could be invalid, the caller has to set it
785 * to 0, so the backtrace would stop.
790 .ascii "Unrecoverable error in exception handler\0"
792 ENTRY(unrecoverable_exception)
801 movi a1, (1 << PS_WOE_BIT) | LOCKLEVEL
807 addi a1, a1, PT_REGS_OFFSET
810 movi a6, unrecoverable_text
816 ENDPROC(unrecoverable_exception)
818 /* -------------------------- FAST EXCEPTION HANDLERS ----------------------- */
821 * Fast-handler for alloca exceptions
823 * The ALLOCA handler is entered when user code executes the MOVSP
824 * instruction and the caller's frame is not in the register file.
825 * In this case, the caller frame's a0..a3 are on the stack just
826 * below sp (a1), and this handler moves them.
828 * For "MOVSP <ar>,<as>" without destination register a1, this routine
829 * simply moves the value from <as> to <ar> without moving the save area.
833 * a0: trashed, original value saved on stack (PT_AREG0)
835 * a2: new stack pointer, original in DEPC
837 * depc: a2, original value saved on stack (PT_DEPC)
840 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
841 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
845 #define _EXTUI_MOVSP_SRC(ar) extui ar, ar, 4, 4
846 #define _EXTUI_MOVSP_DST(ar) extui ar, ar, 0, 4
848 #define _EXTUI_MOVSP_SRC(ar) extui ar, ar, 0, 4
849 #define _EXTUI_MOVSP_DST(ar) extui ar, ar, 4, 4
854 /* We shouldn't be in a double exception. */
857 _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, .Lunhandled_double
859 rsr a0, depc # get a2
860 s32i a4, a2, PT_AREG4 # save a4 and
861 s32i a0, a2, PT_AREG2 # a2 to stack
863 /* Exit critical section. */
866 s32i a0, a3, EXC_TABLE_FIXUP
868 /* Restore a3, excsave_1 */
870 xsr a3, excsave1 # make sure excsave_1 is valid for dbl.
871 rsr a4, epc1 # get exception address
872 s32i a3, a2, PT_AREG3 # save a3 to stack
874 #ifdef ALLOCA_EXCEPTION_IN_IRAM
875 #error iram not supported
877 /* Note: l8ui not allowed in IRAM/IROM!! */
878 l8ui a0, a4, 1 # read as(src) from MOVSP instruction
881 _EXTUI_MOVSP_SRC(a0) # extract source register number
887 movi a0, unrecoverable_exception
892 l32i a3, a2, PT_AREG0; _j 1f; .align 8
893 mov a3, a1; _j 1f; .align 8
894 l32i a3, a2, PT_AREG2; _j 1f; .align 8
895 l32i a3, a2, PT_AREG3; _j 1f; .align 8
896 l32i a3, a2, PT_AREG4; _j 1f; .align 8
897 mov a3, a5; _j 1f; .align 8
898 mov a3, a6; _j 1f; .align 8
899 mov a3, a7; _j 1f; .align 8
900 mov a3, a8; _j 1f; .align 8
901 mov a3, a9; _j 1f; .align 8
902 mov a3, a10; _j 1f; .align 8
903 mov a3, a11; _j 1f; .align 8
904 mov a3, a12; _j 1f; .align 8
905 mov a3, a13; _j 1f; .align 8
906 mov a3, a14; _j 1f; .align 8
907 mov a3, a15; _j 1f; .align 8
911 #ifdef ALLOCA_EXCEPTION_IN_IRAM
912 #error iram not supported
914 l8ui a0, a4, 0 # read ar(dst) from MOVSP instruction
916 addi a4, a4, 3 # step over movsp
917 _EXTUI_MOVSP_DST(a0) # extract destination register
918 wsr a4, epc1 # save new epc_1
920 _bnei a0, 1, 1f # no 'movsp a1, ax': jump
922 /* Move the save area. This implies the use of the L32E
923 * and S32E instructions, because this move must be done with
924 * the user's PS.RING privilege levels, not with ring 0
925 * (kernel's) privileges currently active with PS.EXCM
926 * set. Note that we have stil registered a fixup routine with the
927 * double exception vector in case a double exception occurs.
930 /* a0,a4:avail a1:old user stack a2:exc. stack a3:new user stack. */
941 /* Restore stack-pointer and all the other saved registers. */
945 l32i a4, a2, PT_AREG4
946 l32i a3, a2, PT_AREG3
947 l32i a0, a2, PT_AREG0
948 l32i a2, a2, PT_AREG2
951 /* MOVSP <at>,<as> was invoked with <at> != a1.
952 * Because the stack pointer is not being modified,
953 * we should be able to just modify the pointer
954 * without moving any save area.
955 * The processor only traps these occurrences if the
956 * caller window isn't live, so unfortunately we can't
957 * use this as an alternate trap mechanism.
958 * So we just do the move. This requires that we
959 * resolve the destination register, not just the source,
960 * so there's some extra work.
961 * (PERHAPS NOT REALLY NEEDED, BUT CLEANER...)
964 /* a0 dst-reg, a1 user-stack, a2 stack, a3 value of src reg. */
966 1: movi a4, .Lmovsp_dst
972 s32i a3, a2, PT_AREG0; _j 1f; .align 8
973 mov a1, a3; _j 1f; .align 8
974 s32i a3, a2, PT_AREG2; _j 1f; .align 8
975 s32i a3, a2, PT_AREG3; _j 1f; .align 8
976 s32i a3, a2, PT_AREG4; _j 1f; .align 8
977 mov a5, a3; _j 1f; .align 8
978 mov a6, a3; _j 1f; .align 8
979 mov a7, a3; _j 1f; .align 8
980 mov a8, a3; _j 1f; .align 8
981 mov a9, a3; _j 1f; .align 8
982 mov a10, a3; _j 1f; .align 8
983 mov a11, a3; _j 1f; .align 8
984 mov a12, a3; _j 1f; .align 8
985 mov a13, a3; _j 1f; .align 8
986 mov a14, a3; _j 1f; .align 8
987 mov a15, a3; _j 1f; .align 8
989 1: l32i a4, a2, PT_AREG4
990 l32i a3, a2, PT_AREG3
991 l32i a0, a2, PT_AREG0
992 l32i a2, a2, PT_AREG2
1000 * WARNING: The kernel doesn't save the entire user context before
1001 * handling a fast system call. These functions are small and short,
1002 * usually offering some functionality not available to user tasks.
1004 * BE CAREFUL TO PRESERVE THE USER'S CONTEXT.
1008 * a0: trashed, original value saved on stack (PT_AREG0)
1010 * a2: new stack pointer, original in DEPC
1011 * a3: dispatch table
1012 * depc: a2, original value saved on stack (PT_DEPC)
1016 ENTRY(fast_syscall_kernel)
1024 l32i a0, a2, PT_DEPC
1025 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable
1027 rsr a0, depc # get syscall-nr
1028 _beqz a0, fast_syscall_spill_registers
1029 _beqi a0, __NR_xtensa, fast_syscall_xtensa
1033 ENDPROC(fast_syscall_kernel)
1035 ENTRY(fast_syscall_user)
1043 l32i a0, a2, PT_DEPC
1044 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable
1046 rsr a0, depc # get syscall-nr
1047 _beqz a0, fast_syscall_spill_registers
1048 _beqi a0, __NR_xtensa, fast_syscall_xtensa
1052 ENDPROC(fast_syscall_user)
1054 ENTRY(fast_syscall_unrecoverable)
1056 /* Restore all states. */
1058 l32i a0, a2, PT_AREG0 # restore a0
1059 xsr a2, depc # restore a2, depc
1063 movi a0, unrecoverable_exception
1066 ENDPROC(fast_syscall_unrecoverable)
1069 * sysxtensa syscall handler
1071 * int sysxtensa (SYS_XTENSA_ATOMIC_SET, ptr, val, unused);
1072 * int sysxtensa (SYS_XTENSA_ATOMIC_ADD, ptr, val, unused);
1073 * int sysxtensa (SYS_XTENSA_ATOMIC_EXG_ADD, ptr, val, unused);
1074 * int sysxtensa (SYS_XTENSA_ATOMIC_CMP_SWP, ptr, oldval, newval);
1079 * a0: a2 (syscall-nr), original value saved on stack (PT_AREG0)
1081 * a2: new stack pointer, original in a0 and DEPC
1082 * a3: dispatch table, original in excsave_1
1083 * a4..a15: unchanged
1084 * depc: a2, original value saved on stack (PT_DEPC)
1087 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1088 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1090 * Note: we don't have to save a2; a2 holds the return value
1092 * We use the two macros TRY and CATCH:
1094 * TRY adds an entry to the __ex_table fixup table for the immediately
1095 * following instruction.
1097 * CATCH catches any exception that occurred at one of the preceding TRY
1098 * statements and continues from there
1100 * Usage TRY l32i a0, a1, 0
1103 * CATCH <set return code>
1108 .section __ex_table, "a"; \
1116 ENTRY(fast_syscall_xtensa)
1118 xsr a3, excsave1 # restore a3, excsave1
1120 s32i a7, a2, PT_AREG7 # we need an additional register
1121 movi a7, 4 # sizeof(unsigned int)
1122 access_ok a3, a7, a0, a2, .Leac # a0: scratch reg, a2: sp
1124 _bgeui a6, SYS_XTENSA_COUNT, .Lill
1125 _bnei a6, SYS_XTENSA_ATOMIC_CMP_SWP, .Lnswp
1127 /* Fall through for ATOMIC_CMP_SWP. */
1129 .Lswp: /* Atomic compare and swap */
1131 TRY l32i a0, a3, 0 # read old value
1132 bne a0, a4, 1f # same as old value? jump
1133 TRY s32i a5, a3, 0 # different, modify value
1134 l32i a7, a2, PT_AREG7 # restore a7
1135 l32i a0, a2, PT_AREG0 # restore a0
1136 movi a2, 1 # and return 1
1139 1: l32i a7, a2, PT_AREG7 # restore a7
1140 l32i a0, a2, PT_AREG0 # restore a0
1141 movi a2, 0 # return 0 (note that we cannot set
1144 .Lnswp: /* Atomic set, add, and exg_add. */
1146 TRY l32i a7, a3, 0 # orig
1147 addi a6, a6, -SYS_XTENSA_ATOMIC_SET
1148 add a0, a4, a7 # + arg
1149 moveqz a0, a4, a6 # set
1150 addi a6, a6, SYS_XTENSA_ATOMIC_SET
1151 TRY s32i a0, a3, 0 # write new value
1155 l32i a7, a0, PT_AREG7 # restore a7
1156 l32i a0, a0, PT_AREG0 # restore a0
1160 .Leac: l32i a7, a2, PT_AREG7 # restore a7
1161 l32i a0, a2, PT_AREG0 # restore a0
1165 .Lill: l32i a7, a2, PT_AREG7 # restore a7
1166 l32i a0, a2, PT_AREG0 # restore a0
1170 ENDPROC(fast_syscall_xtensa)
1173 /* fast_syscall_spill_registers.
1177 * a0: trashed, original value saved on stack (PT_AREG0)
1179 * a2: new stack pointer, original in DEPC
1180 * a3: dispatch table
1181 * depc: a2, original value saved on stack (PT_DEPC)
1184 * Note: We assume the stack pointer is EXC_TABLE_KSTK in the fixup handler.
1187 ENTRY(fast_syscall_spill_registers)
1189 /* Register a FIXUP handler (pass current wb as a parameter) */
1191 movi a0, fast_syscall_spill_registers_fixup
1192 s32i a0, a3, EXC_TABLE_FIXUP
1194 s32i a0, a3, EXC_TABLE_PARAM
1196 /* Save a3 and SAR on stack. */
1199 xsr a3, excsave1 # restore a3 and excsave_1
1200 s32i a3, a2, PT_AREG3
1201 s32i a4, a2, PT_AREG4
1202 s32i a0, a2, PT_AREG5 # store SAR to PT_AREG5
1204 /* The spill routine might clobber a7, a11, and a15. */
1206 s32i a7, a2, PT_AREG7
1207 s32i a11, a2, PT_AREG11
1208 s32i a15, a2, PT_AREG15
1210 call0 _spill_registers # destroys a3, a4, and SAR
1212 /* Advance PC, restore registers and SAR, and return from exception. */
1214 l32i a3, a2, PT_AREG5
1215 l32i a4, a2, PT_AREG4
1216 l32i a0, a2, PT_AREG0
1218 l32i a3, a2, PT_AREG3
1220 /* Restore clobbered registers. */
1222 l32i a7, a2, PT_AREG7
1223 l32i a11, a2, PT_AREG11
1224 l32i a15, a2, PT_AREG15
1229 ENDPROC(fast_syscall_spill_registers)
1233 * We get here if the spill routine causes an exception, e.g. tlb miss.
1234 * We basically restore WINDOWBASE and WINDOWSTART to the condition when
1235 * we entered the spill routine and jump to the user exception handler.
1237 * a0: value of depc, original value in depc
1238 * a2: trashed, original value in EXC_TABLE_DOUBLE_SAVE
1239 * a3: exctable, original value in excsave1
1242 fast_syscall_spill_registers_fixup:
1244 rsr a2, windowbase # get current windowbase (a2 is saved)
1245 xsr a0, depc # restore depc and a0
1246 ssl a2 # set shift (32 - WB)
1248 /* We need to make sure the current registers (a0-a3) are preserved.
1249 * To do this, we simply set the bit for the current window frame
1250 * in WS, so that the exception handlers save them to the task stack.
1253 rsr a3, excsave1 # get spill-mask
1254 slli a2, a3, 1 # shift left by one
1256 slli a3, a2, 32-WSBITS
1257 src a2, a2, a3 # a1 = xxwww1yyxxxwww1yy......
1258 wsr a2, windowstart # set corrected windowstart
1261 l32i a2, a3, EXC_TABLE_DOUBLE_SAVE # restore a2
1262 l32i a3, a3, EXC_TABLE_PARAM # original WB (in user task)
1264 /* Return to the original (user task) WINDOWBASE.
1265 * We leave the following frame behind:
1267 * a3: trashed (saved in excsave_1)
1268 * depc: depc (we have to return to that address)
1275 /* We are now in the original frame when we entered _spill_registers:
1276 * a0: return address
1277 * a1: used, stack pointer
1278 * a2: kernel stack pointer
1279 * a3: available, saved in EXCSAVE_1
1280 * depc: exception address
1282 * Note: This frame might be the same as above.
1285 /* Setup stack pointer. */
1287 addi a2, a2, -PT_USER_SIZE
1288 s32i a0, a2, PT_AREG0
1290 /* Make sure we return to this fixup handler. */
1292 movi a3, fast_syscall_spill_registers_fixup_return
1293 s32i a3, a2, PT_DEPC # setup depc
1295 /* Jump to the exception handler. */
1299 addx4 a0, a0, a3 # find entry in table
1300 l32i a0, a0, EXC_TABLE_FAST_USER # load handler
1303 fast_syscall_spill_registers_fixup_return:
1305 /* When we return here, all registers have been restored (a2: DEPC) */
1307 wsr a2, depc # exception address
1309 /* Restore fixup handler. */
1312 movi a2, fast_syscall_spill_registers_fixup
1313 s32i a2, a3, EXC_TABLE_FIXUP
1315 s32i a2, a3, EXC_TABLE_PARAM
1316 l32i a2, a3, EXC_TABLE_KSTK
1318 /* Load WB at the time the exception occurred. */
1320 rsr a3, sar # WB is still in SAR
1325 /* Restore a3 and return. */
1334 * spill all registers.
1336 * This is not a real function. The following conditions must be met:
1338 * - must be called with call0.
1339 * - uses a3, a4 and SAR.
1340 * - the last 'valid' register of each frame are clobbered.
1341 * - the caller must have registered a fixup handler
1342 * (or be inside a critical section)
1343 * - PS_EXCM must be set (PS_WOE cleared?)
1346 ENTRY(_spill_registers)
1349 * Rotate ws so that the current windowbase is at bit 0.
1350 * Assume ws = xxxwww1yy (www1 current window frame).
1351 * Rotate ws right so that a4 = yyxxxwww1.
1355 rsr a3, windowstart # a3 = xxxwww1yy
1358 or a3, a3, a4 # a3 = xxxwww1yyxxxwww1yy
1359 srl a3, a3 # a3 = 00xxxwww1yyxxxwww1
1361 /* We are done if there are no more than the current register frame. */
1363 extui a3, a3, 1, WSBITS-1 # a3 = 0yyxxxwww
1364 movi a4, (1 << (WSBITS-1))
1365 _beqz a3, .Lnospill # only one active frame? jump
1367 /* We want 1 at the top, so that we return to the current windowbase */
1369 or a3, a3, a4 # 1yyxxxwww
1371 /* Skip empty frames - get 'oldest' WINDOWSTART-bit. */
1373 wsr a3, windowstart # save shifted windowstart
1375 and a3, a4, a3 # first bit set from right: 000010000
1377 ffs_ws a4, a3 # a4: shifts to skip empty frames
1379 sub a4, a3, a4 # WSBITS-a4:number of 0-bits from right
1380 ssr a4 # save in SAR for later.
1388 srl a3, a3 # shift windowstart
1390 /* WB is now just one frame below the oldest frame in the register
1391 window. WS is shifted so the oldest frame is in bit 0, thus, WB
1392 and WS differ by one 4-register frame. */
1394 /* Save frames. Depending what call was used (call4, call8, call12),
1395 * we have to save 4,8. or 12 registers.
1401 /* Special case: we have a call12-frame starting at a4. */
1403 _bbci.l a3, 3, .Lc12 # bit 3 shouldn't be zero! (Jump to Lc12 first)
1405 s32e a4, a1, -16 # a1 is valid with an empty spill area
1415 .Lloop: _bbsi.l a3, 1, .Lc4
1416 _bbci.l a3, 2, .Lc12
1418 .Lc8: s32e a4, a13, -16
1428 srli a11, a3, 2 # shift windowbase by 2
1432 .Lexit: /* Done. Do the final rotation, set WS, and return. */
1442 .Lc4: s32e a4, a9, -16
1452 .Lc12: _bbci.l a3, 3, .Linvalid_mask # bit 2 shouldn't be zero!
1454 /* 12-register frame (call12) */
1460 .Lc12c: s32e a9, a8, -44
1469 /* The stack pointer for a4..a7 is out of reach, so we rotate the
1470 * window, grab the stackpointer, and rotate back.
1471 * Alternatively, we could also use the following approach, but that
1472 * makes the fixup routine much more complicated:
1495 /* We get here because of an unrecoverable error in the window
1496 * registers. If we are in user space, we kill the application,
1497 * however, this condition is unrecoverable in kernel space.
1501 _bbci.l a0, PS_UM_BIT, 1f
1503 /* User space: Setup a dummy frame and kill application.
1504 * Note: We assume EXC_TABLE_KSTK contains a valid stack pointer.
1517 l32i a1, a3, EXC_TABLE_KSTK
1520 movi a4, (1 << PS_WOE_BIT) | LOCKLEVEL
1528 1: /* Kernel space: PANIC! */
1531 movi a0, unrecoverable_exception
1532 callx0 a0 # should not return
1535 ENDPROC(_spill_registers)
1539 * We should never get here. Bail out!
1542 ENTRY(fast_second_level_miss_double_kernel)
1544 1: movi a0, unrecoverable_exception
1545 callx0 a0 # should not return
1548 ENDPROC(fast_second_level_miss_double_kernel)
1550 /* First-level entry handler for user, kernel, and double 2nd-level
1551 * TLB miss exceptions. Note that for now, user and kernel miss
1552 * exceptions share the same entry point and are handled identically.
1554 * An old, less-efficient C version of this function used to exist.
1555 * We include it below, interleaved as comments, for reference.
1559 * a0: trashed, original value saved on stack (PT_AREG0)
1561 * a2: new stack pointer, original in DEPC
1562 * a3: dispatch table
1563 * depc: a2, original value saved on stack (PT_DEPC)
1566 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1567 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1570 ENTRY(fast_second_level_miss)
1572 /* Save a1. Note: we don't expect a double exception. */
1574 s32i a1, a2, PT_AREG1
1576 /* We need to map the page of PTEs for the user task. Find
1577 * the pointer to that page. Also, it's possible for tsk->mm
1578 * to be NULL while tsk->active_mm is nonzero if we faulted on
1579 * a vmalloc address. In that rare case, we must use
1580 * active_mm instead to avoid a fault in this handler. See
1582 * http://mail.nl.linux.org/linux-mm/2002-08/msg00258.html
1583 * (or search Internet on "mm vs. active_mm")
1586 * mm = tsk->active_mm;
1587 * pgd = pgd_offset (mm, regs->excvaddr);
1588 * pmd = pmd_offset (pgd, regs->excvaddr);
1593 l32i a0, a1, TASK_MM # tsk->mm
1597 /* We deliberately destroy a3 that holds the exception table. */
1599 8: rsr a3, excvaddr # fault address
1600 _PGD_OFFSET(a0, a3, a1)
1601 l32i a0, a0, 0 # read pmdval
1604 /* Read ptevaddr and convert to top of page-table page.
1606 * vpnval = read_ptevaddr_register() & PAGE_MASK;
1607 * vpnval += DTLB_WAY_PGTABLE;
1608 * pteval = mk_pte (virt_to_page(pmd_val(pmdval)), PAGE_KERNEL);
1609 * write_dtlb_entry (pteval, vpnval);
1611 * The messy computation for 'pteval' above really simplifies
1612 * into the following:
1614 * pteval = ((pmdval - PAGE_OFFSET) & PAGE_MASK) | PAGE_DIRECTORY
1617 movi a1, (-PAGE_OFFSET) & 0xffffffff
1618 add a0, a0, a1 # pmdval - PAGE_OFFSET
1619 extui a1, a0, 0, PAGE_SHIFT # ... & PAGE_MASK
1622 movi a1, _PAGE_DIRECTORY
1623 or a0, a0, a1 # ... | PAGE_DIRECTORY
1626 * We utilize all three wired-ways (7-9) to hold pmd translations.
1627 * Memory regions are mapped to the DTLBs according to bits 28 and 29.
1628 * This allows to map the three most common regions to three different
1630 * 0,1 -> way 7 program (0040.0000) and virtual (c000.0000)
1631 * 2 -> way 8 shared libaries (2000.0000)
1632 * 3 -> way 0 stack (3000.0000)
1635 extui a3, a3, 28, 2 # addr. bit 28 and 29 0,1,2,3
1637 addx2 a3, a3, a3 # -> 0,3,6,9
1638 srli a1, a1, PAGE_SHIFT
1639 extui a3, a3, 2, 2 # -> 0,0,1,2
1640 slli a1, a1, PAGE_SHIFT # ptevaddr & PAGE_MASK
1641 addi a3, a3, DTLB_WAY_PGD
1642 add a1, a1, a3 # ... + way_number
1647 /* Exit critical section. */
1649 4: movi a3, exc_table # restore a3
1651 s32i a0, a3, EXC_TABLE_FIXUP
1653 /* Restore the working registers, and return. */
1655 l32i a0, a2, PT_AREG0
1656 l32i a1, a2, PT_AREG1
1657 l32i a2, a2, PT_DEPC
1660 bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
1662 /* Restore excsave1 and return. */
1667 /* Return from double exception. */
1673 9: l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0
1676 #if (DCACHE_WAY_SIZE > PAGE_SIZE)
1678 2: /* Special case for cache aliasing.
1679 * We (should) only get here if a clear_user_page, copy_user_page
1680 * or the aliased cache flush functions got preemptively interrupted
1681 * by another task. Re-establish temporary mapping to the
1682 * TLBTEMP_BASE areas.
1685 /* We shouldn't be in a double exception */
1687 l32i a0, a2, PT_DEPC
1688 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 2f
1690 /* Make sure the exception originated in the special functions */
1692 movi a0, __tlbtemp_mapping_start
1695 movi a0, __tlbtemp_mapping_end
1698 /* Check if excvaddr was in one of the TLBTEMP_BASE areas. */
1700 movi a3, TLBTEMP_BASE_1
1704 addi a1, a0, -TLBTEMP_SIZE
1707 /* Check if we have to restore an ITLB mapping. */
1709 movi a1, __tlbtemp_mapping_itlb
1718 /* Jump for ITLB entry */
1722 /* We can use up to two TLBTEMP areas, one for src and one for dst. */
1724 extui a3, a0, PAGE_SHIFT + DCACHE_ALIAS_ORDER, 1
1727 /* PPN is in a6 for the first TLBTEMP area and in a7 for the second. */
1733 /* ITLB entry. We only use dst in a6. */
1740 #endif // DCACHE_WAY_SIZE > PAGE_SIZE
1743 2: /* Invalid PGD, default exception handling */
1748 s32i a1, a2, PT_AREG2
1749 s32i a3, a2, PT_AREG3
1753 bbsi.l a2, PS_UM_BIT, 1f
1755 1: j _user_exception
1757 ENDPROC(fast_second_level_miss)
1760 * StoreProhibitedException
1762 * Update the pte and invalidate the itlb mapping for this pte.
1766 * a0: trashed, original value saved on stack (PT_AREG0)
1768 * a2: new stack pointer, original in DEPC
1769 * a3: dispatch table
1770 * depc: a2, original value saved on stack (PT_DEPC)
1773 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1774 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1777 ENTRY(fast_store_prohibited)
1779 /* Save a1 and a4. */
1781 s32i a1, a2, PT_AREG1
1782 s32i a4, a2, PT_AREG4
1785 l32i a0, a1, TASK_MM # tsk->mm
1788 8: rsr a1, excvaddr # fault address
1789 _PGD_OFFSET(a0, a1, a4)
1793 /* Note that we assume _PAGE_WRITABLE_BIT is only set if pte is valid.*/
1795 _PTE_OFFSET(a0, a1, a4)
1796 l32i a4, a0, 0 # read pteval
1797 bbci.l a4, _PAGE_WRITABLE_BIT, 2f
1799 movi a1, _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_HW_WRITE
1804 /* We need to flush the cache if we have page coloring. */
1805 #if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
1811 /* Exit critical section. */
1814 s32i a0, a3, EXC_TABLE_FIXUP
1816 /* Restore the working registers, and return. */
1818 l32i a4, a2, PT_AREG4
1819 l32i a1, a2, PT_AREG1
1820 l32i a0, a2, PT_AREG0
1821 l32i a2, a2, PT_DEPC
1823 /* Restore excsave1 and a3. */
1826 bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
1831 /* Double exception. Restore FIXUP handler and return. */
1837 9: l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0
1840 2: /* If there was a problem, handle fault in C */
1842 rsr a4, depc # still holds a2
1844 s32i a4, a2, PT_AREG2
1845 s32i a3, a2, PT_AREG3
1846 l32i a4, a2, PT_AREG4
1850 bbsi.l a2, PS_UM_BIT, 1f
1852 1: j _user_exception
1854 ENDPROC(fast_store_prohibited)
1856 #endif /* CONFIG_MMU */
1861 * void system_call (struct pt_regs* regs, int exccause)
1869 /* regs->syscall = regs->areg[2] */
1871 l32i a3, a2, PT_AREG2
1873 movi a4, do_syscall_trace_enter
1874 s32i a3, a2, PT_SYSCALL
1877 /* syscall = sys_call_table[syscall_nr] */
1879 movi a4, sys_call_table;
1880 movi a5, __NR_syscall_count
1886 movi a5, sys_ni_syscall;
1889 /* Load args: arg0 - arg5 are passed via regs. */
1891 l32i a6, a2, PT_AREG6
1892 l32i a7, a2, PT_AREG3
1893 l32i a8, a2, PT_AREG4
1894 l32i a9, a2, PT_AREG5
1895 l32i a10, a2, PT_AREG8
1896 l32i a11, a2, PT_AREG9
1898 /* Pass one additional argument to the syscall: pt_regs (on stack) */
1903 1: /* regs->areg[2] = return_value */
1905 s32i a6, a2, PT_AREG2
1906 movi a4, do_syscall_trace_leave
1911 ENDPROC(system_call)
1914 * Spill live registers on the kernel stack macro.
1916 * Entry condition: ps.woe is set, ps.excm is cleared
1917 * Exit condition: windowstart has single bit set
1918 * May clobber: a12, a13
1920 .macro spill_registers_kernel
1922 #if XCHAL_NUM_AREGS > 16
1930 #if XCHAL_NUM_AREGS > 32
1931 .rept (XCHAL_NUM_AREGS - 32) / 12
1937 #if XCHAL_NUM_AREGS % 12 == 0
1939 #elif XCHAL_NUM_AREGS % 12 == 4
1941 #elif XCHAL_NUM_AREGS % 12 == 8
1954 * struct task* _switch_to (struct task* prev, struct task* next)
1962 mov a11, a3 # and 'next' (a3)
1964 l32i a4, a2, TASK_THREAD_INFO
1965 l32i a5, a3, TASK_THREAD_INFO
1967 save_xtregs_user a4 a6 a8 a9 a12 a13 THREAD_XTREGS_USER
1969 #if THREAD_RA > 1020 || THREAD_SP > 1020
1970 addi a10, a2, TASK_THREAD
1971 s32i a0, a10, THREAD_RA - TASK_THREAD # save return address
1972 s32i a1, a10, THREAD_SP - TASK_THREAD # save stack pointer
1974 s32i a0, a2, THREAD_RA # save return address
1975 s32i a1, a2, THREAD_SP # save stack pointer
1978 /* Disable ints while we manipulate the stack pointer. */
1983 s32i a3, a3, EXC_TABLE_FIXUP /* enter critical section */
1985 /* Switch CPENABLE */
1987 #if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS)
1988 l32i a3, a5, THREAD_CPENABLE
1990 s32i a3, a4, THREAD_CPENABLE
1993 /* Flush register file. */
1995 spill_registers_kernel
1997 /* Set kernel stack (and leave critical section)
1998 * Note: It's save to set it here. The stack will not be overwritten
1999 * because the kernel stack will only be loaded again after
2000 * we return from kernel space.
2003 rsr a3, excsave1 # exc_table
2005 addi a7, a5, PT_REGS_OFFSET
2006 s32i a6, a3, EXC_TABLE_FIXUP
2007 s32i a7, a3, EXC_TABLE_KSTK
2009 /* restore context of the task 'next' */
2011 l32i a0, a11, THREAD_RA # restore return address
2012 l32i a1, a11, THREAD_SP # restore stack pointer
2014 load_xtregs_user a5 a6 a8 a9 a12 a13 THREAD_XTREGS_USER
2023 ENTRY(ret_from_fork)
2025 /* void schedule_tail (struct task_struct *prev)
2026 * Note: prev is still in a6 (return value from fake call4 frame)
2028 movi a4, schedule_tail
2031 movi a4, do_syscall_trace_leave
2035 j common_exception_return
2037 ENDPROC(ret_from_fork)
2040 * Kernel thread creation helper
2041 * On entry, set up by copy_thread: a2 = thread_fn, a3 = thread_fn arg
2042 * left from _switch_to: a6 = prev
2044 ENTRY(ret_from_kernel_thread)
2049 j common_exception_return
2051 ENDPROC(ret_from_kernel_thread)