board-pmu-tps65910.c

   1 #include <linux/regulator/machine.h>
   2 #include <linux/i2c/twl.h>
   3 #include <linux/mfd/tps65910.h>
   4 #include <mach/sram.h>
   5 #include <linux/platform_device.h>
   6
   7 #include <mach/gpio.h>
   8 #include <mach/iomux.h>
   9
  10 #ifdef CONFIG_MFD_TPS65910
  11
  12 extern int platform_device_register(struct platform_device *pdev);
  13
  14 int tps65910_pre_init(struct tps65910 *tps65910){
  15
  16         int val = 0;
  17         int i   = 0;
  18         int err = -1;
  19
  20         printk("%s,line=%d\n", __func__,__LINE__);
  21
  22         #ifdef CONFIG_RK_CONFIG
  23         if(sram_gpio_init(get_port_config(pmic_slp).gpio, &pmic_sleep) < 0){
  24                 printk(KERN_ERR "sram_gpio_init failed\n");
  25                 return -EINVAL;
  26         }
  27         if(port_output_init(pmic_slp, 0, "pmic_slp") < 0){
  28                 printk(KERN_ERR "port_output_init failed\n");
  29                 return -EINVAL;
  30         }
  31         #else
  32         if(sram_gpio_init(PMU_POWER_SLEEP, &pmic_sleep) < 0){
  33                 printk(KERN_ERR "sram_gpio_init failed\n");
  34                 return -EINVAL;
  35         }
  36
  37         gpio_request(PMU_POWER_SLEEP, "NULL");
  38         gpio_direction_output(PMU_POWER_SLEEP, GPIO_LOW);
  39         #endif
  40
  41
  42         /*************set vdd11 (pll) voltage 1.0v********************/
  43         val = tps65910_reg_read(tps65910, TPS65910_VDIG2);
  44         if (val<0) {
  45                 printk(KERN_ERR "Unable to read TPS65910_VDIG2 reg\n");
  46                 return val;
  47         }
  48         val &= (~(0x3<<2));
  49         err = tps65910_reg_write(tps65910, TPS65910_VDIG2, val);
  50         if (err) {
  51                 printk(KERN_ERR "Unable to write TPS65910_VDIG2 reg\n");
  52                 return err;
  53         }
  54         /****************************************/
  55
  56         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL2);
  57         if (val<0) {
  58                 printk(KERN_ERR "Unable to read TPS65910_DEVCTRL2 reg\n");
  59                 return val;
  60         }
  61         /* Set sleep state active high and allow device turn-off after PWRON long press */
  62         val |= (DEVCTRL2_SLEEPSIG_POL_MASK | DEVCTRL2_PWON_LP_OFF_MASK);
  63
  64         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL2, val);
  65         if (err) {
  66                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL2 reg\n");
  67                 return err;
  68         }
  69
  70          #if 1
  71         /* set PSKIP=0 */
  72         val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
  73         if (val<0) {
  74                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
  75                 return val;
  76         }
  77
  78         val &= ~DEVCTRL_DEV_OFF_MASK;
  79         val &= ~DEVCTRL_DEV_SLP_MASK;
  80         err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
  81         if (err) {
  82                 printk(KERN_ERR "Unable to write TPS65910_DCDCCTRL reg\n");
  83                 return err;
  84         }
  85         #endif
  86         /* Set the maxinum load current */
  87         /* VDD1 */
  88         val = tps65910_reg_read(tps65910, TPS65910_VDD1);
  89         if (val<0) {
  90                 printk(KERN_ERR "Unable to read TPS65910_VDD1 reg\n");
  91                 return val;
  92         }
  93
  94         val |= (1<<5);          //when 1: 1.5 A
  95         val &= (~(0x3 <<2));
  96         val |= (0x01<<2);       //TSTEP[3:2] = 01 : 12.5 mV/us(sampling 3 Mhz)
  97         err = tps65910_reg_write(tps65910, TPS65910_VDD1, val);
  98         if (err) {
  99                 printk(KERN_ERR "Unable to write TPS65910_VDD1 reg\n");
 100                 return err;
 101         }
 102
 103         /* VDD2 */
 104         val = tps65910_reg_read(tps65910, TPS65910_VDD2);
 105         if (val<0) {
 106                 printk(KERN_ERR "Unable to read TPS65910_VDD2 reg\n");
 107                 return val;
 108         }
 109
 110         val |= (1<<5);          //when 1: 1.5 A
 111         val &= (~(0x3 <<2));
 112         val |= (0x01<<2);       //TSTEP[3:2] = 01 : 12.5 mV/us(sampling 3 Mhz)
 113         err = tps65910_reg_write(tps65910, TPS65910_VDD2, val);
 114         if (err) {
 115                 printk(KERN_ERR "Unable to write TPS65910_VDD2 reg\n");
 116                 return err;
 117         }
 118
 119         /* VIO */
 120         val = tps65910_reg_read(tps65910, TPS65910_VIO);
 121         if (val<0) {
 122                 printk(KERN_ERR "Unable to read TPS65910_VIO reg\n");
 123                 return -EIO;
 124         }
 125
 126         val |= (1<<6);  //when 01: 1.0 A
 127         err = tps65910_reg_write(tps65910, TPS65910_VIO, val);
 128         if (err) {
 129                 printk(KERN_ERR "Unable to write TPS65910_VIO reg\n");
 130                 return err;
 131         }
 132         #if 1
 133         /* Mask ALL interrupts */
 134         err = tps65910_reg_write(tps65910,TPS65910_INT_MSK, 0xFF);
 135         if (err) {
 136                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK reg\n");
 137                 return err;
 138         }
 139
 140         err = tps65910_reg_write(tps65910, TPS65910_INT_MSK2, 0x03);
 141         if (err) {
 142                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK2 reg\n");
 143                 return err;
 144         }
 145
 146         /* Set RTC Power, disable Smart Reflex in DEVCTRL_REG */
 147         #if 1
 148         val = 0;
 149         val |= (DEVCTRL_SR_CTL_I2C_SEL_MASK);
 150         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
 151         if (err) {
 152                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL reg\n");
 153                 return err;
 154         }
 155         printk(KERN_INFO "TPS65910 Set default voltage.\n");
 156         #endif
 157         #if 0
 158         //read sleep control register  for debug
 159         for(i=0; i<6; i++)
 160         {
 161         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
 162         if (err) {
 163                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 164                 return -EIO;
 165         }
 166                 else
 167                 printk("%s.......is  0x%04x\n",__FUNCTION__,val);
 168         }
 169         #endif
 170
 171         #if 1
 172         //sleep control register
 173         /*set func when in sleep mode */
 174         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL);
 175         if (val<0) {
 176                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 177                 return val;
 178         }
 179
 180         val |= (1 << 1);
 181         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
 182         if (err) {
 183                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 184                                 \n", TPS65910_VDIG1);
 185                 return err;
 186         }
 187
 188         /* open ldo when in sleep mode */
 189         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_LDO_ON);
 190         if (val<0) {
 191                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 192                 return val;
 193         }
 194
 195         val &= 0;
 196         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_LDO_ON, val);
 197         if (err) {
 198                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 199                                 \n", TPS65910_VDIG1);
 200                 return err;
 201         }
 202
 203         /*set dc mode when in sleep mode */
 204         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_RES_ON);
 205         if (val<0) {
 206                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 207                 return val;
 208         }
 209
 210         val  |= 0xff;
 211         val  &= ~(0x07);   //set vdd1 vdd2 vio in pfm mode when in sleep
 212         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_RES_ON, val);
 213         if (err) {
 214                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 215                                 \n", TPS65910_VDIG1);
 216                 return err;
 217         }
 218
 219         /*close ldo when in sleep mode */
 220         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_SET_LDO_OFF);
 221         if (val<0) {
 222                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 223                 return val;
 224         }
 225
 226         val |= 0x0b;
 227         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_SET_LDO_OFF, val);
 228         if (err) {
 229                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 230                                 \n", TPS65910_VDIG1);
 231                 return err;
 232         }
 233         #endif
 234         #if 0
 235         //read sleep control register  for debug
 236         for(i=0; i<6; i++)
 237         {
 238         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
 239         if (err) {
 240                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 241                 return -EIO;
 242         }
 243                 else
 244                 printk("%s.......is  0x%4x\n",__FUNCTION__,val);
 245         }
 246         #endif
 247         #endif
 248
 249         /*****************set arm  and logic (dc1&dc2)in pwm ****************/
 250           val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
 251         if (val<0) {
 252                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 253                 return val;
 254         }
 255
 256         val &= ~(3<<4);
 257         err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
 258         if (err) {
 259                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 260                                 \n", TPS65910_VDIG1);
 261                 return err;
 262         }
 263         /************************************************/
 264
 265         printk("%s,line=%d\n", __func__,__LINE__);
 266         return 0;
 267
 268 }
 269 int tps65910_post_init(struct tps65910 *tps65910)
 270 {
 271         struct regulator *dcdc;
 272         struct regulator *ldo;
 273         int i=0;
 274         printk("%s,line=%d\n", __func__,__LINE__);
 275
 276         g_pmic_type = PMIC_TYPE_TPS65910;
 277         printk("%s:g_pmic_type=%d\n",__func__,g_pmic_type);
 278
 279         #ifdef CONFIG_RK30_PWM_REGULATOR
 280         platform_device_register(&pwm_regulator_device[0]);
 281         #endif
 282
 283         for(i = 0; i < ARRAY_SIZE(tps65910_dcdc_info); i++)
 284         {
 285         dcdc =regulator_get(NULL, tps65910_dcdc_info[i].name);
 286         regulator_set_voltage(dcdc, tps65910_dcdc_info[i].min_uv, tps65910_dcdc_info[i].max_uv);
 287         regulator_enable(dcdc);
 288         printk("%s  %s =%dmV end\n", __func__,tps65910_dcdc_info[i].name, regulator_get_voltage(dcdc));
 289         regulator_put(dcdc);
 290         udelay(100);
 291         }
 292
 293         for(i = 0; i < ARRAY_SIZE(tps65910_ldo_info); i++)
 294         {
 295         ldo =regulator_get(NULL, tps65910_ldo_info[i].name);
 296         regulator_set_voltage(ldo, tps65910_ldo_info[i].min_uv, tps65910_ldo_info[i].max_uv);
 297         regulator_enable(ldo);
 298         //printk("%s  %s =%dmV end\n", __func__,tps65910_dcdc_info[i].name, regulator_get_voltage(ldo));
 299         regulator_put(ldo);
 300         }
 301
 302         printk("%s,line=%d END\n", __func__,__LINE__);
 303
 304         return 0;
 305 }
 306
 307 static struct regulator_consumer_supply tps65910_smps1_supply[] = {
 308         {
 309                 .supply = "vdd1",
 310         },
 311         #if defined(CONFIG_SOC_RK3168) || defined(CONFIG_ARCH_RK3188)
 312         {
 313                 .supply = "vdd_core",
 314         },
 315         #else
 316         {
 317                 .supply = "vdd_cpu",
 318         },
 319         #endif
 320 };
 321 static struct regulator_consumer_supply tps65910_smps2_supply[] = {
 322         {
 323                 .supply = "vdd2",
 324         },
 325         #if defined(CONFIG_MACH_RK3168_86V)
 326         {
 327                 .supply = "vdd_cpu",
 328         },
 329         #endif
 330 };
 331 static struct regulator_consumer_supply tps65910_smps3_supply[] = {
 332         {
 333                 .supply = "vdd3",
 334         },
 335 };
 336 static struct regulator_consumer_supply tps65910_smps4_supply[] = {
 337         {
 338                 .supply = "vio",
 339         },
 340 };
 341 static struct regulator_consumer_supply tps65910_ldo1_supply[] = {
 342         {
 343                 .supply = "vdig1",
 344         },
 345 };
 346 static struct regulator_consumer_supply tps65910_ldo2_supply[] = {
 347         {
 348                 .supply = "vdig2",
 349         },
 350 };
 351
 352 static struct regulator_consumer_supply tps65910_ldo3_supply[] = {
 353         {
 354                 .supply = "vaux1",
 355         },
 356 };
 357 static struct regulator_consumer_supply tps65910_ldo4_supply[] = {
 358         {
 359                 .supply = "vaux2",
 360         },
 361 };
 362 static struct regulator_consumer_supply tps65910_ldo5_supply[] = {
 363         {
 364                 .supply = "vaux33",
 365         },
 366 };
 367 static struct regulator_consumer_supply tps65910_ldo6_supply[] = {
 368         {
 369                 .supply = "vmmc",
 370         },
 371 };
 372 static struct regulator_consumer_supply tps65910_ldo7_supply[] = {
 373         {
 374                 .supply = "vdac",
 375         },
 376 };
 377
 378 static struct regulator_consumer_supply tps65910_ldo8_supply[] = {
 379         {
 380                 .supply = "vpll",
 381         },
 382 };
 383
 384 static struct regulator_init_data tps65910_smps1 = {
 385         .constraints = {
 386                 .name           = "VDD1",
 387                 .min_uV                 = 600000,
 388                 .max_uV                 = 1500000,
 389                 .apply_uV               = 1,
 390                 .always_on = 1,
 391                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 392                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 393
 394         },
 395         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps1_supply),
 396         .consumer_supplies =  tps65910_smps1_supply,
 397 };
 398
 399 /* */
 400 static struct regulator_init_data tps65910_smps2 = {
 401         .constraints = {
 402                 .name           = "VDD2",
 403                 .min_uV                 = 600000,
 404                 .max_uV                 = 1500000,
 405                 .apply_uV               = 1,
 406                 .always_on = 1,
 407                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 408                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 409
 410         },
 411         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps2_supply),
 412         .consumer_supplies =  tps65910_smps2_supply,
 413 };
 414
 415 /* */
 416 static struct regulator_init_data tps65910_smps3 = {
 417         .constraints = {
 418                 .name           = "VDD3",
 419                 .min_uV                 = 1000000,
 420                 .max_uV                 = 1400000,
 421                 .apply_uV               = 1,
 422                 .always_on = 1,
 423                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 424                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 425
 426         },
 427         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps3_supply),
 428         .consumer_supplies =  tps65910_smps3_supply,
 429 };
 430
 431 static struct regulator_init_data tps65910_smps4 = {
 432         .constraints = {
 433                 .name           = "VIO",
 434                 .min_uV                 = 1800000,
 435                 .max_uV                 = 3300000,
 436                 .apply_uV               = 1,
 437                 .always_on = 1,
 438                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 439                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 440
 441         },
 442         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps4_supply),
 443         .consumer_supplies =  tps65910_smps4_supply,
 444 };
 445 static struct regulator_init_data tps65910_ldo1 = {
 446         .constraints = {
 447                 .name           = "VDIG1",
 448                 .min_uV                 = 1200000,
 449                 .max_uV                 = 2700000,
 450                 .apply_uV               = 1,
 451
 452                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 453                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 454
 455         },
 456         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo1_supply),
 457         .consumer_supplies =  tps65910_ldo1_supply,
 458 };
 459
 460 /* */
 461 static struct regulator_init_data tps65910_ldo2 = {
 462         .constraints = {
 463                 .name           = "VDIG2",
 464                 .min_uV                 = 1000000,
 465                 .max_uV                 = 1800000,
 466                 .apply_uV               = 1,
 467
 468                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 469                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 470
 471         },
 472         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo2_supply),
 473         .consumer_supplies =  tps65910_ldo2_supply,
 474 };
 475
 476 /* */
 477 static struct regulator_init_data tps65910_ldo3 = {
 478         .constraints = {
 479                 .name           = "VAUX1",
 480                 .min_uV                 = 1800000,
 481                 .max_uV                 = 3300000,
 482                 .apply_uV               = 1,
 483
 484                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 485                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 486
 487         },
 488         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo3_supply),
 489         .consumer_supplies =  tps65910_ldo3_supply,
 490 };
 491
 492 /* */
 493 static struct regulator_init_data tps65910_ldo4 = {
 494         .constraints = {
 495                 .name           = "VAUX2",
 496                 .min_uV                 = 1800000,
 497                 .max_uV                 = 3300000,
 498                 .apply_uV               = 1,
 499
 500                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 501                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 502
 503         },
 504         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo4_supply),
 505         .consumer_supplies =  tps65910_ldo4_supply,
 506 };
 507
 508 /* */
 509 static struct regulator_init_data tps65910_ldo5 = {
 510         .constraints = {
 511                 .name           = "VAUX33",
 512                 .min_uV                 = 1800000,
 513                 .max_uV                 = 3300000,
 514                 .apply_uV               = 1,
 515
 516                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 517                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 518
 519         },
 520         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo5_supply),
 521         .consumer_supplies =  tps65910_ldo5_supply,
 522 };
 523
 524 /* */
 525 static struct regulator_init_data tps65910_ldo6 = {
 526         .constraints = {
 527                 .name           = "VMMC",
 528                 .min_uV                 = 1800000,
 529                 .max_uV                 = 3300000,
 530                 .apply_uV               = 1,
 531
 532                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 533                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 534
 535         },
 536         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo6_supply),
 537         .consumer_supplies =  tps65910_ldo6_supply,
 538 };
 539
 540 /* */
 541 static struct regulator_init_data tps65910_ldo7 = {
 542         .constraints = {
 543                 .name           = "VDAC",
 544                 .min_uV                 = 1800000,
 545                 .max_uV                 = 2850000,
 546                 .apply_uV               = 1,
 547
 548                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 549                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 550
 551         },
 552         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo7_supply),
 553         .consumer_supplies =  tps65910_ldo7_supply,
 554 };
 555
 556 /* */
 557 static struct regulator_init_data tps65910_ldo8 = {
 558         .constraints = {
 559                 .name           = "VPLL",
 560                 .min_uV                 = 1000000,
 561                 .max_uV                 = 2500000,
 562                 .apply_uV               = 1,
 563                 .always_on = 1,
 564                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 565                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 566
 567         },
 568         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo8_supply),
 569         .consumer_supplies =  tps65910_ldo8_supply,
 570 };
 571
 572 void __sramfunc board_pmu_tps65910_suspend(void)
 573 {
 574         #ifdef CONFIG_CLK_SWITCH_TO_32K
 575          sram_gpio_set_value(pmic_sleep, GPIO_HIGH);
 576         #endif
 577 }
 578 void __sramfunc board_pmu_tps65910_resume(void)
 579 {
 580         #ifdef CONFIG_CLK_SWITCH_TO_32K
 581         sram_gpio_set_value(pmic_sleep, GPIO_LOW);
 582         sram_32k_udelay(2000);
 583         #endif
 584 }
 585 static struct tps65910_board tps65910_data = {
 586         .irq    = (unsigned)TPS65910_HOST_IRQ,
 587         .irq_base = IRQ_BOARD_BASE,
 588         .gpio_base = TPS65910_GPIO_EXPANDER_BASE,
 589
 590         .pre_init = tps65910_pre_init,
 591         .post_init = tps65910_post_init,
 592
 593         //TPS65910_NUM_REGS = 13
 594         // Regulators
 595         .tps65910_pmic_init_data[TPS65910_REG_VRTC] = NULL,
 596         .tps65910_pmic_init_data[TPS65910_REG_VIO] = &tps65910_smps4,
 597         .tps65910_pmic_init_data[TPS65910_REG_VDD1] = &tps65910_smps1,
 598         .tps65910_pmic_init_data[TPS65910_REG_VDD2] = &tps65910_smps2,
 599         .tps65910_pmic_init_data[TPS65910_REG_VDD3] = &tps65910_smps3,
 600         .tps65910_pmic_init_data[TPS65910_REG_VDIG1] = &tps65910_ldo1,
 601         .tps65910_pmic_init_data[TPS65910_REG_VDIG2] = &tps65910_ldo2,
 602         .tps65910_pmic_init_data[TPS65910_REG_VPLL] = &tps65910_ldo8,
 603         .tps65910_pmic_init_data[TPS65910_REG_VDAC] = &tps65910_ldo7,
 604         .tps65910_pmic_init_data[TPS65910_REG_VAUX1] = &tps65910_ldo3,
 605         .tps65910_pmic_init_data[TPS65910_REG_VAUX2] = &tps65910_ldo4,
 606         .tps65910_pmic_init_data[TPS65910_REG_VAUX33] = &tps65910_ldo5,
 607         .tps65910_pmic_init_data[TPS65910_REG_VMMC] = &tps65910_ldo6,
 608
 609
 610 };
 611
 612 #endif
 613