board-rk30-sdk-tps65910.c

   1 #include <linux/regulator/machine.h>
   2 #include <linux/i2c/twl.h>
   3 #include <linux/mfd/tps65910.h>
   4 #include <mach/sram.h>
   5 #include <linux/platform_device.h>
   6
   7 #include <mach/gpio.h>
   8 #include <mach/iomux.h>
   9
  10 #define grf_readl(offset)       readl_relaxed(RK30_GRF_BASE + offset)
  11 #define grf_writel(v, offset)   do { writel_relaxed(v, RK30_GRF_BASE + offset); dsb(); } while (0)
  12
  13 #define CRU_CLKGATE5_CON_ADDR 0x00e4
  14 #define GRF_GPIO6L_DIR_ADDR 0x0030
  15 #define GRF_GPIO6L_DO_ADDR 0x0068
  16 #define GRF_GPIO6L_EN_ADDR 0x00a0
  17 #define GPIO6_PB3_DIR_OUT  0x08000800
  18 #define GPIO6_PB3_DO_LOW  0x08000000
  19 #define GPIO6_PB3_DO_HIGH  0x08000800
  20 #define GPIO6_PB3_EN_MASK  0x08000800
  21 #define GPIO6_PB3_UNEN_MASK  0x08000000
  22 #define GPIO6_PB1_DIR_OUT  0x02000200
  23 #define GPIO6_PB1_DO_LOW  0x02000000
  24 #define GPIO6_PB1_DO_HIGH  0x02000200
  25 #define GPIO6_PB1_EN_MASK  0x02000200
  26 #define GPIO6_PB1_UNEN_MASK  0x02000000
  27
  28 #ifdef CONFIG_MFD_TPS65910
  29 #define PMU_POWER_SLEEP RK30_PIN6_PB1
  30 extern int platform_device_register(struct platform_device *pdev);
  31
  32 int tps65910_pre_init(struct tps65910 *tps65910){
  33
  34         int val = 0;
  35         int i   = 0;
  36         int err = -1;
  37
  38         printk("%s,line=%d\n", __func__,__LINE__);
  39         //gpio_request(PMU_POWER_SLEEP, "NULL");
  40         //gpio_direction_output(PMU_POWER_SLEEP, GPIO_HIGH);
  41
  42         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL2);
  43         if (val<0) {
  44                 printk(KERN_ERR "Unable to read TPS65910_DEVCTRL2 reg\n");
  45                 return val;
  46         }
  47         /* Set sleep state active high and allow device turn-off after PWRON long press */
  48         val |= (DEVCTRL2_SLEEPSIG_POL_MASK | DEVCTRL2_PWON_LP_OFF_MASK);
  49
  50         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL2, val);
  51         if (err) {
  52                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL2 reg\n");
  53                 return err;
  54         }
  55
  56          #if 1
  57         /* set PSKIP=0 */
  58         val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
  59         if (val<0) {
  60                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
  61                 return val;
  62         }
  63
  64         val &= ~DEVCTRL_DEV_OFF_MASK;
  65         val &= ~DEVCTRL_DEV_SLP_MASK;
  66         err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
  67         if (err) {
  68                 printk(KERN_ERR "Unable to write TPS65910_DCDCCTRL reg\n");
  69                 return err;
  70         }
  71         #endif
  72         /* Set the maxinum load current */
  73         /* VDD1 */
  74         val = tps65910_reg_read(tps65910, TPS65910_VDD1);
  75         if (val<0) {
  76                 printk(KERN_ERR "Unable to read TPS65910_VDD1 reg\n");
  77                 return val;
  78         }
  79
  80         val |= (1<<5);          //when 1: 1.5 A
  81         val |= (0x07<<2);       //TSTEP[2:0] = 111 : 2.5 mV/¦Ìs(sampling 3 Mhz/5)
  82         err = tps65910_reg_write(tps65910, TPS65910_VDD1, val);
  83         if (err) {
  84                 printk(KERN_ERR "Unable to write TPS65910_VDD1 reg\n");
  85                 return err;
  86         }
  87
  88         /* VDD2 */
  89         val = tps65910_reg_read(tps65910, TPS65910_VDD2);
  90         if (val<0) {
  91                 printk(KERN_ERR "Unable to read TPS65910_VDD2 reg\n");
  92                 return val;
  93         }
  94
  95         val |= (1<<5);          //when 1: 1.5 A
  96         err = tps65910_reg_write(tps65910, TPS65910_VDD2, val);
  97         if (err) {
  98                 printk(KERN_ERR "Unable to write TPS65910_VDD2 reg\n");
  99                 return err;
 100         }
 101
 102         /* VIO */
 103         val = tps65910_reg_read(tps65910, TPS65910_VIO);
 104         if (val<0) {
 105                 printk(KERN_ERR "Unable to read TPS65910_VIO reg\n");
 106                 return -EIO;
 107         }
 108
 109         val |= (1<<6);  //when 01: 1.0 A
 110         err = tps65910_reg_write(tps65910, TPS65910_VIO, val);
 111         if (err) {
 112                 printk(KERN_ERR "Unable to write TPS65910_VIO reg\n");
 113                 return err;
 114         }
 115         #if 1
 116         /* Mask ALL interrupts */
 117         err = tps65910_reg_write(tps65910,TPS65910_INT_MSK, 0xFF);
 118         if (err) {
 119                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK reg\n");
 120                 return err;
 121         }
 122
 123         err = tps65910_reg_write(tps65910, TPS65910_INT_MSK2, 0x03);
 124         if (err) {
 125                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK2 reg\n");
 126                 return err;
 127         }
 128
 129         /* Set RTC Power, disable Smart Reflex in DEVCTRL_REG */
 130         #if 1
 131         val = 0;
 132         val |= (DEVCTRL_SR_CTL_I2C_SEL_MASK);
 133         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
 134         if (err) {
 135                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL reg\n");
 136                 return err;
 137         }
 138         printk(KERN_INFO "TPS65910 Set default voltage.\n");
 139         #endif
 140         #if 0
 141         //read sleep control register  for debug
 142         for(i=0; i<6; i++)
 143         {
 144         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
 145         if (err) {
 146                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 147                 return -EIO;
 148         }
 149                 else
 150                 printk("%s.......is  0x%04x\n",__FUNCTION__,val);
 151         }
 152         #endif
 153
 154         #if 1
 155         //sleep control register
 156         /*set func when in sleep mode */
 157         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL);
 158         if (val<0) {
 159                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 160                 return val;
 161         }
 162
 163         val |= (1 << 1);
 164         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
 165         if (err) {
 166                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 167                                 \n", TPS65910_VDIG1);
 168                 return err;
 169         }
 170
 171         /* open ldo when in sleep mode */
 172         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_LDO_ON);
 173         if (val<0) {
 174                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 175                 return val;
 176         }
 177
 178         val &= 0;
 179         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_LDO_ON, val);
 180         if (err) {
 181                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 182                                 \n", TPS65910_VDIG1);
 183                 return err;
 184         }
 185
 186         /*set dc mode when in sleep mode */
 187         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_RES_ON);
 188         if (val<0) {
 189                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 190                 return val;
 191         }
 192
 193         val  |= 0xff;
 194         val  &= ~(0x07);   //set vdd1 vdd2 vio in pfm mode when in sleep
 195         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_RES_ON, val);
 196         if (err) {
 197                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 198                                 \n", TPS65910_VDIG1);
 199                 return err;
 200         }
 201
 202         /*close ldo when in sleep mode */
 203         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_SET_LDO_OFF);
 204         if (val<0) {
 205                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 206                 return val;
 207         }
 208
 209         val |= 0x0b;
 210         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_SET_LDO_OFF, val);
 211         if (err) {
 212                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 213                                 \n", TPS65910_VDIG1);
 214                 return err;
 215         }
 216         #endif
 217         #if 0
 218         //read sleep control register  for debug
 219         for(i=0; i<6; i++)
 220         {
 221         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
 222         if (err) {
 223                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 224                 return -EIO;
 225         }
 226                 else
 227                 printk("%s.......is  0x%4x\n",__FUNCTION__,val);
 228         }
 229         #endif
 230         #endif
 231
 232         /**********************set arm in pwm ****************/
 233           val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
 234         if (val<0) {
 235                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 236                 return val;
 237         }
 238
 239         val &= ~(1<<4);
 240         err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
 241         if (err) {
 242                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 243                                 \n", TPS65910_VDIG1);
 244                 return err;
 245         }
 246         /************************************************/
 247
 248         printk("%s,line=%d\n", __func__,__LINE__);
 249         return 0;
 250
 251 }
 252 int tps65910_post_init(struct tps65910 *tps65910)
 253 {
 254         struct regulator *dcdc;
 255         struct regulator *ldo;
 256         printk("%s,line=%d\n", __func__,__LINE__);
 257
 258         g_pmic_type = PMIC_TYPE_TPS65910;
 259         printk("%s:g_pmic_type=%d\n",__func__,g_pmic_type);
 260
 261         #ifdef CONFIG_RK30_PWM_REGULATOR
 262         platform_device_register(&pwm_regulator_device[0]);
 263         #endif
 264
 265         dcdc = regulator_get(NULL, "vio");      //vcc_io
 266         regulator_set_voltage(dcdc, 3000000, 3000000);
 267         regulator_enable(dcdc);
 268         printk("%s set vio vcc_io=%dmV end\n", __func__, regulator_get_voltage(dcdc));
 269         regulator_put(dcdc);
 270         udelay(100);
 271
 272         ldo = regulator_get(NULL, "vpll");      // vcc25
 273         regulator_set_voltage(ldo, 2500000, 2500000);
 274         regulator_enable(ldo);
 275         printk("%s set vpll vdd11=%dmV end\n", __func__, regulator_get_voltage(ldo));
 276         regulator_put(ldo);
 277         udelay(100);
 278
 279         ldo = regulator_get(NULL, "vdig2");     // vdd11
 280         regulator_set_voltage(ldo, 1100000, 1100000);
 281         regulator_enable(ldo);
 282         printk("%s set vdig2 vdd11=%dmV end\n", __func__, regulator_get_voltage(ldo));
 283         regulator_put(ldo);
 284         udelay(100);
 285
 286         ldo = regulator_get(NULL, "vaux33");     //vcc_tp
 287         regulator_set_voltage(ldo, 3300000, 3300000);
 288         regulator_enable(ldo);
 289         printk("%s set vaux33 vcc_tp=%dmV end\n", __func__, regulator_get_voltage(ldo));
 290         regulator_put(ldo);
 291         udelay(100);
 292
 293         dcdc = regulator_get(NULL, "vdd_cpu");  //vdd_cpu
 294         regulator_set_voltage(dcdc, 1200000, 1200000);
 295         regulator_enable(dcdc);
 296         printk("%s set vdd1 vdd_cpu=%dmV end\n", __func__, regulator_get_voltage(dcdc));
 297         regulator_put(dcdc);
 298         udelay(100);
 299
 300         dcdc = regulator_get(NULL, "vdd2");     //vcc_ddr
 301         regulator_set_voltage(dcdc, 1200000, 1200000);  // 1.5*4/5 = 1.2 and Vout=1.5v
 302         regulator_enable(dcdc);
 303         printk("%s set vdd2 vcc_ddr=%dmV end\n", __func__, regulator_get_voltage(dcdc));
 304         regulator_put(dcdc);
 305         udelay(100);
 306
 307         ldo = regulator_get(NULL, "vdig1");     //vcc18_cif
 308         regulator_set_voltage(ldo, 1800000, 1800000);
 309         regulator_enable(ldo);
 310         printk("%s set vdig1 vcc18_cif=%dmV end\n", __func__, regulator_get_voltage(ldo));
 311         regulator_put(ldo);
 312         udelay(100);
 313
 314         dcdc = regulator_get(NULL, "vaux1"); //vcc25_hdmi
 315         regulator_set_voltage(dcdc,2500000,2500000);
 316         regulator_enable(dcdc);
 317         printk("%s set vaux1 vcc25_hdmi=%dmV end\n", __func__, regulator_get_voltage(dcdc));
 318         regulator_put(dcdc);
 319         udelay(100);
 320
 321         ldo = regulator_get(NULL, "vaux2");     //vcca33
 322         regulator_set_voltage(ldo, 3300000, 3300000);
 323         regulator_enable(ldo);
 324         printk("%s set vaux2 vcca33=%dmV end\n", __func__, regulator_get_voltage(ldo));
 325         regulator_put(ldo);
 326         udelay(100);
 327
 328         ldo = regulator_get(NULL, "vdac"); // vccio_wl
 329         regulator_set_voltage(ldo,1800000,1800000);
 330         regulator_enable(ldo);
 331         printk("%s set vdac vccio_wl=%dmV end\n", __func__, regulator_get_voltage(ldo));
 332         regulator_put(ldo);
 333         udelay(100);
 334
 335         ldo = regulator_get(NULL, "vmmc");  //vcc28_cif
 336         regulator_set_voltage(ldo,2800000,2800000);
 337         regulator_enable(ldo);
 338         printk("%s set vmmc vcc28_cif=%dmV end\n", __func__, regulator_get_voltage(ldo));
 339         regulator_put(ldo);
 340         udelay(100);
 341
 342         printk("%s,line=%d END\n", __func__,__LINE__);
 343
 344         return 0;
 345 }
 346
 347 static struct regulator_consumer_supply tps65910_smps1_supply[] = {
 348         {
 349                 .supply = "vdd1",
 350         },
 351         {
 352                 .supply = "vdd_cpu",
 353         },
 354 };
 355 static struct regulator_consumer_supply tps65910_smps2_supply[] = {
 356         {
 357                 .supply = "vdd2",
 358         },
 359
 360 };
 361 static struct regulator_consumer_supply tps65910_smps3_supply[] = {
 362         {
 363                 .supply = "vdd3",
 364         },
 365 };
 366 static struct regulator_consumer_supply tps65910_smps4_supply[] = {
 367         {
 368                 .supply = "vio",
 369         },
 370 };
 371 static struct regulator_consumer_supply tps65910_ldo1_supply[] = {
 372         {
 373                 .supply = "vdig1",
 374         },
 375 };
 376 static struct regulator_consumer_supply tps65910_ldo2_supply[] = {
 377         {
 378                 .supply = "vdig2",
 379         },
 380 };
 381
 382 static struct regulator_consumer_supply tps65910_ldo3_supply[] = {
 383         {
 384                 .supply = "vaux1",
 385         },
 386 };
 387 static struct regulator_consumer_supply tps65910_ldo4_supply[] = {
 388         {
 389                 .supply = "vaux2",
 390         },
 391 };
 392 static struct regulator_consumer_supply tps65910_ldo5_supply[] = {
 393         {
 394                 .supply = "vaux33",
 395         },
 396 };
 397 static struct regulator_consumer_supply tps65910_ldo6_supply[] = {
 398         {
 399                 .supply = "vmmc",
 400         },
 401 };
 402 static struct regulator_consumer_supply tps65910_ldo7_supply[] = {
 403         {
 404                 .supply = "vdac",
 405         },
 406 };
 407
 408 static struct regulator_consumer_supply tps65910_ldo8_supply[] = {
 409         {
 410                 .supply = "vpll",
 411         },
 412 };
 413
 414 static struct regulator_init_data tps65910_smps1 = {
 415         .constraints = {
 416                 .name           = "VDD1",
 417                 .min_uV                 = 600000,
 418                 .max_uV                 = 1500000,
 419                 .apply_uV               = 1,
 420                 .always_on = 1,
 421                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 422                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 423
 424         },
 425         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps1_supply),
 426         .consumer_supplies =  tps65910_smps1_supply,
 427 };
 428
 429 /* */
 430 static struct regulator_init_data tps65910_smps2 = {
 431         .constraints = {
 432                 .name           = "VDD2",
 433                 .min_uV                 = 600000,
 434                 .max_uV                 = 1500000,
 435                 .apply_uV               = 1,
 436                 .always_on = 1,
 437                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 438                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 439
 440         },
 441         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps2_supply),
 442         .consumer_supplies =  tps65910_smps2_supply,
 443 };
 444
 445 /* */
 446 static struct regulator_init_data tps65910_smps3 = {
 447         .constraints = {
 448                 .name           = "VDD3",
 449                 .min_uV                 = 1000000,
 450                 .max_uV                 = 1400000,
 451                 .apply_uV               = 1,
 452                 .always_on = 1,
 453                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 454                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 455
 456         },
 457         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps3_supply),
 458         .consumer_supplies =  tps65910_smps3_supply,
 459 };
 460
 461 static struct regulator_init_data tps65910_smps4 = {
 462         .constraints = {
 463                 .name           = "VIO",
 464                 .min_uV                 = 1800000,
 465                 .max_uV                 = 3300000,
 466                 .apply_uV               = 1,
 467                 .always_on = 1,
 468                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 469                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 470
 471         },
 472         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps4_supply),
 473         .consumer_supplies =  tps65910_smps4_supply,
 474 };
 475 static struct regulator_init_data tps65910_ldo1 = {
 476         .constraints = {
 477                 .name           = "VDIG1",
 478                 .min_uV                 = 1200000,
 479                 .max_uV                 = 2700000,
 480                 .apply_uV               = 1,
 481
 482                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 483                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 484
 485         },
 486         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo1_supply),
 487         .consumer_supplies =  tps65910_ldo1_supply,
 488 };
 489
 490 /* */
 491 static struct regulator_init_data tps65910_ldo2 = {
 492         .constraints = {
 493                 .name           = "VDIG2",
 494                 .min_uV                 = 1000000,
 495                 .max_uV                 = 1800000,
 496                 .apply_uV               = 1,
 497
 498                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 499                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 500
 501         },
 502         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo2_supply),
 503         .consumer_supplies =  tps65910_ldo2_supply,
 504 };
 505
 506 /* */
 507 static struct regulator_init_data tps65910_ldo3 = {
 508         .constraints = {
 509                 .name           = "VAUX1",
 510                 .min_uV                 = 1800000,
 511                 .max_uV                 = 3300000,
 512                 .apply_uV               = 1,
 513
 514                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 515                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 516
 517         },
 518         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo3_supply),
 519         .consumer_supplies =  tps65910_ldo3_supply,
 520 };
 521
 522 /* */
 523 static struct regulator_init_data tps65910_ldo4 = {
 524         .constraints = {
 525                 .name           = "VAUX2",
 526                 .min_uV                 = 1800000,
 527                 .max_uV                 = 3300000,
 528                 .apply_uV               = 1,
 529
 530                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 531                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 532
 533         },
 534         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo4_supply),
 535         .consumer_supplies =  tps65910_ldo4_supply,
 536 };
 537
 538 /* */
 539 static struct regulator_init_data tps65910_ldo5 = {
 540         .constraints = {
 541                 .name           = "VAUX33",
 542                 .min_uV                 = 1800000,
 543                 .max_uV                 = 3300000,
 544                 .apply_uV               = 1,
 545
 546                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 547                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 548
 549         },
 550         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo5_supply),
 551         .consumer_supplies =  tps65910_ldo5_supply,
 552 };
 553
 554 /* */
 555 static struct regulator_init_data tps65910_ldo6 = {
 556         .constraints = {
 557                 .name           = "VMMC",
 558                 .min_uV                 = 1800000,
 559                 .max_uV                 = 3300000,
 560                 .apply_uV               = 1,
 561
 562                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 563                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 564
 565         },
 566         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo6_supply),
 567         .consumer_supplies =  tps65910_ldo6_supply,
 568 };
 569
 570 /* */
 571 static struct regulator_init_data tps65910_ldo7 = {
 572         .constraints = {
 573                 .name           = "VDAC",
 574                 .min_uV                 = 1800000,
 575                 .max_uV                 = 2850000,
 576                 .apply_uV               = 1,
 577
 578                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 579                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 580
 581         },
 582         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo7_supply),
 583         .consumer_supplies =  tps65910_ldo7_supply,
 584 };
 585
 586 /* */
 587 static struct regulator_init_data tps65910_ldo8 = {
 588         .constraints = {
 589                 .name           = "VPLL",
 590                 .min_uV                 = 1000000,
 591                 .max_uV                 = 2500000,
 592                 .apply_uV               = 1,
 593                 .always_on = 1,
 594                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 595                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 596
 597         },
 598         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo8_supply),
 599         .consumer_supplies =  tps65910_ldo8_supply,
 600 };
 601
 602 void __sramfunc board_pmu_tps65910_suspend(void)
 603 {
 604         grf_writel(GPIO6_PB1_DIR_OUT, GRF_GPIO6L_DIR_ADDR);
 605         grf_writel(GPIO6_PB1_DO_HIGH, GRF_GPIO6L_DO_ADDR);  //set gpio6_b1 output low
 606         grf_writel(GPIO6_PB1_EN_MASK, GRF_GPIO6L_EN_ADDR);
 607 }
 608 void __sramfunc board_pmu_tps65910_resume(void)
 609 {
 610         grf_writel(GPIO6_PB1_DIR_OUT, GRF_GPIO6L_DIR_ADDR);
 611         grf_writel(GPIO6_PB1_DO_LOW, GRF_GPIO6L_DO_ADDR);  //set gpio6_b1 output low
 612         grf_writel(GPIO6_PB1_EN_MASK, GRF_GPIO6L_EN_ADDR);
 613         #ifdef CONFIG_CLK_SWITCH_TO_32K                 //switch clk to 24M
 614         sram_32k_udelay(10000);
 615         #else
 616         sram_udelay(2000);
 617         #endif
 618 }
 619
 620 static struct tps65910_board tps65910_data = {
 621         .irq    = (unsigned)TPS65910_HOST_IRQ,
 622         .irq_base = IRQ_BOARD_BASE,
 623         .gpio_base = TPS65910_GPIO_EXPANDER_BASE,
 624
 625         .pre_init = tps65910_pre_init,
 626         .post_init = tps65910_post_init,
 627
 628         //TPS65910_NUM_REGS = 13
 629         // Regulators
 630         .tps65910_pmic_init_data[TPS65910_REG_VRTC] = NULL,
 631         .tps65910_pmic_init_data[TPS65910_REG_VIO] = &tps65910_smps4,
 632         .tps65910_pmic_init_data[TPS65910_REG_VDD1] = &tps65910_smps1,
 633         .tps65910_pmic_init_data[TPS65910_REG_VDD2] = &tps65910_smps2,
 634         .tps65910_pmic_init_data[TPS65910_REG_VDD3] = &tps65910_smps3,
 635         .tps65910_pmic_init_data[TPS65910_REG_VDIG1] = &tps65910_ldo1,
 636         .tps65910_pmic_init_data[TPS65910_REG_VDIG2] = &tps65910_ldo2,
 637         .tps65910_pmic_init_data[TPS65910_REG_VPLL] = &tps65910_ldo8,
 638         .tps65910_pmic_init_data[TPS65910_REG_VDAC] = &tps65910_ldo7,
 639         .tps65910_pmic_init_data[TPS65910_REG_VAUX1] = &tps65910_ldo3,
 640         .tps65910_pmic_init_data[TPS65910_REG_VAUX2] = &tps65910_ldo4,
 641         .tps65910_pmic_init_data[TPS65910_REG_VAUX33] = &tps65910_ldo5,
 642         .tps65910_pmic_init_data[TPS65910_REG_VMMC] = &tps65910_ldo6,
 643
 644
 645 };
 646
 647 #endif
 648