ARM64: DTS: Add rk3399-firefly uart4 device, node as /dev/ttyS1
[firefly-linux-kernel-4.4.55.git] / board-rk3066b-fpga.c
1 /*
2  * Copyright (C) 2012 ROCKCHIP, Inc.
3  *
4  * This software is licensed under the terms of the GNU General Public
5  * License version 2, as published by the Free Software Foundation, and
6  * may be copied, distributed, and modified under those terms.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  *
13  */
14
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/input.h>
19 #include <linux/io.h>
20 #include <linux/delay.h>
21 #include <linux/i2c.h>
22 #include <linux/skbuff.h>
23 #include <linux/spi/spi.h>
24 #include <linux/mmc/host.h>
25 #include <linux/ion.h>
26 #include <linux/cpufreq.h>
27 #include <linux/clk.h>
28
29 #include <asm/setup.h>
30 #include <asm/mach-types.h>
31 #include <asm/mach/arch.h>
32 #include <asm/mach/map.h>
33 #include <asm/mach/flash.h>
34 #include <asm/hardware/gic.h>
35
36 #include <mach/board.h>
37 #include <mach/hardware.h>
38 #include <mach/io.h>
39 #include <mach/gpio.h>
40 #include <mach/iomux.h>
41 #include <linux/fb.h>
42 #include <linux/regulator/machine.h>
43 #include <linux/rfkill-rk.h>
44 #include <linux/sensor-dev.h>
45
46
47 #ifdef CONFIG_VIDEO_RK29
48 /*---------------- Camera Sensor Macro Define Begin  ------------------------*/
49 /*---------------- Camera Sensor Configuration Macro Begin ------------------------*/
50 #define CONFIG_SENSOR_0 RK29_CAM_SENSOR_OV5642                                          /* back camera sensor */
51 #define CONFIG_SENSOR_IIC_ADDR_0                0
52 #define CONFIG_SENSOR_IIC_ADAPTER_ID_0    4
53 #define CONFIG_SENSOR_ORIENTATION_0       90
54 #define CONFIG_SENSOR_POWER_PIN_0                 INVALID_GPIO
55 #define CONFIG_SENSOR_RESET_PIN_0                 INVALID_GPIO
56 #define CONFIG_SENSOR_POWERDN_PIN_0       INVALID_GPIO
57 #define CONFIG_SENSOR_FALSH_PIN_0                 INVALID_GPIO
58 #define CONFIG_SENSOR_POWERACTIVE_LEVEL_0 RK29_CAM_POWERACTIVE_L
59 #define CONFIG_SENSOR_RESETACTIVE_LEVEL_0 RK29_CAM_RESETACTIVE_L
60 #define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_0 RK29_CAM_POWERDNACTIVE_H
61 #define CONFIG_SENSOR_FLASHACTIVE_LEVEL_0 RK29_CAM_FLASHACTIVE_L
62
63 #define CONFIG_SENSOR_QCIF_FPS_FIXED_0          15000
64 #define CONFIG_SENSOR_240X160_FPS_FIXED_0   15000
65 #define CONFIG_SENSOR_QVGA_FPS_FIXED_0          15000
66 #define CONFIG_SENSOR_CIF_FPS_FIXED_0           15000
67 #define CONFIG_SENSOR_VGA_FPS_FIXED_0           15000
68 #define CONFIG_SENSOR_480P_FPS_FIXED_0          15000
69 #define CONFIG_SENSOR_SVGA_FPS_FIXED_0          15000
70 #define CONFIG_SENSOR_720P_FPS_FIXED_0          30000
71
72 #define CONFIG_SENSOR_01  RK29_CAM_SENSOR_OV5642                   /* back camera sensor 1 */
73 #define CONFIG_SENSOR_IIC_ADDR_01           0x00
74 #define CONFIG_SENSOR_IIC_ADAPTER_ID_01    4
75 #define CONFIG_SENSOR_ORIENTATION_01       90
76 #define CONFIG_SENSOR_POWER_PIN_01         INVALID_GPIO
77 #define CONFIG_SENSOR_RESET_PIN_01         INVALID_GPIO
78 #define CONFIG_SENSOR_POWERDN_PIN_01       INVALID_GPIO
79 #define CONFIG_SENSOR_FALSH_PIN_01         INVALID_GPIO
80 #define CONFIG_SENSOR_POWERACTIVE_LEVEL_01 RK29_CAM_POWERACTIVE_L
81 #define CONFIG_SENSOR_RESETACTIVE_LEVEL_01 RK29_CAM_RESETACTIVE_L
82 #define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_01 RK29_CAM_POWERDNACTIVE_H
83 #define CONFIG_SENSOR_FLASHACTIVE_LEVEL_01 RK29_CAM_FLASHACTIVE_L
84
85 #define CONFIG_SENSOR_QCIF_FPS_FIXED_01      15000
86 #define CONFIG_SENSOR_240X160_FPS_FIXED_01   15000
87 #define CONFIG_SENSOR_QVGA_FPS_FIXED_01      15000
88 #define CONFIG_SENSOR_CIF_FPS_FIXED_01       15000
89 #define CONFIG_SENSOR_VGA_FPS_FIXED_01       15000
90 #define CONFIG_SENSOR_480P_FPS_FIXED_01      15000
91 #define CONFIG_SENSOR_SVGA_FPS_FIXED_01      15000
92 #define CONFIG_SENSOR_720P_FPS_FIXED_01     30000
93
94 #define CONFIG_SENSOR_02 RK29_CAM_SENSOR_OV5640                      /* back camera sensor 2 */
95 #define CONFIG_SENSOR_IIC_ADDR_02           0x00
96 #define CONFIG_SENSOR_CIF_INDEX_02                    0
97 #define CONFIG_SENSOR_IIC_ADAPTER_ID_02    4
98 #define CONFIG_SENSOR_ORIENTATION_02       90
99 #define CONFIG_SENSOR_POWER_PIN_02         INVALID_GPIO
100 #define CONFIG_SENSOR_RESET_PIN_02         INVALID_GPIO
101 #define CONFIG_SENSOR_POWERDN_PIN_02       INVALID_GPIO
102 #define CONFIG_SENSOR_FALSH_PIN_02         INVALID_GPIO
103 #define CONFIG_SENSOR_POWERACTIVE_LEVEL_02 RK29_CAM_POWERACTIVE_L
104 #define CONFIG_SENSOR_RESETACTIVE_LEVEL_02 RK29_CAM_RESETACTIVE_L
105 #define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_02 RK29_CAM_POWERDNACTIVE_H
106 #define CONFIG_SENSOR_FLASHACTIVE_LEVEL_02 RK29_CAM_FLASHACTIVE_L
107
108 #define CONFIG_SENSOR_QCIF_FPS_FIXED_02      15000
109 #define CONFIG_SENSOR_240X160_FPS_FIXED_02   15000
110 #define CONFIG_SENSOR_QVGA_FPS_FIXED_02      15000
111 #define CONFIG_SENSOR_CIF_FPS_FIXED_02       15000
112 #define CONFIG_SENSOR_VGA_FPS_FIXED_02       15000
113 #define CONFIG_SENSOR_480P_FPS_FIXED_02      15000
114 #define CONFIG_SENSOR_SVGA_FPS_FIXED_02      15000
115 #define CONFIG_SENSOR_720P_FPS_FIXED_02      30000
116
117 #define CONFIG_SENSOR_1 RK29_CAM_SENSOR_OV2659                      /* front camera sensor 0 */
118 #define CONFIG_SENSOR_IIC_ADDR_1            0x60
119 #define CONFIG_SENSOR_IIC_ADAPTER_ID_1    1
120 #define CONFIG_SENSOR_ORIENTATION_1       270
121 #define CONFIG_SENSOR_POWER_PIN_1         INVALID_GPIO
122 #define CONFIG_SENSOR_RESET_PIN_1         INVALID_GPIO
123 #define CONFIG_SENSOR_POWERDN_PIN_1       INVALID_GPIO
124 #define CONFIG_SENSOR_FALSH_PIN_1         INVALID_GPIO
125 #define CONFIG_SENSOR_POWERACTIVE_LEVEL_1 RK29_CAM_POWERACTIVE_L
126 #define CONFIG_SENSOR_RESETACTIVE_LEVEL_1 RK29_CAM_RESETACTIVE_L
127 #define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_1 RK29_CAM_POWERDNACTIVE_H
128 #define CONFIG_SENSOR_FLASHACTIVE_LEVEL_1 RK29_CAM_FLASHACTIVE_L
129
130 #define CONFIG_SENSOR_QCIF_FPS_FIXED_1          15000
131 #define CONFIG_SENSOR_240X160_FPS_FIXED_1   15000
132 #define CONFIG_SENSOR_QVGA_FPS_FIXED_1          15000
133 #define CONFIG_SENSOR_CIF_FPS_FIXED_1           15000
134 #define CONFIG_SENSOR_VGA_FPS_FIXED_1           15000
135 #define CONFIG_SENSOR_480P_FPS_FIXED_1          15000
136 #define CONFIG_SENSOR_SVGA_FPS_FIXED_1          15000
137 #define CONFIG_SENSOR_720P_FPS_FIXED_1          30000
138
139 #define CONFIG_SENSOR_11 RK29_CAM_SENSOR_OV2659                      /* front camera sensor 1 */
140 #define CONFIG_SENSOR_IIC_ADDR_11           0x00
141 #define CONFIG_SENSOR_IIC_ADAPTER_ID_11    3
142 #define CONFIG_SENSOR_ORIENTATION_11       270
143 #define CONFIG_SENSOR_POWER_PIN_11         INVALID_GPIO
144 #define CONFIG_SENSOR_RESET_PIN_11         INVALID_GPIO
145 #define CONFIG_SENSOR_POWERDN_PIN_11       INVALID_GPIO
146 #define CONFIG_SENSOR_FALSH_PIN_11         INVALID_GPIO
147 #define CONFIG_SENSOR_POWERACTIVE_LEVEL_11 RK29_CAM_POWERACTIVE_L
148 #define CONFIG_SENSOR_RESETACTIVE_LEVEL_11 RK29_CAM_RESETACTIVE_L
149 #define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_11 RK29_CAM_POWERDNACTIVE_H
150 #define CONFIG_SENSOR_FLASHACTIVE_LEVEL_11 RK29_CAM_FLASHACTIVE_L
151
152 #define CONFIG_SENSOR_QCIF_FPS_FIXED_11      15000
153 #define CONFIG_SENSOR_240X160_FPS_FIXED_11   15000
154 #define CONFIG_SENSOR_QVGA_FPS_FIXED_11      15000
155 #define CONFIG_SENSOR_CIF_FPS_FIXED_11       15000
156 #define CONFIG_SENSOR_VGA_FPS_FIXED_11       15000
157 #define CONFIG_SENSOR_480P_FPS_FIXED_11      15000
158 #define CONFIG_SENSOR_SVGA_FPS_FIXED_11      15000
159 #define CONFIG_SENSOR_720P_FPS_FIXED_11      30000
160
161 #define CONFIG_SENSOR_12 RK29_CAM_SENSOR_OV2659//RK29_CAM_SENSOR_OV2655                      /* front camera sensor 2 */
162 #define CONFIG_SENSOR_IIC_ADDR_12          0x00
163 #define CONFIG_SENSOR_IIC_ADAPTER_ID_12    3
164 #define CONFIG_SENSOR_ORIENTATION_12       270
165 #define CONFIG_SENSOR_POWER_PIN_12         INVALID_GPIO
166 #define CONFIG_SENSOR_RESET_PIN_12         INVALID_GPIO
167 #define CONFIG_SENSOR_POWERDN_PIN_12       INVALID_GPIO
168 #define CONFIG_SENSOR_FALSH_PIN_12         INVALID_GPIO
169 #define CONFIG_SENSOR_POWERACTIVE_LEVEL_12 RK29_CAM_POWERACTIVE_L
170 #define CONFIG_SENSOR_RESETACTIVE_LEVEL_12 RK29_CAM_RESETACTIVE_L
171 #define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_12 RK29_CAM_POWERDNACTIVE_H
172 #define CONFIG_SENSOR_FLASHACTIVE_LEVEL_12 RK29_CAM_FLASHACTIVE_L
173
174 #define CONFIG_SENSOR_QCIF_FPS_FIXED_12      15000
175 #define CONFIG_SENSOR_240X160_FPS_FIXED_12   15000
176 #define CONFIG_SENSOR_QVGA_FPS_FIXED_12      15000
177 #define CONFIG_SENSOR_CIF_FPS_FIXED_12       15000
178 #define CONFIG_SENSOR_VGA_FPS_FIXED_12       15000
179 #define CONFIG_SENSOR_480P_FPS_FIXED_12      15000
180 #define CONFIG_SENSOR_SVGA_FPS_FIXED_12      15000
181 #define CONFIG_SENSOR_720P_FPS_FIXED_12      30000
182
183
184 #endif  //#ifdef CONFIG_VIDEO_RK29
185 /*---------------- Camera Sensor Configuration Macro End------------------------*/
186 #include "../../../drivers/media/video/rk30_camera.c"
187 /*---------------- Camera Sensor Macro Define End  ---------*/
188
189 #define PMEM_CAM_SIZE PMEM_CAM_NECESSARY
190 /*****************************************************************************************
191  * camera  devices
192  * author: ddl@rock-chips.com
193  *****************************************************************************************/
194 #ifdef CONFIG_VIDEO_RK29
195 #define CONFIG_SENSOR_POWER_IOCTL_USR      0 //define this refer to your board layout
196 #define CONFIG_SENSOR_RESET_IOCTL_USR      0
197 #define CONFIG_SENSOR_POWERDOWN_IOCTL_USR          0
198 #define CONFIG_SENSOR_FLASH_IOCTL_USR      0
199
200 static void rk_cif_power(int on)
201 {
202     struct regulator *ldo_18,*ldo_28;
203     
204         ldo_28 = regulator_get(NULL, "ldo7");   // vcc28_cif
205         ldo_18 = regulator_get(NULL, "ldo1");   // vcc18_cif
206         if (ldo_28 == NULL || IS_ERR(ldo_28) || ldo_18 == NULL || IS_ERR(ldo_18)) {
207         printk("get cif ldo failed!\n");
208                 return;
209         }
210     if(on == 0) {       
211         regulator_disable(ldo_28);
212         regulator_put(ldo_28);
213         regulator_disable(ldo_18);
214         regulator_put(ldo_18);
215         mdelay(500);
216     } else {
217         regulator_set_voltage(ldo_28, 2800000, 2800000);
218         regulator_enable(ldo_28);
219    //   printk("%s set ldo7 vcc28_cif=%dmV end\n", __func__, regulator_get_voltage(ldo_28));
220         regulator_put(ldo_28);
221
222         regulator_set_voltage(ldo_18, 1800000, 1800000);
223     //  regulator_set_suspend_voltage(ldo, 1800000);
224         regulator_enable(ldo_18);
225     //  printk("%s set ldo1 vcc18_cif=%dmV end\n", __func__, regulator_get_voltage(ldo_18));
226         regulator_put(ldo_18);
227     }
228 }
229
230 #if CONFIG_SENSOR_POWER_IOCTL_USR
231 static int sensor_power_usr_cb (struct rk29camera_gpio_res *res,int on)
232 {
233         //#error "CONFIG_SENSOR_POWER_IOCTL_USR is 1, sensor_power_usr_cb function must be writed!!";
234     rk_cif_power(on);
235 }
236 #endif
237
238 #if CONFIG_SENSOR_RESET_IOCTL_USR
239 static int sensor_reset_usr_cb (struct rk29camera_gpio_res *res,int on)
240 {
241         #error "CONFIG_SENSOR_RESET_IOCTL_USR is 1, sensor_reset_usr_cb function must be writed!!";
242 }
243 #endif
244
245 #if CONFIG_SENSOR_POWERDOWN_IOCTL_USR
246 static int sensor_powerdown_usr_cb (struct rk29camera_gpio_res *res,int on)
247 {
248         #error "CONFIG_SENSOR_POWERDOWN_IOCTL_USR is 1, sensor_powerdown_usr_cb function must be writed!!";
249 }
250 #endif
251
252 #if CONFIG_SENSOR_FLASH_IOCTL_USR
253 static int sensor_flash_usr_cb (struct rk29camera_gpio_res *res,int on)
254 {
255         #error "CONFIG_SENSOR_FLASH_IOCTL_USR is 1, sensor_flash_usr_cb function must be writed!!";
256 }
257 #endif
258
259 static struct rk29camera_platform_ioctl_cb      sensor_ioctl_cb = {
260         #if CONFIG_SENSOR_POWER_IOCTL_USR
261         .sensor_power_cb = sensor_power_usr_cb,
262         #else
263         .sensor_power_cb = NULL,
264         #endif
265
266         #if CONFIG_SENSOR_RESET_IOCTL_USR
267         .sensor_reset_cb = sensor_reset_usr_cb,
268         #else
269         .sensor_reset_cb = NULL,
270         #endif
271
272         #if CONFIG_SENSOR_POWERDOWN_IOCTL_USR
273         .sensor_powerdown_cb = sensor_powerdown_usr_cb,
274         #else
275         .sensor_powerdown_cb = NULL,
276         #endif
277
278         #if CONFIG_SENSOR_FLASH_IOCTL_USR
279         .sensor_flash_cb = sensor_flash_usr_cb,
280         #else
281         .sensor_flash_cb = NULL,
282         #endif
283 };
284
285 #if CONFIG_SENSOR_IIC_ADDR_0
286 static struct reginfo_t rk_init_data_sensor_reg_0[] =
287 {
288     {0x0000, 0x00,0,0}
289 };
290 static struct reginfo_t rk_init_data_sensor_winseqreg_0[] =
291 {
292         {0x0000, 0x00,0,0}
293 };
294 #endif
295
296 #if CONFIG_SENSOR_IIC_ADDR_1
297 static struct reginfo_t rk_init_data_sensor_reg_1[] =
298 {
299     {0x0000, 0x00,0,0}
300 };
301 static struct reginfo_t rk_init_data_sensor_winseqreg_1[] =
302 {
303     {0x0000, 0x00,0,0}
304 };
305 #endif
306 #if CONFIG_SENSOR_IIC_ADDR_01
307 static struct reginfo_t rk_init_data_sensor_reg_01[] =
308 {
309     {0x0000, 0x00,0,0}
310 };
311 static struct reginfo_t rk_init_data_sensor_winseqreg_01[] =
312 {
313     {0x0000, 0x00,0,0}
314 };
315 #endif
316 #if CONFIG_SENSOR_IIC_ADDR_02
317 static struct reginfo_t rk_init_data_sensor_reg_02[] =
318 {
319     {0x0000, 0x00,0,0}
320 };
321 static struct reginfo_t rk_init_data_sensor_winseqreg_02[] =
322 {
323     {0x0000, 0x00,0,0}
324 };
325 #endif
326 #if CONFIG_SENSOR_IIC_ADDR_11
327 static struct reginfo_t rk_init_data_sensor_reg_11[] =
328 {
329     {0x0000, 0x00,0,0}
330 };
331 static struct reginfo_t rk_init_data_sensor_winseqreg_11[] =
332 {
333     {0x0000, 0x00,0,0}
334 };
335 #endif
336 #if CONFIG_SENSOR_IIC_ADDR_12
337 static struct reginfo_t rk_init_data_sensor_reg_12[] =
338 {
339     {0x0000, 0x00,0,0}
340 };
341 static struct reginfo_t rk_init_data_sensor_winseqreg_12[] =
342 {
343     {0x0000, 0x00,0,0}
344 };
345 #endif
346 static rk_sensor_user_init_data_s rk_init_data_sensor[RK_CAM_NUM] = 
347 {
348     #if CONFIG_SENSOR_IIC_ADDR_0
349     {
350        .rk_sensor_init_width = INVALID_VALUE,
351        .rk_sensor_init_height = INVALID_VALUE,
352        .rk_sensor_init_bus_param = INVALID_VALUE,
353        .rk_sensor_init_pixelcode = INVALID_VALUE,
354        .rk_sensor_init_data = rk_init_data_sensor_reg_0,
355        .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_0,
356        .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_0) / sizeof(struct reginfo_t),
357        .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_0) / sizeof(struct reginfo_t),
358     },
359     #else
360     {
361        .rk_sensor_init_width = INVALID_VALUE,
362        .rk_sensor_init_height = INVALID_VALUE,
363        .rk_sensor_init_bus_param = INVALID_VALUE,
364        .rk_sensor_init_pixelcode = INVALID_VALUE,
365        .rk_sensor_init_data = NULL,
366        .rk_sensor_init_winseq = NULL,
367        .rk_sensor_winseq_size = 0,
368        .rk_sensor_init_data_size = 0,
369     },
370     #endif
371     #if CONFIG_SENSOR_IIC_ADDR_1
372     {
373        .rk_sensor_init_width = INVALID_VALUE,
374        .rk_sensor_init_height = INVALID_VALUE,
375        .rk_sensor_init_bus_param = INVALID_VALUE,
376        .rk_sensor_init_pixelcode = INVALID_VALUE,
377        .rk_sensor_init_data = rk_init_data_sensor_reg_1,
378        .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_1,
379        .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_1) / sizeof(struct reginfo_t),
380        .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_1) / sizeof(struct reginfo_t),
381     },
382     #else
383     {
384        .rk_sensor_init_width = INVALID_VALUE,
385        .rk_sensor_init_height = INVALID_VALUE,
386        .rk_sensor_init_bus_param = INVALID_VALUE,
387        .rk_sensor_init_pixelcode = INVALID_VALUE,
388        .rk_sensor_init_data = NULL,
389        .rk_sensor_init_winseq = NULL,
390        .rk_sensor_winseq_size = 0,
391        .rk_sensor_init_data_size = 0,
392     },
393     #endif
394     #if CONFIG_SENSOR_IIC_ADDR_01
395     {
396        .rk_sensor_init_width = INVALID_VALUE,
397        .rk_sensor_init_height = INVALID_VALUE,
398        .rk_sensor_init_bus_param = INVALID_VALUE,
399        .rk_sensor_init_pixelcode = INVALID_VALUE,
400        .rk_sensor_init_data = rk_init_data_sensor_reg_01,
401        .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_01,
402        .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_01) / sizeof(struct reginfo_t),
403        .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_01) / sizeof(struct reginfo_t),
404     },
405     #else
406     {
407        .rk_sensor_init_width = INVALID_VALUE,
408        .rk_sensor_init_height = INVALID_VALUE,
409        .rk_sensor_init_bus_param = INVALID_VALUE,
410        .rk_sensor_init_pixelcode = INVALID_VALUE,
411        .rk_sensor_init_data = NULL,
412        .rk_sensor_init_winseq = NULL,
413        .rk_sensor_winseq_size = 0,
414        .rk_sensor_init_data_size = 0,
415     },
416     #endif
417     #if CONFIG_SENSOR_IIC_ADDR_02
418     {
419        .rk_sensor_init_width = INVALID_VALUE,
420        .rk_sensor_init_height = INVALID_VALUE,
421        .rk_sensor_init_bus_param = INVALID_VALUE,
422        .rk_sensor_init_pixelcode = INVALID_VALUE,
423        .rk_sensor_init_data = rk_init_data_sensor_reg_02,
424        .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_02,
425        .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_02) / sizeof(struct reginfo_t),
426        .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_02) / sizeof(struct reginfo_t),
427     },
428     #else
429     {
430        .rk_sensor_init_width = INVALID_VALUE,
431        .rk_sensor_init_height = INVALID_VALUE,
432        .rk_sensor_init_bus_param = INVALID_VALUE,
433        .rk_sensor_init_pixelcode = INVALID_VALUE,
434        .rk_sensor_init_data = NULL,
435        .rk_sensor_init_winseq = NULL,
436        .rk_sensor_winseq_size = 0,
437        .rk_sensor_init_data_size = 0,
438     },
439     #endif
440     #if CONFIG_SENSOR_IIC_ADDR_11
441     {
442        .rk_sensor_init_width = INVALID_VALUE,
443        .rk_sensor_init_height = INVALID_VALUE,
444        .rk_sensor_init_bus_param = INVALID_VALUE,
445        .rk_sensor_init_pixelcode = INVALID_VALUE,
446        .rk_sensor_init_data = rk_init_data_sensor_reg_11,
447        .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_11,
448        .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_11) / sizeof(struct reginfo_t),
449        .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_11) / sizeof(struct reginfo_t),
450     },
451     #else
452     {
453        .rk_sensor_init_width = INVALID_VALUE,
454        .rk_sensor_init_height = INVALID_VALUE,
455        .rk_sensor_init_bus_param = INVALID_VALUE,
456        .rk_sensor_init_pixelcode = INVALID_VALUE,
457        .rk_sensor_init_data = NULL,
458        .rk_sensor_init_winseq = NULL,
459        .rk_sensor_winseq_size = 0,
460        .rk_sensor_init_data_size = 0,
461     },
462     #endif
463     #if CONFIG_SENSOR_IIC_ADDR_12
464     {
465        .rk_sensor_init_width = INVALID_VALUE,
466        .rk_sensor_init_height = INVALID_VALUE,
467        .rk_sensor_init_bus_param = INVALID_VALUE,
468        .rk_sensor_init_pixelcode = INVALID_VALUE,
469        .rk_sensor_init_data = rk_init_data_sensor_reg_12,
470        .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_12,
471        .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_12) / sizeof(struct reginfo_t),
472        .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_12) / sizeof(struct reginfo_t),
473     },
474     #else
475     {
476        .rk_sensor_init_width = INVALID_VALUE,
477        .rk_sensor_init_height = INVALID_VALUE,
478        .rk_sensor_init_bus_param = INVALID_VALUE,
479        .rk_sensor_init_pixelcode = INVALID_VALUE,
480        .rk_sensor_init_data = NULL,
481        .rk_sensor_init_winseq = NULL,
482        .rk_sensor_winseq_size = 0,
483        .rk_sensor_init_data_size = 0,
484     },
485     #endif
486
487  };
488 #include "../../../drivers/media/video/rk30_camera.c"
489
490 #endif /* CONFIG_VIDEO_RK29 */
491
492
493
494 #define RK_FB_MEM_SIZE 3*SZ_1M
495
496 #if defined(CONFIG_FB_ROCKCHIP)
497 #define LCD_CS_MUX_NAME    GPIO2A7_LCDC1DATA7_SMCDATA7_TRACEDATA7_NAME
498 #define LCD_CS_PIN         RK30_PIN2_PA7
499 #define LCD_CS_VALUE       GPIO_HIGH
500
501 #define LCD_EN_MUX_NAME    GPIO2D7_TESTCLOCKOUT_NAME
502 #define LCD_EN_PIN         RK30_PIN2_PD7
503 #define LCD_EN_VALUE       GPIO_LOW
504
505 static int rk_fb_io_init(struct rk29_fb_setting_info *fb_setting)
506 {
507         int ret = 0;
508         rk30_mux_api_set(LCD_CS_MUX_NAME, GPIO2A_GPIO2A7);
509         ret = gpio_request(LCD_CS_PIN, NULL);
510         if (ret != 0)
511         {
512                 gpio_free(LCD_CS_PIN);
513                 printk(KERN_ERR "request lcd cs pin fail!\n");
514                 return -1;
515         }
516         else
517         {
518                 gpio_direction_output(LCD_CS_PIN, LCD_CS_VALUE);
519         }
520         ret = gpio_request(LCD_EN_PIN, NULL);
521         if (ret != 0)
522         {
523                 gpio_free(LCD_EN_PIN);
524                 printk(KERN_ERR "request lcd en pin fail!\n");
525                 return -1;
526         }
527         else
528         {
529                 gpio_direction_output(LCD_EN_PIN, LCD_EN_VALUE);
530         }
531         return 0;
532 }
533 static int rk_fb_io_disable(void)
534 {
535         gpio_set_value(LCD_CS_PIN, LCD_CS_VALUE? 0:1);
536         gpio_set_value(LCD_EN_PIN, LCD_EN_VALUE? 0:1);
537         return 0;
538 }
539 static int rk_fb_io_enable(void)
540 {
541         gpio_set_value(LCD_CS_PIN, LCD_CS_VALUE);
542         gpio_set_value(LCD_EN_PIN, LCD_EN_VALUE);
543         return 0;
544 }
545
546 #if defined(CONFIG_LCDC0_RK31)
547 struct rk29fb_info lcdc0_screen_info = {
548         .prop      = PRMRY,             //primary display device
549         .io_init   = rk_fb_io_init,
550         .io_disable = rk_fb_io_disable,
551         .io_enable = rk_fb_io_enable,
552         .set_screen_info = set_lcd_info,
553 };
554 #endif
555
556 #if defined(CONFIG_LCDC1_RK31)
557 struct rk29fb_info lcdc1_screen_info = {
558         #if defined(CONFIG_HDMI_RK30)
559         .prop           = EXTEND,       //extend display device
560         .lcd_info  = NULL,
561         .set_screen_info = hdmi_init_lcdc,
562         #endif
563 };
564 #endif
565
566 static struct resource resource_fb[] = {
567         [0] = {
568                 .name  = "fb0 buf",
569                 .start = 0,
570                 .end   = 0,//RK30_FB0_MEM_SIZE - 1,
571                 .flags = IORESOURCE_MEM,
572         },
573         [1] = {
574                 .name  = "ipp buf",  //for rotate
575                 .start = 0,
576                 .end   = 0,//RK30_FB0_MEM_SIZE - 1,
577                 .flags = IORESOURCE_MEM,
578         },
579         [2] = {
580                 .name  = "fb2 buf",
581                 .start = 0,
582                 .end   = 0,//RK30_FB0_MEM_SIZE - 1,
583                 .flags = IORESOURCE_MEM,
584         },
585 };
586
587 static struct platform_device device_fb = {
588         .name           = "rk-fb",
589         .id             = -1,
590         .num_resources  = ARRAY_SIZE(resource_fb),
591         .resource       = resource_fb,
592 };
593 #endif
594
595 //i2c
596 #ifdef CONFIG_I2C0_RK30
597 static struct i2c_board_info __initdata i2c0_info[] = {
598 #if defined (CONFIG_SND_SOC_RK1000)
599         {
600                 .type          = "rk1000_i2c_codec",
601                 .addr          = 0x60,
602                 .flags         = 0,
603         },
604         {
605                 .type          = "rk1000_control",
606                 .addr          = 0x40,
607                 .flags         = 0,
608         },
609 #endif
610 };
611 #endif
612 #ifdef CONFIG_I2C1_RK30
613 static struct i2c_board_info __initdata i2c1_info[] = {
614 };
615 #endif
616 #ifdef CONFIG_I2C2_RK30
617 static struct i2c_board_info __initdata i2c2_info[] = {
618 };
619 #endif
620 #ifdef CONFIG_I2C3_RK30
621 static struct i2c_board_info __initdata i2c3_info[] = {
622 };
623 #endif
624
625 #ifdef CONFIG_I2C_GPIO_RK30
626 static struct i2c_board_info __initdata i2c_gpio_info[] = {
627 };
628 #endif
629
630 static void __init rk30_i2c_register_board_info(void)
631 {
632 #ifdef CONFIG_I2C0_RK30
633         i2c_register_board_info(0, i2c0_info, ARRAY_SIZE(i2c0_info));
634 #endif
635 #ifdef CONFIG_I2C1_RK30
636         i2c_register_board_info(1, i2c1_info, ARRAY_SIZE(i2c1_info));
637 #endif
638 #ifdef CONFIG_I2C2_RK30
639         i2c_register_board_info(2, i2c2_info, ARRAY_SIZE(i2c2_info));
640 #endif
641 #ifdef CONFIG_I2C3_RK30
642         i2c_register_board_info(3, i2c3_info, ARRAY_SIZE(i2c3_info));
643 #endif
644 #ifdef CONFIG_I2C_GPIO_RK30
645         i2c_register_board_info(4, i2c_gpio_info, ARRAY_SIZE(i2c_gpio_info));
646 #endif
647 }
648 //end of i2c
649
650 static struct spi_board_info board_spi_devices[] = {
651 };
652
653 /***********************************************************
654 *       rk30  backlight
655 ************************************************************/
656 #ifdef CONFIG_BACKLIGHT_RK29_BL
657 #define PWM_ID            1
658 #define PWM_MUX_NAME      GPIO0A3_PWM0_NAME
659 #define PWM_MUX_MODE      GPIO0A_PWM0
660 #define PWM_MUX_MODE_GPIO GPIO0A_GPIO0A3
661 #define PWM_GPIO          RK30_PIN0_PA3
662 #define PWM_EFFECT_VALUE  1
663
664 #define LCD_DISP_ON_PIN
665
666 #ifdef  LCD_DISP_ON_PIN
667
668 #define BL_EN_PIN         RK30_PIN6_PB3
669 #define BL_EN_VALUE       GPIO_HIGH
670 #endif
671 static int rk29_backlight_io_init(void)
672 {
673         int ret = 0;
674         return ret;
675 }
676
677 static int rk29_backlight_io_deinit(void)
678 {
679         int ret = 0;
680         return ret;
681 }
682
683 static int rk29_backlight_pwm_suspend(void)
684 {
685         int ret = 0;
686         return ret;
687 }
688
689 static int rk29_backlight_pwm_resume(void)
690 {
691         return 0;
692 }
693
694 static struct rk29_bl_info rk29_bl_info = {
695         .pwm_id = PWM_ID,
696         .bl_ref = PWM_EFFECT_VALUE,
697         .io_init = rk29_backlight_io_init,
698         .io_deinit = rk29_backlight_io_deinit,
699         .pwm_suspend = rk29_backlight_pwm_suspend,
700         .pwm_resume = rk29_backlight_pwm_resume,
701 };
702
703 static struct platform_device rk29_device_backlight = {
704         .name   = "rk29_backlight",
705         .id     = -1,
706         .dev    = {
707                 .platform_data  = &rk29_bl_info,
708         }
709 };
710
711 #endif
712
713 /***********************************************************
714 *       rk30 ion device
715 ************************************************************/
716 #ifdef CONFIG_ION
717 #define ION_RESERVE_SIZE        (8 * SZ_1M)
718 static struct ion_platform_data rk30_ion_pdata = {
719         .nr = 1,
720         .heaps = {
721                 {
722                         .type = ION_HEAP_TYPE_CARVEOUT,
723                         .id = ION_NOR_HEAP_ID,
724                         .name = "norheap",
725                         .size = ION_RESERVE_SIZE,
726                 }
727         },
728 };
729
730 static struct platform_device device_ion = {
731         .name = "ion-rockchip",
732         .id = 0,
733         .dev = {
734                 .platform_data = &rk30_ion_pdata,
735         },
736 };
737 #endif
738
739 static struct platform_device *devices[] __initdata = {
740 #if defined(CONFIG_FB_ROCKCHIP)
741         &device_fb,
742 #endif
743
744 #ifdef CONFIG_BACKLIGHT_RK29_BL
745         &rk29_device_backlight,
746 #endif
747
748 #ifdef CONFIG_ION
749         &device_ion,
750 #endif
751
752 };
753 /**************************************************************************************************
754  * SDMMC devices,  include the module of SD,MMC,and sdio.noted by xbw at 2012-03-05
755 **************************************************************************************************/
756 #ifdef CONFIG_SDMMC_RK29
757 #include "board-rk3066b-sdk-sdmmc.c"
758
759 #if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT)
760 #define SDMMC0_WRITE_PROTECT_PIN        RK30_PIN3_PB7   //According to your own project to set the value of write-protect-pin.
761 #endif
762
763 #if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT)
764 #define SDMMC1_WRITE_PROTECT_PIN        RK30_PIN3_PC7   //According to your own project to set the value of write-protect-pin.
765 #endif
766
767 #define RK29SDK_WIFI_SDIO_CARD_DETECT_N    RK30_PIN6_PB2
768
769 #endif //endif ---#ifdef CONFIG_SDMMC_RK29
770
771 #ifdef CONFIG_SDMMC0_RK29
772 static int rk29_sdmmc0_cfg_gpio(void)
773 {
774 #ifdef CONFIG_SDMMC_RK29_OLD
775         rk30_mux_api_set(GPIO3A3_SDMMC0CMD_NAME, GPIO3A_SDMMC0CMD);
776         rk30_mux_api_set(GPIO3A2_SDMMC0CLKOUT_NAME, GPIO3A_SDMMC0CLKOUT);
777         rk30_mux_api_set(GPIO3A4_SDMMC0DATA0_NAME, GPIO3A_SDMMC0DATA0);
778         rk30_mux_api_set(GPIO3A5_SDMMC0DATA1_NAME, GPIO3A_SDMMC0DATA1);
779         rk30_mux_api_set(GPIO3A6_SDMMC0DATA2_NAME, GPIO3A_SDMMC0DATA2);
780         rk30_mux_api_set(GPIO3A7_SDMMC0DATA3_NAME, GPIO3A_SDMMC0DATA3);
781
782         rk30_mux_api_set(GPIO3B0_SDMMC0DETECTN_NAME, GPIO3B_GPIO3B0);
783
784         rk30_mux_api_set(GPIO3A1_SDMMC0PWREN_NAME, GPIO3A_GPIO3A1);
785         gpio_request(RK30_PIN3_PA1, "sdmmc-power");
786         gpio_direction_output(RK30_PIN3_PA1, GPIO_LOW);
787
788 #else
789         rk29_sdmmc_set_iomux(0, 0xFFFF);
790
791         rk30_mux_api_set(GPIO3B0_SDMMC0DETECTN_NAME, GPIO3B_SDMMC0DETECTN);
792
793 #if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT)
794         gpio_request(SDMMC0_WRITE_PROTECT_PIN, "sdmmc-wp");
795         gpio_direction_input(SDMMC0_WRITE_PROTECT_PIN);
796 #endif
797
798 #endif
799
800         return 0;
801 }
802
803 #define CONFIG_SDMMC0_USE_DMA
804 struct rk29_sdmmc_platform_data default_sdmmc0_data = {
805         .host_ocr_avail =
806             (MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 |
807              MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 |
808              MMC_VDD_33_34 | MMC_VDD_34_35 | MMC_VDD_35_36),
809         .host_caps =
810             (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
811         .io_init = rk29_sdmmc0_cfg_gpio,
812
813 #if !defined(CONFIG_SDMMC_RK29_OLD)
814         .set_iomux = rk29_sdmmc_set_iomux,
815 #endif
816
817         .dma_name = "sd_mmc",
818 #ifdef CONFIG_SDMMC0_USE_DMA
819         .use_dma = 1,
820 #else
821         .use_dma = 0,
822 #endif
823         .detect_irq = RK30_PIN3_PB6,    // INVALID_GPIO
824         .enable_sd_wakeup = 0,
825
826 #if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT)
827         .write_prt = SDMMC0_WRITE_PROTECT_PIN,
828 #else
829         .write_prt = INVALID_GPIO,
830 #endif
831 };
832 #endif // CONFIG_SDMMC0_RK29
833
834 #ifdef CONFIG_SDMMC1_RK29
835 #define CONFIG_SDMMC1_USE_DMA
836 static int rk29_sdmmc1_cfg_gpio(void)
837 {
838 #if defined(CONFIG_SDMMC_RK29_OLD)
839         rk30_mux_api_set(GPIO3C0_SMMC1CMD_NAME, GPIO3C_SMMC1_CMD);
840         rk30_mux_api_set(GPIO3C5_SDMMC1CLKOUT_NAME, GPIO3C_SDMMC1_CLKOUT);
841         rk30_mux_api_set(GPIO3C1_SDMMC1DATA0_NAME, GPIO3C_SDMMC1_DATA0);
842         rk30_mux_api_set(GPIO3C2_SDMMC1DATA1_NAME, GPIO3C_SDMMC1_DATA1);
843         rk30_mux_api_set(GPIO3C3_SDMMC1DATA2_NAME, GPIO3C_SDMMC1_DATA2);
844         rk30_mux_api_set(GPIO3C4_SDMMC1DATA3_NAME, GPIO3C_SDMMC1_DATA3);
845         //rk30_mux_api_set(GPIO3C6_SDMMC1DETECTN_NAME, GPIO3C_SDMMC1_DETECT_N);
846
847 #else
848
849 #if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT)
850         gpio_request(SDMMC1_WRITE_PROTECT_PIN, "sdio-wp");
851         gpio_direction_input(SDMMC1_WRITE_PROTECT_PIN);
852 #endif
853
854 #endif
855
856         return 0;
857 }
858
859 struct rk29_sdmmc_platform_data default_sdmmc1_data = {
860         .host_ocr_avail =
861             (MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 |
862              MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 |
863              MMC_VDD_33_34),
864
865 #if !defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD)
866         .host_caps = (MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ |
867                       MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
868 #else
869         .host_caps =
870             (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
871 #endif
872
873         .io_init = rk29_sdmmc1_cfg_gpio,
874
875 #if !defined(CONFIG_SDMMC_RK29_OLD)
876         .set_iomux = rk29_sdmmc_set_iomux,
877 #endif
878
879         .dma_name = "sdio",
880 #ifdef CONFIG_SDMMC1_USE_DMA
881         .use_dma = 1,
882 #else
883         .use_dma = 0,
884 #endif
885
886 #if !defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD)
887 #ifdef CONFIG_WIFI_CONTROL_FUNC
888         .status = rk29sdk_wifi_status,
889         .register_status_notify = rk29sdk_wifi_status_register,
890 #endif
891 #if 0
892         .detect_irq = RK29SDK_WIFI_SDIO_CARD_DETECT_N,
893 #endif
894
895 #if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT)
896         .write_prt = SDMMC1_WRITE_PROTECT_PIN,
897 #else
898         .write_prt = INVALID_GPIO,
899 #endif
900
901 #else
902         .detect_irq = INVALID_GPIO,
903         .enable_sd_wakeup = 0,
904 #endif
905
906 };
907 #endif //endif--#ifdef CONFIG_SDMMC1_RK29
908
909 /**************************************************************************************************
910  * the end of setting for SDMMC devices
911 **************************************************************************************************/
912
913 static void __init rk31_board_init(void)
914 {
915         rk30_i2c_register_board_info();
916         spi_register_board_info(board_spi_devices, ARRAY_SIZE(board_spi_devices));
917         platform_add_devices(devices, ARRAY_SIZE(devices));
918 }
919
920 static void __init rk31_reserve(void)
921 {
922 #if defined(CONFIG_FB_ROCKCHIP)
923         resource_fb[0].start = board_mem_reserve_add("fb0", RK_FB_MEM_SIZE);
924         resource_fb[0].end = resource_fb[0].start + RK_FB_MEM_SIZE - 1;
925 #endif
926
927 #ifdef CONFIG_ION
928         rk30_ion_pdata.heaps[0].base = board_mem_reserve_add("ion", ION_RESERVE_SIZE);
929 #endif
930
931 #ifdef CONFIG_VIDEO_RK29
932         rk30_camera_request_reserve_mem();
933 #endif
934         board_mem_reserved();
935 }
936
937 #include <linux/clkdev.h>
938
939 struct clk {
940         const char              *name;
941         unsigned long           rate;
942 };
943
944 static struct clk xin24m = {
945         .name           = "xin24m",
946         .rate           = 24000000,
947 };
948
949 static struct clk xin12m = {
950         .name           = "xin12m",
951         .rate           = 12000000,
952 };
953
954 #define CLK(dev, con, ck) \
955         { \
956                 .dev_id = dev, \
957                 .con_id = con, \
958                 .clk = ck, \
959         }
960
961 static struct clk_lookup clks[] = {
962         CLK("rk30_i2c.0", "i2c", &xin24m),
963         CLK("rk30_i2c.1", "i2c", &xin24m),
964         CLK("rk30_i2c.2", "i2c", &xin24m),
965         CLK("rk30_i2c.3", "i2c", &xin24m),
966         CLK("rk30_i2c.4", "i2c", &xin24m),
967         CLK("rk29xx_spim.0", "spi", &xin24m),
968         CLK("rk29xx_spim.1", "spi", &xin24m),
969
970         CLK("rk_serial.0", "uart_div", &xin24m),
971         CLK("rk_serial.0", "uart_frac_div", &xin24m),
972         CLK("rk_serial.0", "uart", &xin24m),
973         CLK("rk_serial.0", "pclk_uart", &xin24m),
974         CLK("rk_serial.1", "uart_div", &xin24m),
975         CLK("rk_serial.1", "uart_frac_div", &xin24m),
976         CLK("rk_serial.1", "uart", &xin24m),
977         CLK("rk_serial.1", "pclk_uart", &xin24m),
978         CLK("rk_serial.2", "uart_div", &xin24m),
979         CLK("rk_serial.2", "uart_frac_div", &xin24m),
980         CLK("rk_serial.2", "uart", &xin24m),
981         CLK("rk_serial.2", "pclk_uart", &xin24m),
982
983   CLK("rk29_i2s.1", "i2s_div", &xin24m),
984         CLK("rk29_i2s.1", "i2s_frac_div", &xin24m),
985         CLK("rk29_i2s.1", "i2s", &xin12m),
986         CLK("rk29_i2s.1", "hclk_i2s", &xin24m),
987         
988         CLK("rk29_sdmmc.0","mmc",&xin24m),
989         CLK("rk29_sdmmc.0","hclk_mmc",&xin24m),
990         CLK("rk29_sdmmc.1","mmc",&xin24m),
991         CLK("rk29_sdmmc.1","hclk_mmc",&xin24m),
992         
993         CLK(NULL,"pd_lcdc0",&xin24m),
994         CLK(NULL,"hclk_lcdc0",&xin24m),
995         CLK(NULL,"aclk_lcdc0",&xin24m),
996         CLK(NULL,"dclk_lcdc0",&xin24m),
997         CLK(NULL,"pd_lcdc1",&xin24m),
998         CLK(NULL,"hclk_lcdc1",&xin24m),
999         CLK(NULL,"aclk_lcdc1",&xin24m),
1000         CLK(NULL,"dclk_lcdc1",&xin24m),
1001         
1002         CLK(NULL,"pd_cif0",&xin24m),
1003         CLK(NULL,"aclk_cif0",&xin24m),
1004         CLK(NULL,"hclk_cif0",&xin24m),
1005         CLK(NULL,"cif0_in",&xin24m),
1006         CLK(NULL,"cif0_out",&xin24m),
1007         
1008         CLK(NULL,"pwm01",&xin24m),
1009 };
1010
1011 static void __init rk30_clock_init(void)
1012 {
1013         struct clk_lookup *lk;
1014
1015         for (lk = clks; lk < clks + ARRAY_SIZE(clks); lk++) {
1016                 clkdev_add(lk);
1017         }
1018 }
1019
1020 void __init board_clock_init(void)
1021 {
1022         rk30_clock_init();   
1023 }
1024
1025 int __init clk_disable_unused(void)
1026 {
1027         return 0;
1028 }
1029
1030 int clk_enable(struct clk *clk)
1031 {
1032         return 0;
1033 }
1034 EXPORT_SYMBOL(clk_enable);
1035
1036 void clk_disable(struct clk *clk)
1037 {
1038 }
1039 EXPORT_SYMBOL(clk_disable);
1040
1041 unsigned long clk_get_rate(struct clk *clk)
1042 {
1043   if(clk)
1044                 return clk->rate;       
1045         else
1046                 return 24000000;
1047 }
1048 EXPORT_SYMBOL(clk_get_rate);
1049
1050 int clk_set_rate(struct clk *clk, unsigned long rate)
1051 {
1052         return 0;
1053 }
1054 EXPORT_SYMBOL(clk_set_rate);
1055
1056 int clk_set_parent(struct clk *clk, struct clk *parent)
1057 {
1058         return 0;
1059 }
1060 EXPORT_SYMBOL(clk_set_parent);
1061
1062 #include <mach/gpio.h>
1063 #include <plat/key.h>
1064
1065 #define EV_ENCALL                               KEY_F4
1066 #define EV_MENU                                 KEY_F1
1067
1068 #define PRESS_LEV_LOW                   1
1069 #define PRESS_LEV_HIGH                  0
1070
1071 static struct rk29_keys_button key_button[] = {
1072         {
1073                 .desc   = "menu",
1074                 .code   = EV_MENU,
1075                 .gpio   = RK30_PIN3_PB2,
1076                 .active_low = PRESS_LEV_LOW,
1077         },
1078         {
1079                 .desc   = "vol+",
1080                 .code   = KEY_VOLUMEUP,
1081                 .gpio   = RK30_PIN3_PB1,
1082                 .active_low = PRESS_LEV_LOW,
1083         },
1084         {
1085                 .desc   = "vol-",
1086                 .code   = KEY_VOLUMEDOWN,
1087                 .gpio   = RK30_PIN3_PB0,
1088                 .active_low = PRESS_LEV_LOW,
1089         },
1090         {
1091                 .desc   = "home",
1092                 .code   = KEY_HOME,
1093                 .gpio   = RK30_PIN3_PB3,
1094                 .active_low = PRESS_LEV_LOW,
1095         },
1096         {
1097                 .desc   = "esc",
1098                 .code   = KEY_BACK,
1099                 .gpio   = RK30_PIN3_PB4,
1100                 .active_low = PRESS_LEV_LOW,
1101         },
1102         {
1103                 .desc   = "key6",
1104                 .code   = KEY_CAMERA,
1105                 .gpio   = RK30_PIN3_PB5,
1106                 .active_low = PRESS_LEV_LOW,
1107         },
1108 };
1109
1110 struct rk29_keys_platform_data rk29_keys_pdata = {
1111         .buttons        = key_button,
1112         .nbuttons       = ARRAY_SIZE(key_button),
1113         .chn    = -1,  //chn: 0-7, if do not use ADC,set 'chn' -1
1114 };
1115
1116 static void __init fpga_fixup(struct machine_desc *desc, struct tag *tags,
1117                         char **cmdline, struct meminfo *mi)
1118 {
1119         mi->nr_banks = 1;
1120         mi->bank[0].start = PLAT_PHYS_OFFSET;
1121         mi->bank[0].size = SZ_128M;
1122 }
1123
1124 #include <mach/system.h>
1125 static void fpga_reset(char mode, const char *cmd)
1126 {
1127         while (1);
1128 }
1129
1130 static void __init fpga_map_io(void)
1131 {
1132         arch_reset = fpga_reset;
1133         rk30_map_common_io();
1134         rk29_setup_early_printk();
1135         rk29_sram_init();
1136         board_clock_init();
1137         rk30_iomux_init();
1138 }
1139
1140 MACHINE_START(RK31, "RK31board")
1141         .boot_params    = PLAT_PHYS_OFFSET + 0x800,
1142         .fixup          = fpga_fixup,
1143         .reserve        = &rk31_reserve,
1144         .map_io         = fpga_map_io,
1145         .init_irq       = rk30_init_irq,
1146         .timer          = &rk30_timer,
1147         .init_machine   = rk31_board_init,
1148 MACHINE_END