5 #include "threads-model.h"
7 memory_order orders[6] = {
8 memory_order_relaxed, memory_order_consume, memory_order_acquire,
9 memory_order_release, memory_order_acq_rel, memory_order_seq_cst
12 /** Performs a read action.*/
13 uint64_t model_read_action(void * obj, memory_order ord) {
14 return model->switch_to_master(new ModelAction(ATOMIC_READ, ord, obj));
17 /** Performs a write action.*/
18 void model_write_action(void * obj, memory_order ord, uint64_t val) {
19 model->switch_to_master(new ModelAction(ATOMIC_WRITE, ord, obj, val));
22 /** Performs an init action. */
23 void model_init_action(void * obj, uint64_t val) {
24 model->switch_to_master(new ModelAction(ATOMIC_INIT, memory_order_relaxed, obj, val));
28 * Performs the read part of a RMW action. The next action must either be the
29 * write part of the RMW action or an explicit close out of the RMW action w/o
32 uint64_t model_rmwr_action(void *obj, memory_order ord) {
33 return model->switch_to_master(new ModelAction(ATOMIC_RMWR, ord, obj));
36 /** Performs the write part of a RMW action. */
37 void model_rmw_action(void *obj, memory_order ord, uint64_t val) {
38 model->switch_to_master(new ModelAction(ATOMIC_RMW, ord, obj, val));
41 /** Closes out a RMW action without doing a write. */
42 void model_rmwc_action(void *obj, memory_order ord) {
43 model->switch_to_master(new ModelAction(ATOMIC_RMWC, ord, obj));
46 /** Issues a fence operation. */
47 void model_fence_action(memory_order ord) {
48 model->switch_to_master(new ModelAction(ATOMIC_FENCE, ord, FENCE_LOCATION));
51 // --------------------- helper functions --------------------------------
52 uint64_t model_rmwr_action_helper(void *obj, int atomic_index) {
53 return model->switch_to_master(new ModelAction(ATOMIC_RMWR, orders[atomic_index], obj));
56 void model_rmw_action_helper(void *obj, int atomic_index, uint64_t val) {
57 model->switch_to_master(new ModelAction(ATOMIC_RMW, orders[atomic_index], obj, val));
60 void model_rmwc_action_helper(void *obj, int atomic_index) {
61 model->switch_to_master(new ModelAction(ATOMIC_RMWC, orders[atomic_index], obj));
64 void model_fence_action_helper(int atomic_index) {
65 model->switch_to_master(new ModelAction(ATOMIC_FENCE, orders[atomic_index], FENCE_LOCATION));
69 uint8_t cds_atomic_load8(void * obj, int atomic_index) {
70 return (uint8_t) ( model->switch_to_master(new ModelAction(ATOMIC_READ, orders[atomic_index], obj)) );
72 uint16_t cds_atomic_load16(void * obj, int atomic_index) {
73 return (uint16_t) ( model->switch_to_master(new ModelAction(ATOMIC_READ, orders[atomic_index], obj)) );
75 uint32_t cds_atomic_load32(void * obj, int atomic_index) {
76 return (uint32_t) ( model->switch_to_master(new ModelAction(ATOMIC_READ, orders[atomic_index], obj)) );
78 uint64_t cds_atomic_load64(void * obj, int atomic_index) {
79 return model->switch_to_master(new ModelAction(ATOMIC_READ, orders[atomic_index], obj));
83 void cds_atomic_store8(void * obj, int atomic_index, uint8_t val) {
84 model->switch_to_master(new ModelAction(ATOMIC_WRITE, orders[atomic_index], obj, (uint64_t) val));
86 void cds_atomic_store16(void * obj, int atomic_index, uint16_t val) {
87 model->switch_to_master(new ModelAction(ATOMIC_WRITE, orders[atomic_index], obj, (uint64_t) val));
89 void cds_atomic_store32(void * obj, int atomic_index, uint32_t val) {
90 model->switch_to_master(new ModelAction(ATOMIC_WRITE, orders[atomic_index], obj, (uint64_t) val));
92 void cds_atomic_store64(void * obj, int atomic_index, uint64_t val) {
93 model->switch_to_master(new ModelAction(ATOMIC_WRITE, orders[atomic_index], obj, val));
97 #define _ATOMIC_RMW_(__op__, size, addr, atomic_index, val ) \
99 uint##size##_t _old = model_rmwr_action_helper(addr, atomic_index); \
100 uint##size##_t _copy = _old; \
101 _copy __op__ ( uint##size##_t ) _val; \
102 model_rmw_action_helper(addr, atomic_index, (uint64_t) _copy); \
106 #define _ATOMIC_RMW_(__op__, size, addr, atomic_index, val ) \
108 uint##size##_t _old = model_rmwr_action_helper(addr, atomic_index); \
109 uint##size##_t _copy = _old; \
110 uint##size##_t _val = val; \
112 model_rmw_action_helper(addr, atomic_index, (uint64_t) _copy); \
116 // cds atomic exchange
117 uint8_t cds_atomic_exchange8(void* addr, int atomic_index, uint8_t val) {
118 _ATOMIC_RMW_( = , 8, addr, atomic_index, val);
120 uint16_t cds_atomic_exchange16(void* addr, int atomic_index, uint16_t val) {
121 _ATOMIC_RMW_( = , 16, addr, atomic_index, val);
123 uint32_t cds_atomic_exchange32(void* addr, int atomic_index, uint32_t val) {
124 _ATOMIC_RMW_( = , 32, addr, atomic_index, val);
126 uint64_t cds_atomic_exchange64(void* addr, int atomic_index, uint64_t val) {
127 _ATOMIC_RMW_( = , 64, addr, atomic_index, val);
130 // cds atomic fetch add
131 uint8_t cds_atomic_fetch_add8(void* addr, int atomic_index, uint8_t val) {
132 _ATOMIC_RMW_( += , 8, addr, atomic_index, val);
134 uint16_t cds_atomic_fetch_add16(void* addr, int atomic_index, uint16_t val) {
135 _ATOMIC_RMW_( += , 16, addr, atomic_index, val);
137 uint32_t cds_atomic_fetch_add32(void* addr, int atomic_index, uint32_t val) {
138 _ATOMIC_RMW_( += , 32, addr, atomic_index, val);
140 uint64_t cds_atomic_fetch_add64(void* addr, int atomic_index, uint64_t val) {
141 _ATOMIC_RMW_( += , 64, addr, atomic_index, val);
144 // cds atomic fetch sub
145 uint8_t cds_atomic_fetch_sub8(void* addr, int atomic_index, uint8_t val) {
146 _ATOMIC_RMW_( -= , 8, addr, atomic_index, val);
148 uint16_t cds_atomic_fetch_sub16(void* addr, int atomic_index, uint16_t val) {
149 _ATOMIC_RMW_( -= , 16, addr, atomic_index, val);
151 uint32_t cds_atomic_fetch_sub32(void* addr, int atomic_index, uint32_t val) {
152 _ATOMIC_RMW_( -= , 32, addr, atomic_index, val);
154 uint64_t cds_atomic_fetch_sub64(void* addr, int atomic_index, uint64_t val) {
155 _ATOMIC_RMW_( -= , 64, addr, atomic_index, val);
158 // cds atomic fetch and
159 uint8_t cds_atomic_fetch_and8(void* addr, int atomic_index, uint8_t val) {
160 _ATOMIC_RMW_( &= , 8, addr, atomic_index, val);
162 uint16_t cds_atomic_fetch_and16(void* addr, int atomic_index, uint16_t val) {
163 _ATOMIC_RMW_( &= , 16, addr, atomic_index, val);
165 uint32_t cds_atomic_fetch_and32(void* addr, int atomic_index, uint32_t val) {
166 _ATOMIC_RMW_( &= , 32, addr, atomic_index, val);
168 uint64_t cds_atomic_fetch_and64(void* addr, int atomic_index, uint64_t val) {
169 _ATOMIC_RMW_( &= , 64, addr, atomic_index, val);
172 // cds atomic fetch or
173 uint8_t cds_atomic_fetch_or8(void* addr, int atomic_index, uint8_t val) {
174 _ATOMIC_RMW_( |= , 8, addr, atomic_index, val);
176 uint16_t cds_atomic_fetch_or16(void* addr, int atomic_index, uint16_t val) {
177 _ATOMIC_RMW_( |= , 16, addr, atomic_index, val);
179 uint32_t cds_atomic_fetch_or32(void* addr, int atomic_index, uint32_t val) {
180 _ATOMIC_RMW_( |= , 32, addr, atomic_index, val);
182 uint64_t cds_atomic_fetch_or64(void* addr, int atomic_index, uint64_t val) {
183 _ATOMIC_RMW_( |= , 64, addr, atomic_index, val);
186 // cds atomic fetch xor
187 uint8_t cds_atomic_fetch_xor8(void* addr, int atomic_index, uint8_t val) {
188 _ATOMIC_RMW_( ^= , 8, addr, atomic_index, val);
190 uint16_t cds_atomic_fetch_xor16(void* addr, int atomic_index, uint16_t val) {
191 _ATOMIC_RMW_( ^= , 16, addr, atomic_index, val);
193 uint32_t cds_atomic_fetch_xor32(void* addr, int atomic_index, uint32_t val) {
194 _ATOMIC_RMW_( ^= , 32, addr, atomic_index, val);
196 uint64_t cds_atomic_fetch_xor64(void* addr, int atomic_index, uint64_t val) {
197 _ATOMIC_RMW_( ^= , 64, addr, atomic_index, val);
200 // cds atomic compare and exchange
201 // In order to accomodate the LLVM PASS, the return values are not true or false.
203 #define _ATOMIC_CMPSWP_WEAK_ _ATOMIC_CMPSWP_
204 #define _ATOMIC_CMPSWP_(size, addr, expected, desired, atomic_index) \
206 uint##size##_t _desired = desired; \
207 uint##size##_t _expected = expected; \
208 uint##size##_t _old = model_rmwr_action_helper(addr, atomic_index); \
209 if (_old == _expected ) { \
210 model_rmw_action_helper(addr, atomic_index, (uint64_t) _desired ); return _expected; } \
212 model_rmwc_action_helper(addr, atomic_index); _expected = _old; return _old; } \
215 // expected is supposed to be a pointer to an address, but the CmpOperand
216 // extracted from LLVM IR is an integer type.
218 uint8_t cds_atomic_compare_exchange8(void* addr, uint8_t expected,
219 uint8_t desired, int atomic_index_succ, int atomic_index_fail ) {
220 _ATOMIC_CMPSWP_(8, addr, expected, desired, atomic_index_succ );
222 uint16_t cds_atomic_compare_exchange16(void* addr, uint16_t expected,
223 uint16_t desired, int atomic_index_succ, int atomic_index_fail ) {
224 _ATOMIC_CMPSWP_(16, addr, expected, desired, atomic_index_succ );
226 uint32_t cds_atomic_compare_exchange32(void* addr, uint32_t expected,
227 uint32_t desired, int atomic_index_succ, int atomic_index_fail ) {
228 _ATOMIC_CMPSWP_(32, addr, expected, desired, atomic_index_succ );
230 uint64_t cds_atomic_compare_exchange64(void* addr, uint64_t expected,
231 uint64_t desired, int atomic_index_succ, int atomic_index_fail ) {
232 _ATOMIC_CMPSWP_(64, addr, expected, desired, atomic_index_succ );
235 // cds atomic thread fence
237 void cds_atomic_thread_fence(int atomic_index) {
238 model->switch_to_master(new ModelAction(ATOMIC_FENCE, orders[atomic_index], FENCE_LOCATION));
242 #define _ATOMIC_CMPSWP_( __a__, __e__, __m__, __x__ ) \
243 ({ volatile __typeof__((__a__)->__f__)* __p__ = & ((__a__)->__f__); \
244 __typeof__(__e__) __q__ = (__e__); \
245 __typeof__(__m__) __v__ = (__m__); \
247 __typeof__((__a__)->__f__) __t__=(__typeof__((__a__)->__f__)) model_rmwr_action((void *)__p__, __x__); \
248 if (__t__ == * __q__ ) { \
249 model_rmw_action((void *)__p__, __x__, (uint64_t) __v__); __r__ = true; } \
250 else { model_rmwc_action((void *)__p__, __x__); *__q__ = __t__; __r__ = false;} \
253 #define _ATOMIC_FENCE_( __x__ ) \
254 ({ model_fence_action(__x__);})
259 #define _ATOMIC_MODIFY_( __a__, __o__, __m__, __x__ ) \
260 ({ volatile __typeof__((__a__)->__f__)* __p__ = & ((__a__)->__f__); \
261 __typeof__((__a__)->__f__) __old__=(__typeof__((__a__)->__f__)) model_rmwr_action((void *)__p__, __x__); \
262 __typeof__(__m__) __v__ = (__m__); \
263 __typeof__((__a__)->__f__) __copy__= __old__; \
264 __copy__ __o__ __v__; \
265 model_rmw_action((void *)__p__, __x__, (uint64_t) __copy__); \
266 __old__ = __old__; Silence clang (-Wunused-value) \