5 llc - LLVM static compiler
9 B<llc> [I<options>] [I<filename>]
13 The B<llc> command compiles LLVM bytecode into assembly language for a
14 specified architecture. The assembly language output can then be passed through
15 a native assembler and linker to generate native code.
17 The choice of architecture for the output assembly code is automatically
18 determined from the input bytecode file, unless a B<-m> option is used to override
23 If I<filename> is - or omitted, B<llc> reads LLVM bytecode from standard input.
24 Otherwise, it will read LLVM bytecode from I<filename>.
26 If the B<-o> option is omitted, then B<llc> will send its output to standard
27 output if the input is from standard input. If the B<-o> option specifies -,
28 then the output will also be sent to standard output.
30 If no B<-o> option is specified and an input file other than - is specified,
31 then B<llc> creates the output filename by taking the input filename,
32 removing any existing F<.bc> extension, and adding a F<.s> suffix.
34 Other B<llc> options are as follows:
40 Overwrite output files. By default, B<llc> will refuse to overwrite
41 an output file which already exists.
43 =item B<-march>=I<arch>
45 Specify the architecture for which to generate assembly. Valid
52 Intel IA-32 (Pentium and above)
56 32-bit PowerPC (MacOS X, 32-bit ABI)
64 Emit C code, not assembly
68 =item B<--disable-fp-elim>
70 Disable frame pointer elimination optimization.
72 =item B<--enable-correct-eh-support>
74 Instruct the B<lowerinvoke> pass to insert code for correct exception handling
75 support. This is expensive and is by default omitted for efficiency.
79 Print a summary of command line options.
83 Print statistics recorded by code-generation passes.
85 =item B<--time-passes>
87 Record the amount of time needed for each pass and print a report to standard
90 =item B<--print-machineinstrs>
92 Print generated machine code between compilation phases (useful for debugging).
94 =item B<--regalloc>=I<allocator>
96 Specify the register allocator to use. The default I<allocator> is I<local>.
97 Valid register allocators are:
103 Very simple "always spill" register allocator
107 Local register allocator
111 Linear scan global register allocator
113 =item I<iterativescan>
115 Iterative scan global register allocator
119 =item B<--spiller>=I<spiller>
121 Specify the spiller to use for register allocators that support it. Currently
122 this option is used only by the linear scan register allocator. The default
123 I<spiller> is I<local>. Valid spillers are:
137 =item B<--load>=F<dso_path>
139 Dynamically load F<dso_path> (a path to a dynamically shared object) that
140 implements an LLVM target. This will permit the target name to be used with the
141 B<-march> option so that code can be generated for that target.
145 =head2 Intel IA-32-specific Options
149 =item B<--x86-asm-syntax=att|intel>
151 Specify whether to emit assembly code in AT&T syntax (the default) or intel
156 =head2 SPARCV9-specific Options
160 =item B<--disable-peephole>
162 Disable peephole optimization pass.
164 =item B<--disable-sched>
166 Disable local scheduling pass.
172 If B<llc> succeeds, it will exit with 0. Otherwise, if an error occurs,
173 it will exit with a non-zero value.
181 Maintained by the LLVM Team (L<http://llvm.cs.uiuc.edu>).