1 lli - directly execute programs from LLVM bitcode
2 =================================================
9 **lli** [*options*] [*filename*] [*program args*]
16 **lli** directly executes programs in LLVM bitcode format. It takes a program
17 in LLVM bitcode format and executes it using a just-in-time compiler, if one is
18 available for the current architecture, or an interpreter. **lli** takes all of
19 the same code generator options as llc|llc, but they are only effective when
20 **lli** is using the just-in-time compiler.
22 If *filename* is not specified, then **lli** reads the LLVM bitcode for the
23 program from standard input.
25 The optional *args* specified on the command line are passed to the program as
34 **-fake-argv0**\ =\ *executable*
36 Override the ``argv[0]`` value passed into the executing program.
40 **-force-interpreter**\ =\ *{false,true}*
42 If set to true, use the interpreter even if a just-in-time compiler is available
43 for this architecture. Defaults to false.
49 Print a summary of command line options.
53 **-load**\ =\ *pluginfilename*
55 Causes **lli** to load the plugin (shared object) named *pluginfilename* and use
62 Print statistics from the code-generation passes. This is only meaningful for
63 the just-in-time compiler, at present.
69 Record the amount of time needed for each code-generation pass and print it to
76 Print out the version of **lli** and exit without doing anything else.
86 **-mtriple**\ =\ *target triple*
88 Override the target triple specified in the input bitcode file with the
89 specified string. This may result in a crash if you pick an
90 architecture which is not compatible with the current system.
96 Specify the architecture for which to generate assembly, overriding the target
97 encoded in the bitcode file. See the output of **llc -help** for a list of
98 valid architectures. By default this is inferred from the target triple or
99 autodetected to the current architecture.
103 **-mcpu**\ =\ *cpuname*
105 Specify a specific chip in the current architecture to generate code for.
106 By default this is inferred from the target triple and autodetected to
107 the current architecture. For a list of available CPUs, use:
108 **llvm-as < /dev/null | llc -march=xyz -mcpu=help**
112 **-mattr**\ =\ *a1,+a2,-a3,...*
114 Override or control specific attributes of the target, such as whether SIMD
115 operations are enabled or not. The default set of attributes is set by the
116 current CPU. For a list of available attributes, use:
117 **llvm-as < /dev/null | llc -march=xyz -mattr=help**
122 FLOATING POINT OPTIONS
123 ----------------------
127 **-disable-excess-fp-precision**
129 Disable optimizations that may increase floating point precision.
133 **-enable-no-infs-fp-math**
135 Enable optimizations that assume no Inf values.
139 **-enable-no-nans-fp-math**
141 Enable optimizations that assume no NAN values.
145 **-enable-unsafe-fp-math**
147 Causes **lli** to enable optimizations that may decrease floating point
154 Causes **lli** to generate software floating point library calls instead of
155 equivalent hardware instructions.
160 CODE GENERATION OPTIONS
161 -----------------------
165 **-code-model**\ =\ *model*
167 Choose the code model from:
172 default: Target default code model
173 small: Small code model
174 kernel: Kernel code model
175 medium: Medium code model
176 large: Large code model
181 **-disable-post-RA-scheduler**
183 Disable scheduling after register allocation.
187 **-disable-spill-fusing**
189 Disable fusing of spill code into instructions.
193 **-enable-correct-eh-support**
195 Make the -lowerinvoke pass insert expensive, but correct, EH code.
201 Exception handling should be enabled in the just-in-time compiler.
205 **-join-liveintervals**
207 Coalesce copies (default=true).
211 **-nozero-initialized-in-bss** Don't place zero-initialized symbols into the BSS section.
215 **-pre-RA-sched**\ =\ *scheduler*
217 Instruction schedulers available (before register allocation):
222 =default: Best scheduler for the target
223 =none: No scheduling: breadth first sequencing
224 =simple: Simple two pass scheduling: minimize critical path and maximize processor utilization
225 =simple-noitin: Simple two pass scheduling: Same as simple except using generic latency
226 =list-burr: Bottom-up register reduction list scheduling
227 =list-tdrr: Top-down register reduction list scheduling
228 =list-td: Top-down list scheduler -print-machineinstrs - Print generated machine code
233 **-regalloc**\ =\ *allocator*
235 Register allocator to use (default=linearscan)
240 =bigblock: Big-block register allocator
241 =linearscan: linear scan register allocator =local - local register allocator
242 =simple: simple register allocator
247 **-relocation-model**\ =\ *model*
249 Choose relocation model from:
254 =default: Target default relocation model
255 =static: Non-relocatable code =pic - Fully relocatable, position independent code
256 =dynamic-no-pic: Relocatable external references, non-relocatable code
263 Spiller to use (default=local)
268 =simple: simple spiller
269 =local: local spiller
274 **-x86-asm-syntax**\ =\ *syntax*
276 Choose style of code to emit from X86 backend:
281 =att: Emit AT&T-style assembly
282 =intel: Emit Intel-style assembly
292 If **lli** fails to load the program, it will exit with an exit code of 1.
293 Otherwise, it will return the exit code of the program it executes.