6 tblgen - Target Description To C++ Code Generator
10 B<tblgen> [I<options>] [I<filename>]
14 B<tblgen> translates from target description (.td) files into C++ code that can
15 be included in the definition of an LLVM target library. Most users of LLVM will
16 not need to use this program. It is only for assisting with writing an LLVM
19 The input and output of B<tblgen> is beyond the scope of this short
20 introduction. Please see the I<CodeGeneration> page in the LLVM documentation.
22 The F<filename> argument specifies the name of a Target Description (.td) file
31 Print a summary of command line options.
33 =item B<-o> F<filename>
35 Specify the output file name. If F<filename> is C<->, then B<tblgen>
36 sends its output to standard output.
38 =item B<-I> F<directory>
40 Specify where to find other target description files for inclusion. The
41 F<directory> value should be a full or partial path to a directory that contains
42 target description files.
44 =item B<-asmparsernum> F<N>
46 Make -gen-asm-parser emit assembly writer number F<N>.
48 =item B<-asmwriternum> F<N>
50 Make -gen-asm-writer emit assembly writer number F<N>.
52 =item B<-class> F<class Name>
54 Print the enumeration list for this class.
56 =item B<-print-records>
58 Print all records to standard output (default).
62 Print enumeration values for a class
66 Print expanded sets for testing DAG exprs.
70 Generate machine code emitter.
72 =item B<-gen-register-info>
74 Generate registers and register classes info.
76 =item B<-gen-instr-info>
78 Generate instruction descriptions.
80 =item B<-gen-asm-writer>
82 Generate the assembly writer.
84 =item B<-gen-disassembler>
86 Generate disassembler.
88 =item B<-gen-pseudo-lowering>
90 Generate pseudo instruction lowering.
92 =item B<-gen-dag-isel>
94 Generate a DAG (Directed Acycle Graph) instruction selector.
96 =item B<-gen-asm-matcher>
98 Generate assembly instruction matcher.
100 =item B<-gen-dfa-packetizer>
102 Generate DFA Packetizer for VLIW targets.
104 =item B<-gen-fast-isel>
106 Generate a "fast" instruction selector.
108 =item B<-gen-subtarget>
110 Generate subtarget enumerations.
112 =item B<-gen-intrinsic>
114 Generate intrinsic information.
116 =item B<-gen-tgt-intrinsic>
118 Generate target intrinsic information.
120 =item B<-gen-enhanced-disassembly-info>
122 Generate enhanced disassembly info.
126 Show the version number of this program.
132 If B<tblgen> succeeds, it will exit with 0. Otherwise, if an error
133 occurs, it will exit with a non-zero value.
137 Maintained by The LLVM Team (L<http://llvm.org/>).