9 These are in-progress notes for the upcoming LLVM 3.3 release. You may
10 prefer the `LLVM 3.2 Release Notes <http://llvm.org/releases/3.2/docs
11 /ReleaseNotes.html>`_.
17 This document contains the release notes for the LLVM Compiler Infrastructure,
18 release 3.3. Here we describe the status of LLVM, including major improvements
19 from the previous release, improvements in various subprojects of LLVM, and
20 some of the current users of the code. All LLVM releases may be downloaded
21 from the `LLVM releases web site <http://llvm.org/releases/>`_.
23 For more information about LLVM, including information about the latest
24 release, please check out the `main LLVM web site <http://llvm.org/>`_. If you
25 have questions or comments, the `LLVM Developer's Mailing List
26 <http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev>`_ is a good place to send
29 Note that if you are reading this file from a Subversion checkout or the main
30 LLVM web page, this document applies to the *next* release, not the current
31 one. To see the release notes for a specific release, please see the `releases
32 page <http://llvm.org/releases/>`_.
34 Non-comprehensive list of changes in this release
35 =================================================
38 For small 1-3 sentence descriptions, just add an entry at the end of
39 this list. If your description won't fit comfortably in one bullet
40 point (e.g. maybe you would like to give an example of the
41 functionality, or simply have a lot to talk about), see the `NOTE` below
42 for adding a new subsection.
44 * The CellSPU port has been removed. It can still be found in older versions.
46 * The IR-level extended linker APIs (for example, to link bitcode files out of
47 archives) have been removed. Any existing clients of these features should
48 move to using a linker with integrated LTO support.
50 * LLVM and Clang's documentation has been migrated to the `Sphinx
51 <http://sphinx-doc.org/>`_ documentation generation system which uses
52 easy-to-write reStructuredText. See `llvm/docs/README.txt` for more
55 * TargetTransformInfo (TTI) is a new interface that can be used by IR-level
56 passes to obtain target-specific information, such as the costs of
57 instructions. Only "Lowering" passes such as LSR and the vectorizer are
58 allowed to use the TTI infrastructure.
60 * We've improved the X86 and ARM cost model.
62 * The Attributes classes have been completely rewritten and expanded. They now
63 support not only enumerated attributes and alignments, but "string"
64 attributes, which are useful for passing information to code generation. See
65 :doc:`HowToUseAttributes` for more details.
67 * TableGen's syntax for instruction selection patterns has been simplified.
68 Instead of specifying types indirectly with register classes, you should now
69 specify types directly in the input patterns. See ``SparcInstrInfo.td`` for
70 examples of the new syntax. The old syntax using register classes still
71 works, but it will be removed in a future LLVM release.
76 If you would like to document a larger change, then you can add a
77 subsection about it right here. You can copy the following boilerplate
78 and un-indent it (the indentation causes it to be inside this comment).
83 Makes programs 10x faster by doing Special New Thing.
88 We've added support for AArch64, ARM's 64-bit architecture. Development is still
89 in fairly early stages, but we expect successful compilation when:
91 - compiling standard compliant C99 and C++03 with Clang;
92 - using Linux as a target platform;
93 - where code + static data doesn't exceed 4GB in size (heap allocated data has
96 Some additional functionality is also implemented, notably DWARF debugging,
97 GNU-style thread local storage and inline assembly.
102 - Removed support for legacy hexagonv2 and hexagonv3 processor
103 architectures which are no longer in use. Currently supported
104 architectures are hexagonv4 and hexagonv5.
109 We've continued the work on the loop vectorizer. The loop vectorizer now
110 has the following features:
112 - Loops with unknown trip count.
113 - Runtime checks of pointers
114 - Reductions, Inductions
116 - Pointer induction variables
118 - Vectorization of mixed types
119 - Vectorization of function calls
120 - Partial unrolling during vectorization
125 The R600 backend was added in this release, it supports AMD GPUs
126 (HD2XXX - HD7XXX). This backend is used in AMD's Open Source
127 graphics / compute drivers which are developed as part of the `Mesa3D
128 <http://www.mesa3d.org>`_ project.
132 Additional Information
133 ======================
135 A wide variety of additional information is available on the `LLVM web page
136 <http://llvm.org/>`_, in particular in the `documentation
137 <http://llvm.org/docs/>`_ section. The web page also contains versions of the
138 API documentation which is up-to-date with the Subversion version of the source
139 code. You can access versions of these documents specific to this release by
140 going into the ``llvm/docs/`` directory in the LLVM tree.
142 If you have any questions or comments about LLVM, please feel free to contact
143 us via the `mailing lists <http://llvm.org/docs/#maillist>`_.