2 * ACPI support for Intel Lynxpoint LPSS.
4 * Copyright (C) 2013, Intel Corporation
5 * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
6 * Rafael J. Wysocki <rafael.j.wysocki@intel.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/acpi.h>
14 #include <linux/clk.h>
15 #include <linux/clkdev.h>
16 #include <linux/clk-provider.h>
17 #include <linux/err.h>
19 #include <linux/platform_device.h>
20 #include <linux/platform_data/clk-lpss.h>
21 #include <linux/pm_runtime.h>
25 ACPI_MODULE_NAME("acpi_lpss");
27 #define LPSS_CLK_SIZE 0x04
28 #define LPSS_LTR_SIZE 0x18
30 /* Offsets relative to LPSS_PRIVATE_OFFSET */
31 #define LPSS_GENERAL 0x08
32 #define LPSS_GENERAL_LTR_MODE_SW BIT(2)
33 #define LPSS_GENERAL_UART_RTS_OVRD BIT(3)
34 #define LPSS_SW_LTR 0x10
35 #define LPSS_AUTO_LTR 0x14
36 #define LPSS_LTR_SNOOP_REQ BIT(15)
37 #define LPSS_LTR_SNOOP_MASK 0x0000FFFF
38 #define LPSS_LTR_SNOOP_LAT_1US 0x800
39 #define LPSS_LTR_SNOOP_LAT_32US 0xC00
40 #define LPSS_LTR_SNOOP_LAT_SHIFT 5
41 #define LPSS_LTR_SNOOP_LAT_CUTOFF 3000
42 #define LPSS_LTR_MAX_VAL 0x3FF
43 #define LPSS_TX_INT 0x20
44 #define LPSS_TX_INT_MASK BIT(1)
46 struct lpss_shared_clock {
52 struct lpss_private_data;
54 struct lpss_device_desc {
56 const char *clkdev_name;
58 unsigned int prv_offset;
59 size_t prv_size_override;
61 struct lpss_shared_clock *shared_clock;
62 void (*setup)(struct lpss_private_data *pdata);
65 static struct lpss_device_desc lpss_dma_desc = {
67 .clkdev_name = "hclk",
70 struct lpss_private_data {
71 void __iomem *mmio_base;
72 resource_size_t mmio_size;
74 const struct lpss_device_desc *dev_desc;
77 static void lpss_uart_setup(struct lpss_private_data *pdata)
82 offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
83 reg = readl(pdata->mmio_base + offset);
84 writel(reg | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
86 offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
87 reg = readl(pdata->mmio_base + offset);
88 writel(reg | LPSS_GENERAL_UART_RTS_OVRD, pdata->mmio_base + offset);
91 static struct lpss_device_desc lpt_dev_desc = {
98 static struct lpss_device_desc lpt_uart_dev_desc = {
101 .ltr_required = true,
103 .setup = lpss_uart_setup,
106 static struct lpss_device_desc lpt_sdio_dev_desc = {
107 .prv_offset = 0x1000,
108 .prv_size_override = 0x1018,
109 .ltr_required = true,
112 static struct lpss_shared_clock pwm_clock = {
117 static struct lpss_device_desc byt_pwm_dev_desc = {
118 .clk_required = true,
119 .shared_clock = &pwm_clock,
122 static struct lpss_shared_clock uart_clock = {
127 static struct lpss_device_desc byt_uart_dev_desc = {
128 .clk_required = true,
131 .shared_clock = &uart_clock,
132 .setup = lpss_uart_setup,
135 static struct lpss_shared_clock spi_clock = {
140 static struct lpss_device_desc byt_spi_dev_desc = {
141 .clk_required = true,
144 .shared_clock = &spi_clock,
147 static struct lpss_device_desc byt_sdio_dev_desc = {
148 .clk_required = true,
151 static struct lpss_shared_clock i2c_clock = {
156 static struct lpss_device_desc byt_i2c_dev_desc = {
157 .clk_required = true,
159 .shared_clock = &i2c_clock,
162 static const struct acpi_device_id acpi_lpss_device_ids[] = {
163 /* Generic LPSS devices */
164 { "INTL9C60", (unsigned long)&lpss_dma_desc },
166 /* Lynxpoint LPSS devices */
167 { "INT33C0", (unsigned long)&lpt_dev_desc },
168 { "INT33C1", (unsigned long)&lpt_dev_desc },
169 { "INT33C2", (unsigned long)&lpt_dev_desc },
170 { "INT33C3", (unsigned long)&lpt_dev_desc },
171 { "INT33C4", (unsigned long)&lpt_uart_dev_desc },
172 { "INT33C5", (unsigned long)&lpt_uart_dev_desc },
173 { "INT33C6", (unsigned long)&lpt_sdio_dev_desc },
176 /* BayTrail LPSS devices */
177 { "80860F09", (unsigned long)&byt_pwm_dev_desc },
178 { "80860F0A", (unsigned long)&byt_uart_dev_desc },
179 { "80860F0E", (unsigned long)&byt_spi_dev_desc },
180 { "80860F14", (unsigned long)&byt_sdio_dev_desc },
181 { "80860F41", (unsigned long)&byt_i2c_dev_desc },
184 { "INT3430", (unsigned long)&lpt_dev_desc },
185 { "INT3431", (unsigned long)&lpt_dev_desc },
186 { "INT3432", (unsigned long)&lpt_dev_desc },
187 { "INT3433", (unsigned long)&lpt_dev_desc },
188 { "INT3434", (unsigned long)&lpt_uart_dev_desc },
189 { "INT3435", (unsigned long)&lpt_uart_dev_desc },
190 { "INT3436", (unsigned long)&lpt_sdio_dev_desc },
196 static int is_memory(struct acpi_resource *res, void *not_used)
199 return !acpi_dev_resource_memory(res, &r);
202 /* LPSS main clock device. */
203 static struct platform_device *lpss_clk_dev;
205 static inline void lpt_register_clock_device(void)
207 lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
210 static int register_device_clock(struct acpi_device *adev,
211 struct lpss_private_data *pdata)
213 const struct lpss_device_desc *dev_desc = pdata->dev_desc;
214 struct lpss_shared_clock *shared_clock = dev_desc->shared_clock;
215 struct clk *clk = ERR_PTR(-ENODEV);
216 struct lpss_clk_data *clk_data;
220 lpt_register_clock_device();
222 clk_data = platform_get_drvdata(lpss_clk_dev);
226 if (dev_desc->clkdev_name) {
227 clk_register_clkdev(clk_data->clk, dev_desc->clkdev_name,
228 dev_name(&adev->dev));
232 if (!pdata->mmio_base
233 || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
236 parent = clk_data->name;
239 clk = shared_clock->clk;
241 clk = clk_register_fixed_rate(NULL, shared_clock->name,
244 shared_clock->clk = clk;
246 parent = shared_clock->name;
249 if (dev_desc->clk_gate) {
250 clk = clk_register_gate(NULL, dev_name(&adev->dev), parent, 0,
251 pdata->mmio_base + dev_desc->prv_offset,
259 clk_register_clkdev(clk, NULL, dev_name(&adev->dev));
263 static int acpi_lpss_create_device(struct acpi_device *adev,
264 const struct acpi_device_id *id)
266 struct lpss_device_desc *dev_desc;
267 struct lpss_private_data *pdata;
268 struct resource_list_entry *rentry;
269 struct list_head resource_list;
272 dev_desc = (struct lpss_device_desc *)id->driver_data;
274 return acpi_create_platform_device(adev, id);
276 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
280 INIT_LIST_HEAD(&resource_list);
281 ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
285 list_for_each_entry(rentry, &resource_list, node)
286 if (resource_type(&rentry->res) == IORESOURCE_MEM) {
287 if (dev_desc->prv_size_override)
288 pdata->mmio_size = dev_desc->prv_size_override;
290 pdata->mmio_size = resource_size(&rentry->res);
291 pdata->mmio_base = ioremap(rentry->res.start,
296 acpi_dev_free_resource_list(&resource_list);
298 pdata->dev_desc = dev_desc;
300 if (dev_desc->clk_required) {
301 ret = register_device_clock(adev, pdata);
303 /* Skip the device, but continue the namespace scan. */
310 * This works around a known issue in ACPI tables where LPSS devices
311 * have _PS0 and _PS3 without _PSC (and no power resources), so
312 * acpi_bus_init_power() will assume that the BIOS has put them into D0.
314 ret = acpi_device_fix_up_power(adev);
316 /* Skip the device, but continue the namespace scan. */
322 dev_desc->setup(pdata);
324 adev->driver_data = pdata;
325 ret = acpi_create_platform_device(adev, id);
329 adev->driver_data = NULL;
336 static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg)
338 return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
341 static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata,
344 writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
347 static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
349 struct acpi_device *adev;
350 struct lpss_private_data *pdata;
354 ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
358 spin_lock_irqsave(&dev->power.lock, flags);
359 if (pm_runtime_suspended(dev)) {
363 pdata = acpi_driver_data(adev);
364 if (WARN_ON(!pdata || !pdata->mmio_base)) {
368 *val = __lpss_reg_read(pdata, reg);
371 spin_unlock_irqrestore(&dev->power.lock, flags);
375 static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
382 reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
383 ret = lpss_reg_read(dev, reg, <r_value);
387 return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
390 static ssize_t lpss_ltr_mode_show(struct device *dev,
391 struct device_attribute *attr, char *buf)
397 ret = lpss_reg_read(dev, LPSS_GENERAL, <r_mode);
401 outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
402 return sprintf(buf, "%s\n", outstr);
405 static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
406 static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
407 static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
409 static struct attribute *lpss_attrs[] = {
410 &dev_attr_auto_ltr.attr,
411 &dev_attr_sw_ltr.attr,
412 &dev_attr_ltr_mode.attr,
416 static struct attribute_group lpss_attr_group = {
421 static void acpi_lpss_set_ltr(struct device *dev, s32 val)
423 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
424 u32 ltr_mode, ltr_val;
426 ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL);
428 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) {
429 ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW;
430 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
434 ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK;
435 if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) {
436 ltr_val |= LPSS_LTR_SNOOP_LAT_32US;
437 val = LPSS_LTR_MAX_VAL;
438 } else if (val > LPSS_LTR_MAX_VAL) {
439 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ;
440 val >>= LPSS_LTR_SNOOP_LAT_SHIFT;
442 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ;
445 __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR);
446 if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) {
447 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW;
448 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
452 static int acpi_lpss_platform_notify(struct notifier_block *nb,
453 unsigned long action, void *data)
455 struct platform_device *pdev = to_platform_device(data);
456 struct lpss_private_data *pdata;
457 struct acpi_device *adev;
458 const struct acpi_device_id *id;
461 id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
462 if (!id || !id->driver_data)
465 if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
468 pdata = acpi_driver_data(adev);
469 if (!pdata || !pdata->mmio_base || !pdata->dev_desc->ltr_required)
472 if (pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
473 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
477 if (action == BUS_NOTIFY_ADD_DEVICE)
478 ret = sysfs_create_group(&pdev->dev.kobj, &lpss_attr_group);
479 else if (action == BUS_NOTIFY_DEL_DEVICE)
480 sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
485 static struct notifier_block acpi_lpss_nb = {
486 .notifier_call = acpi_lpss_platform_notify,
489 static void acpi_lpss_bind(struct device *dev)
491 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
493 if (!pdata || !pdata->mmio_base || !pdata->dev_desc->ltr_required)
496 if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE)
497 dev->power.set_latency_tolerance = acpi_lpss_set_ltr;
499 dev_err(dev, "MMIO size insufficient to access LTR\n");
502 static void acpi_lpss_unbind(struct device *dev)
504 dev->power.set_latency_tolerance = NULL;
507 static struct acpi_scan_handler lpss_handler = {
508 .ids = acpi_lpss_device_ids,
509 .attach = acpi_lpss_create_device,
510 .bind = acpi_lpss_bind,
511 .unbind = acpi_lpss_unbind,
514 void __init acpi_lpss_init(void)
516 if (!lpt_clk_init()) {
517 bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
518 acpi_scan_add_handler(&lpss_handler);