Merge branch 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[firefly-linux-kernel-4.4.55.git] / drivers / acpi / acpi_lpss.c
1 /*
2  * ACPI support for Intel Lynxpoint LPSS.
3  *
4  * Copyright (C) 2013, Intel Corporation
5  * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
6  *          Rafael J. Wysocki <rafael.j.wysocki@intel.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12
13 #include <linux/acpi.h>
14 #include <linux/clk.h>
15 #include <linux/clkdev.h>
16 #include <linux/clk-provider.h>
17 #include <linux/err.h>
18 #include <linux/io.h>
19 #include <linux/platform_device.h>
20 #include <linux/platform_data/clk-lpss.h>
21 #include <linux/pm_runtime.h>
22
23 #include "internal.h"
24
25 ACPI_MODULE_NAME("acpi_lpss");
26
27 #define LPSS_CLK_SIZE   0x04
28 #define LPSS_LTR_SIZE   0x18
29
30 /* Offsets relative to LPSS_PRIVATE_OFFSET */
31 #define LPSS_GENERAL                    0x08
32 #define LPSS_GENERAL_LTR_MODE_SW        BIT(2)
33 #define LPSS_GENERAL_UART_RTS_OVRD      BIT(3)
34 #define LPSS_SW_LTR                     0x10
35 #define LPSS_AUTO_LTR                   0x14
36 #define LPSS_LTR_SNOOP_REQ              BIT(15)
37 #define LPSS_LTR_SNOOP_MASK             0x0000FFFF
38 #define LPSS_LTR_SNOOP_LAT_1US          0x800
39 #define LPSS_LTR_SNOOP_LAT_32US         0xC00
40 #define LPSS_LTR_SNOOP_LAT_SHIFT        5
41 #define LPSS_LTR_SNOOP_LAT_CUTOFF       3000
42 #define LPSS_LTR_MAX_VAL                0x3FF
43 #define LPSS_TX_INT                     0x20
44 #define LPSS_TX_INT_MASK                BIT(1)
45
46 struct lpss_shared_clock {
47         const char *name;
48         unsigned long rate;
49         struct clk *clk;
50 };
51
52 struct lpss_private_data;
53
54 struct lpss_device_desc {
55         bool clk_required;
56         const char *clkdev_name;
57         bool ltr_required;
58         unsigned int prv_offset;
59         size_t prv_size_override;
60         bool clk_gate;
61         struct lpss_shared_clock *shared_clock;
62         void (*setup)(struct lpss_private_data *pdata);
63 };
64
65 static struct lpss_device_desc lpss_dma_desc = {
66         .clk_required = true,
67         .clkdev_name = "hclk",
68 };
69
70 struct lpss_private_data {
71         void __iomem *mmio_base;
72         resource_size_t mmio_size;
73         struct clk *clk;
74         const struct lpss_device_desc *dev_desc;
75 };
76
77 static void lpss_uart_setup(struct lpss_private_data *pdata)
78 {
79         unsigned int offset;
80         u32 reg;
81
82         offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
83         reg = readl(pdata->mmio_base + offset);
84         writel(reg | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
85
86         offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
87         reg = readl(pdata->mmio_base + offset);
88         writel(reg | LPSS_GENERAL_UART_RTS_OVRD, pdata->mmio_base + offset);
89 }
90
91 static struct lpss_device_desc lpt_dev_desc = {
92         .clk_required = true,
93         .prv_offset = 0x800,
94         .ltr_required = true,
95         .clk_gate = true,
96 };
97
98 static struct lpss_device_desc lpt_uart_dev_desc = {
99         .clk_required = true,
100         .prv_offset = 0x800,
101         .ltr_required = true,
102         .clk_gate = true,
103         .setup = lpss_uart_setup,
104 };
105
106 static struct lpss_device_desc lpt_sdio_dev_desc = {
107         .prv_offset = 0x1000,
108         .prv_size_override = 0x1018,
109         .ltr_required = true,
110 };
111
112 static struct lpss_shared_clock pwm_clock = {
113         .name = "pwm_clk",
114         .rate = 25000000,
115 };
116
117 static struct lpss_device_desc byt_pwm_dev_desc = {
118         .clk_required = true,
119         .shared_clock = &pwm_clock,
120 };
121
122 static struct lpss_shared_clock uart_clock = {
123         .name = "uart_clk",
124         .rate = 44236800,
125 };
126
127 static struct lpss_device_desc byt_uart_dev_desc = {
128         .clk_required = true,
129         .prv_offset = 0x800,
130         .clk_gate = true,
131         .shared_clock = &uart_clock,
132         .setup = lpss_uart_setup,
133 };
134
135 static struct lpss_shared_clock spi_clock = {
136         .name = "spi_clk",
137         .rate = 50000000,
138 };
139
140 static struct lpss_device_desc byt_spi_dev_desc = {
141         .clk_required = true,
142         .prv_offset = 0x400,
143         .clk_gate = true,
144         .shared_clock = &spi_clock,
145 };
146
147 static struct lpss_device_desc byt_sdio_dev_desc = {
148         .clk_required = true,
149 };
150
151 static struct lpss_shared_clock i2c_clock = {
152         .name = "i2c_clk",
153         .rate = 100000000,
154 };
155
156 static struct lpss_device_desc byt_i2c_dev_desc = {
157         .clk_required = true,
158         .prv_offset = 0x800,
159         .shared_clock = &i2c_clock,
160 };
161
162 static const struct acpi_device_id acpi_lpss_device_ids[] = {
163         /* Generic LPSS devices */
164         { "INTL9C60", (unsigned long)&lpss_dma_desc },
165
166         /* Lynxpoint LPSS devices */
167         { "INT33C0", (unsigned long)&lpt_dev_desc },
168         { "INT33C1", (unsigned long)&lpt_dev_desc },
169         { "INT33C2", (unsigned long)&lpt_dev_desc },
170         { "INT33C3", (unsigned long)&lpt_dev_desc },
171         { "INT33C4", (unsigned long)&lpt_uart_dev_desc },
172         { "INT33C5", (unsigned long)&lpt_uart_dev_desc },
173         { "INT33C6", (unsigned long)&lpt_sdio_dev_desc },
174         { "INT33C7", },
175
176         /* BayTrail LPSS devices */
177         { "80860F09", (unsigned long)&byt_pwm_dev_desc },
178         { "80860F0A", (unsigned long)&byt_uart_dev_desc },
179         { "80860F0E", (unsigned long)&byt_spi_dev_desc },
180         { "80860F14", (unsigned long)&byt_sdio_dev_desc },
181         { "80860F41", (unsigned long)&byt_i2c_dev_desc },
182         { "INT33B2", },
183         { "INT33FC", },
184
185         { "INT3430", (unsigned long)&lpt_dev_desc },
186         { "INT3431", (unsigned long)&lpt_dev_desc },
187         { "INT3432", (unsigned long)&lpt_dev_desc },
188         { "INT3433", (unsigned long)&lpt_dev_desc },
189         { "INT3434", (unsigned long)&lpt_uart_dev_desc },
190         { "INT3435", (unsigned long)&lpt_uart_dev_desc },
191         { "INT3436", (unsigned long)&lpt_sdio_dev_desc },
192         { "INT3437", },
193
194         { }
195 };
196
197 static int is_memory(struct acpi_resource *res, void *not_used)
198 {
199         struct resource r;
200         return !acpi_dev_resource_memory(res, &r);
201 }
202
203 /* LPSS main clock device. */
204 static struct platform_device *lpss_clk_dev;
205
206 static inline void lpt_register_clock_device(void)
207 {
208         lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
209 }
210
211 static int register_device_clock(struct acpi_device *adev,
212                                  struct lpss_private_data *pdata)
213 {
214         const struct lpss_device_desc *dev_desc = pdata->dev_desc;
215         struct lpss_shared_clock *shared_clock = dev_desc->shared_clock;
216         struct clk *clk = ERR_PTR(-ENODEV);
217         struct lpss_clk_data *clk_data;
218         const char *parent;
219
220         if (!lpss_clk_dev)
221                 lpt_register_clock_device();
222
223         clk_data = platform_get_drvdata(lpss_clk_dev);
224         if (!clk_data)
225                 return -ENODEV;
226
227         if (dev_desc->clkdev_name) {
228                 clk_register_clkdev(clk_data->clk, dev_desc->clkdev_name,
229                                     dev_name(&adev->dev));
230                 return 0;
231         }
232
233         if (!pdata->mmio_base
234             || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
235                 return -ENODATA;
236
237         parent = clk_data->name;
238
239         if (shared_clock) {
240                 clk = shared_clock->clk;
241                 if (!clk) {
242                         clk = clk_register_fixed_rate(NULL, shared_clock->name,
243                                                       "lpss_clk", 0,
244                                                       shared_clock->rate);
245                         shared_clock->clk = clk;
246                 }
247                 parent = shared_clock->name;
248         }
249
250         if (dev_desc->clk_gate) {
251                 clk = clk_register_gate(NULL, dev_name(&adev->dev), parent, 0,
252                                         pdata->mmio_base + dev_desc->prv_offset,
253                                         0, 0, NULL);
254                 pdata->clk = clk;
255         }
256
257         if (IS_ERR(clk))
258                 return PTR_ERR(clk);
259
260         clk_register_clkdev(clk, NULL, dev_name(&adev->dev));
261         return 0;
262 }
263
264 static int acpi_lpss_create_device(struct acpi_device *adev,
265                                    const struct acpi_device_id *id)
266 {
267         struct lpss_device_desc *dev_desc;
268         struct lpss_private_data *pdata;
269         struct resource_list_entry *rentry;
270         struct list_head resource_list;
271         int ret;
272
273         dev_desc = (struct lpss_device_desc *)id->driver_data;
274         if (!dev_desc)
275                 return acpi_create_platform_device(adev, id);
276
277         pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
278         if (!pdata)
279                 return -ENOMEM;
280
281         INIT_LIST_HEAD(&resource_list);
282         ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
283         if (ret < 0)
284                 goto err_out;
285
286         list_for_each_entry(rentry, &resource_list, node)
287                 if (resource_type(&rentry->res) == IORESOURCE_MEM) {
288                         if (dev_desc->prv_size_override)
289                                 pdata->mmio_size = dev_desc->prv_size_override;
290                         else
291                                 pdata->mmio_size = resource_size(&rentry->res);
292                         pdata->mmio_base = ioremap(rentry->res.start,
293                                                    pdata->mmio_size);
294                         break;
295                 }
296
297         acpi_dev_free_resource_list(&resource_list);
298
299         pdata->dev_desc = dev_desc;
300
301         if (dev_desc->clk_required) {
302                 ret = register_device_clock(adev, pdata);
303                 if (ret) {
304                         /* Skip the device, but continue the namespace scan. */
305                         ret = 0;
306                         goto err_out;
307                 }
308         }
309
310         /*
311          * This works around a known issue in ACPI tables where LPSS devices
312          * have _PS0 and _PS3 without _PSC (and no power resources), so
313          * acpi_bus_init_power() will assume that the BIOS has put them into D0.
314          */
315         ret = acpi_device_fix_up_power(adev);
316         if (ret) {
317                 /* Skip the device, but continue the namespace scan. */
318                 ret = 0;
319                 goto err_out;
320         }
321
322         if (dev_desc->setup)
323                 dev_desc->setup(pdata);
324
325         adev->driver_data = pdata;
326         ret = acpi_create_platform_device(adev, id);
327         if (ret > 0)
328                 return ret;
329
330         adev->driver_data = NULL;
331
332  err_out:
333         kfree(pdata);
334         return ret;
335 }
336
337 static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg)
338 {
339         return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
340 }
341
342 static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata,
343                              unsigned int reg)
344 {
345         writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
346 }
347
348 static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
349 {
350         struct acpi_device *adev;
351         struct lpss_private_data *pdata;
352         unsigned long flags;
353         int ret;
354
355         ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
356         if (WARN_ON(ret))
357                 return ret;
358
359         spin_lock_irqsave(&dev->power.lock, flags);
360         if (pm_runtime_suspended(dev)) {
361                 ret = -EAGAIN;
362                 goto out;
363         }
364         pdata = acpi_driver_data(adev);
365         if (WARN_ON(!pdata || !pdata->mmio_base)) {
366                 ret = -ENODEV;
367                 goto out;
368         }
369         *val = __lpss_reg_read(pdata, reg);
370
371  out:
372         spin_unlock_irqrestore(&dev->power.lock, flags);
373         return ret;
374 }
375
376 static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
377                              char *buf)
378 {
379         u32 ltr_value = 0;
380         unsigned int reg;
381         int ret;
382
383         reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
384         ret = lpss_reg_read(dev, reg, &ltr_value);
385         if (ret)
386                 return ret;
387
388         return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
389 }
390
391 static ssize_t lpss_ltr_mode_show(struct device *dev,
392                                   struct device_attribute *attr, char *buf)
393 {
394         u32 ltr_mode = 0;
395         char *outstr;
396         int ret;
397
398         ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
399         if (ret)
400                 return ret;
401
402         outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
403         return sprintf(buf, "%s\n", outstr);
404 }
405
406 static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
407 static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
408 static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
409
410 static struct attribute *lpss_attrs[] = {
411         &dev_attr_auto_ltr.attr,
412         &dev_attr_sw_ltr.attr,
413         &dev_attr_ltr_mode.attr,
414         NULL,
415 };
416
417 static struct attribute_group lpss_attr_group = {
418         .attrs = lpss_attrs,
419         .name = "lpss_ltr",
420 };
421
422 static void acpi_lpss_set_ltr(struct device *dev, s32 val)
423 {
424         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
425         u32 ltr_mode, ltr_val;
426
427         ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL);
428         if (val < 0) {
429                 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) {
430                         ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW;
431                         __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
432                 }
433                 return;
434         }
435         ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK;
436         if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) {
437                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US;
438                 val = LPSS_LTR_MAX_VAL;
439         } else if (val > LPSS_LTR_MAX_VAL) {
440                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ;
441                 val >>= LPSS_LTR_SNOOP_LAT_SHIFT;
442         } else {
443                 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ;
444         }
445         ltr_val |= val;
446         __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR);
447         if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) {
448                 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW;
449                 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
450         }
451 }
452
453 static int acpi_lpss_platform_notify(struct notifier_block *nb,
454                                      unsigned long action, void *data)
455 {
456         struct platform_device *pdev = to_platform_device(data);
457         struct lpss_private_data *pdata;
458         struct acpi_device *adev;
459         const struct acpi_device_id *id;
460         int ret = 0;
461
462         id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
463         if (!id || !id->driver_data)
464                 return 0;
465
466         if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
467                 return 0;
468
469         pdata = acpi_driver_data(adev);
470         if (!pdata || !pdata->mmio_base || !pdata->dev_desc->ltr_required)
471                 return 0;
472
473         if (pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
474                 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
475                 return 0;
476         }
477
478         if (action == BUS_NOTIFY_ADD_DEVICE)
479                 ret = sysfs_create_group(&pdev->dev.kobj, &lpss_attr_group);
480         else if (action == BUS_NOTIFY_DEL_DEVICE)
481                 sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
482
483         return ret;
484 }
485
486 static struct notifier_block acpi_lpss_nb = {
487         .notifier_call = acpi_lpss_platform_notify,
488 };
489
490 static void acpi_lpss_bind(struct device *dev)
491 {
492         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
493
494         if (!pdata || !pdata->mmio_base || !pdata->dev_desc->ltr_required)
495                 return;
496
497         if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE)
498                 dev->power.set_latency_tolerance = acpi_lpss_set_ltr;
499         else
500                 dev_err(dev, "MMIO size insufficient to access LTR\n");
501 }
502
503 static void acpi_lpss_unbind(struct device *dev)
504 {
505         dev->power.set_latency_tolerance = NULL;
506 }
507
508 static struct acpi_scan_handler lpss_handler = {
509         .ids = acpi_lpss_device_ids,
510         .attach = acpi_lpss_create_device,
511         .bind = acpi_lpss_bind,
512         .unbind = acpi_lpss_unbind,
513 };
514
515 void __init acpi_lpss_init(void)
516 {
517         if (!lpt_clk_init()) {
518                 bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
519                 acpi_scan_add_handler(&lpss_handler);
520         }
521 }