2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include <scsi/scsi_cmnd.h>
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
62 #define DRV_VERSION "2.20" /* must be exactly four chars */
65 /* debounce timing parameters in msecs { interval, duration, timeout } */
66 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
67 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
68 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
70 static unsigned int ata_dev_init_params(struct ata_device *dev,
71 u16 heads, u16 sectors);
72 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
73 static void ata_dev_xfermask(struct ata_device *dev);
75 static unsigned int ata_print_id = 1;
76 static struct workqueue_struct *ata_wq;
78 struct workqueue_struct *ata_aux_wq;
80 int atapi_enabled = 1;
81 module_param(atapi_enabled, int, 0444);
82 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 module_param(atapi_dmadir, int, 0444);
86 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
89 module_param_named(fua, libata_fua, int, 0444);
90 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
92 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
93 module_param(ata_probe_timeout, int, 0444);
94 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
96 int libata_noacpi = 1;
97 module_param_named(noacpi, libata_noacpi, int, 0444);
98 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in suspend/resume when set");
100 MODULE_AUTHOR("Jeff Garzik");
101 MODULE_DESCRIPTION("Library module for ATA devices");
102 MODULE_LICENSE("GPL");
103 MODULE_VERSION(DRV_VERSION);
107 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
108 * @tf: Taskfile to convert
109 * @fis: Buffer into which data will output
110 * @pmp: Port multiplier port
112 * Converts a standard ATA taskfile to a Serial ATA
113 * FIS structure (Register - Host to Device).
116 * Inherited from caller.
119 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
121 fis[0] = 0x27; /* Register - Host to Device FIS */
122 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
123 bit 7 indicates Command FIS */
124 fis[2] = tf->command;
125 fis[3] = tf->feature;
132 fis[8] = tf->hob_lbal;
133 fis[9] = tf->hob_lbam;
134 fis[10] = tf->hob_lbah;
135 fis[11] = tf->hob_feature;
138 fis[13] = tf->hob_nsect;
149 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
150 * @fis: Buffer from which data will be input
151 * @tf: Taskfile to output
153 * Converts a serial ATA FIS structure to a standard ATA taskfile.
156 * Inherited from caller.
159 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
161 tf->command = fis[2]; /* status */
162 tf->feature = fis[3]; /* error */
169 tf->hob_lbal = fis[8];
170 tf->hob_lbam = fis[9];
171 tf->hob_lbah = fis[10];
174 tf->hob_nsect = fis[13];
177 static const u8 ata_rw_cmds[] = {
181 ATA_CMD_READ_MULTI_EXT,
182 ATA_CMD_WRITE_MULTI_EXT,
186 ATA_CMD_WRITE_MULTI_FUA_EXT,
190 ATA_CMD_PIO_READ_EXT,
191 ATA_CMD_PIO_WRITE_EXT,
204 ATA_CMD_WRITE_FUA_EXT
208 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
209 * @tf: command to examine and configure
210 * @dev: device tf belongs to
212 * Examine the device configuration and tf->flags to calculate
213 * the proper read/write commands and protocol to use.
218 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
222 int index, fua, lba48, write;
224 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
225 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
226 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
228 if (dev->flags & ATA_DFLAG_PIO) {
229 tf->protocol = ATA_PROT_PIO;
230 index = dev->multi_count ? 0 : 8;
231 } else if (lba48 && (dev->ap->flags & ATA_FLAG_PIO_LBA48)) {
232 /* Unable to use DMA due to host limitation */
233 tf->protocol = ATA_PROT_PIO;
234 index = dev->multi_count ? 0 : 8;
236 tf->protocol = ATA_PROT_DMA;
240 cmd = ata_rw_cmds[index + fua + lba48 + write];
249 * ata_tf_read_block - Read block address from ATA taskfile
250 * @tf: ATA taskfile of interest
251 * @dev: ATA device @tf belongs to
256 * Read block address from @tf. This function can handle all
257 * three address formats - LBA, LBA48 and CHS. tf->protocol and
258 * flags select the address format to use.
261 * Block address read from @tf.
263 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
267 if (tf->flags & ATA_TFLAG_LBA) {
268 if (tf->flags & ATA_TFLAG_LBA48) {
269 block |= (u64)tf->hob_lbah << 40;
270 block |= (u64)tf->hob_lbam << 32;
271 block |= tf->hob_lbal << 24;
273 block |= (tf->device & 0xf) << 24;
275 block |= tf->lbah << 16;
276 block |= tf->lbam << 8;
281 cyl = tf->lbam | (tf->lbah << 8);
282 head = tf->device & 0xf;
285 block = (cyl * dev->heads + head) * dev->sectors + sect;
292 * ata_build_rw_tf - Build ATA taskfile for given read/write request
293 * @tf: Target ATA taskfile
294 * @dev: ATA device @tf belongs to
295 * @block: Block address
296 * @n_block: Number of blocks
297 * @tf_flags: RW/FUA etc...
303 * Build ATA taskfile @tf for read/write request described by
304 * @block, @n_block, @tf_flags and @tag on @dev.
308 * 0 on success, -ERANGE if the request is too large for @dev,
309 * -EINVAL if the request is invalid.
311 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
312 u64 block, u32 n_block, unsigned int tf_flags,
315 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
316 tf->flags |= tf_flags;
318 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
320 if (!lba_48_ok(block, n_block))
323 tf->protocol = ATA_PROT_NCQ;
324 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
326 if (tf->flags & ATA_TFLAG_WRITE)
327 tf->command = ATA_CMD_FPDMA_WRITE;
329 tf->command = ATA_CMD_FPDMA_READ;
331 tf->nsect = tag << 3;
332 tf->hob_feature = (n_block >> 8) & 0xff;
333 tf->feature = n_block & 0xff;
335 tf->hob_lbah = (block >> 40) & 0xff;
336 tf->hob_lbam = (block >> 32) & 0xff;
337 tf->hob_lbal = (block >> 24) & 0xff;
338 tf->lbah = (block >> 16) & 0xff;
339 tf->lbam = (block >> 8) & 0xff;
340 tf->lbal = block & 0xff;
343 if (tf->flags & ATA_TFLAG_FUA)
344 tf->device |= 1 << 7;
345 } else if (dev->flags & ATA_DFLAG_LBA) {
346 tf->flags |= ATA_TFLAG_LBA;
348 if (lba_28_ok(block, n_block)) {
350 tf->device |= (block >> 24) & 0xf;
351 } else if (lba_48_ok(block, n_block)) {
352 if (!(dev->flags & ATA_DFLAG_LBA48))
356 tf->flags |= ATA_TFLAG_LBA48;
358 tf->hob_nsect = (n_block >> 8) & 0xff;
360 tf->hob_lbah = (block >> 40) & 0xff;
361 tf->hob_lbam = (block >> 32) & 0xff;
362 tf->hob_lbal = (block >> 24) & 0xff;
364 /* request too large even for LBA48 */
367 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
370 tf->nsect = n_block & 0xff;
372 tf->lbah = (block >> 16) & 0xff;
373 tf->lbam = (block >> 8) & 0xff;
374 tf->lbal = block & 0xff;
376 tf->device |= ATA_LBA;
379 u32 sect, head, cyl, track;
381 /* The request -may- be too large for CHS addressing. */
382 if (!lba_28_ok(block, n_block))
385 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
388 /* Convert LBA to CHS */
389 track = (u32)block / dev->sectors;
390 cyl = track / dev->heads;
391 head = track % dev->heads;
392 sect = (u32)block % dev->sectors + 1;
394 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
395 (u32)block, track, cyl, head, sect);
397 /* Check whether the converted CHS can fit.
401 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
404 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
415 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
416 * @pio_mask: pio_mask
417 * @mwdma_mask: mwdma_mask
418 * @udma_mask: udma_mask
420 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
421 * unsigned int xfer_mask.
429 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
430 unsigned int mwdma_mask,
431 unsigned int udma_mask)
433 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
434 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
435 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
439 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
440 * @xfer_mask: xfer_mask to unpack
441 * @pio_mask: resulting pio_mask
442 * @mwdma_mask: resulting mwdma_mask
443 * @udma_mask: resulting udma_mask
445 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
446 * Any NULL distination masks will be ignored.
448 static void ata_unpack_xfermask(unsigned int xfer_mask,
449 unsigned int *pio_mask,
450 unsigned int *mwdma_mask,
451 unsigned int *udma_mask)
454 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
456 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
458 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
461 static const struct ata_xfer_ent {
465 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
466 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
467 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
472 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
473 * @xfer_mask: xfer_mask of interest
475 * Return matching XFER_* value for @xfer_mask. Only the highest
476 * bit of @xfer_mask is considered.
482 * Matching XFER_* value, 0 if no match found.
484 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
486 int highbit = fls(xfer_mask) - 1;
487 const struct ata_xfer_ent *ent;
489 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
490 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
491 return ent->base + highbit - ent->shift;
496 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
497 * @xfer_mode: XFER_* of interest
499 * Return matching xfer_mask for @xfer_mode.
505 * Matching xfer_mask, 0 if no match found.
507 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
509 const struct ata_xfer_ent *ent;
511 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
512 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
513 return 1 << (ent->shift + xfer_mode - ent->base);
518 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
519 * @xfer_mode: XFER_* of interest
521 * Return matching xfer_shift for @xfer_mode.
527 * Matching xfer_shift, -1 if no match found.
529 static int ata_xfer_mode2shift(unsigned int xfer_mode)
531 const struct ata_xfer_ent *ent;
533 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
534 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
540 * ata_mode_string - convert xfer_mask to string
541 * @xfer_mask: mask of bits supported; only highest bit counts.
543 * Determine string which represents the highest speed
544 * (highest bit in @modemask).
550 * Constant C string representing highest speed listed in
551 * @mode_mask, or the constant C string "<n/a>".
553 static const char *ata_mode_string(unsigned int xfer_mask)
555 static const char * const xfer_mode_str[] = {
579 highbit = fls(xfer_mask) - 1;
580 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
581 return xfer_mode_str[highbit];
585 static const char *sata_spd_string(unsigned int spd)
587 static const char * const spd_str[] = {
592 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
594 return spd_str[spd - 1];
597 void ata_dev_disable(struct ata_device *dev)
599 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
600 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
601 ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 |
608 * ata_devchk - PATA device presence detection
609 * @ap: ATA channel to examine
610 * @device: Device to examine (starting at zero)
612 * This technique was originally described in
613 * Hale Landis's ATADRVR (www.ata-atapi.com), and
614 * later found its way into the ATA/ATAPI spec.
616 * Write a pattern to the ATA shadow registers,
617 * and if a device is present, it will respond by
618 * correctly storing and echoing back the
619 * ATA shadow register contents.
625 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
627 struct ata_ioports *ioaddr = &ap->ioaddr;
630 ap->ops->dev_select(ap, device);
632 iowrite8(0x55, ioaddr->nsect_addr);
633 iowrite8(0xaa, ioaddr->lbal_addr);
635 iowrite8(0xaa, ioaddr->nsect_addr);
636 iowrite8(0x55, ioaddr->lbal_addr);
638 iowrite8(0x55, ioaddr->nsect_addr);
639 iowrite8(0xaa, ioaddr->lbal_addr);
641 nsect = ioread8(ioaddr->nsect_addr);
642 lbal = ioread8(ioaddr->lbal_addr);
644 if ((nsect == 0x55) && (lbal == 0xaa))
645 return 1; /* we found a device */
647 return 0; /* nothing found */
651 * ata_dev_classify - determine device type based on ATA-spec signature
652 * @tf: ATA taskfile register set for device to be identified
654 * Determine from taskfile register contents whether a device is
655 * ATA or ATAPI, as per "Signature and persistence" section
656 * of ATA/PI spec (volume 1, sect 5.14).
662 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
663 * the event of failure.
666 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
668 /* Apple's open source Darwin code hints that some devices only
669 * put a proper signature into the LBA mid/high registers,
670 * So, we only check those. It's sufficient for uniqueness.
673 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
674 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
675 DPRINTK("found ATA device by sig\n");
679 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
680 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
681 DPRINTK("found ATAPI device by sig\n");
682 return ATA_DEV_ATAPI;
685 DPRINTK("unknown device\n");
686 return ATA_DEV_UNKNOWN;
690 * ata_dev_try_classify - Parse returned ATA device signature
691 * @ap: ATA channel to examine
692 * @device: Device to examine (starting at zero)
693 * @r_err: Value of error register on completion
695 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
696 * an ATA/ATAPI-defined set of values is placed in the ATA
697 * shadow registers, indicating the results of device detection
700 * Select the ATA device, and read the values from the ATA shadow
701 * registers. Then parse according to the Error register value,
702 * and the spec-defined values examined by ata_dev_classify().
708 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
712 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
714 struct ata_taskfile tf;
718 ap->ops->dev_select(ap, device);
720 memset(&tf, 0, sizeof(tf));
722 ap->ops->tf_read(ap, &tf);
727 /* see if device passed diags: if master then continue and warn later */
728 if (err == 0 && device == 0)
729 /* diagnostic fail : do nothing _YET_ */
730 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC;
733 else if ((device == 0) && (err == 0x81))
738 /* determine if device is ATA or ATAPI */
739 class = ata_dev_classify(&tf);
741 if (class == ATA_DEV_UNKNOWN)
743 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
749 * ata_id_string - Convert IDENTIFY DEVICE page into string
750 * @id: IDENTIFY DEVICE results we will examine
751 * @s: string into which data is output
752 * @ofs: offset into identify device page
753 * @len: length of string to return. must be an even number.
755 * The strings in the IDENTIFY DEVICE page are broken up into
756 * 16-bit chunks. Run through the string, and output each
757 * 8-bit chunk linearly, regardless of platform.
763 void ata_id_string(const u16 *id, unsigned char *s,
764 unsigned int ofs, unsigned int len)
783 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
784 * @id: IDENTIFY DEVICE results we will examine
785 * @s: string into which data is output
786 * @ofs: offset into identify device page
787 * @len: length of string to return. must be an odd number.
789 * This function is identical to ata_id_string except that it
790 * trims trailing spaces and terminates the resulting string with
791 * null. @len must be actual maximum length (even number) + 1.
796 void ata_id_c_string(const u16 *id, unsigned char *s,
797 unsigned int ofs, unsigned int len)
803 ata_id_string(id, s, ofs, len - 1);
805 p = s + strnlen(s, len - 1);
806 while (p > s && p[-1] == ' ')
811 static u64 ata_id_n_sectors(const u16 *id)
813 if (ata_id_has_lba(id)) {
814 if (ata_id_has_lba48(id))
815 return ata_id_u64(id, 100);
817 return ata_id_u32(id, 60);
819 if (ata_id_current_chs_valid(id))
820 return ata_id_u32(id, 57);
822 return id[1] * id[3] * id[6];
827 * ata_id_to_dma_mode - Identify DMA mode from id block
828 * @dev: device to identify
829 * @unknown: mode to assume if we cannot tell
831 * Set up the timing values for the device based upon the identify
832 * reported values for the DMA mode. This function is used by drivers
833 * which rely upon firmware configured modes, but wish to report the
834 * mode correctly when possible.
836 * In addition we emit similarly formatted messages to the default
837 * ata_dev_set_mode handler, in order to provide consistency of
841 void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown)
846 /* Pack the DMA modes */
847 mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA;
848 if (dev->id[53] & 0x04)
849 mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA;
851 /* Select the mode in use */
852 mode = ata_xfer_mask2mode(mask);
855 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
856 ata_mode_string(mask));
858 /* SWDMA perhaps ? */
860 ata_dev_printk(dev, KERN_INFO, "configured for DMA\n");
863 /* Configure the device reporting */
864 dev->xfer_mode = mode;
865 dev->xfer_shift = ata_xfer_mode2shift(mode);
869 * ata_noop_dev_select - Select device 0/1 on ATA bus
870 * @ap: ATA channel to manipulate
871 * @device: ATA device (numbered from zero) to select
873 * This function performs no actual function.
875 * May be used as the dev_select() entry in ata_port_operations.
880 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
886 * ata_std_dev_select - Select device 0/1 on ATA bus
887 * @ap: ATA channel to manipulate
888 * @device: ATA device (numbered from zero) to select
890 * Use the method defined in the ATA specification to
891 * make either device 0, or device 1, active on the
892 * ATA channel. Works with both PIO and MMIO.
894 * May be used as the dev_select() entry in ata_port_operations.
900 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
905 tmp = ATA_DEVICE_OBS;
907 tmp = ATA_DEVICE_OBS | ATA_DEV1;
909 iowrite8(tmp, ap->ioaddr.device_addr);
910 ata_pause(ap); /* needed; also flushes, for mmio */
914 * ata_dev_select - Select device 0/1 on ATA bus
915 * @ap: ATA channel to manipulate
916 * @device: ATA device (numbered from zero) to select
917 * @wait: non-zero to wait for Status register BSY bit to clear
918 * @can_sleep: non-zero if context allows sleeping
920 * Use the method defined in the ATA specification to
921 * make either device 0, or device 1, active on the
924 * This is a high-level version of ata_std_dev_select(),
925 * which additionally provides the services of inserting
926 * the proper pauses and status polling, where needed.
932 void ata_dev_select(struct ata_port *ap, unsigned int device,
933 unsigned int wait, unsigned int can_sleep)
935 if (ata_msg_probe(ap))
936 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, "
937 "device %u, wait %u\n", device, wait);
942 ap->ops->dev_select(ap, device);
945 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
952 * ata_dump_id - IDENTIFY DEVICE info debugging output
953 * @id: IDENTIFY DEVICE page to dump
955 * Dump selected 16-bit words from the given IDENTIFY DEVICE
962 static inline void ata_dump_id(const u16 *id)
964 DPRINTK("49==0x%04x "
974 DPRINTK("80==0x%04x "
984 DPRINTK("88==0x%04x "
991 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
992 * @id: IDENTIFY data to compute xfer mask from
994 * Compute the xfermask for this device. This is not as trivial
995 * as it seems if we must consider early devices correctly.
997 * FIXME: pre IDE drive timing (do we care ?).
1005 static unsigned int ata_id_xfermask(const u16 *id)
1007 unsigned int pio_mask, mwdma_mask, udma_mask;
1009 /* Usual case. Word 53 indicates word 64 is valid */
1010 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1011 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
1015 /* If word 64 isn't valid then Word 51 high byte holds
1016 * the PIO timing number for the maximum. Turn it into
1019 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
1020 if (mode < 5) /* Valid PIO range */
1021 pio_mask = (2 << mode) - 1;
1025 /* But wait.. there's more. Design your standards by
1026 * committee and you too can get a free iordy field to
1027 * process. However its the speeds not the modes that
1028 * are supported... Note drivers using the timing API
1029 * will get this right anyway
1033 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
1035 if (ata_id_is_cfa(id)) {
1037 * Process compact flash extended modes
1039 int pio = id[163] & 0x7;
1040 int dma = (id[163] >> 3) & 7;
1043 pio_mask |= (1 << 5);
1045 pio_mask |= (1 << 6);
1047 mwdma_mask |= (1 << 3);
1049 mwdma_mask |= (1 << 4);
1053 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1054 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
1056 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1060 * ata_port_queue_task - Queue port_task
1061 * @ap: The ata_port to queue port_task for
1062 * @fn: workqueue function to be scheduled
1063 * @data: data for @fn to use
1064 * @delay: delay time for workqueue function
1066 * Schedule @fn(@data) for execution after @delay jiffies using
1067 * port_task. There is one port_task per port and it's the
1068 * user(low level driver)'s responsibility to make sure that only
1069 * one task is active at any given time.
1071 * libata core layer takes care of synchronization between
1072 * port_task and EH. ata_port_queue_task() may be ignored for EH
1076 * Inherited from caller.
1078 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
1079 unsigned long delay)
1083 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
1086 PREPARE_DELAYED_WORK(&ap->port_task, fn);
1087 ap->port_task_data = data;
1089 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
1091 /* rc == 0 means that another user is using port task */
1096 * ata_port_flush_task - Flush port_task
1097 * @ap: The ata_port to flush port_task for
1099 * After this function completes, port_task is guranteed not to
1100 * be running or scheduled.
1103 * Kernel thread context (may sleep)
1105 void ata_port_flush_task(struct ata_port *ap)
1107 unsigned long flags;
1111 spin_lock_irqsave(ap->lock, flags);
1112 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
1113 spin_unlock_irqrestore(ap->lock, flags);
1115 DPRINTK("flush #1\n");
1116 flush_workqueue(ata_wq);
1119 * At this point, if a task is running, it's guaranteed to see
1120 * the FLUSH flag; thus, it will never queue pio tasks again.
1123 if (!cancel_delayed_work(&ap->port_task)) {
1124 if (ata_msg_ctl(ap))
1125 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
1127 flush_workqueue(ata_wq);
1130 spin_lock_irqsave(ap->lock, flags);
1131 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
1132 spin_unlock_irqrestore(ap->lock, flags);
1134 if (ata_msg_ctl(ap))
1135 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
1138 static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1140 struct completion *waiting = qc->private_data;
1146 * ata_exec_internal_sg - execute libata internal command
1147 * @dev: Device to which the command is sent
1148 * @tf: Taskfile registers for the command and the result
1149 * @cdb: CDB for packet command
1150 * @dma_dir: Data tranfer direction of the command
1151 * @sg: sg list for the data buffer of the command
1152 * @n_elem: Number of sg entries
1154 * Executes libata internal command with timeout. @tf contains
1155 * command on entry and result on return. Timeout and error
1156 * conditions are reported via return value. No recovery action
1157 * is taken after a command times out. It's caller's duty to
1158 * clean up after timeout.
1161 * None. Should be called with kernel context, might sleep.
1164 * Zero on success, AC_ERR_* mask on failure
1166 unsigned ata_exec_internal_sg(struct ata_device *dev,
1167 struct ata_taskfile *tf, const u8 *cdb,
1168 int dma_dir, struct scatterlist *sg,
1169 unsigned int n_elem)
1171 struct ata_port *ap = dev->ap;
1172 u8 command = tf->command;
1173 struct ata_queued_cmd *qc;
1174 unsigned int tag, preempted_tag;
1175 u32 preempted_sactive, preempted_qc_active;
1176 DECLARE_COMPLETION_ONSTACK(wait);
1177 unsigned long flags;
1178 unsigned int err_mask;
1181 spin_lock_irqsave(ap->lock, flags);
1183 /* no internal command while frozen */
1184 if (ap->pflags & ATA_PFLAG_FROZEN) {
1185 spin_unlock_irqrestore(ap->lock, flags);
1186 return AC_ERR_SYSTEM;
1189 /* initialize internal qc */
1191 /* XXX: Tag 0 is used for drivers with legacy EH as some
1192 * drivers choke if any other tag is given. This breaks
1193 * ata_tag_internal() test for those drivers. Don't use new
1194 * EH stuff without converting to it.
1196 if (ap->ops->error_handler)
1197 tag = ATA_TAG_INTERNAL;
1201 if (test_and_set_bit(tag, &ap->qc_allocated))
1203 qc = __ata_qc_from_tag(ap, tag);
1211 preempted_tag = ap->active_tag;
1212 preempted_sactive = ap->sactive;
1213 preempted_qc_active = ap->qc_active;
1214 ap->active_tag = ATA_TAG_POISON;
1218 /* prepare & issue qc */
1221 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1222 qc->flags |= ATA_QCFLAG_RESULT_TF;
1223 qc->dma_dir = dma_dir;
1224 if (dma_dir != DMA_NONE) {
1225 unsigned int i, buflen = 0;
1227 for (i = 0; i < n_elem; i++)
1228 buflen += sg[i].length;
1230 ata_sg_init(qc, sg, n_elem);
1231 qc->nbytes = buflen;
1234 qc->private_data = &wait;
1235 qc->complete_fn = ata_qc_complete_internal;
1239 spin_unlock_irqrestore(ap->lock, flags);
1241 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1243 ata_port_flush_task(ap);
1246 spin_lock_irqsave(ap->lock, flags);
1248 /* We're racing with irq here. If we lose, the
1249 * following test prevents us from completing the qc
1250 * twice. If we win, the port is frozen and will be
1251 * cleaned up by ->post_internal_cmd().
1253 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1254 qc->err_mask |= AC_ERR_TIMEOUT;
1256 if (ap->ops->error_handler)
1257 ata_port_freeze(ap);
1259 ata_qc_complete(qc);
1261 if (ata_msg_warn(ap))
1262 ata_dev_printk(dev, KERN_WARNING,
1263 "qc timeout (cmd 0x%x)\n", command);
1266 spin_unlock_irqrestore(ap->lock, flags);
1269 /* do post_internal_cmd */
1270 if (ap->ops->post_internal_cmd)
1271 ap->ops->post_internal_cmd(qc);
1273 if ((qc->flags & ATA_QCFLAG_FAILED) && !qc->err_mask) {
1274 if (ata_msg_warn(ap))
1275 ata_dev_printk(dev, KERN_WARNING,
1276 "zero err_mask for failed "
1277 "internal command, assuming AC_ERR_OTHER\n");
1278 qc->err_mask |= AC_ERR_OTHER;
1282 spin_lock_irqsave(ap->lock, flags);
1284 *tf = qc->result_tf;
1285 err_mask = qc->err_mask;
1288 ap->active_tag = preempted_tag;
1289 ap->sactive = preempted_sactive;
1290 ap->qc_active = preempted_qc_active;
1292 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1293 * Until those drivers are fixed, we detect the condition
1294 * here, fail the command with AC_ERR_SYSTEM and reenable the
1297 * Note that this doesn't change any behavior as internal
1298 * command failure results in disabling the device in the
1299 * higher layer for LLDDs without new reset/EH callbacks.
1301 * Kill the following code as soon as those drivers are fixed.
1303 if (ap->flags & ATA_FLAG_DISABLED) {
1304 err_mask |= AC_ERR_SYSTEM;
1308 spin_unlock_irqrestore(ap->lock, flags);
1314 * ata_exec_internal - execute libata internal command
1315 * @dev: Device to which the command is sent
1316 * @tf: Taskfile registers for the command and the result
1317 * @cdb: CDB for packet command
1318 * @dma_dir: Data tranfer direction of the command
1319 * @buf: Data buffer of the command
1320 * @buflen: Length of data buffer
1322 * Wrapper around ata_exec_internal_sg() which takes simple
1323 * buffer instead of sg list.
1326 * None. Should be called with kernel context, might sleep.
1329 * Zero on success, AC_ERR_* mask on failure
1331 unsigned ata_exec_internal(struct ata_device *dev,
1332 struct ata_taskfile *tf, const u8 *cdb,
1333 int dma_dir, void *buf, unsigned int buflen)
1335 struct scatterlist *psg = NULL, sg;
1336 unsigned int n_elem = 0;
1338 if (dma_dir != DMA_NONE) {
1340 sg_init_one(&sg, buf, buflen);
1345 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem);
1349 * ata_do_simple_cmd - execute simple internal command
1350 * @dev: Device to which the command is sent
1351 * @cmd: Opcode to execute
1353 * Execute a 'simple' command, that only consists of the opcode
1354 * 'cmd' itself, without filling any other registers
1357 * Kernel thread context (may sleep).
1360 * Zero on success, AC_ERR_* mask on failure
1362 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1364 struct ata_taskfile tf;
1366 ata_tf_init(dev, &tf);
1369 tf.flags |= ATA_TFLAG_DEVICE;
1370 tf.protocol = ATA_PROT_NODATA;
1372 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1376 * ata_pio_need_iordy - check if iordy needed
1379 * Check if the current speed of the device requires IORDY. Used
1380 * by various controllers for chip configuration.
1383 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1385 /* Controller doesn't support IORDY. Probably a pointless check
1386 as the caller should know this */
1387 if (adev->ap->flags & ATA_FLAG_NO_IORDY)
1389 /* PIO3 and higher it is mandatory */
1390 if (adev->pio_mode > XFER_PIO_2)
1392 /* We turn it on when possible */
1393 if (ata_id_has_iordy(adev->id))
1399 * ata_pio_mask_no_iordy - Return the non IORDY mask
1402 * Compute the highest mode possible if we are not using iordy. Return
1403 * -1 if no iordy mode is available.
1406 static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
1408 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1409 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1410 u16 pio = adev->id[ATA_ID_EIDE_PIO];
1411 /* Is the speed faster than the drive allows non IORDY ? */
1413 /* This is cycle times not frequency - watch the logic! */
1414 if (pio > 240) /* PIO2 is 240nS per cycle */
1415 return 3 << ATA_SHIFT_PIO;
1416 return 7 << ATA_SHIFT_PIO;
1419 return 3 << ATA_SHIFT_PIO;
1423 * ata_dev_read_id - Read ID data from the specified device
1424 * @dev: target device
1425 * @p_class: pointer to class of the target device (may be changed)
1426 * @flags: ATA_READID_* flags
1427 * @id: buffer to read IDENTIFY data into
1429 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1430 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1431 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1432 * for pre-ATA4 drives.
1435 * Kernel thread context (may sleep)
1438 * 0 on success, -errno otherwise.
1440 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1441 unsigned int flags, u16 *id)
1443 struct ata_port *ap = dev->ap;
1444 unsigned int class = *p_class;
1445 struct ata_taskfile tf;
1446 unsigned int err_mask = 0;
1450 if (ata_msg_ctl(ap))
1451 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
1453 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1456 ata_tf_init(dev, &tf);
1460 tf.command = ATA_CMD_ID_ATA;
1463 tf.command = ATA_CMD_ID_ATAPI;
1467 reason = "unsupported class";
1471 tf.protocol = ATA_PROT_PIO;
1473 /* Some devices choke if TF registers contain garbage. Make
1474 * sure those are properly initialized.
1476 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1478 /* Device presence detection is unreliable on some
1479 * controllers. Always poll IDENTIFY if available.
1481 tf.flags |= ATA_TFLAG_POLLING;
1483 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1484 id, sizeof(id[0]) * ATA_ID_WORDS);
1486 if (err_mask & AC_ERR_NODEV_HINT) {
1487 DPRINTK("ata%u.%d: NODEV after polling detection\n",
1488 ap->print_id, dev->devno);
1493 reason = "I/O error";
1497 swap_buf_le16(id, ATA_ID_WORDS);
1501 reason = "device reports illegal type";
1503 if (class == ATA_DEV_ATA) {
1504 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1507 if (ata_id_is_ata(id))
1511 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1513 * The exact sequence expected by certain pre-ATA4 drives is:
1516 * INITIALIZE DEVICE PARAMETERS
1518 * Some drives were very specific about that exact sequence.
1520 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1521 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1524 reason = "INIT_DEV_PARAMS failed";
1528 /* current CHS translation info (id[53-58]) might be
1529 * changed. reread the identify device info.
1531 flags &= ~ATA_READID_POSTRESET;
1541 if (ata_msg_warn(ap))
1542 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1543 "(%s, err_mask=0x%x)\n", reason, err_mask);
1547 static inline u8 ata_dev_knobble(struct ata_device *dev)
1549 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1552 static void ata_dev_config_ncq(struct ata_device *dev,
1553 char *desc, size_t desc_sz)
1555 struct ata_port *ap = dev->ap;
1556 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1558 if (!ata_id_has_ncq(dev->id)) {
1562 if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) {
1563 snprintf(desc, desc_sz, "NCQ (not used)");
1566 if (ap->flags & ATA_FLAG_NCQ) {
1567 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1568 dev->flags |= ATA_DFLAG_NCQ;
1571 if (hdepth >= ddepth)
1572 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1574 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1578 * ata_dev_configure - Configure the specified ATA/ATAPI device
1579 * @dev: Target device to configure
1581 * Configure @dev according to @dev->id. Generic and low-level
1582 * driver specific fixups are also applied.
1585 * Kernel thread context (may sleep)
1588 * 0 on success, -errno otherwise
1590 int ata_dev_configure(struct ata_device *dev)
1592 struct ata_port *ap = dev->ap;
1593 int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO;
1594 const u16 *id = dev->id;
1595 unsigned int xfer_mask;
1596 char revbuf[7]; /* XYZ-99\0 */
1597 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
1598 char modelbuf[ATA_ID_PROD_LEN+1];
1601 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1602 ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n",
1607 if (ata_msg_probe(ap))
1608 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
1611 rc = ata_acpi_push_id(ap, dev->devno);
1613 ata_dev_printk(dev, KERN_WARNING, "failed to set _SDD(%d)\n",
1617 /* retrieve and execute the ATA task file of _GTF */
1618 ata_acpi_exec_tfs(ap);
1620 /* print device capabilities */
1621 if (ata_msg_probe(ap))
1622 ata_dev_printk(dev, KERN_DEBUG,
1623 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1624 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1626 id[49], id[82], id[83], id[84],
1627 id[85], id[86], id[87], id[88]);
1629 /* initialize to-be-configured parameters */
1630 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1631 dev->max_sectors = 0;
1639 * common ATA, ATAPI feature tests
1642 /* find max transfer mode; for printk only */
1643 xfer_mask = ata_id_xfermask(id);
1645 if (ata_msg_probe(ap))
1648 /* ATA-specific feature tests */
1649 if (dev->class == ATA_DEV_ATA) {
1650 if (ata_id_is_cfa(id)) {
1651 if (id[162] & 1) /* CPRM may make this media unusable */
1652 ata_dev_printk(dev, KERN_WARNING,
1653 "supports DRM functions and may "
1654 "not be fully accessable.\n");
1655 snprintf(revbuf, 7, "CFA");
1658 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1660 dev->n_sectors = ata_id_n_sectors(id);
1662 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
1663 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
1666 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
1669 if (dev->id[59] & 0x100)
1670 dev->multi_count = dev->id[59] & 0xff;
1672 if (ata_id_has_lba(id)) {
1673 const char *lba_desc;
1677 dev->flags |= ATA_DFLAG_LBA;
1678 if (ata_id_has_lba48(id)) {
1679 dev->flags |= ATA_DFLAG_LBA48;
1682 if (dev->n_sectors >= (1UL << 28) &&
1683 ata_id_has_flush_ext(id))
1684 dev->flags |= ATA_DFLAG_FLUSH_EXT;
1688 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1690 /* print device info to dmesg */
1691 if (ata_msg_drv(ap) && print_info) {
1692 ata_dev_printk(dev, KERN_INFO,
1693 "%s: %s, %s, max %s\n",
1694 revbuf, modelbuf, fwrevbuf,
1695 ata_mode_string(xfer_mask));
1696 ata_dev_printk(dev, KERN_INFO,
1697 "%Lu sectors, multi %u: %s %s\n",
1698 (unsigned long long)dev->n_sectors,
1699 dev->multi_count, lba_desc, ncq_desc);
1704 /* Default translation */
1705 dev->cylinders = id[1];
1707 dev->sectors = id[6];
1709 if (ata_id_current_chs_valid(id)) {
1710 /* Current CHS translation is valid. */
1711 dev->cylinders = id[54];
1712 dev->heads = id[55];
1713 dev->sectors = id[56];
1716 /* print device info to dmesg */
1717 if (ata_msg_drv(ap) && print_info) {
1718 ata_dev_printk(dev, KERN_INFO,
1719 "%s: %s, %s, max %s\n",
1720 revbuf, modelbuf, fwrevbuf,
1721 ata_mode_string(xfer_mask));
1722 ata_dev_printk(dev, KERN_INFO,
1723 "%Lu sectors, multi %u, CHS %u/%u/%u\n",
1724 (unsigned long long)dev->n_sectors,
1725 dev->multi_count, dev->cylinders,
1726 dev->heads, dev->sectors);
1733 /* ATAPI-specific feature tests */
1734 else if (dev->class == ATA_DEV_ATAPI) {
1735 char *cdb_intr_string = "";
1737 rc = atapi_cdb_len(id);
1738 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1739 if (ata_msg_warn(ap))
1740 ata_dev_printk(dev, KERN_WARNING,
1741 "unsupported CDB len\n");
1745 dev->cdb_len = (unsigned int) rc;
1747 if (ata_id_cdb_intr(dev->id)) {
1748 dev->flags |= ATA_DFLAG_CDB_INTR;
1749 cdb_intr_string = ", CDB intr";
1752 /* print device info to dmesg */
1753 if (ata_msg_drv(ap) && print_info)
1754 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1755 ata_mode_string(xfer_mask),
1759 /* determine max_sectors */
1760 dev->max_sectors = ATA_MAX_SECTORS;
1761 if (dev->flags & ATA_DFLAG_LBA48)
1762 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
1764 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
1765 /* Let the user know. We don't want to disallow opens for
1766 rescue purposes, or in case the vendor is just a blithering
1769 ata_dev_printk(dev, KERN_WARNING,
1770 "Drive reports diagnostics failure. This may indicate a drive\n");
1771 ata_dev_printk(dev, KERN_WARNING,
1772 "fault or invalid emulation. Contact drive vendor for information.\n");
1776 /* limit bridge transfers to udma5, 200 sectors */
1777 if (ata_dev_knobble(dev)) {
1778 if (ata_msg_drv(ap) && print_info)
1779 ata_dev_printk(dev, KERN_INFO,
1780 "applying bridge limits\n");
1781 dev->udma_mask &= ATA_UDMA5;
1782 dev->max_sectors = ATA_MAX_SECTORS;
1785 if (ata_device_blacklisted(dev) & ATA_HORKAGE_MAX_SEC_128)
1786 dev->max_sectors = min(ATA_MAX_SECTORS_128, dev->max_sectors);
1788 /* limit ATAPI DMA to R/W commands only */
1789 if (ata_device_blacklisted(dev) & ATA_HORKAGE_DMA_RW_ONLY)
1790 dev->horkage |= ATA_HORKAGE_DMA_RW_ONLY;
1792 if (ap->ops->dev_config)
1793 ap->ops->dev_config(dev);
1795 if (ata_msg_probe(ap))
1796 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1797 __FUNCTION__, ata_chk_status(ap));
1801 if (ata_msg_probe(ap))
1802 ata_dev_printk(dev, KERN_DEBUG,
1803 "%s: EXIT, err\n", __FUNCTION__);
1808 * ata_cable_40wire - return 40 wire cable type
1811 * Helper method for drivers which want to hardwire 40 wire cable
1815 int ata_cable_40wire(struct ata_port *ap)
1817 return ATA_CBL_PATA40;
1821 * ata_cable_80wire - return 80 wire cable type
1824 * Helper method for drivers which want to hardwire 80 wire cable
1828 int ata_cable_80wire(struct ata_port *ap)
1830 return ATA_CBL_PATA80;
1834 * ata_cable_unknown - return unknown PATA cable.
1837 * Helper method for drivers which have no PATA cable detection.
1840 int ata_cable_unknown(struct ata_port *ap)
1842 return ATA_CBL_PATA_UNK;
1846 * ata_cable_sata - return SATA cable type
1849 * Helper method for drivers which have SATA cables
1852 int ata_cable_sata(struct ata_port *ap)
1854 return ATA_CBL_SATA;
1858 * ata_bus_probe - Reset and probe ATA bus
1861 * Master ATA bus probing function. Initiates a hardware-dependent
1862 * bus reset, then attempts to identify any devices found on
1866 * PCI/etc. bus probe sem.
1869 * Zero on success, negative errno otherwise.
1872 int ata_bus_probe(struct ata_port *ap)
1874 unsigned int classes[ATA_MAX_DEVICES];
1875 int tries[ATA_MAX_DEVICES];
1877 struct ata_device *dev;
1881 for (i = 0; i < ATA_MAX_DEVICES; i++)
1882 tries[i] = ATA_PROBE_MAX_TRIES;
1885 /* reset and determine device classes */
1886 ap->ops->phy_reset(ap);
1888 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1889 dev = &ap->device[i];
1891 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1892 dev->class != ATA_DEV_UNKNOWN)
1893 classes[dev->devno] = dev->class;
1895 classes[dev->devno] = ATA_DEV_NONE;
1897 dev->class = ATA_DEV_UNKNOWN;
1902 /* after the reset the device state is PIO 0 and the controller
1903 state is undefined. Record the mode */
1905 for (i = 0; i < ATA_MAX_DEVICES; i++)
1906 ap->device[i].pio_mode = XFER_PIO_0;
1908 /* read IDENTIFY page and configure devices. We have to do the identify
1909 specific sequence bass-ackwards so that PDIAG- is released by
1912 for (i = ATA_MAX_DEVICES - 1; i >= 0; i--) {
1913 dev = &ap->device[i];
1916 dev->class = classes[i];
1918 if (!ata_dev_enabled(dev))
1921 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
1927 /* Now ask for the cable type as PDIAG- should have been released */
1928 if (ap->ops->cable_detect)
1929 ap->cbl = ap->ops->cable_detect(ap);
1931 /* After the identify sequence we can now set up the devices. We do
1932 this in the normal order so that the user doesn't get confused */
1934 for(i = 0; i < ATA_MAX_DEVICES; i++) {
1935 dev = &ap->device[i];
1936 if (!ata_dev_enabled(dev))
1939 ap->eh_context.i.flags |= ATA_EHI_PRINTINFO;
1940 rc = ata_dev_configure(dev);
1941 ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
1946 /* configure transfer mode */
1947 rc = ata_set_mode(ap, &dev);
1951 for (i = 0; i < ATA_MAX_DEVICES; i++)
1952 if (ata_dev_enabled(&ap->device[i]))
1955 /* no device present, disable port */
1956 ata_port_disable(ap);
1957 ap->ops->port_disable(ap);
1961 tries[dev->devno]--;
1965 /* eeek, something went very wrong, give up */
1966 tries[dev->devno] = 0;
1970 /* give it just one more chance */
1971 tries[dev->devno] = min(tries[dev->devno], 1);
1973 if (tries[dev->devno] == 1) {
1974 /* This is the last chance, better to slow
1975 * down than lose it.
1977 sata_down_spd_limit(ap);
1978 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
1982 if (!tries[dev->devno])
1983 ata_dev_disable(dev);
1989 * ata_port_probe - Mark port as enabled
1990 * @ap: Port for which we indicate enablement
1992 * Modify @ap data structure such that the system
1993 * thinks that the entire port is enabled.
1995 * LOCKING: host lock, or some other form of
1999 void ata_port_probe(struct ata_port *ap)
2001 ap->flags &= ~ATA_FLAG_DISABLED;
2005 * sata_print_link_status - Print SATA link status
2006 * @ap: SATA port to printk link status about
2008 * This function prints link speed and status of a SATA link.
2013 void sata_print_link_status(struct ata_port *ap)
2015 u32 sstatus, scontrol, tmp;
2017 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
2019 sata_scr_read(ap, SCR_CONTROL, &scontrol);
2021 if (ata_port_online(ap)) {
2022 tmp = (sstatus >> 4) & 0xf;
2023 ata_port_printk(ap, KERN_INFO,
2024 "SATA link up %s (SStatus %X SControl %X)\n",
2025 sata_spd_string(tmp), sstatus, scontrol);
2027 ata_port_printk(ap, KERN_INFO,
2028 "SATA link down (SStatus %X SControl %X)\n",
2034 * __sata_phy_reset - Wake/reset a low-level SATA PHY
2035 * @ap: SATA port associated with target SATA PHY.
2037 * This function issues commands to standard SATA Sxxx
2038 * PHY registers, to wake up the phy (and device), and
2039 * clear any reset condition.
2042 * PCI/etc. bus probe sem.
2045 void __sata_phy_reset(struct ata_port *ap)
2048 unsigned long timeout = jiffies + (HZ * 5);
2050 if (ap->flags & ATA_FLAG_SATA_RESET) {
2051 /* issue phy wake/reset */
2052 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
2053 /* Couldn't find anything in SATA I/II specs, but
2054 * AHCI-1.1 10.4.2 says at least 1 ms. */
2057 /* phy wake/clear reset */
2058 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
2060 /* wait for phy to become ready, if necessary */
2063 sata_scr_read(ap, SCR_STATUS, &sstatus);
2064 if ((sstatus & 0xf) != 1)
2066 } while (time_before(jiffies, timeout));
2068 /* print link status */
2069 sata_print_link_status(ap);
2071 /* TODO: phy layer with polling, timeouts, etc. */
2072 if (!ata_port_offline(ap))
2075 ata_port_disable(ap);
2077 if (ap->flags & ATA_FLAG_DISABLED)
2080 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2081 ata_port_disable(ap);
2085 ap->cbl = ATA_CBL_SATA;
2089 * sata_phy_reset - Reset SATA bus.
2090 * @ap: SATA port associated with target SATA PHY.
2092 * This function resets the SATA bus, and then probes
2093 * the bus for devices.
2096 * PCI/etc. bus probe sem.
2099 void sata_phy_reset(struct ata_port *ap)
2101 __sata_phy_reset(ap);
2102 if (ap->flags & ATA_FLAG_DISABLED)
2108 * ata_dev_pair - return other device on cable
2111 * Obtain the other device on the same cable, or if none is
2112 * present NULL is returned
2115 struct ata_device *ata_dev_pair(struct ata_device *adev)
2117 struct ata_port *ap = adev->ap;
2118 struct ata_device *pair = &ap->device[1 - adev->devno];
2119 if (!ata_dev_enabled(pair))
2125 * ata_port_disable - Disable port.
2126 * @ap: Port to be disabled.
2128 * Modify @ap data structure such that the system
2129 * thinks that the entire port is disabled, and should
2130 * never attempt to probe or communicate with devices
2133 * LOCKING: host lock, or some other form of
2137 void ata_port_disable(struct ata_port *ap)
2139 ap->device[0].class = ATA_DEV_NONE;
2140 ap->device[1].class = ATA_DEV_NONE;
2141 ap->flags |= ATA_FLAG_DISABLED;
2145 * sata_down_spd_limit - adjust SATA spd limit downward
2146 * @ap: Port to adjust SATA spd limit for
2148 * Adjust SATA spd limit of @ap downward. Note that this
2149 * function only adjusts the limit. The change must be applied
2150 * using sata_set_spd().
2153 * Inherited from caller.
2156 * 0 on success, negative errno on failure
2158 int sata_down_spd_limit(struct ata_port *ap)
2160 u32 sstatus, spd, mask;
2163 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
2167 mask = ap->sata_spd_limit;
2170 highbit = fls(mask) - 1;
2171 mask &= ~(1 << highbit);
2173 spd = (sstatus >> 4) & 0xf;
2177 mask &= (1 << spd) - 1;
2181 ap->sata_spd_limit = mask;
2183 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
2184 sata_spd_string(fls(mask)));
2189 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
2193 if (ap->sata_spd_limit == UINT_MAX)
2196 limit = fls(ap->sata_spd_limit);
2198 spd = (*scontrol >> 4) & 0xf;
2199 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
2201 return spd != limit;
2205 * sata_set_spd_needed - is SATA spd configuration needed
2206 * @ap: Port in question
2208 * Test whether the spd limit in SControl matches
2209 * @ap->sata_spd_limit. This function is used to determine
2210 * whether hardreset is necessary to apply SATA spd
2214 * Inherited from caller.
2217 * 1 if SATA spd configuration is needed, 0 otherwise.
2219 int sata_set_spd_needed(struct ata_port *ap)
2223 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
2226 return __sata_set_spd_needed(ap, &scontrol);
2230 * sata_set_spd - set SATA spd according to spd limit
2231 * @ap: Port to set SATA spd for
2233 * Set SATA spd of @ap according to sata_spd_limit.
2236 * Inherited from caller.
2239 * 0 if spd doesn't need to be changed, 1 if spd has been
2240 * changed. Negative errno if SCR registers are inaccessible.
2242 int sata_set_spd(struct ata_port *ap)
2247 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2250 if (!__sata_set_spd_needed(ap, &scontrol))
2253 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2260 * This mode timing computation functionality is ported over from
2261 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2264 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
2265 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
2266 * for UDMA6, which is currently supported only by Maxtor drives.
2268 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
2271 static const struct ata_timing ata_timing[] = {
2273 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
2274 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
2275 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
2276 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
2278 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
2279 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
2280 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
2281 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
2282 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
2284 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2286 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
2287 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
2288 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2290 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2291 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2292 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2294 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2295 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2296 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2297 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2299 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2300 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2301 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2303 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2308 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2309 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2311 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2313 q->setup = EZ(t->setup * 1000, T);
2314 q->act8b = EZ(t->act8b * 1000, T);
2315 q->rec8b = EZ(t->rec8b * 1000, T);
2316 q->cyc8b = EZ(t->cyc8b * 1000, T);
2317 q->active = EZ(t->active * 1000, T);
2318 q->recover = EZ(t->recover * 1000, T);
2319 q->cycle = EZ(t->cycle * 1000, T);
2320 q->udma = EZ(t->udma * 1000, UT);
2323 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2324 struct ata_timing *m, unsigned int what)
2326 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2327 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2328 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2329 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2330 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2331 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2332 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2333 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2336 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2338 const struct ata_timing *t;
2340 for (t = ata_timing; t->mode != speed; t++)
2341 if (t->mode == 0xFF)
2346 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2347 struct ata_timing *t, int T, int UT)
2349 const struct ata_timing *s;
2350 struct ata_timing p;
2356 if (!(s = ata_timing_find_mode(speed)))
2359 memcpy(t, s, sizeof(*s));
2362 * If the drive is an EIDE drive, it can tell us it needs extended
2363 * PIO/MW_DMA cycle timing.
2366 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2367 memset(&p, 0, sizeof(p));
2368 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2369 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2370 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2371 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2372 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2374 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2378 * Convert the timing to bus clock counts.
2381 ata_timing_quantize(t, t, T, UT);
2384 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2385 * S.M.A.R.T * and some other commands. We have to ensure that the
2386 * DMA cycle timing is slower/equal than the fastest PIO timing.
2389 if (speed > XFER_PIO_6) {
2390 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2391 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2395 * Lengthen active & recovery time so that cycle time is correct.
2398 if (t->act8b + t->rec8b < t->cyc8b) {
2399 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2400 t->rec8b = t->cyc8b - t->act8b;
2403 if (t->active + t->recover < t->cycle) {
2404 t->active += (t->cycle - (t->active + t->recover)) / 2;
2405 t->recover = t->cycle - t->active;
2412 * ata_down_xfermask_limit - adjust dev xfer masks downward
2413 * @dev: Device to adjust xfer masks
2414 * @sel: ATA_DNXFER_* selector
2416 * Adjust xfer masks of @dev downward. Note that this function
2417 * does not apply the change. Invoking ata_set_mode() afterwards
2418 * will apply the limit.
2421 * Inherited from caller.
2424 * 0 on success, negative errno on failure
2426 int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
2429 unsigned int orig_mask, xfer_mask;
2430 unsigned int pio_mask, mwdma_mask, udma_mask;
2433 quiet = !!(sel & ATA_DNXFER_QUIET);
2434 sel &= ~ATA_DNXFER_QUIET;
2436 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
2439 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
2442 case ATA_DNXFER_PIO:
2443 highbit = fls(pio_mask) - 1;
2444 pio_mask &= ~(1 << highbit);
2447 case ATA_DNXFER_DMA:
2449 highbit = fls(udma_mask) - 1;
2450 udma_mask &= ~(1 << highbit);
2453 } else if (mwdma_mask) {
2454 highbit = fls(mwdma_mask) - 1;
2455 mwdma_mask &= ~(1 << highbit);
2461 case ATA_DNXFER_40C:
2462 udma_mask &= ATA_UDMA_MASK_40C;
2465 case ATA_DNXFER_FORCE_PIO0:
2467 case ATA_DNXFER_FORCE_PIO:
2476 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
2478 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
2482 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
2483 snprintf(buf, sizeof(buf), "%s:%s",
2484 ata_mode_string(xfer_mask),
2485 ata_mode_string(xfer_mask & ATA_MASK_PIO));
2487 snprintf(buf, sizeof(buf), "%s",
2488 ata_mode_string(xfer_mask));
2490 ata_dev_printk(dev, KERN_WARNING,
2491 "limiting speed to %s\n", buf);
2494 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2500 static int ata_dev_set_mode(struct ata_device *dev)
2502 struct ata_eh_context *ehc = &dev->ap->eh_context;
2503 unsigned int err_mask;
2506 dev->flags &= ~ATA_DFLAG_PIO;
2507 if (dev->xfer_shift == ATA_SHIFT_PIO)
2508 dev->flags |= ATA_DFLAG_PIO;
2510 err_mask = ata_dev_set_xfermode(dev);
2511 /* Old CFA may refuse this command, which is just fine */
2512 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id))
2513 err_mask &= ~AC_ERR_DEV;
2516 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2517 "(err_mask=0x%x)\n", err_mask);
2521 ehc->i.flags |= ATA_EHI_POST_SETMODE;
2522 rc = ata_dev_revalidate(dev, 0);
2523 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
2527 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2528 dev->xfer_shift, (int)dev->xfer_mode);
2530 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2531 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2536 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER
2537 * @ap: port on which timings will be programmed
2538 * @r_failed_dev: out paramter for failed device
2540 * Standard implementation of the function used to tune and set
2541 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2542 * ata_dev_set_mode() fails, pointer to the failing device is
2543 * returned in @r_failed_dev.
2546 * PCI/etc. bus probe sem.
2549 * 0 on success, negative errno otherwise
2552 int ata_do_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2554 struct ata_device *dev;
2555 int i, rc = 0, used_dma = 0, found = 0;
2558 /* step 1: calculate xfer_mask */
2559 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2560 unsigned int pio_mask, dma_mask;
2562 dev = &ap->device[i];
2564 if (!ata_dev_enabled(dev))
2567 ata_dev_xfermask(dev);
2569 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2570 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2571 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2572 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2581 /* step 2: always set host PIO timings */
2582 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2583 dev = &ap->device[i];
2584 if (!ata_dev_enabled(dev))
2587 if (!dev->pio_mode) {
2588 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2593 dev->xfer_mode = dev->pio_mode;
2594 dev->xfer_shift = ATA_SHIFT_PIO;
2595 if (ap->ops->set_piomode)
2596 ap->ops->set_piomode(ap, dev);
2599 /* step 3: set host DMA timings */
2600 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2601 dev = &ap->device[i];
2603 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2606 dev->xfer_mode = dev->dma_mode;
2607 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2608 if (ap->ops->set_dmamode)
2609 ap->ops->set_dmamode(ap, dev);
2612 /* step 4: update devices' xfer mode */
2613 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2614 dev = &ap->device[i];
2616 /* don't update suspended devices' xfer mode */
2617 if (!ata_dev_ready(dev))
2620 rc = ata_dev_set_mode(dev);
2625 /* Record simplex status. If we selected DMA then the other
2626 * host channels are not permitted to do so.
2628 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2629 ap->host->simplex_claimed = ap;
2631 /* step5: chip specific finalisation */
2632 if (ap->ops->post_set_mode)
2633 ap->ops->post_set_mode(ap);
2636 *r_failed_dev = dev;
2641 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2642 * @ap: port on which timings will be programmed
2643 * @r_failed_dev: out paramter for failed device
2645 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2646 * ata_set_mode() fails, pointer to the failing device is
2647 * returned in @r_failed_dev.
2650 * PCI/etc. bus probe sem.
2653 * 0 on success, negative errno otherwise
2655 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2657 /* has private set_mode? */
2658 if (ap->ops->set_mode)
2659 return ap->ops->set_mode(ap, r_failed_dev);
2660 return ata_do_set_mode(ap, r_failed_dev);
2664 * ata_tf_to_host - issue ATA taskfile to host controller
2665 * @ap: port to which command is being issued
2666 * @tf: ATA taskfile register set
2668 * Issues ATA taskfile register set to ATA host controller,
2669 * with proper synchronization with interrupt handler and
2673 * spin_lock_irqsave(host lock)
2676 static inline void ata_tf_to_host(struct ata_port *ap,
2677 const struct ata_taskfile *tf)
2679 ap->ops->tf_load(ap, tf);
2680 ap->ops->exec_command(ap, tf);
2684 * ata_busy_sleep - sleep until BSY clears, or timeout
2685 * @ap: port containing status register to be polled
2686 * @tmout_pat: impatience timeout
2687 * @tmout: overall timeout
2689 * Sleep until ATA Status register bit BSY clears,
2690 * or a timeout occurs.
2693 * Kernel thread context (may sleep).
2696 * 0 on success, -errno otherwise.
2698 int ata_busy_sleep(struct ata_port *ap,
2699 unsigned long tmout_pat, unsigned long tmout)
2701 unsigned long timer_start, timeout;
2704 status = ata_busy_wait(ap, ATA_BUSY, 300);
2705 timer_start = jiffies;
2706 timeout = timer_start + tmout_pat;
2707 while (status != 0xff && (status & ATA_BUSY) &&
2708 time_before(jiffies, timeout)) {
2710 status = ata_busy_wait(ap, ATA_BUSY, 3);
2713 if (status != 0xff && (status & ATA_BUSY))
2714 ata_port_printk(ap, KERN_WARNING,
2715 "port is slow to respond, please be patient "
2716 "(Status 0x%x)\n", status);
2718 timeout = timer_start + tmout;
2719 while (status != 0xff && (status & ATA_BUSY) &&
2720 time_before(jiffies, timeout)) {
2722 status = ata_chk_status(ap);
2728 if (status & ATA_BUSY) {
2729 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2730 "(%lu secs, Status 0x%x)\n",
2731 tmout / HZ, status);
2738 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2740 struct ata_ioports *ioaddr = &ap->ioaddr;
2741 unsigned int dev0 = devmask & (1 << 0);
2742 unsigned int dev1 = devmask & (1 << 1);
2743 unsigned long timeout;
2745 /* if device 0 was found in ata_devchk, wait for its
2749 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2751 /* if device 1 was found in ata_devchk, wait for
2752 * register access, then wait for BSY to clear
2754 timeout = jiffies + ATA_TMOUT_BOOT;
2758 ap->ops->dev_select(ap, 1);
2759 nsect = ioread8(ioaddr->nsect_addr);
2760 lbal = ioread8(ioaddr->lbal_addr);
2761 if ((nsect == 1) && (lbal == 1))
2763 if (time_after(jiffies, timeout)) {
2767 msleep(50); /* give drive a breather */
2770 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2772 /* is all this really necessary? */
2773 ap->ops->dev_select(ap, 0);
2775 ap->ops->dev_select(ap, 1);
2777 ap->ops->dev_select(ap, 0);
2780 static unsigned int ata_bus_softreset(struct ata_port *ap,
2781 unsigned int devmask)
2783 struct ata_ioports *ioaddr = &ap->ioaddr;
2785 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
2787 /* software reset. causes dev0 to be selected */
2788 iowrite8(ap->ctl, ioaddr->ctl_addr);
2789 udelay(20); /* FIXME: flush */
2790 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2791 udelay(20); /* FIXME: flush */
2792 iowrite8(ap->ctl, ioaddr->ctl_addr);
2794 /* spec mandates ">= 2ms" before checking status.
2795 * We wait 150ms, because that was the magic delay used for
2796 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2797 * between when the ATA command register is written, and then
2798 * status is checked. Because waiting for "a while" before
2799 * checking status is fine, post SRST, we perform this magic
2800 * delay here as well.
2802 * Old drivers/ide uses the 2mS rule and then waits for ready
2806 /* Before we perform post reset processing we want to see if
2807 * the bus shows 0xFF because the odd clown forgets the D7
2808 * pulldown resistor.
2810 if (ata_check_status(ap) == 0xFF)
2813 ata_bus_post_reset(ap, devmask);
2819 * ata_bus_reset - reset host port and associated ATA channel
2820 * @ap: port to reset
2822 * This is typically the first time we actually start issuing
2823 * commands to the ATA channel. We wait for BSY to clear, then
2824 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2825 * result. Determine what devices, if any, are on the channel
2826 * by looking at the device 0/1 error register. Look at the signature
2827 * stored in each device's taskfile registers, to determine if
2828 * the device is ATA or ATAPI.
2831 * PCI/etc. bus probe sem.
2832 * Obtains host lock.
2835 * Sets ATA_FLAG_DISABLED if bus reset fails.
2838 void ata_bus_reset(struct ata_port *ap)
2840 struct ata_ioports *ioaddr = &ap->ioaddr;
2841 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2843 unsigned int dev0, dev1 = 0, devmask = 0;
2845 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no);
2847 /* determine if device 0/1 are present */
2848 if (ap->flags & ATA_FLAG_SATA_RESET)
2851 dev0 = ata_devchk(ap, 0);
2853 dev1 = ata_devchk(ap, 1);
2857 devmask |= (1 << 0);
2859 devmask |= (1 << 1);
2861 /* select device 0 again */
2862 ap->ops->dev_select(ap, 0);
2864 /* issue bus reset */
2865 if (ap->flags & ATA_FLAG_SRST)
2866 if (ata_bus_softreset(ap, devmask))
2870 * determine by signature whether we have ATA or ATAPI devices
2872 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2873 if ((slave_possible) && (err != 0x81))
2874 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2876 /* re-enable interrupts */
2877 ap->ops->irq_on(ap);
2879 /* is double-select really necessary? */
2880 if (ap->device[1].class != ATA_DEV_NONE)
2881 ap->ops->dev_select(ap, 1);
2882 if (ap->device[0].class != ATA_DEV_NONE)
2883 ap->ops->dev_select(ap, 0);
2885 /* if no devices were detected, disable this port */
2886 if ((ap->device[0].class == ATA_DEV_NONE) &&
2887 (ap->device[1].class == ATA_DEV_NONE))
2890 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2891 /* set up device control for ATA_FLAG_SATA_RESET */
2892 iowrite8(ap->ctl, ioaddr->ctl_addr);
2899 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2900 ap->ops->port_disable(ap);
2906 * sata_phy_debounce - debounce SATA phy status
2907 * @ap: ATA port to debounce SATA phy status for
2908 * @params: timing parameters { interval, duratinon, timeout } in msec
2910 * Make sure SStatus of @ap reaches stable state, determined by
2911 * holding the same value where DET is not 1 for @duration polled
2912 * every @interval, before @timeout. Timeout constraints the
2913 * beginning of the stable state. Because, after hot unplugging,
2914 * DET gets stuck at 1 on some controllers, this functions waits
2915 * until timeout then returns 0 if DET is stable at 1.
2918 * Kernel thread context (may sleep)
2921 * 0 on success, -errno on failure.
2923 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2925 unsigned long interval_msec = params[0];
2926 unsigned long duration = params[1] * HZ / 1000;
2927 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2928 unsigned long last_jiffies;
2932 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2937 last_jiffies = jiffies;
2940 msleep(interval_msec);
2941 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2947 if (cur == 1 && time_before(jiffies, timeout))
2949 if (time_after(jiffies, last_jiffies + duration))
2954 /* unstable, start over */
2956 last_jiffies = jiffies;
2959 if (time_after(jiffies, timeout))
2965 * sata_phy_resume - resume SATA phy
2966 * @ap: ATA port to resume SATA phy for
2967 * @params: timing parameters { interval, duratinon, timeout } in msec
2969 * Resume SATA phy of @ap and debounce it.
2972 * Kernel thread context (may sleep)
2975 * 0 on success, -errno on failure.
2977 int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2982 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2985 scontrol = (scontrol & 0x0f0) | 0x300;
2987 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2990 /* Some PHYs react badly if SStatus is pounded immediately
2991 * after resuming. Delay 200ms before debouncing.
2995 return sata_phy_debounce(ap, params);
2998 static void ata_wait_spinup(struct ata_port *ap)
3000 struct ata_eh_context *ehc = &ap->eh_context;
3001 unsigned long end, secs;
3004 /* first, debounce phy if SATA */
3005 if (ap->cbl == ATA_CBL_SATA) {
3006 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
3008 /* if debounced successfully and offline, no need to wait */
3009 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
3013 /* okay, let's give the drive time to spin up */
3014 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
3015 secs = ((end - jiffies) + HZ - 1) / HZ;
3017 if (time_after(jiffies, end))
3021 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
3022 "(%lu secs)\n", secs);
3024 schedule_timeout_uninterruptible(end - jiffies);
3028 * ata_std_prereset - prepare for reset
3029 * @ap: ATA port to be reset
3031 * @ap is about to be reset. Initialize it.
3034 * Kernel thread context (may sleep)
3037 * 0 on success, -errno otherwise.
3039 int ata_std_prereset(struct ata_port *ap)
3041 struct ata_eh_context *ehc = &ap->eh_context;
3042 const unsigned long *timing = sata_ehc_deb_timing(ehc);
3045 /* handle link resume & hotplug spinup */
3046 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
3047 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
3048 ehc->i.action |= ATA_EH_HARDRESET;
3050 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
3051 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
3052 ata_wait_spinup(ap);
3054 /* if we're about to do hardreset, nothing more to do */
3055 if (ehc->i.action & ATA_EH_HARDRESET)
3058 /* if SATA, resume phy */
3059 if (ap->cbl == ATA_CBL_SATA) {
3060 rc = sata_phy_resume(ap, timing);
3061 if (rc && rc != -EOPNOTSUPP) {
3062 /* phy resume failed */
3063 ata_port_printk(ap, KERN_WARNING, "failed to resume "
3064 "link for reset (errno=%d)\n", rc);
3069 /* Wait for !BSY if the controller can wait for the first D2H
3070 * Reg FIS and we don't know that no device is attached.
3072 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
3073 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
3079 * ata_std_softreset - reset host port via ATA SRST
3080 * @ap: port to reset
3081 * @classes: resulting classes of attached devices
3083 * Reset host port using ATA SRST.
3086 * Kernel thread context (may sleep)
3089 * 0 on success, -errno otherwise.
3091 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
3093 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
3094 unsigned int devmask = 0, err_mask;
3099 if (ata_port_offline(ap)) {
3100 classes[0] = ATA_DEV_NONE;
3104 /* determine if device 0/1 are present */
3105 if (ata_devchk(ap, 0))
3106 devmask |= (1 << 0);
3107 if (slave_possible && ata_devchk(ap, 1))
3108 devmask |= (1 << 1);
3110 /* select device 0 again */
3111 ap->ops->dev_select(ap, 0);
3113 /* issue bus reset */
3114 DPRINTK("about to softreset, devmask=%x\n", devmask);
3115 err_mask = ata_bus_softreset(ap, devmask);
3117 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
3122 /* determine by signature whether we have ATA or ATAPI devices */
3123 classes[0] = ata_dev_try_classify(ap, 0, &err);
3124 if (slave_possible && err != 0x81)
3125 classes[1] = ata_dev_try_classify(ap, 1, &err);
3128 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
3133 * sata_port_hardreset - reset port via SATA phy reset
3134 * @ap: port to reset
3135 * @timing: timing parameters { interval, duratinon, timeout } in msec
3137 * SATA phy-reset host port using DET bits of SControl register.
3140 * Kernel thread context (may sleep)
3143 * 0 on success, -errno otherwise.
3145 int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing)
3152 if (sata_set_spd_needed(ap)) {
3153 /* SATA spec says nothing about how to reconfigure
3154 * spd. To be on the safe side, turn off phy during
3155 * reconfiguration. This works for at least ICH7 AHCI
3158 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
3161 scontrol = (scontrol & 0x0f0) | 0x304;
3163 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
3169 /* issue phy wake/reset */
3170 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
3173 scontrol = (scontrol & 0x0f0) | 0x301;
3175 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
3178 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
3179 * 10.4.2 says at least 1 ms.
3183 /* bring phy back */
3184 rc = sata_phy_resume(ap, timing);
3186 DPRINTK("EXIT, rc=%d\n", rc);
3191 * sata_std_hardreset - reset host port via SATA phy reset
3192 * @ap: port to reset
3193 * @class: resulting class of attached device
3195 * SATA phy-reset host port using DET bits of SControl register,
3196 * wait for !BSY and classify the attached device.
3199 * Kernel thread context (may sleep)
3202 * 0 on success, -errno otherwise.
3204 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
3206 const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context);
3212 rc = sata_port_hardreset(ap, timing);
3214 ata_port_printk(ap, KERN_ERR,
3215 "COMRESET failed (errno=%d)\n", rc);
3219 /* TODO: phy layer with polling, timeouts, etc. */
3220 if (ata_port_offline(ap)) {
3221 *class = ATA_DEV_NONE;
3222 DPRINTK("EXIT, link offline\n");
3226 /* wait a while before checking status, see SRST for more info */
3229 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
3230 ata_port_printk(ap, KERN_ERR,
3231 "COMRESET failed (device not ready)\n");
3235 ap->ops->dev_select(ap, 0); /* probably unnecessary */
3237 *class = ata_dev_try_classify(ap, 0, NULL);
3239 DPRINTK("EXIT, class=%u\n", *class);
3244 * ata_std_postreset - standard postreset callback
3245 * @ap: the target ata_port
3246 * @classes: classes of attached devices
3248 * This function is invoked after a successful reset. Note that
3249 * the device might have been reset more than once using
3250 * different reset methods before postreset is invoked.
3253 * Kernel thread context (may sleep)
3255 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
3261 /* print link status */
3262 sata_print_link_status(ap);
3265 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
3266 sata_scr_write(ap, SCR_ERROR, serror);
3268 /* re-enable interrupts */
3269 if (!ap->ops->error_handler)
3270 ap->ops->irq_on(ap);
3272 /* is double-select really necessary? */
3273 if (classes[0] != ATA_DEV_NONE)
3274 ap->ops->dev_select(ap, 1);
3275 if (classes[1] != ATA_DEV_NONE)
3276 ap->ops->dev_select(ap, 0);
3278 /* bail out if no device is present */
3279 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
3280 DPRINTK("EXIT, no device\n");
3284 /* set up device control */
3285 if (ap->ioaddr.ctl_addr)
3286 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
3292 * ata_dev_same_device - Determine whether new ID matches configured device
3293 * @dev: device to compare against
3294 * @new_class: class of the new device
3295 * @new_id: IDENTIFY page of the new device
3297 * Compare @new_class and @new_id against @dev and determine
3298 * whether @dev is the device indicated by @new_class and
3305 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3307 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3310 const u16 *old_id = dev->id;
3311 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3312 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
3315 if (dev->class != new_class) {
3316 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
3317 dev->class, new_class);
3321 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3322 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3323 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3324 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
3325 new_n_sectors = ata_id_n_sectors(new_id);
3327 if (strcmp(model[0], model[1])) {
3328 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
3329 "'%s' != '%s'\n", model[0], model[1]);
3333 if (strcmp(serial[0], serial[1])) {
3334 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
3335 "'%s' != '%s'\n", serial[0], serial[1]);
3339 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
3340 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
3342 (unsigned long long)dev->n_sectors,
3343 (unsigned long long)new_n_sectors);
3351 * ata_dev_revalidate - Revalidate ATA device
3352 * @dev: device to revalidate
3353 * @readid_flags: read ID flags
3355 * Re-read IDENTIFY page and make sure @dev is still attached to
3359 * Kernel thread context (may sleep)
3362 * 0 on success, negative errno otherwise
3364 int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags)
3366 unsigned int class = dev->class;
3367 u16 *id = (void *)dev->ap->sector_buf;
3370 if (!ata_dev_enabled(dev)) {
3376 rc = ata_dev_read_id(dev, &class, readid_flags, id);
3380 /* is the device still there? */
3381 if (!ata_dev_same_device(dev, class, id)) {
3386 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3388 /* configure device according to the new ID */
3389 rc = ata_dev_configure(dev);
3394 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3398 struct ata_blacklist_entry {
3399 const char *model_num;
3400 const char *model_rev;
3401 unsigned long horkage;
3404 static const struct ata_blacklist_entry ata_device_blacklist [] = {
3405 /* Devices with DMA related problems under Linux */
3406 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
3407 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
3408 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
3409 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
3410 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
3411 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
3412 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
3413 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
3414 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
3415 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
3416 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
3417 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
3418 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
3419 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3420 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
3421 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
3422 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
3423 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
3424 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
3425 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
3426 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
3427 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
3428 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
3429 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
3430 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
3431 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
3432 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
3433 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
3434 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA },
3436 /* Weird ATAPI devices */
3437 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 |
3438 ATA_HORKAGE_DMA_RW_ONLY },
3440 /* Devices we expect to fail diagnostics */
3442 /* Devices where NCQ should be avoided */
3444 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
3445 /* http://thread.gmane.org/gmane.linux.ide/14907 */
3446 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
3448 { "Maxtor 6L250S0", "BANC1G10", ATA_HORKAGE_NONCQ },
3449 /* NCQ hard hangs device under heavier load, needs hard power cycle */
3450 { "Maxtor 6B250S0", "BANC1B70", ATA_HORKAGE_NONCQ },
3451 /* Blacklist entries taken from Silicon Image 3124/3132
3452 Windows driver .inf file - also several Linux problem reports */
3453 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
3454 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
3455 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
3457 /* Devices with NCQ limits */
3463 unsigned long ata_device_blacklisted(const struct ata_device *dev)
3465 unsigned char model_num[ATA_ID_PROD_LEN + 1];
3466 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
3467 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3469 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
3470 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
3472 while (ad->model_num) {
3473 if (!strcmp(ad->model_num, model_num)) {
3474 if (ad->model_rev == NULL)
3476 if (!strcmp(ad->model_rev, model_rev))
3484 static int ata_dma_blacklisted(const struct ata_device *dev)
3486 /* We don't support polling DMA.
3487 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3488 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3490 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3491 (dev->flags & ATA_DFLAG_CDB_INTR))
3493 return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0;
3497 * ata_dev_xfermask - Compute supported xfermask of the given device
3498 * @dev: Device to compute xfermask for
3500 * Compute supported xfermask of @dev and store it in
3501 * dev->*_mask. This function is responsible for applying all
3502 * known limits including host controller limits, device
3508 static void ata_dev_xfermask(struct ata_device *dev)
3510 struct ata_port *ap = dev->ap;
3511 struct ata_host *host = ap->host;
3512 unsigned long xfer_mask;
3514 /* controller modes available */
3515 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3516 ap->mwdma_mask, ap->udma_mask);
3518 /* drive modes available */
3519 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3520 dev->mwdma_mask, dev->udma_mask);
3521 xfer_mask &= ata_id_xfermask(dev->id);
3524 * CFA Advanced TrueIDE timings are not allowed on a shared
3527 if (ata_dev_pair(dev)) {
3528 /* No PIO5 or PIO6 */
3529 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3530 /* No MWDMA3 or MWDMA 4 */
3531 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3534 if (ata_dma_blacklisted(dev)) {
3535 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3536 ata_dev_printk(dev, KERN_WARNING,
3537 "device is on DMA blacklist, disabling DMA\n");
3540 if ((host->flags & ATA_HOST_SIMPLEX) &&
3541 host->simplex_claimed && host->simplex_claimed != ap) {
3542 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3543 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3544 "other device, disabling DMA\n");
3547 if (ap->flags & ATA_FLAG_NO_IORDY)
3548 xfer_mask &= ata_pio_mask_no_iordy(dev);
3550 if (ap->ops->mode_filter)
3551 xfer_mask = ap->ops->mode_filter(dev, xfer_mask);
3553 /* Apply cable rule here. Don't apply it early because when
3554 * we handle hot plug the cable type can itself change.
3555 * Check this last so that we know if the transfer rate was
3556 * solely limited by the cable.
3557 * Unknown or 80 wire cables reported host side are checked
3558 * drive side as well. Cases where we know a 40wire cable
3559 * is used safely for 80 are not checked here.
3561 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
3562 /* UDMA/44 or higher would be available */
3563 if((ap->cbl == ATA_CBL_PATA40) ||
3564 (ata_drive_40wire(dev->id) &&
3565 (ap->cbl == ATA_CBL_PATA_UNK ||
3566 ap->cbl == ATA_CBL_PATA80))) {
3567 ata_dev_printk(dev, KERN_WARNING,
3568 "limited to UDMA/33 due to 40-wire cable\n");
3569 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3572 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3573 &dev->mwdma_mask, &dev->udma_mask);
3577 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3578 * @dev: Device to which command will be sent
3580 * Issue SET FEATURES - XFER MODE command to device @dev
3584 * PCI/etc. bus probe sem.
3587 * 0 on success, AC_ERR_* mask otherwise.
3590 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3592 struct ata_taskfile tf;
3593 unsigned int err_mask;
3595 /* set up set-features taskfile */
3596 DPRINTK("set features - xfer mode\n");
3598 ata_tf_init(dev, &tf);
3599 tf.command = ATA_CMD_SET_FEATURES;
3600 tf.feature = SETFEATURES_XFER;
3601 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3602 tf.protocol = ATA_PROT_NODATA;
3603 tf.nsect = dev->xfer_mode;
3605 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3607 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3612 * ata_dev_init_params - Issue INIT DEV PARAMS command
3613 * @dev: Device to which command will be sent
3614 * @heads: Number of heads (taskfile parameter)
3615 * @sectors: Number of sectors (taskfile parameter)
3618 * Kernel thread context (may sleep)
3621 * 0 on success, AC_ERR_* mask otherwise.
3623 static unsigned int ata_dev_init_params(struct ata_device *dev,
3624 u16 heads, u16 sectors)
3626 struct ata_taskfile tf;
3627 unsigned int err_mask;
3629 /* Number of sectors per track 1-255. Number of heads 1-16 */
3630 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3631 return AC_ERR_INVALID;
3633 /* set up init dev params taskfile */
3634 DPRINTK("init dev params \n");
3636 ata_tf_init(dev, &tf);
3637 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3638 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3639 tf.protocol = ATA_PROT_NODATA;
3641 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3643 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3645 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3650 * ata_sg_clean - Unmap DMA memory associated with command
3651 * @qc: Command containing DMA memory to be released
3653 * Unmap all mapped DMA memory associated with this command.
3656 * spin_lock_irqsave(host lock)
3658 void ata_sg_clean(struct ata_queued_cmd *qc)
3660 struct ata_port *ap = qc->ap;
3661 struct scatterlist *sg = qc->__sg;
3662 int dir = qc->dma_dir;
3663 void *pad_buf = NULL;
3665 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3666 WARN_ON(sg == NULL);
3668 if (qc->flags & ATA_QCFLAG_SINGLE)
3669 WARN_ON(qc->n_elem > 1);
3671 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3673 /* if we padded the buffer out to 32-bit bound, and data
3674 * xfer direction is from-device, we must copy from the
3675 * pad buffer back into the supplied buffer
3677 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3678 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3680 if (qc->flags & ATA_QCFLAG_SG) {
3682 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3683 /* restore last sg */
3684 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3686 struct scatterlist *psg = &qc->pad_sgent;
3687 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3688 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3689 kunmap_atomic(addr, KM_IRQ0);
3693 dma_unmap_single(ap->dev,
3694 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3697 sg->length += qc->pad_len;
3699 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3700 pad_buf, qc->pad_len);
3703 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3708 * ata_fill_sg - Fill PCI IDE PRD table
3709 * @qc: Metadata associated with taskfile to be transferred
3711 * Fill PCI IDE PRD (scatter-gather) table with segments
3712 * associated with the current disk command.
3715 * spin_lock_irqsave(host lock)
3718 static void ata_fill_sg(struct ata_queued_cmd *qc)
3720 struct ata_port *ap = qc->ap;
3721 struct scatterlist *sg;
3724 WARN_ON(qc->__sg == NULL);
3725 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3728 ata_for_each_sg(sg, qc) {
3732 /* determine if physical DMA addr spans 64K boundary.
3733 * Note h/w doesn't support 64-bit, so we unconditionally
3734 * truncate dma_addr_t to u32.
3736 addr = (u32) sg_dma_address(sg);
3737 sg_len = sg_dma_len(sg);
3740 offset = addr & 0xffff;
3742 if ((offset + sg_len) > 0x10000)
3743 len = 0x10000 - offset;
3745 ap->prd[idx].addr = cpu_to_le32(addr);
3746 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3747 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3756 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3759 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3760 * @qc: Metadata associated with taskfile to check
3762 * Allow low-level driver to filter ATA PACKET commands, returning
3763 * a status indicating whether or not it is OK to use DMA for the
3764 * supplied PACKET command.
3767 * spin_lock_irqsave(host lock)
3769 * RETURNS: 0 when ATAPI DMA can be used
3772 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3774 struct ata_port *ap = qc->ap;
3775 int rc = 0; /* Assume ATAPI DMA is OK by default */
3777 /* some drives can only do ATAPI DMA on read/write */
3778 if (unlikely(qc->dev->horkage & ATA_HORKAGE_DMA_RW_ONLY)) {
3779 struct scsi_cmnd *cmd = qc->scsicmd;
3780 u8 *scsicmd = cmd->cmnd;
3782 switch (scsicmd[0]) {
3789 /* atapi dma maybe ok */
3792 /* turn off atapi dma */
3797 if (ap->ops->check_atapi_dma)
3798 rc = ap->ops->check_atapi_dma(qc);
3803 * ata_qc_prep - Prepare taskfile for submission
3804 * @qc: Metadata associated with taskfile to be prepared
3806 * Prepare ATA taskfile for submission.
3809 * spin_lock_irqsave(host lock)
3811 void ata_qc_prep(struct ata_queued_cmd *qc)
3813 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3819 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3822 * ata_sg_init_one - Associate command with memory buffer
3823 * @qc: Command to be associated
3824 * @buf: Memory buffer
3825 * @buflen: Length of memory buffer, in bytes.
3827 * Initialize the data-related elements of queued_cmd @qc
3828 * to point to a single memory buffer, @buf of byte length @buflen.
3831 * spin_lock_irqsave(host lock)
3834 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3836 qc->flags |= ATA_QCFLAG_SINGLE;
3838 qc->__sg = &qc->sgent;
3840 qc->orig_n_elem = 1;
3842 qc->nbytes = buflen;
3844 sg_init_one(&qc->sgent, buf, buflen);
3848 * ata_sg_init - Associate command with scatter-gather table.
3849 * @qc: Command to be associated
3850 * @sg: Scatter-gather table.
3851 * @n_elem: Number of elements in s/g table.
3853 * Initialize the data-related elements of queued_cmd @qc
3854 * to point to a scatter-gather table @sg, containing @n_elem
3858 * spin_lock_irqsave(host lock)
3861 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3862 unsigned int n_elem)
3864 qc->flags |= ATA_QCFLAG_SG;
3866 qc->n_elem = n_elem;
3867 qc->orig_n_elem = n_elem;
3871 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3872 * @qc: Command with memory buffer to be mapped.
3874 * DMA-map the memory buffer associated with queued_cmd @qc.
3877 * spin_lock_irqsave(host lock)
3880 * Zero on success, negative on error.
3883 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3885 struct ata_port *ap = qc->ap;
3886 int dir = qc->dma_dir;
3887 struct scatterlist *sg = qc->__sg;
3888 dma_addr_t dma_address;
3891 /* we must lengthen transfers to end on a 32-bit boundary */
3892 qc->pad_len = sg->length & 3;
3894 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3895 struct scatterlist *psg = &qc->pad_sgent;
3897 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3899 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3901 if (qc->tf.flags & ATA_TFLAG_WRITE)
3902 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3905 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3906 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3908 sg->length -= qc->pad_len;
3909 if (sg->length == 0)
3912 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3913 sg->length, qc->pad_len);
3921 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3923 if (dma_mapping_error(dma_address)) {
3925 sg->length += qc->pad_len;
3929 sg_dma_address(sg) = dma_address;
3930 sg_dma_len(sg) = sg->length;
3933 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3934 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3940 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3941 * @qc: Command with scatter-gather table to be mapped.
3943 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3946 * spin_lock_irqsave(host lock)
3949 * Zero on success, negative on error.
3953 static int ata_sg_setup(struct ata_queued_cmd *qc)
3955 struct ata_port *ap = qc->ap;
3956 struct scatterlist *sg = qc->__sg;
3957 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3958 int n_elem, pre_n_elem, dir, trim_sg = 0;
3960 VPRINTK("ENTER, ata%u\n", ap->print_id);
3961 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3963 /* we must lengthen transfers to end on a 32-bit boundary */
3964 qc->pad_len = lsg->length & 3;
3966 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3967 struct scatterlist *psg = &qc->pad_sgent;
3968 unsigned int offset;
3970 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3972 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3975 * psg->page/offset are used to copy to-be-written
3976 * data in this function or read data in ata_sg_clean.
3978 offset = lsg->offset + lsg->length - qc->pad_len;
3979 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3980 psg->offset = offset_in_page(offset);
3982 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3983 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3984 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3985 kunmap_atomic(addr, KM_IRQ0);
3988 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3989 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3991 lsg->length -= qc->pad_len;
3992 if (lsg->length == 0)
3995 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3996 qc->n_elem - 1, lsg->length, qc->pad_len);
3999 pre_n_elem = qc->n_elem;
4000 if (trim_sg && pre_n_elem)
4009 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
4011 /* restore last sg */
4012 lsg->length += qc->pad_len;
4016 DPRINTK("%d sg elements mapped\n", n_elem);
4019 qc->n_elem = n_elem;
4025 * swap_buf_le16 - swap halves of 16-bit words in place
4026 * @buf: Buffer to swap
4027 * @buf_words: Number of 16-bit words in buffer.
4029 * Swap halves of 16-bit words if needed to convert from
4030 * little-endian byte order to native cpu byte order, or
4034 * Inherited from caller.
4036 void swap_buf_le16(u16 *buf, unsigned int buf_words)
4041 for (i = 0; i < buf_words; i++)
4042 buf[i] = le16_to_cpu(buf[i]);
4043 #endif /* __BIG_ENDIAN */
4047 * ata_data_xfer - Transfer data by PIO
4048 * @adev: device to target
4050 * @buflen: buffer length
4051 * @write_data: read/write
4053 * Transfer data from/to the device data register by PIO.
4056 * Inherited from caller.
4058 void ata_data_xfer(struct ata_device *adev, unsigned char *buf,
4059 unsigned int buflen, int write_data)
4061 struct ata_port *ap = adev->ap;
4062 unsigned int words = buflen >> 1;
4064 /* Transfer multiple of 2 bytes */
4066 iowrite16_rep(ap->ioaddr.data_addr, buf, words);
4068 ioread16_rep(ap->ioaddr.data_addr, buf, words);
4070 /* Transfer trailing 1 byte, if any. */
4071 if (unlikely(buflen & 0x01)) {
4072 u16 align_buf[1] = { 0 };
4073 unsigned char *trailing_buf = buf + buflen - 1;
4076 memcpy(align_buf, trailing_buf, 1);
4077 iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
4079 align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr));
4080 memcpy(trailing_buf, align_buf, 1);
4086 * ata_data_xfer_noirq - Transfer data by PIO
4087 * @adev: device to target
4089 * @buflen: buffer length
4090 * @write_data: read/write
4092 * Transfer data from/to the device data register by PIO. Do the
4093 * transfer with interrupts disabled.
4096 * Inherited from caller.
4098 void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
4099 unsigned int buflen, int write_data)
4101 unsigned long flags;
4102 local_irq_save(flags);
4103 ata_data_xfer(adev, buf, buflen, write_data);
4104 local_irq_restore(flags);
4109 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
4110 * @qc: Command on going
4112 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
4115 * Inherited from caller.
4118 static void ata_pio_sector(struct ata_queued_cmd *qc)
4120 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4121 struct scatterlist *sg = qc->__sg;
4122 struct ata_port *ap = qc->ap;
4124 unsigned int offset;
4127 if (qc->curbytes == qc->nbytes - ATA_SECT_SIZE)
4128 ap->hsm_task_state = HSM_ST_LAST;
4130 page = sg[qc->cursg].page;
4131 offset = sg[qc->cursg].offset + qc->cursg_ofs;
4133 /* get the current page and offset */
4134 page = nth_page(page, (offset >> PAGE_SHIFT));
4135 offset %= PAGE_SIZE;
4137 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4139 if (PageHighMem(page)) {
4140 unsigned long flags;
4142 /* FIXME: use a bounce buffer */
4143 local_irq_save(flags);
4144 buf = kmap_atomic(page, KM_IRQ0);
4146 /* do the actual data transfer */
4147 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
4149 kunmap_atomic(buf, KM_IRQ0);
4150 local_irq_restore(flags);
4152 buf = page_address(page);
4153 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
4156 qc->curbytes += ATA_SECT_SIZE;
4157 qc->cursg_ofs += ATA_SECT_SIZE;
4159 if (qc->cursg_ofs == (&sg[qc->cursg])->length) {
4166 * ata_pio_sectors - Transfer one or many 512-byte sectors.
4167 * @qc: Command on going
4169 * Transfer one or many ATA_SECT_SIZE of data from/to the
4170 * ATA device for the DRQ request.
4173 * Inherited from caller.
4176 static void ata_pio_sectors(struct ata_queued_cmd *qc)
4178 if (is_multi_taskfile(&qc->tf)) {
4179 /* READ/WRITE MULTIPLE */
4182 WARN_ON(qc->dev->multi_count == 0);
4184 nsect = min((qc->nbytes - qc->curbytes) / ATA_SECT_SIZE,
4185 qc->dev->multi_count);
4193 * atapi_send_cdb - Write CDB bytes to hardware
4194 * @ap: Port to which ATAPI device is attached.
4195 * @qc: Taskfile currently active
4197 * When device has indicated its readiness to accept
4198 * a CDB, this function is called. Send the CDB.
4204 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
4207 DPRINTK("send cdb\n");
4208 WARN_ON(qc->dev->cdb_len < 12);
4210 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
4211 ata_altstatus(ap); /* flush */
4213 switch (qc->tf.protocol) {
4214 case ATA_PROT_ATAPI:
4215 ap->hsm_task_state = HSM_ST;
4217 case ATA_PROT_ATAPI_NODATA:
4218 ap->hsm_task_state = HSM_ST_LAST;
4220 case ATA_PROT_ATAPI_DMA:
4221 ap->hsm_task_state = HSM_ST_LAST;
4222 /* initiate bmdma */
4223 ap->ops->bmdma_start(qc);
4229 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
4230 * @qc: Command on going
4231 * @bytes: number of bytes
4233 * Transfer Transfer data from/to the ATAPI device.
4236 * Inherited from caller.
4240 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
4242 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4243 struct scatterlist *sg = qc->__sg;
4244 struct ata_port *ap = qc->ap;
4247 unsigned int offset, count;
4249 if (qc->curbytes + bytes >= qc->nbytes)
4250 ap->hsm_task_state = HSM_ST_LAST;
4253 if (unlikely(qc->cursg >= qc->n_elem)) {
4255 * The end of qc->sg is reached and the device expects
4256 * more data to transfer. In order not to overrun qc->sg
4257 * and fulfill length specified in the byte count register,
4258 * - for read case, discard trailing data from the device
4259 * - for write case, padding zero data to the device
4261 u16 pad_buf[1] = { 0 };
4262 unsigned int words = bytes >> 1;
4265 if (words) /* warning if bytes > 1 */
4266 ata_dev_printk(qc->dev, KERN_WARNING,
4267 "%u bytes trailing data\n", bytes);
4269 for (i = 0; i < words; i++)
4270 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
4272 ap->hsm_task_state = HSM_ST_LAST;
4276 sg = &qc->__sg[qc->cursg];
4279 offset = sg->offset + qc->cursg_ofs;
4281 /* get the current page and offset */
4282 page = nth_page(page, (offset >> PAGE_SHIFT));
4283 offset %= PAGE_SIZE;
4285 /* don't overrun current sg */
4286 count = min(sg->length - qc->cursg_ofs, bytes);
4288 /* don't cross page boundaries */
4289 count = min(count, (unsigned int)PAGE_SIZE - offset);
4291 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4293 if (PageHighMem(page)) {
4294 unsigned long flags;
4296 /* FIXME: use bounce buffer */
4297 local_irq_save(flags);
4298 buf = kmap_atomic(page, KM_IRQ0);
4300 /* do the actual data transfer */
4301 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4303 kunmap_atomic(buf, KM_IRQ0);
4304 local_irq_restore(flags);
4306 buf = page_address(page);
4307 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4311 qc->curbytes += count;
4312 qc->cursg_ofs += count;
4314 if (qc->cursg_ofs == sg->length) {
4324 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
4325 * @qc: Command on going
4327 * Transfer Transfer data from/to the ATAPI device.
4330 * Inherited from caller.
4333 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
4335 struct ata_port *ap = qc->ap;
4336 struct ata_device *dev = qc->dev;
4337 unsigned int ireason, bc_lo, bc_hi, bytes;
4338 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
4340 /* Abuse qc->result_tf for temp storage of intermediate TF
4341 * here to save some kernel stack usage.
4342 * For normal completion, qc->result_tf is not relevant. For
4343 * error, qc->result_tf is later overwritten by ata_qc_complete().
4344 * So, the correctness of qc->result_tf is not affected.
4346 ap->ops->tf_read(ap, &qc->result_tf);
4347 ireason = qc->result_tf.nsect;
4348 bc_lo = qc->result_tf.lbam;
4349 bc_hi = qc->result_tf.lbah;
4350 bytes = (bc_hi << 8) | bc_lo;
4352 /* shall be cleared to zero, indicating xfer of data */
4353 if (ireason & (1 << 0))
4356 /* make sure transfer direction matches expected */
4357 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
4358 if (do_write != i_write)
4361 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
4363 __atapi_pio_bytes(qc, bytes);
4368 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
4369 qc->err_mask |= AC_ERR_HSM;
4370 ap->hsm_task_state = HSM_ST_ERR;
4374 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
4375 * @ap: the target ata_port
4379 * 1 if ok in workqueue, 0 otherwise.
4382 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
4384 if (qc->tf.flags & ATA_TFLAG_POLLING)
4387 if (ap->hsm_task_state == HSM_ST_FIRST) {
4388 if (qc->tf.protocol == ATA_PROT_PIO &&
4389 (qc->tf.flags & ATA_TFLAG_WRITE))
4392 if (is_atapi_taskfile(&qc->tf) &&
4393 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4401 * ata_hsm_qc_complete - finish a qc running on standard HSM
4402 * @qc: Command to complete
4403 * @in_wq: 1 if called from workqueue, 0 otherwise
4405 * Finish @qc which is running on standard HSM.
4408 * If @in_wq is zero, spin_lock_irqsave(host lock).
4409 * Otherwise, none on entry and grabs host lock.
4411 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4413 struct ata_port *ap = qc->ap;
4414 unsigned long flags;
4416 if (ap->ops->error_handler) {
4418 spin_lock_irqsave(ap->lock, flags);
4420 /* EH might have kicked in while host lock is
4423 qc = ata_qc_from_tag(ap, qc->tag);
4425 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4426 ap->ops->irq_on(ap);
4427 ata_qc_complete(qc);
4429 ata_port_freeze(ap);
4432 spin_unlock_irqrestore(ap->lock, flags);
4434 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4435 ata_qc_complete(qc);
4437 ata_port_freeze(ap);
4441 spin_lock_irqsave(ap->lock, flags);
4442 ap->ops->irq_on(ap);
4443 ata_qc_complete(qc);
4444 spin_unlock_irqrestore(ap->lock, flags);
4446 ata_qc_complete(qc);
4449 ata_altstatus(ap); /* flush */
4453 * ata_hsm_move - move the HSM to the next state.
4454 * @ap: the target ata_port
4456 * @status: current device status
4457 * @in_wq: 1 if called from workqueue, 0 otherwise
4460 * 1 when poll next status needed, 0 otherwise.
4462 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4463 u8 status, int in_wq)
4465 unsigned long flags = 0;
4468 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4470 /* Make sure ata_qc_issue_prot() does not throw things
4471 * like DMA polling into the workqueue. Notice that
4472 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4474 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4477 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4478 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
4480 switch (ap->hsm_task_state) {
4482 /* Send first data block or PACKET CDB */
4484 /* If polling, we will stay in the work queue after
4485 * sending the data. Otherwise, interrupt handler
4486 * takes over after sending the data.
4488 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4490 /* check device status */
4491 if (unlikely((status & ATA_DRQ) == 0)) {
4492 /* handle BSY=0, DRQ=0 as error */
4493 if (likely(status & (ATA_ERR | ATA_DF)))
4494 /* device stops HSM for abort/error */
4495 qc->err_mask |= AC_ERR_DEV;
4497 /* HSM violation. Let EH handle this */
4498 qc->err_mask |= AC_ERR_HSM;
4500 ap->hsm_task_state = HSM_ST_ERR;
4504 /* Device should not ask for data transfer (DRQ=1)
4505 * when it finds something wrong.
4506 * We ignore DRQ here and stop the HSM by
4507 * changing hsm_task_state to HSM_ST_ERR and
4508 * let the EH abort the command or reset the device.
4510 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4511 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with device "
4512 "error, dev_stat 0x%X\n", status);
4513 qc->err_mask |= AC_ERR_HSM;
4514 ap->hsm_task_state = HSM_ST_ERR;
4518 /* Send the CDB (atapi) or the first data block (ata pio out).
4519 * During the state transition, interrupt handler shouldn't
4520 * be invoked before the data transfer is complete and
4521 * hsm_task_state is changed. Hence, the following locking.
4524 spin_lock_irqsave(ap->lock, flags);
4526 if (qc->tf.protocol == ATA_PROT_PIO) {
4527 /* PIO data out protocol.
4528 * send first data block.
4531 /* ata_pio_sectors() might change the state
4532 * to HSM_ST_LAST. so, the state is changed here
4533 * before ata_pio_sectors().
4535 ap->hsm_task_state = HSM_ST;
4536 ata_pio_sectors(qc);
4537 ata_altstatus(ap); /* flush */
4540 atapi_send_cdb(ap, qc);
4543 spin_unlock_irqrestore(ap->lock, flags);
4545 /* if polling, ata_pio_task() handles the rest.
4546 * otherwise, interrupt handler takes over from here.
4551 /* complete command or read/write the data register */
4552 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4553 /* ATAPI PIO protocol */
4554 if ((status & ATA_DRQ) == 0) {
4555 /* No more data to transfer or device error.
4556 * Device error will be tagged in HSM_ST_LAST.
4558 ap->hsm_task_state = HSM_ST_LAST;
4562 /* Device should not ask for data transfer (DRQ=1)
4563 * when it finds something wrong.
4564 * We ignore DRQ here and stop the HSM by
4565 * changing hsm_task_state to HSM_ST_ERR and
4566 * let the EH abort the command or reset the device.
4568 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4569 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with "
4570 "device error, dev_stat 0x%X\n",
4572 qc->err_mask |= AC_ERR_HSM;
4573 ap->hsm_task_state = HSM_ST_ERR;
4577 atapi_pio_bytes(qc);
4579 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4580 /* bad ireason reported by device */
4584 /* ATA PIO protocol */
4585 if (unlikely((status & ATA_DRQ) == 0)) {
4586 /* handle BSY=0, DRQ=0 as error */
4587 if (likely(status & (ATA_ERR | ATA_DF)))
4588 /* device stops HSM for abort/error */
4589 qc->err_mask |= AC_ERR_DEV;
4591 /* HSM violation. Let EH handle this.
4592 * Phantom devices also trigger this
4593 * condition. Mark hint.
4595 qc->err_mask |= AC_ERR_HSM |
4598 ap->hsm_task_state = HSM_ST_ERR;
4602 /* For PIO reads, some devices may ask for
4603 * data transfer (DRQ=1) alone with ERR=1.
4604 * We respect DRQ here and transfer one
4605 * block of junk data before changing the
4606 * hsm_task_state to HSM_ST_ERR.
4608 * For PIO writes, ERR=1 DRQ=1 doesn't make
4609 * sense since the data block has been
4610 * transferred to the device.
4612 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4613 /* data might be corrputed */
4614 qc->err_mask |= AC_ERR_DEV;
4616 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4617 ata_pio_sectors(qc);
4619 status = ata_wait_idle(ap);
4622 if (status & (ATA_BUSY | ATA_DRQ))
4623 qc->err_mask |= AC_ERR_HSM;
4625 /* ata_pio_sectors() might change the
4626 * state to HSM_ST_LAST. so, the state
4627 * is changed after ata_pio_sectors().
4629 ap->hsm_task_state = HSM_ST_ERR;
4633 ata_pio_sectors(qc);
4635 if (ap->hsm_task_state == HSM_ST_LAST &&
4636 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4639 status = ata_wait_idle(ap);
4644 ata_altstatus(ap); /* flush */
4649 if (unlikely(!ata_ok(status))) {
4650 qc->err_mask |= __ac_err_mask(status);
4651 ap->hsm_task_state = HSM_ST_ERR;
4655 /* no more data to transfer */
4656 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4657 ap->print_id, qc->dev->devno, status);
4659 WARN_ON(qc->err_mask);
4661 ap->hsm_task_state = HSM_ST_IDLE;
4663 /* complete taskfile transaction */
4664 ata_hsm_qc_complete(qc, in_wq);
4670 /* make sure qc->err_mask is available to
4671 * know what's wrong and recover
4673 WARN_ON(qc->err_mask == 0);
4675 ap->hsm_task_state = HSM_ST_IDLE;
4677 /* complete taskfile transaction */
4678 ata_hsm_qc_complete(qc, in_wq);
4690 static void ata_pio_task(struct work_struct *work)
4692 struct ata_port *ap =
4693 container_of(work, struct ata_port, port_task.work);
4694 struct ata_queued_cmd *qc = ap->port_task_data;
4699 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4702 * This is purely heuristic. This is a fast path.
4703 * Sometimes when we enter, BSY will be cleared in
4704 * a chk-status or two. If not, the drive is probably seeking
4705 * or something. Snooze for a couple msecs, then
4706 * chk-status again. If still busy, queue delayed work.
4708 status = ata_busy_wait(ap, ATA_BUSY, 5);
4709 if (status & ATA_BUSY) {
4711 status = ata_busy_wait(ap, ATA_BUSY, 10);
4712 if (status & ATA_BUSY) {
4713 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4719 poll_next = ata_hsm_move(ap, qc, status, 1);
4721 /* another command or interrupt handler
4722 * may be running at this point.
4729 * ata_qc_new - Request an available ATA command, for queueing
4730 * @ap: Port associated with device @dev
4731 * @dev: Device from whom we request an available command structure
4737 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4739 struct ata_queued_cmd *qc = NULL;
4742 /* no command while frozen */
4743 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4746 /* the last tag is reserved for internal command. */
4747 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4748 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4749 qc = __ata_qc_from_tag(ap, i);
4760 * ata_qc_new_init - Request an available ATA command, and initialize it
4761 * @dev: Device from whom we request an available command structure
4767 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4769 struct ata_port *ap = dev->ap;
4770 struct ata_queued_cmd *qc;
4772 qc = ata_qc_new(ap);
4785 * ata_qc_free - free unused ata_queued_cmd
4786 * @qc: Command to complete
4788 * Designed to free unused ata_queued_cmd object
4789 * in case something prevents using it.
4792 * spin_lock_irqsave(host lock)
4794 void ata_qc_free(struct ata_queued_cmd *qc)
4796 struct ata_port *ap = qc->ap;
4799 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4803 if (likely(ata_tag_valid(tag))) {
4804 qc->tag = ATA_TAG_POISON;
4805 clear_bit(tag, &ap->qc_allocated);
4809 void __ata_qc_complete(struct ata_queued_cmd *qc)
4811 struct ata_port *ap = qc->ap;
4813 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4814 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4816 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4819 /* command should be marked inactive atomically with qc completion */
4820 if (qc->tf.protocol == ATA_PROT_NCQ)
4821 ap->sactive &= ~(1 << qc->tag);
4823 ap->active_tag = ATA_TAG_POISON;
4825 /* atapi: mark qc as inactive to prevent the interrupt handler
4826 * from completing the command twice later, before the error handler
4827 * is called. (when rc != 0 and atapi request sense is needed)
4829 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4830 ap->qc_active &= ~(1 << qc->tag);
4832 /* call completion callback */
4833 qc->complete_fn(qc);
4836 static void fill_result_tf(struct ata_queued_cmd *qc)
4838 struct ata_port *ap = qc->ap;
4840 qc->result_tf.flags = qc->tf.flags;
4841 ap->ops->tf_read(ap, &qc->result_tf);
4845 * ata_qc_complete - Complete an active ATA command
4846 * @qc: Command to complete
4847 * @err_mask: ATA Status register contents
4849 * Indicate to the mid and upper layers that an ATA
4850 * command has completed, with either an ok or not-ok status.
4853 * spin_lock_irqsave(host lock)
4855 void ata_qc_complete(struct ata_queued_cmd *qc)
4857 struct ata_port *ap = qc->ap;
4859 /* XXX: New EH and old EH use different mechanisms to
4860 * synchronize EH with regular execution path.
4862 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4863 * Normal execution path is responsible for not accessing a
4864 * failed qc. libata core enforces the rule by returning NULL
4865 * from ata_qc_from_tag() for failed qcs.
4867 * Old EH depends on ata_qc_complete() nullifying completion
4868 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4869 * not synchronize with interrupt handler. Only PIO task is
4872 if (ap->ops->error_handler) {
4873 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
4875 if (unlikely(qc->err_mask))
4876 qc->flags |= ATA_QCFLAG_FAILED;
4878 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4879 if (!ata_tag_internal(qc->tag)) {
4880 /* always fill result TF for failed qc */
4882 ata_qc_schedule_eh(qc);
4887 /* read result TF if requested */
4888 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4891 __ata_qc_complete(qc);
4893 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4896 /* read result TF if failed or requested */
4897 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4900 __ata_qc_complete(qc);
4905 * ata_qc_complete_multiple - Complete multiple qcs successfully
4906 * @ap: port in question
4907 * @qc_active: new qc_active mask
4908 * @finish_qc: LLDD callback invoked before completing a qc
4910 * Complete in-flight commands. This functions is meant to be
4911 * called from low-level driver's interrupt routine to complete
4912 * requests normally. ap->qc_active and @qc_active is compared
4913 * and commands are completed accordingly.
4916 * spin_lock_irqsave(host lock)
4919 * Number of completed commands on success, -errno otherwise.
4921 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4922 void (*finish_qc)(struct ata_queued_cmd *))
4928 done_mask = ap->qc_active ^ qc_active;
4930 if (unlikely(done_mask & qc_active)) {
4931 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4932 "(%08x->%08x)\n", ap->qc_active, qc_active);
4936 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4937 struct ata_queued_cmd *qc;
4939 if (!(done_mask & (1 << i)))
4942 if ((qc = ata_qc_from_tag(ap, i))) {
4945 ata_qc_complete(qc);
4953 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4955 struct ata_port *ap = qc->ap;
4957 switch (qc->tf.protocol) {
4960 case ATA_PROT_ATAPI_DMA:
4963 case ATA_PROT_ATAPI:
4965 if (ap->flags & ATA_FLAG_PIO_DMA)
4978 * ata_qc_issue - issue taskfile to device
4979 * @qc: command to issue to device
4981 * Prepare an ATA command to submission to device.
4982 * This includes mapping the data into a DMA-able
4983 * area, filling in the S/G table, and finally
4984 * writing the taskfile to hardware, starting the command.
4987 * spin_lock_irqsave(host lock)
4989 void ata_qc_issue(struct ata_queued_cmd *qc)
4991 struct ata_port *ap = qc->ap;
4993 /* Make sure only one non-NCQ command is outstanding. The
4994 * check is skipped for old EH because it reuses active qc to
4995 * request ATAPI sense.
4997 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4999 if (qc->tf.protocol == ATA_PROT_NCQ) {
5000 WARN_ON(ap->sactive & (1 << qc->tag));
5001 ap->sactive |= 1 << qc->tag;
5003 WARN_ON(ap->sactive);
5004 ap->active_tag = qc->tag;
5007 qc->flags |= ATA_QCFLAG_ACTIVE;
5008 ap->qc_active |= 1 << qc->tag;
5010 if (ata_should_dma_map(qc)) {
5011 if (qc->flags & ATA_QCFLAG_SG) {
5012 if (ata_sg_setup(qc))
5014 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
5015 if (ata_sg_setup_one(qc))
5019 qc->flags &= ~ATA_QCFLAG_DMAMAP;
5022 ap->ops->qc_prep(qc);
5024 qc->err_mask |= ap->ops->qc_issue(qc);
5025 if (unlikely(qc->err_mask))
5030 qc->flags &= ~ATA_QCFLAG_DMAMAP;
5031 qc->err_mask |= AC_ERR_SYSTEM;
5033 ata_qc_complete(qc);
5037 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
5038 * @qc: command to issue to device
5040 * Using various libata functions and hooks, this function
5041 * starts an ATA command. ATA commands are grouped into
5042 * classes called "protocols", and issuing each type of protocol
5043 * is slightly different.
5045 * May be used as the qc_issue() entry in ata_port_operations.
5048 * spin_lock_irqsave(host lock)
5051 * Zero on success, AC_ERR_* mask on failure
5054 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
5056 struct ata_port *ap = qc->ap;
5058 /* Use polling pio if the LLD doesn't handle
5059 * interrupt driven pio and atapi CDB interrupt.
5061 if (ap->flags & ATA_FLAG_PIO_POLLING) {
5062 switch (qc->tf.protocol) {
5064 case ATA_PROT_NODATA:
5065 case ATA_PROT_ATAPI:
5066 case ATA_PROT_ATAPI_NODATA:
5067 qc->tf.flags |= ATA_TFLAG_POLLING;
5069 case ATA_PROT_ATAPI_DMA:
5070 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
5071 /* see ata_dma_blacklisted() */
5079 /* Some controllers show flaky interrupt behavior after
5080 * setting xfer mode. Use polling instead.
5082 if (unlikely(qc->tf.command == ATA_CMD_SET_FEATURES &&
5083 qc->tf.feature == SETFEATURES_XFER) &&
5084 (ap->flags & ATA_FLAG_SETXFER_POLLING))
5085 qc->tf.flags |= ATA_TFLAG_POLLING;
5087 /* select the device */
5088 ata_dev_select(ap, qc->dev->devno, 1, 0);
5090 /* start the command */
5091 switch (qc->tf.protocol) {
5092 case ATA_PROT_NODATA:
5093 if (qc->tf.flags & ATA_TFLAG_POLLING)
5094 ata_qc_set_polling(qc);
5096 ata_tf_to_host(ap, &qc->tf);
5097 ap->hsm_task_state = HSM_ST_LAST;
5099 if (qc->tf.flags & ATA_TFLAG_POLLING)
5100 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5105 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
5107 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
5108 ap->ops->bmdma_setup(qc); /* set up bmdma */
5109 ap->ops->bmdma_start(qc); /* initiate bmdma */
5110 ap->hsm_task_state = HSM_ST_LAST;
5114 if (qc->tf.flags & ATA_TFLAG_POLLING)
5115 ata_qc_set_polling(qc);
5117 ata_tf_to_host(ap, &qc->tf);
5119 if (qc->tf.flags & ATA_TFLAG_WRITE) {
5120 /* PIO data out protocol */
5121 ap->hsm_task_state = HSM_ST_FIRST;
5122 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5124 /* always send first data block using
5125 * the ata_pio_task() codepath.
5128 /* PIO data in protocol */
5129 ap->hsm_task_state = HSM_ST;
5131 if (qc->tf.flags & ATA_TFLAG_POLLING)
5132 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5134 /* if polling, ata_pio_task() handles the rest.
5135 * otherwise, interrupt handler takes over from here.
5141 case ATA_PROT_ATAPI:
5142 case ATA_PROT_ATAPI_NODATA:
5143 if (qc->tf.flags & ATA_TFLAG_POLLING)
5144 ata_qc_set_polling(qc);
5146 ata_tf_to_host(ap, &qc->tf);
5148 ap->hsm_task_state = HSM_ST_FIRST;
5150 /* send cdb by polling if no cdb interrupt */
5151 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
5152 (qc->tf.flags & ATA_TFLAG_POLLING))
5153 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5156 case ATA_PROT_ATAPI_DMA:
5157 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
5159 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
5160 ap->ops->bmdma_setup(qc); /* set up bmdma */
5161 ap->hsm_task_state = HSM_ST_FIRST;
5163 /* send cdb by polling if no cdb interrupt */
5164 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5165 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5170 return AC_ERR_SYSTEM;
5177 * ata_host_intr - Handle host interrupt for given (port, task)
5178 * @ap: Port on which interrupt arrived (possibly...)
5179 * @qc: Taskfile currently active in engine
5181 * Handle host interrupt for given queued command. Currently,
5182 * only DMA interrupts are handled. All other commands are
5183 * handled via polling with interrupts disabled (nIEN bit).
5186 * spin_lock_irqsave(host lock)
5189 * One if interrupt was handled, zero if not (shared irq).
5192 inline unsigned int ata_host_intr (struct ata_port *ap,
5193 struct ata_queued_cmd *qc)
5195 struct ata_eh_info *ehi = &ap->eh_info;
5196 u8 status, host_stat = 0;
5198 VPRINTK("ata%u: protocol %d task_state %d\n",
5199 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
5201 /* Check whether we are expecting interrupt in this state */
5202 switch (ap->hsm_task_state) {
5204 /* Some pre-ATAPI-4 devices assert INTRQ
5205 * at this state when ready to receive CDB.
5208 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
5209 * The flag was turned on only for atapi devices.
5210 * No need to check is_atapi_taskfile(&qc->tf) again.
5212 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5216 if (qc->tf.protocol == ATA_PROT_DMA ||
5217 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
5218 /* check status of DMA engine */
5219 host_stat = ap->ops->bmdma_status(ap);
5220 VPRINTK("ata%u: host_stat 0x%X\n",
5221 ap->print_id, host_stat);
5223 /* if it's not our irq... */
5224 if (!(host_stat & ATA_DMA_INTR))
5227 /* before we do anything else, clear DMA-Start bit */
5228 ap->ops->bmdma_stop(qc);
5230 if (unlikely(host_stat & ATA_DMA_ERR)) {
5231 /* error when transfering data to/from memory */
5232 qc->err_mask |= AC_ERR_HOST_BUS;
5233 ap->hsm_task_state = HSM_ST_ERR;
5243 /* check altstatus */
5244 status = ata_altstatus(ap);
5245 if (status & ATA_BUSY)
5248 /* check main status, clearing INTRQ */
5249 status = ata_chk_status(ap);
5250 if (unlikely(status & ATA_BUSY))
5253 /* ack bmdma irq events */
5254 ap->ops->irq_clear(ap);
5256 ata_hsm_move(ap, qc, status, 0);
5258 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
5259 qc->tf.protocol == ATA_PROT_ATAPI_DMA))
5260 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
5262 return 1; /* irq handled */
5265 ap->stats.idle_irq++;
5268 if ((ap->stats.idle_irq % 1000) == 0) {
5269 ap->ops->irq_ack(ap, 0); /* debug trap */
5270 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
5274 return 0; /* irq not handled */
5278 * ata_interrupt - Default ATA host interrupt handler
5279 * @irq: irq line (unused)
5280 * @dev_instance: pointer to our ata_host information structure
5282 * Default interrupt handler for PCI IDE devices. Calls
5283 * ata_host_intr() for each port that is not disabled.
5286 * Obtains host lock during operation.
5289 * IRQ_NONE or IRQ_HANDLED.
5292 irqreturn_t ata_interrupt (int irq, void *dev_instance)
5294 struct ata_host *host = dev_instance;
5296 unsigned int handled = 0;
5297 unsigned long flags;
5299 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
5300 spin_lock_irqsave(&host->lock, flags);
5302 for (i = 0; i < host->n_ports; i++) {
5303 struct ata_port *ap;
5305 ap = host->ports[i];
5307 !(ap->flags & ATA_FLAG_DISABLED)) {
5308 struct ata_queued_cmd *qc;
5310 qc = ata_qc_from_tag(ap, ap->active_tag);
5311 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
5312 (qc->flags & ATA_QCFLAG_ACTIVE))
5313 handled |= ata_host_intr(ap, qc);
5317 spin_unlock_irqrestore(&host->lock, flags);
5319 return IRQ_RETVAL(handled);
5323 * sata_scr_valid - test whether SCRs are accessible
5324 * @ap: ATA port to test SCR accessibility for
5326 * Test whether SCRs are accessible for @ap.
5332 * 1 if SCRs are accessible, 0 otherwise.
5334 int sata_scr_valid(struct ata_port *ap)
5336 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
5340 * sata_scr_read - read SCR register of the specified port
5341 * @ap: ATA port to read SCR for
5343 * @val: Place to store read value
5345 * Read SCR register @reg of @ap into *@val. This function is
5346 * guaranteed to succeed if the cable type of the port is SATA
5347 * and the port implements ->scr_read.
5353 * 0 on success, negative errno on failure.
5355 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
5357 if (sata_scr_valid(ap)) {
5358 *val = ap->ops->scr_read(ap, reg);
5365 * sata_scr_write - write SCR register of the specified port
5366 * @ap: ATA port to write SCR for
5367 * @reg: SCR to write
5368 * @val: value to write
5370 * Write @val to SCR register @reg of @ap. This function is
5371 * guaranteed to succeed if the cable type of the port is SATA
5372 * and the port implements ->scr_read.
5378 * 0 on success, negative errno on failure.
5380 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
5382 if (sata_scr_valid(ap)) {
5383 ap->ops->scr_write(ap, reg, val);
5390 * sata_scr_write_flush - write SCR register of the specified port and flush
5391 * @ap: ATA port to write SCR for
5392 * @reg: SCR to write
5393 * @val: value to write
5395 * This function is identical to sata_scr_write() except that this
5396 * function performs flush after writing to the register.
5402 * 0 on success, negative errno on failure.
5404 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
5406 if (sata_scr_valid(ap)) {
5407 ap->ops->scr_write(ap, reg, val);
5408 ap->ops->scr_read(ap, reg);
5415 * ata_port_online - test whether the given port is online
5416 * @ap: ATA port to test
5418 * Test whether @ap is online. Note that this function returns 0
5419 * if online status of @ap cannot be obtained, so
5420 * ata_port_online(ap) != !ata_port_offline(ap).
5426 * 1 if the port online status is available and online.
5428 int ata_port_online(struct ata_port *ap)
5432 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
5438 * ata_port_offline - test whether the given port is offline
5439 * @ap: ATA port to test
5441 * Test whether @ap is offline. Note that this function returns
5442 * 0 if offline status of @ap cannot be obtained, so
5443 * ata_port_online(ap) != !ata_port_offline(ap).
5449 * 1 if the port offline status is available and offline.
5451 int ata_port_offline(struct ata_port *ap)
5455 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
5460 int ata_flush_cache(struct ata_device *dev)
5462 unsigned int err_mask;
5465 if (!ata_try_flush_cache(dev))
5468 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
5469 cmd = ATA_CMD_FLUSH_EXT;
5471 cmd = ATA_CMD_FLUSH;
5473 err_mask = ata_do_simple_cmd(dev, cmd);
5475 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
5483 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
5484 unsigned int action, unsigned int ehi_flags,
5487 unsigned long flags;
5490 for (i = 0; i < host->n_ports; i++) {
5491 struct ata_port *ap = host->ports[i];
5493 /* Previous resume operation might still be in
5494 * progress. Wait for PM_PENDING to clear.
5496 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5497 ata_port_wait_eh(ap);
5498 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5501 /* request PM ops to EH */
5502 spin_lock_irqsave(ap->lock, flags);
5507 ap->pm_result = &rc;
5510 ap->pflags |= ATA_PFLAG_PM_PENDING;
5511 ap->eh_info.action |= action;
5512 ap->eh_info.flags |= ehi_flags;
5514 ata_port_schedule_eh(ap);
5516 spin_unlock_irqrestore(ap->lock, flags);
5518 /* wait and check result */
5520 ata_port_wait_eh(ap);
5521 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5531 * ata_host_suspend - suspend host
5532 * @host: host to suspend
5535 * Suspend @host. Actual operation is performed by EH. This
5536 * function requests EH to perform PM operations and waits for EH
5540 * Kernel thread context (may sleep).
5543 * 0 on success, -errno on failure.
5545 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
5549 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
5553 /* EH is quiescent now. Fail if we have any ready device.
5554 * This happens if hotplug occurs between completion of device
5555 * suspension and here.
5557 for (i = 0; i < host->n_ports; i++) {
5558 struct ata_port *ap = host->ports[i];
5560 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5561 struct ata_device *dev = &ap->device[j];
5563 if (ata_dev_ready(dev)) {
5564 ata_port_printk(ap, KERN_WARNING,
5565 "suspend failed, device %d "
5566 "still active\n", dev->devno);
5573 host->dev->power.power_state = mesg;
5577 ata_host_resume(host);
5582 * ata_host_resume - resume host
5583 * @host: host to resume
5585 * Resume @host. Actual operation is performed by EH. This
5586 * function requests EH to perform PM operations and returns.
5587 * Note that all resume operations are performed parallely.
5590 * Kernel thread context (may sleep).
5592 void ata_host_resume(struct ata_host *host)
5594 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
5595 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5596 host->dev->power.power_state = PMSG_ON;
5601 * ata_port_start - Set port up for dma.
5602 * @ap: Port to initialize
5604 * Called just after data structures for each port are
5605 * initialized. Allocates space for PRD table.
5607 * May be used as the port_start() entry in ata_port_operations.
5610 * Inherited from caller.
5612 int ata_port_start(struct ata_port *ap)
5614 struct device *dev = ap->dev;
5617 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
5622 rc = ata_pad_alloc(ap, dev);
5626 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd,
5627 (unsigned long long)ap->prd_dma);
5632 * ata_dev_init - Initialize an ata_device structure
5633 * @dev: Device structure to initialize
5635 * Initialize @dev in preparation for probing.
5638 * Inherited from caller.
5640 void ata_dev_init(struct ata_device *dev)
5642 struct ata_port *ap = dev->ap;
5643 unsigned long flags;
5645 /* SATA spd limit is bound to the first device */
5646 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5648 /* High bits of dev->flags are used to record warm plug
5649 * requests which occur asynchronously. Synchronize using
5652 spin_lock_irqsave(ap->lock, flags);
5653 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5654 spin_unlock_irqrestore(ap->lock, flags);
5656 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5657 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5658 dev->pio_mask = UINT_MAX;
5659 dev->mwdma_mask = UINT_MAX;
5660 dev->udma_mask = UINT_MAX;
5664 * ata_port_init - Initialize an ata_port structure
5665 * @ap: Structure to initialize
5666 * @host: Collection of hosts to which @ap belongs
5667 * @ent: Probe information provided by low-level driver
5668 * @port_no: Port number associated with this ata_port
5670 * Initialize a new ata_port structure.
5673 * Inherited from caller.
5675 void ata_port_init(struct ata_port *ap, struct ata_host *host,
5676 const struct ata_probe_ent *ent, unsigned int port_no)
5680 ap->lock = &host->lock;
5681 ap->flags = ATA_FLAG_DISABLED;
5682 ap->print_id = ata_print_id++;
5683 ap->ctl = ATA_DEVCTL_OBS;
5686 ap->port_no = port_no;
5687 if (port_no == 1 && ent->pinfo2) {
5688 ap->pio_mask = ent->pinfo2->pio_mask;
5689 ap->mwdma_mask = ent->pinfo2->mwdma_mask;
5690 ap->udma_mask = ent->pinfo2->udma_mask;
5691 ap->flags |= ent->pinfo2->flags;
5692 ap->ops = ent->pinfo2->port_ops;
5694 ap->pio_mask = ent->pio_mask;
5695 ap->mwdma_mask = ent->mwdma_mask;
5696 ap->udma_mask = ent->udma_mask;
5697 ap->flags |= ent->port_flags;
5698 ap->ops = ent->port_ops;
5700 ap->hw_sata_spd_limit = UINT_MAX;
5701 ap->active_tag = ATA_TAG_POISON;
5702 ap->last_ctl = 0xFF;
5704 #if defined(ATA_VERBOSE_DEBUG)
5705 /* turn on all debugging levels */
5706 ap->msg_enable = 0x00FF;
5707 #elif defined(ATA_DEBUG)
5708 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5710 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5713 INIT_DELAYED_WORK(&ap->port_task, NULL);
5714 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
5715 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
5716 INIT_LIST_HEAD(&ap->eh_done_q);
5717 init_waitqueue_head(&ap->eh_wait_q);
5719 /* set cable type */
5720 ap->cbl = ATA_CBL_NONE;
5721 if (ap->flags & ATA_FLAG_SATA)
5722 ap->cbl = ATA_CBL_SATA;
5724 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5725 struct ata_device *dev = &ap->device[i];
5732 ap->stats.unhandled_irq = 1;
5733 ap->stats.idle_irq = 1;
5736 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5740 * ata_port_init_shost - Initialize SCSI host associated with ATA port
5741 * @ap: ATA port to initialize SCSI host for
5742 * @shost: SCSI host associated with @ap
5744 * Initialize SCSI host @shost associated with ATA port @ap.
5747 * Inherited from caller.
5749 static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
5751 ap->scsi_host = shost;
5753 shost->unique_id = ap->print_id;
5756 shost->max_channel = 1;
5757 shost->max_cmd_len = 16;
5761 * ata_port_add - Attach low-level ATA driver to system
5762 * @ent: Information provided by low-level driver
5763 * @host: Collections of ports to which we add
5764 * @port_no: Port number associated with this host
5766 * Attach low-level ATA driver to system.
5769 * PCI/etc. bus probe sem.
5772 * New ata_port on success, for NULL on error.
5774 static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
5775 struct ata_host *host,
5776 unsigned int port_no)
5778 struct Scsi_Host *shost;
5779 struct ata_port *ap;
5783 if (!ent->port_ops->error_handler &&
5784 !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5785 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5790 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5794 shost->transportt = &ata_scsi_transport_template;
5796 ap = ata_shost_to_port(shost);
5798 ata_port_init(ap, host, ent, port_no);
5799 ata_port_init_shost(ap, shost);
5804 static void ata_host_release(struct device *gendev, void *res)
5806 struct ata_host *host = dev_get_drvdata(gendev);
5809 for (i = 0; i < host->n_ports; i++) {
5810 struct ata_port *ap = host->ports[i];
5812 if (ap && ap->ops->port_stop)
5813 ap->ops->port_stop(ap);
5816 if (host->ops->host_stop)
5817 host->ops->host_stop(host);
5819 for (i = 0; i < host->n_ports; i++) {
5820 struct ata_port *ap = host->ports[i];
5823 scsi_host_put(ap->scsi_host);
5825 host->ports[i] = NULL;
5828 dev_set_drvdata(gendev, NULL);
5832 * ata_sas_host_init - Initialize a host struct
5833 * @host: host to initialize
5834 * @dev: device host is attached to
5835 * @flags: host flags
5839 * PCI/etc. bus probe sem.
5843 void ata_host_init(struct ata_host *host, struct device *dev,
5844 unsigned long flags, const struct ata_port_operations *ops)
5846 spin_lock_init(&host->lock);
5848 host->flags = flags;
5853 * ata_device_add - Register hardware device with ATA and SCSI layers
5854 * @ent: Probe information describing hardware device to be registered
5856 * This function processes the information provided in the probe
5857 * information struct @ent, allocates the necessary ATA and SCSI
5858 * host information structures, initializes them, and registers
5859 * everything with requisite kernel subsystems.
5861 * This function requests irqs, probes the ATA bus, and probes
5865 * PCI/etc. bus probe sem.
5868 * Number of ports registered. Zero on error (no ports registered).
5870 int ata_device_add(const struct ata_probe_ent *ent)
5873 struct device *dev = ent->dev;
5874 struct ata_host *host;
5879 if (ent->irq == 0) {
5880 dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n");
5884 if (!devres_open_group(dev, ata_device_add, GFP_KERNEL))
5887 /* alloc a container for our list of ATA ports (buses) */
5888 host = devres_alloc(ata_host_release, sizeof(struct ata_host) +
5889 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5892 devres_add(dev, host);
5893 dev_set_drvdata(dev, host);
5895 ata_host_init(host, dev, ent->_host_flags, ent->port_ops);
5896 host->n_ports = ent->n_ports;
5897 host->irq = ent->irq;
5898 host->irq2 = ent->irq2;
5899 host->iomap = ent->iomap;
5900 host->private_data = ent->private_data;
5902 /* register each port bound to this device */
5903 for (i = 0; i < host->n_ports; i++) {
5904 struct ata_port *ap;
5905 unsigned long xfer_mode_mask;
5906 int irq_line = ent->irq;
5908 ap = ata_port_add(ent, host, i);
5909 host->ports[i] = ap;
5914 if (ent->dummy_port_mask & (1 << i)) {
5915 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5916 ap->ops = &ata_dummy_port_ops;
5921 rc = ap->ops->port_start(ap);
5923 host->ports[i] = NULL;
5924 scsi_host_put(ap->scsi_host);
5928 /* Report the secondary IRQ for second channel legacy */
5929 if (i == 1 && ent->irq2)
5930 irq_line = ent->irq2;
5932 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5933 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5934 (ap->pio_mask << ATA_SHIFT_PIO);
5936 /* print per-port info to dmesg */
5937 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%p "
5938 "ctl 0x%p bmdma 0x%p irq %d\n",
5939 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5940 ata_mode_string(xfer_mode_mask),
5941 ap->ioaddr.cmd_addr,
5942 ap->ioaddr.ctl_addr,
5943 ap->ioaddr.bmdma_addr,
5946 /* freeze port before requesting IRQ */
5947 ata_eh_freeze_port(ap);
5950 /* obtain irq, that may be shared between channels */
5951 rc = devm_request_irq(dev, ent->irq, ent->port_ops->irq_handler,
5952 ent->irq_flags, DRV_NAME, host);
5954 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5959 /* do we have a second IRQ for the other channel, eg legacy mode */
5961 /* We will get weird core code crashes later if this is true
5963 BUG_ON(ent->irq == ent->irq2);
5965 rc = devm_request_irq(dev, ent->irq2,
5966 ent->port_ops->irq_handler, ent->irq_flags,
5969 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5975 /* resource acquisition complete */
5976 devres_remove_group(dev, ata_device_add);
5978 /* perform each probe synchronously */
5979 DPRINTK("probe begin\n");
5980 for (i = 0; i < host->n_ports; i++) {
5981 struct ata_port *ap = host->ports[i];
5985 /* init sata_spd_limit to the current value */
5986 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5987 int spd = (scontrol >> 4) & 0xf;
5988 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5990 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5992 rc = scsi_add_host(ap->scsi_host, dev);
5994 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5995 /* FIXME: do something useful here */
5996 /* FIXME: handle unconditional calls to
5997 * scsi_scan_host and ata_host_remove, below,
6002 if (ap->ops->error_handler) {
6003 struct ata_eh_info *ehi = &ap->eh_info;
6004 unsigned long flags;
6008 /* kick EH for boot probing */
6009 spin_lock_irqsave(ap->lock, flags);
6011 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
6012 ehi->action |= ATA_EH_SOFTRESET;
6013 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
6015 ap->pflags |= ATA_PFLAG_LOADING;
6016 ata_port_schedule_eh(ap);
6018 spin_unlock_irqrestore(ap->lock, flags);
6020 /* wait for EH to finish */
6021 ata_port_wait_eh(ap);
6023 DPRINTK("ata%u: bus probe begin\n", ap->print_id);
6024 rc = ata_bus_probe(ap);
6025 DPRINTK("ata%u: bus probe end\n", ap->print_id);
6028 /* FIXME: do something useful here?
6029 * Current libata behavior will
6030 * tear down everything when
6031 * the module is removed
6032 * or the h/w is unplugged.
6038 /* probes are done, now scan each port's disk(s) */
6039 DPRINTK("host probe begin\n");
6040 for (i = 0; i < host->n_ports; i++) {
6041 struct ata_port *ap = host->ports[i];
6043 ata_scsi_scan_host(ap);
6046 VPRINTK("EXIT, returning %u\n", ent->n_ports);
6047 return ent->n_ports; /* success */
6050 devres_release_group(dev, ata_device_add);
6051 VPRINTK("EXIT, returning %d\n", rc);
6056 * ata_port_detach - Detach ATA port in prepration of device removal
6057 * @ap: ATA port to be detached
6059 * Detach all ATA devices and the associated SCSI devices of @ap;
6060 * then, remove the associated SCSI host. @ap is guaranteed to
6061 * be quiescent on return from this function.
6064 * Kernel thread context (may sleep).
6066 void ata_port_detach(struct ata_port *ap)
6068 unsigned long flags;
6071 if (!ap->ops->error_handler)
6074 /* tell EH we're leaving & flush EH */
6075 spin_lock_irqsave(ap->lock, flags);
6076 ap->pflags |= ATA_PFLAG_UNLOADING;
6077 spin_unlock_irqrestore(ap->lock, flags);
6079 ata_port_wait_eh(ap);
6081 /* EH is now guaranteed to see UNLOADING, so no new device
6082 * will be attached. Disable all existing devices.
6084 spin_lock_irqsave(ap->lock, flags);
6086 for (i = 0; i < ATA_MAX_DEVICES; i++)
6087 ata_dev_disable(&ap->device[i]);
6089 spin_unlock_irqrestore(ap->lock, flags);
6091 /* Final freeze & EH. All in-flight commands are aborted. EH
6092 * will be skipped and retrials will be terminated with bad
6095 spin_lock_irqsave(ap->lock, flags);
6096 ata_port_freeze(ap); /* won't be thawed */
6097 spin_unlock_irqrestore(ap->lock, flags);
6099 ata_port_wait_eh(ap);
6101 /* Flush hotplug task. The sequence is similar to
6102 * ata_port_flush_task().
6104 flush_workqueue(ata_aux_wq);
6105 cancel_delayed_work(&ap->hotplug_task);
6106 flush_workqueue(ata_aux_wq);
6109 /* remove the associated SCSI host */
6110 scsi_remove_host(ap->scsi_host);
6114 * ata_host_detach - Detach all ports of an ATA host
6115 * @host: Host to detach
6117 * Detach all ports of @host.
6120 * Kernel thread context (may sleep).
6122 void ata_host_detach(struct ata_host *host)
6126 for (i = 0; i < host->n_ports; i++)
6127 ata_port_detach(host->ports[i]);
6130 struct ata_probe_ent *
6131 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
6133 struct ata_probe_ent *probe_ent;
6135 probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL);
6137 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
6138 kobject_name(&(dev->kobj)));
6142 INIT_LIST_HEAD(&probe_ent->node);
6143 probe_ent->dev = dev;
6145 probe_ent->sht = port->sht;
6146 probe_ent->port_flags = port->flags;
6147 probe_ent->pio_mask = port->pio_mask;
6148 probe_ent->mwdma_mask = port->mwdma_mask;
6149 probe_ent->udma_mask = port->udma_mask;
6150 probe_ent->port_ops = port->port_ops;
6151 probe_ent->private_data = port->private_data;
6157 * ata_std_ports - initialize ioaddr with standard port offsets.
6158 * @ioaddr: IO address structure to be initialized
6160 * Utility function which initializes data_addr, error_addr,
6161 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
6162 * device_addr, status_addr, and command_addr to standard offsets
6163 * relative to cmd_addr.
6165 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
6168 void ata_std_ports(struct ata_ioports *ioaddr)
6170 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
6171 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
6172 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
6173 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
6174 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
6175 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
6176 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
6177 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
6178 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
6179 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
6186 * ata_pci_remove_one - PCI layer callback for device removal
6187 * @pdev: PCI device that was removed
6189 * PCI layer indicates to libata via this hook that hot-unplug or
6190 * module unload event has occurred. Detach all ports. Resource
6191 * release is handled via devres.
6194 * Inherited from PCI layer (may sleep).
6196 void ata_pci_remove_one(struct pci_dev *pdev)
6198 struct device *dev = pci_dev_to_dev(pdev);
6199 struct ata_host *host = dev_get_drvdata(dev);
6201 ata_host_detach(host);
6204 /* move to PCI subsystem */
6205 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
6207 unsigned long tmp = 0;
6209 switch (bits->width) {
6212 pci_read_config_byte(pdev, bits->reg, &tmp8);
6218 pci_read_config_word(pdev, bits->reg, &tmp16);
6224 pci_read_config_dword(pdev, bits->reg, &tmp32);
6235 return (tmp == bits->val) ? 1 : 0;
6239 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
6241 pci_save_state(pdev);
6242 pci_disable_device(pdev);
6244 if (mesg.event == PM_EVENT_SUSPEND)
6245 pci_set_power_state(pdev, PCI_D3hot);
6248 int ata_pci_device_do_resume(struct pci_dev *pdev)
6252 pci_set_power_state(pdev, PCI_D0);
6253 pci_restore_state(pdev);
6255 rc = pcim_enable_device(pdev);
6257 dev_printk(KERN_ERR, &pdev->dev,
6258 "failed to enable device after resume (%d)\n", rc);
6262 pci_set_master(pdev);
6266 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
6268 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6271 rc = ata_host_suspend(host, mesg);
6275 ata_pci_device_do_suspend(pdev, mesg);
6280 int ata_pci_device_resume(struct pci_dev *pdev)
6282 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6285 rc = ata_pci_device_do_resume(pdev);
6287 ata_host_resume(host);
6290 #endif /* CONFIG_PM */
6292 #endif /* CONFIG_PCI */
6295 static int __init ata_init(void)
6297 ata_probe_timeout *= HZ;
6298 ata_wq = create_workqueue("ata");
6302 ata_aux_wq = create_singlethread_workqueue("ata_aux");
6304 destroy_workqueue(ata_wq);
6308 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6312 static void __exit ata_exit(void)
6314 destroy_workqueue(ata_wq);
6315 destroy_workqueue(ata_aux_wq);
6318 subsys_initcall(ata_init);
6319 module_exit(ata_exit);
6321 static unsigned long ratelimit_time;
6322 static DEFINE_SPINLOCK(ata_ratelimit_lock);
6324 int ata_ratelimit(void)
6327 unsigned long flags;
6329 spin_lock_irqsave(&ata_ratelimit_lock, flags);
6331 if (time_after(jiffies, ratelimit_time)) {
6333 ratelimit_time = jiffies + (HZ/5);
6337 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
6343 * ata_wait_register - wait until register value changes
6344 * @reg: IO-mapped register
6345 * @mask: Mask to apply to read register value
6346 * @val: Wait condition
6347 * @interval_msec: polling interval in milliseconds
6348 * @timeout_msec: timeout in milliseconds
6350 * Waiting for some bits of register to change is a common
6351 * operation for ATA controllers. This function reads 32bit LE
6352 * IO-mapped register @reg and tests for the following condition.
6354 * (*@reg & mask) != val
6356 * If the condition is met, it returns; otherwise, the process is
6357 * repeated after @interval_msec until timeout.
6360 * Kernel thread context (may sleep)
6363 * The final register value.
6365 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6366 unsigned long interval_msec,
6367 unsigned long timeout_msec)
6369 unsigned long timeout;
6372 tmp = ioread32(reg);
6374 /* Calculate timeout _after_ the first read to make sure
6375 * preceding writes reach the controller before starting to
6376 * eat away the timeout.
6378 timeout = jiffies + (timeout_msec * HZ) / 1000;
6380 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
6381 msleep(interval_msec);
6382 tmp = ioread32(reg);
6391 static void ata_dummy_noret(struct ata_port *ap) { }
6392 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
6393 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
6395 static u8 ata_dummy_check_status(struct ata_port *ap)
6400 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
6402 return AC_ERR_SYSTEM;
6405 const struct ata_port_operations ata_dummy_port_ops = {
6406 .port_disable = ata_port_disable,
6407 .check_status = ata_dummy_check_status,
6408 .check_altstatus = ata_dummy_check_status,
6409 .dev_select = ata_noop_dev_select,
6410 .qc_prep = ata_noop_qc_prep,
6411 .qc_issue = ata_dummy_qc_issue,
6412 .freeze = ata_dummy_noret,
6413 .thaw = ata_dummy_noret,
6414 .error_handler = ata_dummy_noret,
6415 .post_internal_cmd = ata_dummy_qc_noret,
6416 .irq_clear = ata_dummy_noret,
6417 .port_start = ata_dummy_ret0,
6418 .port_stop = ata_dummy_noret,
6422 * libata is essentially a library of internal helper functions for
6423 * low-level ATA host controller drivers. As such, the API/ABI is
6424 * likely to change as new drivers are added and updated.
6425 * Do not depend on ABI/API stability.
6428 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6429 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6430 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
6431 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
6432 EXPORT_SYMBOL_GPL(ata_std_bios_param);
6433 EXPORT_SYMBOL_GPL(ata_std_ports);
6434 EXPORT_SYMBOL_GPL(ata_host_init);
6435 EXPORT_SYMBOL_GPL(ata_device_add);
6436 EXPORT_SYMBOL_GPL(ata_host_detach);
6437 EXPORT_SYMBOL_GPL(ata_sg_init);
6438 EXPORT_SYMBOL_GPL(ata_sg_init_one);
6439 EXPORT_SYMBOL_GPL(ata_hsm_move);
6440 EXPORT_SYMBOL_GPL(ata_qc_complete);
6441 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
6442 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
6443 EXPORT_SYMBOL_GPL(ata_tf_load);
6444 EXPORT_SYMBOL_GPL(ata_tf_read);
6445 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6446 EXPORT_SYMBOL_GPL(ata_std_dev_select);
6447 EXPORT_SYMBOL_GPL(sata_print_link_status);
6448 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6449 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6450 EXPORT_SYMBOL_GPL(ata_check_status);
6451 EXPORT_SYMBOL_GPL(ata_altstatus);
6452 EXPORT_SYMBOL_GPL(ata_exec_command);
6453 EXPORT_SYMBOL_GPL(ata_port_start);
6454 EXPORT_SYMBOL_GPL(ata_interrupt);
6455 EXPORT_SYMBOL_GPL(ata_do_set_mode);
6456 EXPORT_SYMBOL_GPL(ata_data_xfer);
6457 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
6458 EXPORT_SYMBOL_GPL(ata_qc_prep);
6459 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
6460 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6461 EXPORT_SYMBOL_GPL(ata_bmdma_start);
6462 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6463 EXPORT_SYMBOL_GPL(ata_bmdma_status);
6464 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6465 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6466 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6467 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6468 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6469 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
6470 EXPORT_SYMBOL_GPL(ata_port_probe);
6471 EXPORT_SYMBOL_GPL(ata_dev_disable);
6472 EXPORT_SYMBOL_GPL(sata_set_spd);
6473 EXPORT_SYMBOL_GPL(sata_phy_debounce);
6474 EXPORT_SYMBOL_GPL(sata_phy_resume);
6475 EXPORT_SYMBOL_GPL(sata_phy_reset);
6476 EXPORT_SYMBOL_GPL(__sata_phy_reset);
6477 EXPORT_SYMBOL_GPL(ata_bus_reset);
6478 EXPORT_SYMBOL_GPL(ata_std_prereset);
6479 EXPORT_SYMBOL_GPL(ata_std_softreset);
6480 EXPORT_SYMBOL_GPL(sata_port_hardreset);
6481 EXPORT_SYMBOL_GPL(sata_std_hardreset);
6482 EXPORT_SYMBOL_GPL(ata_std_postreset);
6483 EXPORT_SYMBOL_GPL(ata_dev_classify);
6484 EXPORT_SYMBOL_GPL(ata_dev_pair);
6485 EXPORT_SYMBOL_GPL(ata_port_disable);
6486 EXPORT_SYMBOL_GPL(ata_ratelimit);
6487 EXPORT_SYMBOL_GPL(ata_wait_register);
6488 EXPORT_SYMBOL_GPL(ata_busy_sleep);
6489 EXPORT_SYMBOL_GPL(ata_port_queue_task);
6490 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6491 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
6492 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
6493 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
6494 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
6495 EXPORT_SYMBOL_GPL(ata_host_intr);
6496 EXPORT_SYMBOL_GPL(sata_scr_valid);
6497 EXPORT_SYMBOL_GPL(sata_scr_read);
6498 EXPORT_SYMBOL_GPL(sata_scr_write);
6499 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6500 EXPORT_SYMBOL_GPL(ata_port_online);
6501 EXPORT_SYMBOL_GPL(ata_port_offline);
6503 EXPORT_SYMBOL_GPL(ata_host_suspend);
6504 EXPORT_SYMBOL_GPL(ata_host_resume);
6505 #endif /* CONFIG_PM */
6506 EXPORT_SYMBOL_GPL(ata_id_string);
6507 EXPORT_SYMBOL_GPL(ata_id_c_string);
6508 EXPORT_SYMBOL_GPL(ata_id_to_dma_mode);
6509 EXPORT_SYMBOL_GPL(ata_device_blacklisted);
6510 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6512 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6513 EXPORT_SYMBOL_GPL(ata_timing_compute);
6514 EXPORT_SYMBOL_GPL(ata_timing_merge);
6517 EXPORT_SYMBOL_GPL(pci_test_config_bits);
6518 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6519 EXPORT_SYMBOL_GPL(ata_pci_init_one);
6520 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6522 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6523 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6524 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6525 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6526 #endif /* CONFIG_PM */
6527 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6528 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6529 #endif /* CONFIG_PCI */
6532 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6533 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
6534 #endif /* CONFIG_PM */
6536 EXPORT_SYMBOL_GPL(ata_eng_timeout);
6537 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6538 EXPORT_SYMBOL_GPL(ata_port_abort);
6539 EXPORT_SYMBOL_GPL(ata_port_freeze);
6540 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6541 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6542 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6543 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6544 EXPORT_SYMBOL_GPL(ata_do_eh);
6545 EXPORT_SYMBOL_GPL(ata_irq_on);
6546 EXPORT_SYMBOL_GPL(ata_dummy_irq_on);
6547 EXPORT_SYMBOL_GPL(ata_irq_ack);
6548 EXPORT_SYMBOL_GPL(ata_dummy_irq_ack);
6549 EXPORT_SYMBOL_GPL(ata_dev_try_classify);
6551 EXPORT_SYMBOL_GPL(ata_cable_40wire);
6552 EXPORT_SYMBOL_GPL(ata_cable_80wire);
6553 EXPORT_SYMBOL_GPL(ata_cable_unknown);
6554 EXPORT_SYMBOL_GPL(ata_cable_sata);