drivers/block/nvme-core.c

   1 /*
   2  * NVM Express device driver
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #include <linux/nvme.h>
  16 #include <linux/bio.h>
  17 #include <linux/bitops.h>
  18 #include <linux/blkdev.h>
  19 #include <linux/cpu.h>
  20 #include <linux/delay.h>
  21 #include <linux/errno.h>
  22 #include <linux/fs.h>
  23 #include <linux/genhd.h>
  24 #include <linux/hdreg.h>
  25 #include <linux/idr.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/io.h>
  29 #include <linux/kdev_t.h>
  30 #include <linux/kthread.h>
  31 #include <linux/kernel.h>
  32 #include <linux/mm.h>
  33 #include <linux/module.h>
  34 #include <linux/moduleparam.h>
  35 #include <linux/pci.h>
  36 #include <linux/percpu.h>
  37 #include <linux/poison.h>
  38 #include <linux/ptrace.h>
  39 #include <linux/sched.h>
  40 #include <linux/slab.h>
  41 #include <linux/types.h>
  42 #include <scsi/sg.h>
  43 #include <asm-generic/io-64-nonatomic-lo-hi.h>
  44
  45 #include <trace/events/block.h>
  46
  47 #define NVME_Q_DEPTH            1024
  48 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
  49 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
  50 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
  51 #define IOD_TIMEOUT             (retry_time * HZ)
  52
  53 static unsigned char admin_timeout = 60;
  54 module_param(admin_timeout, byte, 0644);
  55 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  56
  57 unsigned char io_timeout = 30;
  58 module_param(io_timeout, byte, 0644);
  59 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  60
  61 static unsigned char retry_time = 30;
  62 module_param(retry_time, byte, 0644);
  63 MODULE_PARM_DESC(retry_time, "time in seconds to retry failed I/O");
  64
  65 static int nvme_major;
  66 module_param(nvme_major, int, 0);
  67
  68 static int use_threaded_interrupts;
  69 module_param(use_threaded_interrupts, int, 0);
  70
  71 static DEFINE_SPINLOCK(dev_list_lock);
  72 static LIST_HEAD(dev_list);
  73 static struct task_struct *nvme_thread;
  74 static struct workqueue_struct *nvme_workq;
  75 static wait_queue_head_t nvme_kthread_wait;
  76
  77 static void nvme_reset_failed_dev(struct work_struct *ws);
  78
  79 struct async_cmd_info {
  80         struct kthread_work work;
  81         struct kthread_worker *worker;
  82         u32 result;
  83         int status;
  84         void *ctx;
  85 };
  86
  87 /*
  88  * An NVM Express queue.  Each device has at least two (one for admin
  89  * commands and one for I/O commands).
  90  */
  91 struct nvme_queue {
  92         struct rcu_head r_head;
  93         struct device *q_dmadev;
  94         struct nvme_dev *dev;
  95         char irqname[24];       /* nvme4294967295-65535\0 */
  96         spinlock_t q_lock;
  97         struct nvme_command *sq_cmds;
  98         volatile struct nvme_completion *cqes;
  99         dma_addr_t sq_dma_addr;
 100         dma_addr_t cq_dma_addr;
 101         wait_queue_head_t sq_full;
 102         wait_queue_t sq_cong_wait;
 103         struct bio_list sq_cong;
 104         struct list_head iod_bio;
 105         u32 __iomem *q_db;
 106         u16 q_depth;
 107         u16 cq_vector;
 108         u16 sq_head;
 109         u16 sq_tail;
 110         u16 cq_head;
 111         u16 qid;
 112         u8 cq_phase;
 113         u8 cqe_seen;
 114         u8 q_suspended;
 115         cpumask_var_t cpu_mask;
 116         struct async_cmd_info cmdinfo;
 117         unsigned long cmdid_data[];
 118 };
 119
 120 /*
 121  * Check we didin't inadvertently grow the command struct
 122  */
 123 static inline void _nvme_check_size(void)
 124 {
 125         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
 126         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
 127         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
 128         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
 129         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
 130         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
 131         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
 132         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
 133         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
 134         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
 135         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
 136         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
 137 }
 138
 139 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
 140                                                 struct nvme_completion *);
 141
 142 struct nvme_cmd_info {
 143         nvme_completion_fn fn;
 144         void *ctx;
 145         unsigned long timeout;
 146         int aborted;
 147 };
 148
 149 static struct nvme_cmd_info *nvme_cmd_info(struct nvme_queue *nvmeq)
 150 {
 151         return (void *)&nvmeq->cmdid_data[BITS_TO_LONGS(nvmeq->q_depth)];
 152 }
 153
 154 static unsigned nvme_queue_extra(int depth)
 155 {
 156         return DIV_ROUND_UP(depth, 8) + (depth * sizeof(struct nvme_cmd_info));
 157 }
 158
 159 /**
 160  * alloc_cmdid() - Allocate a Command ID
 161  * @nvmeq: The queue that will be used for this command
 162  * @ctx: A pointer that will be passed to the handler
 163  * @handler: The function to call on completion
 164  *
 165  * Allocate a Command ID for a queue.  The data passed in will
 166  * be passed to the completion handler.  This is implemented by using
 167  * the bottom two bits of the ctx pointer to store the handler ID.
 168  * Passing in a pointer that's not 4-byte aligned will cause a BUG.
 169  * We can change this if it becomes a problem.
 170  *
 171  * May be called with local interrupts disabled and the q_lock held,
 172  * or with interrupts enabled and no locks held.
 173  */
 174 static int alloc_cmdid(struct nvme_queue *nvmeq, void *ctx,
 175                                 nvme_completion_fn handler, unsigned timeout)
 176 {
 177         int depth = nvmeq->q_depth - 1;
 178         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
 179         int cmdid;
 180
 181         do {
 182                 cmdid = find_first_zero_bit(nvmeq->cmdid_data, depth);
 183                 if (cmdid >= depth)
 184                         return -EBUSY;
 185         } while (test_and_set_bit(cmdid, nvmeq->cmdid_data));
 186
 187         info[cmdid].fn = handler;
 188         info[cmdid].ctx = ctx;
 189         info[cmdid].timeout = jiffies + timeout;
 190         info[cmdid].aborted = 0;
 191         return cmdid;
 192 }
 193
 194 static int alloc_cmdid_killable(struct nvme_queue *nvmeq, void *ctx,
 195                                 nvme_completion_fn handler, unsigned timeout)
 196 {
 197         int cmdid;
 198         wait_event_killable(nvmeq->sq_full,
 199                 (cmdid = alloc_cmdid(nvmeq, ctx, handler, timeout)) >= 0);
 200         return (cmdid < 0) ? -EINTR : cmdid;
 201 }
 202
 203 /* Special values must be less than 0x1000 */
 204 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
 205 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
 206 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
 207 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
 208 #define CMD_CTX_ABORT           (0x318 + CMD_CTX_BASE)
 209
 210 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
 211                                                 struct nvme_completion *cqe)
 212 {
 213         if (ctx == CMD_CTX_CANCELLED)
 214                 return;
 215         if (ctx == CMD_CTX_ABORT) {
 216                 ++nvmeq->dev->abort_limit;
 217                 return;
 218         }
 219         if (ctx == CMD_CTX_COMPLETED) {
 220                 dev_warn(nvmeq->q_dmadev,
 221                                 "completed id %d twice on queue %d\n",
 222                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 223                 return;
 224         }
 225         if (ctx == CMD_CTX_INVALID) {
 226                 dev_warn(nvmeq->q_dmadev,
 227                                 "invalid id %d completed on queue %d\n",
 228                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 229                 return;
 230         }
 231
 232         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
 233 }
 234
 235 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
 236                                                 struct nvme_completion *cqe)
 237 {
 238         struct async_cmd_info *cmdinfo = ctx;
 239         cmdinfo->result = le32_to_cpup(&cqe->result);
 240         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
 241         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
 242 }
 243
 244 /*
 245  * Called with local interrupts disabled and the q_lock held.  May not sleep.
 246  */
 247 static void *free_cmdid(struct nvme_queue *nvmeq, int cmdid,
 248                                                 nvme_completion_fn *fn)
 249 {
 250         void *ctx;
 251         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
 252
 253         if (cmdid >= nvmeq->q_depth || !info[cmdid].fn) {
 254                 if (fn)
 255                         *fn = special_completion;
 256                 return CMD_CTX_INVALID;
 257         }
 258         if (fn)
 259                 *fn = info[cmdid].fn;
 260         ctx = info[cmdid].ctx;
 261         info[cmdid].fn = special_completion;
 262         info[cmdid].ctx = CMD_CTX_COMPLETED;
 263         clear_bit(cmdid, nvmeq->cmdid_data);
 264         wake_up(&nvmeq->sq_full);
 265         return ctx;
 266 }
 267
 268 static void *cancel_cmdid(struct nvme_queue *nvmeq, int cmdid,
 269                                                 nvme_completion_fn *fn)
 270 {
 271         void *ctx;
 272         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
 273         if (fn)
 274                 *fn = info[cmdid].fn;
 275         ctx = info[cmdid].ctx;
 276         info[cmdid].fn = special_completion;
 277         info[cmdid].ctx = CMD_CTX_CANCELLED;
 278         return ctx;
 279 }
 280
 281 static struct nvme_queue *raw_nvmeq(struct nvme_dev *dev, int qid)
 282 {
 283         return rcu_dereference_raw(dev->queues[qid]);
 284 }
 285
 286 static struct nvme_queue *get_nvmeq(struct nvme_dev *dev) __acquires(RCU)
 287 {
 288         struct nvme_queue *nvmeq;
 289         unsigned queue_id = get_cpu_var(*dev->io_queue);
 290
 291         rcu_read_lock();
 292         nvmeq = rcu_dereference(dev->queues[queue_id]);
 293         if (nvmeq)
 294                 return nvmeq;
 295
 296         rcu_read_unlock();
 297         put_cpu_var(*dev->io_queue);
 298         return NULL;
 299 }
 300
 301 static void put_nvmeq(struct nvme_queue *nvmeq) __releases(RCU)
 302 {
 303         rcu_read_unlock();
 304         put_cpu_var(nvmeq->dev->io_queue);
 305 }
 306
 307 static struct nvme_queue *lock_nvmeq(struct nvme_dev *dev, int q_idx)
 308                                                         __acquires(RCU)
 309 {
 310         struct nvme_queue *nvmeq;
 311
 312         rcu_read_lock();
 313         nvmeq = rcu_dereference(dev->queues[q_idx]);
 314         if (nvmeq)
 315                 return nvmeq;
 316
 317         rcu_read_unlock();
 318         return NULL;
 319 }
 320
 321 static void unlock_nvmeq(struct nvme_queue *nvmeq) __releases(RCU)
 322 {
 323         rcu_read_unlock();
 324 }
 325
 326 /**
 327  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
 328  * @nvmeq: The queue to use
 329  * @cmd: The command to send
 330  *
 331  * Safe to use from interrupt context
 332  */
 333 static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 334 {
 335         unsigned long flags;
 336         u16 tail;
 337         spin_lock_irqsave(&nvmeq->q_lock, flags);
 338         if (nvmeq->q_suspended) {
 339                 spin_unlock_irqrestore(&nvmeq->q_lock, flags);
 340                 return -EBUSY;
 341         }
 342         tail = nvmeq->sq_tail;
 343         memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
 344         if (++tail == nvmeq->q_depth)
 345                 tail = 0;
 346         writel(tail, nvmeq->q_db);
 347         nvmeq->sq_tail = tail;
 348         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
 349
 350         return 0;
 351 }
 352
 353 static __le64 **iod_list(struct nvme_iod *iod)
 354 {
 355         return ((void *)iod) + iod->offset;
 356 }
 357
 358 /*
 359  * Will slightly overestimate the number of pages needed.  This is OK
 360  * as it only leads to a small amount of wasted memory for the lifetime of
 361  * the I/O.
 362  */
 363 static int nvme_npages(unsigned size)
 364 {
 365         unsigned nprps = DIV_ROUND_UP(size + PAGE_SIZE, PAGE_SIZE);
 366         return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
 367 }
 368
 369 static struct nvme_iod *
 370 nvme_alloc_iod(unsigned nseg, unsigned nbytes, gfp_t gfp)
 371 {
 372         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
 373                                 sizeof(__le64 *) * nvme_npages(nbytes) +
 374                                 sizeof(struct scatterlist) * nseg, gfp);
 375
 376         if (iod) {
 377                 iod->offset = offsetof(struct nvme_iod, sg[nseg]);
 378                 iod->npages = -1;
 379                 iod->length = nbytes;
 380                 iod->nents = 0;
 381                 iod->first_dma = 0ULL;
 382                 iod->start_time = jiffies;
 383         }
 384
 385         return iod;
 386 }
 387
 388 void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
 389 {
 390         const int last_prp = PAGE_SIZE / 8 - 1;
 391         int i;
 392         __le64 **list = iod_list(iod);
 393         dma_addr_t prp_dma = iod->first_dma;
 394
 395         if (iod->npages == 0)
 396                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
 397         for (i = 0; i < iod->npages; i++) {
 398                 __le64 *prp_list = list[i];
 399                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
 400                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
 401                 prp_dma = next_prp_dma;
 402         }
 403         kfree(iod);
 404 }
 405
 406 static void nvme_start_io_acct(struct bio *bio)
 407 {
 408         struct gendisk *disk = bio->bi_bdev->bd_disk;
 409         const int rw = bio_data_dir(bio);
 410         int cpu = part_stat_lock();
 411         part_round_stats(cpu, &disk->part0);
 412         part_stat_inc(cpu, &disk->part0, ios[rw]);
 413         part_stat_add(cpu, &disk->part0, sectors[rw], bio_sectors(bio));
 414         part_inc_in_flight(&disk->part0, rw);
 415         part_stat_unlock();
 416 }
 417
 418 static void nvme_end_io_acct(struct bio *bio, unsigned long start_time)
 419 {
 420         struct gendisk *disk = bio->bi_bdev->bd_disk;
 421         const int rw = bio_data_dir(bio);
 422         unsigned long duration = jiffies - start_time;
 423         int cpu = part_stat_lock();
 424         part_stat_add(cpu, &disk->part0, ticks[rw], duration);
 425         part_round_stats(cpu, &disk->part0);
 426         part_dec_in_flight(&disk->part0, rw);
 427         part_stat_unlock();
 428 }
 429
 430 static void bio_completion(struct nvme_queue *nvmeq, void *ctx,
 431                                                 struct nvme_completion *cqe)
 432 {
 433         struct nvme_iod *iod = ctx;
 434         struct bio *bio = iod->private;
 435         u16 status = le16_to_cpup(&cqe->status) >> 1;
 436         int error = 0;
 437
 438         if (unlikely(status)) {
 439                 if (!(status & NVME_SC_DNR ||
 440                                 bio->bi_rw & REQ_FAILFAST_MASK) &&
 441                                 (jiffies - iod->start_time) < IOD_TIMEOUT) {
 442                         if (!waitqueue_active(&nvmeq->sq_full))
 443                                 add_wait_queue(&nvmeq->sq_full,
 444                                                         &nvmeq->sq_cong_wait);
 445                         list_add_tail(&iod->node, &nvmeq->iod_bio);
 446                         wake_up(&nvmeq->sq_full);
 447                         return;
 448                 }
 449                 error = -EIO;
 450         }
 451         if (iod->nents) {
 452                 dma_unmap_sg(nvmeq->q_dmadev, iod->sg, iod->nents,
 453                         bio_data_dir(bio) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 454                 nvme_end_io_acct(bio, iod->start_time);
 455         }
 456         nvme_free_iod(nvmeq->dev, iod);
 457
 458         trace_block_bio_complete(bdev_get_queue(bio->bi_bdev), bio, error);
 459         bio_endio(bio, error);
 460 }
 461
 462 /* length is in bytes.  gfp flags indicates whether we may sleep. */
 463 int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod, int total_len,
 464                                                                 gfp_t gfp)
 465 {
 466         struct dma_pool *pool;
 467         int length = total_len;
 468         struct scatterlist *sg = iod->sg;
 469         int dma_len = sg_dma_len(sg);
 470         u64 dma_addr = sg_dma_address(sg);
 471         int offset = offset_in_page(dma_addr);
 472         __le64 *prp_list;
 473         __le64 **list = iod_list(iod);
 474         dma_addr_t prp_dma;
 475         int nprps, i;
 476
 477         length -= (PAGE_SIZE - offset);
 478         if (length <= 0)
 479                 return total_len;
 480
 481         dma_len -= (PAGE_SIZE - offset);
 482         if (dma_len) {
 483                 dma_addr += (PAGE_SIZE - offset);
 484         } else {
 485                 sg = sg_next(sg);
 486                 dma_addr = sg_dma_address(sg);
 487                 dma_len = sg_dma_len(sg);
 488         }
 489
 490         if (length <= PAGE_SIZE) {
 491                 iod->first_dma = dma_addr;
 492                 return total_len;
 493         }
 494
 495         nprps = DIV_ROUND_UP(length, PAGE_SIZE);
 496         if (nprps <= (256 / 8)) {
 497                 pool = dev->prp_small_pool;
 498                 iod->npages = 0;
 499         } else {
 500                 pool = dev->prp_page_pool;
 501                 iod->npages = 1;
 502         }
 503
 504         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 505         if (!prp_list) {
 506                 iod->first_dma = dma_addr;
 507                 iod->npages = -1;
 508                 return (total_len - length) + PAGE_SIZE;
 509         }
 510         list[0] = prp_list;
 511         iod->first_dma = prp_dma;
 512         i = 0;
 513         for (;;) {
 514                 if (i == PAGE_SIZE / 8) {
 515                         __le64 *old_prp_list = prp_list;
 516                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 517                         if (!prp_list)
 518                                 return total_len - length;
 519                         list[iod->npages++] = prp_list;
 520                         prp_list[0] = old_prp_list[i - 1];
 521                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
 522                         i = 1;
 523                 }
 524                 prp_list[i++] = cpu_to_le64(dma_addr);
 525                 dma_len -= PAGE_SIZE;
 526                 dma_addr += PAGE_SIZE;
 527                 length -= PAGE_SIZE;
 528                 if (length <= 0)
 529                         break;
 530                 if (dma_len > 0)
 531                         continue;
 532                 BUG_ON(dma_len < 0);
 533                 sg = sg_next(sg);
 534                 dma_addr = sg_dma_address(sg);
 535                 dma_len = sg_dma_len(sg);
 536         }
 537
 538         return total_len;
 539 }
 540
 541 static int nvme_split_and_submit(struct bio *bio, struct nvme_queue *nvmeq,
 542                                  int len)
 543 {
 544         struct bio *split = bio_split(bio, len >> 9, GFP_ATOMIC, NULL);
 545         if (!split)
 546                 return -ENOMEM;
 547
 548         trace_block_split(bdev_get_queue(bio->bi_bdev), bio,
 549                                         split->bi_iter.bi_sector);
 550         bio_chain(split, bio);
 551
 552         if (!waitqueue_active(&nvmeq->sq_full))
 553                 add_wait_queue(&nvmeq->sq_full, &nvmeq->sq_cong_wait);
 554         bio_list_add(&nvmeq->sq_cong, split);
 555         bio_list_add(&nvmeq->sq_cong, bio);
 556         wake_up(&nvmeq->sq_full);
 557
 558         return 0;
 559 }
 560
 561 /* NVMe scatterlists require no holes in the virtual address */
 562 #define BIOVEC_NOT_VIRT_MERGEABLE(vec1, vec2)   ((vec2)->bv_offset || \
 563                         (((vec1)->bv_offset + (vec1)->bv_len) % PAGE_SIZE))
 564
 565 static int nvme_map_bio(struct nvme_queue *nvmeq, struct nvme_iod *iod,
 566                 struct bio *bio, enum dma_data_direction dma_dir, int psegs)
 567 {
 568         struct bio_vec bvec, bvprv;
 569         struct bvec_iter iter;
 570         struct scatterlist *sg = NULL;
 571         int length = 0, nsegs = 0, split_len = bio->bi_iter.bi_size;
 572         int first = 1;
 573
 574         if (nvmeq->dev->stripe_size)
 575                 split_len = nvmeq->dev->stripe_size -
 576                         ((bio->bi_iter.bi_sector << 9) &
 577                          (nvmeq->dev->stripe_size - 1));
 578
 579         sg_init_table(iod->sg, psegs);
 580         bio_for_each_segment(bvec, bio, iter) {
 581                 if (!first && BIOVEC_PHYS_MERGEABLE(&bvprv, &bvec)) {
 582                         sg->length += bvec.bv_len;
 583                 } else {
 584                         if (!first && BIOVEC_NOT_VIRT_MERGEABLE(&bvprv, &bvec))
 585                                 return nvme_split_and_submit(bio, nvmeq,
 586                                                              length);
 587
 588                         sg = sg ? sg + 1 : iod->sg;
 589                         sg_set_page(sg, bvec.bv_page,
 590                                     bvec.bv_len, bvec.bv_offset);
 591                         nsegs++;
 592                 }
 593
 594                 if (split_len - length < bvec.bv_len)
 595                         return nvme_split_and_submit(bio, nvmeq, split_len);
 596                 length += bvec.bv_len;
 597                 bvprv = bvec;
 598                 first = 0;
 599         }
 600         iod->nents = nsegs;
 601         sg_mark_end(sg);
 602         if (dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir) == 0)
 603                 return -ENOMEM;
 604
 605         BUG_ON(length != bio->bi_iter.bi_size);
 606         return length;
 607 }
 608
 609 static int nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 610                 struct bio *bio, struct nvme_iod *iod, int cmdid)
 611 {
 612         struct nvme_dsm_range *range =
 613                                 (struct nvme_dsm_range *)iod_list(iod)[0];
 614         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 615
 616         range->cattr = cpu_to_le32(0);
 617         range->nlb = cpu_to_le32(bio->bi_iter.bi_size >> ns->lba_shift);
 618         range->slba = cpu_to_le64(nvme_block_nr(ns, bio->bi_iter.bi_sector));
 619
 620         memset(cmnd, 0, sizeof(*cmnd));
 621         cmnd->dsm.opcode = nvme_cmd_dsm;
 622         cmnd->dsm.command_id = cmdid;
 623         cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
 624         cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
 625         cmnd->dsm.nr = 0;
 626         cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
 627
 628         if (++nvmeq->sq_tail == nvmeq->q_depth)
 629                 nvmeq->sq_tail = 0;
 630         writel(nvmeq->sq_tail, nvmeq->q_db);
 631
 632         return 0;
 633 }
 634
 635 static int nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 636                                                                 int cmdid)
 637 {
 638         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 639
 640         memset(cmnd, 0, sizeof(*cmnd));
 641         cmnd->common.opcode = nvme_cmd_flush;
 642         cmnd->common.command_id = cmdid;
 643         cmnd->common.nsid = cpu_to_le32(ns->ns_id);
 644
 645         if (++nvmeq->sq_tail == nvmeq->q_depth)
 646                 nvmeq->sq_tail = 0;
 647         writel(nvmeq->sq_tail, nvmeq->q_db);
 648
 649         return 0;
 650 }
 651
 652 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod)
 653 {
 654         struct bio *bio = iod->private;
 655         struct nvme_ns *ns = bio->bi_bdev->bd_disk->private_data;
 656         struct nvme_command *cmnd;
 657         int cmdid;
 658         u16 control;
 659         u32 dsmgmt;
 660
 661         cmdid = alloc_cmdid(nvmeq, iod, bio_completion, NVME_IO_TIMEOUT);
 662         if (unlikely(cmdid < 0))
 663                 return cmdid;
 664
 665         if (bio->bi_rw & REQ_DISCARD)
 666                 return nvme_submit_discard(nvmeq, ns, bio, iod, cmdid);
 667         if (bio->bi_rw & REQ_FLUSH)
 668                 return nvme_submit_flush(nvmeq, ns, cmdid);
 669
 670         control = 0;
 671         if (bio->bi_rw & REQ_FUA)
 672                 control |= NVME_RW_FUA;
 673         if (bio->bi_rw & (REQ_FAILFAST_DEV | REQ_RAHEAD))
 674                 control |= NVME_RW_LR;
 675
 676         dsmgmt = 0;
 677         if (bio->bi_rw & REQ_RAHEAD)
 678                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
 679
 680         cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 681         memset(cmnd, 0, sizeof(*cmnd));
 682
 683         cmnd->rw.opcode = bio_data_dir(bio) ? nvme_cmd_write : nvme_cmd_read;
 684         cmnd->rw.command_id = cmdid;
 685         cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
 686         cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 687         cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
 688         cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, bio->bi_iter.bi_sector));
 689         cmnd->rw.length =
 690                 cpu_to_le16((bio->bi_iter.bi_size >> ns->lba_shift) - 1);
 691         cmnd->rw.control = cpu_to_le16(control);
 692         cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
 693
 694         if (++nvmeq->sq_tail == nvmeq->q_depth)
 695                 nvmeq->sq_tail = 0;
 696         writel(nvmeq->sq_tail, nvmeq->q_db);
 697
 698         return 0;
 699 }
 700
 701 static int nvme_split_flush_data(struct nvme_queue *nvmeq, struct bio *bio)
 702 {
 703         struct bio *split = bio_clone(bio, GFP_ATOMIC);
 704         if (!split)
 705                 return -ENOMEM;
 706
 707         split->bi_iter.bi_size = 0;
 708         split->bi_phys_segments = 0;
 709         bio->bi_rw &= ~REQ_FLUSH;
 710         bio_chain(split, bio);
 711
 712         if (!waitqueue_active(&nvmeq->sq_full))
 713                 add_wait_queue(&nvmeq->sq_full, &nvmeq->sq_cong_wait);
 714         bio_list_add(&nvmeq->sq_cong, split);
 715         bio_list_add(&nvmeq->sq_cong, bio);
 716         wake_up_process(nvme_thread);
 717
 718         return 0;
 719 }
 720
 721 /*
 722  * Called with local interrupts disabled and the q_lock held.  May not sleep.
 723  */
 724 static int nvme_submit_bio_queue(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 725                                                                 struct bio *bio)
 726 {
 727         struct nvme_iod *iod;
 728         int psegs = bio_phys_segments(ns->queue, bio);
 729         int result;
 730
 731         if ((bio->bi_rw & REQ_FLUSH) && psegs)
 732                 return nvme_split_flush_data(nvmeq, bio);
 733
 734         iod = nvme_alloc_iod(psegs, bio->bi_iter.bi_size, GFP_ATOMIC);
 735         if (!iod)
 736                 return -ENOMEM;
 737
 738         iod->private = bio;
 739         if (bio->bi_rw & REQ_DISCARD) {
 740                 void *range;
 741                 /*
 742                  * We reuse the small pool to allocate the 16-byte range here
 743                  * as it is not worth having a special pool for these or
 744                  * additional cases to handle freeing the iod.
 745                  */
 746                 range = dma_pool_alloc(nvmeq->dev->prp_small_pool,
 747                                                 GFP_ATOMIC,
 748                                                 &iod->first_dma);
 749                 if (!range) {
 750                         result = -ENOMEM;
 751                         goto free_iod;
 752                 }
 753                 iod_list(iod)[0] = (__le64 *)range;
 754                 iod->npages = 0;
 755         } else if (psegs) {
 756                 result = nvme_map_bio(nvmeq, iod, bio,
 757                         bio_data_dir(bio) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
 758                         psegs);
 759                 if (result <= 0)
 760                         goto free_iod;
 761                 if (nvme_setup_prps(nvmeq->dev, iod, result, GFP_ATOMIC) !=
 762                                                                 result) {
 763                         result = -ENOMEM;
 764                         goto free_iod;
 765                 }
 766                 nvme_start_io_acct(bio);
 767         }
 768         if (unlikely(nvme_submit_iod(nvmeq, iod))) {
 769                 if (!waitqueue_active(&nvmeq->sq_full))
 770                         add_wait_queue(&nvmeq->sq_full, &nvmeq->sq_cong_wait);
 771                 list_add_tail(&iod->node, &nvmeq->iod_bio);
 772         }
 773         return 0;
 774
 775  free_iod:
 776         nvme_free_iod(nvmeq->dev, iod);
 777         return result;
 778 }
 779
 780 static int nvme_process_cq(struct nvme_queue *nvmeq)
 781 {
 782         u16 head, phase;
 783
 784         head = nvmeq->cq_head;
 785         phase = nvmeq->cq_phase;
 786
 787         for (;;) {
 788                 void *ctx;
 789                 nvme_completion_fn fn;
 790                 struct nvme_completion cqe = nvmeq->cqes[head];
 791                 if ((le16_to_cpu(cqe.status) & 1) != phase)
 792                         break;
 793                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
 794                 if (++head == nvmeq->q_depth) {
 795                         head = 0;
 796                         phase = !phase;
 797                 }
 798
 799                 ctx = free_cmdid(nvmeq, cqe.command_id, &fn);
 800                 fn(nvmeq, ctx, &cqe);
 801         }
 802
 803         /* If the controller ignores the cq head doorbell and continuously
 804          * writes to the queue, it is theoretically possible to wrap around
 805          * the queue twice and mistakenly return IRQ_NONE.  Linux only
 806          * requires that 0.1% of your interrupts are handled, so this isn't
 807          * a big problem.
 808          */
 809         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
 810                 return 0;
 811
 812         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
 813         nvmeq->cq_head = head;
 814         nvmeq->cq_phase = phase;
 815
 816         nvmeq->cqe_seen = 1;
 817         return 1;
 818 }
 819
 820 static void nvme_make_request(struct request_queue *q, struct bio *bio)
 821 {
 822         struct nvme_ns *ns = q->queuedata;
 823         struct nvme_queue *nvmeq = get_nvmeq(ns->dev);
 824         int result = -EBUSY;
 825
 826         if (!nvmeq) {
 827                 bio_endio(bio, -EIO);
 828                 return;
 829         }
 830
 831         spin_lock_irq(&nvmeq->q_lock);
 832         if (!nvmeq->q_suspended && bio_list_empty(&nvmeq->sq_cong))
 833                 result = nvme_submit_bio_queue(nvmeq, ns, bio);
 834         if (unlikely(result)) {
 835                 if (!waitqueue_active(&nvmeq->sq_full))
 836                         add_wait_queue(&nvmeq->sq_full, &nvmeq->sq_cong_wait);
 837                 bio_list_add(&nvmeq->sq_cong, bio);
 838         }
 839
 840         nvme_process_cq(nvmeq);
 841         spin_unlock_irq(&nvmeq->q_lock);
 842         put_nvmeq(nvmeq);
 843 }
 844
 845 static irqreturn_t nvme_irq(int irq, void *data)
 846 {
 847         irqreturn_t result;
 848         struct nvme_queue *nvmeq = data;
 849         spin_lock(&nvmeq->q_lock);
 850         nvme_process_cq(nvmeq);
 851         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
 852         nvmeq->cqe_seen = 0;
 853         spin_unlock(&nvmeq->q_lock);
 854         return result;
 855 }
 856
 857 static irqreturn_t nvme_irq_check(int irq, void *data)
 858 {
 859         struct nvme_queue *nvmeq = data;
 860         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
 861         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
 862                 return IRQ_NONE;
 863         return IRQ_WAKE_THREAD;
 864 }
 865
 866 static void nvme_abort_command(struct nvme_queue *nvmeq, int cmdid)
 867 {
 868         spin_lock_irq(&nvmeq->q_lock);
 869         cancel_cmdid(nvmeq, cmdid, NULL);
 870         spin_unlock_irq(&nvmeq->q_lock);
 871 }
 872
 873 struct sync_cmd_info {
 874         struct task_struct *task;
 875         u32 result;
 876         int status;
 877 };
 878
 879 static void sync_completion(struct nvme_queue *nvmeq, void *ctx,
 880                                                 struct nvme_completion *cqe)
 881 {
 882         struct sync_cmd_info *cmdinfo = ctx;
 883         cmdinfo->result = le32_to_cpup(&cqe->result);
 884         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
 885         wake_up_process(cmdinfo->task);
 886 }
 887
 888 /*
 889  * Returns 0 on success.  If the result is negative, it's a Linux error code;
 890  * if the result is positive, it's an NVM Express status code
 891  */
 892 static int nvme_submit_sync_cmd(struct nvme_dev *dev, int q_idx,
 893                                                 struct nvme_command *cmd,
 894                                                 u32 *result, unsigned timeout)
 895 {
 896         int cmdid, ret;
 897         struct sync_cmd_info cmdinfo;
 898         struct nvme_queue *nvmeq;
 899
 900         nvmeq = lock_nvmeq(dev, q_idx);
 901         if (!nvmeq)
 902                 return -ENODEV;
 903
 904         cmdinfo.task = current;
 905         cmdinfo.status = -EINTR;
 906
 907         cmdid = alloc_cmdid(nvmeq, &cmdinfo, sync_completion, timeout);
 908         if (cmdid < 0) {
 909                 unlock_nvmeq(nvmeq);
 910                 return cmdid;
 911         }
 912         cmd->common.command_id = cmdid;
 913
 914         set_current_state(TASK_KILLABLE);
 915         ret = nvme_submit_cmd(nvmeq, cmd);
 916         if (ret) {
 917                 free_cmdid(nvmeq, cmdid, NULL);
 918                 unlock_nvmeq(nvmeq);
 919                 set_current_state(TASK_RUNNING);
 920                 return ret;
 921         }
 922         unlock_nvmeq(nvmeq);
 923         schedule_timeout(timeout);
 924
 925         if (cmdinfo.status == -EINTR) {
 926                 nvmeq = lock_nvmeq(dev, q_idx);
 927                 if (nvmeq) {
 928                         nvme_abort_command(nvmeq, cmdid);
 929                         unlock_nvmeq(nvmeq);
 930                 }
 931                 return -EINTR;
 932         }
 933
 934         if (result)
 935                 *result = cmdinfo.result;
 936
 937         return cmdinfo.status;
 938 }
 939
 940 static int nvme_submit_async_cmd(struct nvme_queue *nvmeq,
 941                         struct nvme_command *cmd,
 942                         struct async_cmd_info *cmdinfo, unsigned timeout)
 943 {
 944         int cmdid;
 945
 946         cmdid = alloc_cmdid_killable(nvmeq, cmdinfo, async_completion, timeout);
 947         if (cmdid < 0)
 948                 return cmdid;
 949         cmdinfo->status = -EINTR;
 950         cmd->common.command_id = cmdid;
 951         return nvme_submit_cmd(nvmeq, cmd);
 952 }
 953
 954 int nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
 955                                                                 u32 *result)
 956 {
 957         return nvme_submit_sync_cmd(dev, 0, cmd, result, ADMIN_TIMEOUT);
 958 }
 959
 960 int nvme_submit_io_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
 961                                                                 u32 *result)
 962 {
 963         return nvme_submit_sync_cmd(dev, smp_processor_id() + 1, cmd, result,
 964                                                         NVME_IO_TIMEOUT);
 965 }
 966
 967 static int nvme_submit_admin_cmd_async(struct nvme_dev *dev,
 968                 struct nvme_command *cmd, struct async_cmd_info *cmdinfo)
 969 {
 970         return nvme_submit_async_cmd(raw_nvmeq(dev, 0), cmd, cmdinfo,
 971                                                                 ADMIN_TIMEOUT);
 972 }
 973
 974 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
 975 {
 976         int status;
 977         struct nvme_command c;
 978
 979         memset(&c, 0, sizeof(c));
 980         c.delete_queue.opcode = opcode;
 981         c.delete_queue.qid = cpu_to_le16(id);
 982
 983         status = nvme_submit_admin_cmd(dev, &c, NULL);
 984         if (status)
 985                 return -EIO;
 986         return 0;
 987 }
 988
 989 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
 990                                                 struct nvme_queue *nvmeq)
 991 {
 992         int status;
 993         struct nvme_command c;
 994         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
 995
 996         memset(&c, 0, sizeof(c));
 997         c.create_cq.opcode = nvme_admin_create_cq;
 998         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
 999         c.create_cq.cqid = cpu_to_le16(qid);
1000         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1001         c.create_cq.cq_flags = cpu_to_le16(flags);
1002         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1003
1004         status = nvme_submit_admin_cmd(dev, &c, NULL);
1005         if (status)
1006                 return -EIO;
1007         return 0;
1008 }
1009
1010 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1011                                                 struct nvme_queue *nvmeq)
1012 {
1013         int status;
1014         struct nvme_command c;
1015         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1016
1017         memset(&c, 0, sizeof(c));
1018         c.create_sq.opcode = nvme_admin_create_sq;
1019         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1020         c.create_sq.sqid = cpu_to_le16(qid);
1021         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1022         c.create_sq.sq_flags = cpu_to_le16(flags);
1023         c.create_sq.cqid = cpu_to_le16(qid);
1024
1025         status = nvme_submit_admin_cmd(dev, &c, NULL);
1026         if (status)
1027                 return -EIO;
1028         return 0;
1029 }
1030
1031 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1032 {
1033         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1034 }
1035
1036 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1037 {
1038         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1039 }
1040
1041 int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns,
1042                                                         dma_addr_t dma_addr)
1043 {
1044         struct nvme_command c;
1045
1046         memset(&c, 0, sizeof(c));
1047         c.identify.opcode = nvme_admin_identify;
1048         c.identify.nsid = cpu_to_le32(nsid);
1049         c.identify.prp1 = cpu_to_le64(dma_addr);
1050         c.identify.cns = cpu_to_le32(cns);
1051
1052         return nvme_submit_admin_cmd(dev, &c, NULL);
1053 }
1054
1055 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1056                                         dma_addr_t dma_addr, u32 *result)
1057 {
1058         struct nvme_command c;
1059
1060         memset(&c, 0, sizeof(c));
1061         c.features.opcode = nvme_admin_get_features;
1062         c.features.nsid = cpu_to_le32(nsid);
1063         c.features.prp1 = cpu_to_le64(dma_addr);
1064         c.features.fid = cpu_to_le32(fid);
1065
1066         return nvme_submit_admin_cmd(dev, &c, result);
1067 }
1068
1069 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1070                                         dma_addr_t dma_addr, u32 *result)
1071 {
1072         struct nvme_command c;
1073
1074         memset(&c, 0, sizeof(c));
1075         c.features.opcode = nvme_admin_set_features;
1076         c.features.prp1 = cpu_to_le64(dma_addr);
1077         c.features.fid = cpu_to_le32(fid);
1078         c.features.dword11 = cpu_to_le32(dword11);
1079
1080         return nvme_submit_admin_cmd(dev, &c, result);
1081 }
1082
1083 /**
1084  * nvme_abort_cmd - Attempt aborting a command
1085  * @cmdid: Command id of a timed out IO
1086  * @queue: The queue with timed out IO
1087  *
1088  * Schedule controller reset if the command was already aborted once before and
1089  * still hasn't been returned to the driver, or if this is the admin queue.
1090  */
1091 static void nvme_abort_cmd(int cmdid, struct nvme_queue *nvmeq)
1092 {
1093         int a_cmdid;
1094         struct nvme_command cmd;
1095         struct nvme_dev *dev = nvmeq->dev;
1096         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
1097         struct nvme_queue *adminq;
1098
1099         if (!nvmeq->qid || info[cmdid].aborted) {
1100                 if (work_busy(&dev->reset_work))
1101                         return;
1102                 list_del_init(&dev->node);
1103                 dev_warn(&dev->pci_dev->dev,
1104                         "I/O %d QID %d timeout, reset controller\n", cmdid,
1105                                                                 nvmeq->qid);
1106                 dev->reset_workfn = nvme_reset_failed_dev;
1107                 queue_work(nvme_workq, &dev->reset_work);
1108                 return;
1109         }
1110
1111         if (!dev->abort_limit)
1112                 return;
1113
1114         adminq = rcu_dereference(dev->queues[0]);
1115         a_cmdid = alloc_cmdid(adminq, CMD_CTX_ABORT, special_completion,
1116                                                                 ADMIN_TIMEOUT);
1117         if (a_cmdid < 0)
1118                 return;
1119
1120         memset(&cmd, 0, sizeof(cmd));
1121         cmd.abort.opcode = nvme_admin_abort_cmd;
1122         cmd.abort.cid = cmdid;
1123         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1124         cmd.abort.command_id = a_cmdid;
1125
1126         --dev->abort_limit;
1127         info[cmdid].aborted = 1;
1128         info[cmdid].timeout = jiffies + ADMIN_TIMEOUT;
1129
1130         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", cmdid,
1131                                                         nvmeq->qid);
1132         nvme_submit_cmd(adminq, &cmd);
1133 }
1134
1135 /**
1136  * nvme_cancel_ios - Cancel outstanding I/Os
1137  * @queue: The queue to cancel I/Os on
1138  * @timeout: True to only cancel I/Os which have timed out
1139  */
1140 static void nvme_cancel_ios(struct nvme_queue *nvmeq, bool timeout)
1141 {
1142         int depth = nvmeq->q_depth - 1;
1143         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
1144         unsigned long now = jiffies;
1145         int cmdid;
1146
1147         for_each_set_bit(cmdid, nvmeq->cmdid_data, depth) {
1148                 void *ctx;
1149                 nvme_completion_fn fn;
1150                 static struct nvme_completion cqe = {
1151                         .status = cpu_to_le16(NVME_SC_ABORT_REQ << 1),
1152                 };
1153
1154                 if (timeout && !time_after(now, info[cmdid].timeout))
1155                         continue;
1156                 if (info[cmdid].ctx == CMD_CTX_CANCELLED)
1157                         continue;
1158                 if (timeout && nvmeq->dev->initialized) {
1159                         nvme_abort_cmd(cmdid, nvmeq);
1160                         continue;
1161                 }
1162                 dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n", cmdid,
1163                                                                 nvmeq->qid);
1164                 ctx = cancel_cmdid(nvmeq, cmdid, &fn);
1165                 fn(nvmeq, ctx, &cqe);
1166         }
1167 }
1168
1169 static void nvme_free_queue(struct rcu_head *r)
1170 {
1171         struct nvme_queue *nvmeq = container_of(r, struct nvme_queue, r_head);
1172
1173         spin_lock_irq(&nvmeq->q_lock);
1174         while (bio_list_peek(&nvmeq->sq_cong)) {
1175                 struct bio *bio = bio_list_pop(&nvmeq->sq_cong);
1176                 bio_endio(bio, -EIO);
1177         }
1178         while (!list_empty(&nvmeq->iod_bio)) {
1179                 static struct nvme_completion cqe = {
1180                         .status = cpu_to_le16(
1181                                 (NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1),
1182                 };
1183                 struct nvme_iod *iod = list_first_entry(&nvmeq->iod_bio,
1184                                                         struct nvme_iod,
1185                                                         node);
1186                 list_del(&iod->node);
1187                 bio_completion(nvmeq, iod, &cqe);
1188         }
1189         spin_unlock_irq(&nvmeq->q_lock);
1190
1191         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1192                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1193         dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1194                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1195         if (nvmeq->qid)
1196                 free_cpumask_var(nvmeq->cpu_mask);
1197         kfree(nvmeq);
1198 }
1199
1200 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1201 {
1202         int i;
1203
1204         for (i = dev->queue_count - 1; i >= lowest; i--) {
1205                 struct nvme_queue *nvmeq = raw_nvmeq(dev, i);
1206                 rcu_assign_pointer(dev->queues[i], NULL);
1207                 call_rcu(&nvmeq->r_head, nvme_free_queue);
1208                 dev->queue_count--;
1209         }
1210 }
1211
1212 /**
1213  * nvme_suspend_queue - put queue into suspended state
1214  * @nvmeq - queue to suspend
1215  *
1216  * Returns 1 if already suspended, 0 otherwise.
1217  */
1218 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1219 {
1220         int vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1221
1222         spin_lock_irq(&nvmeq->q_lock);
1223         if (nvmeq->q_suspended) {
1224                 spin_unlock_irq(&nvmeq->q_lock);
1225                 return 1;
1226         }
1227         nvmeq->q_suspended = 1;
1228         nvmeq->dev->online_queues--;
1229         spin_unlock_irq(&nvmeq->q_lock);
1230
1231         irq_set_affinity_hint(vector, NULL);
1232         free_irq(vector, nvmeq);
1233
1234         return 0;
1235 }
1236
1237 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1238 {
1239         spin_lock_irq(&nvmeq->q_lock);
1240         nvme_process_cq(nvmeq);
1241         nvme_cancel_ios(nvmeq, false);
1242         spin_unlock_irq(&nvmeq->q_lock);
1243 }
1244
1245 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1246 {
1247         struct nvme_queue *nvmeq = raw_nvmeq(dev, qid);
1248
1249         if (!nvmeq)
1250                 return;
1251         if (nvme_suspend_queue(nvmeq))
1252                 return;
1253
1254         /* Don't tell the adapter to delete the admin queue.
1255          * Don't tell a removed adapter to delete IO queues. */
1256         if (qid && readl(&dev->bar->csts) != -1) {
1257                 adapter_delete_sq(dev, qid);
1258                 adapter_delete_cq(dev, qid);
1259         }
1260         nvme_clear_queue(nvmeq);
1261 }
1262
1263 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1264                                                         int depth, int vector)
1265 {
1266         struct device *dmadev = &dev->pci_dev->dev;
1267         unsigned extra = nvme_queue_extra(depth);
1268         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq) + extra, GFP_KERNEL);
1269         if (!nvmeq)
1270                 return NULL;
1271
1272         nvmeq->cqes = dma_alloc_coherent(dmadev, CQ_SIZE(depth),
1273                                         &nvmeq->cq_dma_addr, GFP_KERNEL);
1274         if (!nvmeq->cqes)
1275                 goto free_nvmeq;
1276         memset((void *)nvmeq->cqes, 0, CQ_SIZE(depth));
1277
1278         nvmeq->sq_cmds = dma_alloc_coherent(dmadev, SQ_SIZE(depth),
1279                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1280         if (!nvmeq->sq_cmds)
1281                 goto free_cqdma;
1282
1283         if (qid && !zalloc_cpumask_var(&nvmeq->cpu_mask, GFP_KERNEL))
1284                 goto free_sqdma;
1285
1286         nvmeq->q_dmadev = dmadev;
1287         nvmeq->dev = dev;
1288         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1289                         dev->instance, qid);
1290         spin_lock_init(&nvmeq->q_lock);
1291         nvmeq->cq_head = 0;
1292         nvmeq->cq_phase = 1;
1293         init_waitqueue_head(&nvmeq->sq_full);
1294         init_waitqueue_entry(&nvmeq->sq_cong_wait, nvme_thread);
1295         bio_list_init(&nvmeq->sq_cong);
1296         INIT_LIST_HEAD(&nvmeq->iod_bio);
1297         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1298         nvmeq->q_depth = depth;
1299         nvmeq->cq_vector = vector;
1300         nvmeq->qid = qid;
1301         nvmeq->q_suspended = 1;
1302         dev->queue_count++;
1303         rcu_assign_pointer(dev->queues[qid], nvmeq);
1304
1305         return nvmeq;
1306
1307  free_sqdma:
1308         dma_free_coherent(dmadev, SQ_SIZE(depth), (void *)nvmeq->sq_cmds,
1309                                                         nvmeq->sq_dma_addr);
1310  free_cqdma:
1311         dma_free_coherent(dmadev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1312                                                         nvmeq->cq_dma_addr);
1313  free_nvmeq:
1314         kfree(nvmeq);
1315         return NULL;
1316 }
1317
1318 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1319                                                         const char *name)
1320 {
1321         if (use_threaded_interrupts)
1322                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1323                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1324                                         name, nvmeq);
1325         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1326                                 IRQF_SHARED, name, nvmeq);
1327 }
1328
1329 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1330 {
1331         struct nvme_dev *dev = nvmeq->dev;
1332         unsigned extra = nvme_queue_extra(nvmeq->q_depth);
1333
1334         nvmeq->sq_tail = 0;
1335         nvmeq->cq_head = 0;
1336         nvmeq->cq_phase = 1;
1337         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1338         memset(nvmeq->cmdid_data, 0, extra);
1339         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1340         nvme_cancel_ios(nvmeq, false);
1341         nvmeq->q_suspended = 0;
1342         dev->online_queues++;
1343 }
1344
1345 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1346 {
1347         struct nvme_dev *dev = nvmeq->dev;
1348         int result;
1349
1350         result = adapter_alloc_cq(dev, qid, nvmeq);
1351         if (result < 0)
1352                 return result;
1353
1354         result = adapter_alloc_sq(dev, qid, nvmeq);
1355         if (result < 0)
1356                 goto release_cq;
1357
1358         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1359         if (result < 0)
1360                 goto release_sq;
1361
1362         spin_lock_irq(&nvmeq->q_lock);
1363         nvme_init_queue(nvmeq, qid);
1364         spin_unlock_irq(&nvmeq->q_lock);
1365
1366         return result;
1367
1368  release_sq:
1369         adapter_delete_sq(dev, qid);
1370  release_cq:
1371         adapter_delete_cq(dev, qid);
1372         return result;
1373 }
1374
1375 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1376 {
1377         unsigned long timeout;
1378         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1379
1380         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1381
1382         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1383                 msleep(100);
1384                 if (fatal_signal_pending(current))
1385                         return -EINTR;
1386                 if (time_after(jiffies, timeout)) {
1387                         dev_err(&dev->pci_dev->dev,
1388                                 "Device not ready; aborting %s\n", enabled ?
1389                                                 "initialisation" : "reset");
1390                         return -ENODEV;
1391                 }
1392         }
1393
1394         return 0;
1395 }
1396
1397 /*
1398  * If the device has been passed off to us in an enabled state, just clear
1399  * the enabled bit.  The spec says we should set the 'shutdown notification
1400  * bits', but doing so may cause the device to complete commands to the
1401  * admin queue ... and we don't know what memory that might be pointing at!
1402  */
1403 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1404 {
1405         u32 cc = readl(&dev->bar->cc);
1406
1407         if (cc & NVME_CC_ENABLE)
1408                 writel(cc & ~NVME_CC_ENABLE, &dev->bar->cc);
1409         return nvme_wait_ready(dev, cap, false);
1410 }
1411
1412 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1413 {
1414         return nvme_wait_ready(dev, cap, true);
1415 }
1416
1417 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1418 {
1419         unsigned long timeout;
1420         u32 cc;
1421
1422         cc = (readl(&dev->bar->cc) & ~NVME_CC_SHN_MASK) | NVME_CC_SHN_NORMAL;
1423         writel(cc, &dev->bar->cc);
1424
1425         timeout = 2 * HZ + jiffies;
1426         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1427                                                         NVME_CSTS_SHST_CMPLT) {
1428                 msleep(100);
1429                 if (fatal_signal_pending(current))
1430                         return -EINTR;
1431                 if (time_after(jiffies, timeout)) {
1432                         dev_err(&dev->pci_dev->dev,
1433                                 "Device shutdown incomplete; abort shutdown\n");
1434                         return -ENODEV;
1435                 }
1436         }
1437
1438         return 0;
1439 }
1440
1441 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1442 {
1443         int result;
1444         u32 aqa;
1445         u64 cap = readq(&dev->bar->cap);
1446         struct nvme_queue *nvmeq;
1447
1448         result = nvme_disable_ctrl(dev, cap);
1449         if (result < 0)
1450                 return result;
1451
1452         nvmeq = raw_nvmeq(dev, 0);
1453         if (!nvmeq) {
1454                 nvmeq = nvme_alloc_queue(dev, 0, 64, 0);
1455                 if (!nvmeq)
1456                         return -ENOMEM;
1457         }
1458
1459         aqa = nvmeq->q_depth - 1;
1460         aqa |= aqa << 16;
1461
1462         dev->ctrl_config = NVME_CC_ENABLE | NVME_CC_CSS_NVM;
1463         dev->ctrl_config |= (PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
1464         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1465         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1466
1467         writel(aqa, &dev->bar->aqa);
1468         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1469         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1470         writel(dev->ctrl_config, &dev->bar->cc);
1471
1472         result = nvme_enable_ctrl(dev, cap);
1473         if (result)
1474                 return result;
1475
1476         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1477         if (result)
1478                 return result;
1479
1480         spin_lock_irq(&nvmeq->q_lock);
1481         nvme_init_queue(nvmeq, 0);
1482         spin_unlock_irq(&nvmeq->q_lock);
1483         return result;
1484 }
1485
1486 struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write,
1487                                 unsigned long addr, unsigned length)
1488 {
1489         int i, err, count, nents, offset;
1490         struct scatterlist *sg;
1491         struct page **pages;
1492         struct nvme_iod *iod;
1493
1494         if (addr & 3)
1495                 return ERR_PTR(-EINVAL);
1496         if (!length || length > INT_MAX - PAGE_SIZE)
1497                 return ERR_PTR(-EINVAL);
1498
1499         offset = offset_in_page(addr);
1500         count = DIV_ROUND_UP(offset + length, PAGE_SIZE);
1501         pages = kcalloc(count, sizeof(*pages), GFP_KERNEL);
1502         if (!pages)
1503                 return ERR_PTR(-ENOMEM);
1504
1505         err = get_user_pages_fast(addr, count, 1, pages);
1506         if (err < count) {
1507                 count = err;
1508                 err = -EFAULT;
1509                 goto put_pages;
1510         }
1511
1512         err = -ENOMEM;
1513         iod = nvme_alloc_iod(count, length, GFP_KERNEL);
1514         if (!iod)
1515                 goto put_pages;
1516
1517         sg = iod->sg;
1518         sg_init_table(sg, count);
1519         for (i = 0; i < count; i++) {
1520                 sg_set_page(&sg[i], pages[i],
1521                             min_t(unsigned, length, PAGE_SIZE - offset),
1522                             offset);
1523                 length -= (PAGE_SIZE - offset);
1524                 offset = 0;
1525         }
1526         sg_mark_end(&sg[i - 1]);
1527         iod->nents = count;
1528
1529         nents = dma_map_sg(&dev->pci_dev->dev, sg, count,
1530                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1531         if (!nents)
1532                 goto free_iod;
1533
1534         kfree(pages);
1535         return iod;
1536
1537  free_iod:
1538         kfree(iod);
1539  put_pages:
1540         for (i = 0; i < count; i++)
1541                 put_page(pages[i]);
1542         kfree(pages);
1543         return ERR_PTR(err);
1544 }
1545
1546 void nvme_unmap_user_pages(struct nvme_dev *dev, int write,
1547                         struct nvme_iod *iod)
1548 {
1549         int i;
1550
1551         dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents,
1552                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1553
1554         for (i = 0; i < iod->nents; i++)
1555                 put_page(sg_page(&iod->sg[i]));
1556 }
1557
1558 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1559 {
1560         struct nvme_dev *dev = ns->dev;
1561         struct nvme_user_io io;
1562         struct nvme_command c;
1563         unsigned length, meta_len;
1564         int status, i;
1565         struct nvme_iod *iod, *meta_iod = NULL;
1566         dma_addr_t meta_dma_addr;
1567         void *meta, *uninitialized_var(meta_mem);
1568
1569         if (copy_from_user(&io, uio, sizeof(io)))
1570                 return -EFAULT;
1571         length = (io.nblocks + 1) << ns->lba_shift;
1572         meta_len = (io.nblocks + 1) * ns->ms;
1573
1574         if (meta_len && ((io.metadata & 3) || !io.metadata))
1575                 return -EINVAL;
1576
1577         switch (io.opcode) {
1578         case nvme_cmd_write:
1579         case nvme_cmd_read:
1580         case nvme_cmd_compare:
1581                 iod = nvme_map_user_pages(dev, io.opcode & 1, io.addr, length);
1582                 break;
1583         default:
1584                 return -EINVAL;
1585         }
1586
1587         if (IS_ERR(iod))
1588                 return PTR_ERR(iod);
1589
1590         memset(&c, 0, sizeof(c));
1591         c.rw.opcode = io.opcode;
1592         c.rw.flags = io.flags;
1593         c.rw.nsid = cpu_to_le32(ns->ns_id);
1594         c.rw.slba = cpu_to_le64(io.slba);
1595         c.rw.length = cpu_to_le16(io.nblocks);
1596         c.rw.control = cpu_to_le16(io.control);
1597         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1598         c.rw.reftag = cpu_to_le32(io.reftag);
1599         c.rw.apptag = cpu_to_le16(io.apptag);
1600         c.rw.appmask = cpu_to_le16(io.appmask);
1601
1602         if (meta_len) {
1603                 meta_iod = nvme_map_user_pages(dev, io.opcode & 1, io.metadata,
1604                                                                 meta_len);
1605                 if (IS_ERR(meta_iod)) {
1606                         status = PTR_ERR(meta_iod);
1607                         meta_iod = NULL;
1608                         goto unmap;
1609                 }
1610
1611                 meta_mem = dma_alloc_coherent(&dev->pci_dev->dev, meta_len,
1612                                                 &meta_dma_addr, GFP_KERNEL);
1613                 if (!meta_mem) {
1614                         status = -ENOMEM;
1615                         goto unmap;
1616                 }
1617
1618                 if (io.opcode & 1) {
1619                         int meta_offset = 0;
1620
1621                         for (i = 0; i < meta_iod->nents; i++) {
1622                                 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1623                                                 meta_iod->sg[i].offset;
1624                                 memcpy(meta_mem + meta_offset, meta,
1625                                                 meta_iod->sg[i].length);
1626                                 kunmap_atomic(meta);
1627                                 meta_offset += meta_iod->sg[i].length;
1628                         }
1629                 }
1630
1631                 c.rw.metadata = cpu_to_le64(meta_dma_addr);
1632         }
1633
1634         length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1635         c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1636         c.rw.prp2 = cpu_to_le64(iod->first_dma);
1637
1638         if (length != (io.nblocks + 1) << ns->lba_shift)
1639                 status = -ENOMEM;
1640         else
1641                 status = nvme_submit_io_cmd(dev, &c, NULL);
1642
1643         if (meta_len) {
1644                 if (status == NVME_SC_SUCCESS && !(io.opcode & 1)) {
1645                         int meta_offset = 0;
1646
1647                         for (i = 0; i < meta_iod->nents; i++) {
1648                                 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1649                                                 meta_iod->sg[i].offset;
1650                                 memcpy(meta, meta_mem + meta_offset,
1651                                                 meta_iod->sg[i].length);
1652                                 kunmap_atomic(meta);
1653                                 meta_offset += meta_iod->sg[i].length;
1654                         }
1655                 }
1656
1657                 dma_free_coherent(&dev->pci_dev->dev, meta_len, meta_mem,
1658                                                                 meta_dma_addr);
1659         }
1660
1661  unmap:
1662         nvme_unmap_user_pages(dev, io.opcode & 1, iod);
1663         nvme_free_iod(dev, iod);
1664
1665         if (meta_iod) {
1666                 nvme_unmap_user_pages(dev, io.opcode & 1, meta_iod);
1667                 nvme_free_iod(dev, meta_iod);
1668         }
1669
1670         return status;
1671 }
1672
1673 static int nvme_user_admin_cmd(struct nvme_dev *dev,
1674                                         struct nvme_admin_cmd __user *ucmd)
1675 {
1676         struct nvme_admin_cmd cmd;
1677         struct nvme_command c;
1678         int status, length;
1679         struct nvme_iod *uninitialized_var(iod);
1680         unsigned timeout;
1681
1682         if (!capable(CAP_SYS_ADMIN))
1683                 return -EACCES;
1684         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1685                 return -EFAULT;
1686
1687         memset(&c, 0, sizeof(c));
1688         c.common.opcode = cmd.opcode;
1689         c.common.flags = cmd.flags;
1690         c.common.nsid = cpu_to_le32(cmd.nsid);
1691         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1692         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1693         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1694         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1695         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1696         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1697         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1698         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1699
1700         length = cmd.data_len;
1701         if (cmd.data_len) {
1702                 iod = nvme_map_user_pages(dev, cmd.opcode & 1, cmd.addr,
1703                                                                 length);
1704                 if (IS_ERR(iod))
1705                         return PTR_ERR(iod);
1706                 length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1707                 c.common.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1708                 c.common.prp2 = cpu_to_le64(iod->first_dma);
1709         }
1710
1711         timeout = cmd.timeout_ms ? msecs_to_jiffies(cmd.timeout_ms) :
1712                                                                 ADMIN_TIMEOUT;
1713         if (length != cmd.data_len)
1714                 status = -ENOMEM;
1715         else
1716                 status = nvme_submit_sync_cmd(dev, 0, &c, &cmd.result, timeout);
1717
1718         if (cmd.data_len) {
1719                 nvme_unmap_user_pages(dev, cmd.opcode & 1, iod);
1720                 nvme_free_iod(dev, iod);
1721         }
1722
1723         if ((status >= 0) && copy_to_user(&ucmd->result, &cmd.result,
1724                                                         sizeof(cmd.result)))
1725                 status = -EFAULT;
1726
1727         return status;
1728 }
1729
1730 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1731                                                         unsigned long arg)
1732 {
1733         struct nvme_ns *ns = bdev->bd_disk->private_data;
1734
1735         switch (cmd) {
1736         case NVME_IOCTL_ID:
1737                 force_successful_syscall_return();
1738                 return ns->ns_id;
1739         case NVME_IOCTL_ADMIN_CMD:
1740                 return nvme_user_admin_cmd(ns->dev, (void __user *)arg);
1741         case NVME_IOCTL_SUBMIT_IO:
1742                 return nvme_submit_io(ns, (void __user *)arg);
1743         case SG_GET_VERSION_NUM:
1744                 return nvme_sg_get_version_num((void __user *)arg);
1745         case SG_IO:
1746                 return nvme_sg_io(ns, (void __user *)arg);
1747         default:
1748                 return -ENOTTY;
1749         }
1750 }
1751
1752 #ifdef CONFIG_COMPAT
1753 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1754                                         unsigned int cmd, unsigned long arg)
1755 {
1756         struct nvme_ns *ns = bdev->bd_disk->private_data;
1757
1758         switch (cmd) {
1759         case SG_IO:
1760                 return nvme_sg_io32(ns, arg);
1761         }
1762         return nvme_ioctl(bdev, mode, cmd, arg);
1763 }
1764 #else
1765 #define nvme_compat_ioctl       NULL
1766 #endif
1767
1768 static int nvme_open(struct block_device *bdev, fmode_t mode)
1769 {
1770         struct nvme_ns *ns = bdev->bd_disk->private_data;
1771         struct nvme_dev *dev = ns->dev;
1772
1773         kref_get(&dev->kref);
1774         return 0;
1775 }
1776
1777 static void nvme_free_dev(struct kref *kref);
1778
1779 static void nvme_release(struct gendisk *disk, fmode_t mode)
1780 {
1781         struct nvme_ns *ns = disk->private_data;
1782         struct nvme_dev *dev = ns->dev;
1783
1784         kref_put(&dev->kref, nvme_free_dev);
1785 }
1786
1787 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1788 {
1789         /* some standard values */
1790         geo->heads = 1 << 6;
1791         geo->sectors = 1 << 5;
1792         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1793         return 0;
1794 }
1795
1796 static const struct block_device_operations nvme_fops = {
1797         .owner          = THIS_MODULE,
1798         .ioctl          = nvme_ioctl,
1799         .compat_ioctl   = nvme_compat_ioctl,
1800         .open           = nvme_open,
1801         .release        = nvme_release,
1802         .getgeo         = nvme_getgeo,
1803 };
1804
1805 static void nvme_resubmit_iods(struct nvme_queue *nvmeq)
1806 {
1807         struct nvme_iod *iod, *next;
1808
1809         list_for_each_entry_safe(iod, next, &nvmeq->iod_bio, node) {
1810                 if (unlikely(nvme_submit_iod(nvmeq, iod)))
1811                         break;
1812                 list_del(&iod->node);
1813                 if (bio_list_empty(&nvmeq->sq_cong) &&
1814                                                 list_empty(&nvmeq->iod_bio))
1815                         remove_wait_queue(&nvmeq->sq_full,
1816                                                 &nvmeq->sq_cong_wait);
1817         }
1818 }
1819
1820 static void nvme_resubmit_bios(struct nvme_queue *nvmeq)
1821 {
1822         while (bio_list_peek(&nvmeq->sq_cong)) {
1823                 struct bio *bio = bio_list_pop(&nvmeq->sq_cong);
1824                 struct nvme_ns *ns = bio->bi_bdev->bd_disk->private_data;
1825
1826                 if (bio_list_empty(&nvmeq->sq_cong) &&
1827                                                 list_empty(&nvmeq->iod_bio))
1828                         remove_wait_queue(&nvmeq->sq_full,
1829                                                         &nvmeq->sq_cong_wait);
1830                 if (nvme_submit_bio_queue(nvmeq, ns, bio)) {
1831                         if (!waitqueue_active(&nvmeq->sq_full))
1832                                 add_wait_queue(&nvmeq->sq_full,
1833                                                         &nvmeq->sq_cong_wait);
1834                         bio_list_add_head(&nvmeq->sq_cong, bio);
1835                         break;
1836                 }
1837         }
1838 }
1839
1840 static int nvme_kthread(void *data)
1841 {
1842         struct nvme_dev *dev, *next;
1843
1844         while (!kthread_should_stop()) {
1845                 set_current_state(TASK_INTERRUPTIBLE);
1846                 spin_lock(&dev_list_lock);
1847                 list_for_each_entry_safe(dev, next, &dev_list, node) {
1848                         int i;
1849                         if (readl(&dev->bar->csts) & NVME_CSTS_CFS &&
1850                                                         dev->initialized) {
1851                                 if (work_busy(&dev->reset_work))
1852                                         continue;
1853                                 list_del_init(&dev->node);
1854                                 dev_warn(&dev->pci_dev->dev,
1855                                         "Failed status, reset controller\n");
1856                                 dev->reset_workfn = nvme_reset_failed_dev;
1857                                 queue_work(nvme_workq, &dev->reset_work);
1858                                 continue;
1859                         }
1860                         rcu_read_lock();
1861                         for (i = 0; i < dev->queue_count; i++) {
1862                                 struct nvme_queue *nvmeq =
1863                                                 rcu_dereference(dev->queues[i]);
1864                                 if (!nvmeq)
1865                                         continue;
1866                                 spin_lock_irq(&nvmeq->q_lock);
1867                                 if (nvmeq->q_suspended)
1868                                         goto unlock;
1869                                 nvme_process_cq(nvmeq);
1870                                 nvme_cancel_ios(nvmeq, true);
1871                                 nvme_resubmit_bios(nvmeq);
1872                                 nvme_resubmit_iods(nvmeq);
1873  unlock:
1874                                 spin_unlock_irq(&nvmeq->q_lock);
1875                         }
1876                         rcu_read_unlock();
1877                 }
1878                 spin_unlock(&dev_list_lock);
1879                 schedule_timeout(round_jiffies_relative(HZ));
1880         }
1881         return 0;
1882 }
1883
1884 static void nvme_config_discard(struct nvme_ns *ns)
1885 {
1886         u32 logical_block_size = queue_logical_block_size(ns->queue);
1887         ns->queue->limits.discard_zeroes_data = 0;
1888         ns->queue->limits.discard_alignment = logical_block_size;
1889         ns->queue->limits.discard_granularity = logical_block_size;
1890         ns->queue->limits.max_discard_sectors = 0xffffffff;
1891         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1892 }
1893
1894 static struct nvme_ns *nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid,
1895                         struct nvme_id_ns *id, struct nvme_lba_range_type *rt)
1896 {
1897         struct nvme_ns *ns;
1898         struct gendisk *disk;
1899         int lbaf;
1900
1901         if (rt->attributes & NVME_LBART_ATTRIB_HIDE)
1902                 return NULL;
1903
1904         ns = kzalloc(sizeof(*ns), GFP_KERNEL);
1905         if (!ns)
1906                 return NULL;
1907         ns->queue = blk_alloc_queue(GFP_KERNEL);
1908         if (!ns->queue)
1909                 goto out_free_ns;
1910         ns->queue->queue_flags = QUEUE_FLAG_DEFAULT;
1911         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
1912         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
1913         blk_queue_make_request(ns->queue, nvme_make_request);
1914         ns->dev = dev;
1915         ns->queue->queuedata = ns;
1916
1917         disk = alloc_disk(0);
1918         if (!disk)
1919                 goto out_free_queue;
1920         ns->ns_id = nsid;
1921         ns->disk = disk;
1922         lbaf = id->flbas & 0xf;
1923         ns->lba_shift = id->lbaf[lbaf].ds;
1924         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1925         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
1926         if (dev->max_hw_sectors)
1927                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
1928         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
1929                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
1930
1931         disk->major = nvme_major;
1932         disk->first_minor = 0;
1933         disk->fops = &nvme_fops;
1934         disk->private_data = ns;
1935         disk->queue = ns->queue;
1936         disk->driverfs_dev = &dev->pci_dev->dev;
1937         disk->flags = GENHD_FL_EXT_DEVT;
1938         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
1939         set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1940
1941         if (dev->oncs & NVME_CTRL_ONCS_DSM)
1942                 nvme_config_discard(ns);
1943
1944         return ns;
1945
1946  out_free_queue:
1947         blk_cleanup_queue(ns->queue);
1948  out_free_ns:
1949         kfree(ns);
1950         return NULL;
1951 }
1952
1953 static int nvme_find_closest_node(int node)
1954 {
1955         int n, val, min_val = INT_MAX, best_node = node;
1956
1957         for_each_online_node(n) {
1958                 if (n == node)
1959                         continue;
1960                 val = node_distance(node, n);
1961                 if (val < min_val) {
1962                         min_val = val;
1963                         best_node = n;
1964                 }
1965         }
1966         return best_node;
1967 }
1968
1969 static void nvme_set_queue_cpus(cpumask_t *qmask, struct nvme_queue *nvmeq,
1970                                                                 int count)
1971 {
1972         int cpu;
1973         for_each_cpu(cpu, qmask) {
1974                 if (cpumask_weight(nvmeq->cpu_mask) >= count)
1975                         break;
1976                 if (!cpumask_test_and_set_cpu(cpu, nvmeq->cpu_mask))
1977                         *per_cpu_ptr(nvmeq->dev->io_queue, cpu) = nvmeq->qid;
1978         }
1979 }
1980
1981 static void nvme_add_cpus(cpumask_t *mask, const cpumask_t *unassigned_cpus,
1982         const cpumask_t *new_mask, struct nvme_queue *nvmeq, int cpus_per_queue)
1983 {
1984         int next_cpu;
1985         for_each_cpu(next_cpu, new_mask) {
1986                 cpumask_or(mask, mask, get_cpu_mask(next_cpu));
1987                 cpumask_or(mask, mask, topology_thread_cpumask(next_cpu));
1988                 cpumask_and(mask, mask, unassigned_cpus);
1989                 nvme_set_queue_cpus(mask, nvmeq, cpus_per_queue);
1990         }
1991 }
1992
1993 static void nvme_create_io_queues(struct nvme_dev *dev)
1994 {
1995         unsigned i, max;
1996
1997         max = min(dev->max_qid, num_online_cpus());
1998         for (i = dev->queue_count; i <= max; i++)
1999                 if (!nvme_alloc_queue(dev, i, dev->q_depth, i - 1))
2000                         break;
2001
2002         max = min(dev->queue_count - 1, num_online_cpus());
2003         for (i = dev->online_queues; i <= max; i++)
2004                 if (nvme_create_queue(raw_nvmeq(dev, i), i))
2005                         break;
2006 }
2007
2008 /*
2009  * If there are fewer queues than online cpus, this will try to optimally
2010  * assign a queue to multiple cpus by grouping cpus that are "close" together:
2011  * thread siblings, core, socket, closest node, then whatever else is
2012  * available.
2013  */
2014 static void nvme_assign_io_queues(struct nvme_dev *dev)
2015 {
2016         unsigned cpu, cpus_per_queue, queues, remainder, i;
2017         cpumask_var_t unassigned_cpus;
2018
2019         nvme_create_io_queues(dev);
2020
2021         queues = min(dev->online_queues - 1, num_online_cpus());
2022         if (!queues)
2023                 return;
2024
2025         cpus_per_queue = num_online_cpus() / queues;
2026         remainder = queues - (num_online_cpus() - queues * cpus_per_queue);
2027
2028         if (!alloc_cpumask_var(&unassigned_cpus, GFP_KERNEL))
2029                 return;
2030
2031         cpumask_copy(unassigned_cpus, cpu_online_mask);
2032         cpu = cpumask_first(unassigned_cpus);
2033         for (i = 1; i <= queues; i++) {
2034                 struct nvme_queue *nvmeq = lock_nvmeq(dev, i);
2035                 cpumask_t mask;
2036
2037                 cpumask_clear(nvmeq->cpu_mask);
2038                 if (!cpumask_weight(unassigned_cpus)) {
2039                         unlock_nvmeq(nvmeq);
2040                         break;
2041                 }
2042
2043                 mask = *get_cpu_mask(cpu);
2044                 nvme_set_queue_cpus(&mask, nvmeq, cpus_per_queue);
2045                 if (cpus_weight(mask) < cpus_per_queue)
2046                         nvme_add_cpus(&mask, unassigned_cpus,
2047                                 topology_thread_cpumask(cpu),
2048                                 nvmeq, cpus_per_queue);
2049                 if (cpus_weight(mask) < cpus_per_queue)
2050                         nvme_add_cpus(&mask, unassigned_cpus,
2051                                 topology_core_cpumask(cpu),
2052                                 nvmeq, cpus_per_queue);
2053                 if (cpus_weight(mask) < cpus_per_queue)
2054                         nvme_add_cpus(&mask, unassigned_cpus,
2055                                 cpumask_of_node(cpu_to_node(cpu)),
2056                                 nvmeq, cpus_per_queue);
2057                 if (cpus_weight(mask) < cpus_per_queue)
2058                         nvme_add_cpus(&mask, unassigned_cpus,
2059                                 cpumask_of_node(
2060                                         nvme_find_closest_node(
2061                                                 cpu_to_node(cpu))),
2062                                 nvmeq, cpus_per_queue);
2063                 if (cpus_weight(mask) < cpus_per_queue)
2064                         nvme_add_cpus(&mask, unassigned_cpus,
2065                                 unassigned_cpus,
2066                                 nvmeq, cpus_per_queue);
2067
2068                 WARN(cpumask_weight(nvmeq->cpu_mask) != cpus_per_queue,
2069                         "nvme%d qid:%d mis-matched queue-to-cpu assignment\n",
2070                         dev->instance, i);
2071
2072                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2073                                                         nvmeq->cpu_mask);
2074                 cpumask_andnot(unassigned_cpus, unassigned_cpus,
2075                                                 nvmeq->cpu_mask);
2076                 cpu = cpumask_next(cpu, unassigned_cpus);
2077                 if (remainder && !--remainder)
2078                         cpus_per_queue++;
2079                 unlock_nvmeq(nvmeq);
2080         }
2081         WARN(cpumask_weight(unassigned_cpus), "nvme%d unassigned online cpus\n",
2082                                                                 dev->instance);
2083         i = 0;
2084         cpumask_andnot(unassigned_cpus, cpu_possible_mask, cpu_online_mask);
2085         for_each_cpu(cpu, unassigned_cpus)
2086                 *per_cpu_ptr(dev->io_queue, cpu) = (i++ % queues) + 1;
2087         free_cpumask_var(unassigned_cpus);
2088 }
2089
2090 static int set_queue_count(struct nvme_dev *dev, int count)
2091 {
2092         int status;
2093         u32 result;
2094         u32 q_count = (count - 1) | ((count - 1) << 16);
2095
2096         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2097                                                                 &result);
2098         if (status < 0)
2099                 return status;
2100         if (status > 0) {
2101                 dev_err(&dev->pci_dev->dev, "Could not set queue count (%d)\n",
2102                                                                         status);
2103                 return -EBUSY;
2104         }
2105         return min(result & 0xffff, result >> 16) + 1;
2106 }
2107
2108 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2109 {
2110         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2111 }
2112
2113 static int nvme_cpu_notify(struct notifier_block *self,
2114                                 unsigned long action, void *hcpu)
2115 {
2116         struct nvme_dev *dev = container_of(self, struct nvme_dev, nb);
2117         switch (action) {
2118         case CPU_ONLINE:
2119         case CPU_DEAD:
2120                 nvme_assign_io_queues(dev);
2121                 break;
2122         }
2123         return NOTIFY_OK;
2124 }
2125
2126 static int nvme_setup_io_queues(struct nvme_dev *dev)
2127 {
2128         struct nvme_queue *adminq = raw_nvmeq(dev, 0);
2129         struct pci_dev *pdev = dev->pci_dev;
2130         int result, i, vecs, nr_io_queues, size;
2131
2132         nr_io_queues = num_possible_cpus();
2133         result = set_queue_count(dev, nr_io_queues);
2134         if (result < 0)
2135                 return result;
2136         if (result < nr_io_queues)
2137                 nr_io_queues = result;
2138
2139         size = db_bar_size(dev, nr_io_queues);
2140         if (size > 8192) {
2141                 iounmap(dev->bar);
2142                 do {
2143                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2144                         if (dev->bar)
2145                                 break;
2146                         if (!--nr_io_queues)
2147                                 return -ENOMEM;
2148                         size = db_bar_size(dev, nr_io_queues);
2149                 } while (1);
2150                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2151                 adminq->q_db = dev->dbs;
2152         }
2153
2154         /* Deregister the admin queue's interrupt */
2155         free_irq(dev->entry[0].vector, adminq);
2156
2157         for (i = 0; i < nr_io_queues; i++)
2158                 dev->entry[i].entry = i;
2159         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2160         if (vecs < 0) {
2161                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2162                 if (vecs < 0) {
2163                         vecs = 1;
2164                 } else {
2165                         for (i = 0; i < vecs; i++)
2166                                 dev->entry[i].vector = i + pdev->irq;
2167                 }
2168         }
2169
2170         /*
2171          * Should investigate if there's a performance win from allocating
2172          * more queues than interrupt vectors; it might allow the submission
2173          * path to scale better, even if the receive path is limited by the
2174          * number of interrupts.
2175          */
2176         nr_io_queues = vecs;
2177         dev->max_qid = nr_io_queues;
2178
2179         result = queue_request_irq(dev, adminq, adminq->irqname);
2180         if (result) {
2181                 adminq->q_suspended = 1;
2182                 goto free_queues;
2183         }
2184
2185         /* Free previously allocated queues that are no longer usable */
2186         nvme_free_queues(dev, nr_io_queues + 1);
2187         nvme_assign_io_queues(dev);
2188
2189         dev->nb.notifier_call = &nvme_cpu_notify;
2190         result = register_hotcpu_notifier(&dev->nb);
2191         if (result)
2192                 goto free_queues;
2193
2194         return 0;
2195
2196  free_queues:
2197         nvme_free_queues(dev, 1);
2198         return result;
2199 }
2200
2201 /*
2202  * Return: error value if an error occurred setting up the queues or calling
2203  * Identify Device.  0 if these succeeded, even if adding some of the
2204  * namespaces failed.  At the moment, these failures are silent.  TBD which
2205  * failures should be reported.
2206  */
2207 static int nvme_dev_add(struct nvme_dev *dev)
2208 {
2209         struct pci_dev *pdev = dev->pci_dev;
2210         int res;
2211         unsigned nn, i;
2212         struct nvme_ns *ns;
2213         struct nvme_id_ctrl *ctrl;
2214         struct nvme_id_ns *id_ns;
2215         void *mem;
2216         dma_addr_t dma_addr;
2217         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2218
2219         mem = dma_alloc_coherent(&pdev->dev, 8192, &dma_addr, GFP_KERNEL);
2220         if (!mem)
2221                 return -ENOMEM;
2222
2223         res = nvme_identify(dev, 0, 1, dma_addr);
2224         if (res) {
2225                 dev_err(&pdev->dev, "Identify Controller failed (%d)\n", res);
2226                 res = -EIO;
2227                 goto out;
2228         }
2229
2230         ctrl = mem;
2231         nn = le32_to_cpup(&ctrl->nn);
2232         dev->oncs = le16_to_cpup(&ctrl->oncs);
2233         dev->abort_limit = ctrl->acl + 1;
2234         dev->vwc = ctrl->vwc;
2235         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2236         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2237         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2238         if (ctrl->mdts)
2239                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2240         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2241                         (pdev->device == 0x0953) && ctrl->vs[3])
2242                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2243
2244         id_ns = mem;
2245         for (i = 1; i <= nn; i++) {
2246                 res = nvme_identify(dev, i, 0, dma_addr);
2247                 if (res)
2248                         continue;
2249
2250                 if (id_ns->ncap == 0)
2251                         continue;
2252
2253                 res = nvme_get_features(dev, NVME_FEAT_LBA_RANGE, i,
2254                                                         dma_addr + 4096, NULL);
2255                 if (res)
2256                         memset(mem + 4096, 0, 4096);
2257
2258                 ns = nvme_alloc_ns(dev, i, mem, mem + 4096);
2259                 if (ns)
2260                         list_add_tail(&ns->list, &dev->namespaces);
2261         }
2262         list_for_each_entry(ns, &dev->namespaces, list)
2263                 add_disk(ns->disk);
2264         res = 0;
2265
2266  out:
2267         dma_free_coherent(&dev->pci_dev->dev, 8192, mem, dma_addr);
2268         return res;
2269 }
2270
2271 static int nvme_dev_map(struct nvme_dev *dev)
2272 {
2273         u64 cap;
2274         int bars, result = -ENOMEM;
2275         struct pci_dev *pdev = dev->pci_dev;
2276
2277         if (pci_enable_device_mem(pdev))
2278                 return result;
2279
2280         dev->entry[0].vector = pdev->irq;
2281         pci_set_master(pdev);
2282         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2283         if (pci_request_selected_regions(pdev, bars, "nvme"))
2284                 goto disable_pci;
2285
2286         if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) &&
2287             dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))
2288                 goto disable;
2289
2290         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2291         if (!dev->bar)
2292                 goto disable;
2293         if (readl(&dev->bar->csts) == -1) {
2294                 result = -ENODEV;
2295                 goto unmap;
2296         }
2297         cap = readq(&dev->bar->cap);
2298         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2299         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2300         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2301
2302         return 0;
2303
2304  unmap:
2305         iounmap(dev->bar);
2306         dev->bar = NULL;
2307  disable:
2308         pci_release_regions(pdev);
2309  disable_pci:
2310         pci_disable_device(pdev);
2311         return result;
2312 }
2313
2314 static void nvme_dev_unmap(struct nvme_dev *dev)
2315 {
2316         if (dev->pci_dev->msi_enabled)
2317                 pci_disable_msi(dev->pci_dev);
2318         else if (dev->pci_dev->msix_enabled)
2319                 pci_disable_msix(dev->pci_dev);
2320
2321         if (dev->bar) {
2322                 iounmap(dev->bar);
2323                 dev->bar = NULL;
2324                 pci_release_regions(dev->pci_dev);
2325         }
2326
2327         if (pci_is_enabled(dev->pci_dev))
2328                 pci_disable_device(dev->pci_dev);
2329 }
2330
2331 struct nvme_delq_ctx {
2332         struct task_struct *waiter;
2333         struct kthread_worker *worker;
2334         atomic_t refcount;
2335 };
2336
2337 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2338 {
2339         dq->waiter = current;
2340         mb();
2341
2342         for (;;) {
2343                 set_current_state(TASK_KILLABLE);
2344                 if (!atomic_read(&dq->refcount))
2345                         break;
2346                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2347                                         fatal_signal_pending(current)) {
2348                         set_current_state(TASK_RUNNING);
2349
2350                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2351                         nvme_disable_queue(dev, 0);
2352
2353                         send_sig(SIGKILL, dq->worker->task, 1);
2354                         flush_kthread_worker(dq->worker);
2355                         return;
2356                 }
2357         }
2358         set_current_state(TASK_RUNNING);
2359 }
2360
2361 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2362 {
2363         atomic_dec(&dq->refcount);
2364         if (dq->waiter)
2365                 wake_up_process(dq->waiter);
2366 }
2367
2368 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2369 {
2370         atomic_inc(&dq->refcount);
2371         return dq;
2372 }
2373
2374 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2375 {
2376         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2377
2378         nvme_clear_queue(nvmeq);
2379         nvme_put_dq(dq);
2380 }
2381
2382 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2383                                                 kthread_work_func_t fn)
2384 {
2385         struct nvme_command c;
2386
2387         memset(&c, 0, sizeof(c));
2388         c.delete_queue.opcode = opcode;
2389         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2390
2391         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2392         return nvme_submit_admin_cmd_async(nvmeq->dev, &c, &nvmeq->cmdinfo);
2393 }
2394
2395 static void nvme_del_cq_work_handler(struct kthread_work *work)
2396 {
2397         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2398                                                         cmdinfo.work);
2399         nvme_del_queue_end(nvmeq);
2400 }
2401
2402 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2403 {
2404         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2405                                                 nvme_del_cq_work_handler);
2406 }
2407
2408 static void nvme_del_sq_work_handler(struct kthread_work *work)
2409 {
2410         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2411                                                         cmdinfo.work);
2412         int status = nvmeq->cmdinfo.status;
2413
2414         if (!status)
2415                 status = nvme_delete_cq(nvmeq);
2416         if (status)
2417                 nvme_del_queue_end(nvmeq);
2418 }
2419
2420 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2421 {
2422         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2423                                                 nvme_del_sq_work_handler);
2424 }
2425
2426 static void nvme_del_queue_start(struct kthread_work *work)
2427 {
2428         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2429                                                         cmdinfo.work);
2430         allow_signal(SIGKILL);
2431         if (nvme_delete_sq(nvmeq))
2432                 nvme_del_queue_end(nvmeq);
2433 }
2434
2435 static void nvme_disable_io_queues(struct nvme_dev *dev)
2436 {
2437         int i;
2438         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2439         struct nvme_delq_ctx dq;
2440         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2441                                         &worker, "nvme%d", dev->instance);
2442
2443         if (IS_ERR(kworker_task)) {
2444                 dev_err(&dev->pci_dev->dev,
2445                         "Failed to create queue del task\n");
2446                 for (i = dev->queue_count - 1; i > 0; i--)
2447                         nvme_disable_queue(dev, i);
2448                 return;
2449         }
2450
2451         dq.waiter = NULL;
2452         atomic_set(&dq.refcount, 0);
2453         dq.worker = &worker;
2454         for (i = dev->queue_count - 1; i > 0; i--) {
2455                 struct nvme_queue *nvmeq = raw_nvmeq(dev, i);
2456
2457                 if (nvme_suspend_queue(nvmeq))
2458                         continue;
2459                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2460                 nvmeq->cmdinfo.worker = dq.worker;
2461                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2462                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2463         }
2464         nvme_wait_dq(&dq, dev);
2465         kthread_stop(kworker_task);
2466 }
2467
2468 /*
2469 * Remove the node from the device list and check
2470 * for whether or not we need to stop the nvme_thread.
2471 */
2472 static void nvme_dev_list_remove(struct nvme_dev *dev)
2473 {
2474         struct task_struct *tmp = NULL;
2475
2476         spin_lock(&dev_list_lock);
2477         list_del_init(&dev->node);
2478         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2479                 tmp = nvme_thread;
2480                 nvme_thread = NULL;
2481         }
2482         spin_unlock(&dev_list_lock);
2483
2484         if (tmp)
2485                 kthread_stop(tmp);
2486 }
2487
2488 static void nvme_dev_shutdown(struct nvme_dev *dev)
2489 {
2490         int i;
2491
2492         dev->initialized = 0;
2493         unregister_hotcpu_notifier(&dev->nb);
2494
2495         nvme_dev_list_remove(dev);
2496
2497         if (!dev->bar || (dev->bar && readl(&dev->bar->csts) == -1)) {
2498                 for (i = dev->queue_count - 1; i >= 0; i--) {
2499                         struct nvme_queue *nvmeq = raw_nvmeq(dev, i);
2500                         nvme_suspend_queue(nvmeq);
2501                         nvme_clear_queue(nvmeq);
2502                 }
2503         } else {
2504                 nvme_disable_io_queues(dev);
2505                 nvme_shutdown_ctrl(dev);
2506                 nvme_disable_queue(dev, 0);
2507         }
2508         nvme_dev_unmap(dev);
2509 }
2510
2511 static void nvme_dev_remove(struct nvme_dev *dev)
2512 {
2513         struct nvme_ns *ns;
2514
2515         list_for_each_entry(ns, &dev->namespaces, list) {
2516                 if (ns->disk->flags & GENHD_FL_UP)
2517                         del_gendisk(ns->disk);
2518                 if (!blk_queue_dying(ns->queue))
2519                         blk_cleanup_queue(ns->queue);
2520         }
2521 }
2522
2523 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2524 {
2525         struct device *dmadev = &dev->pci_dev->dev;
2526         dev->prp_page_pool = dma_pool_create("prp list page", dmadev,
2527                                                 PAGE_SIZE, PAGE_SIZE, 0);
2528         if (!dev->prp_page_pool)
2529                 return -ENOMEM;
2530
2531         /* Optimisation for I/Os between 4k and 128k */
2532         dev->prp_small_pool = dma_pool_create("prp list 256", dmadev,
2533                                                 256, 256, 0);
2534         if (!dev->prp_small_pool) {
2535                 dma_pool_destroy(dev->prp_page_pool);
2536                 return -ENOMEM;
2537         }
2538         return 0;
2539 }
2540
2541 static void nvme_release_prp_pools(struct nvme_dev *dev)
2542 {
2543         dma_pool_destroy(dev->prp_page_pool);
2544         dma_pool_destroy(dev->prp_small_pool);
2545 }
2546
2547 static DEFINE_IDA(nvme_instance_ida);
2548
2549 static int nvme_set_instance(struct nvme_dev *dev)
2550 {
2551         int instance, error;
2552
2553         do {
2554                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2555                         return -ENODEV;
2556
2557                 spin_lock(&dev_list_lock);
2558                 error = ida_get_new(&nvme_instance_ida, &instance);
2559                 spin_unlock(&dev_list_lock);
2560         } while (error == -EAGAIN);
2561
2562         if (error)
2563                 return -ENODEV;
2564
2565         dev->instance = instance;
2566         return 0;
2567 }
2568
2569 static void nvme_release_instance(struct nvme_dev *dev)
2570 {
2571         spin_lock(&dev_list_lock);
2572         ida_remove(&nvme_instance_ida, dev->instance);
2573         spin_unlock(&dev_list_lock);
2574 }
2575
2576 static void nvme_free_namespaces(struct nvme_dev *dev)
2577 {
2578         struct nvme_ns *ns, *next;
2579
2580         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2581                 list_del(&ns->list);
2582                 put_disk(ns->disk);
2583                 kfree(ns);
2584         }
2585 }
2586
2587 static void nvme_free_dev(struct kref *kref)
2588 {
2589         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2590
2591         nvme_free_namespaces(dev);
2592         free_percpu(dev->io_queue);
2593         kfree(dev->queues);
2594         kfree(dev->entry);
2595         kfree(dev);
2596 }
2597
2598 static int nvme_dev_open(struct inode *inode, struct file *f)
2599 {
2600         struct nvme_dev *dev = container_of(f->private_data, struct nvme_dev,
2601                                                                 miscdev);
2602         kref_get(&dev->kref);
2603         f->private_data = dev;
2604         return 0;
2605 }
2606
2607 static int nvme_dev_release(struct inode *inode, struct file *f)
2608 {
2609         struct nvme_dev *dev = f->private_data;
2610         kref_put(&dev->kref, nvme_free_dev);
2611         return 0;
2612 }
2613
2614 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2615 {
2616         struct nvme_dev *dev = f->private_data;
2617         switch (cmd) {
2618         case NVME_IOCTL_ADMIN_CMD:
2619                 return nvme_user_admin_cmd(dev, (void __user *)arg);
2620         default:
2621                 return -ENOTTY;
2622         }
2623 }
2624
2625 static const struct file_operations nvme_dev_fops = {
2626         .owner          = THIS_MODULE,
2627         .open           = nvme_dev_open,
2628         .release        = nvme_dev_release,
2629         .unlocked_ioctl = nvme_dev_ioctl,
2630         .compat_ioctl   = nvme_dev_ioctl,
2631 };
2632
2633 static int nvme_dev_start(struct nvme_dev *dev)
2634 {
2635         int result;
2636         bool start_thread = false;
2637
2638         result = nvme_dev_map(dev);
2639         if (result)
2640                 return result;
2641
2642         result = nvme_configure_admin_queue(dev);
2643         if (result)
2644                 goto unmap;
2645
2646         spin_lock(&dev_list_lock);
2647         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2648                 start_thread = true;
2649                 nvme_thread = NULL;
2650         }
2651         list_add(&dev->node, &dev_list);
2652         spin_unlock(&dev_list_lock);
2653
2654         if (start_thread) {
2655                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2656                 wake_up(&nvme_kthread_wait);
2657         } else
2658                 wait_event_killable(nvme_kthread_wait, nvme_thread);
2659
2660         if (IS_ERR_OR_NULL(nvme_thread)) {
2661                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2662                 goto disable;
2663         }
2664
2665         result = nvme_setup_io_queues(dev);
2666         if (result && result != -EBUSY)
2667                 goto disable;
2668
2669         return result;
2670
2671  disable:
2672         nvme_disable_queue(dev, 0);
2673         nvme_dev_list_remove(dev);
2674  unmap:
2675         nvme_dev_unmap(dev);
2676         return result;
2677 }
2678
2679 static int nvme_remove_dead_ctrl(void *arg)
2680 {
2681         struct nvme_dev *dev = (struct nvme_dev *)arg;
2682         struct pci_dev *pdev = dev->pci_dev;
2683
2684         if (pci_get_drvdata(pdev))
2685                 pci_stop_and_remove_bus_device(pdev);
2686         kref_put(&dev->kref, nvme_free_dev);
2687         return 0;
2688 }
2689
2690 static void nvme_remove_disks(struct work_struct *ws)
2691 {
2692         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2693
2694         nvme_dev_remove(dev);
2695         nvme_free_queues(dev, 1);
2696 }
2697
2698 static int nvme_dev_resume(struct nvme_dev *dev)
2699 {
2700         int ret;
2701
2702         ret = nvme_dev_start(dev);
2703         if (ret && ret != -EBUSY)
2704                 return ret;
2705         if (ret == -EBUSY) {
2706                 spin_lock(&dev_list_lock);
2707                 dev->reset_workfn = nvme_remove_disks;
2708                 queue_work(nvme_workq, &dev->reset_work);
2709                 spin_unlock(&dev_list_lock);
2710         }
2711         dev->initialized = 1;
2712         return 0;
2713 }
2714
2715 static void nvme_dev_reset(struct nvme_dev *dev)
2716 {
2717         nvme_dev_shutdown(dev);
2718         if (nvme_dev_resume(dev)) {
2719                 dev_err(&dev->pci_dev->dev, "Device failed to resume\n");
2720                 kref_get(&dev->kref);
2721                 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
2722                                                         dev->instance))) {
2723                         dev_err(&dev->pci_dev->dev,
2724                                 "Failed to start controller remove task\n");
2725                         kref_put(&dev->kref, nvme_free_dev);
2726                 }
2727         }
2728 }
2729
2730 static void nvme_reset_failed_dev(struct work_struct *ws)
2731 {
2732         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2733         nvme_dev_reset(dev);
2734 }
2735
2736 static void nvme_reset_workfn(struct work_struct *work)
2737 {
2738         struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
2739         dev->reset_workfn(work);
2740 }
2741
2742 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2743 {
2744         int result = -ENOMEM;
2745         struct nvme_dev *dev;
2746
2747         dev = kzalloc(sizeof(*dev), GFP_KERNEL);
2748         if (!dev)
2749                 return -ENOMEM;
2750         dev->entry = kcalloc(num_possible_cpus(), sizeof(*dev->entry),
2751                                                                 GFP_KERNEL);
2752         if (!dev->entry)
2753                 goto free;
2754         dev->queues = kcalloc(num_possible_cpus() + 1, sizeof(void *),
2755                                                                 GFP_KERNEL);
2756         if (!dev->queues)
2757                 goto free;
2758         dev->io_queue = alloc_percpu(unsigned short);
2759         if (!dev->io_queue)
2760                 goto free;
2761
2762         INIT_LIST_HEAD(&dev->namespaces);
2763         dev->reset_workfn = nvme_reset_failed_dev;
2764         INIT_WORK(&dev->reset_work, nvme_reset_workfn);
2765         dev->pci_dev = pdev;
2766         pci_set_drvdata(pdev, dev);
2767         result = nvme_set_instance(dev);
2768         if (result)
2769                 goto free;
2770
2771         result = nvme_setup_prp_pools(dev);
2772         if (result)
2773                 goto release;
2774
2775         kref_init(&dev->kref);
2776         result = nvme_dev_start(dev);
2777         if (result) {
2778                 if (result == -EBUSY)
2779                         goto create_cdev;
2780                 goto release_pools;
2781         }
2782
2783         result = nvme_dev_add(dev);
2784         if (result)
2785                 goto shutdown;
2786
2787  create_cdev:
2788         scnprintf(dev->name, sizeof(dev->name), "nvme%d", dev->instance);
2789         dev->miscdev.minor = MISC_DYNAMIC_MINOR;
2790         dev->miscdev.parent = &pdev->dev;
2791         dev->miscdev.name = dev->name;
2792         dev->miscdev.fops = &nvme_dev_fops;
2793         result = misc_register(&dev->miscdev);
2794         if (result)
2795                 goto remove;
2796
2797         dev->initialized = 1;
2798         return 0;
2799
2800  remove:
2801         nvme_dev_remove(dev);
2802         nvme_free_namespaces(dev);
2803  shutdown:
2804         nvme_dev_shutdown(dev);
2805  release_pools:
2806         nvme_free_queues(dev, 0);
2807         nvme_release_prp_pools(dev);
2808  release:
2809         nvme_release_instance(dev);
2810  free:
2811         free_percpu(dev->io_queue);
2812         kfree(dev->queues);
2813         kfree(dev->entry);
2814         kfree(dev);
2815         return result;
2816 }
2817
2818 static void nvme_shutdown(struct pci_dev *pdev)
2819 {
2820         struct nvme_dev *dev = pci_get_drvdata(pdev);
2821         nvme_dev_shutdown(dev);
2822 }
2823
2824 static void nvme_remove(struct pci_dev *pdev)
2825 {
2826         struct nvme_dev *dev = pci_get_drvdata(pdev);
2827
2828         spin_lock(&dev_list_lock);
2829         list_del_init(&dev->node);
2830         spin_unlock(&dev_list_lock);
2831
2832         pci_set_drvdata(pdev, NULL);
2833         flush_work(&dev->reset_work);
2834         misc_deregister(&dev->miscdev);
2835         nvme_dev_remove(dev);
2836         nvme_dev_shutdown(dev);
2837         nvme_free_queues(dev, 0);
2838         rcu_barrier();
2839         nvme_release_instance(dev);
2840         nvme_release_prp_pools(dev);
2841         kref_put(&dev->kref, nvme_free_dev);
2842 }
2843
2844 /* These functions are yet to be implemented */
2845 #define nvme_error_detected NULL
2846 #define nvme_dump_registers NULL
2847 #define nvme_link_reset NULL
2848 #define nvme_slot_reset NULL
2849 #define nvme_error_resume NULL
2850
2851 #ifdef CONFIG_PM_SLEEP
2852 static int nvme_suspend(struct device *dev)
2853 {
2854         struct pci_dev *pdev = to_pci_dev(dev);
2855         struct nvme_dev *ndev = pci_get_drvdata(pdev);
2856
2857         nvme_dev_shutdown(ndev);
2858         return 0;
2859 }
2860
2861 static int nvme_resume(struct device *dev)
2862 {
2863         struct pci_dev *pdev = to_pci_dev(dev);
2864         struct nvme_dev *ndev = pci_get_drvdata(pdev);
2865
2866         if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
2867                 ndev->reset_workfn = nvme_reset_failed_dev;
2868                 queue_work(nvme_workq, &ndev->reset_work);
2869         }
2870         return 0;
2871 }
2872 #endif
2873
2874 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
2875
2876 static const struct pci_error_handlers nvme_err_handler = {
2877         .error_detected = nvme_error_detected,
2878         .mmio_enabled   = nvme_dump_registers,
2879         .link_reset     = nvme_link_reset,
2880         .slot_reset     = nvme_slot_reset,
2881         .resume         = nvme_error_resume,
2882 };
2883
2884 /* Move to pci_ids.h later */
2885 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
2886
2887 static const struct pci_device_id nvme_id_table[] = {
2888         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
2889         { 0, }
2890 };
2891 MODULE_DEVICE_TABLE(pci, nvme_id_table);
2892
2893 static struct pci_driver nvme_driver = {
2894         .name           = "nvme",
2895         .id_table       = nvme_id_table,
2896         .probe          = nvme_probe,
2897         .remove         = nvme_remove,
2898         .shutdown       = nvme_shutdown,
2899         .driver         = {
2900                 .pm     = &nvme_dev_pm_ops,
2901         },
2902         .err_handler    = &nvme_err_handler,
2903 };
2904
2905 static int __init nvme_init(void)
2906 {
2907         int result;
2908
2909         init_waitqueue_head(&nvme_kthread_wait);
2910
2911         nvme_workq = create_singlethread_workqueue("nvme");
2912         if (!nvme_workq)
2913                 return -ENOMEM;
2914
2915         result = register_blkdev(nvme_major, "nvme");
2916         if (result < 0)
2917                 goto kill_workq;
2918         else if (result > 0)
2919                 nvme_major = result;
2920
2921         result = pci_register_driver(&nvme_driver);
2922         if (result)
2923                 goto unregister_blkdev;
2924         return 0;
2925
2926  unregister_blkdev:
2927         unregister_blkdev(nvme_major, "nvme");
2928  kill_workq:
2929         destroy_workqueue(nvme_workq);
2930         return result;
2931 }
2932
2933 static void __exit nvme_exit(void)
2934 {
2935         pci_unregister_driver(&nvme_driver);
2936         unregister_blkdev(nvme_major, "nvme");
2937         destroy_workqueue(nvme_workq);
2938         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
2939         _nvme_check_size();
2940 }
2941
2942 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
2943 MODULE_LICENSE("GPL");
2944 MODULE_VERSION("0.9");
2945 module_init(nvme_init);
2946 module_exit(nvme_exit);