NVMe: Mismatched host/device page size support
[firefly-linux-kernel-4.4.55.git] / drivers / block / nvme-core.c
1 /*
2  * NVM Express device driver
3  * Copyright (c) 2011-2014, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  */
14
15 #include <linux/nvme.h>
16 #include <linux/bio.h>
17 #include <linux/bitops.h>
18 #include <linux/blkdev.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
22 #include <linux/fs.h>
23 #include <linux/genhd.h>
24 #include <linux/hdreg.h>
25 #include <linux/idr.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
28 #include <linux/io.h>
29 #include <linux/kdev_t.h>
30 #include <linux/kthread.h>
31 #include <linux/kernel.h>
32 #include <linux/mm.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pci.h>
36 #include <linux/percpu.h>
37 #include <linux/poison.h>
38 #include <linux/ptrace.h>
39 #include <linux/sched.h>
40 #include <linux/slab.h>
41 #include <linux/types.h>
42 #include <scsi/sg.h>
43 #include <asm-generic/io-64-nonatomic-lo-hi.h>
44
45 #include <trace/events/block.h>
46
47 #define NVME_Q_DEPTH            1024
48 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
49 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
50 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
51 #define IOD_TIMEOUT             (retry_time * HZ)
52
53 static unsigned char admin_timeout = 60;
54 module_param(admin_timeout, byte, 0644);
55 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
56
57 unsigned char nvme_io_timeout = 30;
58 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
59 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
60
61 static unsigned char retry_time = 30;
62 module_param(retry_time, byte, 0644);
63 MODULE_PARM_DESC(retry_time, "time in seconds to retry failed I/O");
64
65 static int nvme_major;
66 module_param(nvme_major, int, 0);
67
68 static int use_threaded_interrupts;
69 module_param(use_threaded_interrupts, int, 0);
70
71 static DEFINE_SPINLOCK(dev_list_lock);
72 static LIST_HEAD(dev_list);
73 static struct task_struct *nvme_thread;
74 static struct workqueue_struct *nvme_workq;
75 static wait_queue_head_t nvme_kthread_wait;
76 static struct notifier_block nvme_nb;
77
78 static void nvme_reset_failed_dev(struct work_struct *ws);
79
80 struct async_cmd_info {
81         struct kthread_work work;
82         struct kthread_worker *worker;
83         u32 result;
84         int status;
85         void *ctx;
86 };
87
88 /*
89  * An NVM Express queue.  Each device has at least two (one for admin
90  * commands and one for I/O commands).
91  */
92 struct nvme_queue {
93         struct rcu_head r_head;
94         struct device *q_dmadev;
95         struct nvme_dev *dev;
96         char irqname[24];       /* nvme4294967295-65535\0 */
97         spinlock_t q_lock;
98         struct nvme_command *sq_cmds;
99         volatile struct nvme_completion *cqes;
100         dma_addr_t sq_dma_addr;
101         dma_addr_t cq_dma_addr;
102         wait_queue_head_t sq_full;
103         wait_queue_t sq_cong_wait;
104         struct bio_list sq_cong;
105         struct list_head iod_bio;
106         u32 __iomem *q_db;
107         u16 q_depth;
108         u16 cq_vector;
109         u16 sq_head;
110         u16 sq_tail;
111         u16 cq_head;
112         u16 qid;
113         u8 cq_phase;
114         u8 cqe_seen;
115         u8 q_suspended;
116         cpumask_var_t cpu_mask;
117         struct async_cmd_info cmdinfo;
118         unsigned long cmdid_data[];
119 };
120
121 /*
122  * Check we didin't inadvertently grow the command struct
123  */
124 static inline void _nvme_check_size(void)
125 {
126         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
127         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
128         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
129         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
130         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
131         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
132         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
133         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
134         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
135         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
136         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
137         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
138 }
139
140 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
141                                                 struct nvme_completion *);
142
143 struct nvme_cmd_info {
144         nvme_completion_fn fn;
145         void *ctx;
146         unsigned long timeout;
147         int aborted;
148 };
149
150 static struct nvme_cmd_info *nvme_cmd_info(struct nvme_queue *nvmeq)
151 {
152         return (void *)&nvmeq->cmdid_data[BITS_TO_LONGS(nvmeq->q_depth)];
153 }
154
155 static unsigned nvme_queue_extra(int depth)
156 {
157         return DIV_ROUND_UP(depth, 8) + (depth * sizeof(struct nvme_cmd_info));
158 }
159
160 /**
161  * alloc_cmdid() - Allocate a Command ID
162  * @nvmeq: The queue that will be used for this command
163  * @ctx: A pointer that will be passed to the handler
164  * @handler: The function to call on completion
165  *
166  * Allocate a Command ID for a queue.  The data passed in will
167  * be passed to the completion handler.  This is implemented by using
168  * the bottom two bits of the ctx pointer to store the handler ID.
169  * Passing in a pointer that's not 4-byte aligned will cause a BUG.
170  * We can change this if it becomes a problem.
171  *
172  * May be called with local interrupts disabled and the q_lock held,
173  * or with interrupts enabled and no locks held.
174  */
175 static int alloc_cmdid(struct nvme_queue *nvmeq, void *ctx,
176                                 nvme_completion_fn handler, unsigned timeout)
177 {
178         int depth = nvmeq->q_depth - 1;
179         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
180         int cmdid;
181
182         do {
183                 cmdid = find_first_zero_bit(nvmeq->cmdid_data, depth);
184                 if (cmdid >= depth)
185                         return -EBUSY;
186         } while (test_and_set_bit(cmdid, nvmeq->cmdid_data));
187
188         info[cmdid].fn = handler;
189         info[cmdid].ctx = ctx;
190         info[cmdid].timeout = jiffies + timeout;
191         info[cmdid].aborted = 0;
192         return cmdid;
193 }
194
195 static int alloc_cmdid_killable(struct nvme_queue *nvmeq, void *ctx,
196                                 nvme_completion_fn handler, unsigned timeout)
197 {
198         int cmdid;
199         wait_event_killable(nvmeq->sq_full,
200                 (cmdid = alloc_cmdid(nvmeq, ctx, handler, timeout)) >= 0);
201         return (cmdid < 0) ? -EINTR : cmdid;
202 }
203
204 /* Special values must be less than 0x1000 */
205 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
206 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
207 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
208 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
209 #define CMD_CTX_ABORT           (0x318 + CMD_CTX_BASE)
210 #define CMD_CTX_ASYNC           (0x31C + CMD_CTX_BASE)
211
212 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
213                                                 struct nvme_completion *cqe)
214 {
215         if (ctx == CMD_CTX_CANCELLED)
216                 return;
217         if (ctx == CMD_CTX_ABORT) {
218                 ++nvmeq->dev->abort_limit;
219                 return;
220         }
221         if (ctx == CMD_CTX_COMPLETED) {
222                 dev_warn(nvmeq->q_dmadev,
223                                 "completed id %d twice on queue %d\n",
224                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
225                 return;
226         }
227         if (ctx == CMD_CTX_INVALID) {
228                 dev_warn(nvmeq->q_dmadev,
229                                 "invalid id %d completed on queue %d\n",
230                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
231                 return;
232         }
233         if (ctx == CMD_CTX_ASYNC) {
234                 u32 result = le32_to_cpup(&cqe->result);
235                 u16 status = le16_to_cpup(&cqe->status) >> 1;
236
237                 if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
238                         ++nvmeq->dev->event_limit;
239                 if (status == NVME_SC_SUCCESS)
240                         dev_warn(nvmeq->q_dmadev,
241                                 "async event result %08x\n", result);
242                 return;
243         }
244
245         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
246 }
247
248 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
249                                                 struct nvme_completion *cqe)
250 {
251         struct async_cmd_info *cmdinfo = ctx;
252         cmdinfo->result = le32_to_cpup(&cqe->result);
253         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
254         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
255 }
256
257 /*
258  * Called with local interrupts disabled and the q_lock held.  May not sleep.
259  */
260 static void *free_cmdid(struct nvme_queue *nvmeq, int cmdid,
261                                                 nvme_completion_fn *fn)
262 {
263         void *ctx;
264         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
265
266         if (cmdid >= nvmeq->q_depth || !info[cmdid].fn) {
267                 if (fn)
268                         *fn = special_completion;
269                 return CMD_CTX_INVALID;
270         }
271         if (fn)
272                 *fn = info[cmdid].fn;
273         ctx = info[cmdid].ctx;
274         info[cmdid].fn = special_completion;
275         info[cmdid].ctx = CMD_CTX_COMPLETED;
276         clear_bit(cmdid, nvmeq->cmdid_data);
277         wake_up(&nvmeq->sq_full);
278         return ctx;
279 }
280
281 static void *cancel_cmdid(struct nvme_queue *nvmeq, int cmdid,
282                                                 nvme_completion_fn *fn)
283 {
284         void *ctx;
285         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
286         if (fn)
287                 *fn = info[cmdid].fn;
288         ctx = info[cmdid].ctx;
289         info[cmdid].fn = special_completion;
290         info[cmdid].ctx = CMD_CTX_CANCELLED;
291         return ctx;
292 }
293
294 static struct nvme_queue *raw_nvmeq(struct nvme_dev *dev, int qid)
295 {
296         return rcu_dereference_raw(dev->queues[qid]);
297 }
298
299 static struct nvme_queue *get_nvmeq(struct nvme_dev *dev) __acquires(RCU)
300 {
301         struct nvme_queue *nvmeq;
302         unsigned queue_id = get_cpu_var(*dev->io_queue);
303
304         rcu_read_lock();
305         nvmeq = rcu_dereference(dev->queues[queue_id]);
306         if (nvmeq)
307                 return nvmeq;
308
309         rcu_read_unlock();
310         put_cpu_var(*dev->io_queue);
311         return NULL;
312 }
313
314 static void put_nvmeq(struct nvme_queue *nvmeq) __releases(RCU)
315 {
316         rcu_read_unlock();
317         put_cpu_var(nvmeq->dev->io_queue);
318 }
319
320 static struct nvme_queue *lock_nvmeq(struct nvme_dev *dev, int q_idx)
321                                                         __acquires(RCU)
322 {
323         struct nvme_queue *nvmeq;
324
325         rcu_read_lock();
326         nvmeq = rcu_dereference(dev->queues[q_idx]);
327         if (nvmeq)
328                 return nvmeq;
329
330         rcu_read_unlock();
331         return NULL;
332 }
333
334 static void unlock_nvmeq(struct nvme_queue *nvmeq) __releases(RCU)
335 {
336         rcu_read_unlock();
337 }
338
339 /**
340  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
341  * @nvmeq: The queue to use
342  * @cmd: The command to send
343  *
344  * Safe to use from interrupt context
345  */
346 static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
347 {
348         unsigned long flags;
349         u16 tail;
350         spin_lock_irqsave(&nvmeq->q_lock, flags);
351         if (nvmeq->q_suspended) {
352                 spin_unlock_irqrestore(&nvmeq->q_lock, flags);
353                 return -EBUSY;
354         }
355         tail = nvmeq->sq_tail;
356         memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
357         if (++tail == nvmeq->q_depth)
358                 tail = 0;
359         writel(tail, nvmeq->q_db);
360         nvmeq->sq_tail = tail;
361         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
362
363         return 0;
364 }
365
366 static __le64 **iod_list(struct nvme_iod *iod)
367 {
368         return ((void *)iod) + iod->offset;
369 }
370
371 /*
372  * Will slightly overestimate the number of pages needed.  This is OK
373  * as it only leads to a small amount of wasted memory for the lifetime of
374  * the I/O.
375  */
376 static int nvme_npages(unsigned size, struct nvme_dev *dev)
377 {
378         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
379         return DIV_ROUND_UP(8 * nprps, dev->page_size - 8);
380 }
381
382 static struct nvme_iod *
383 nvme_alloc_iod(unsigned nseg, unsigned nbytes, struct nvme_dev *dev, gfp_t gfp)
384 {
385         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
386                                 sizeof(__le64 *) * nvme_npages(nbytes, dev) +
387                                 sizeof(struct scatterlist) * nseg, gfp);
388
389         if (iod) {
390                 iod->offset = offsetof(struct nvme_iod, sg[nseg]);
391                 iod->npages = -1;
392                 iod->length = nbytes;
393                 iod->nents = 0;
394                 iod->first_dma = 0ULL;
395                 iod->start_time = jiffies;
396         }
397
398         return iod;
399 }
400
401 void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
402 {
403         const int last_prp = dev->page_size / 8 - 1;
404         int i;
405         __le64 **list = iod_list(iod);
406         dma_addr_t prp_dma = iod->first_dma;
407
408         if (iod->npages == 0)
409                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
410         for (i = 0; i < iod->npages; i++) {
411                 __le64 *prp_list = list[i];
412                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
413                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
414                 prp_dma = next_prp_dma;
415         }
416         kfree(iod);
417 }
418
419 static void nvme_start_io_acct(struct bio *bio)
420 {
421         struct gendisk *disk = bio->bi_bdev->bd_disk;
422         if (blk_queue_io_stat(disk->queue)) {
423                 const int rw = bio_data_dir(bio);
424                 int cpu = part_stat_lock();
425                 part_round_stats(cpu, &disk->part0);
426                 part_stat_inc(cpu, &disk->part0, ios[rw]);
427                 part_stat_add(cpu, &disk->part0, sectors[rw],
428                                                         bio_sectors(bio));
429                 part_inc_in_flight(&disk->part0, rw);
430                 part_stat_unlock();
431         }
432 }
433
434 static void nvme_end_io_acct(struct bio *bio, unsigned long start_time)
435 {
436         struct gendisk *disk = bio->bi_bdev->bd_disk;
437         if (blk_queue_io_stat(disk->queue)) {
438                 const int rw = bio_data_dir(bio);
439                 unsigned long duration = jiffies - start_time;
440                 int cpu = part_stat_lock();
441                 part_stat_add(cpu, &disk->part0, ticks[rw], duration);
442                 part_round_stats(cpu, &disk->part0);
443                 part_dec_in_flight(&disk->part0, rw);
444                 part_stat_unlock();
445         }
446 }
447
448 static void bio_completion(struct nvme_queue *nvmeq, void *ctx,
449                                                 struct nvme_completion *cqe)
450 {
451         struct nvme_iod *iod = ctx;
452         struct bio *bio = iod->private;
453         u16 status = le16_to_cpup(&cqe->status) >> 1;
454         int error = 0;
455
456         if (unlikely(status)) {
457                 if (!(status & NVME_SC_DNR ||
458                                 bio->bi_rw & REQ_FAILFAST_MASK) &&
459                                 (jiffies - iod->start_time) < IOD_TIMEOUT) {
460                         if (!waitqueue_active(&nvmeq->sq_full))
461                                 add_wait_queue(&nvmeq->sq_full,
462                                                         &nvmeq->sq_cong_wait);
463                         list_add_tail(&iod->node, &nvmeq->iod_bio);
464                         wake_up(&nvmeq->sq_full);
465                         return;
466                 }
467                 error = -EIO;
468         }
469         if (iod->nents) {
470                 dma_unmap_sg(nvmeq->q_dmadev, iod->sg, iod->nents,
471                         bio_data_dir(bio) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
472                 nvme_end_io_acct(bio, iod->start_time);
473         }
474         nvme_free_iod(nvmeq->dev, iod);
475
476         trace_block_bio_complete(bdev_get_queue(bio->bi_bdev), bio, error);
477         bio_endio(bio, error);
478 }
479
480 /* length is in bytes.  gfp flags indicates whether we may sleep. */
481 int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod, int total_len,
482                                                                 gfp_t gfp)
483 {
484         struct dma_pool *pool;
485         int length = total_len;
486         struct scatterlist *sg = iod->sg;
487         int dma_len = sg_dma_len(sg);
488         u64 dma_addr = sg_dma_address(sg);
489         int offset = offset_in_page(dma_addr);
490         __le64 *prp_list;
491         __le64 **list = iod_list(iod);
492         dma_addr_t prp_dma;
493         int nprps, i;
494         u32 page_size = dev->page_size;
495
496         length -= (page_size - offset);
497         if (length <= 0)
498                 return total_len;
499
500         dma_len -= (page_size - offset);
501         if (dma_len) {
502                 dma_addr += (page_size - offset);
503         } else {
504                 sg = sg_next(sg);
505                 dma_addr = sg_dma_address(sg);
506                 dma_len = sg_dma_len(sg);
507         }
508
509         if (length <= page_size) {
510                 iod->first_dma = dma_addr;
511                 return total_len;
512         }
513
514         nprps = DIV_ROUND_UP(length, page_size);
515         if (nprps <= (256 / 8)) {
516                 pool = dev->prp_small_pool;
517                 iod->npages = 0;
518         } else {
519                 pool = dev->prp_page_pool;
520                 iod->npages = 1;
521         }
522
523         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
524         if (!prp_list) {
525                 iod->first_dma = dma_addr;
526                 iod->npages = -1;
527                 return (total_len - length) + page_size;
528         }
529         list[0] = prp_list;
530         iod->first_dma = prp_dma;
531         i = 0;
532         for (;;) {
533                 if (i == page_size >> 3) {
534                         __le64 *old_prp_list = prp_list;
535                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
536                         if (!prp_list)
537                                 return total_len - length;
538                         list[iod->npages++] = prp_list;
539                         prp_list[0] = old_prp_list[i - 1];
540                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
541                         i = 1;
542                 }
543                 prp_list[i++] = cpu_to_le64(dma_addr);
544                 dma_len -= page_size;
545                 dma_addr += page_size;
546                 length -= page_size;
547                 if (length <= 0)
548                         break;
549                 if (dma_len > 0)
550                         continue;
551                 BUG_ON(dma_len < 0);
552                 sg = sg_next(sg);
553                 dma_addr = sg_dma_address(sg);
554                 dma_len = sg_dma_len(sg);
555         }
556
557         return total_len;
558 }
559
560 static int nvme_split_and_submit(struct bio *bio, struct nvme_queue *nvmeq,
561                                  int len)
562 {
563         struct bio *split = bio_split(bio, len >> 9, GFP_ATOMIC, NULL);
564         if (!split)
565                 return -ENOMEM;
566
567         trace_block_split(bdev_get_queue(bio->bi_bdev), bio,
568                                         split->bi_iter.bi_sector);
569         bio_chain(split, bio);
570
571         if (!waitqueue_active(&nvmeq->sq_full))
572                 add_wait_queue(&nvmeq->sq_full, &nvmeq->sq_cong_wait);
573         bio_list_add(&nvmeq->sq_cong, split);
574         bio_list_add(&nvmeq->sq_cong, bio);
575         wake_up(&nvmeq->sq_full);
576
577         return 0;
578 }
579
580 /* NVMe scatterlists require no holes in the virtual address */
581 #define BIOVEC_NOT_VIRT_MERGEABLE(vec1, vec2)   ((vec2)->bv_offset || \
582                         (((vec1)->bv_offset + (vec1)->bv_len) % PAGE_SIZE))
583
584 static int nvme_map_bio(struct nvme_queue *nvmeq, struct nvme_iod *iod,
585                 struct bio *bio, enum dma_data_direction dma_dir, int psegs)
586 {
587         struct bio_vec bvec, bvprv;
588         struct bvec_iter iter;
589         struct scatterlist *sg = NULL;
590         int length = 0, nsegs = 0, split_len = bio->bi_iter.bi_size;
591         int first = 1;
592
593         if (nvmeq->dev->stripe_size)
594                 split_len = nvmeq->dev->stripe_size -
595                         ((bio->bi_iter.bi_sector << 9) &
596                          (nvmeq->dev->stripe_size - 1));
597
598         sg_init_table(iod->sg, psegs);
599         bio_for_each_segment(bvec, bio, iter) {
600                 if (!first && BIOVEC_PHYS_MERGEABLE(&bvprv, &bvec)) {
601                         sg->length += bvec.bv_len;
602                 } else {
603                         if (!first && BIOVEC_NOT_VIRT_MERGEABLE(&bvprv, &bvec))
604                                 return nvme_split_and_submit(bio, nvmeq,
605                                                              length);
606
607                         sg = sg ? sg + 1 : iod->sg;
608                         sg_set_page(sg, bvec.bv_page,
609                                     bvec.bv_len, bvec.bv_offset);
610                         nsegs++;
611                 }
612
613                 if (split_len - length < bvec.bv_len)
614                         return nvme_split_and_submit(bio, nvmeq, split_len);
615                 length += bvec.bv_len;
616                 bvprv = bvec;
617                 first = 0;
618         }
619         iod->nents = nsegs;
620         sg_mark_end(sg);
621         if (dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir) == 0)
622                 return -ENOMEM;
623
624         BUG_ON(length != bio->bi_iter.bi_size);
625         return length;
626 }
627
628 static int nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
629                 struct bio *bio, struct nvme_iod *iod, int cmdid)
630 {
631         struct nvme_dsm_range *range =
632                                 (struct nvme_dsm_range *)iod_list(iod)[0];
633         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
634
635         range->cattr = cpu_to_le32(0);
636         range->nlb = cpu_to_le32(bio->bi_iter.bi_size >> ns->lba_shift);
637         range->slba = cpu_to_le64(nvme_block_nr(ns, bio->bi_iter.bi_sector));
638
639         memset(cmnd, 0, sizeof(*cmnd));
640         cmnd->dsm.opcode = nvme_cmd_dsm;
641         cmnd->dsm.command_id = cmdid;
642         cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
643         cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
644         cmnd->dsm.nr = 0;
645         cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
646
647         if (++nvmeq->sq_tail == nvmeq->q_depth)
648                 nvmeq->sq_tail = 0;
649         writel(nvmeq->sq_tail, nvmeq->q_db);
650
651         return 0;
652 }
653
654 static int nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
655                                                                 int cmdid)
656 {
657         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
658
659         memset(cmnd, 0, sizeof(*cmnd));
660         cmnd->common.opcode = nvme_cmd_flush;
661         cmnd->common.command_id = cmdid;
662         cmnd->common.nsid = cpu_to_le32(ns->ns_id);
663
664         if (++nvmeq->sq_tail == nvmeq->q_depth)
665                 nvmeq->sq_tail = 0;
666         writel(nvmeq->sq_tail, nvmeq->q_db);
667
668         return 0;
669 }
670
671 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod)
672 {
673         struct bio *bio = iod->private;
674         struct nvme_ns *ns = bio->bi_bdev->bd_disk->private_data;
675         struct nvme_command *cmnd;
676         int cmdid;
677         u16 control;
678         u32 dsmgmt;
679
680         cmdid = alloc_cmdid(nvmeq, iod, bio_completion, NVME_IO_TIMEOUT);
681         if (unlikely(cmdid < 0))
682                 return cmdid;
683
684         if (bio->bi_rw & REQ_DISCARD)
685                 return nvme_submit_discard(nvmeq, ns, bio, iod, cmdid);
686         if (bio->bi_rw & REQ_FLUSH)
687                 return nvme_submit_flush(nvmeq, ns, cmdid);
688
689         control = 0;
690         if (bio->bi_rw & REQ_FUA)
691                 control |= NVME_RW_FUA;
692         if (bio->bi_rw & (REQ_FAILFAST_DEV | REQ_RAHEAD))
693                 control |= NVME_RW_LR;
694
695         dsmgmt = 0;
696         if (bio->bi_rw & REQ_RAHEAD)
697                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
698
699         cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
700         memset(cmnd, 0, sizeof(*cmnd));
701
702         cmnd->rw.opcode = bio_data_dir(bio) ? nvme_cmd_write : nvme_cmd_read;
703         cmnd->rw.command_id = cmdid;
704         cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
705         cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
706         cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
707         cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, bio->bi_iter.bi_sector));
708         cmnd->rw.length =
709                 cpu_to_le16((bio->bi_iter.bi_size >> ns->lba_shift) - 1);
710         cmnd->rw.control = cpu_to_le16(control);
711         cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
712
713         if (++nvmeq->sq_tail == nvmeq->q_depth)
714                 nvmeq->sq_tail = 0;
715         writel(nvmeq->sq_tail, nvmeq->q_db);
716
717         return 0;
718 }
719
720 static int nvme_split_flush_data(struct nvme_queue *nvmeq, struct bio *bio)
721 {
722         struct bio *split = bio_clone(bio, GFP_ATOMIC);
723         if (!split)
724                 return -ENOMEM;
725
726         split->bi_iter.bi_size = 0;
727         split->bi_phys_segments = 0;
728         bio->bi_rw &= ~REQ_FLUSH;
729         bio_chain(split, bio);
730
731         if (!waitqueue_active(&nvmeq->sq_full))
732                 add_wait_queue(&nvmeq->sq_full, &nvmeq->sq_cong_wait);
733         bio_list_add(&nvmeq->sq_cong, split);
734         bio_list_add(&nvmeq->sq_cong, bio);
735         wake_up_process(nvme_thread);
736
737         return 0;
738 }
739
740 /*
741  * Called with local interrupts disabled and the q_lock held.  May not sleep.
742  */
743 static int nvme_submit_bio_queue(struct nvme_queue *nvmeq, struct nvme_ns *ns,
744                                                                 struct bio *bio)
745 {
746         struct nvme_iod *iod;
747         int psegs = bio_phys_segments(ns->queue, bio);
748         int result;
749
750         if ((bio->bi_rw & REQ_FLUSH) && psegs)
751                 return nvme_split_flush_data(nvmeq, bio);
752
753         iod = nvme_alloc_iod(psegs, bio->bi_iter.bi_size, ns->dev, GFP_ATOMIC);
754         if (!iod)
755                 return -ENOMEM;
756
757         iod->private = bio;
758         if (bio->bi_rw & REQ_DISCARD) {
759                 void *range;
760                 /*
761                  * We reuse the small pool to allocate the 16-byte range here
762                  * as it is not worth having a special pool for these or
763                  * additional cases to handle freeing the iod.
764                  */
765                 range = dma_pool_alloc(nvmeq->dev->prp_small_pool,
766                                                 GFP_ATOMIC,
767                                                 &iod->first_dma);
768                 if (!range) {
769                         result = -ENOMEM;
770                         goto free_iod;
771                 }
772                 iod_list(iod)[0] = (__le64 *)range;
773                 iod->npages = 0;
774         } else if (psegs) {
775                 result = nvme_map_bio(nvmeq, iod, bio,
776                         bio_data_dir(bio) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
777                         psegs);
778                 if (result <= 0)
779                         goto free_iod;
780                 if (nvme_setup_prps(nvmeq->dev, iod, result, GFP_ATOMIC) !=
781                                                                 result) {
782                         result = -ENOMEM;
783                         goto free_iod;
784                 }
785                 nvme_start_io_acct(bio);
786         }
787         if (unlikely(nvme_submit_iod(nvmeq, iod))) {
788                 if (!waitqueue_active(&nvmeq->sq_full))
789                         add_wait_queue(&nvmeq->sq_full, &nvmeq->sq_cong_wait);
790                 list_add_tail(&iod->node, &nvmeq->iod_bio);
791         }
792         return 0;
793
794  free_iod:
795         nvme_free_iod(nvmeq->dev, iod);
796         return result;
797 }
798
799 static int nvme_process_cq(struct nvme_queue *nvmeq)
800 {
801         u16 head, phase;
802
803         head = nvmeq->cq_head;
804         phase = nvmeq->cq_phase;
805
806         for (;;) {
807                 void *ctx;
808                 nvme_completion_fn fn;
809                 struct nvme_completion cqe = nvmeq->cqes[head];
810                 if ((le16_to_cpu(cqe.status) & 1) != phase)
811                         break;
812                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
813                 if (++head == nvmeq->q_depth) {
814                         head = 0;
815                         phase = !phase;
816                 }
817
818                 ctx = free_cmdid(nvmeq, cqe.command_id, &fn);
819                 fn(nvmeq, ctx, &cqe);
820         }
821
822         /* If the controller ignores the cq head doorbell and continuously
823          * writes to the queue, it is theoretically possible to wrap around
824          * the queue twice and mistakenly return IRQ_NONE.  Linux only
825          * requires that 0.1% of your interrupts are handled, so this isn't
826          * a big problem.
827          */
828         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
829                 return 0;
830
831         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
832         nvmeq->cq_head = head;
833         nvmeq->cq_phase = phase;
834
835         nvmeq->cqe_seen = 1;
836         return 1;
837 }
838
839 static void nvme_make_request(struct request_queue *q, struct bio *bio)
840 {
841         struct nvme_ns *ns = q->queuedata;
842         struct nvme_queue *nvmeq = get_nvmeq(ns->dev);
843         int result = -EBUSY;
844
845         if (!nvmeq) {
846                 bio_endio(bio, -EIO);
847                 return;
848         }
849
850         spin_lock_irq(&nvmeq->q_lock);
851         if (!nvmeq->q_suspended && bio_list_empty(&nvmeq->sq_cong))
852                 result = nvme_submit_bio_queue(nvmeq, ns, bio);
853         if (unlikely(result)) {
854                 if (!waitqueue_active(&nvmeq->sq_full))
855                         add_wait_queue(&nvmeq->sq_full, &nvmeq->sq_cong_wait);
856                 bio_list_add(&nvmeq->sq_cong, bio);
857         }
858
859         nvme_process_cq(nvmeq);
860         spin_unlock_irq(&nvmeq->q_lock);
861         put_nvmeq(nvmeq);
862 }
863
864 static irqreturn_t nvme_irq(int irq, void *data)
865 {
866         irqreturn_t result;
867         struct nvme_queue *nvmeq = data;
868         spin_lock(&nvmeq->q_lock);
869         nvme_process_cq(nvmeq);
870         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
871         nvmeq->cqe_seen = 0;
872         spin_unlock(&nvmeq->q_lock);
873         return result;
874 }
875
876 static irqreturn_t nvme_irq_check(int irq, void *data)
877 {
878         struct nvme_queue *nvmeq = data;
879         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
880         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
881                 return IRQ_NONE;
882         return IRQ_WAKE_THREAD;
883 }
884
885 static void nvme_abort_command(struct nvme_queue *nvmeq, int cmdid)
886 {
887         spin_lock_irq(&nvmeq->q_lock);
888         cancel_cmdid(nvmeq, cmdid, NULL);
889         spin_unlock_irq(&nvmeq->q_lock);
890 }
891
892 struct sync_cmd_info {
893         struct task_struct *task;
894         u32 result;
895         int status;
896 };
897
898 static void sync_completion(struct nvme_queue *nvmeq, void *ctx,
899                                                 struct nvme_completion *cqe)
900 {
901         struct sync_cmd_info *cmdinfo = ctx;
902         cmdinfo->result = le32_to_cpup(&cqe->result);
903         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
904         wake_up_process(cmdinfo->task);
905 }
906
907 /*
908  * Returns 0 on success.  If the result is negative, it's a Linux error code;
909  * if the result is positive, it's an NVM Express status code
910  */
911 static int nvme_submit_sync_cmd(struct nvme_dev *dev, int q_idx,
912                                                 struct nvme_command *cmd,
913                                                 u32 *result, unsigned timeout)
914 {
915         int cmdid, ret;
916         struct sync_cmd_info cmdinfo;
917         struct nvme_queue *nvmeq;
918
919         nvmeq = lock_nvmeq(dev, q_idx);
920         if (!nvmeq)
921                 return -ENODEV;
922
923         cmdinfo.task = current;
924         cmdinfo.status = -EINTR;
925
926         cmdid = alloc_cmdid(nvmeq, &cmdinfo, sync_completion, timeout);
927         if (cmdid < 0) {
928                 unlock_nvmeq(nvmeq);
929                 return cmdid;
930         }
931         cmd->common.command_id = cmdid;
932
933         set_current_state(TASK_KILLABLE);
934         ret = nvme_submit_cmd(nvmeq, cmd);
935         if (ret) {
936                 free_cmdid(nvmeq, cmdid, NULL);
937                 unlock_nvmeq(nvmeq);
938                 set_current_state(TASK_RUNNING);
939                 return ret;
940         }
941         unlock_nvmeq(nvmeq);
942         schedule_timeout(timeout);
943
944         if (cmdinfo.status == -EINTR) {
945                 nvmeq = lock_nvmeq(dev, q_idx);
946                 if (nvmeq) {
947                         nvme_abort_command(nvmeq, cmdid);
948                         unlock_nvmeq(nvmeq);
949                 }
950                 return -EINTR;
951         }
952
953         if (result)
954                 *result = cmdinfo.result;
955
956         return cmdinfo.status;
957 }
958
959 static int nvme_submit_async_cmd(struct nvme_queue *nvmeq,
960                         struct nvme_command *cmd,
961                         struct async_cmd_info *cmdinfo, unsigned timeout)
962 {
963         int cmdid;
964
965         cmdid = alloc_cmdid_killable(nvmeq, cmdinfo, async_completion, timeout);
966         if (cmdid < 0)
967                 return cmdid;
968         cmdinfo->status = -EINTR;
969         cmd->common.command_id = cmdid;
970         return nvme_submit_cmd(nvmeq, cmd);
971 }
972
973 int nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
974                                                                 u32 *result)
975 {
976         return nvme_submit_sync_cmd(dev, 0, cmd, result, ADMIN_TIMEOUT);
977 }
978
979 int nvme_submit_io_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
980                                                                 u32 *result)
981 {
982         return nvme_submit_sync_cmd(dev, smp_processor_id() + 1, cmd, result,
983                                                         NVME_IO_TIMEOUT);
984 }
985
986 static int nvme_submit_admin_cmd_async(struct nvme_dev *dev,
987                 struct nvme_command *cmd, struct async_cmd_info *cmdinfo)
988 {
989         return nvme_submit_async_cmd(raw_nvmeq(dev, 0), cmd, cmdinfo,
990                                                                 ADMIN_TIMEOUT);
991 }
992
993 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
994 {
995         int status;
996         struct nvme_command c;
997
998         memset(&c, 0, sizeof(c));
999         c.delete_queue.opcode = opcode;
1000         c.delete_queue.qid = cpu_to_le16(id);
1001
1002         status = nvme_submit_admin_cmd(dev, &c, NULL);
1003         if (status)
1004                 return -EIO;
1005         return 0;
1006 }
1007
1008 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1009                                                 struct nvme_queue *nvmeq)
1010 {
1011         int status;
1012         struct nvme_command c;
1013         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1014
1015         memset(&c, 0, sizeof(c));
1016         c.create_cq.opcode = nvme_admin_create_cq;
1017         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1018         c.create_cq.cqid = cpu_to_le16(qid);
1019         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1020         c.create_cq.cq_flags = cpu_to_le16(flags);
1021         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1022
1023         status = nvme_submit_admin_cmd(dev, &c, NULL);
1024         if (status)
1025                 return -EIO;
1026         return 0;
1027 }
1028
1029 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1030                                                 struct nvme_queue *nvmeq)
1031 {
1032         int status;
1033         struct nvme_command c;
1034         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1035
1036         memset(&c, 0, sizeof(c));
1037         c.create_sq.opcode = nvme_admin_create_sq;
1038         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1039         c.create_sq.sqid = cpu_to_le16(qid);
1040         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1041         c.create_sq.sq_flags = cpu_to_le16(flags);
1042         c.create_sq.cqid = cpu_to_le16(qid);
1043
1044         status = nvme_submit_admin_cmd(dev, &c, NULL);
1045         if (status)
1046                 return -EIO;
1047         return 0;
1048 }
1049
1050 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1051 {
1052         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1053 }
1054
1055 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1056 {
1057         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1058 }
1059
1060 int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns,
1061                                                         dma_addr_t dma_addr)
1062 {
1063         struct nvme_command c;
1064
1065         memset(&c, 0, sizeof(c));
1066         c.identify.opcode = nvme_admin_identify;
1067         c.identify.nsid = cpu_to_le32(nsid);
1068         c.identify.prp1 = cpu_to_le64(dma_addr);
1069         c.identify.cns = cpu_to_le32(cns);
1070
1071         return nvme_submit_admin_cmd(dev, &c, NULL);
1072 }
1073
1074 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1075                                         dma_addr_t dma_addr, u32 *result)
1076 {
1077         struct nvme_command c;
1078
1079         memset(&c, 0, sizeof(c));
1080         c.features.opcode = nvme_admin_get_features;
1081         c.features.nsid = cpu_to_le32(nsid);
1082         c.features.prp1 = cpu_to_le64(dma_addr);
1083         c.features.fid = cpu_to_le32(fid);
1084
1085         return nvme_submit_admin_cmd(dev, &c, result);
1086 }
1087
1088 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1089                                         dma_addr_t dma_addr, u32 *result)
1090 {
1091         struct nvme_command c;
1092
1093         memset(&c, 0, sizeof(c));
1094         c.features.opcode = nvme_admin_set_features;
1095         c.features.prp1 = cpu_to_le64(dma_addr);
1096         c.features.fid = cpu_to_le32(fid);
1097         c.features.dword11 = cpu_to_le32(dword11);
1098
1099         return nvme_submit_admin_cmd(dev, &c, result);
1100 }
1101
1102 /**
1103  * nvme_abort_cmd - Attempt aborting a command
1104  * @cmdid: Command id of a timed out IO
1105  * @queue: The queue with timed out IO
1106  *
1107  * Schedule controller reset if the command was already aborted once before and
1108  * still hasn't been returned to the driver, or if this is the admin queue.
1109  */
1110 static void nvme_abort_cmd(int cmdid, struct nvme_queue *nvmeq)
1111 {
1112         int a_cmdid;
1113         struct nvme_command cmd;
1114         struct nvme_dev *dev = nvmeq->dev;
1115         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
1116         struct nvme_queue *adminq;
1117
1118         if (!nvmeq->qid || info[cmdid].aborted) {
1119                 if (work_busy(&dev->reset_work))
1120                         return;
1121                 list_del_init(&dev->node);
1122                 dev_warn(&dev->pci_dev->dev,
1123                         "I/O %d QID %d timeout, reset controller\n", cmdid,
1124                                                                 nvmeq->qid);
1125                 dev->reset_workfn = nvme_reset_failed_dev;
1126                 queue_work(nvme_workq, &dev->reset_work);
1127                 return;
1128         }
1129
1130         if (!dev->abort_limit)
1131                 return;
1132
1133         adminq = rcu_dereference(dev->queues[0]);
1134         a_cmdid = alloc_cmdid(adminq, CMD_CTX_ABORT, special_completion,
1135                                                                 ADMIN_TIMEOUT);
1136         if (a_cmdid < 0)
1137                 return;
1138
1139         memset(&cmd, 0, sizeof(cmd));
1140         cmd.abort.opcode = nvme_admin_abort_cmd;
1141         cmd.abort.cid = cmdid;
1142         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1143         cmd.abort.command_id = a_cmdid;
1144
1145         --dev->abort_limit;
1146         info[cmdid].aborted = 1;
1147         info[cmdid].timeout = jiffies + ADMIN_TIMEOUT;
1148
1149         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", cmdid,
1150                                                         nvmeq->qid);
1151         nvme_submit_cmd(adminq, &cmd);
1152 }
1153
1154 /**
1155  * nvme_cancel_ios - Cancel outstanding I/Os
1156  * @queue: The queue to cancel I/Os on
1157  * @timeout: True to only cancel I/Os which have timed out
1158  */
1159 static void nvme_cancel_ios(struct nvme_queue *nvmeq, bool timeout)
1160 {
1161         int depth = nvmeq->q_depth - 1;
1162         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
1163         unsigned long now = jiffies;
1164         int cmdid;
1165
1166         for_each_set_bit(cmdid, nvmeq->cmdid_data, depth) {
1167                 void *ctx;
1168                 nvme_completion_fn fn;
1169                 static struct nvme_completion cqe = {
1170                         .status = cpu_to_le16(NVME_SC_ABORT_REQ << 1),
1171                 };
1172
1173                 if (timeout && !time_after(now, info[cmdid].timeout))
1174                         continue;
1175                 if (info[cmdid].ctx == CMD_CTX_CANCELLED)
1176                         continue;
1177                 if (timeout && info[cmdid].ctx == CMD_CTX_ASYNC)
1178                         continue;
1179                 if (timeout && nvmeq->dev->initialized) {
1180                         nvme_abort_cmd(cmdid, nvmeq);
1181                         continue;
1182                 }
1183                 dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n", cmdid,
1184                                                                 nvmeq->qid);
1185                 ctx = cancel_cmdid(nvmeq, cmdid, &fn);
1186                 fn(nvmeq, ctx, &cqe);
1187         }
1188 }
1189
1190 static void nvme_free_queue(struct rcu_head *r)
1191 {
1192         struct nvme_queue *nvmeq = container_of(r, struct nvme_queue, r_head);
1193
1194         spin_lock_irq(&nvmeq->q_lock);
1195         while (bio_list_peek(&nvmeq->sq_cong)) {
1196                 struct bio *bio = bio_list_pop(&nvmeq->sq_cong);
1197                 bio_endio(bio, -EIO);
1198         }
1199         while (!list_empty(&nvmeq->iod_bio)) {
1200                 static struct nvme_completion cqe = {
1201                         .status = cpu_to_le16(
1202                                 (NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1),
1203                 };
1204                 struct nvme_iod *iod = list_first_entry(&nvmeq->iod_bio,
1205                                                         struct nvme_iod,
1206                                                         node);
1207                 list_del(&iod->node);
1208                 bio_completion(nvmeq, iod, &cqe);
1209         }
1210         spin_unlock_irq(&nvmeq->q_lock);
1211
1212         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1213                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1214         dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1215                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1216         if (nvmeq->qid)
1217                 free_cpumask_var(nvmeq->cpu_mask);
1218         kfree(nvmeq);
1219 }
1220
1221 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1222 {
1223         int i;
1224
1225         for (i = dev->queue_count - 1; i >= lowest; i--) {
1226                 struct nvme_queue *nvmeq = raw_nvmeq(dev, i);
1227                 rcu_assign_pointer(dev->queues[i], NULL);
1228                 call_rcu(&nvmeq->r_head, nvme_free_queue);
1229                 dev->queue_count--;
1230         }
1231 }
1232
1233 /**
1234  * nvme_suspend_queue - put queue into suspended state
1235  * @nvmeq - queue to suspend
1236  *
1237  * Returns 1 if already suspended, 0 otherwise.
1238  */
1239 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1240 {
1241         int vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1242
1243         spin_lock_irq(&nvmeq->q_lock);
1244         if (nvmeq->q_suspended) {
1245                 spin_unlock_irq(&nvmeq->q_lock);
1246                 return 1;
1247         }
1248         nvmeq->q_suspended = 1;
1249         nvmeq->dev->online_queues--;
1250         spin_unlock_irq(&nvmeq->q_lock);
1251
1252         irq_set_affinity_hint(vector, NULL);
1253         free_irq(vector, nvmeq);
1254
1255         return 0;
1256 }
1257
1258 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1259 {
1260         spin_lock_irq(&nvmeq->q_lock);
1261         nvme_process_cq(nvmeq);
1262         nvme_cancel_ios(nvmeq, false);
1263         spin_unlock_irq(&nvmeq->q_lock);
1264 }
1265
1266 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1267 {
1268         struct nvme_queue *nvmeq = raw_nvmeq(dev, qid);
1269
1270         if (!nvmeq)
1271                 return;
1272         if (nvme_suspend_queue(nvmeq))
1273                 return;
1274
1275         /* Don't tell the adapter to delete the admin queue.
1276          * Don't tell a removed adapter to delete IO queues. */
1277         if (qid && readl(&dev->bar->csts) != -1) {
1278                 adapter_delete_sq(dev, qid);
1279                 adapter_delete_cq(dev, qid);
1280         }
1281         nvme_clear_queue(nvmeq);
1282 }
1283
1284 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1285                                                         int depth, int vector)
1286 {
1287         struct device *dmadev = &dev->pci_dev->dev;
1288         unsigned extra = nvme_queue_extra(depth);
1289         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq) + extra, GFP_KERNEL);
1290         if (!nvmeq)
1291                 return NULL;
1292
1293         nvmeq->cqes = dma_zalloc_coherent(dmadev, CQ_SIZE(depth),
1294                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1295         if (!nvmeq->cqes)
1296                 goto free_nvmeq;
1297
1298         nvmeq->sq_cmds = dma_alloc_coherent(dmadev, SQ_SIZE(depth),
1299                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1300         if (!nvmeq->sq_cmds)
1301                 goto free_cqdma;
1302
1303         if (qid && !zalloc_cpumask_var(&nvmeq->cpu_mask, GFP_KERNEL))
1304                 goto free_sqdma;
1305
1306         nvmeq->q_dmadev = dmadev;
1307         nvmeq->dev = dev;
1308         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1309                         dev->instance, qid);
1310         spin_lock_init(&nvmeq->q_lock);
1311         nvmeq->cq_head = 0;
1312         nvmeq->cq_phase = 1;
1313         init_waitqueue_head(&nvmeq->sq_full);
1314         init_waitqueue_entry(&nvmeq->sq_cong_wait, nvme_thread);
1315         bio_list_init(&nvmeq->sq_cong);
1316         INIT_LIST_HEAD(&nvmeq->iod_bio);
1317         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1318         nvmeq->q_depth = depth;
1319         nvmeq->cq_vector = vector;
1320         nvmeq->qid = qid;
1321         nvmeq->q_suspended = 1;
1322         dev->queue_count++;
1323         rcu_assign_pointer(dev->queues[qid], nvmeq);
1324
1325         return nvmeq;
1326
1327  free_sqdma:
1328         dma_free_coherent(dmadev, SQ_SIZE(depth), (void *)nvmeq->sq_cmds,
1329                                                         nvmeq->sq_dma_addr);
1330  free_cqdma:
1331         dma_free_coherent(dmadev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1332                                                         nvmeq->cq_dma_addr);
1333  free_nvmeq:
1334         kfree(nvmeq);
1335         return NULL;
1336 }
1337
1338 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1339                                                         const char *name)
1340 {
1341         if (use_threaded_interrupts)
1342                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1343                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1344                                         name, nvmeq);
1345         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1346                                 IRQF_SHARED, name, nvmeq);
1347 }
1348
1349 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1350 {
1351         struct nvme_dev *dev = nvmeq->dev;
1352         unsigned extra = nvme_queue_extra(nvmeq->q_depth);
1353
1354         nvmeq->sq_tail = 0;
1355         nvmeq->cq_head = 0;
1356         nvmeq->cq_phase = 1;
1357         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1358         memset(nvmeq->cmdid_data, 0, extra);
1359         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1360         nvme_cancel_ios(nvmeq, false);
1361         nvmeq->q_suspended = 0;
1362         dev->online_queues++;
1363 }
1364
1365 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1366 {
1367         struct nvme_dev *dev = nvmeq->dev;
1368         int result;
1369
1370         result = adapter_alloc_cq(dev, qid, nvmeq);
1371         if (result < 0)
1372                 return result;
1373
1374         result = adapter_alloc_sq(dev, qid, nvmeq);
1375         if (result < 0)
1376                 goto release_cq;
1377
1378         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1379         if (result < 0)
1380                 goto release_sq;
1381
1382         spin_lock_irq(&nvmeq->q_lock);
1383         nvme_init_queue(nvmeq, qid);
1384         spin_unlock_irq(&nvmeq->q_lock);
1385
1386         return result;
1387
1388  release_sq:
1389         adapter_delete_sq(dev, qid);
1390  release_cq:
1391         adapter_delete_cq(dev, qid);
1392         return result;
1393 }
1394
1395 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1396 {
1397         unsigned long timeout;
1398         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1399
1400         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1401
1402         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1403                 msleep(100);
1404                 if (fatal_signal_pending(current))
1405                         return -EINTR;
1406                 if (time_after(jiffies, timeout)) {
1407                         dev_err(&dev->pci_dev->dev,
1408                                 "Device not ready; aborting %s\n", enabled ?
1409                                                 "initialisation" : "reset");
1410                         return -ENODEV;
1411                 }
1412         }
1413
1414         return 0;
1415 }
1416
1417 /*
1418  * If the device has been passed off to us in an enabled state, just clear
1419  * the enabled bit.  The spec says we should set the 'shutdown notification
1420  * bits', but doing so may cause the device to complete commands to the
1421  * admin queue ... and we don't know what memory that might be pointing at!
1422  */
1423 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1424 {
1425         u32 cc = readl(&dev->bar->cc);
1426
1427         if (cc & NVME_CC_ENABLE)
1428                 writel(cc & ~NVME_CC_ENABLE, &dev->bar->cc);
1429         return nvme_wait_ready(dev, cap, false);
1430 }
1431
1432 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1433 {
1434         return nvme_wait_ready(dev, cap, true);
1435 }
1436
1437 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1438 {
1439         unsigned long timeout;
1440         u32 cc;
1441
1442         cc = (readl(&dev->bar->cc) & ~NVME_CC_SHN_MASK) | NVME_CC_SHN_NORMAL;
1443         writel(cc, &dev->bar->cc);
1444
1445         timeout = 2 * HZ + jiffies;
1446         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1447                                                         NVME_CSTS_SHST_CMPLT) {
1448                 msleep(100);
1449                 if (fatal_signal_pending(current))
1450                         return -EINTR;
1451                 if (time_after(jiffies, timeout)) {
1452                         dev_err(&dev->pci_dev->dev,
1453                                 "Device shutdown incomplete; abort shutdown\n");
1454                         return -ENODEV;
1455                 }
1456         }
1457
1458         return 0;
1459 }
1460
1461 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1462 {
1463         int result;
1464         u32 aqa;
1465         u64 cap = readq(&dev->bar->cap);
1466         struct nvme_queue *nvmeq;
1467         unsigned page_shift = PAGE_SHIFT;
1468         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1469         unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1470
1471         if (page_shift < dev_page_min) {
1472                 dev_err(&dev->pci_dev->dev,
1473                                 "Minimum device page size (%u) too large for "
1474                                 "host (%u)\n", 1 << dev_page_min,
1475                                 1 << page_shift);
1476                 return -ENODEV;
1477         }
1478         if (page_shift > dev_page_max) {
1479                 dev_info(&dev->pci_dev->dev,
1480                                 "Device maximum page size (%u) smaller than "
1481                                 "host (%u); enabling work-around\n",
1482                                 1 << dev_page_max, 1 << page_shift);
1483                 page_shift = dev_page_max;
1484         }
1485
1486         result = nvme_disable_ctrl(dev, cap);
1487         if (result < 0)
1488                 return result;
1489
1490         nvmeq = raw_nvmeq(dev, 0);
1491         if (!nvmeq) {
1492                 nvmeq = nvme_alloc_queue(dev, 0, 64, 0);
1493                 if (!nvmeq)
1494                         return -ENOMEM;
1495         }
1496
1497         aqa = nvmeq->q_depth - 1;
1498         aqa |= aqa << 16;
1499
1500         dev->page_size = 1 << page_shift;
1501
1502         dev->ctrl_config = NVME_CC_ENABLE | NVME_CC_CSS_NVM;
1503         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1504         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1505         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1506
1507         writel(aqa, &dev->bar->aqa);
1508         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1509         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1510         writel(dev->ctrl_config, &dev->bar->cc);
1511
1512         result = nvme_enable_ctrl(dev, cap);
1513         if (result)
1514                 return result;
1515
1516         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1517         if (result)
1518                 return result;
1519
1520         spin_lock_irq(&nvmeq->q_lock);
1521         nvme_init_queue(nvmeq, 0);
1522         spin_unlock_irq(&nvmeq->q_lock);
1523         return result;
1524 }
1525
1526 struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write,
1527                                 unsigned long addr, unsigned length)
1528 {
1529         int i, err, count, nents, offset;
1530         struct scatterlist *sg;
1531         struct page **pages;
1532         struct nvme_iod *iod;
1533
1534         if (addr & 3)
1535                 return ERR_PTR(-EINVAL);
1536         if (!length || length > INT_MAX - PAGE_SIZE)
1537                 return ERR_PTR(-EINVAL);
1538
1539         offset = offset_in_page(addr);
1540         count = DIV_ROUND_UP(offset + length, PAGE_SIZE);
1541         pages = kcalloc(count, sizeof(*pages), GFP_KERNEL);
1542         if (!pages)
1543                 return ERR_PTR(-ENOMEM);
1544
1545         err = get_user_pages_fast(addr, count, 1, pages);
1546         if (err < count) {
1547                 count = err;
1548                 err = -EFAULT;
1549                 goto put_pages;
1550         }
1551
1552         err = -ENOMEM;
1553         iod = nvme_alloc_iod(count, length, dev, GFP_KERNEL);
1554         if (!iod)
1555                 goto put_pages;
1556
1557         sg = iod->sg;
1558         sg_init_table(sg, count);
1559         for (i = 0; i < count; i++) {
1560                 sg_set_page(&sg[i], pages[i],
1561                             min_t(unsigned, length, PAGE_SIZE - offset),
1562                             offset);
1563                 length -= (PAGE_SIZE - offset);
1564                 offset = 0;
1565         }
1566         sg_mark_end(&sg[i - 1]);
1567         iod->nents = count;
1568
1569         nents = dma_map_sg(&dev->pci_dev->dev, sg, count,
1570                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1571         if (!nents)
1572                 goto free_iod;
1573
1574         kfree(pages);
1575         return iod;
1576
1577  free_iod:
1578         kfree(iod);
1579  put_pages:
1580         for (i = 0; i < count; i++)
1581                 put_page(pages[i]);
1582         kfree(pages);
1583         return ERR_PTR(err);
1584 }
1585
1586 void nvme_unmap_user_pages(struct nvme_dev *dev, int write,
1587                         struct nvme_iod *iod)
1588 {
1589         int i;
1590
1591         dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents,
1592                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1593
1594         for (i = 0; i < iod->nents; i++)
1595                 put_page(sg_page(&iod->sg[i]));
1596 }
1597
1598 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1599 {
1600         struct nvme_dev *dev = ns->dev;
1601         struct nvme_user_io io;
1602         struct nvme_command c;
1603         unsigned length, meta_len;
1604         int status, i;
1605         struct nvme_iod *iod, *meta_iod = NULL;
1606         dma_addr_t meta_dma_addr;
1607         void *meta, *uninitialized_var(meta_mem);
1608
1609         if (copy_from_user(&io, uio, sizeof(io)))
1610                 return -EFAULT;
1611         length = (io.nblocks + 1) << ns->lba_shift;
1612         meta_len = (io.nblocks + 1) * ns->ms;
1613
1614         if (meta_len && ((io.metadata & 3) || !io.metadata))
1615                 return -EINVAL;
1616
1617         switch (io.opcode) {
1618         case nvme_cmd_write:
1619         case nvme_cmd_read:
1620         case nvme_cmd_compare:
1621                 iod = nvme_map_user_pages(dev, io.opcode & 1, io.addr, length);
1622                 break;
1623         default:
1624                 return -EINVAL;
1625         }
1626
1627         if (IS_ERR(iod))
1628                 return PTR_ERR(iod);
1629
1630         memset(&c, 0, sizeof(c));
1631         c.rw.opcode = io.opcode;
1632         c.rw.flags = io.flags;
1633         c.rw.nsid = cpu_to_le32(ns->ns_id);
1634         c.rw.slba = cpu_to_le64(io.slba);
1635         c.rw.length = cpu_to_le16(io.nblocks);
1636         c.rw.control = cpu_to_le16(io.control);
1637         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1638         c.rw.reftag = cpu_to_le32(io.reftag);
1639         c.rw.apptag = cpu_to_le16(io.apptag);
1640         c.rw.appmask = cpu_to_le16(io.appmask);
1641
1642         if (meta_len) {
1643                 meta_iod = nvme_map_user_pages(dev, io.opcode & 1, io.metadata,
1644                                                                 meta_len);
1645                 if (IS_ERR(meta_iod)) {
1646                         status = PTR_ERR(meta_iod);
1647                         meta_iod = NULL;
1648                         goto unmap;
1649                 }
1650
1651                 meta_mem = dma_alloc_coherent(&dev->pci_dev->dev, meta_len,
1652                                                 &meta_dma_addr, GFP_KERNEL);
1653                 if (!meta_mem) {
1654                         status = -ENOMEM;
1655                         goto unmap;
1656                 }
1657
1658                 if (io.opcode & 1) {
1659                         int meta_offset = 0;
1660
1661                         for (i = 0; i < meta_iod->nents; i++) {
1662                                 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1663                                                 meta_iod->sg[i].offset;
1664                                 memcpy(meta_mem + meta_offset, meta,
1665                                                 meta_iod->sg[i].length);
1666                                 kunmap_atomic(meta);
1667                                 meta_offset += meta_iod->sg[i].length;
1668                         }
1669                 }
1670
1671                 c.rw.metadata = cpu_to_le64(meta_dma_addr);
1672         }
1673
1674         length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1675         c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1676         c.rw.prp2 = cpu_to_le64(iod->first_dma);
1677
1678         if (length != (io.nblocks + 1) << ns->lba_shift)
1679                 status = -ENOMEM;
1680         else
1681                 status = nvme_submit_io_cmd(dev, &c, NULL);
1682
1683         if (meta_len) {
1684                 if (status == NVME_SC_SUCCESS && !(io.opcode & 1)) {
1685                         int meta_offset = 0;
1686
1687                         for (i = 0; i < meta_iod->nents; i++) {
1688                                 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1689                                                 meta_iod->sg[i].offset;
1690                                 memcpy(meta, meta_mem + meta_offset,
1691                                                 meta_iod->sg[i].length);
1692                                 kunmap_atomic(meta);
1693                                 meta_offset += meta_iod->sg[i].length;
1694                         }
1695                 }
1696
1697                 dma_free_coherent(&dev->pci_dev->dev, meta_len, meta_mem,
1698                                                                 meta_dma_addr);
1699         }
1700
1701  unmap:
1702         nvme_unmap_user_pages(dev, io.opcode & 1, iod);
1703         nvme_free_iod(dev, iod);
1704
1705         if (meta_iod) {
1706                 nvme_unmap_user_pages(dev, io.opcode & 1, meta_iod);
1707                 nvme_free_iod(dev, meta_iod);
1708         }
1709
1710         return status;
1711 }
1712
1713 static int nvme_user_admin_cmd(struct nvme_dev *dev,
1714                                         struct nvme_admin_cmd __user *ucmd)
1715 {
1716         struct nvme_admin_cmd cmd;
1717         struct nvme_command c;
1718         int status, length;
1719         struct nvme_iod *uninitialized_var(iod);
1720         unsigned timeout;
1721
1722         if (!capable(CAP_SYS_ADMIN))
1723                 return -EACCES;
1724         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1725                 return -EFAULT;
1726
1727         memset(&c, 0, sizeof(c));
1728         c.common.opcode = cmd.opcode;
1729         c.common.flags = cmd.flags;
1730         c.common.nsid = cpu_to_le32(cmd.nsid);
1731         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1732         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1733         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1734         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1735         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1736         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1737         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1738         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1739
1740         length = cmd.data_len;
1741         if (cmd.data_len) {
1742                 iod = nvme_map_user_pages(dev, cmd.opcode & 1, cmd.addr,
1743                                                                 length);
1744                 if (IS_ERR(iod))
1745                         return PTR_ERR(iod);
1746                 length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1747                 c.common.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1748                 c.common.prp2 = cpu_to_le64(iod->first_dma);
1749         }
1750
1751         timeout = cmd.timeout_ms ? msecs_to_jiffies(cmd.timeout_ms) :
1752                                                                 ADMIN_TIMEOUT;
1753         if (length != cmd.data_len)
1754                 status = -ENOMEM;
1755         else
1756                 status = nvme_submit_sync_cmd(dev, 0, &c, &cmd.result, timeout);
1757
1758         if (cmd.data_len) {
1759                 nvme_unmap_user_pages(dev, cmd.opcode & 1, iod);
1760                 nvme_free_iod(dev, iod);
1761         }
1762
1763         if ((status >= 0) && copy_to_user(&ucmd->result, &cmd.result,
1764                                                         sizeof(cmd.result)))
1765                 status = -EFAULT;
1766
1767         return status;
1768 }
1769
1770 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1771                                                         unsigned long arg)
1772 {
1773         struct nvme_ns *ns = bdev->bd_disk->private_data;
1774
1775         switch (cmd) {
1776         case NVME_IOCTL_ID:
1777                 force_successful_syscall_return();
1778                 return ns->ns_id;
1779         case NVME_IOCTL_ADMIN_CMD:
1780                 return nvme_user_admin_cmd(ns->dev, (void __user *)arg);
1781         case NVME_IOCTL_SUBMIT_IO:
1782                 return nvme_submit_io(ns, (void __user *)arg);
1783         case SG_GET_VERSION_NUM:
1784                 return nvme_sg_get_version_num((void __user *)arg);
1785         case SG_IO:
1786                 return nvme_sg_io(ns, (void __user *)arg);
1787         default:
1788                 return -ENOTTY;
1789         }
1790 }
1791
1792 #ifdef CONFIG_COMPAT
1793 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1794                                         unsigned int cmd, unsigned long arg)
1795 {
1796         struct nvme_ns *ns = bdev->bd_disk->private_data;
1797
1798         switch (cmd) {
1799         case SG_IO:
1800                 return nvme_sg_io32(ns, arg);
1801         }
1802         return nvme_ioctl(bdev, mode, cmd, arg);
1803 }
1804 #else
1805 #define nvme_compat_ioctl       NULL
1806 #endif
1807
1808 static int nvme_open(struct block_device *bdev, fmode_t mode)
1809 {
1810         struct nvme_ns *ns = bdev->bd_disk->private_data;
1811         struct nvme_dev *dev = ns->dev;
1812
1813         kref_get(&dev->kref);
1814         return 0;
1815 }
1816
1817 static void nvme_free_dev(struct kref *kref);
1818
1819 static void nvme_release(struct gendisk *disk, fmode_t mode)
1820 {
1821         struct nvme_ns *ns = disk->private_data;
1822         struct nvme_dev *dev = ns->dev;
1823
1824         kref_put(&dev->kref, nvme_free_dev);
1825 }
1826
1827 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1828 {
1829         /* some standard values */
1830         geo->heads = 1 << 6;
1831         geo->sectors = 1 << 5;
1832         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1833         return 0;
1834 }
1835
1836 static const struct block_device_operations nvme_fops = {
1837         .owner          = THIS_MODULE,
1838         .ioctl          = nvme_ioctl,
1839         .compat_ioctl   = nvme_compat_ioctl,
1840         .open           = nvme_open,
1841         .release        = nvme_release,
1842         .getgeo         = nvme_getgeo,
1843 };
1844
1845 static void nvme_resubmit_iods(struct nvme_queue *nvmeq)
1846 {
1847         struct nvme_iod *iod, *next;
1848
1849         list_for_each_entry_safe(iod, next, &nvmeq->iod_bio, node) {
1850                 if (unlikely(nvme_submit_iod(nvmeq, iod)))
1851                         break;
1852                 list_del(&iod->node);
1853                 if (bio_list_empty(&nvmeq->sq_cong) &&
1854                                                 list_empty(&nvmeq->iod_bio))
1855                         remove_wait_queue(&nvmeq->sq_full,
1856                                                 &nvmeq->sq_cong_wait);
1857         }
1858 }
1859
1860 static void nvme_resubmit_bios(struct nvme_queue *nvmeq)
1861 {
1862         while (bio_list_peek(&nvmeq->sq_cong)) {
1863                 struct bio *bio = bio_list_pop(&nvmeq->sq_cong);
1864                 struct nvme_ns *ns = bio->bi_bdev->bd_disk->private_data;
1865
1866                 if (bio_list_empty(&nvmeq->sq_cong) &&
1867                                                 list_empty(&nvmeq->iod_bio))
1868                         remove_wait_queue(&nvmeq->sq_full,
1869                                                         &nvmeq->sq_cong_wait);
1870                 if (nvme_submit_bio_queue(nvmeq, ns, bio)) {
1871                         if (!waitqueue_active(&nvmeq->sq_full))
1872                                 add_wait_queue(&nvmeq->sq_full,
1873                                                         &nvmeq->sq_cong_wait);
1874                         bio_list_add_head(&nvmeq->sq_cong, bio);
1875                         break;
1876                 }
1877         }
1878 }
1879
1880 static int nvme_submit_async_req(struct nvme_queue *nvmeq)
1881 {
1882         struct nvme_command *c;
1883         int cmdid;
1884
1885         cmdid = alloc_cmdid(nvmeq, CMD_CTX_ASYNC, special_completion, 0);
1886         if (cmdid < 0)
1887                 return cmdid;
1888
1889         c = &nvmeq->sq_cmds[nvmeq->sq_tail];
1890         memset(c, 0, sizeof(*c));
1891         c->common.opcode = nvme_admin_async_event;
1892         c->common.command_id = cmdid;
1893
1894         if (++nvmeq->sq_tail == nvmeq->q_depth)
1895                 nvmeq->sq_tail = 0;
1896         writel(nvmeq->sq_tail, nvmeq->q_db);
1897
1898         return 0;
1899 }
1900
1901 static int nvme_kthread(void *data)
1902 {
1903         struct nvme_dev *dev, *next;
1904
1905         while (!kthread_should_stop()) {
1906                 set_current_state(TASK_INTERRUPTIBLE);
1907                 spin_lock(&dev_list_lock);
1908                 list_for_each_entry_safe(dev, next, &dev_list, node) {
1909                         int i;
1910                         if (readl(&dev->bar->csts) & NVME_CSTS_CFS &&
1911                                                         dev->initialized) {
1912                                 if (work_busy(&dev->reset_work))
1913                                         continue;
1914                                 list_del_init(&dev->node);
1915                                 dev_warn(&dev->pci_dev->dev,
1916                                         "Failed status, reset controller\n");
1917                                 dev->reset_workfn = nvme_reset_failed_dev;
1918                                 queue_work(nvme_workq, &dev->reset_work);
1919                                 continue;
1920                         }
1921                         rcu_read_lock();
1922                         for (i = 0; i < dev->queue_count; i++) {
1923                                 struct nvme_queue *nvmeq =
1924                                                 rcu_dereference(dev->queues[i]);
1925                                 if (!nvmeq)
1926                                         continue;
1927                                 spin_lock_irq(&nvmeq->q_lock);
1928                                 if (nvmeq->q_suspended)
1929                                         goto unlock;
1930                                 nvme_process_cq(nvmeq);
1931                                 nvme_cancel_ios(nvmeq, true);
1932                                 nvme_resubmit_bios(nvmeq);
1933                                 nvme_resubmit_iods(nvmeq);
1934
1935                                 while ((i == 0) && (dev->event_limit > 0)) {
1936                                         if (nvme_submit_async_req(nvmeq))
1937                                                 break;
1938                                         dev->event_limit--;
1939                                 }
1940  unlock:
1941                                 spin_unlock_irq(&nvmeq->q_lock);
1942                         }
1943                         rcu_read_unlock();
1944                 }
1945                 spin_unlock(&dev_list_lock);
1946                 schedule_timeout(round_jiffies_relative(HZ));
1947         }
1948         return 0;
1949 }
1950
1951 static void nvme_config_discard(struct nvme_ns *ns)
1952 {
1953         u32 logical_block_size = queue_logical_block_size(ns->queue);
1954         ns->queue->limits.discard_zeroes_data = 0;
1955         ns->queue->limits.discard_alignment = logical_block_size;
1956         ns->queue->limits.discard_granularity = logical_block_size;
1957         ns->queue->limits.max_discard_sectors = 0xffffffff;
1958         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1959 }
1960
1961 static struct nvme_ns *nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid,
1962                         struct nvme_id_ns *id, struct nvme_lba_range_type *rt)
1963 {
1964         struct nvme_ns *ns;
1965         struct gendisk *disk;
1966         int lbaf;
1967
1968         if (rt->attributes & NVME_LBART_ATTRIB_HIDE)
1969                 return NULL;
1970
1971         ns = kzalloc(sizeof(*ns), GFP_KERNEL);
1972         if (!ns)
1973                 return NULL;
1974         ns->queue = blk_alloc_queue(GFP_KERNEL);
1975         if (!ns->queue)
1976                 goto out_free_ns;
1977         ns->queue->queue_flags = QUEUE_FLAG_DEFAULT;
1978         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
1979         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
1980         queue_flag_clear_unlocked(QUEUE_FLAG_ADD_RANDOM, ns->queue);
1981         blk_queue_make_request(ns->queue, nvme_make_request);
1982         ns->dev = dev;
1983         ns->queue->queuedata = ns;
1984
1985         disk = alloc_disk(0);
1986         if (!disk)
1987                 goto out_free_queue;
1988         ns->ns_id = nsid;
1989         ns->disk = disk;
1990         lbaf = id->flbas & 0xf;
1991         ns->lba_shift = id->lbaf[lbaf].ds;
1992         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1993         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
1994         if (dev->max_hw_sectors)
1995                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
1996         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
1997                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
1998
1999         disk->major = nvme_major;
2000         disk->first_minor = 0;
2001         disk->fops = &nvme_fops;
2002         disk->private_data = ns;
2003         disk->queue = ns->queue;
2004         disk->driverfs_dev = &dev->pci_dev->dev;
2005         disk->flags = GENHD_FL_EXT_DEVT;
2006         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2007         set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2008
2009         if (dev->oncs & NVME_CTRL_ONCS_DSM)
2010                 nvme_config_discard(ns);
2011
2012         return ns;
2013
2014  out_free_queue:
2015         blk_cleanup_queue(ns->queue);
2016  out_free_ns:
2017         kfree(ns);
2018         return NULL;
2019 }
2020
2021 static int nvme_find_closest_node(int node)
2022 {
2023         int n, val, min_val = INT_MAX, best_node = node;
2024
2025         for_each_online_node(n) {
2026                 if (n == node)
2027                         continue;
2028                 val = node_distance(node, n);
2029                 if (val < min_val) {
2030                         min_val = val;
2031                         best_node = n;
2032                 }
2033         }
2034         return best_node;
2035 }
2036
2037 static void nvme_set_queue_cpus(cpumask_t *qmask, struct nvme_queue *nvmeq,
2038                                                                 int count)
2039 {
2040         int cpu;
2041         for_each_cpu(cpu, qmask) {
2042                 if (cpumask_weight(nvmeq->cpu_mask) >= count)
2043                         break;
2044                 if (!cpumask_test_and_set_cpu(cpu, nvmeq->cpu_mask))
2045                         *per_cpu_ptr(nvmeq->dev->io_queue, cpu) = nvmeq->qid;
2046         }
2047 }
2048
2049 static void nvme_add_cpus(cpumask_t *mask, const cpumask_t *unassigned_cpus,
2050         const cpumask_t *new_mask, struct nvme_queue *nvmeq, int cpus_per_queue)
2051 {
2052         int next_cpu;
2053         for_each_cpu(next_cpu, new_mask) {
2054                 cpumask_or(mask, mask, get_cpu_mask(next_cpu));
2055                 cpumask_or(mask, mask, topology_thread_cpumask(next_cpu));
2056                 cpumask_and(mask, mask, unassigned_cpus);
2057                 nvme_set_queue_cpus(mask, nvmeq, cpus_per_queue);
2058         }
2059 }
2060
2061 static void nvme_create_io_queues(struct nvme_dev *dev)
2062 {
2063         unsigned i, max;
2064
2065         max = min(dev->max_qid, num_online_cpus());
2066         for (i = dev->queue_count; i <= max; i++)
2067                 if (!nvme_alloc_queue(dev, i, dev->q_depth, i - 1))
2068                         break;
2069
2070         max = min(dev->queue_count - 1, num_online_cpus());
2071         for (i = dev->online_queues; i <= max; i++)
2072                 if (nvme_create_queue(raw_nvmeq(dev, i), i))
2073                         break;
2074 }
2075
2076 /*
2077  * If there are fewer queues than online cpus, this will try to optimally
2078  * assign a queue to multiple cpus by grouping cpus that are "close" together:
2079  * thread siblings, core, socket, closest node, then whatever else is
2080  * available.
2081  */
2082 static void nvme_assign_io_queues(struct nvme_dev *dev)
2083 {
2084         unsigned cpu, cpus_per_queue, queues, remainder, i;
2085         cpumask_var_t unassigned_cpus;
2086
2087         nvme_create_io_queues(dev);
2088
2089         queues = min(dev->online_queues - 1, num_online_cpus());
2090         if (!queues)
2091                 return;
2092
2093         cpus_per_queue = num_online_cpus() / queues;
2094         remainder = queues - (num_online_cpus() - queues * cpus_per_queue);
2095
2096         if (!alloc_cpumask_var(&unassigned_cpus, GFP_KERNEL))
2097                 return;
2098
2099         cpumask_copy(unassigned_cpus, cpu_online_mask);
2100         cpu = cpumask_first(unassigned_cpus);
2101         for (i = 1; i <= queues; i++) {
2102                 struct nvme_queue *nvmeq = lock_nvmeq(dev, i);
2103                 cpumask_t mask;
2104
2105                 cpumask_clear(nvmeq->cpu_mask);
2106                 if (!cpumask_weight(unassigned_cpus)) {
2107                         unlock_nvmeq(nvmeq);
2108                         break;
2109                 }
2110
2111                 mask = *get_cpu_mask(cpu);
2112                 nvme_set_queue_cpus(&mask, nvmeq, cpus_per_queue);
2113                 if (cpus_weight(mask) < cpus_per_queue)
2114                         nvme_add_cpus(&mask, unassigned_cpus,
2115                                 topology_thread_cpumask(cpu),
2116                                 nvmeq, cpus_per_queue);
2117                 if (cpus_weight(mask) < cpus_per_queue)
2118                         nvme_add_cpus(&mask, unassigned_cpus,
2119                                 topology_core_cpumask(cpu),
2120                                 nvmeq, cpus_per_queue);
2121                 if (cpus_weight(mask) < cpus_per_queue)
2122                         nvme_add_cpus(&mask, unassigned_cpus,
2123                                 cpumask_of_node(cpu_to_node(cpu)),
2124                                 nvmeq, cpus_per_queue);
2125                 if (cpus_weight(mask) < cpus_per_queue)
2126                         nvme_add_cpus(&mask, unassigned_cpus,
2127                                 cpumask_of_node(
2128                                         nvme_find_closest_node(
2129                                                 cpu_to_node(cpu))),
2130                                 nvmeq, cpus_per_queue);
2131                 if (cpus_weight(mask) < cpus_per_queue)
2132                         nvme_add_cpus(&mask, unassigned_cpus,
2133                                 unassigned_cpus,
2134                                 nvmeq, cpus_per_queue);
2135
2136                 WARN(cpumask_weight(nvmeq->cpu_mask) != cpus_per_queue,
2137                         "nvme%d qid:%d mis-matched queue-to-cpu assignment\n",
2138                         dev->instance, i);
2139
2140                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2141                                                         nvmeq->cpu_mask);
2142                 cpumask_andnot(unassigned_cpus, unassigned_cpus,
2143                                                 nvmeq->cpu_mask);
2144                 cpu = cpumask_next(cpu, unassigned_cpus);
2145                 if (remainder && !--remainder)
2146                         cpus_per_queue++;
2147                 unlock_nvmeq(nvmeq);
2148         }
2149         WARN(cpumask_weight(unassigned_cpus), "nvme%d unassigned online cpus\n",
2150                                                                 dev->instance);
2151         i = 0;
2152         cpumask_andnot(unassigned_cpus, cpu_possible_mask, cpu_online_mask);
2153         for_each_cpu(cpu, unassigned_cpus)
2154                 *per_cpu_ptr(dev->io_queue, cpu) = (i++ % queues) + 1;
2155         free_cpumask_var(unassigned_cpus);
2156 }
2157
2158 static int set_queue_count(struct nvme_dev *dev, int count)
2159 {
2160         int status;
2161         u32 result;
2162         u32 q_count = (count - 1) | ((count - 1) << 16);
2163
2164         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2165                                                                 &result);
2166         if (status < 0)
2167                 return status;
2168         if (status > 0) {
2169                 dev_err(&dev->pci_dev->dev, "Could not set queue count (%d)\n",
2170                                                                         status);
2171                 return -EBUSY;
2172         }
2173         return min(result & 0xffff, result >> 16) + 1;
2174 }
2175
2176 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2177 {
2178         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2179 }
2180
2181 static void nvme_cpu_workfn(struct work_struct *work)
2182 {
2183         struct nvme_dev *dev = container_of(work, struct nvme_dev, cpu_work);
2184         if (dev->initialized)
2185                 nvme_assign_io_queues(dev);
2186 }
2187
2188 static int nvme_cpu_notify(struct notifier_block *self,
2189                                 unsigned long action, void *hcpu)
2190 {
2191         struct nvme_dev *dev;
2192
2193         switch (action) {
2194         case CPU_ONLINE:
2195         case CPU_DEAD:
2196                 spin_lock(&dev_list_lock);
2197                 list_for_each_entry(dev, &dev_list, node)
2198                         schedule_work(&dev->cpu_work);
2199                 spin_unlock(&dev_list_lock);
2200                 break;
2201         }
2202         return NOTIFY_OK;
2203 }
2204
2205 static int nvme_setup_io_queues(struct nvme_dev *dev)
2206 {
2207         struct nvme_queue *adminq = raw_nvmeq(dev, 0);
2208         struct pci_dev *pdev = dev->pci_dev;
2209         int result, i, vecs, nr_io_queues, size;
2210
2211         nr_io_queues = num_possible_cpus();
2212         result = set_queue_count(dev, nr_io_queues);
2213         if (result < 0)
2214                 return result;
2215         if (result < nr_io_queues)
2216                 nr_io_queues = result;
2217
2218         size = db_bar_size(dev, nr_io_queues);
2219         if (size > 8192) {
2220                 iounmap(dev->bar);
2221                 do {
2222                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2223                         if (dev->bar)
2224                                 break;
2225                         if (!--nr_io_queues)
2226                                 return -ENOMEM;
2227                         size = db_bar_size(dev, nr_io_queues);
2228                 } while (1);
2229                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2230                 adminq->q_db = dev->dbs;
2231         }
2232
2233         /* Deregister the admin queue's interrupt */
2234         free_irq(dev->entry[0].vector, adminq);
2235
2236         for (i = 0; i < nr_io_queues; i++)
2237                 dev->entry[i].entry = i;
2238         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2239         if (vecs < 0) {
2240                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2241                 if (vecs < 0) {
2242                         vecs = 1;
2243                 } else {
2244                         for (i = 0; i < vecs; i++)
2245                                 dev->entry[i].vector = i + pdev->irq;
2246                 }
2247         }
2248
2249         /*
2250          * Should investigate if there's a performance win from allocating
2251          * more queues than interrupt vectors; it might allow the submission
2252          * path to scale better, even if the receive path is limited by the
2253          * number of interrupts.
2254          */
2255         nr_io_queues = vecs;
2256         dev->max_qid = nr_io_queues;
2257
2258         result = queue_request_irq(dev, adminq, adminq->irqname);
2259         if (result) {
2260                 adminq->q_suspended = 1;
2261                 goto free_queues;
2262         }
2263
2264         /* Free previously allocated queues that are no longer usable */
2265         nvme_free_queues(dev, nr_io_queues + 1);
2266         nvme_assign_io_queues(dev);
2267
2268         return 0;
2269
2270  free_queues:
2271         nvme_free_queues(dev, 1);
2272         return result;
2273 }
2274
2275 /*
2276  * Return: error value if an error occurred setting up the queues or calling
2277  * Identify Device.  0 if these succeeded, even if adding some of the
2278  * namespaces failed.  At the moment, these failures are silent.  TBD which
2279  * failures should be reported.
2280  */
2281 static int nvme_dev_add(struct nvme_dev *dev)
2282 {
2283         struct pci_dev *pdev = dev->pci_dev;
2284         int res;
2285         unsigned nn, i;
2286         struct nvme_ns *ns;
2287         struct nvme_id_ctrl *ctrl;
2288         struct nvme_id_ns *id_ns;
2289         void *mem;
2290         dma_addr_t dma_addr;
2291         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2292
2293         mem = dma_alloc_coherent(&pdev->dev, 8192, &dma_addr, GFP_KERNEL);
2294         if (!mem)
2295                 return -ENOMEM;
2296
2297         res = nvme_identify(dev, 0, 1, dma_addr);
2298         if (res) {
2299                 dev_err(&pdev->dev, "Identify Controller failed (%d)\n", res);
2300                 res = -EIO;
2301                 goto out;
2302         }
2303
2304         ctrl = mem;
2305         nn = le32_to_cpup(&ctrl->nn);
2306         dev->oncs = le16_to_cpup(&ctrl->oncs);
2307         dev->abort_limit = ctrl->acl + 1;
2308         dev->vwc = ctrl->vwc;
2309         dev->event_limit = min(ctrl->aerl + 1, 8);
2310         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2311         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2312         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2313         if (ctrl->mdts)
2314                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2315         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2316                         (pdev->device == 0x0953) && ctrl->vs[3])
2317                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2318
2319         id_ns = mem;
2320         for (i = 1; i <= nn; i++) {
2321                 res = nvme_identify(dev, i, 0, dma_addr);
2322                 if (res)
2323                         continue;
2324
2325                 if (id_ns->ncap == 0)
2326                         continue;
2327
2328                 res = nvme_get_features(dev, NVME_FEAT_LBA_RANGE, i,
2329                                                         dma_addr + 4096, NULL);
2330                 if (res)
2331                         memset(mem + 4096, 0, 4096);
2332
2333                 ns = nvme_alloc_ns(dev, i, mem, mem + 4096);
2334                 if (ns)
2335                         list_add_tail(&ns->list, &dev->namespaces);
2336         }
2337         list_for_each_entry(ns, &dev->namespaces, list)
2338                 add_disk(ns->disk);
2339         res = 0;
2340
2341  out:
2342         dma_free_coherent(&dev->pci_dev->dev, 8192, mem, dma_addr);
2343         return res;
2344 }
2345
2346 static int nvme_dev_map(struct nvme_dev *dev)
2347 {
2348         u64 cap;
2349         int bars, result = -ENOMEM;
2350         struct pci_dev *pdev = dev->pci_dev;
2351
2352         if (pci_enable_device_mem(pdev))
2353                 return result;
2354
2355         dev->entry[0].vector = pdev->irq;
2356         pci_set_master(pdev);
2357         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2358         if (pci_request_selected_regions(pdev, bars, "nvme"))
2359                 goto disable_pci;
2360
2361         if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) &&
2362             dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))
2363                 goto disable;
2364
2365         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2366         if (!dev->bar)
2367                 goto disable;
2368         if (readl(&dev->bar->csts) == -1) {
2369                 result = -ENODEV;
2370                 goto unmap;
2371         }
2372         cap = readq(&dev->bar->cap);
2373         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2374         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2375         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2376
2377         return 0;
2378
2379  unmap:
2380         iounmap(dev->bar);
2381         dev->bar = NULL;
2382  disable:
2383         pci_release_regions(pdev);
2384  disable_pci:
2385         pci_disable_device(pdev);
2386         return result;
2387 }
2388
2389 static void nvme_dev_unmap(struct nvme_dev *dev)
2390 {
2391         if (dev->pci_dev->msi_enabled)
2392                 pci_disable_msi(dev->pci_dev);
2393         else if (dev->pci_dev->msix_enabled)
2394                 pci_disable_msix(dev->pci_dev);
2395
2396         if (dev->bar) {
2397                 iounmap(dev->bar);
2398                 dev->bar = NULL;
2399                 pci_release_regions(dev->pci_dev);
2400         }
2401
2402         if (pci_is_enabled(dev->pci_dev))
2403                 pci_disable_device(dev->pci_dev);
2404 }
2405
2406 struct nvme_delq_ctx {
2407         struct task_struct *waiter;
2408         struct kthread_worker *worker;
2409         atomic_t refcount;
2410 };
2411
2412 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2413 {
2414         dq->waiter = current;
2415         mb();
2416
2417         for (;;) {
2418                 set_current_state(TASK_KILLABLE);
2419                 if (!atomic_read(&dq->refcount))
2420                         break;
2421                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2422                                         fatal_signal_pending(current)) {
2423                         set_current_state(TASK_RUNNING);
2424
2425                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2426                         nvme_disable_queue(dev, 0);
2427
2428                         send_sig(SIGKILL, dq->worker->task, 1);
2429                         flush_kthread_worker(dq->worker);
2430                         return;
2431                 }
2432         }
2433         set_current_state(TASK_RUNNING);
2434 }
2435
2436 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2437 {
2438         atomic_dec(&dq->refcount);
2439         if (dq->waiter)
2440                 wake_up_process(dq->waiter);
2441 }
2442
2443 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2444 {
2445         atomic_inc(&dq->refcount);
2446         return dq;
2447 }
2448
2449 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2450 {
2451         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2452
2453         nvme_clear_queue(nvmeq);
2454         nvme_put_dq(dq);
2455 }
2456
2457 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2458                                                 kthread_work_func_t fn)
2459 {
2460         struct nvme_command c;
2461
2462         memset(&c, 0, sizeof(c));
2463         c.delete_queue.opcode = opcode;
2464         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2465
2466         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2467         return nvme_submit_admin_cmd_async(nvmeq->dev, &c, &nvmeq->cmdinfo);
2468 }
2469
2470 static void nvme_del_cq_work_handler(struct kthread_work *work)
2471 {
2472         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2473                                                         cmdinfo.work);
2474         nvme_del_queue_end(nvmeq);
2475 }
2476
2477 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2478 {
2479         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2480                                                 nvme_del_cq_work_handler);
2481 }
2482
2483 static void nvme_del_sq_work_handler(struct kthread_work *work)
2484 {
2485         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2486                                                         cmdinfo.work);
2487         int status = nvmeq->cmdinfo.status;
2488
2489         if (!status)
2490                 status = nvme_delete_cq(nvmeq);
2491         if (status)
2492                 nvme_del_queue_end(nvmeq);
2493 }
2494
2495 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2496 {
2497         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2498                                                 nvme_del_sq_work_handler);
2499 }
2500
2501 static void nvme_del_queue_start(struct kthread_work *work)
2502 {
2503         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2504                                                         cmdinfo.work);
2505         allow_signal(SIGKILL);
2506         if (nvme_delete_sq(nvmeq))
2507                 nvme_del_queue_end(nvmeq);
2508 }
2509
2510 static void nvme_disable_io_queues(struct nvme_dev *dev)
2511 {
2512         int i;
2513         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2514         struct nvme_delq_ctx dq;
2515         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2516                                         &worker, "nvme%d", dev->instance);
2517
2518         if (IS_ERR(kworker_task)) {
2519                 dev_err(&dev->pci_dev->dev,
2520                         "Failed to create queue del task\n");
2521                 for (i = dev->queue_count - 1; i > 0; i--)
2522                         nvme_disable_queue(dev, i);
2523                 return;
2524         }
2525
2526         dq.waiter = NULL;
2527         atomic_set(&dq.refcount, 0);
2528         dq.worker = &worker;
2529         for (i = dev->queue_count - 1; i > 0; i--) {
2530                 struct nvme_queue *nvmeq = raw_nvmeq(dev, i);
2531
2532                 if (nvme_suspend_queue(nvmeq))
2533                         continue;
2534                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2535                 nvmeq->cmdinfo.worker = dq.worker;
2536                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2537                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2538         }
2539         nvme_wait_dq(&dq, dev);
2540         kthread_stop(kworker_task);
2541 }
2542
2543 /*
2544 * Remove the node from the device list and check
2545 * for whether or not we need to stop the nvme_thread.
2546 */
2547 static void nvme_dev_list_remove(struct nvme_dev *dev)
2548 {
2549         struct task_struct *tmp = NULL;
2550
2551         spin_lock(&dev_list_lock);
2552         list_del_init(&dev->node);
2553         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2554                 tmp = nvme_thread;
2555                 nvme_thread = NULL;
2556         }
2557         spin_unlock(&dev_list_lock);
2558
2559         if (tmp)
2560                 kthread_stop(tmp);
2561 }
2562
2563 static void nvme_dev_shutdown(struct nvme_dev *dev)
2564 {
2565         int i;
2566
2567         dev->initialized = 0;
2568         nvme_dev_list_remove(dev);
2569
2570         if (!dev->bar || (dev->bar && readl(&dev->bar->csts) == -1)) {
2571                 for (i = dev->queue_count - 1; i >= 0; i--) {
2572                         struct nvme_queue *nvmeq = raw_nvmeq(dev, i);
2573                         nvme_suspend_queue(nvmeq);
2574                         nvme_clear_queue(nvmeq);
2575                 }
2576         } else {
2577                 nvme_disable_io_queues(dev);
2578                 nvme_shutdown_ctrl(dev);
2579                 nvme_disable_queue(dev, 0);
2580         }
2581         nvme_dev_unmap(dev);
2582 }
2583
2584 static void nvme_dev_remove(struct nvme_dev *dev)
2585 {
2586         struct nvme_ns *ns;
2587
2588         list_for_each_entry(ns, &dev->namespaces, list) {
2589                 if (ns->disk->flags & GENHD_FL_UP)
2590                         del_gendisk(ns->disk);
2591                 if (!blk_queue_dying(ns->queue))
2592                         blk_cleanup_queue(ns->queue);
2593         }
2594 }
2595
2596 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2597 {
2598         struct device *dmadev = &dev->pci_dev->dev;
2599         dev->prp_page_pool = dma_pool_create("prp list page", dmadev,
2600                                                 PAGE_SIZE, PAGE_SIZE, 0);
2601         if (!dev->prp_page_pool)
2602                 return -ENOMEM;
2603
2604         /* Optimisation for I/Os between 4k and 128k */
2605         dev->prp_small_pool = dma_pool_create("prp list 256", dmadev,
2606                                                 256, 256, 0);
2607         if (!dev->prp_small_pool) {
2608                 dma_pool_destroy(dev->prp_page_pool);
2609                 return -ENOMEM;
2610         }
2611         return 0;
2612 }
2613
2614 static void nvme_release_prp_pools(struct nvme_dev *dev)
2615 {
2616         dma_pool_destroy(dev->prp_page_pool);
2617         dma_pool_destroy(dev->prp_small_pool);
2618 }
2619
2620 static DEFINE_IDA(nvme_instance_ida);
2621
2622 static int nvme_set_instance(struct nvme_dev *dev)
2623 {
2624         int instance, error;
2625
2626         do {
2627                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2628                         return -ENODEV;
2629
2630                 spin_lock(&dev_list_lock);
2631                 error = ida_get_new(&nvme_instance_ida, &instance);
2632                 spin_unlock(&dev_list_lock);
2633         } while (error == -EAGAIN);
2634
2635         if (error)
2636                 return -ENODEV;
2637
2638         dev->instance = instance;
2639         return 0;
2640 }
2641
2642 static void nvme_release_instance(struct nvme_dev *dev)
2643 {
2644         spin_lock(&dev_list_lock);
2645         ida_remove(&nvme_instance_ida, dev->instance);
2646         spin_unlock(&dev_list_lock);
2647 }
2648
2649 static void nvme_free_namespaces(struct nvme_dev *dev)
2650 {
2651         struct nvme_ns *ns, *next;
2652
2653         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2654                 list_del(&ns->list);
2655                 put_disk(ns->disk);
2656                 kfree(ns);
2657         }
2658 }
2659
2660 static void nvme_free_dev(struct kref *kref)
2661 {
2662         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2663
2664         nvme_free_namespaces(dev);
2665         free_percpu(dev->io_queue);
2666         kfree(dev->queues);
2667         kfree(dev->entry);
2668         kfree(dev);
2669 }
2670
2671 static int nvme_dev_open(struct inode *inode, struct file *f)
2672 {
2673         struct nvme_dev *dev = container_of(f->private_data, struct nvme_dev,
2674                                                                 miscdev);
2675         kref_get(&dev->kref);
2676         f->private_data = dev;
2677         return 0;
2678 }
2679
2680 static int nvme_dev_release(struct inode *inode, struct file *f)
2681 {
2682         struct nvme_dev *dev = f->private_data;
2683         kref_put(&dev->kref, nvme_free_dev);
2684         return 0;
2685 }
2686
2687 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2688 {
2689         struct nvme_dev *dev = f->private_data;
2690         switch (cmd) {
2691         case NVME_IOCTL_ADMIN_CMD:
2692                 return nvme_user_admin_cmd(dev, (void __user *)arg);
2693         default:
2694                 return -ENOTTY;
2695         }
2696 }
2697
2698 static const struct file_operations nvme_dev_fops = {
2699         .owner          = THIS_MODULE,
2700         .open           = nvme_dev_open,
2701         .release        = nvme_dev_release,
2702         .unlocked_ioctl = nvme_dev_ioctl,
2703         .compat_ioctl   = nvme_dev_ioctl,
2704 };
2705
2706 static int nvme_dev_start(struct nvme_dev *dev)
2707 {
2708         int result;
2709         bool start_thread = false;
2710
2711         result = nvme_dev_map(dev);
2712         if (result)
2713                 return result;
2714
2715         result = nvme_configure_admin_queue(dev);
2716         if (result)
2717                 goto unmap;
2718
2719         spin_lock(&dev_list_lock);
2720         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2721                 start_thread = true;
2722                 nvme_thread = NULL;
2723         }
2724         list_add(&dev->node, &dev_list);
2725         spin_unlock(&dev_list_lock);
2726
2727         if (start_thread) {
2728                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2729                 wake_up(&nvme_kthread_wait);
2730         } else
2731                 wait_event_killable(nvme_kthread_wait, nvme_thread);
2732
2733         if (IS_ERR_OR_NULL(nvme_thread)) {
2734                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2735                 goto disable;
2736         }
2737
2738         result = nvme_setup_io_queues(dev);
2739         if (result && result != -EBUSY)
2740                 goto disable;
2741
2742         return result;
2743
2744  disable:
2745         nvme_disable_queue(dev, 0);
2746         nvme_dev_list_remove(dev);
2747  unmap:
2748         nvme_dev_unmap(dev);
2749         return result;
2750 }
2751
2752 static int nvme_remove_dead_ctrl(void *arg)
2753 {
2754         struct nvme_dev *dev = (struct nvme_dev *)arg;
2755         struct pci_dev *pdev = dev->pci_dev;
2756
2757         if (pci_get_drvdata(pdev))
2758                 pci_stop_and_remove_bus_device(pdev);
2759         kref_put(&dev->kref, nvme_free_dev);
2760         return 0;
2761 }
2762
2763 static void nvme_remove_disks(struct work_struct *ws)
2764 {
2765         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2766
2767         nvme_dev_remove(dev);
2768         nvme_free_queues(dev, 1);
2769 }
2770
2771 static int nvme_dev_resume(struct nvme_dev *dev)
2772 {
2773         int ret;
2774
2775         ret = nvme_dev_start(dev);
2776         if (ret && ret != -EBUSY)
2777                 return ret;
2778         if (ret == -EBUSY) {
2779                 spin_lock(&dev_list_lock);
2780                 dev->reset_workfn = nvme_remove_disks;
2781                 queue_work(nvme_workq, &dev->reset_work);
2782                 spin_unlock(&dev_list_lock);
2783         }
2784         dev->initialized = 1;
2785         return 0;
2786 }
2787
2788 static void nvme_dev_reset(struct nvme_dev *dev)
2789 {
2790         nvme_dev_shutdown(dev);
2791         if (nvme_dev_resume(dev)) {
2792                 dev_err(&dev->pci_dev->dev, "Device failed to resume\n");
2793                 kref_get(&dev->kref);
2794                 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
2795                                                         dev->instance))) {
2796                         dev_err(&dev->pci_dev->dev,
2797                                 "Failed to start controller remove task\n");
2798                         kref_put(&dev->kref, nvme_free_dev);
2799                 }
2800         }
2801 }
2802
2803 static void nvme_reset_failed_dev(struct work_struct *ws)
2804 {
2805         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2806         nvme_dev_reset(dev);
2807 }
2808
2809 static void nvme_reset_workfn(struct work_struct *work)
2810 {
2811         struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
2812         dev->reset_workfn(work);
2813 }
2814
2815 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2816 {
2817         int result = -ENOMEM;
2818         struct nvme_dev *dev;
2819
2820         dev = kzalloc(sizeof(*dev), GFP_KERNEL);
2821         if (!dev)
2822                 return -ENOMEM;
2823         dev->entry = kcalloc(num_possible_cpus(), sizeof(*dev->entry),
2824                                                                 GFP_KERNEL);
2825         if (!dev->entry)
2826                 goto free;
2827         dev->queues = kcalloc(num_possible_cpus() + 1, sizeof(void *),
2828                                                                 GFP_KERNEL);
2829         if (!dev->queues)
2830                 goto free;
2831         dev->io_queue = alloc_percpu(unsigned short);
2832         if (!dev->io_queue)
2833                 goto free;
2834
2835         INIT_LIST_HEAD(&dev->namespaces);
2836         dev->reset_workfn = nvme_reset_failed_dev;
2837         INIT_WORK(&dev->reset_work, nvme_reset_workfn);
2838         INIT_WORK(&dev->cpu_work, nvme_cpu_workfn);
2839         dev->pci_dev = pdev;
2840         pci_set_drvdata(pdev, dev);
2841         result = nvme_set_instance(dev);
2842         if (result)
2843                 goto free;
2844
2845         result = nvme_setup_prp_pools(dev);
2846         if (result)
2847                 goto release;
2848
2849         kref_init(&dev->kref);
2850         result = nvme_dev_start(dev);
2851         if (result) {
2852                 if (result == -EBUSY)
2853                         goto create_cdev;
2854                 goto release_pools;
2855         }
2856
2857         result = nvme_dev_add(dev);
2858         if (result)
2859                 goto shutdown;
2860
2861  create_cdev:
2862         scnprintf(dev->name, sizeof(dev->name), "nvme%d", dev->instance);
2863         dev->miscdev.minor = MISC_DYNAMIC_MINOR;
2864         dev->miscdev.parent = &pdev->dev;
2865         dev->miscdev.name = dev->name;
2866         dev->miscdev.fops = &nvme_dev_fops;
2867         result = misc_register(&dev->miscdev);
2868         if (result)
2869                 goto remove;
2870
2871         dev->initialized = 1;
2872         return 0;
2873
2874  remove:
2875         nvme_dev_remove(dev);
2876         nvme_free_namespaces(dev);
2877  shutdown:
2878         nvme_dev_shutdown(dev);
2879  release_pools:
2880         nvme_free_queues(dev, 0);
2881         nvme_release_prp_pools(dev);
2882  release:
2883         nvme_release_instance(dev);
2884  free:
2885         free_percpu(dev->io_queue);
2886         kfree(dev->queues);
2887         kfree(dev->entry);
2888         kfree(dev);
2889         return result;
2890 }
2891
2892 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
2893 {
2894        struct nvme_dev *dev = pci_get_drvdata(pdev);
2895
2896        if (prepare)
2897                nvme_dev_shutdown(dev);
2898        else
2899                nvme_dev_resume(dev);
2900 }
2901
2902 static void nvme_shutdown(struct pci_dev *pdev)
2903 {
2904         struct nvme_dev *dev = pci_get_drvdata(pdev);
2905         nvme_dev_shutdown(dev);
2906 }
2907
2908 static void nvme_remove(struct pci_dev *pdev)
2909 {
2910         struct nvme_dev *dev = pci_get_drvdata(pdev);
2911
2912         spin_lock(&dev_list_lock);
2913         list_del_init(&dev->node);
2914         spin_unlock(&dev_list_lock);
2915
2916         pci_set_drvdata(pdev, NULL);
2917         flush_work(&dev->reset_work);
2918         flush_work(&dev->cpu_work);
2919         misc_deregister(&dev->miscdev);
2920         nvme_dev_remove(dev);
2921         nvme_dev_shutdown(dev);
2922         nvme_free_queues(dev, 0);
2923         rcu_barrier();
2924         nvme_release_instance(dev);
2925         nvme_release_prp_pools(dev);
2926         kref_put(&dev->kref, nvme_free_dev);
2927 }
2928
2929 /* These functions are yet to be implemented */
2930 #define nvme_error_detected NULL
2931 #define nvme_dump_registers NULL
2932 #define nvme_link_reset NULL
2933 #define nvme_slot_reset NULL
2934 #define nvme_error_resume NULL
2935
2936 #ifdef CONFIG_PM_SLEEP
2937 static int nvme_suspend(struct device *dev)
2938 {
2939         struct pci_dev *pdev = to_pci_dev(dev);
2940         struct nvme_dev *ndev = pci_get_drvdata(pdev);
2941
2942         nvme_dev_shutdown(ndev);
2943         return 0;
2944 }
2945
2946 static int nvme_resume(struct device *dev)
2947 {
2948         struct pci_dev *pdev = to_pci_dev(dev);
2949         struct nvme_dev *ndev = pci_get_drvdata(pdev);
2950
2951         if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
2952                 ndev->reset_workfn = nvme_reset_failed_dev;
2953                 queue_work(nvme_workq, &ndev->reset_work);
2954         }
2955         return 0;
2956 }
2957 #endif
2958
2959 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
2960
2961 static const struct pci_error_handlers nvme_err_handler = {
2962         .error_detected = nvme_error_detected,
2963         .mmio_enabled   = nvme_dump_registers,
2964         .link_reset     = nvme_link_reset,
2965         .slot_reset     = nvme_slot_reset,
2966         .resume         = nvme_error_resume,
2967         .reset_notify   = nvme_reset_notify,
2968 };
2969
2970 /* Move to pci_ids.h later */
2971 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
2972
2973 static const struct pci_device_id nvme_id_table[] = {
2974         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
2975         { 0, }
2976 };
2977 MODULE_DEVICE_TABLE(pci, nvme_id_table);
2978
2979 static struct pci_driver nvme_driver = {
2980         .name           = "nvme",
2981         .id_table       = nvme_id_table,
2982         .probe          = nvme_probe,
2983         .remove         = nvme_remove,
2984         .shutdown       = nvme_shutdown,
2985         .driver         = {
2986                 .pm     = &nvme_dev_pm_ops,
2987         },
2988         .err_handler    = &nvme_err_handler,
2989 };
2990
2991 static int __init nvme_init(void)
2992 {
2993         int result;
2994
2995         init_waitqueue_head(&nvme_kthread_wait);
2996
2997         nvme_workq = create_singlethread_workqueue("nvme");
2998         if (!nvme_workq)
2999                 return -ENOMEM;
3000
3001         result = register_blkdev(nvme_major, "nvme");
3002         if (result < 0)
3003                 goto kill_workq;
3004         else if (result > 0)
3005                 nvme_major = result;
3006
3007         nvme_nb.notifier_call = &nvme_cpu_notify;
3008         result = register_hotcpu_notifier(&nvme_nb);
3009         if (result)
3010                 goto unregister_blkdev;
3011
3012         result = pci_register_driver(&nvme_driver);
3013         if (result)
3014                 goto unregister_hotcpu;
3015         return 0;
3016
3017  unregister_hotcpu:
3018         unregister_hotcpu_notifier(&nvme_nb);
3019  unregister_blkdev:
3020         unregister_blkdev(nvme_major, "nvme");
3021  kill_workq:
3022         destroy_workqueue(nvme_workq);
3023         return result;
3024 }
3025
3026 static void __exit nvme_exit(void)
3027 {
3028         pci_unregister_driver(&nvme_driver);
3029         unregister_hotcpu_notifier(&nvme_nb);
3030         unregister_blkdev(nvme_major, "nvme");
3031         destroy_workqueue(nvme_workq);
3032         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3033         _nvme_check_size();
3034 }
3035
3036 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3037 MODULE_LICENSE("GPL");
3038 MODULE_VERSION("0.9");
3039 module_init(nvme_init);
3040 module_exit(nvme_exit);