Bluetooth: btintel: Add support for enabling tracing functionality
[firefly-linux-kernel-4.4.55.git] / drivers / bluetooth / btintel.c
1 /*
2  *
3  *  Bluetooth support for Intel devices
4  *
5  *  Copyright (C) 2015  Intel Corporation
6  *
7  *
8  *  This program is free software; you can redistribute it and/or modify
9  *  it under the terms of the GNU General Public License as published by
10  *  the Free Software Foundation; either version 2 of the License, or
11  *  (at your option) any later version.
12  *
13  *  This program is distributed in the hope that it will be useful,
14  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  *  GNU General Public License for more details.
17  *
18  *  You should have received a copy of the GNU General Public License
19  *  along with this program; if not, write to the Free Software
20  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
21  *
22  */
23
24 #include <linux/module.h>
25 #include <linux/firmware.h>
26 #include <linux/regmap.h>
27
28 #include <net/bluetooth/bluetooth.h>
29 #include <net/bluetooth/hci_core.h>
30
31 #include "btintel.h"
32
33 #define VERSION "0.1"
34
35 #define BDADDR_INTEL (&(bdaddr_t) {{0x00, 0x8b, 0x9e, 0x19, 0x03, 0x00}})
36
37 int btintel_check_bdaddr(struct hci_dev *hdev)
38 {
39         struct hci_rp_read_bd_addr *bda;
40         struct sk_buff *skb;
41
42         skb = __hci_cmd_sync(hdev, HCI_OP_READ_BD_ADDR, 0, NULL,
43                              HCI_INIT_TIMEOUT);
44         if (IS_ERR(skb)) {
45                 int err = PTR_ERR(skb);
46                 BT_ERR("%s: Reading Intel device address failed (%d)",
47                        hdev->name, err);
48                 return err;
49         }
50
51         if (skb->len != sizeof(*bda)) {
52                 BT_ERR("%s: Intel device address length mismatch", hdev->name);
53                 kfree_skb(skb);
54                 return -EIO;
55         }
56
57         bda = (struct hci_rp_read_bd_addr *)skb->data;
58
59         /* For some Intel based controllers, the default Bluetooth device
60          * address 00:03:19:9E:8B:00 can be found. These controllers are
61          * fully operational, but have the danger of duplicate addresses
62          * and that in turn can cause problems with Bluetooth operation.
63          */
64         if (!bacmp(&bda->bdaddr, BDADDR_INTEL)) {
65                 BT_ERR("%s: Found Intel default device address (%pMR)",
66                        hdev->name, &bda->bdaddr);
67                 set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks);
68         }
69
70         kfree_skb(skb);
71
72         return 0;
73 }
74 EXPORT_SYMBOL_GPL(btintel_check_bdaddr);
75
76 int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr)
77 {
78         struct sk_buff *skb;
79         int err;
80
81         skb = __hci_cmd_sync(hdev, 0xfc31, 6, bdaddr, HCI_INIT_TIMEOUT);
82         if (IS_ERR(skb)) {
83                 err = PTR_ERR(skb);
84                 BT_ERR("%s: Changing Intel device address failed (%d)",
85                        hdev->name, err);
86                 return err;
87         }
88         kfree_skb(skb);
89
90         return 0;
91 }
92 EXPORT_SYMBOL_GPL(btintel_set_bdaddr);
93
94 int btintel_set_diag(struct hci_dev *hdev, bool enable)
95 {
96         struct sk_buff *skb;
97         u8 param[3];
98         int err;
99
100         if (!test_bit(HCI_RUNNING, &hdev->flags))
101                 return -ENETDOWN;
102
103         if (enable) {
104                 param[0] = 0x03;
105                 param[1] = 0x03;
106                 param[2] = 0x03;
107         } else {
108                 param[0] = 0x00;
109                 param[1] = 0x00;
110                 param[2] = 0x00;
111         }
112
113         skb = __hci_cmd_sync(hdev, 0xfc43, 3, param, HCI_INIT_TIMEOUT);
114         if (IS_ERR(skb)) {
115                 err = PTR_ERR(skb);
116                 BT_ERR("%s: Changing Intel diagnostic mode failed (%d)",
117                        hdev->name, err);
118                 return err;
119         }
120         kfree_skb(skb);
121
122         return 0;
123 }
124 EXPORT_SYMBOL_GPL(btintel_set_diag);
125
126 void btintel_hw_error(struct hci_dev *hdev, u8 code)
127 {
128         struct sk_buff *skb;
129         u8 type = 0x00;
130
131         BT_ERR("%s: Hardware error 0x%2.2x", hdev->name, code);
132
133         skb = __hci_cmd_sync(hdev, HCI_OP_RESET, 0, NULL, HCI_INIT_TIMEOUT);
134         if (IS_ERR(skb)) {
135                 BT_ERR("%s: Reset after hardware error failed (%ld)",
136                        hdev->name, PTR_ERR(skb));
137                 return;
138         }
139         kfree_skb(skb);
140
141         skb = __hci_cmd_sync(hdev, 0xfc22, 1, &type, HCI_INIT_TIMEOUT);
142         if (IS_ERR(skb)) {
143                 BT_ERR("%s: Retrieving Intel exception info failed (%ld)",
144                        hdev->name, PTR_ERR(skb));
145                 return;
146         }
147
148         if (skb->len != 13) {
149                 BT_ERR("%s: Exception info size mismatch", hdev->name);
150                 kfree_skb(skb);
151                 return;
152         }
153
154         BT_ERR("%s: Exception info %s", hdev->name, (char *)(skb->data + 1));
155
156         kfree_skb(skb);
157 }
158 EXPORT_SYMBOL_GPL(btintel_hw_error);
159
160 void btintel_version_info(struct hci_dev *hdev, struct intel_version *ver)
161 {
162         const char *variant;
163
164         switch (ver->fw_variant) {
165         case 0x06:
166                 variant = "Bootloader";
167                 break;
168         case 0x23:
169                 variant = "Firmware";
170                 break;
171         default:
172                 return;
173         }
174
175         BT_INFO("%s: %s revision %u.%u build %u week %u %u", hdev->name,
176                 variant, ver->fw_revision >> 4, ver->fw_revision & 0x0f,
177                 ver->fw_build_num, ver->fw_build_ww, 2000 + ver->fw_build_yy);
178 }
179 EXPORT_SYMBOL_GPL(btintel_version_info);
180
181 int btintel_secure_send(struct hci_dev *hdev, u8 fragment_type, u32 plen,
182                         const void *param)
183 {
184         while (plen > 0) {
185                 struct sk_buff *skb;
186                 u8 cmd_param[253], fragment_len = (plen > 252) ? 252 : plen;
187
188                 cmd_param[0] = fragment_type;
189                 memcpy(cmd_param + 1, param, fragment_len);
190
191                 skb = __hci_cmd_sync(hdev, 0xfc09, fragment_len + 1,
192                                      cmd_param, HCI_INIT_TIMEOUT);
193                 if (IS_ERR(skb))
194                         return PTR_ERR(skb);
195
196                 kfree_skb(skb);
197
198                 plen -= fragment_len;
199                 param += fragment_len;
200         }
201
202         return 0;
203 }
204 EXPORT_SYMBOL_GPL(btintel_secure_send);
205
206 int btintel_load_ddc_config(struct hci_dev *hdev, const char *ddc_name)
207 {
208         const struct firmware *fw;
209         struct sk_buff *skb;
210         const u8 *fw_ptr;
211         int err;
212
213         err = request_firmware_direct(&fw, ddc_name, &hdev->dev);
214         if (err < 0) {
215                 bt_dev_err(hdev, "Failed to load Intel DDC file %s (%d)",
216                            ddc_name, err);
217                 return err;
218         }
219
220         bt_dev_info(hdev, "Found Intel DDC parameters: %s", ddc_name);
221
222         fw_ptr = fw->data;
223
224         /* DDC file contains one or more DDC structure which has
225          * Length (1 byte), DDC ID (2 bytes), and DDC value (Length - 2).
226          */
227         while (fw->size > fw_ptr - fw->data) {
228                 u8 cmd_plen = fw_ptr[0] + sizeof(u8);
229
230                 skb = __hci_cmd_sync(hdev, 0xfc8b, cmd_plen, fw_ptr,
231                                      HCI_INIT_TIMEOUT);
232                 if (IS_ERR(skb)) {
233                         bt_dev_err(hdev, "Failed to send Intel_Write_DDC (%ld)",
234                                    PTR_ERR(skb));
235                         release_firmware(fw);
236                         return PTR_ERR(skb);
237                 }
238
239                 fw_ptr += cmd_plen;
240                 kfree_skb(skb);
241         }
242
243         release_firmware(fw);
244
245         bt_dev_info(hdev, "Applying Intel DDC parameters completed");
246
247         return 0;
248 }
249 EXPORT_SYMBOL_GPL(btintel_load_ddc_config);
250
251 /* ------- REGMAP IBT SUPPORT ------- */
252
253 #define IBT_REG_MODE_8BIT  0x00
254 #define IBT_REG_MODE_16BIT 0x01
255 #define IBT_REG_MODE_32BIT 0x02
256
257 struct regmap_ibt_context {
258         struct hci_dev *hdev;
259         __u16 op_write;
260         __u16 op_read;
261 };
262
263 struct ibt_cp_reg_access {
264         __le32  addr;
265         __u8    mode;
266         __u8    len;
267         __u8    data[0];
268 } __packed;
269
270 struct ibt_rp_reg_access {
271         __u8    status;
272         __le32  addr;
273         __u8    data[0];
274 } __packed;
275
276 static int regmap_ibt_read(void *context, const void *addr, size_t reg_size,
277                            void *val, size_t val_size)
278 {
279         struct regmap_ibt_context *ctx = context;
280         struct ibt_cp_reg_access cp;
281         struct ibt_rp_reg_access *rp;
282         struct sk_buff *skb;
283         int err = 0;
284
285         if (reg_size != sizeof(__le32))
286                 return -EINVAL;
287
288         switch (val_size) {
289         case 1:
290                 cp.mode = IBT_REG_MODE_8BIT;
291                 break;
292         case 2:
293                 cp.mode = IBT_REG_MODE_16BIT;
294                 break;
295         case 4:
296                 cp.mode = IBT_REG_MODE_32BIT;
297                 break;
298         default:
299                 return -EINVAL;
300         }
301
302         /* regmap provides a little-endian formatted addr */
303         cp.addr = *(__le32 *)addr;
304         cp.len = val_size;
305
306         bt_dev_dbg(ctx->hdev, "Register (0x%x) read", le32_to_cpu(cp.addr));
307
308         skb = hci_cmd_sync(ctx->hdev, ctx->op_read, sizeof(cp), &cp,
309                            HCI_CMD_TIMEOUT);
310         if (IS_ERR(skb)) {
311                 err = PTR_ERR(skb);
312                 bt_dev_err(ctx->hdev, "regmap: Register (0x%x) read error (%d)",
313                            le32_to_cpu(cp.addr), err);
314                 return err;
315         }
316
317         if (skb->len != sizeof(*rp) + val_size) {
318                 bt_dev_err(ctx->hdev, "regmap: Register (0x%x) read error, bad len",
319                            le32_to_cpu(cp.addr));
320                 err = -EINVAL;
321                 goto done;
322         }
323
324         rp = (struct ibt_rp_reg_access *)skb->data;
325
326         if (rp->addr != cp.addr) {
327                 bt_dev_err(ctx->hdev, "regmap: Register (0x%x) read error, bad addr",
328                            le32_to_cpu(rp->addr));
329                 err = -EINVAL;
330                 goto done;
331         }
332
333         memcpy(val, rp->data, val_size);
334
335 done:
336         kfree_skb(skb);
337         return err;
338 }
339
340 static int regmap_ibt_gather_write(void *context,
341                                    const void *addr, size_t reg_size,
342                                    const void *val, size_t val_size)
343 {
344         struct regmap_ibt_context *ctx = context;
345         struct ibt_cp_reg_access *cp;
346         struct sk_buff *skb;
347         int plen = sizeof(*cp) + val_size;
348         u8 mode;
349         int err = 0;
350
351         if (reg_size != sizeof(__le32))
352                 return -EINVAL;
353
354         switch (val_size) {
355         case 1:
356                 mode = IBT_REG_MODE_8BIT;
357                 break;
358         case 2:
359                 mode = IBT_REG_MODE_16BIT;
360                 break;
361         case 4:
362                 mode = IBT_REG_MODE_32BIT;
363                 break;
364         default:
365                 return -EINVAL;
366         }
367
368         cp = kmalloc(plen, GFP_KERNEL);
369         if (!cp)
370                 return -ENOMEM;
371
372         /* regmap provides a little-endian formatted addr/value */
373         cp->addr = *(__le32 *)addr;
374         cp->mode = mode;
375         cp->len = val_size;
376         memcpy(&cp->data, val, val_size);
377
378         bt_dev_dbg(ctx->hdev, "Register (0x%x) write", le32_to_cpu(cp->addr));
379
380         skb = hci_cmd_sync(ctx->hdev, ctx->op_write, plen, cp, HCI_CMD_TIMEOUT);
381         if (IS_ERR(skb)) {
382                 err = PTR_ERR(skb);
383                 bt_dev_err(ctx->hdev, "regmap: Register (0x%x) write error (%d)",
384                            le32_to_cpu(cp->addr), err);
385                 goto done;
386         }
387         kfree_skb(skb);
388
389 done:
390         kfree(cp);
391         return err;
392 }
393
394 static int regmap_ibt_write(void *context, const void *data, size_t count)
395 {
396         /* data contains register+value, since we only support 32bit addr,
397          * minimum data size is 4 bytes.
398          */
399         if (WARN_ONCE(count < 4, "Invalid register access"))
400                 return -EINVAL;
401
402         return regmap_ibt_gather_write(context, data, 4, data + 4, count - 4);
403 }
404
405 static void regmap_ibt_free_context(void *context)
406 {
407         kfree(context);
408 }
409
410 static struct regmap_bus regmap_ibt = {
411         .read = regmap_ibt_read,
412         .write = regmap_ibt_write,
413         .gather_write = regmap_ibt_gather_write,
414         .free_context = regmap_ibt_free_context,
415         .reg_format_endian_default = REGMAP_ENDIAN_LITTLE,
416         .val_format_endian_default = REGMAP_ENDIAN_LITTLE,
417 };
418
419 /* Config is the same for all register regions */
420 static const struct regmap_config regmap_ibt_cfg = {
421         .name      = "btintel_regmap",
422         .reg_bits  = 32,
423         .val_bits  = 32,
424 };
425
426 struct regmap *btintel_regmap_init(struct hci_dev *hdev, u16 opcode_read,
427                                    u16 opcode_write)
428 {
429         struct regmap_ibt_context *ctx;
430
431         bt_dev_info(hdev, "regmap: Init R%x-W%x region", opcode_read,
432                     opcode_write);
433
434         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
435         if (!ctx)
436                 return ERR_PTR(-ENOMEM);
437
438         ctx->op_read = opcode_read;
439         ctx->op_write = opcode_write;
440         ctx->hdev = hdev;
441
442         return regmap_init(&hdev->dev, &regmap_ibt, ctx, &regmap_ibt_cfg);
443 }
444 EXPORT_SYMBOL_GPL(btintel_regmap_init);
445
446 MODULE_AUTHOR("Marcel Holtmann <marcel@holtmann.org>");
447 MODULE_DESCRIPTION("Bluetooth support for Intel devices ver " VERSION);
448 MODULE_VERSION(VERSION);
449 MODULE_LICENSE("GPL");
450 MODULE_FIRMWARE("intel/ibt-11-5.sfi");
451 MODULE_FIRMWARE("intel/ibt-11-5.ddc");