drivers/bus/omap_l3_noc.c

   1 /*
   2  * OMAP L3 Interconnect error handling driver
   3  *
   4  * Copyright (C) 2011-2014 Texas Instruments Incorporated - http://www.ti.com/
   5  *      Santosh Shilimkar <santosh.shilimkar@ti.com>
   6  *      Sricharan <r.sricharan@ti.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  13  * kind, whether express or implied; without even the implied warranty
  14  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  */
  17 #include <linux/init.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/io.h>
  20 #include <linux/kernel.h>
  21 #include <linux/module.h>
  22 #include <linux/of_device.h>
  23 #include <linux/of.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/slab.h>
  26
  27 #include "omap_l3_noc.h"
  28
  29 /*
  30  * Interrupt Handler for L3 error detection.
  31  *      1) Identify the L3 clockdomain partition to which the error belongs to.
  32  *      2) Identify the slave where the error information is logged
  33  *      3) Print the logged information.
  34  *      4) Add dump stack to provide kernel trace.
  35  *
  36  * Two Types of errors :
  37  *      1) Custom errors in L3 :
  38  *              Target like DMM/FW/EMIF generates SRESP=ERR error
  39  *      2) Standard L3 error:
  40  *              - Unsupported CMD.
  41  *                      L3 tries to access target while it is idle
  42  *              - OCP disconnect.
  43  *              - Address hole error:
  44  *                      If DSS/ISS/FDIF/USBHOSTFS access a target where they
  45  *                      do not have connectivity, the error is logged in
  46  *                      their default target which is DMM2.
  47  *
  48  *      On High Secure devices, firewall errors are possible and those
  49  *      can be trapped as well. But the trapping is implemented as part
  50  *      secure software and hence need not be implemented here.
  51  */
  52 static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
  53 {
  54
  55         struct omap_l3 *l3 = _l3;
  56         int inttype, i, k;
  57         int err_src = 0;
  58         u32 std_err_main, err_reg, clear, masterid;
  59         void __iomem *base, *l3_targ_base;
  60         void __iomem *l3_targ_stderr, *l3_targ_slvofslsb, *l3_targ_mstaddr;
  61         char *target_name, *master_name = "UN IDENTIFIED";
  62         struct l3_target_data *l3_targ_inst;
  63         struct l3_masters_data *master;
  64
  65         /* Get the Type of interrupt */
  66         inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
  67
  68         for (i = 0; i < l3->num_modules; i++) {
  69                 /*
  70                  * Read the regerr register of the clock domain
  71                  * to determine the source
  72                  */
  73                 base = l3->l3_base[i];
  74                 err_reg = readl_relaxed(base + l3->l3_flagmux[i] +
  75                                         L3_FLAGMUX_REGERR0 + (inttype << 3));
  76
  77                 /* Get the corresponding error and analyse */
  78                 if (err_reg) {
  79                         /* Identify the source from control status register */
  80                         err_src = __ffs(err_reg);
  81
  82                         /* We DONOT expect err_src to go out of bounds */
  83                         BUG_ON(err_src > MAX_CLKDM_TARGETS);
  84
  85                         l3_targ_inst = &l3->l3_targ[i][err_src];
  86                         target_name = l3_targ_inst->name;
  87                         l3_targ_base = base + l3_targ_inst->offset;
  88
  89                         /*
  90                          * If we do not know of a register offset to decode
  91                          * and clear, then mask.
  92                          */
  93                         if (target_name == L3_TARGET_NOT_SUPPORTED) {
  94                                 u32 mask_val;
  95                                 void __iomem *mask_reg;
  96
  97                                 /*
  98                                  * Certain plaforms may have "undocumented"
  99                                  * status pending on boot.. So dont generate
 100                                  * a severe warning here.
 101                                  */
 102                                 dev_err(l3->dev,
 103                                         "L3 %s error: target %d mod:%d %s\n",
 104                                         inttype ? "debug" : "application",
 105                                         err_src, i, "(unclearable)");
 106
 107                                 mask_reg = base + l3->l3_flagmux[i] +
 108                                            L3_FLAGMUX_MASK0 + (inttype << 3);
 109                                 mask_val = readl_relaxed(mask_reg);
 110                                 mask_val &= ~(1 << err_src);
 111                                 writel_relaxed(mask_val, mask_reg);
 112
 113                                 break;
 114                         }
 115
 116                         /* Read the stderrlog_main_source from clk domain */
 117                         l3_targ_stderr = l3_targ_base + L3_TARG_STDERRLOG_MAIN;
 118                         l3_targ_slvofslsb = l3_targ_base +
 119                                             L3_TARG_STDERRLOG_SLVOFSLSB;
 120                         l3_targ_mstaddr = l3_targ_base +
 121                                           L3_TARG_STDERRLOG_MSTADDR;
 122
 123                         std_err_main = readl_relaxed(l3_targ_stderr);
 124                         masterid = readl_relaxed(l3_targ_mstaddr);
 125
 126                         switch (std_err_main & CUSTOM_ERROR) {
 127                         case STANDARD_ERROR:
 128                                 WARN(true, "L3 standard error: TARGET:%s at address 0x%x\n",
 129                                         target_name,
 130                                         readl_relaxed(l3_targ_slvofslsb));
 131                                 /* clear the std error log*/
 132                                 clear = std_err_main | CLEAR_STDERR_LOG;
 133                                 writel_relaxed(clear, l3_targ_stderr);
 134                                 break;
 135
 136                         case CUSTOM_ERROR:
 137                                 for (k = 0, master = l3->l3_masters;
 138                                      k < l3->num_masters; k++, master++) {
 139                                         if (masterid == master->id) {
 140                                                 master_name = master->name;
 141                                                 break;
 142                                         }
 143                                 }
 144                                 WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n",
 145                                         master_name, target_name);
 146                                 /* clear the std error log*/
 147                                 clear = std_err_main | CLEAR_STDERR_LOG;
 148                                 writel_relaxed(clear, l3_targ_stderr);
 149                                 break;
 150
 151                         default:
 152                                 /* Nothing to be handled here as of now */
 153                                 break;
 154                         }
 155                 /* Error found so break the for loop */
 156                 break;
 157                 }
 158         }
 159         return IRQ_HANDLED;
 160 }
 161
 162 static const struct of_device_id l3_noc_match[] = {
 163         {.compatible = "ti,omap4-l3-noc", .data = &omap_l3_data},
 164         {},
 165 };
 166 MODULE_DEVICE_TABLE(of, l3_noc_match);
 167
 168 static int omap_l3_probe(struct platform_device *pdev)
 169 {
 170         const struct of_device_id *of_id;
 171         static struct omap_l3 *l3;
 172         int ret, i;
 173
 174         of_id = of_match_device(l3_noc_match, &pdev->dev);
 175         if (!of_id) {
 176                 dev_err(&pdev->dev, "OF data missing\n");
 177                 return -EINVAL;
 178         }
 179
 180         l3 = devm_kzalloc(&pdev->dev, sizeof(*l3), GFP_KERNEL);
 181         if (!l3)
 182                 return -ENOMEM;
 183
 184         memcpy(l3, of_id->data, sizeof(*l3));
 185         l3->dev = &pdev->dev;
 186         platform_set_drvdata(pdev, l3);
 187
 188         /* Get mem resources */
 189         for (i = 0; i < l3->num_modules; i++) {
 190                 struct resource *res = platform_get_resource(pdev,
 191                                                              IORESOURCE_MEM, i);
 192
 193                 l3->l3_base[i] = devm_ioremap_resource(&pdev->dev, res);
 194                 if (IS_ERR(l3->l3_base[i])) {
 195                         dev_err(l3->dev, "ioremap %d failed\n", i);
 196                         return PTR_ERR(l3->l3_base[i]);
 197                 }
 198         }
 199
 200         /*
 201          * Setup interrupt Handlers
 202          */
 203         l3->debug_irq = platform_get_irq(pdev, 0);
 204         ret = devm_request_irq(l3->dev, l3->debug_irq, l3_interrupt_handler,
 205                                IRQF_DISABLED, "l3-dbg-irq", l3);
 206         if (ret) {
 207                 dev_err(l3->dev, "request_irq failed for %d\n",
 208                         l3->debug_irq);
 209                 return ret;
 210         }
 211
 212         l3->app_irq = platform_get_irq(pdev, 1);
 213         ret = devm_request_irq(l3->dev, l3->app_irq, l3_interrupt_handler,
 214                                IRQF_DISABLED, "l3-app-irq", l3);
 215         if (ret)
 216                 dev_err(l3->dev, "request_irq failed for %d\n", l3->app_irq);
 217
 218         return ret;
 219 }
 220
 221 static struct platform_driver omap_l3_driver = {
 222         .probe          = omap_l3_probe,
 223         .driver         = {
 224                 .name           = "omap_l3_noc",
 225                 .owner          = THIS_MODULE,
 226                 .of_match_table = of_match_ptr(l3_noc_match),
 227         },
 228 };
 229
 230 static int __init omap_l3_init(void)
 231 {
 232         return platform_driver_register(&omap_l3_driver);
 233 }
 234 postcore_initcall_sync(omap_l3_init);
 235
 236 static void __exit omap_l3_exit(void)
 237 {
 238         platform_driver_unregister(&omap_l3_driver);
 239 }
 240 module_exit(omap_l3_exit);