bus: omap_l3_noc: convert target information into a structure
[firefly-linux-kernel-4.4.55.git] / drivers / bus / omap_l3_noc.c
1 /*
2  * OMAP L3 Interconnect error handling driver
3  *
4  * Copyright (C) 2011-2014 Texas Instruments Incorporated - http://www.ti.com/
5  *      Santosh Shilimkar <santosh.shilimkar@ti.com>
6  *      Sricharan <r.sricharan@ti.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
13  * kind, whether express or implied; without even the implied warranty
14  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  */
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/io.h>
20 #include <linux/platform_device.h>
21 #include <linux/interrupt.h>
22 #include <linux/kernel.h>
23 #include <linux/slab.h>
24
25 #include "omap_l3_noc.h"
26
27 /*
28  * Interrupt Handler for L3 error detection.
29  *      1) Identify the L3 clockdomain partition to which the error belongs to.
30  *      2) Identify the slave where the error information is logged
31  *      3) Print the logged information.
32  *      4) Add dump stack to provide kernel trace.
33  *
34  * Two Types of errors :
35  *      1) Custom errors in L3 :
36  *              Target like DMM/FW/EMIF generates SRESP=ERR error
37  *      2) Standard L3 error:
38  *              - Unsupported CMD.
39  *                      L3 tries to access target while it is idle
40  *              - OCP disconnect.
41  *              - Address hole error:
42  *                      If DSS/ISS/FDIF/USBHOSTFS access a target where they
43  *                      do not have connectivity, the error is logged in
44  *                      their default target which is DMM2.
45  *
46  *      On High Secure devices, firewall errors are possible and those
47  *      can be trapped as well. But the trapping is implemented as part
48  *      secure software and hence need not be implemented here.
49  */
50 static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
51 {
52
53         struct omap_l3 *l3 = _l3;
54         int inttype, i, k;
55         int err_src = 0;
56         u32 std_err_main, err_reg, clear, masterid;
57         void __iomem *base, *l3_targ_base;
58         void __iomem *l3_targ_stderr, *l3_targ_slvofslsb, *l3_targ_mstaddr;
59         char *target_name, *master_name = "UN IDENTIFIED";
60         struct l3_target_data *l3_targ_inst;
61
62         /* Get the Type of interrupt */
63         inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
64
65         for (i = 0; i < L3_MODULES; i++) {
66                 /*
67                  * Read the regerr register of the clock domain
68                  * to determine the source
69                  */
70                 base = l3->l3_base[i];
71                 err_reg = readl_relaxed(base + l3_flagmux[i] +
72                                         L3_FLAGMUX_REGERR0 + (inttype << 3));
73
74                 /* Get the corresponding error and analyse */
75                 if (err_reg) {
76                         /* Identify the source from control status register */
77                         err_src = __ffs(err_reg);
78                         l3_targ_inst = &l3_targ[i][err_src];
79                         target_name = l3_targ_inst->name;
80                         l3_targ_base = base + l3_targ_inst->offset;
81
82                         /* Read the stderrlog_main_source from clk domain */
83                         l3_targ_stderr = l3_targ_base + L3_TARG_STDERRLOG_MAIN;
84                         l3_targ_slvofslsb = l3_targ_base +
85                                             L3_TARG_STDERRLOG_SLVOFSLSB;
86                         l3_targ_mstaddr = l3_targ_base +
87                                           L3_TARG_STDERRLOG_MSTADDR;
88
89                         std_err_main = readl_relaxed(l3_targ_stderr);
90                         masterid = readl_relaxed(l3_targ_mstaddr);
91
92                         switch (std_err_main & CUSTOM_ERROR) {
93                         case STANDARD_ERROR:
94                                 WARN(true, "L3 standard error: TARGET:%s at address 0x%x\n",
95                                         target_name,
96                                         readl_relaxed(l3_targ_slvofslsb));
97                                 /* clear the std error log*/
98                                 clear = std_err_main | CLEAR_STDERR_LOG;
99                                 writel_relaxed(clear, l3_targ_stderr);
100                                 break;
101
102                         case CUSTOM_ERROR:
103                                 for (k = 0; k < NUM_OF_L3_MASTERS; k++) {
104                                         if (masterid == l3_masters[k].id)
105                                                 master_name =
106                                                         l3_masters[k].name;
107                                 }
108                                 WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n",
109                                         master_name, target_name);
110                                 /* clear the std error log*/
111                                 clear = std_err_main | CLEAR_STDERR_LOG;
112                                 writel_relaxed(clear, l3_targ_stderr);
113                                 break;
114
115                         default:
116                                 /* Nothing to be handled here as of now */
117                                 break;
118                         }
119                 /* Error found so break the for loop */
120                 break;
121                 }
122         }
123         return IRQ_HANDLED;
124 }
125
126 static int omap_l3_probe(struct platform_device *pdev)
127 {
128         static struct omap_l3 *l3;
129         int ret, i;
130
131         l3 = devm_kzalloc(&pdev->dev, sizeof(*l3), GFP_KERNEL);
132         if (!l3)
133                 return -ENOMEM;
134
135         l3->dev = &pdev->dev;
136         platform_set_drvdata(pdev, l3);
137
138         /* Get mem resources */
139         for (i = 0; i < L3_MODULES; i++) {
140                 struct resource *res = platform_get_resource(pdev,
141                                                              IORESOURCE_MEM, i);
142
143                 l3->l3_base[i] = devm_ioremap_resource(&pdev->dev, res);
144                 if (IS_ERR(l3->l3_base[i])) {
145                         dev_err(l3->dev, "ioremap %d failed\n", i);
146                         return PTR_ERR(l3->l3_base[i]);
147                 }
148         }
149
150         /*
151          * Setup interrupt Handlers
152          */
153         l3->debug_irq = platform_get_irq(pdev, 0);
154         ret = devm_request_irq(l3->dev, l3->debug_irq, l3_interrupt_handler,
155                                IRQF_DISABLED, "l3-dbg-irq", l3);
156         if (ret) {
157                 dev_err(l3->dev, "request_irq failed for %d\n",
158                         l3->debug_irq);
159                 return ret;
160         }
161
162         l3->app_irq = platform_get_irq(pdev, 1);
163         ret = devm_request_irq(l3->dev, l3->app_irq, l3_interrupt_handler,
164                                IRQF_DISABLED, "l3-app-irq", l3);
165         if (ret)
166                 dev_err(l3->dev, "request_irq failed for %d\n", l3->app_irq);
167
168         return ret;
169 }
170
171 #if defined(CONFIG_OF)
172 static const struct of_device_id l3_noc_match[] = {
173         {.compatible = "ti,omap4-l3-noc", },
174         {},
175 };
176 MODULE_DEVICE_TABLE(of, l3_noc_match);
177 #else
178 #define l3_noc_match NULL
179 #endif
180
181 static struct platform_driver omap_l3_driver = {
182         .probe          = omap_l3_probe,
183         .driver         = {
184                 .name           = "omap_l3_noc",
185                 .owner          = THIS_MODULE,
186                 .of_match_table = l3_noc_match,
187         },
188 };
189
190 static int __init omap_l3_init(void)
191 {
192         return platform_driver_register(&omap_l3_driver);
193 }
194 postcore_initcall_sync(omap_l3_init);
195
196 static void __exit omap_l3_exit(void)
197 {
198         platform_driver_unregister(&omap_l3_driver);
199 }
200 module_exit(omap_l3_exit);