bus: omap_l3_noc: switch over to relaxed variants of readl/writel
[firefly-linux-kernel-4.4.55.git] / drivers / bus / omap_l3_noc.c
1 /*
2  * OMAP L3 Interconnect error handling driver
3  *
4  * Copyright (C) 2011-2014 Texas Instruments Incorporated - http://www.ti.com/
5  *      Santosh Shilimkar <santosh.shilimkar@ti.com>
6  *      Sricharan <r.sricharan@ti.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
13  * kind, whether express or implied; without even the implied warranty
14  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  */
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/io.h>
20 #include <linux/platform_device.h>
21 #include <linux/interrupt.h>
22 #include <linux/kernel.h>
23 #include <linux/slab.h>
24
25 #include "omap_l3_noc.h"
26
27 /*
28  * Interrupt Handler for L3 error detection.
29  *      1) Identify the L3 clockdomain partition to which the error belongs to.
30  *      2) Identify the slave where the error information is logged
31  *      3) Print the logged information.
32  *      4) Add dump stack to provide kernel trace.
33  *
34  * Two Types of errors :
35  *      1) Custom errors in L3 :
36  *              Target like DMM/FW/EMIF generates SRESP=ERR error
37  *      2) Standard L3 error:
38  *              - Unsupported CMD.
39  *                      L3 tries to access target while it is idle
40  *              - OCP disconnect.
41  *              - Address hole error:
42  *                      If DSS/ISS/FDIF/USBHOSTFS access a target where they
43  *                      do not have connectivity, the error is logged in
44  *                      their default target which is DMM2.
45  *
46  *      On High Secure devices, firewall errors are possible and those
47  *      can be trapped as well. But the trapping is implemented as part
48  *      secure software and hence need not be implemented here.
49  */
50 static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
51 {
52
53         struct omap_l3 *l3 = _l3;
54         int inttype, i, k;
55         int err_src = 0;
56         u32 std_err_main, err_reg, clear, masterid;
57         void __iomem *base, *l3_targ_base;
58         void __iomem *l3_targ_stderr, *l3_targ_slvofslsb, *l3_targ_mstaddr;
59         char *target_name, *master_name = "UN IDENTIFIED";
60
61         /* Get the Type of interrupt */
62         inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
63
64         for (i = 0; i < L3_MODULES; i++) {
65                 /*
66                  * Read the regerr register of the clock domain
67                  * to determine the source
68                  */
69                 base = l3->l3_base[i];
70                 err_reg = readl_relaxed(base + l3_flagmux[i] +
71                                         L3_FLAGMUX_REGERR0 + (inttype << 3));
72
73                 /* Get the corresponding error and analyse */
74                 if (err_reg) {
75                         /* Identify the source from control status register */
76                         err_src = __ffs(err_reg);
77
78                         /* Read the stderrlog_main_source from clk domain */
79                         l3_targ_base = base + *(l3_targ[i] + err_src);
80                         l3_targ_stderr = l3_targ_base + L3_TARG_STDERRLOG_MAIN;
81                         l3_targ_slvofslsb = l3_targ_base +
82                                             L3_TARG_STDERRLOG_SLVOFSLSB;
83                         l3_targ_mstaddr = l3_targ_base +
84                                           L3_TARG_STDERRLOG_MSTADDR;
85
86                         std_err_main = readl_relaxed(l3_targ_stderr);
87                         masterid = readl_relaxed(l3_targ_mstaddr);
88
89                         switch (std_err_main & CUSTOM_ERROR) {
90                         case STANDARD_ERROR:
91                                 target_name =
92                                         l3_targ_inst_name[i][err_src];
93                                 WARN(true, "L3 standard error: TARGET:%s at address 0x%x\n",
94                                         target_name,
95                                         readl_relaxed(l3_targ_slvofslsb));
96                                 /* clear the std error log*/
97                                 clear = std_err_main | CLEAR_STDERR_LOG;
98                                 writel_relaxed(clear, l3_targ_stderr);
99                                 break;
100
101                         case CUSTOM_ERROR:
102                                 target_name =
103                                         l3_targ_inst_name[i][err_src];
104                                 for (k = 0; k < NUM_OF_L3_MASTERS; k++) {
105                                         if (masterid == l3_masters[k].id)
106                                                 master_name =
107                                                         l3_masters[k].name;
108                                 }
109                                 WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n",
110                                         master_name, target_name);
111                                 /* clear the std error log*/
112                                 clear = std_err_main | CLEAR_STDERR_LOG;
113                                 writel_relaxed(clear, l3_targ_stderr);
114                                 break;
115
116                         default:
117                                 /* Nothing to be handled here as of now */
118                                 break;
119                         }
120                 /* Error found so break the for loop */
121                 break;
122                 }
123         }
124         return IRQ_HANDLED;
125 }
126
127 static int omap_l3_probe(struct platform_device *pdev)
128 {
129         static struct omap_l3 *l3;
130         int ret, i;
131
132         l3 = devm_kzalloc(&pdev->dev, sizeof(*l3), GFP_KERNEL);
133         if (!l3)
134                 return -ENOMEM;
135
136         l3->dev = &pdev->dev;
137         platform_set_drvdata(pdev, l3);
138
139         /* Get mem resources */
140         for (i = 0; i < L3_MODULES; i++) {
141                 struct resource *res = platform_get_resource(pdev,
142                                                              IORESOURCE_MEM, i);
143
144                 l3->l3_base[i] = devm_ioremap_resource(&pdev->dev, res);
145                 if (IS_ERR(l3->l3_base[i])) {
146                         dev_err(l3->dev, "ioremap %d failed\n", i);
147                         return PTR_ERR(l3->l3_base[i]);
148                 }
149         }
150
151         /*
152          * Setup interrupt Handlers
153          */
154         l3->debug_irq = platform_get_irq(pdev, 0);
155         ret = devm_request_irq(l3->dev, l3->debug_irq, l3_interrupt_handler,
156                                IRQF_DISABLED, "l3-dbg-irq", l3);
157         if (ret) {
158                 dev_err(l3->dev, "request_irq failed for %d\n",
159                         l3->debug_irq);
160                 return ret;
161         }
162
163         l3->app_irq = platform_get_irq(pdev, 1);
164         ret = devm_request_irq(l3->dev, l3->app_irq, l3_interrupt_handler,
165                                IRQF_DISABLED, "l3-app-irq", l3);
166         if (ret)
167                 dev_err(l3->dev, "request_irq failed for %d\n", l3->app_irq);
168
169         return ret;
170 }
171
172 #if defined(CONFIG_OF)
173 static const struct of_device_id l3_noc_match[] = {
174         {.compatible = "ti,omap4-l3-noc", },
175         {},
176 };
177 MODULE_DEVICE_TABLE(of, l3_noc_match);
178 #else
179 #define l3_noc_match NULL
180 #endif
181
182 static struct platform_driver omap_l3_driver = {
183         .probe          = omap_l3_probe,
184         .driver         = {
185                 .name           = "omap_l3_noc",
186                 .owner          = THIS_MODULE,
187                 .of_match_table = l3_noc_match,
188         },
189 };
190
191 static int __init omap_l3_init(void)
192 {
193         return platform_driver_register(&omap_l3_driver);
194 }
195 postcore_initcall_sync(omap_l3_init);
196
197 static void __exit omap_l3_exit(void)
198 {
199         platform_driver_unregister(&omap_l3_driver);
200 }
201 module_exit(omap_l3_exit);