drivers/bus/omap_l3_noc.c

   1 /*
   2  * OMAP4XXX L3 Interconnect error handling driver
   3  *
   4  * Copyright (C) 2011 Texas Corporation
   5  *      Santosh Shilimkar <santosh.shilimkar@ti.com>
   6  *      Sricharan <r.sricharan@ti.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
  21  * USA
  22  */
  23 #include <linux/module.h>
  24 #include <linux/init.h>
  25 #include <linux/io.h>
  26 #include <linux/platform_device.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/kernel.h>
  29 #include <linux/slab.h>
  30
  31 #include "omap_l3_noc.h"
  32
  33 /*
  34  * Interrupt Handler for L3 error detection.
  35  *      1) Identify the L3 clockdomain partition to which the error belongs to.
  36  *      2) Identify the slave where the error information is logged
  37  *      3) Print the logged information.
  38  *      4) Add dump stack to provide kernel trace.
  39  *
  40  * Two Types of errors :
  41  *      1) Custom errors in L3 :
  42  *              Target like DMM/FW/EMIF generates SRESP=ERR error
  43  *      2) Standard L3 error:
  44  *              - Unsupported CMD.
  45  *                      L3 tries to access target while it is idle
  46  *              - OCP disconnect.
  47  *              - Address hole error:
  48  *                      If DSS/ISS/FDIF/USBHOSTFS access a target where they
  49  *                      do not have connectivity, the error is logged in
  50  *                      their default target which is DMM2.
  51  *
  52  *      On High Secure devices, firewall errors are possible and those
  53  *      can be trapped as well. But the trapping is implemented as part
  54  *      secure software and hence need not be implemented here.
  55  */
  56 static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
  57 {
  58
  59         struct omap4_l3 *l3 = _l3;
  60         int inttype, i, k;
  61         int err_src = 0;
  62         u32 std_err_main, err_reg, clear, masterid;
  63         void __iomem *base, *l3_targ_base;
  64         char *target_name, *master_name = "UN IDENTIFIED";
  65
  66         /* Get the Type of interrupt */
  67         inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
  68
  69         for (i = 0; i < L3_MODULES; i++) {
  70                 /*
  71                  * Read the regerr register of the clock domain
  72                  * to determine the source
  73                  */
  74                 base = l3->l3_base[i];
  75                 err_reg = __raw_readl(base + l3_flagmux[i] +
  76                                         + L3_FLAGMUX_REGERR0 + (inttype << 3));
  77
  78                 /* Get the corresponding error and analyse */
  79                 if (err_reg) {
  80                         /* Identify the source from control status register */
  81                         err_src = __ffs(err_reg);
  82
  83                         /* Read the stderrlog_main_source from clk domain */
  84                         l3_targ_base = base + *(l3_targ[i] + err_src);
  85                         std_err_main =  __raw_readl(l3_targ_base +
  86                                         L3_TARG_STDERRLOG_MAIN);
  87                         masterid = __raw_readl(l3_targ_base +
  88                                         L3_TARG_STDERRLOG_MSTADDR);
  89
  90                         switch (std_err_main & CUSTOM_ERROR) {
  91                         case STANDARD_ERROR:
  92                                 target_name =
  93                                         l3_targ_inst_name[i][err_src];
  94                                 WARN(true, "L3 standard error: TARGET:%s at address 0x%x\n",
  95                                         target_name,
  96                                         __raw_readl(l3_targ_base +
  97                                                 L3_TARG_STDERRLOG_SLVOFSLSB));
  98                                 /* clear the std error log*/
  99                                 clear = std_err_main | CLEAR_STDERR_LOG;
 100                                 writel(clear, l3_targ_base +
 101                                         L3_TARG_STDERRLOG_MAIN);
 102                                 break;
 103
 104                         case CUSTOM_ERROR:
 105                                 target_name =
 106                                         l3_targ_inst_name[i][err_src];
 107                                 for (k = 0; k < NUM_OF_L3_MASTERS; k++) {
 108                                         if (masterid == l3_masters[k].id)
 109                                                 master_name =
 110                                                         l3_masters[k].name;
 111                                 }
 112                                 WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n",
 113                                         master_name, target_name);
 114                                 /* clear the std error log*/
 115                                 clear = std_err_main | CLEAR_STDERR_LOG;
 116                                 writel(clear, l3_targ_base +
 117                                         L3_TARG_STDERRLOG_MAIN);
 118                                 break;
 119
 120                         default:
 121                                 /* Nothing to be handled here as of now */
 122                                 break;
 123                         }
 124                 /* Error found so break the for loop */
 125                 break;
 126                 }
 127         }
 128         return IRQ_HANDLED;
 129 }
 130
 131 static int omap4_l3_probe(struct platform_device *pdev)
 132 {
 133         static struct omap4_l3 *l3;
 134         struct resource *res;
 135         int ret;
 136
 137         l3 = devm_kzalloc(&pdev->dev, sizeof(*l3), GFP_KERNEL);
 138         if (!l3)
 139                 return -ENOMEM;
 140
 141         platform_set_drvdata(pdev, l3);
 142         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 143         if (!res) {
 144                 dev_err(&pdev->dev, "couldn't find resource 0\n");
 145                 return -ENODEV;
 146         }
 147
 148         l3->l3_base[0] = ioremap(res->start, resource_size(res));
 149         if (!l3->l3_base[0]) {
 150                 dev_err(&pdev->dev, "ioremap failed\n");
 151                 return -ENOMEM;
 152         }
 153
 154         res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 155         if (!res) {
 156                 dev_err(&pdev->dev, "couldn't find resource 1\n");
 157                 ret = -ENODEV;
 158                 goto err1;
 159         }
 160
 161         l3->l3_base[1] = ioremap(res->start, resource_size(res));
 162         if (!l3->l3_base[1]) {
 163                 dev_err(&pdev->dev, "ioremap failed\n");
 164                 ret = -ENOMEM;
 165                 goto err1;
 166         }
 167
 168         res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
 169         if (!res) {
 170                 dev_err(&pdev->dev, "couldn't find resource 2\n");
 171                 ret = -ENODEV;
 172                 goto err2;
 173         }
 174
 175         l3->l3_base[2] = ioremap(res->start, resource_size(res));
 176         if (!l3->l3_base[2]) {
 177                 dev_err(&pdev->dev, "ioremap failed\n");
 178                 ret = -ENOMEM;
 179                 goto err2;
 180         }
 181
 182         /*
 183          * Setup interrupt Handlers
 184          */
 185         l3->debug_irq = platform_get_irq(pdev, 0);
 186         ret = request_irq(l3->debug_irq,
 187                         l3_interrupt_handler,
 188                         IRQF_DISABLED, "l3-dbg-irq", l3);
 189         if (ret) {
 190                 pr_crit("L3: request_irq failed to register for 0x%x\n",
 191                                                 l3->debug_irq);
 192                 goto err3;
 193         }
 194
 195         l3->app_irq = platform_get_irq(pdev, 1);
 196         ret = request_irq(l3->app_irq,
 197                         l3_interrupt_handler,
 198                         IRQF_DISABLED, "l3-app-irq", l3);
 199         if (ret) {
 200                 pr_crit("L3: request_irq failed to register for 0x%x\n",
 201                                                 l3->app_irq);
 202                 goto err4;
 203         }
 204
 205         return 0;
 206
 207 err4:
 208         free_irq(l3->debug_irq, l3);
 209 err3:
 210         iounmap(l3->l3_base[2]);
 211 err2:
 212         iounmap(l3->l3_base[1]);
 213 err1:
 214         iounmap(l3->l3_base[0]);
 215         return ret;
 216 }
 217
 218 static int omap4_l3_remove(struct platform_device *pdev)
 219 {
 220         struct omap4_l3 *l3 = platform_get_drvdata(pdev);
 221
 222         free_irq(l3->app_irq, l3);
 223         free_irq(l3->debug_irq, l3);
 224         iounmap(l3->l3_base[0]);
 225         iounmap(l3->l3_base[1]);
 226         iounmap(l3->l3_base[2]);
 227
 228         return 0;
 229 }
 230
 231 #if defined(CONFIG_OF)
 232 static const struct of_device_id l3_noc_match[] = {
 233         {.compatible = "ti,omap4-l3-noc", },
 234         {},
 235 };
 236 MODULE_DEVICE_TABLE(of, l3_noc_match);
 237 #else
 238 #define l3_noc_match NULL
 239 #endif
 240
 241 static struct platform_driver omap4_l3_driver = {
 242         .probe          = omap4_l3_probe,
 243         .remove         = omap4_l3_remove,
 244         .driver         = {
 245                 .name           = "omap_l3_noc",
 246                 .owner          = THIS_MODULE,
 247                 .of_match_table = l3_noc_match,
 248         },
 249 };
 250
 251 static int __init omap4_l3_init(void)
 252 {
 253         return platform_driver_register(&omap4_l3_driver);
 254 }
 255 postcore_initcall_sync(omap4_l3_init);
 256
 257 static void __exit omap4_l3_exit(void)
 258 {
 259         platform_driver_unregister(&omap4_l3_driver);
 260 }
 261 module_exit(omap4_l3_exit);