drivers/bus/omap_l3_noc.c

   1 /*
   2  * OMAP L3 Interconnect error handling driver
   3  *
   4  * Copyright (C) 2011-2014 Texas Instruments Incorporated - http://www.ti.com/
   5  *      Santosh Shilimkar <santosh.shilimkar@ti.com>
   6  *      Sricharan <r.sricharan@ti.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  13  * kind, whether express or implied; without even the implied warranty
  14  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  */
  17 #include <linux/module.h>
  18 #include <linux/init.h>
  19 #include <linux/io.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/kernel.h>
  23 #include <linux/slab.h>
  24
  25 #include "omap_l3_noc.h"
  26
  27 /*
  28  * Interrupt Handler for L3 error detection.
  29  *      1) Identify the L3 clockdomain partition to which the error belongs to.
  30  *      2) Identify the slave where the error information is logged
  31  *      3) Print the logged information.
  32  *      4) Add dump stack to provide kernel trace.
  33  *
  34  * Two Types of errors :
  35  *      1) Custom errors in L3 :
  36  *              Target like DMM/FW/EMIF generates SRESP=ERR error
  37  *      2) Standard L3 error:
  38  *              - Unsupported CMD.
  39  *                      L3 tries to access target while it is idle
  40  *              - OCP disconnect.
  41  *              - Address hole error:
  42  *                      If DSS/ISS/FDIF/USBHOSTFS access a target where they
  43  *                      do not have connectivity, the error is logged in
  44  *                      their default target which is DMM2.
  45  *
  46  *      On High Secure devices, firewall errors are possible and those
  47  *      can be trapped as well. But the trapping is implemented as part
  48  *      secure software and hence need not be implemented here.
  49  */
  50 static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
  51 {
  52
  53         struct omap_l3 *l3 = _l3;
  54         int inttype, i, k;
  55         int err_src = 0;
  56         u32 std_err_main, err_reg, clear, masterid;
  57         void __iomem *base, *l3_targ_base;
  58         char *target_name, *master_name = "UN IDENTIFIED";
  59
  60         /* Get the Type of interrupt */
  61         inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
  62
  63         for (i = 0; i < L3_MODULES; i++) {
  64                 /*
  65                  * Read the regerr register of the clock domain
  66                  * to determine the source
  67                  */
  68                 base = l3->l3_base[i];
  69                 err_reg = __raw_readl(base + l3_flagmux[i] +
  70                                         + L3_FLAGMUX_REGERR0 + (inttype << 3));
  71
  72                 /* Get the corresponding error and analyse */
  73                 if (err_reg) {
  74                         /* Identify the source from control status register */
  75                         err_src = __ffs(err_reg);
  76
  77                         /* Read the stderrlog_main_source from clk domain */
  78                         l3_targ_base = base + *(l3_targ[i] + err_src);
  79                         std_err_main =  __raw_readl(l3_targ_base +
  80                                         L3_TARG_STDERRLOG_MAIN);
  81                         masterid = __raw_readl(l3_targ_base +
  82                                         L3_TARG_STDERRLOG_MSTADDR);
  83
  84                         switch (std_err_main & CUSTOM_ERROR) {
  85                         case STANDARD_ERROR:
  86                                 target_name =
  87                                         l3_targ_inst_name[i][err_src];
  88                                 WARN(true, "L3 standard error: TARGET:%s at address 0x%x\n",
  89                                         target_name,
  90                                         __raw_readl(l3_targ_base +
  91                                                 L3_TARG_STDERRLOG_SLVOFSLSB));
  92                                 /* clear the std error log*/
  93                                 clear = std_err_main | CLEAR_STDERR_LOG;
  94                                 writel(clear, l3_targ_base +
  95                                         L3_TARG_STDERRLOG_MAIN);
  96                                 break;
  97
  98                         case CUSTOM_ERROR:
  99                                 target_name =
 100                                         l3_targ_inst_name[i][err_src];
 101                                 for (k = 0; k < NUM_OF_L3_MASTERS; k++) {
 102                                         if (masterid == l3_masters[k].id)
 103                                                 master_name =
 104                                                         l3_masters[k].name;
 105                                 }
 106                                 WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n",
 107                                         master_name, target_name);
 108                                 /* clear the std error log*/
 109                                 clear = std_err_main | CLEAR_STDERR_LOG;
 110                                 writel(clear, l3_targ_base +
 111                                         L3_TARG_STDERRLOG_MAIN);
 112                                 break;
 113
 114                         default:
 115                                 /* Nothing to be handled here as of now */
 116                                 break;
 117                         }
 118                 /* Error found so break the for loop */
 119                 break;
 120                 }
 121         }
 122         return IRQ_HANDLED;
 123 }
 124
 125 static int omap_l3_probe(struct platform_device *pdev)
 126 {
 127         static struct omap_l3 *l3;
 128         int ret, i;
 129
 130         l3 = devm_kzalloc(&pdev->dev, sizeof(*l3), GFP_KERNEL);
 131         if (!l3)
 132                 return -ENOMEM;
 133
 134         platform_set_drvdata(pdev, l3);
 135
 136         /* Get mem resources */
 137         for (i = 0; i < L3_MODULES; i++) {
 138                 struct resource *res = platform_get_resource(pdev,
 139                                                              IORESOURCE_MEM, i);
 140
 141                 l3->l3_base[i] = devm_ioremap_resource(&pdev->dev, res);
 142                 if (IS_ERR(l3->l3_base[i])) {
 143                         dev_err(&pdev->dev, "ioremap %d failed\n", i);
 144                         return PTR_ERR(l3->l3_base[i]);
 145                 }
 146         }
 147
 148         /*
 149          * Setup interrupt Handlers
 150          */
 151         l3->debug_irq = platform_get_irq(pdev, 0);
 152         ret = devm_request_irq(&pdev->dev, l3->debug_irq, l3_interrupt_handler,
 153                                IRQF_DISABLED, "l3-dbg-irq", l3);
 154         if (ret) {
 155                 dev_err(&pdev->dev, "request_irq failed for %d\n",
 156                         l3->debug_irq);
 157                 return ret;
 158         }
 159
 160         l3->app_irq = platform_get_irq(pdev, 1);
 161         ret = devm_request_irq(&pdev->dev, l3->app_irq, l3_interrupt_handler,
 162                                IRQF_DISABLED, "l3-app-irq", l3);
 163         if (ret)
 164                 dev_err(&pdev->dev, "request_irq failed for %d\n", l3->app_irq);
 165
 166         return ret;
 167 }
 168
 169 #if defined(CONFIG_OF)
 170 static const struct of_device_id l3_noc_match[] = {
 171         {.compatible = "ti,omap4-l3-noc", },
 172         {},
 173 };
 174 MODULE_DEVICE_TABLE(of, l3_noc_match);
 175 #else
 176 #define l3_noc_match NULL
 177 #endif
 178
 179 static struct platform_driver omap_l3_driver = {
 180         .probe          = omap_l3_probe,
 181         .driver         = {
 182                 .name           = "omap_l3_noc",
 183                 .owner          = THIS_MODULE,
 184                 .of_match_table = l3_noc_match,
 185         },
 186 };
 187
 188 static int __init omap_l3_init(void)
 189 {
 190         return platform_driver_register(&omap_l3_driver);
 191 }
 192 postcore_initcall_sync(omap_l3_init);
 193
 194 static void __exit omap_l3_exit(void)
 195 {
 196         platform_driver_unregister(&omap_l3_driver);
 197 }
 198 module_exit(omap_l3_exit);