2 * Intel & MS High Precision Event Timer Implementation.
4 * Copyright (C) 2003 Intel Corporation
6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7 * Bob Picco <robert.picco@hp.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/smp_lock.h>
18 #include <linux/types.h>
19 #include <linux/miscdevice.h>
20 #include <linux/major.h>
21 #include <linux/ioport.h>
22 #include <linux/fcntl.h>
23 #include <linux/init.h>
24 #include <linux/poll.h>
26 #include <linux/proc_fs.h>
27 #include <linux/spinlock.h>
28 #include <linux/sysctl.h>
29 #include <linux/wait.h>
30 #include <linux/bcd.h>
31 #include <linux/seq_file.h>
32 #include <linux/bitops.h>
33 #include <linux/clocksource.h>
35 #include <asm/current.h>
36 #include <asm/uaccess.h>
37 #include <asm/system.h>
40 #include <asm/div64.h>
42 #include <linux/acpi.h>
43 #include <acpi/acpi_bus.h>
44 #include <linux/hpet.h>
47 * The High Precision Event Timer driver.
48 * This driver is closely modelled after the rtc.c driver.
49 * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
51 #define HPET_USER_FREQ (64)
52 #define HPET_DRIFT (500)
54 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
57 /* WARNING -- don't get confused. These macros are never used
58 * to write the (single) counter, and rarely to read it.
59 * They're badly named; to fix, someday.
61 #if BITS_PER_LONG == 64
62 #define write_counter(V, MC) writeq(V, MC)
63 #define read_counter(MC) readq(MC)
65 #define write_counter(V, MC) writel(V, MC)
66 #define read_counter(MC) readl(MC)
69 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
71 /* This clocksource driver currently only works on ia64 */
73 static void __iomem *hpet_mctr;
75 static cycle_t read_hpet(struct clocksource *cs)
77 return (cycle_t)read_counter((void __iomem *)hpet_mctr);
80 static struct clocksource clocksource_hpet = {
84 .mask = CLOCKSOURCE_MASK(64),
85 .mult = 0, /* to be calculated */
87 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
89 static struct clocksource *hpet_clocksource;
92 /* A lock for concurrent access by app and isr hpet activity. */
93 static DEFINE_SPINLOCK(hpet_lock);
95 #define HPET_DEV_NAME (7)
98 struct hpets *hd_hpets;
99 struct hpet __iomem *hd_hpet;
100 struct hpet_timer __iomem *hd_timer;
101 unsigned long hd_ireqfreq;
102 unsigned long hd_irqdata;
103 wait_queue_head_t hd_waitqueue;
104 struct fasync_struct *hd_async_queue;
105 unsigned int hd_flags;
107 unsigned int hd_hdwirq;
108 char hd_name[HPET_DEV_NAME];
112 struct hpets *hp_next;
113 struct hpet __iomem *hp_hpet;
114 unsigned long hp_hpet_phys;
115 struct clocksource *hp_clocksource;
116 unsigned long long hp_tick_freq;
117 unsigned long hp_delta;
118 unsigned int hp_ntimer;
119 unsigned int hp_which;
120 struct hpet_dev hp_dev[1];
123 static struct hpets *hpets;
125 #define HPET_OPEN 0x0001
126 #define HPET_IE 0x0002 /* interrupt enabled */
127 #define HPET_PERIODIC 0x0004
128 #define HPET_SHARED_IRQ 0x0008
132 static inline unsigned long long readq(void __iomem *addr)
134 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
139 static inline void writeq(unsigned long long v, void __iomem *addr)
141 writel(v & 0xffffffff, addr);
142 writel(v >> 32, addr + 4);
146 static irqreturn_t hpet_interrupt(int irq, void *data)
148 struct hpet_dev *devp;
152 isr = 1 << (devp - devp->hd_hpets->hp_dev);
154 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
155 !(isr & readl(&devp->hd_hpet->hpet_isr)))
158 spin_lock(&hpet_lock);
162 * For non-periodic timers, increment the accumulator.
163 * This has the effect of treating non-periodic like periodic.
165 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
168 t = devp->hd_ireqfreq;
169 m = read_counter(&devp->hd_timer->hpet_compare);
170 write_counter(t + m, &devp->hd_timer->hpet_compare);
173 if (devp->hd_flags & HPET_SHARED_IRQ)
174 writel(isr, &devp->hd_hpet->hpet_isr);
175 spin_unlock(&hpet_lock);
177 wake_up_interruptible(&devp->hd_waitqueue);
179 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
184 static void hpet_timer_set_irq(struct hpet_dev *devp)
188 struct hpet_timer __iomem *timer;
190 spin_lock_irq(&hpet_lock);
191 if (devp->hd_hdwirq) {
192 spin_unlock_irq(&hpet_lock);
196 timer = devp->hd_timer;
198 /* we prefer level triggered mode */
199 v = readl(&timer->hpet_config);
200 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
201 v |= Tn_INT_TYPE_CNF_MASK;
202 writel(v, &timer->hpet_config);
204 spin_unlock_irq(&hpet_lock);
206 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
207 Tn_INT_ROUTE_CAP_SHIFT;
210 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
211 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
213 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
218 for (irq = find_first_bit(&v, HPET_MAX_IRQ); irq < HPET_MAX_IRQ;
219 irq = find_next_bit(&v, HPET_MAX_IRQ, 1 + irq)) {
221 if (irq >= nr_irqs) {
226 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
231 /* FIXME: Setup interrupt source table */
234 if (irq < HPET_MAX_IRQ) {
235 spin_lock_irq(&hpet_lock);
236 v = readl(&timer->hpet_config);
237 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
238 writel(v, &timer->hpet_config);
239 devp->hd_hdwirq = gsi;
240 spin_unlock_irq(&hpet_lock);
245 static int hpet_open(struct inode *inode, struct file *file)
247 struct hpet_dev *devp;
251 if (file->f_mode & FMODE_WRITE)
255 spin_lock_irq(&hpet_lock);
257 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
258 for (i = 0; i < hpetp->hp_ntimer; i++)
259 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
262 devp = &hpetp->hp_dev[i];
267 spin_unlock_irq(&hpet_lock);
272 file->private_data = devp;
273 devp->hd_irqdata = 0;
274 devp->hd_flags |= HPET_OPEN;
275 spin_unlock_irq(&hpet_lock);
278 hpet_timer_set_irq(devp);
284 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
286 DECLARE_WAITQUEUE(wait, current);
289 struct hpet_dev *devp;
291 devp = file->private_data;
292 if (!devp->hd_ireqfreq)
295 if (count < sizeof(unsigned long))
298 add_wait_queue(&devp->hd_waitqueue, &wait);
301 set_current_state(TASK_INTERRUPTIBLE);
303 spin_lock_irq(&hpet_lock);
304 data = devp->hd_irqdata;
305 devp->hd_irqdata = 0;
306 spin_unlock_irq(&hpet_lock);
310 else if (file->f_flags & O_NONBLOCK) {
313 } else if (signal_pending(current)) {
314 retval = -ERESTARTSYS;
320 retval = put_user(data, (unsigned long __user *)buf);
322 retval = sizeof(unsigned long);
324 __set_current_state(TASK_RUNNING);
325 remove_wait_queue(&devp->hd_waitqueue, &wait);
330 static unsigned int hpet_poll(struct file *file, poll_table * wait)
333 struct hpet_dev *devp;
335 devp = file->private_data;
337 if (!devp->hd_ireqfreq)
340 poll_wait(file, &devp->hd_waitqueue, wait);
342 spin_lock_irq(&hpet_lock);
343 v = devp->hd_irqdata;
344 spin_unlock_irq(&hpet_lock);
347 return POLLIN | POLLRDNORM;
352 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
354 #ifdef CONFIG_HPET_MMAP
355 struct hpet_dev *devp;
358 if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
361 devp = file->private_data;
362 addr = devp->hd_hpets->hp_hpet_phys;
364 if (addr & (PAGE_SIZE - 1))
367 vma->vm_flags |= VM_IO;
368 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
370 if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
371 PAGE_SIZE, vma->vm_page_prot)) {
372 printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
383 static int hpet_fasync(int fd, struct file *file, int on)
385 struct hpet_dev *devp;
387 devp = file->private_data;
389 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
395 static int hpet_release(struct inode *inode, struct file *file)
397 struct hpet_dev *devp;
398 struct hpet_timer __iomem *timer;
401 devp = file->private_data;
402 timer = devp->hd_timer;
404 spin_lock_irq(&hpet_lock);
406 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
407 &timer->hpet_config);
412 devp->hd_ireqfreq = 0;
414 if (devp->hd_flags & HPET_PERIODIC
415 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
418 v = readq(&timer->hpet_config);
419 v ^= Tn_TYPE_CNF_MASK;
420 writeq(v, &timer->hpet_config);
423 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
424 spin_unlock_irq(&hpet_lock);
429 file->private_data = NULL;
433 static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int);
436 hpet_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
439 struct hpet_dev *devp;
441 devp = file->private_data;
442 return hpet_ioctl_common(devp, cmd, arg, 0);
445 static int hpet_ioctl_ieon(struct hpet_dev *devp)
447 struct hpet_timer __iomem *timer;
448 struct hpet __iomem *hpet;
451 unsigned long g, v, t, m;
452 unsigned long flags, isr;
454 timer = devp->hd_timer;
455 hpet = devp->hd_hpet;
456 hpetp = devp->hd_hpets;
458 if (!devp->hd_ireqfreq)
461 spin_lock_irq(&hpet_lock);
463 if (devp->hd_flags & HPET_IE) {
464 spin_unlock_irq(&hpet_lock);
468 devp->hd_flags |= HPET_IE;
470 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
471 devp->hd_flags |= HPET_SHARED_IRQ;
472 spin_unlock_irq(&hpet_lock);
474 irq = devp->hd_hdwirq;
477 unsigned long irq_flags;
479 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
480 irq_flags = devp->hd_flags & HPET_SHARED_IRQ
481 ? IRQF_SHARED : IRQF_DISABLED;
482 if (request_irq(irq, hpet_interrupt, irq_flags,
483 devp->hd_name, (void *)devp)) {
484 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
490 spin_lock_irq(&hpet_lock);
491 devp->hd_flags ^= HPET_IE;
492 spin_unlock_irq(&hpet_lock);
497 t = devp->hd_ireqfreq;
498 v = readq(&timer->hpet_config);
500 /* 64-bit comparators are not yet supported through the ioctls,
501 * so force this into 32-bit mode if it supports both modes
503 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
505 if (devp->hd_flags & HPET_PERIODIC) {
506 g |= Tn_TYPE_CNF_MASK;
507 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
508 writeq(v, &timer->hpet_config);
509 local_irq_save(flags);
512 * NOTE: First we modify the hidden accumulator
513 * register supported by periodic-capable comparators.
514 * We never want to modify the (single) counter; that
515 * would affect all the comparators. The value written
516 * is the counter value when the first interrupt is due.
518 m = read_counter(&hpet->hpet_mc);
519 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
521 * Then we modify the comparator, indicating the period
522 * for subsequent interrupt.
524 write_counter(t, &timer->hpet_compare);
526 local_irq_save(flags);
527 m = read_counter(&hpet->hpet_mc);
528 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
531 if (devp->hd_flags & HPET_SHARED_IRQ) {
532 isr = 1 << (devp - devp->hd_hpets->hp_dev);
533 writel(isr, &hpet->hpet_isr);
535 writeq(g, &timer->hpet_config);
536 local_irq_restore(flags);
541 /* converts Hz to number of timer ticks */
542 static inline unsigned long hpet_time_div(struct hpets *hpets,
545 unsigned long long m;
547 m = hpets->hp_tick_freq + (dis >> 1);
549 return (unsigned long)m;
553 hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel)
555 struct hpet_timer __iomem *timer;
556 struct hpet __iomem *hpet;
567 timer = devp->hd_timer;
568 hpet = devp->hd_hpet;
569 hpetp = devp->hd_hpets;
572 return hpet_ioctl_ieon(devp);
581 if ((devp->hd_flags & HPET_IE) == 0)
583 v = readq(&timer->hpet_config);
584 v &= ~Tn_INT_ENB_CNF_MASK;
585 writeq(v, &timer->hpet_config);
587 free_irq(devp->hd_irq, devp);
590 devp->hd_flags ^= HPET_IE;
594 struct hpet_info info;
596 if (devp->hd_ireqfreq)
598 hpet_time_div(hpetp, devp->hd_ireqfreq);
600 info.hi_ireqfreq = 0;
602 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
603 info.hi_hpet = hpetp->hp_which;
604 info.hi_timer = devp - hpetp->hp_dev;
606 memcpy((void *)arg, &info, sizeof(info));
608 if (copy_to_user((void __user *)arg, &info,
614 v = readq(&timer->hpet_config);
615 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
619 devp->hd_flags |= HPET_PERIODIC;
622 v = readq(&timer->hpet_config);
623 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
627 if (devp->hd_flags & HPET_PERIODIC &&
628 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
629 v = readq(&timer->hpet_config);
630 v ^= Tn_TYPE_CNF_MASK;
631 writeq(v, &timer->hpet_config);
633 devp->hd_flags &= ~HPET_PERIODIC;
636 if (!kernel && (arg > hpet_max_freq) &&
637 !capable(CAP_SYS_RESOURCE)) {
647 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
653 static const struct file_operations hpet_fops = {
654 .owner = THIS_MODULE,
660 .release = hpet_release,
661 .fasync = hpet_fasync,
665 static int hpet_is_known(struct hpet_data *hdp)
669 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
670 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
676 static ctl_table hpet_table[] = {
678 .procname = "max-user-freq",
679 .data = &hpet_max_freq,
680 .maxlen = sizeof(int),
682 .proc_handler = proc_dointvec,
687 static ctl_table hpet_root[] = {
697 static ctl_table dev_root[] = {
707 static struct ctl_table_header *sysctl_header;
710 * Adjustment for when arming the timer with
711 * initial conditions. That is, main counter
712 * ticks expired before interrupts are enabled.
714 #define TICK_CALIBRATE (1000UL)
716 static unsigned long __hpet_calibrate(struct hpets *hpetp)
718 struct hpet_timer __iomem *timer = NULL;
719 unsigned long t, m, count, i, flags, start;
720 struct hpet_dev *devp;
722 struct hpet __iomem *hpet;
724 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
725 if ((devp->hd_flags & HPET_OPEN) == 0) {
726 timer = devp->hd_timer;
733 hpet = hpetp->hp_hpet;
734 t = read_counter(&timer->hpet_compare);
737 count = hpet_time_div(hpetp, TICK_CALIBRATE);
739 local_irq_save(flags);
741 start = read_counter(&hpet->hpet_mc);
744 m = read_counter(&hpet->hpet_mc);
745 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
746 } while (i++, (m - start) < count);
748 local_irq_restore(flags);
750 return (m - start) / i;
753 static unsigned long hpet_calibrate(struct hpets *hpetp)
755 unsigned long ret = -1;
759 * Try to calibrate until return value becomes stable small value.
760 * If SMI interruption occurs in calibration loop, the return value
761 * will be big. This avoids its impact.
764 tmp = __hpet_calibrate(hpetp);
773 int hpet_alloc(struct hpet_data *hdp)
776 struct hpet_dev *devp;
780 struct hpet __iomem *hpet;
781 static struct hpets *last = NULL;
782 unsigned long period;
783 unsigned long long temp;
787 * hpet_alloc can be called by platform dependent code.
788 * If platform dependent code has allocated the hpet that
789 * ACPI has also reported, then we catch it here.
791 if (hpet_is_known(hdp)) {
792 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
797 siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
798 sizeof(struct hpet_dev));
800 hpetp = kzalloc(siz, GFP_KERNEL);
805 hpetp->hp_which = hpet_nhpet++;
806 hpetp->hp_hpet = hdp->hd_address;
807 hpetp->hp_hpet_phys = hdp->hd_phys_address;
809 hpetp->hp_ntimer = hdp->hd_nirqs;
811 for (i = 0; i < hdp->hd_nirqs; i++)
812 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
814 hpet = hpetp->hp_hpet;
816 cap = readq(&hpet->hpet_cap);
818 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
820 if (hpetp->hp_ntimer != ntimer) {
821 printk(KERN_WARNING "hpet: number irqs doesn't agree"
822 " with number of timers\n");
828 last->hp_next = hpetp;
834 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
835 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
836 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
837 temp += period >> 1; /* round */
838 do_div(temp, period);
839 hpetp->hp_tick_freq = temp; /* ticks per second */
841 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
842 hpetp->hp_which, hdp->hd_phys_address,
843 hpetp->hp_ntimer > 1 ? "s" : "");
844 for (i = 0; i < hpetp->hp_ntimer; i++)
845 printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
848 temp = hpetp->hp_tick_freq;
849 remainder = do_div(temp, 1000000);
851 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
852 hpetp->hp_which, hpetp->hp_ntimer,
853 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
854 (unsigned) temp, remainder);
856 mcfg = readq(&hpet->hpet_config);
857 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
858 write_counter(0L, &hpet->hpet_mc);
859 mcfg |= HPET_ENABLE_CNF_MASK;
860 writeq(mcfg, &hpet->hpet_config);
863 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
864 struct hpet_timer __iomem *timer;
866 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
868 devp->hd_hpets = hpetp;
869 devp->hd_hpet = hpet;
870 devp->hd_timer = timer;
873 * If the timer was reserved by platform code,
874 * then make timer unavailable for opens.
876 if (hdp->hd_state & (1 << i)) {
877 devp->hd_flags = HPET_OPEN;
881 init_waitqueue_head(&devp->hd_waitqueue);
884 hpetp->hp_delta = hpet_calibrate(hpetp);
886 /* This clocksource driver currently only works on ia64 */
888 if (!hpet_clocksource) {
889 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
890 CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr);
891 clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq,
892 clocksource_hpet.shift);
893 clocksource_register(&clocksource_hpet);
894 hpetp->hp_clocksource = &clocksource_hpet;
895 hpet_clocksource = &clocksource_hpet;
902 static acpi_status hpet_resources(struct acpi_resource *res, void *data)
904 struct hpet_data *hdp;
906 struct acpi_resource_address64 addr;
910 status = acpi_resource_to_address64(res, &addr);
912 if (ACPI_SUCCESS(status)) {
913 hdp->hd_phys_address = addr.minimum;
914 hdp->hd_address = ioremap(addr.minimum, addr.address_length);
916 if (hpet_is_known(hdp)) {
917 iounmap(hdp->hd_address);
918 return AE_ALREADY_EXISTS;
920 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
921 struct acpi_resource_fixed_memory32 *fixmem32;
923 fixmem32 = &res->data.fixed_memory32;
927 hdp->hd_phys_address = fixmem32->address;
928 hdp->hd_address = ioremap(fixmem32->address,
931 if (hpet_is_known(hdp)) {
932 iounmap(hdp->hd_address);
933 return AE_ALREADY_EXISTS;
935 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
936 struct acpi_resource_extended_irq *irqp;
939 irqp = &res->data.extended_irq;
941 for (i = 0; i < irqp->interrupt_count; i++) {
942 irq = acpi_register_gsi(NULL, irqp->interrupts[i],
943 irqp->triggering, irqp->polarity);
947 hdp->hd_irq[hdp->hd_nirqs] = irq;
955 static int hpet_acpi_add(struct acpi_device *device)
958 struct hpet_data data;
960 memset(&data, 0, sizeof(data));
963 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
964 hpet_resources, &data);
966 if (ACPI_FAILURE(result))
969 if (!data.hd_address || !data.hd_nirqs) {
970 printk("%s: no address or irqs in _CRS\n", __func__);
974 return hpet_alloc(&data);
977 static int hpet_acpi_remove(struct acpi_device *device, int type)
979 /* XXX need to unregister clocksource, dealloc mem, etc */
983 static const struct acpi_device_id hpet_device_ids[] = {
987 MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
989 static struct acpi_driver hpet_acpi_driver = {
991 .ids = hpet_device_ids,
993 .add = hpet_acpi_add,
994 .remove = hpet_acpi_remove,
998 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
1000 static int __init hpet_init(void)
1004 result = misc_register(&hpet_misc);
1008 sysctl_header = register_sysctl_table(dev_root);
1010 result = acpi_bus_register_driver(&hpet_acpi_driver);
1013 unregister_sysctl_table(sysctl_header);
1014 misc_deregister(&hpet_misc);
1021 static void __exit hpet_exit(void)
1023 acpi_bus_unregister_driver(&hpet_acpi_driver);
1026 unregister_sysctl_table(sysctl_header);
1027 misc_deregister(&hpet_misc);
1032 module_init(hpet_init);
1033 module_exit(hpet_exit);
1034 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1035 MODULE_LICENSE("GPL");