2 * Intel & MS High Precision Event Timer Implementation.
4 * Copyright (C) 2003 Intel Corporation
6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7 * Bob Picco <robert.picco@hp.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/smp_lock.h>
18 #include <linux/types.h>
19 #include <linux/miscdevice.h>
20 #include <linux/major.h>
21 #include <linux/ioport.h>
22 #include <linux/fcntl.h>
23 #include <linux/init.h>
24 #include <linux/poll.h>
26 #include <linux/proc_fs.h>
27 #include <linux/spinlock.h>
28 #include <linux/sysctl.h>
29 #include <linux/wait.h>
30 #include <linux/bcd.h>
31 #include <linux/seq_file.h>
32 #include <linux/bitops.h>
33 #include <linux/clocksource.h>
35 #include <asm/current.h>
36 #include <asm/uaccess.h>
37 #include <asm/system.h>
40 #include <asm/div64.h>
42 #include <linux/acpi.h>
43 #include <acpi/acpi_bus.h>
44 #include <linux/hpet.h>
47 * The High Precision Event Timer driver.
48 * This driver is closely modelled after the rtc.c driver.
49 * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
51 #define HPET_USER_FREQ (64)
52 #define HPET_DRIFT (500)
54 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
57 /* WARNING -- don't get confused. These macros are never used
58 * to write the (single) counter, and rarely to read it.
59 * They're badly named; to fix, someday.
61 #if BITS_PER_LONG == 64
62 #define write_counter(V, MC) writeq(V, MC)
63 #define read_counter(MC) readq(MC)
65 #define write_counter(V, MC) writel(V, MC)
66 #define read_counter(MC) readl(MC)
69 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
71 /* This clocksource driver currently only works on ia64 */
73 static void __iomem *hpet_mctr;
75 static cycle_t read_hpet(struct clocksource *cs)
77 return (cycle_t)read_counter((void __iomem *)hpet_mctr);
80 static struct clocksource clocksource_hpet = {
84 .mask = CLOCKSOURCE_MASK(64),
85 .mult = 0, /* to be calculated */
87 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
89 static struct clocksource *hpet_clocksource;
92 /* A lock for concurrent access by app and isr hpet activity. */
93 static DEFINE_SPINLOCK(hpet_lock);
95 #define HPET_DEV_NAME (7)
98 struct hpets *hd_hpets;
99 struct hpet __iomem *hd_hpet;
100 struct hpet_timer __iomem *hd_timer;
101 unsigned long hd_ireqfreq;
102 unsigned long hd_irqdata;
103 wait_queue_head_t hd_waitqueue;
104 struct fasync_struct *hd_async_queue;
105 unsigned int hd_flags;
107 unsigned int hd_hdwirq;
108 char hd_name[HPET_DEV_NAME];
112 struct hpets *hp_next;
113 struct hpet __iomem *hp_hpet;
114 unsigned long hp_hpet_phys;
115 struct clocksource *hp_clocksource;
116 unsigned long long hp_tick_freq;
117 unsigned long hp_delta;
118 unsigned int hp_ntimer;
119 unsigned int hp_which;
120 struct hpet_dev hp_dev[1];
123 static struct hpets *hpets;
125 #define HPET_OPEN 0x0001
126 #define HPET_IE 0x0002 /* interrupt enabled */
127 #define HPET_PERIODIC 0x0004
128 #define HPET_SHARED_IRQ 0x0008
132 static inline unsigned long long readq(void __iomem *addr)
134 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
139 static inline void writeq(unsigned long long v, void __iomem *addr)
141 writel(v & 0xffffffff, addr);
142 writel(v >> 32, addr + 4);
146 static irqreturn_t hpet_interrupt(int irq, void *data)
148 struct hpet_dev *devp;
152 isr = 1 << (devp - devp->hd_hpets->hp_dev);
154 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
155 !(isr & readl(&devp->hd_hpet->hpet_isr)))
158 spin_lock(&hpet_lock);
162 * For non-periodic timers, increment the accumulator.
163 * This has the effect of treating non-periodic like periodic.
165 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
168 t = devp->hd_ireqfreq;
169 m = read_counter(&devp->hd_timer->hpet_compare);
170 write_counter(t + m, &devp->hd_timer->hpet_compare);
173 if (devp->hd_flags & HPET_SHARED_IRQ)
174 writel(isr, &devp->hd_hpet->hpet_isr);
175 spin_unlock(&hpet_lock);
177 wake_up_interruptible(&devp->hd_waitqueue);
179 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
184 static void hpet_timer_set_irq(struct hpet_dev *devp)
188 struct hpet_timer __iomem *timer;
190 spin_lock_irq(&hpet_lock);
191 if (devp->hd_hdwirq) {
192 spin_unlock_irq(&hpet_lock);
196 timer = devp->hd_timer;
198 /* we prefer level triggered mode */
199 v = readl(&timer->hpet_config);
200 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
201 v |= Tn_INT_TYPE_CNF_MASK;
202 writel(v, &timer->hpet_config);
204 spin_unlock_irq(&hpet_lock);
206 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
207 Tn_INT_ROUTE_CAP_SHIFT;
210 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
211 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
213 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
218 for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
219 if (irq >= nr_irqs) {
224 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
229 /* FIXME: Setup interrupt source table */
232 if (irq < HPET_MAX_IRQ) {
233 spin_lock_irq(&hpet_lock);
234 v = readl(&timer->hpet_config);
235 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
236 writel(v, &timer->hpet_config);
237 devp->hd_hdwirq = gsi;
238 spin_unlock_irq(&hpet_lock);
243 static int hpet_open(struct inode *inode, struct file *file)
245 struct hpet_dev *devp;
249 if (file->f_mode & FMODE_WRITE)
253 spin_lock_irq(&hpet_lock);
255 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
256 for (i = 0; i < hpetp->hp_ntimer; i++)
257 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
260 devp = &hpetp->hp_dev[i];
265 spin_unlock_irq(&hpet_lock);
270 file->private_data = devp;
271 devp->hd_irqdata = 0;
272 devp->hd_flags |= HPET_OPEN;
273 spin_unlock_irq(&hpet_lock);
276 hpet_timer_set_irq(devp);
282 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
284 DECLARE_WAITQUEUE(wait, current);
287 struct hpet_dev *devp;
289 devp = file->private_data;
290 if (!devp->hd_ireqfreq)
293 if (count < sizeof(unsigned long))
296 add_wait_queue(&devp->hd_waitqueue, &wait);
299 set_current_state(TASK_INTERRUPTIBLE);
301 spin_lock_irq(&hpet_lock);
302 data = devp->hd_irqdata;
303 devp->hd_irqdata = 0;
304 spin_unlock_irq(&hpet_lock);
308 else if (file->f_flags & O_NONBLOCK) {
311 } else if (signal_pending(current)) {
312 retval = -ERESTARTSYS;
318 retval = put_user(data, (unsigned long __user *)buf);
320 retval = sizeof(unsigned long);
322 __set_current_state(TASK_RUNNING);
323 remove_wait_queue(&devp->hd_waitqueue, &wait);
328 static unsigned int hpet_poll(struct file *file, poll_table * wait)
331 struct hpet_dev *devp;
333 devp = file->private_data;
335 if (!devp->hd_ireqfreq)
338 poll_wait(file, &devp->hd_waitqueue, wait);
340 spin_lock_irq(&hpet_lock);
341 v = devp->hd_irqdata;
342 spin_unlock_irq(&hpet_lock);
345 return POLLIN | POLLRDNORM;
350 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
352 #ifdef CONFIG_HPET_MMAP
353 struct hpet_dev *devp;
356 if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
359 devp = file->private_data;
360 addr = devp->hd_hpets->hp_hpet_phys;
362 if (addr & (PAGE_SIZE - 1))
365 vma->vm_flags |= VM_IO;
366 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
368 if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
369 PAGE_SIZE, vma->vm_page_prot)) {
370 printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
381 static int hpet_fasync(int fd, struct file *file, int on)
383 struct hpet_dev *devp;
385 devp = file->private_data;
387 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
393 static int hpet_release(struct inode *inode, struct file *file)
395 struct hpet_dev *devp;
396 struct hpet_timer __iomem *timer;
399 devp = file->private_data;
400 timer = devp->hd_timer;
402 spin_lock_irq(&hpet_lock);
404 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
405 &timer->hpet_config);
410 devp->hd_ireqfreq = 0;
412 if (devp->hd_flags & HPET_PERIODIC
413 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
416 v = readq(&timer->hpet_config);
417 v ^= Tn_TYPE_CNF_MASK;
418 writeq(v, &timer->hpet_config);
421 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
422 spin_unlock_irq(&hpet_lock);
427 file->private_data = NULL;
431 static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int);
434 hpet_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
437 struct hpet_dev *devp;
439 devp = file->private_data;
440 return hpet_ioctl_common(devp, cmd, arg, 0);
443 static int hpet_ioctl_ieon(struct hpet_dev *devp)
445 struct hpet_timer __iomem *timer;
446 struct hpet __iomem *hpet;
449 unsigned long g, v, t, m;
450 unsigned long flags, isr;
452 timer = devp->hd_timer;
453 hpet = devp->hd_hpet;
454 hpetp = devp->hd_hpets;
456 if (!devp->hd_ireqfreq)
459 spin_lock_irq(&hpet_lock);
461 if (devp->hd_flags & HPET_IE) {
462 spin_unlock_irq(&hpet_lock);
466 devp->hd_flags |= HPET_IE;
468 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
469 devp->hd_flags |= HPET_SHARED_IRQ;
470 spin_unlock_irq(&hpet_lock);
472 irq = devp->hd_hdwirq;
475 unsigned long irq_flags;
477 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
478 irq_flags = devp->hd_flags & HPET_SHARED_IRQ
479 ? IRQF_SHARED : IRQF_DISABLED;
480 if (request_irq(irq, hpet_interrupt, irq_flags,
481 devp->hd_name, (void *)devp)) {
482 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
488 spin_lock_irq(&hpet_lock);
489 devp->hd_flags ^= HPET_IE;
490 spin_unlock_irq(&hpet_lock);
495 t = devp->hd_ireqfreq;
496 v = readq(&timer->hpet_config);
498 /* 64-bit comparators are not yet supported through the ioctls,
499 * so force this into 32-bit mode if it supports both modes
501 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
503 if (devp->hd_flags & HPET_PERIODIC) {
504 g |= Tn_TYPE_CNF_MASK;
505 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
506 writeq(v, &timer->hpet_config);
507 local_irq_save(flags);
510 * NOTE: First we modify the hidden accumulator
511 * register supported by periodic-capable comparators.
512 * We never want to modify the (single) counter; that
513 * would affect all the comparators. The value written
514 * is the counter value when the first interrupt is due.
516 m = read_counter(&hpet->hpet_mc);
517 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
519 * Then we modify the comparator, indicating the period
520 * for subsequent interrupt.
522 write_counter(t, &timer->hpet_compare);
524 local_irq_save(flags);
525 m = read_counter(&hpet->hpet_mc);
526 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
529 if (devp->hd_flags & HPET_SHARED_IRQ) {
530 isr = 1 << (devp - devp->hd_hpets->hp_dev);
531 writel(isr, &hpet->hpet_isr);
533 writeq(g, &timer->hpet_config);
534 local_irq_restore(flags);
539 /* converts Hz to number of timer ticks */
540 static inline unsigned long hpet_time_div(struct hpets *hpets,
543 unsigned long long m;
545 m = hpets->hp_tick_freq + (dis >> 1);
547 return (unsigned long)m;
551 hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel)
553 struct hpet_timer __iomem *timer;
554 struct hpet __iomem *hpet;
565 timer = devp->hd_timer;
566 hpet = devp->hd_hpet;
567 hpetp = devp->hd_hpets;
570 return hpet_ioctl_ieon(devp);
579 if ((devp->hd_flags & HPET_IE) == 0)
581 v = readq(&timer->hpet_config);
582 v &= ~Tn_INT_ENB_CNF_MASK;
583 writeq(v, &timer->hpet_config);
585 free_irq(devp->hd_irq, devp);
588 devp->hd_flags ^= HPET_IE;
592 struct hpet_info info;
594 if (devp->hd_ireqfreq)
596 hpet_time_div(hpetp, devp->hd_ireqfreq);
598 info.hi_ireqfreq = 0;
600 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
601 info.hi_hpet = hpetp->hp_which;
602 info.hi_timer = devp - hpetp->hp_dev;
604 memcpy((void *)arg, &info, sizeof(info));
606 if (copy_to_user((void __user *)arg, &info,
612 v = readq(&timer->hpet_config);
613 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
617 devp->hd_flags |= HPET_PERIODIC;
620 v = readq(&timer->hpet_config);
621 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
625 if (devp->hd_flags & HPET_PERIODIC &&
626 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
627 v = readq(&timer->hpet_config);
628 v ^= Tn_TYPE_CNF_MASK;
629 writeq(v, &timer->hpet_config);
631 devp->hd_flags &= ~HPET_PERIODIC;
634 if (!kernel && (arg > hpet_max_freq) &&
635 !capable(CAP_SYS_RESOURCE)) {
645 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
651 static const struct file_operations hpet_fops = {
652 .owner = THIS_MODULE,
658 .release = hpet_release,
659 .fasync = hpet_fasync,
663 static int hpet_is_known(struct hpet_data *hdp)
667 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
668 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
674 static ctl_table hpet_table[] = {
676 .procname = "max-user-freq",
677 .data = &hpet_max_freq,
678 .maxlen = sizeof(int),
680 .proc_handler = proc_dointvec,
685 static ctl_table hpet_root[] = {
695 static ctl_table dev_root[] = {
705 static struct ctl_table_header *sysctl_header;
708 * Adjustment for when arming the timer with
709 * initial conditions. That is, main counter
710 * ticks expired before interrupts are enabled.
712 #define TICK_CALIBRATE (1000UL)
714 static unsigned long __hpet_calibrate(struct hpets *hpetp)
716 struct hpet_timer __iomem *timer = NULL;
717 unsigned long t, m, count, i, flags, start;
718 struct hpet_dev *devp;
720 struct hpet __iomem *hpet;
722 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
723 if ((devp->hd_flags & HPET_OPEN) == 0) {
724 timer = devp->hd_timer;
731 hpet = hpetp->hp_hpet;
732 t = read_counter(&timer->hpet_compare);
735 count = hpet_time_div(hpetp, TICK_CALIBRATE);
737 local_irq_save(flags);
739 start = read_counter(&hpet->hpet_mc);
742 m = read_counter(&hpet->hpet_mc);
743 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
744 } while (i++, (m - start) < count);
746 local_irq_restore(flags);
748 return (m - start) / i;
751 static unsigned long hpet_calibrate(struct hpets *hpetp)
753 unsigned long ret = -1;
757 * Try to calibrate until return value becomes stable small value.
758 * If SMI interruption occurs in calibration loop, the return value
759 * will be big. This avoids its impact.
762 tmp = __hpet_calibrate(hpetp);
771 int hpet_alloc(struct hpet_data *hdp)
774 struct hpet_dev *devp;
778 struct hpet __iomem *hpet;
779 static struct hpets *last = NULL;
780 unsigned long period;
781 unsigned long long temp;
785 * hpet_alloc can be called by platform dependent code.
786 * If platform dependent code has allocated the hpet that
787 * ACPI has also reported, then we catch it here.
789 if (hpet_is_known(hdp)) {
790 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
795 siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
796 sizeof(struct hpet_dev));
798 hpetp = kzalloc(siz, GFP_KERNEL);
803 hpetp->hp_which = hpet_nhpet++;
804 hpetp->hp_hpet = hdp->hd_address;
805 hpetp->hp_hpet_phys = hdp->hd_phys_address;
807 hpetp->hp_ntimer = hdp->hd_nirqs;
809 for (i = 0; i < hdp->hd_nirqs; i++)
810 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
812 hpet = hpetp->hp_hpet;
814 cap = readq(&hpet->hpet_cap);
816 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
818 if (hpetp->hp_ntimer != ntimer) {
819 printk(KERN_WARNING "hpet: number irqs doesn't agree"
820 " with number of timers\n");
826 last->hp_next = hpetp;
832 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
833 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
834 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
835 temp += period >> 1; /* round */
836 do_div(temp, period);
837 hpetp->hp_tick_freq = temp; /* ticks per second */
839 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
840 hpetp->hp_which, hdp->hd_phys_address,
841 hpetp->hp_ntimer > 1 ? "s" : "");
842 for (i = 0; i < hpetp->hp_ntimer; i++)
843 printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
846 temp = hpetp->hp_tick_freq;
847 remainder = do_div(temp, 1000000);
849 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
850 hpetp->hp_which, hpetp->hp_ntimer,
851 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
852 (unsigned) temp, remainder);
854 mcfg = readq(&hpet->hpet_config);
855 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
856 write_counter(0L, &hpet->hpet_mc);
857 mcfg |= HPET_ENABLE_CNF_MASK;
858 writeq(mcfg, &hpet->hpet_config);
861 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
862 struct hpet_timer __iomem *timer;
864 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
866 devp->hd_hpets = hpetp;
867 devp->hd_hpet = hpet;
868 devp->hd_timer = timer;
871 * If the timer was reserved by platform code,
872 * then make timer unavailable for opens.
874 if (hdp->hd_state & (1 << i)) {
875 devp->hd_flags = HPET_OPEN;
879 init_waitqueue_head(&devp->hd_waitqueue);
882 hpetp->hp_delta = hpet_calibrate(hpetp);
884 /* This clocksource driver currently only works on ia64 */
886 if (!hpet_clocksource) {
887 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
888 CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr);
889 clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq,
890 clocksource_hpet.shift);
891 clocksource_register(&clocksource_hpet);
892 hpetp->hp_clocksource = &clocksource_hpet;
893 hpet_clocksource = &clocksource_hpet;
900 static acpi_status hpet_resources(struct acpi_resource *res, void *data)
902 struct hpet_data *hdp;
904 struct acpi_resource_address64 addr;
908 status = acpi_resource_to_address64(res, &addr);
910 if (ACPI_SUCCESS(status)) {
911 hdp->hd_phys_address = addr.minimum;
912 hdp->hd_address = ioremap(addr.minimum, addr.address_length);
914 if (hpet_is_known(hdp)) {
915 iounmap(hdp->hd_address);
916 return AE_ALREADY_EXISTS;
918 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
919 struct acpi_resource_fixed_memory32 *fixmem32;
921 fixmem32 = &res->data.fixed_memory32;
925 hdp->hd_phys_address = fixmem32->address;
926 hdp->hd_address = ioremap(fixmem32->address,
929 if (hpet_is_known(hdp)) {
930 iounmap(hdp->hd_address);
931 return AE_ALREADY_EXISTS;
933 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
934 struct acpi_resource_extended_irq *irqp;
937 irqp = &res->data.extended_irq;
939 for (i = 0; i < irqp->interrupt_count; i++) {
940 irq = acpi_register_gsi(NULL, irqp->interrupts[i],
941 irqp->triggering, irqp->polarity);
945 hdp->hd_irq[hdp->hd_nirqs] = irq;
953 static int hpet_acpi_add(struct acpi_device *device)
956 struct hpet_data data;
958 memset(&data, 0, sizeof(data));
961 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
962 hpet_resources, &data);
964 if (ACPI_FAILURE(result))
967 if (!data.hd_address || !data.hd_nirqs) {
968 printk("%s: no address or irqs in _CRS\n", __func__);
972 return hpet_alloc(&data);
975 static int hpet_acpi_remove(struct acpi_device *device, int type)
977 /* XXX need to unregister clocksource, dealloc mem, etc */
981 static const struct acpi_device_id hpet_device_ids[] = {
985 MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
987 static struct acpi_driver hpet_acpi_driver = {
989 .ids = hpet_device_ids,
991 .add = hpet_acpi_add,
992 .remove = hpet_acpi_remove,
996 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
998 static int __init hpet_init(void)
1002 result = misc_register(&hpet_misc);
1006 sysctl_header = register_sysctl_table(dev_root);
1008 result = acpi_bus_register_driver(&hpet_acpi_driver);
1011 unregister_sysctl_table(sysctl_header);
1012 misc_deregister(&hpet_misc);
1019 static void __exit hpet_exit(void)
1021 acpi_bus_unregister_driver(&hpet_acpi_driver);
1024 unregister_sysctl_table(sysctl_header);
1025 misc_deregister(&hpet_misc);
1030 module_init(hpet_init);
1031 module_exit(hpet_exit);
1032 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1033 MODULE_LICENSE("GPL");