3 * $Id: sysrq.c,v 1.15 1998/08/23 14:56:41 mj Exp $
5 * Linux Magic System Request Key Hacks
7 * (c) 1997 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
8 * based on ideas by Pavel Machek <pavel@atrey.karlin.mff.cuni.cz>
10 * (c) 2000 Crutcher Dunnavant <crutcher+kernel@datastacks.com>
11 * overhauled to use key registration
12 * based upon discusions in irc://irc.openprojects.net/#kernelnewbies
15 #include <linux/sched.h>
16 #include <linux/interrupt.h>
19 #include <linux/tty.h>
20 #include <linux/mount.h>
21 #include <linux/kdev_t.h>
22 #include <linux/major.h>
23 #include <linux/reboot.h>
24 #include <linux/sysrq.h>
25 #include <linux/kbd_kern.h>
26 #include <linux/proc_fs.h>
27 #include <linux/nmi.h>
28 #include <linux/quotaops.h>
29 #include <linux/perf_event.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/suspend.h>
33 #include <linux/writeback.h>
34 #include <linux/buffer_head.h> /* for fsync_bdev() */
35 #include <linux/swap.h>
36 #include <linux/spinlock.h>
37 #include <linux/vt_kern.h>
38 #include <linux/workqueue.h>
39 #include <linux/hrtimer.h>
40 #include <linux/oom.h>
41 #include <linux/version.h>
43 #include <asm/ptrace.h>
44 #include <asm/irq_regs.h>
47 #include <mach/gpio.h>
48 #include <mach/rk29_iomap.h>
49 #include <mach/iomux.h>
53 #define GPIO_SWPORTA_DR 0x00
54 #define GPIO_SWPORTA_DDR 0x04
56 #define GPIO_SWPORTB_DR 0x0c
57 #define GPIO_SWPORTB_DDR 0x10
59 #define GPIO_SWPORTC_DR 0x18
60 #define GPIO_SWPORTC_DDR 0x1c
62 #define GPIO_SWPORTD_DR 0x24
63 #define GPIO_SWPORTD_DDR 0x28
65 #define RK_SYSRQ_GPIO_RES(name,resn0,resn1,oft0,oft1,oft2,oft3) \
76 .res_off = {oft0,oft1,oft2,oft3,0xffff}, \
79 #define RK_SYSRQ_GPIO(name,base) \
81 .rk_sysrq_gpio_name = name, \
82 .regbase = (const unsigned char __iomem *) base, \
83 .res_table = rk_sysrq_gpio_printres_table,\
84 .res_table_count = ARRAY_SIZE(rk_sysrq_gpio_printres_table), \
87 #define RK_SYSRQ_IOMUX_RES(offt,start,mask,desc0,desc1,desc2,desc3) \
90 .reg_description[0] = desc0, \
91 .reg_description[1] = desc1, \
92 .reg_description[2] = desc2, \
93 .reg_description[3] = desc3, \
97 #define RK_SYSRQ_IOMUX_CFG(name,msg,regbase,table) \
101 .reg_base = (const unsigned char __iomem *) regbase, \
102 .regres_table = rk_sysrq_iomux_res_gpio##table, \
103 .res_table_count = ARRAY_SIZE(rk_sysrq_iomux_res_gpio##table),\
110 struct rk_sysrq_gpio_printres
112 const char *res_name;
113 struct res_map resmap[2];
114 unsigned int res_off[5];
119 const char *rk_sysrq_gpio_name;
120 const unsigned char __iomem *regbase;
121 struct rk_sysrq_gpio_printres *res_table;
122 unsigned int res_table_count;
124 struct rk_sysrq_iomux
126 const char *reg_name;
128 const unsigned char __iomem *reg_base;
129 struct rk_sysrq_iomux_regres *regres_table;
130 unsigned int res_table_count;
132 struct rk_sysrq_iomux_regres
134 const unsigned short off;
135 const char *reg_description[4];
136 const unsigned char start_bit;
137 const unsigned short mask_bit;
141 struct rk_sysrq_iomux_regres rk_sysrq_iomux_res_gpio0l[] = {
142 RK_SYSRQ_IOMUX_RES(0x48,30,3,"GPIO0_B[7]","ebc_gdoe","smc_oe_n",NULL),
143 RK_SYSRQ_IOMUX_RES(0x48,28,3,"GPIO0_B[6]","ebc_sdshr","smc_bls_n_1","host_int"),
144 RK_SYSRQ_IOMUX_RES(0x48,26,3,"GPIO0_B[5]","ebc_vcom","smc_bls_n_0",NULL),
145 RK_SYSRQ_IOMUX_RES(0x48,24,3,"GPIO0_B[4]","ebc_border1","smc_we_n",NULL),
146 RK_SYSRQ_IOMUX_RES(0x48,22,3,"GPIO0_B[3]","ebc_border0","smc_addr[3]","host_data[3]"),
147 RK_SYSRQ_IOMUX_RES(0x48,20,3,"GPIO0_B[2]","ebc_sdce2","smc_addr[2]","host_data[2]"),
148 RK_SYSRQ_IOMUX_RES(0x48,18,3,"GPIO0_B[1]","ebc_sdce1","smc_addr[1]","host_data[1]"),
149 RK_SYSRQ_IOMUX_RES(0x48,16,3,"GPIO0_B[0]","ebc_sdce0","smc_addr[0]","host_data[0]"),
151 RK_SYSRQ_IOMUX_RES(0x48,14,3,"GPIO0_A[7]","mii_mdclk",NULL,NULL),
152 RK_SYSRQ_IOMUX_RES(0x48,12,3,"GPIO0_A[6]","mii_md",NULL,NULL),
153 RK_SYSRQ_IOMUX_RES(0x48,10,3,"GPIO0_A[5]","flash_dqs",NULL,NULL),
155 struct rk_sysrq_iomux_regres rk_sysrq_iomux_res_gpio0h[] = {
156 RK_SYSRQ_IOMUX_RES(0x4c,30,3,"GPIO0_D[7]","flash_csn6",NULL,NULL),
157 RK_SYSRQ_IOMUX_RES(0x4c,28,3,"GPIO0_D[6]","flash_csn5",NULL,NULL),
158 RK_SYSRQ_IOMUX_RES(0x4c,26,3,"GPIO0_D[5]","flash_csn4",NULL,NULL),
159 RK_SYSRQ_IOMUX_RES(0x4c,24,3,"GPIO0_D[4]","flash_csn3",NULL,NULL),
160 RK_SYSRQ_IOMUX_RES(0x4c,22,3,"GPIO0_D[3]","flash_csn2",NULL,NULL),
161 RK_SYSRQ_IOMUX_RES(0x4c,20,3,"GPIO0_D[2]","flash_csn1",NULL,NULL),
162 RK_SYSRQ_IOMUX_RES(0x4c,18,3,"GPIO0_D[1]","ebc_gdclk","smc_addr[4]","host_data[4]"),
163 RK_SYSRQ_IOMUX_RES(0x4c,16,3,"GPIO0_D[0]","ebc_sdoe","smc_adv_n",""),
165 RK_SYSRQ_IOMUX_RES(0x4c,14,3,"GPIO0_C[7]","ebc_sdce5","smc_data15",NULL),
166 RK_SYSRQ_IOMUX_RES(0x4c,12,3,"GPIO0_C[6]","ebc_sdce4","smc_data14",NULL),
167 RK_SYSRQ_IOMUX_RES(0x4c,10,3,"GPIO0_C[5]","ebc_sdce3","smc_data13",NULL),
168 RK_SYSRQ_IOMUX_RES(0x4c,8,3,"GPIO0_C[4]","ebc_gdpwr2","smc_data12",NULL),
169 RK_SYSRQ_IOMUX_RES(0x4c,6,3,"GPIO0_C[3]","ebc_gdpwr1","smc_data11",NULL),
170 RK_SYSRQ_IOMUX_RES(0x4c,4,3,"GPIO0_C[2]","ebc_gdpwr0","smc_data10",NULL),
171 RK_SYSRQ_IOMUX_RES(0x4c,2,3,"GPIO0_C[1]","ebc_gdrl","smc_data9",NULL),
172 RK_SYSRQ_IOMUX_RES(0x4c,0,3,"GPIO0_C[0]","ebc_gdsp","smc_data8",NULL),
174 struct rk_sysrq_iomux_regres rk_sysrq_iomux_res_gpio1l[] = {
175 RK_SYSRQ_IOMUX_RES(0x50,30,3,"GPIO1_B[7]","uart0_sout",NULL,NULL),
176 RK_SYSRQ_IOMUX_RES(0x50,28,3,"GPIO1_B[6]","uart0_sin",NULL,NULL),
177 RK_SYSRQ_IOMUX_RES(0x50,26,3,"GPIO1_B[5]","pwm0",NULL,NULL),
178 RK_SYSRQ_IOMUX_RES(0x50,24,3,"GPIO1_B[4]","vip_clkout",NULL,NULL),
179 RK_SYSRQ_IOMUX_RES(0x50,22,3,"GPIO1_B[3]","vip_data[3]",NULL,NULL),
180 RK_SYSRQ_IOMUX_RES(0x50,20,3,"GPIO1_B[2]","vip_data[2]",NULL,NULL),
181 RK_SYSRQ_IOMUX_RES(0x50,18,3,"GPIO1_B[1]","vip_data[1]",NULL,NULL),
182 RK_SYSRQ_IOMUX_RES(0x50,16,3,"GPIO1_B[0]","vip_data[0]",NULL,NULL),
184 RK_SYSRQ_IOMUX_RES(0x50,14,3,"GPIO1_A[7]","i2c1_scl",NULL,NULL),
185 RK_SYSRQ_IOMUX_RES(0x50,12,3,"GPIO1_A[6]","i2c1_sda",NULL,NULL),
186 RK_SYSRQ_IOMUX_RES(0x50,10,3,"GPIO1_A[5]","emmc_pwr_en","pwm3",NULL),
187 RK_SYSRQ_IOMUX_RES(0x50,8,3,"GPIO1_A[4]","emmc_write_prt","spi0_csn1",NULL),
188 RK_SYSRQ_IOMUX_RES(0x50,6,3,"GPIO1_A[3]","emmc_detect_n","spi1_csn1",NULL),
189 RK_SYSRQ_IOMUX_RES(0x50,4,3,"GPIO1_A[2]","smc_csn1",NULL,NULL),
190 RK_SYSRQ_IOMUX_RES(0x50,2,3,"GPIO1_A[1]","smc_csn0",NULL,NULL),
191 RK_SYSRQ_IOMUX_RES(0x50,0,3,"GPIO1_A[0]","flash_cs7","mddr_tq",NULL),
194 struct rk_sysrq_iomux_regres rk_sysrq_iomux_res_gpio1h[] = {
195 RK_SYSRQ_IOMUX_RES(0x54,30,3,"GPIO1_D[7]","sdmmc0_data[5]",NULL,NULL),
196 RK_SYSRQ_IOMUX_RES(0x54,28,3,"GPIO1_D[6]","sdmmc0_data[4]",NULL,NULL),
197 RK_SYSRQ_IOMUX_RES(0x54,26,3,"GPIO1_D[5]","sdmmc0_data[3]",NULL,NULL),
198 RK_SYSRQ_IOMUX_RES(0x54,24,3,"GPIO1_D[4]","sdmmc0_data[2]",NULL,NULL),
199 RK_SYSRQ_IOMUX_RES(0x54,22,3,"GPIO1_D[3]","sdmmc0_data[1]",NULL,NULL),
200 RK_SYSRQ_IOMUX_RES(0x54,20,3,"GPIO1_D[2]","sdmmc0_data[0]",NULL,NULL),
201 RK_SYSRQ_IOMUX_RES(0x54,18,3,"GPIO1_D[1]","sdmmc0_cmd",NULL,NULL),
202 RK_SYSRQ_IOMUX_RES(0x54,16,3,"GPIO1_D[0]","sdmmc0_clkout",NULL,NULL),
204 RK_SYSRQ_IOMUX_RES(0x54,14,3,"GPIO1_C[7]","sdmmc1_clkout",NULL,NULL),
205 RK_SYSRQ_IOMUX_RES(0x54,12,3,"GPIO1_C[6]","sdmmc1_data[3]",NULL,NULL),
206 RK_SYSRQ_IOMUX_RES(0x54,10,3,"GPIO1_C[5]","sdmmc1_data[2]",NULL,NULL),
207 RK_SYSRQ_IOMUX_RES(0x54,8,3,"GPIO1_C[4]","sdmmc1_data[1]",NULL,NULL),
208 RK_SYSRQ_IOMUX_RES(0x54,6,3,"GPIO1_C[3]","sdmmc1_data[0]",NULL,NULL),
209 RK_SYSRQ_IOMUX_RES(0x54,4,3,"GPIO1_C[2]","sdmmc1_cmd",NULL,NULL),
210 RK_SYSRQ_IOMUX_RES(0x54,2,3,"GPIO1_C[1]","uart0_rts_n","sdmmc1_write_prt",NULL),
211 RK_SYSRQ_IOMUX_RES(0x54,0,3,"GPIO1_C[0]","uart0_cts_n","sdmmc1_detect_n",NULL),
213 struct rk_sysrq_iomux_regres rk_sysrq_iomux_res_gpio2l[] = {
214 RK_SYSRQ_IOMUX_RES(0x58,30,3,"GPIO2_B[7]","i2c0_scl",NULL,NULL),
215 RK_SYSRQ_IOMUX_RES(0x58,28,3,"GPIO2_B[6]","i2c0_sda",NULL,NULL),
216 RK_SYSRQ_IOMUX_RES(0x58,26,3,"GPIO2_B[5]","uart3_rts_n","i2c3_scl",NULL),
217 RK_SYSRQ_IOMUX_RES(0x58,24,3,"GPIO2_B[4]","uart3_cts_n","i2c3_sda",NULL),
218 RK_SYSRQ_IOMUX_RES(0x58,22,3,"GPIO2_B[3]","uart3_sout",NULL,NULL),
219 RK_SYSRQ_IOMUX_RES(0x58,20,3,"GPIO2_B[2]","uart3_sin",NULL,NULL),
220 RK_SYSRQ_IOMUX_RES(0x58,18,3,"GPIO2_B[1]","uart2_sout",NULL,NULL),
221 RK_SYSRQ_IOMUX_RES(0x58,16,3,"GPIO2_B[0]","uart2_sin",NULL,NULL),
223 RK_SYSRQ_IOMUX_RES(0x58,14,3,"GPIO2_A[7]","uart2_rts_n",NULL,NULL),
224 RK_SYSRQ_IOMUX_RES(0x58,12,3,"GPIO2_A[6]","uart2_cts_n",NULL,NULL),
225 RK_SYSRQ_IOMUX_RES(0x58,10,3,"GPIO2_A[5]","uart1_sout",NULL,NULL),
226 RK_SYSRQ_IOMUX_RES(0x58,8,3,"GPIO2_A[4]","uart1_sin",NULL,NULL),
227 RK_SYSRQ_IOMUX_RES(0x58,6,3,"GPIO2_A[3]","sdmmc0_write_prt","pwm2","uart1_sir_out_n"),
228 RK_SYSRQ_IOMUX_RES(0x58,4,3,"GPIO2_A[2]","sdmmc0_detect_n",NULL,NULL),
229 RK_SYSRQ_IOMUX_RES(0x58,2,3,"GPIO2_A[1]","sdmmc0_data[7]",NULL,NULL),
230 RK_SYSRQ_IOMUX_RES(0x58,0,3,"GPIO2_A[0]","sdmmc0_data[6]",NULL,NULL),
232 struct rk_sysrq_iomux_regres rk_sysrq_iomux_res_gpio2h[] = {
233 RK_SYSRQ_IOMUX_RES(0x5c,30,3,"GPIO2_D[7]","i2s0_sdo3","mii_txd[3]",NULL),
234 RK_SYSRQ_IOMUX_RES(0x5c,28,3,"GPIO2_D[6]","i2s0_sdo2","mii_txd[2]",NULL),
235 RK_SYSRQ_IOMUX_RES(0x5c,26,3,"GPIO2_D[5]","i2s0_sdo1","mii_rxd[3]",NULL),
236 RK_SYSRQ_IOMUX_RES(0x5c,24,3,"GPIO2_D[4]","i2s0_sdo0","mii_rxd[2]",NULL),
237 RK_SYSRQ_IOMUX_RES(0x5c,22,3,"GPIO2_D[3]","i2s0_sdi","mii_col",NULL),
238 RK_SYSRQ_IOMUX_RES(0x5c,20,3,"GPIO2_D[2]","i2s0_lrck_rx","mii_tx_err",NULL),
239 RK_SYSRQ_IOMUX_RES(0x5c,18,3,"GPIO2_D[1]","i2s0_sclk","mii_crs",NULL),
240 RK_SYSRQ_IOMUX_RES(0x5c,16,3,"GPIO2_D[0]","i2s0_clk","mii_rx_clkin",NULL),
242 RK_SYSRQ_IOMUX_RES(0x5c,14,3,"GPIO2_C[7]","spi1_rxd",NULL,NULL),
243 RK_SYSRQ_IOMUX_RES(0x5c,12,3,"GPIO2_C[6]","spi1_txd",NULL,NULL),
244 RK_SYSRQ_IOMUX_RES(0x5c,10,3,"GPIO2_C[5]","spi1_csn0",NULL,NULL),
245 RK_SYSRQ_IOMUX_RES(0x5c,8,3,"GPIO2_C[4]","spi1_clk",NULL,NULL),
246 RK_SYSRQ_IOMUX_RES(0x5c,6,3,"GPIO2_C[3]","spi0_rxd",NULL,NULL),
247 RK_SYSRQ_IOMUX_RES(0x5c,4,3,"GPIO2_C[2]","spi0_txd",NULL,NULL),
248 RK_SYSRQ_IOMUX_RES(0x5c,2,3,"GPIO2_C[1]","spi0_csn0",NULL,NULL),
249 RK_SYSRQ_IOMUX_RES(0x5c,0,3,"GPIO2_C[0]","spi0_clk",NULL,NULL),
251 struct rk_sysrq_iomux_regres rk_sysrq_iomux_res_gpio3l[] = {
252 RK_SYSRQ_IOMUX_RES(0x60,30,3,"GPIO3_B[7]","emmc_data[5]",NULL,NULL),
253 RK_SYSRQ_IOMUX_RES(0x60,28,3,"GPIO3_B[6]","emmc_data[4]",NULL,NULL),
254 RK_SYSRQ_IOMUX_RES(0x60,26,3,"GPIO3_B[5]","emmc_data[3]",NULL,NULL),
255 RK_SYSRQ_IOMUX_RES(0x60,24,3,"GPIO3_B[4]","emmc_data[2]",NULL,NULL),
256 RK_SYSRQ_IOMUX_RES(0x60,22,3,"GPIO3_B[3]","emmc_data[1]",NULL,NULL),
257 RK_SYSRQ_IOMUX_RES(0x60,20,3,"GPIO3_B[2]","emmc_data[0]",NULL,NULL),
258 RK_SYSRQ_IOMUX_RES(0x60,18,3,"GPIO3_B[1]","emmc_cmd",NULL,NULL),
259 RK_SYSRQ_IOMUX_RES(0x60,16,3,"GPIO3_B[0]","emmc_clkout",NULL,NULL),
261 RK_SYSRQ_IOMUX_RES(0x60,14,3,"GPIO3_A[7]","smc_addr[15]","host_data[15]",NULL),
262 RK_SYSRQ_IOMUX_RES(0x60,12,3,"GPIO3_A[6]","smc_addr[14]","host_data[14]",NULL),
263 RK_SYSRQ_IOMUX_RES(0x60,10,3,"GPIO3_A[5]","i2s1_lrck_tx",NULL,NULL),
264 RK_SYSRQ_IOMUX_RES(0x60,8,3,"GPIO3_A[4]","i2s1_sdo",NULL,NULL),
265 RK_SYSRQ_IOMUX_RES(0x60,6,3,"GPIO3_A[3]","i2s1_sdi",NULL,NULL),
266 RK_SYSRQ_IOMUX_RES(0x60,4,3,"GPIO3_A[2]","i2s1_lrck_rx",NULL,NULL),
267 RK_SYSRQ_IOMUX_RES(0x60,2,3,"GPIO3_A[1]","i2s1_sclk",NULL,NULL),
268 RK_SYSRQ_IOMUX_RES(0x60,0,3,"GPIO3_A[0]","i2s1_clk",NULL,NULL),
270 struct rk_sysrq_iomux_regres rk_sysrq_iomux_res_gpio3h[] = {
271 RK_SYSRQ_IOMUX_RES(0x64,30,3,"GPIO3_D[7]","smc_addr[9]","host_data[9]",NULL),
272 RK_SYSRQ_IOMUX_RES(0x64,28,3,"GPIO3_D[6]","smc_addr[8]","host_data[8]",NULL),
273 RK_SYSRQ_IOMUX_RES(0x64,26,3,"GPIO3_D[5]","smc_addr[7]","host_data[7]",NULL),
274 RK_SYSRQ_IOMUX_RES(0x64,24,3,"GPIO3_D[4]","host_wrn",NULL,NULL),
275 RK_SYSRQ_IOMUX_RES(0x64,22,3,"GPIO3_D[3]","host_rdn",NULL,NULL),
276 RK_SYSRQ_IOMUX_RES(0x64,20,3,"GPIO3_D[2]","host_csn",NULL,NULL),
277 RK_SYSRQ_IOMUX_RES(0x64,18,3,"GPIO3_D[1]","smc_addr[19]","host_addr[1]",NULL),
278 RK_SYSRQ_IOMUX_RES(0x64,16,3,"GPIO3_D[0]","smc_addr[18]","host_addr[0]",NULL),
280 RK_SYSRQ_IOMUX_RES(0x64,14,3,"GPIO3_C[7]","smc_addr[17]","host_data[17]",NULL),
281 RK_SYSRQ_IOMUX_RES(0x64,12,3,"GPIO3_C[6]","smc_addr[16]","host_data[16]",NULL),
282 RK_SYSRQ_IOMUX_RES(0x64,10,3,"GPIO3_C[5]","smc_addr[12]","host_data[12]",NULL),
283 RK_SYSRQ_IOMUX_RES(0x64,8,3,"GPIO3_C[4]","smc_addr[11]","host_data[11]",NULL),
284 RK_SYSRQ_IOMUX_RES(0x64,6,3,"GPIO3_C[3]","smc_addr[10]","host_data[10]",NULL),
285 RK_SYSRQ_IOMUX_RES(0x64,4,3,"GPIO3_C[2]","smc_addr[13]","host_data[13]",NULL),
286 RK_SYSRQ_IOMUX_RES(0x64,2,3,"GPIO3_C[1]","emmc_data[7]",NULL,NULL),
287 RK_SYSRQ_IOMUX_RES(0x64,0,3,"GPIO3_C[0]","emmc_data[6]",NULL,NULL),
289 struct rk_sysrq_iomux_regres rk_sysrq_iomux_res_gpio4l[] = {
290 RK_SYSRQ_IOMUX_RES(0X68,30,3,"GPIO4_B[7]","flash_data[15]",NULL,NULL),
291 RK_SYSRQ_IOMUX_RES(0X68,28,3,"GPIO4_B[6]","flash_data[14]",NULL,NULL),
292 RK_SYSRQ_IOMUX_RES(0X68,26,3,"GPIO4_B[5]","flash_data[13]",NULL,NULL),
293 RK_SYSRQ_IOMUX_RES(0X68,24,3,"GPIO4_B[4]","flash_data[12]",NULL,NULL),
294 RK_SYSRQ_IOMUX_RES(0X68,22,3,"GPIO4_B[3]","flash_data[11]",NULL,NULL),
295 RK_SYSRQ_IOMUX_RES(0X68,20,3,"GPIO4_B[2]","flash_data[10]",NULL,NULL),
296 RK_SYSRQ_IOMUX_RES(0X68,18,3,"GPIO4_B[1]","flash_data[9]",NULL,NULL),
297 RK_SYSRQ_IOMUX_RES(0X68,16,3,"GPIO4_B[0]","flash_data[8]",NULL,NULL),
299 RK_SYSRQ_IOMUX_RES(0X68,14,3,"GPIO4_A[7]","spdif_tx",NULL,NULL),
300 RK_SYSRQ_IOMUX_RES(0X68,12,3,"GPIO4_A[6]","otg1_drv_vbus",NULL,NULL),
301 RK_SYSRQ_IOMUX_RES(0X68,10,3,"GPIO4_A[5]","otg0_drv_vbus",NULL,NULL),
303 struct rk_sysrq_iomux_regres rk_sysrq_iomux_res_gpio4h[] = {
304 RK_SYSRQ_IOMUX_RES(0X6c,30,3,"GPIO4_D[7]","i2s0_lrck_tx1",NULL,NULL),
305 RK_SYSRQ_IOMUX_RES(0X6c,28,3,"GPIO4_D[6]","i2s0_lrck_tx0",NULL,NULL),
306 RK_SYSRQ_IOMUX_RES(0X6c,26,3,"GPIO4_D[5]","trace_ctl",NULL,NULL),
307 RK_SYSRQ_IOMUX_RES(0X6c,24,3,"GPIO4_D[4]","cpu trace_clk",NULL,NULL),
308 RK_SYSRQ_IOMUX_RES(0X6c,22,3,"GPIO6_C[7:6]","cpu trace_data[7:6]",NULL,NULL),
309 RK_SYSRQ_IOMUX_RES(0X6c,20,3,"GPIO6_C[5:4]","cpu trace_data[5:4]",NULL,NULL),
310 RK_SYSRQ_IOMUX_RES(0X6c,18,3,"GPIO4_D[3:2]","cpu trace_data[3:2]",NULL,NULL),
311 RK_SYSRQ_IOMUX_RES(0X6c,16,3,"GPIO4_D[1:0]","cpu trace_data[1:0]",NULL,NULL),
313 RK_SYSRQ_IOMUX_RES(0X6c,14,3,"GPIO4_C[7]","rmii_rxd[0]","mii_rxd[0]",NULL),
314 RK_SYSRQ_IOMUX_RES(0X6c,12,3,"GPIO4_C[6]","rmii_rxd[1]","mii_rxd[1]",NULL),
315 RK_SYSRQ_IOMUX_RES(0X6c,10,3,"GPIO4_C[5]","rmii_csr_dvalid","mii_rxd_valid",NULL),
316 RK_SYSRQ_IOMUX_RES(0X6c,8,3,"GPIO4_C[4]","rmii_rx_err","mii_rx_err",NULL),
317 RK_SYSRQ_IOMUX_RES(0X6c,6,3,"GPIO4_C[3]","rmii_txd[0]","mii_txd[0]",NULL),
318 RK_SYSRQ_IOMUX_RES(0X6c,4,3,"GPIO4_C[2]","rmii_txd[1]","mii_txd[1]",NULL),
319 RK_SYSRQ_IOMUX_RES(0X6c,2,3,"GPIO4_C[1]","rmii_tx_en","mii_tx_en",NULL),
320 RK_SYSRQ_IOMUX_RES(0X6c,0,3,"GPIO4_C[0]","rmii_clkout","rmii_clkin",NULL),
322 struct rk_sysrq_iomux_regres rk_sysrq_iomux_res_gpio5l[] = {
323 RK_SYSRQ_IOMUX_RES(0x70,30,3,"GPIO5_B[7]","hsadc_clkout ","gps_clk ",NULL),
324 RK_SYSRQ_IOMUX_RES(0x70,28,3,"GPIO5_B[6]","hsadc_data[9]",NULL,NULL),
325 RK_SYSRQ_IOMUX_RES(0x70,26,3,"GPIO5_B[5]","hsadc_data[8]",NULL,NULL),
326 RK_SYSRQ_IOMUX_RES(0x70,24,3,"GPIO5_B[4]","hsadc_data[7]",NULL,NULL),
327 RK_SYSRQ_IOMUX_RES(0x70,22,3,"GPIO5_B[3]","hsadc_data[6]",NULL,NULL),
328 RK_SYSRQ_IOMUX_RES(0x70,20,3,"GPIO5_B[2]","hsadc_data[5]",NULL,NULL),
329 RK_SYSRQ_IOMUX_RES(0x70,18,3,"GPIO5_B[1]","hsadc_data[4]",NULL,NULL),
330 RK_SYSRQ_IOMUX_RES(0x70,16,3,"GPIO5_B[0]","hsadc_data[3]",NULL,NULL),
332 RK_SYSRQ_IOMUX_RES(0x70,14,3,"GPIO5_A[7]","hsadc_data[2]",NULL,NULL),
333 RK_SYSRQ_IOMUX_RES(0x70,12,3,"GPIO5_A[6]","hsadc_data[1]",NULL,NULL),
334 RK_SYSRQ_IOMUX_RES(0x70,10,3,"GPIO5_A[5]","hsadc_data[0]",NULL,NULL),
335 RK_SYSRQ_IOMUX_RES(0x70,8,3,"GPIO5_A[4]","ts_sync",NULL,NULL),
336 RK_SYSRQ_IOMUX_RES(0x70,6,3,"GPIO5_A[3]","mii_tx_clkin",NULL,NULL),
338 struct rk_sysrq_iomux_regres rk_sysrq_iomux_res_gpio5h[] = {
339 RK_SYSRQ_IOMUX_RES(0x74,28,3,"GPIO5_D[6]","sdmmc1_pwr_en",NULL,NULL),
340 RK_SYSRQ_IOMUX_RES(0x74,26,3,"GPIO5_D[5]","sdmmc0_pwr_en",NULL,NULL),
341 RK_SYSRQ_IOMUX_RES(0x74,24,3,"GPIO5_D[4]","i2c2_scl",NULL,NULL),
342 RK_SYSRQ_IOMUX_RES(0x74,22,3,"GPIO5_D[3]","i2c2_sda",NULL,NULL),
343 RK_SYSRQ_IOMUX_RES(0x74,20,3,"GPIO5_D[2]","pwm1","uart1_sir_in",NULL),
344 RK_SYSRQ_IOMUX_RES(0x74,18,3,"GPIO5_D[1]","ebc_sdclk","smc_addr[6]","host_data[6]"),
345 RK_SYSRQ_IOMUX_RES(0x74,16,3,"GPIO5_D[0]","ebc_sdle","smc_addr[5]","host_data[5]"),
347 RK_SYSRQ_IOMUX_RES(0x74,14,3,"GPIO5_C[7]","ebc_sddo7","smc_data7",NULL),
348 RK_SYSRQ_IOMUX_RES(0x74,12,3,"GPIO5_C[6]","ebc_sddo6","smc_data6",NULL),
349 RK_SYSRQ_IOMUX_RES(0x74,10,3,"GPIO5_C[5]","ebc_sddo5","smc_data5",NULL),
350 RK_SYSRQ_IOMUX_RES(0x74,8,3,"GPIO5_C[4]","ebc_sddo4","smc_data4",NULL),
351 RK_SYSRQ_IOMUX_RES(0x74,6,3,"GPIO5_C[3]","ebc_sddo3","smc_data3",NULL),
352 RK_SYSRQ_IOMUX_RES(0x74,4,3,"GPIO5_C[2]","ebc_sddo2","smc_data2",NULL),
353 RK_SYSRQ_IOMUX_RES(0x74,2,3,"GPIO5_C[1]","ebc_sddo1","smc_data1",NULL),
354 RK_SYSRQ_IOMUX_RES(0x74,0,3,"GPIO5_C[0]","ebc_sddo0","smc_data0",NULL),
356 struct rk_sysrq_gpio_printres rk_sysrq_gpio_printres_table[] = {
357 RK_SYSRQ_GPIO_RES("gpio pin data\0","L","H",GPIO_SWPORTA_DR,GPIO_SWPORTB_DR,GPIO_SWPORTC_DR,GPIO_SWPORTD_DR),
358 RK_SYSRQ_GPIO_RES("gpio pin driction\0","O","I",GPIO_SWPORTA_DDR,GPIO_SWPORTB_DDR,GPIO_SWPORTB_DDR,GPIO_SWPORTB_DDR),
359 RK_SYSRQ_GPIO_RES("gpio int enable\0","G","I",GPIO_INTEN,0xffff,0xffff,0xffff),
360 RK_SYSRQ_GPIO_RES("gpio int MASK\0","I","M",GPIO_INTMASK,0xffff,0xffff,0xffff),
361 RK_SYSRQ_GPIO_RES("gpio int type\0","L","E",GPIO_INTTYPE_LEVEL,0xffff,0xffff,0xffff),
362 RK_SYSRQ_GPIO_RES("gpio int polarity\0","L","H",GPIO_INT_POLARITY,0xffff,0xffff,0xffff),
363 RK_SYSRQ_GPIO_RES("gpio int status\0","N","I",GPIO_INT_STATUS,0xffff,0xffff,0xffff),
366 struct rk_sysrq_iomux rk_sysrq_iomux_table[] = {
367 RK_SYSRQ_IOMUX_CFG("GRF_GPIO0l_IOMUX",NULL,RK29_GRF_BASE,0l),
368 RK_SYSRQ_IOMUX_CFG("GRF_GPIO0h_IOMUX",NULL,RK29_GRF_BASE,0h),
369 RK_SYSRQ_IOMUX_CFG("GRF_GPIO1l_IOMUX",NULL,RK29_GRF_BASE,1l),
370 RK_SYSRQ_IOMUX_CFG("GRF_GPIO1h_IOMUX",NULL,RK29_GRF_BASE,1h),
371 RK_SYSRQ_IOMUX_CFG("GRF_GPIO2l_IOMUX",NULL,RK29_GRF_BASE,2l),
372 RK_SYSRQ_IOMUX_CFG("GRF_GPIO2h_IOMUX",NULL,RK29_GRF_BASE,2h),
373 RK_SYSRQ_IOMUX_CFG("GRF_GPIO3l_IOMUX",NULL,RK29_GRF_BASE,3l),
374 RK_SYSRQ_IOMUX_CFG("GRF_GPIO3h_IOMUX",NULL,RK29_GRF_BASE,3h),
375 RK_SYSRQ_IOMUX_CFG("GRF_GPIO4l_IOMUX",NULL,RK29_GRF_BASE,4l),
376 RK_SYSRQ_IOMUX_CFG("GRF_GPIO4h_IOMUX",NULL,RK29_GRF_BASE,4l),
377 RK_SYSRQ_IOMUX_CFG("GRF_GPIO5l_IOMUX",NULL,RK29_GRF_BASE,5l),
378 RK_SYSRQ_IOMUX_CFG("GRF_GPIO5h_IOMUX",NULL,RK29_GRF_BASE,5h),
380 struct rk_sysrq_gpio rk_sysrq_gpio_table[] = {
381 RK_SYSRQ_GPIO("GPIO 0",RK29_GPIO0_BASE),
382 RK_SYSRQ_GPIO("GPIO 1",RK29_GPIO1_BASE),
383 RK_SYSRQ_GPIO("GPIO 2",RK29_GPIO2_BASE),
384 RK_SYSRQ_GPIO("GPIO 3",RK29_GPIO3_BASE),
385 RK_SYSRQ_GPIO("GPIO 4",RK29_GPIO4_BASE),
386 RK_SYSRQ_GPIO("GPIO 5",RK29_GPIO5_BASE),
387 //RK_SYSRQ_GPIO("GPIO 0"),
388 //RK_SYSRQ_GPIO("GPIO2",RK2818_GPIO2_BASE),
389 //RK_SYSRQ_GPIO("GPIO3",RK2818_GPIO3_BASE),
393 static inline unsigned int rk_sysrq_reg_read(const unsigned char __iomem *regbase, unsigned int regOff)
395 return __raw_readl(regbase + regOff);
397 char rk_sysrq_table_fistline_buf[1024];
399 void rk_sysrq_draw_table(a,_)int a;int _;{
403 for(j = 0; j < 100; j++){
405 for(i = 0; i < 100; i++){
412 printk("%s\n",line_buf);
416 printk("%s\n",rk_sysrq_table_fistline_buf);
420 printk("%s\n",rk_sysrq_table_fistline_buf);
424 /* Whether we react on sysrq keys or just ignore them */
425 int __read_mostly __rk_sysrq_enabled = 1;
427 static int __read_mostly rk_sysrq_always_enabled;
429 int rk_sysrq_on(void)
431 return __rk_sysrq_enabled || rk_sysrq_always_enabled;
435 * A value of 1 means 'all', other nonzero values are an op mask:
437 static inline int rk_sysrq_on_mask(int mask)
439 return rk_sysrq_always_enabled || __rk_sysrq_enabled == 1 ||
440 (__rk_sysrq_enabled & mask);
443 static int __init rk_sysrq_always_enabled_setup(char *str)
445 rk_sysrq_always_enabled = 1;
446 printk(KERN_INFO "debug: rk_sysrq always enabled.\n");
451 __setup("rk_sysrq_always_enabled", rk_sysrq_always_enabled_setup);
454 void rk_sysrq_get_gpio_status(void)
461 static void rk_sysrq_gpio_show_reg(struct rk_sysrq_gpio *gpio_res)
463 char rk_sysrq_line_buf[129];
466 int i = 0,j = 0, k = 0;
467 rk_sysrq_line_buf[128] = 0xff;
468 k = gpio_res->res_table_count;
470 printk("-->%s ::\n",gpio_res->rk_sysrq_gpio_name);
472 for(j = 0; gpio_res->res_table[k].res_off[j] != 0xffff ; j++){
473 temp = rk_sysrq_line_buf;
474 memset(rk_sysrq_line_buf,0,128);
475 printk("%s P[%c]: ",gpio_res->res_table[k].res_name,j+65);
476 reg = rk_sysrq_reg_read(gpio_res->regbase, gpio_res->res_table[k].res_off[j]);
477 for(i = 0; i < 8; i++){
482 *temp++ = *(gpio_res->res_table[k].resmap[reg&1].resname);
487 printk("%s\n",rk_sysrq_line_buf);
492 static void rk_sysrq_iomux_show_reg(struct rk_sysrq_iomux *mux)
499 printk("%s\n",mux->message);
500 reg = rk_sysrq_reg_read(mux->reg_base,mux->regres_table[0].off);
501 for(i = 0 ; i < mux->res_table_count; i ++){
502 unsigned int mask = mux->regres_table[i].mask_bit;
503 unsigned int start_bit = mux->regres_table[i].start_bit;
504 memset(rk_sysrq_table_fistline_buf,0,1024);
505 temp = rk_sysrq_table_fistline_buf;
506 for(k = 0 ; k < (mask + 1) ; k++){
507 temp2 = mux->regres_table[i].reg_description[k];
508 *temp++ = '[';*temp++ = (((k >> 1)&1) + '0');*temp++ = ((k&1) + '0');*temp++ = ']';*temp++ = ':';
510 *temp++ = 'r';*temp++ = 'e';*temp++ = 's';
517 printk("%s\n",rk_sysrq_table_fistline_buf);
518 memset(rk_sysrq_table_fistline_buf,0,1024);
519 temp = rk_sysrq_table_fistline_buf;
520 temp2 = mux->regres_table[i].reg_description[(reg >> start_bit)&mask];
522 *temp++ = 'r';*temp++ = 'e';*temp++ = 's';
527 printk("current set is : %s \n\n",rk_sysrq_table_fistline_buf);
531 static void rk_sysrq_handle_dump_gpio(int key, struct tty_struct *tty)
534 count = ARRAY_SIZE(rk_sysrq_gpio_table);
535 for(i = 0; i < count ; i++){
536 rk_sysrq_gpio_show_reg(&rk_sysrq_gpio_table[i]);
538 count = ARRAY_SIZE(rk_sysrq_iomux_table);
539 for(i = 0; i < count ; i++){
540 rk_sysrq_iomux_show_reg(&rk_sysrq_iomux_table[i]);
545 static void rk_sysrq_handle_show_gpio(int key, struct tty_struct *tty)
548 count = ARRAY_SIZE(rk_sysrq_gpio_table);
549 for(i = 0; i < count ; i++){
550 rk_sysrq_gpio_show_reg(&rk_sysrq_gpio_table[i]);
555 static void rk_sysrq_handle_show_iomux(int key, struct tty_struct *tty)
559 count = ARRAY_SIZE(rk_sysrq_iomux_table);
560 for(i = 0; i < count ; i++){
561 rk_sysrq_iomux_show_reg(&rk_sysrq_iomux_table[i]);
566 static struct sysrq_key_op rk_sysrq_dump_gpio_op = {
567 .handler = rk_sysrq_handle_dump_gpio,
568 .help_msg = "dump gpio state(d)",
569 .action_msg = "Nice All RT Tasks",
570 .enable_mask = SYSRQ_ENABLE_RTNICE,
572 static struct sysrq_key_op rk_sysrq_show_gpio_op = {
573 .handler = rk_sysrq_handle_show_gpio,
574 .help_msg = "dump gpio state(o)",
575 .action_msg = "Nice All RT Tasks",
576 .enable_mask = SYSRQ_ENABLE_RTNICE,
578 static struct sysrq_key_op rk_sysrq_show_iomux_op = {
579 .handler = rk_sysrq_handle_show_iomux,
580 .help_msg = "dump gpio state(m)",
581 .action_msg = "Nice All RT Tasks",
582 .enable_mask = SYSRQ_ENABLE_RTNICE,
584 /* Key Operations table and lock */
585 static DEFINE_SPINLOCK(rk_sysrq_key_table_lock);
587 static struct sysrq_key_op *rk_sysrq_key_table[36] = {
589 &sysrq_loglevel_op, /* 0 */
590 &sysrq_loglevel_op, /* 1 */
591 &sysrq_loglevel_op, /* 2 */
592 &sysrq_loglevel_op, /* 3 */
593 &sysrq_loglevel_op, /* 4 */
594 &sysrq_loglevel_op, /* 5 */
595 &sysrq_loglevel_op, /* 6 */
596 &sysrq_loglevel_op, /* 7 */
597 &sysrq_loglevel_op, /* 8 */
598 &sysrq_loglevel_op, /* 9 */
601 * a: Don't use for system provided sysrqs, it is handled specially on
602 * sparc and will never arrive.
605 &sysrq_reboot_op, /* b */
606 &sysrq_crash_op, /* c & ibm_emac driver debug */
607 &sysrq_showlocks_op, /* d */
608 &sysrq_term_op, /* e */
609 &sysrq_moom_op, /* f */
610 /* g: May be registered for the kernel debugger */
612 NULL, /* h - reserved for help */
613 &sysrq_kill_op, /* i */
615 &sysrq_thaw_op, /* j */
619 &sysrq_SAK_op, /* k */
621 &sysrq_showallcpus_op, /* l */
625 &sysrq_showmem_op, /* m */
626 &sysrq_unrt_op, /* n */
627 /* o: This will often be registered as 'Off' at init time */
629 &sysrq_showregs_op, /* p */
630 &sysrq_show_timers_op, /* q */
631 &sysrq_unraw_op, /* r */
632 &sysrq_sync_op, /* s */
633 &sysrq_showstate_op, /* t */
634 &sysrq_mountro_op, /* u */
635 /* v: May be registered for frame buffer console restore */
637 &sysrq_showstate_blocked_op, /* w */
638 /* x: May be registered on ppc/powerpc for xmon */
640 /* y: May be registered on sparc64 for global register dump */
642 &sysrq_ftrace_dump_op, /* z */
657 &rk_sysrq_dump_gpio_op, /*d*/
666 &rk_sysrq_show_iomux_op, /*m*/
668 &rk_sysrq_show_gpio_op, /*o*/
683 /* key2index calculation, -1 on invalid index */
684 static int rk_sysrq_key_table_key2index(int key)
688 if ((key >= '0') && (key <= '9'))
690 else if ((key >= 'a') && (key <= 'z'))
691 retval = key + 10 - 'a';
698 * get and put functions for the table, exposed to modules.
700 struct sysrq_key_op *__rk_sysrq_get_key_op(int key)
702 struct sysrq_key_op *op_p = NULL;
704 i = rk_sysrq_key_table_key2index(key);
706 op_p = rk_sysrq_key_table[i];
710 static void __rk_sysrq_put_key_op(int key, struct sysrq_key_op *op_p)
712 int i = rk_sysrq_key_table_key2index(key);
715 rk_sysrq_key_table[i] = op_p;
719 * This is the non-locking version of handle_sysrq. It must/can only be called
720 * by sysrq key handlers, as they are inside of the lock
722 void __rk_handle_sysrq(int key, struct tty_struct *tty, int check_mask)
724 struct sysrq_key_op *op_p;
728 spin_lock_irqsave(&rk_sysrq_key_table_lock, flags);
730 * Raise the apparent loglevel to maximum so that the sysrq header
731 * is shown to provide the user with positive feedback. We do not
732 * simply emit this at KERN_EMERG as that would change message
733 * routing in the consumers of /proc/kmsg.
735 orig_log_level = console_loglevel;
736 console_loglevel = 7;
737 printk(KERN_INFO "rk_SysRq : ");
739 op_p = __rk_sysrq_get_key_op(key);
742 * Should we check for enabled operations (/proc/sysrq-trigger
743 * should not) and is the invoked operation enabled?
745 if (!check_mask || rk_sysrq_on_mask(op_p->enable_mask)) {
746 printk("%s\n", op_p->action_msg);
747 console_loglevel = orig_log_level;
748 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36))
751 op_p->handler(key, tty);
754 printk("This sysrq operation is disabled.\n");
758 /* Only print the help msg once per handler */
759 for (i = 0; i < ARRAY_SIZE(rk_sysrq_key_table); i++) {
760 if (rk_sysrq_key_table[i]) {
763 for (j = 0; rk_sysrq_key_table[i] !=
764 rk_sysrq_key_table[j]; j++)
768 printk("%s ", rk_sysrq_key_table[i]->help_msg);
772 console_loglevel = orig_log_level;
774 spin_unlock_irqrestore(&rk_sysrq_key_table_lock, flags);
778 * This function is called by the keyboard handler when SysRq is pressed
779 * and any other keycode arrives.
781 void rk_handle_sysrq(int key, struct tty_struct *tty)
784 __rk_handle_sysrq(key, tty, 1);
786 EXPORT_SYMBOL(rk_handle_sysrq);
788 static int __rk_sysrq_swap_key_ops(int key, struct sysrq_key_op *insert_op_p,
789 struct sysrq_key_op *remove_op_p)
794 spin_lock_irqsave(&rk_sysrq_key_table_lock, flags);
795 if (__rk_sysrq_get_key_op(key) == remove_op_p) {
796 __rk_sysrq_put_key_op(key, insert_op_p);
801 spin_unlock_irqrestore(&rk_sysrq_key_table_lock, flags);
805 int rk_register_sysrq_key(int key, struct sysrq_key_op *op_p)
807 return __rk_sysrq_swap_key_ops(key, op_p, NULL);
809 EXPORT_SYMBOL(rk_register_sysrq_key);
811 int rk_unregister_sysrq_key(int key, struct sysrq_key_op *op_p)
813 return __rk_sysrq_swap_key_ops(key, NULL, op_p);
815 EXPORT_SYMBOL(rk_unregister_sysrq_key);
817 #ifdef CONFIG_PROC_FS
819 * writing 'C' to /proc/sysrq-trigger is like sysrq-C
821 static ssize_t rk_write_sysrq_trigger(struct file *file, const char __user *buf,
822 size_t count, loff_t *ppos)
826 if (get_user(c, buf))
828 __rk_handle_sysrq(c, NULL, 0);
833 static const struct file_operations rk_proc_sysrq_trigger_operations = {
834 .write = rk_write_sysrq_trigger,
837 static int __init rk_sysrq_init(void)
839 memset(rk_sysrq_table_fistline_buf, '+', 128);
840 rk_sysrq_table_fistline_buf[100] = 0;
841 proc_create("rk-sysrq-trigger", S_IWUSR, NULL, &rk_proc_sysrq_trigger_operations);
844 module_init(rk_sysrq_init);