drivers/char/tpm/tpm_tis.c

   1 /*
   2  * Copyright (C) 2005, 2006 IBM Corporation
   3  *
   4  * Authors:
   5  * Leendert van Doorn <leendert@watson.ibm.com>
   6  * Kylene Hall <kjhall@us.ibm.com>
   7  *
   8  * Maintained by: <tpmdd-devel@lists.sourceforge.net>
   9  *
  10  * Device driver for TCG/TCPA TPM (trusted platform module).
  11  * Specifications at www.trustedcomputinggroup.org
  12  *
  13  * This device driver implements the TPM interface as defined in
  14  * the TCG TPM Interface Spec version 1.2, revision 1.0.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation, version 2 of the
  19  * License.
  20  */
  21 #include <linux/init.h>
  22 #include <linux/module.h>
  23 #include <linux/moduleparam.h>
  24 #include <linux/pnp.h>
  25 #include <linux/slab.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/wait.h>
  28 #include <linux/acpi.h>
  29 #include <linux/freezer.h>
  30 #include "tpm.h"
  31
  32 enum tis_access {
  33         TPM_ACCESS_VALID = 0x80,
  34         TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
  35         TPM_ACCESS_REQUEST_PENDING = 0x04,
  36         TPM_ACCESS_REQUEST_USE = 0x02,
  37 };
  38
  39 enum tis_status {
  40         TPM_STS_VALID = 0x80,
  41         TPM_STS_COMMAND_READY = 0x40,
  42         TPM_STS_GO = 0x20,
  43         TPM_STS_DATA_AVAIL = 0x10,
  44         TPM_STS_DATA_EXPECT = 0x08,
  45 };
  46
  47 enum tis_int_flags {
  48         TPM_GLOBAL_INT_ENABLE = 0x80000000,
  49         TPM_INTF_BURST_COUNT_STATIC = 0x100,
  50         TPM_INTF_CMD_READY_INT = 0x080,
  51         TPM_INTF_INT_EDGE_FALLING = 0x040,
  52         TPM_INTF_INT_EDGE_RISING = 0x020,
  53         TPM_INTF_INT_LEVEL_LOW = 0x010,
  54         TPM_INTF_INT_LEVEL_HIGH = 0x008,
  55         TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
  56         TPM_INTF_STS_VALID_INT = 0x002,
  57         TPM_INTF_DATA_AVAIL_INT = 0x001,
  58 };
  59
  60 enum tis_defaults {
  61         TIS_MEM_BASE = 0xFED40000,
  62         TIS_MEM_LEN = 0x5000,
  63         TIS_SHORT_TIMEOUT = 750,        /* ms */
  64         TIS_LONG_TIMEOUT = 2000,        /* 2 sec */
  65 };
  66
  67 #define TPM_ACCESS(l)                   (0x0000 | ((l) << 12))
  68 #define TPM_INT_ENABLE(l)               (0x0008 | ((l) << 12))
  69 #define TPM_INT_VECTOR(l)               (0x000C | ((l) << 12))
  70 #define TPM_INT_STATUS(l)               (0x0010 | ((l) << 12))
  71 #define TPM_INTF_CAPS(l)                (0x0014 | ((l) << 12))
  72 #define TPM_STS(l)                      (0x0018 | ((l) << 12))
  73 #define TPM_DATA_FIFO(l)                (0x0024 | ((l) << 12))
  74
  75 #define TPM_DID_VID(l)                  (0x0F00 | ((l) << 12))
  76 #define TPM_RID(l)                      (0x0F04 | ((l) << 12))
  77
  78 static LIST_HEAD(tis_chips);
  79 static DEFINE_MUTEX(tis_lock);
  80
  81 #if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
  82 static int is_itpm(struct pnp_dev *dev)
  83 {
  84         struct acpi_device *acpi = pnp_acpi_device(dev);
  85         struct acpi_hardware_id *id;
  86
  87         if (!acpi)
  88                 return 0;
  89
  90         list_for_each_entry(id, &acpi->pnp.ids, list) {
  91                 if (!strcmp("INTC0102", id->id))
  92                         return 1;
  93         }
  94
  95         return 0;
  96 }
  97 #else
  98 static inline int is_itpm(struct pnp_dev *dev)
  99 {
 100         return 0;
 101 }
 102 #endif
 103
 104 /* Before we attempt to access the TPM we must see that the valid bit is set.
 105  * The specification says that this bit is 0 at reset and remains 0 until the
 106  * 'TPM has gone through its self test and initialization and has established
 107  * correct values in the other bits.' */
 108 static int wait_startup(struct tpm_chip *chip, int l)
 109 {
 110         unsigned long stop = jiffies + chip->vendor.timeout_a;
 111         do {
 112                 if (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
 113                     TPM_ACCESS_VALID)
 114                         return 0;
 115                 msleep(TPM_TIMEOUT);
 116         } while (time_before(jiffies, stop));
 117         return -1;
 118 }
 119
 120 static int check_locality(struct tpm_chip *chip, int l)
 121 {
 122         if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
 123              (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
 124             (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
 125                 return chip->vendor.locality = l;
 126
 127         return -1;
 128 }
 129
 130 static void release_locality(struct tpm_chip *chip, int l, int force)
 131 {
 132         if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
 133                       (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
 134             (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
 135                 iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
 136                          chip->vendor.iobase + TPM_ACCESS(l));
 137 }
 138
 139 static int request_locality(struct tpm_chip *chip, int l)
 140 {
 141         unsigned long stop, timeout;
 142         long rc;
 143
 144         if (check_locality(chip, l) >= 0)
 145                 return l;
 146
 147         iowrite8(TPM_ACCESS_REQUEST_USE,
 148                  chip->vendor.iobase + TPM_ACCESS(l));
 149
 150         stop = jiffies + chip->vendor.timeout_a;
 151
 152         if (chip->vendor.irq) {
 153 again:
 154                 timeout = stop - jiffies;
 155                 if ((long)timeout <= 0)
 156                         return -1;
 157                 rc = wait_event_interruptible_timeout(chip->vendor.int_queue,
 158                                                       (check_locality
 159                                                        (chip, l) >= 0),
 160                                                       timeout);
 161                 if (rc > 0)
 162                         return l;
 163                 if (rc == -ERESTARTSYS && freezing(current)) {
 164                         clear_thread_flag(TIF_SIGPENDING);
 165                         goto again;
 166                 }
 167         } else {
 168                 /* wait for burstcount */
 169                 do {
 170                         if (check_locality(chip, l) >= 0)
 171                                 return l;
 172                         msleep(TPM_TIMEOUT);
 173                 }
 174                 while (time_before(jiffies, stop));
 175         }
 176         return -1;
 177 }
 178
 179 static u8 tpm_tis_status(struct tpm_chip *chip)
 180 {
 181         return ioread8(chip->vendor.iobase +
 182                        TPM_STS(chip->vendor.locality));
 183 }
 184
 185 static void tpm_tis_ready(struct tpm_chip *chip)
 186 {
 187         /* this causes the current command to be aborted */
 188         iowrite8(TPM_STS_COMMAND_READY,
 189                  chip->vendor.iobase + TPM_STS(chip->vendor.locality));
 190 }
 191
 192 static int get_burstcount(struct tpm_chip *chip)
 193 {
 194         unsigned long stop;
 195         int burstcnt;
 196
 197         /* wait for burstcount */
 198         /* which timeout value, spec has 2 answers (c & d) */
 199         stop = jiffies + chip->vendor.timeout_d;
 200         do {
 201                 burstcnt = ioread8(chip->vendor.iobase +
 202                                    TPM_STS(chip->vendor.locality) + 1);
 203                 burstcnt += ioread8(chip->vendor.iobase +
 204                                     TPM_STS(chip->vendor.locality) +
 205                                     2) << 8;
 206                 if (burstcnt)
 207                         return burstcnt;
 208                 msleep(TPM_TIMEOUT);
 209         } while (time_before(jiffies, stop));
 210         return -EBUSY;
 211 }
 212
 213 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
 214 {
 215         int size = 0, burstcnt;
 216         while (size < count &&
 217                wait_for_tpm_stat(chip,
 218                                  TPM_STS_DATA_AVAIL | TPM_STS_VALID,
 219                                  chip->vendor.timeout_c,
 220                                  &chip->vendor.read_queue, true)
 221                == 0) {
 222                 burstcnt = get_burstcount(chip);
 223                 for (; burstcnt > 0 && size < count; burstcnt--)
 224                         buf[size++] = ioread8(chip->vendor.iobase +
 225                                               TPM_DATA_FIFO(chip->vendor.
 226                                                             locality));
 227         }
 228         return size;
 229 }
 230
 231 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
 232 {
 233         int size = 0;
 234         int expected, status;
 235
 236         if (count < TPM_HEADER_SIZE) {
 237                 size = -EIO;
 238                 goto out;
 239         }
 240
 241         /* read first 10 bytes, including tag, paramsize, and result */
 242         if ((size =
 243              recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) {
 244                 dev_err(chip->dev, "Unable to read header\n");
 245                 goto out;
 246         }
 247
 248         expected = be32_to_cpu(*(__be32 *) (buf + 2));
 249         if (expected > count) {
 250                 size = -EIO;
 251                 goto out;
 252         }
 253
 254         if ((size +=
 255              recv_data(chip, &buf[TPM_HEADER_SIZE],
 256                        expected - TPM_HEADER_SIZE)) < expected) {
 257                 dev_err(chip->dev, "Unable to read remainder of result\n");
 258                 size = -ETIME;
 259                 goto out;
 260         }
 261
 262         wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
 263                           &chip->vendor.int_queue, false);
 264         status = tpm_tis_status(chip);
 265         if (status & TPM_STS_DATA_AVAIL) {      /* retry? */
 266                 dev_err(chip->dev, "Error left over data\n");
 267                 size = -EIO;
 268                 goto out;
 269         }
 270
 271 out:
 272         tpm_tis_ready(chip);
 273         release_locality(chip, chip->vendor.locality, 0);
 274         return size;
 275 }
 276
 277 static bool itpm;
 278 module_param(itpm, bool, 0444);
 279 MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
 280
 281 /*
 282  * If interrupts are used (signaled by an irq set in the vendor structure)
 283  * tpm.c can skip polling for the data to be available as the interrupt is
 284  * waited for here
 285  */
 286 static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
 287 {
 288         int rc, status, burstcnt;
 289         size_t count = 0;
 290
 291         if (request_locality(chip, 0) < 0)
 292                 return -EBUSY;
 293
 294         status = tpm_tis_status(chip);
 295         if ((status & TPM_STS_COMMAND_READY) == 0) {
 296                 tpm_tis_ready(chip);
 297                 if (wait_for_tpm_stat
 298                     (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b,
 299                      &chip->vendor.int_queue, false) < 0) {
 300                         rc = -ETIME;
 301                         goto out_err;
 302                 }
 303         }
 304
 305         while (count < len - 1) {
 306                 burstcnt = get_burstcount(chip);
 307                 for (; burstcnt > 0 && count < len - 1; burstcnt--) {
 308                         iowrite8(buf[count], chip->vendor.iobase +
 309                                  TPM_DATA_FIFO(chip->vendor.locality));
 310                         count++;
 311                 }
 312
 313                 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
 314                                   &chip->vendor.int_queue, false);
 315                 status = tpm_tis_status(chip);
 316                 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
 317                         rc = -EIO;
 318                         goto out_err;
 319                 }
 320         }
 321
 322         /* write last byte */
 323         iowrite8(buf[count],
 324                  chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality));
 325         wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
 326                           &chip->vendor.int_queue, false);
 327         status = tpm_tis_status(chip);
 328         if ((status & TPM_STS_DATA_EXPECT) != 0) {
 329                 rc = -EIO;
 330                 goto out_err;
 331         }
 332
 333         return 0;
 334
 335 out_err:
 336         tpm_tis_ready(chip);
 337         release_locality(chip, chip->vendor.locality, 0);
 338         return rc;
 339 }
 340
 341 /*
 342  * If interrupts are used (signaled by an irq set in the vendor structure)
 343  * tpm.c can skip polling for the data to be available as the interrupt is
 344  * waited for here
 345  */
 346 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
 347 {
 348         int rc;
 349         u32 ordinal;
 350
 351         rc = tpm_tis_send_data(chip, buf, len);
 352         if (rc < 0)
 353                 return rc;
 354
 355         /* go and do it */
 356         iowrite8(TPM_STS_GO,
 357                  chip->vendor.iobase + TPM_STS(chip->vendor.locality));
 358
 359         if (chip->vendor.irq) {
 360                 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
 361                 if (wait_for_tpm_stat
 362                     (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID,
 363                      tpm_calc_ordinal_duration(chip, ordinal),
 364                      &chip->vendor.read_queue, false) < 0) {
 365                         rc = -ETIME;
 366                         goto out_err;
 367                 }
 368         }
 369         return len;
 370 out_err:
 371         tpm_tis_ready(chip);
 372         release_locality(chip, chip->vendor.locality, 0);
 373         return rc;
 374 }
 375
 376 struct tis_vendor_timeout_override {
 377         u32 did_vid;
 378         unsigned long timeout_us[4];
 379 };
 380
 381 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
 382         /* Atmel 3204 */
 383         { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
 384                         (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
 385 };
 386
 387 static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
 388                                     unsigned long *timeout_cap)
 389 {
 390         int i;
 391         u32 did_vid;
 392
 393         did_vid = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
 394
 395         for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
 396                 if (vendor_timeout_overrides[i].did_vid != did_vid)
 397                         continue;
 398                 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
 399                        sizeof(vendor_timeout_overrides[i].timeout_us));
 400                 return true;
 401         }
 402
 403         return false;
 404 }
 405
 406 /*
 407  * Early probing for iTPM with STS_DATA_EXPECT flaw.
 408  * Try sending command without itpm flag set and if that
 409  * fails, repeat with itpm flag set.
 410  */
 411 static int probe_itpm(struct tpm_chip *chip)
 412 {
 413         int rc = 0;
 414         u8 cmd_getticks[] = {
 415                 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
 416                 0x00, 0x00, 0x00, 0xf1
 417         };
 418         size_t len = sizeof(cmd_getticks);
 419         bool rem_itpm = itpm;
 420         u16 vendor = ioread16(chip->vendor.iobase + TPM_DID_VID(0));
 421
 422         /* probe only iTPMS */
 423         if (vendor != TPM_VID_INTEL)
 424                 return 0;
 425
 426         itpm = false;
 427
 428         rc = tpm_tis_send_data(chip, cmd_getticks, len);
 429         if (rc == 0)
 430                 goto out;
 431
 432         tpm_tis_ready(chip);
 433         release_locality(chip, chip->vendor.locality, 0);
 434
 435         itpm = true;
 436
 437         rc = tpm_tis_send_data(chip, cmd_getticks, len);
 438         if (rc == 0) {
 439                 dev_info(chip->dev, "Detected an iTPM.\n");
 440                 rc = 1;
 441         } else
 442                 rc = -EFAULT;
 443
 444 out:
 445         itpm = rem_itpm;
 446         tpm_tis_ready(chip);
 447         release_locality(chip, chip->vendor.locality, 0);
 448
 449         return rc;
 450 }
 451
 452 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
 453 {
 454         switch (chip->vendor.manufacturer_id) {
 455         case TPM_VID_WINBOND:
 456                 return ((status == TPM_STS_VALID) ||
 457                         (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
 458         case TPM_VID_STM:
 459                 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
 460         default:
 461                 return (status == TPM_STS_COMMAND_READY);
 462         }
 463 }
 464
 465 static const struct file_operations tis_ops = {
 466         .owner = THIS_MODULE,
 467         .llseek = no_llseek,
 468         .open = tpm_open,
 469         .read = tpm_read,
 470         .write = tpm_write,
 471         .release = tpm_release,
 472 };
 473
 474 static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL);
 475 static DEVICE_ATTR(pcrs, S_IRUGO, tpm_show_pcrs, NULL);
 476 static DEVICE_ATTR(enabled, S_IRUGO, tpm_show_enabled, NULL);
 477 static DEVICE_ATTR(active, S_IRUGO, tpm_show_active, NULL);
 478 static DEVICE_ATTR(owned, S_IRUGO, tpm_show_owned, NULL);
 479 static DEVICE_ATTR(temp_deactivated, S_IRUGO, tpm_show_temp_deactivated,
 480                    NULL);
 481 static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL);
 482 static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel);
 483 static DEVICE_ATTR(durations, S_IRUGO, tpm_show_durations, NULL);
 484 static DEVICE_ATTR(timeouts, S_IRUGO, tpm_show_timeouts, NULL);
 485
 486 static struct attribute *tis_attrs[] = {
 487         &dev_attr_pubek.attr,
 488         &dev_attr_pcrs.attr,
 489         &dev_attr_enabled.attr,
 490         &dev_attr_active.attr,
 491         &dev_attr_owned.attr,
 492         &dev_attr_temp_deactivated.attr,
 493         &dev_attr_caps.attr,
 494         &dev_attr_cancel.attr,
 495         &dev_attr_durations.attr,
 496         &dev_attr_timeouts.attr, NULL,
 497 };
 498
 499 static struct attribute_group tis_attr_grp = {
 500         .attrs = tis_attrs
 501 };
 502
 503 static struct tpm_vendor_specific tpm_tis = {
 504         .status = tpm_tis_status,
 505         .recv = tpm_tis_recv,
 506         .send = tpm_tis_send,
 507         .cancel = tpm_tis_ready,
 508         .update_timeouts = tpm_tis_update_timeouts,
 509         .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
 510         .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
 511         .req_canceled = tpm_tis_req_canceled,
 512         .attr_group = &tis_attr_grp,
 513         .miscdev = {
 514                     .fops = &tis_ops,},
 515 };
 516
 517 static irqreturn_t tis_int_probe(int irq, void *dev_id)
 518 {
 519         struct tpm_chip *chip = dev_id;
 520         u32 interrupt;
 521
 522         interrupt = ioread32(chip->vendor.iobase +
 523                              TPM_INT_STATUS(chip->vendor.locality));
 524
 525         if (interrupt == 0)
 526                 return IRQ_NONE;
 527
 528         chip->vendor.probed_irq = irq;
 529
 530         /* Clear interrupts handled with TPM_EOI */
 531         iowrite32(interrupt,
 532                   chip->vendor.iobase +
 533                   TPM_INT_STATUS(chip->vendor.locality));
 534         return IRQ_HANDLED;
 535 }
 536
 537 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
 538 {
 539         struct tpm_chip *chip = dev_id;
 540         u32 interrupt;
 541         int i;
 542
 543         interrupt = ioread32(chip->vendor.iobase +
 544                              TPM_INT_STATUS(chip->vendor.locality));
 545
 546         if (interrupt == 0)
 547                 return IRQ_NONE;
 548
 549         if (interrupt & TPM_INTF_DATA_AVAIL_INT)
 550                 wake_up_interruptible(&chip->vendor.read_queue);
 551         if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
 552                 for (i = 0; i < 5; i++)
 553                         if (check_locality(chip, i) >= 0)
 554                                 break;
 555         if (interrupt &
 556             (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
 557              TPM_INTF_CMD_READY_INT))
 558                 wake_up_interruptible(&chip->vendor.int_queue);
 559
 560         /* Clear interrupts handled with TPM_EOI */
 561         iowrite32(interrupt,
 562                   chip->vendor.iobase +
 563                   TPM_INT_STATUS(chip->vendor.locality));
 564         ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
 565         return IRQ_HANDLED;
 566 }
 567
 568 static bool interrupts = true;
 569 module_param(interrupts, bool, 0444);
 570 MODULE_PARM_DESC(interrupts, "Enable interrupts");
 571
 572 static int tpm_tis_init(struct device *dev, resource_size_t start,
 573                         resource_size_t len, unsigned int irq)
 574 {
 575         u32 vendor, intfcaps, intmask;
 576         int rc, i, irq_s, irq_e, probe;
 577         struct tpm_chip *chip;
 578
 579         if (!(chip = tpm_register_hardware(dev, &tpm_tis)))
 580                 return -ENODEV;
 581
 582         chip->vendor.iobase = ioremap(start, len);
 583         if (!chip->vendor.iobase) {
 584                 rc = -EIO;
 585                 goto out_err;
 586         }
 587
 588         /* Default timeouts */
 589         chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
 590         chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT);
 591         chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
 592         chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
 593
 594         if (wait_startup(chip, 0) != 0) {
 595                 rc = -ENODEV;
 596                 goto out_err;
 597         }
 598
 599         if (request_locality(chip, 0) != 0) {
 600                 rc = -ENODEV;
 601                 goto out_err;
 602         }
 603
 604         vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
 605         chip->vendor.manufacturer_id = vendor;
 606
 607         dev_info(dev,
 608                  "1.2 TPM (device-id 0x%X, rev-id %d)\n",
 609                  vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
 610
 611         if (!itpm) {
 612                 probe = probe_itpm(chip);
 613                 if (probe < 0) {
 614                         rc = -ENODEV;
 615                         goto out_err;
 616                 }
 617                 itpm = !!probe;
 618         }
 619
 620         if (itpm)
 621                 dev_info(dev, "Intel iTPM workaround enabled\n");
 622
 623
 624         /* Figure out the capabilities */
 625         intfcaps =
 626             ioread32(chip->vendor.iobase +
 627                      TPM_INTF_CAPS(chip->vendor.locality));
 628         dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
 629                 intfcaps);
 630         if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
 631                 dev_dbg(dev, "\tBurst Count Static\n");
 632         if (intfcaps & TPM_INTF_CMD_READY_INT)
 633                 dev_dbg(dev, "\tCommand Ready Int Support\n");
 634         if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
 635                 dev_dbg(dev, "\tInterrupt Edge Falling\n");
 636         if (intfcaps & TPM_INTF_INT_EDGE_RISING)
 637                 dev_dbg(dev, "\tInterrupt Edge Rising\n");
 638         if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
 639                 dev_dbg(dev, "\tInterrupt Level Low\n");
 640         if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
 641                 dev_dbg(dev, "\tInterrupt Level High\n");
 642         if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
 643                 dev_dbg(dev, "\tLocality Change Int Support\n");
 644         if (intfcaps & TPM_INTF_STS_VALID_INT)
 645                 dev_dbg(dev, "\tSts Valid Int Support\n");
 646         if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
 647                 dev_dbg(dev, "\tData Avail Int Support\n");
 648
 649         /* get the timeouts before testing for irqs */
 650         if (tpm_get_timeouts(chip)) {
 651                 dev_err(dev, "Could not get TPM timeouts and durations\n");
 652                 rc = -ENODEV;
 653                 goto out_err;
 654         }
 655
 656         if (tpm_do_selftest(chip)) {
 657                 dev_err(dev, "TPM self test failed\n");
 658                 rc = -ENODEV;
 659                 goto out_err;
 660         }
 661
 662         /* INTERRUPT Setup */
 663         init_waitqueue_head(&chip->vendor.read_queue);
 664         init_waitqueue_head(&chip->vendor.int_queue);
 665
 666         intmask =
 667             ioread32(chip->vendor.iobase +
 668                      TPM_INT_ENABLE(chip->vendor.locality));
 669
 670         intmask |= TPM_INTF_CMD_READY_INT
 671             | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
 672             | TPM_INTF_STS_VALID_INT;
 673
 674         iowrite32(intmask,
 675                   chip->vendor.iobase +
 676                   TPM_INT_ENABLE(chip->vendor.locality));
 677         if (interrupts)
 678                 chip->vendor.irq = irq;
 679         if (interrupts && !chip->vendor.irq) {
 680                 irq_s =
 681                     ioread8(chip->vendor.iobase +
 682                             TPM_INT_VECTOR(chip->vendor.locality));
 683                 if (irq_s) {
 684                         irq_e = irq_s;
 685                 } else {
 686                         irq_s = 3;
 687                         irq_e = 15;
 688                 }
 689
 690                 for (i = irq_s; i <= irq_e && chip->vendor.irq == 0; i++) {
 691                         iowrite8(i, chip->vendor.iobase +
 692                                  TPM_INT_VECTOR(chip->vendor.locality));
 693                         if (request_irq
 694                             (i, tis_int_probe, IRQF_SHARED,
 695                              chip->vendor.miscdev.name, chip) != 0) {
 696                                 dev_info(chip->dev,
 697                                          "Unable to request irq: %d for probe\n",
 698                                          i);
 699                                 continue;
 700                         }
 701
 702                         /* Clear all existing */
 703                         iowrite32(ioread32
 704                                   (chip->vendor.iobase +
 705                                    TPM_INT_STATUS(chip->vendor.locality)),
 706                                   chip->vendor.iobase +
 707                                   TPM_INT_STATUS(chip->vendor.locality));
 708
 709                         /* Turn on */
 710                         iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
 711                                   chip->vendor.iobase +
 712                                   TPM_INT_ENABLE(chip->vendor.locality));
 713
 714                         chip->vendor.probed_irq = 0;
 715
 716                         /* Generate Interrupts */
 717                         tpm_gen_interrupt(chip);
 718
 719                         chip->vendor.irq = chip->vendor.probed_irq;
 720
 721                         /* free_irq will call into tis_int_probe;
 722                            clear all irqs we haven't seen while doing
 723                            tpm_gen_interrupt */
 724                         iowrite32(ioread32
 725                                   (chip->vendor.iobase +
 726                                    TPM_INT_STATUS(chip->vendor.locality)),
 727                                   chip->vendor.iobase +
 728                                   TPM_INT_STATUS(chip->vendor.locality));
 729
 730                         /* Turn off */
 731                         iowrite32(intmask,
 732                                   chip->vendor.iobase +
 733                                   TPM_INT_ENABLE(chip->vendor.locality));
 734                         free_irq(i, chip);
 735                 }
 736         }
 737         if (chip->vendor.irq) {
 738                 iowrite8(chip->vendor.irq,
 739                          chip->vendor.iobase +
 740                          TPM_INT_VECTOR(chip->vendor.locality));
 741                 if (request_irq
 742                     (chip->vendor.irq, tis_int_handler, IRQF_SHARED,
 743                      chip->vendor.miscdev.name, chip) != 0) {
 744                         dev_info(chip->dev,
 745                                  "Unable to request irq: %d for use\n",
 746                                  chip->vendor.irq);
 747                         chip->vendor.irq = 0;
 748                 } else {
 749                         /* Clear all existing */
 750                         iowrite32(ioread32
 751                                   (chip->vendor.iobase +
 752                                    TPM_INT_STATUS(chip->vendor.locality)),
 753                                   chip->vendor.iobase +
 754                                   TPM_INT_STATUS(chip->vendor.locality));
 755
 756                         /* Turn on */
 757                         iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
 758                                   chip->vendor.iobase +
 759                                   TPM_INT_ENABLE(chip->vendor.locality));
 760                 }
 761         }
 762
 763         INIT_LIST_HEAD(&chip->vendor.list);
 764         mutex_lock(&tis_lock);
 765         list_add(&chip->vendor.list, &tis_chips);
 766         mutex_unlock(&tis_lock);
 767
 768
 769         return 0;
 770 out_err:
 771         if (chip->vendor.iobase)
 772                 iounmap(chip->vendor.iobase);
 773         tpm_remove_hardware(chip->dev);
 774         return rc;
 775 }
 776
 777 #if defined(CONFIG_PNP) || defined(CONFIG_PM_SLEEP)
 778 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
 779 {
 780         u32 intmask;
 781
 782         /* reenable interrupts that device may have lost or
 783            BIOS/firmware may have disabled */
 784         iowrite8(chip->vendor.irq, chip->vendor.iobase +
 785                  TPM_INT_VECTOR(chip->vendor.locality));
 786
 787         intmask =
 788             ioread32(chip->vendor.iobase +
 789                      TPM_INT_ENABLE(chip->vendor.locality));
 790
 791         intmask |= TPM_INTF_CMD_READY_INT
 792             | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
 793             | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
 794
 795         iowrite32(intmask,
 796                   chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
 797 }
 798 #endif
 799
 800 #ifdef CONFIG_PNP
 801 static int tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
 802                                       const struct pnp_device_id *pnp_id)
 803 {
 804         resource_size_t start, len;
 805         unsigned int irq = 0;
 806
 807         start = pnp_mem_start(pnp_dev, 0);
 808         len = pnp_mem_len(pnp_dev, 0);
 809
 810         if (pnp_irq_valid(pnp_dev, 0))
 811                 irq = pnp_irq(pnp_dev, 0);
 812         else
 813                 interrupts = false;
 814
 815         if (is_itpm(pnp_dev))
 816                 itpm = true;
 817
 818         return tpm_tis_init(&pnp_dev->dev, start, len, irq);
 819 }
 820
 821 static int tpm_tis_pnp_suspend(struct pnp_dev *dev, pm_message_t msg)
 822 {
 823         return tpm_pm_suspend(&dev->dev);
 824 }
 825
 826 static int tpm_tis_pnp_resume(struct pnp_dev *dev)
 827 {
 828         struct tpm_chip *chip = pnp_get_drvdata(dev);
 829         int ret;
 830
 831         if (chip->vendor.irq)
 832                 tpm_tis_reenable_interrupts(chip);
 833
 834         ret = tpm_pm_resume(&dev->dev);
 835         if (!ret)
 836                 tpm_do_selftest(chip);
 837
 838         return ret;
 839 }
 840
 841 static struct pnp_device_id tpm_pnp_tbl[] = {
 842         {"PNP0C31", 0},         /* TPM */
 843         {"ATM1200", 0},         /* Atmel */
 844         {"IFX0102", 0},         /* Infineon */
 845         {"BCM0101", 0},         /* Broadcom */
 846         {"BCM0102", 0},         /* Broadcom */
 847         {"NSC1200", 0},         /* National */
 848         {"ICO0102", 0},         /* Intel */
 849         /* Add new here */
 850         {"", 0},                /* User Specified */
 851         {"", 0}                 /* Terminator */
 852 };
 853 MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
 854
 855 static void tpm_tis_pnp_remove(struct pnp_dev *dev)
 856 {
 857         struct tpm_chip *chip = pnp_get_drvdata(dev);
 858
 859         tpm_dev_vendor_release(chip);
 860
 861         kfree(chip);
 862 }
 863
 864
 865 static struct pnp_driver tis_pnp_driver = {
 866         .name = "tpm_tis",
 867         .id_table = tpm_pnp_tbl,
 868         .probe = tpm_tis_pnp_init,
 869         .suspend = tpm_tis_pnp_suspend,
 870         .resume = tpm_tis_pnp_resume,
 871         .remove = tpm_tis_pnp_remove,
 872 };
 873
 874 #define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2
 875 module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id,
 876                     sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444);
 877 MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe");
 878 #endif
 879
 880 #ifdef CONFIG_PM_SLEEP
 881 static int tpm_tis_resume(struct device *dev)
 882 {
 883         struct tpm_chip *chip = dev_get_drvdata(dev);
 884
 885         if (chip->vendor.irq)
 886                 tpm_tis_reenable_interrupts(chip);
 887
 888         return tpm_pm_resume(dev);
 889 }
 890 #endif
 891
 892 static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume);
 893
 894 static struct platform_driver tis_drv = {
 895         .driver = {
 896                 .name = "tpm_tis",
 897                 .owner          = THIS_MODULE,
 898                 .pm             = &tpm_tis_pm,
 899         },
 900 };
 901
 902 static struct platform_device *pdev;
 903
 904 static bool force;
 905 module_param(force, bool, 0444);
 906 MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
 907 static int __init init_tis(void)
 908 {
 909         int rc;
 910 #ifdef CONFIG_PNP
 911         if (!force)
 912                 return pnp_register_driver(&tis_pnp_driver);
 913 #endif
 914
 915         rc = platform_driver_register(&tis_drv);
 916         if (rc < 0)
 917                 return rc;
 918         if (IS_ERR(pdev=platform_device_register_simple("tpm_tis", -1, NULL, 0)))
 919                 return PTR_ERR(pdev);
 920         if((rc=tpm_tis_init(&pdev->dev, TIS_MEM_BASE, TIS_MEM_LEN, 0)) != 0) {
 921                 platform_device_unregister(pdev);
 922                 platform_driver_unregister(&tis_drv);
 923         }
 924         return rc;
 925 }
 926
 927 static void __exit cleanup_tis(void)
 928 {
 929         struct tpm_vendor_specific *i, *j;
 930         struct tpm_chip *chip;
 931         mutex_lock(&tis_lock);
 932         list_for_each_entry_safe(i, j, &tis_chips, list) {
 933                 chip = to_tpm_chip(i);
 934                 tpm_remove_hardware(chip->dev);
 935                 iowrite32(~TPM_GLOBAL_INT_ENABLE &
 936                           ioread32(chip->vendor.iobase +
 937                                    TPM_INT_ENABLE(chip->vendor.
 938                                                   locality)),
 939                           chip->vendor.iobase +
 940                           TPM_INT_ENABLE(chip->vendor.locality));
 941                 release_locality(chip, chip->vendor.locality, 1);
 942                 if (chip->vendor.irq)
 943                         free_irq(chip->vendor.irq, chip);
 944                 iounmap(i->iobase);
 945                 list_del(&i->list);
 946         }
 947         mutex_unlock(&tis_lock);
 948 #ifdef CONFIG_PNP
 949         if (!force) {
 950                 pnp_unregister_driver(&tis_pnp_driver);
 951                 return;
 952         }
 953 #endif
 954         platform_device_unregister(pdev);
 955         platform_driver_unregister(&tis_drv);
 956 }
 957
 958 module_init(init_tis);
 959 module_exit(cleanup_tis);
 960 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
 961 MODULE_DESCRIPTION("TPM Driver");
 962 MODULE_VERSION("2.0");
 963 MODULE_LICENSE("GPL");