6 config HAVE_CLK_PREPARE
9 config HAVE_MACH_CLKDEV
14 select HAVE_CLK_PREPARE
19 The common clock framework is a single definition of struct
20 clk, useful across many platforms, as well as an
21 implementation of the clock API in include/linux/clk.h.
22 Architectures utilizing the common struct clk should select
25 menu "Common Clock Framework"
28 config COMMON_CLK_WM831X
29 tristate "Clock driver for WM831x/2x PMICs"
32 Supports the clocking subsystem of the WM831x/2x series of
33 PMICs from Wolfson Microelectronics.
35 source "drivers/clk/versatile/Kconfig"
37 config COMMON_CLK_MAX_GEN
40 config COMMON_CLK_MAX77686
41 tristate "Clock driver for Maxim 77686 MFD"
42 depends on MFD_MAX77686
43 select COMMON_CLK_MAX_GEN
45 This driver supports Maxim 77686 crystal oscillator clock.
47 config COMMON_CLK_MAX77802
48 tristate "Clock driver for Maxim 77802 PMIC"
49 depends on MFD_MAX77686
50 select COMMON_CLK_MAX_GEN
52 This driver supports Maxim 77802 crystal oscillator clock.
54 config COMMON_CLK_RK808
55 tristate "Clock driver for RK808"
58 This driver supports RK808 crystal oscillator clock. These
59 multi-function devices have two fixed-rate oscillators,
60 clocked at 32KHz each. Clkout1 is always on, Clkout2 can off
63 config COMMON_CLK_SI5351
64 tristate "Clock driver for SiLabs 5351A/B/C"
69 This driver supports Silicon Labs 5351A/B/C programmable clock
72 config COMMON_CLK_SI514
73 tristate "Clock driver for SiLabs 514 devices"
79 This driver supports the Silicon Labs 514 programmable clock
82 config COMMON_CLK_SI570
83 tristate "Clock driver for SiLabs 570 and compatible devices"
89 This driver supports Silicon Labs 570/571/598/599 programmable
92 config COMMON_CLK_CDCE925
93 tristate "Clock driver for TI CDCE925 devices"
99 This driver supports the TI CDCE925 programmable clock synthesizer.
100 The chip contains two PLLs with spread-spectrum clocking support and
101 five output dividers. The driver only supports the following setup,
102 and uses a fixed setting for the output muxes.
103 Y1 is derived from the input clock
104 Y2 and Y3 derive from PLL1
105 Y4 and Y5 derive from PLL2
106 Given a target output frequency, the driver will set the PLL and
107 divider to best approximate the desired output.
109 config COMMON_CLK_S2MPS11
110 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
111 depends on MFD_SEC_CORE
113 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
114 clock. These multi-function devices have two (S2MPS14) or three
115 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
118 tristate "External McPDM functional clock from twl6040"
119 depends on TWL6040_CORE
121 Enable the external functional clock support on OMAP4+ platforms for
122 McPDM. McPDM module is using the external bit clock on the McPDM bus
125 config COMMON_CLK_AXI_CLKGEN
126 tristate "AXI clkgen driver"
127 depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST
130 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
131 FPGAs. It is commonly used in Analog Devices' reference designs.
134 bool "Clock driver for Freescale QorIQ platforms"
135 depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF
137 This adds the clock driver support for Freescale QorIQ platforms
138 using common clock framework.
140 config COMMON_CLK_XGENE
141 bool "Clock driver for APM XGene SoC"
143 depends on ARM64 || COMPILE_TEST
145 Sypport for the APM X-Gene SoC reference, PLL, and device clocks.
147 config COMMON_CLK_KEYSTONE
148 tristate "Clock drivers for Keystone based SOCs"
149 depends on (ARCH_KEYSTONE || COMPILE_TEST) && OF
151 Supports clock drivers for Keystone based SOCs. These SOCs have local
152 a power sleep control module that gate the clock to the IPs and PLLs.
154 config COMMON_CLK_PALMAS
155 tristate "Clock driver for TI Palmas devices"
156 depends on MFD_PALMAS
158 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
159 using common clock framework.
161 config COMMON_CLK_PWM
162 tristate "Clock driver for PWMs used as clock outputs"
165 Adapter driver so that any PWM output can be (mis)used as clock signal
168 config COMMON_CLK_PXA
169 def_bool COMMON_CLK && ARCH_PXA
171 Sypport for the Marvell PXA SoC.
173 config COMMON_CLK_CDCE706
174 tristate "Clock driver for TI CDCE706 clock synthesizer"
179 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
181 source "drivers/clk/bcm/Kconfig"
182 source "drivers/clk/hisilicon/Kconfig"
183 source "drivers/clk/qcom/Kconfig"
187 source "drivers/clk/mvebu/Kconfig"
189 source "drivers/clk/samsung/Kconfig"
190 source "drivers/clk/tegra/Kconfig"