2 * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3 * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org>
4 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Adjustable divider clock implementation
13 #include <linux/clk-provider.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
17 #include <linux/err.h>
18 #include <linux/string.h>
19 #include <linux/log2.h>
22 * DOC: basic adjustable divider clock that cannot gate
24 * Traits of this clock:
25 * prepare - clk_prepare only ensures that parents are prepared
26 * enable - clk_enable only ensures that parents are enabled
27 * rate - rate is adjustable. clk->rate = DIV_ROUND_UP(parent->rate / divisor)
28 * parent - fixed parent. No clk_set_parent support
31 #define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
33 #define div_mask(width) ((1 << (width)) - 1)
35 static unsigned int _get_table_maxdiv(const struct clk_div_table *table)
37 unsigned int maxdiv = 0;
38 const struct clk_div_table *clkt;
40 for (clkt = table; clkt->div; clkt++)
41 if (clkt->div > maxdiv)
46 static unsigned int _get_table_mindiv(const struct clk_div_table *table)
48 unsigned int mindiv = UINT_MAX;
49 const struct clk_div_table *clkt;
51 for (clkt = table; clkt->div; clkt++)
52 if (clkt->div < mindiv)
57 static unsigned int _get_maxdiv(const struct clk_div_table *table, u8 width,
60 if (flags & CLK_DIVIDER_ONE_BASED)
61 return div_mask(width);
62 if (flags & CLK_DIVIDER_POWER_OF_TWO)
63 return 1 << div_mask(width);
65 return _get_table_maxdiv(table);
66 return div_mask(width) + 1;
69 static unsigned int _get_table_div(const struct clk_div_table *table,
72 const struct clk_div_table *clkt;
74 for (clkt = table; clkt->div; clkt++)
80 static unsigned int _get_div(const struct clk_div_table *table,
81 unsigned int val, unsigned long flags)
83 if (flags & CLK_DIVIDER_ONE_BASED)
85 if (flags & CLK_DIVIDER_POWER_OF_TWO)
88 return _get_table_div(table, val);
92 static unsigned int _get_table_val(const struct clk_div_table *table,
95 const struct clk_div_table *clkt;
97 for (clkt = table; clkt->div; clkt++)
103 static unsigned int _get_val(const struct clk_div_table *table,
104 unsigned int div, unsigned long flags)
106 if (flags & CLK_DIVIDER_ONE_BASED)
108 if (flags & CLK_DIVIDER_POWER_OF_TWO)
111 return _get_table_val(table, div);
115 unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,
117 const struct clk_div_table *table,
122 div = _get_div(table, val, flags);
124 WARN(!(flags & CLK_DIVIDER_ALLOW_ZERO),
125 "%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n",
126 __clk_get_name(hw->clk));
130 return DIV_ROUND_UP(parent_rate, div);
132 EXPORT_SYMBOL_GPL(divider_recalc_rate);
134 static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
135 unsigned long parent_rate)
137 struct clk_divider *divider = to_clk_divider(hw);
140 val = clk_readl(divider->reg) >> divider->shift;
141 val &= div_mask(divider->width);
143 return divider_recalc_rate(hw, parent_rate, val, divider->table,
147 static bool _is_valid_table_div(const struct clk_div_table *table,
150 const struct clk_div_table *clkt;
152 for (clkt = table; clkt->div; clkt++)
153 if (clkt->div == div)
158 static bool _is_valid_div(const struct clk_div_table *table, unsigned int div,
161 if (flags & CLK_DIVIDER_POWER_OF_TWO)
162 return is_power_of_2(div);
164 return _is_valid_table_div(table, div);
168 static int _round_up_table(const struct clk_div_table *table, int div)
170 const struct clk_div_table *clkt;
173 for (clkt = table; clkt->div; clkt++) {
174 if (clkt->div == div)
176 else if (clkt->div < div)
179 if ((clkt->div - div) < (up - div))
186 static int _round_down_table(const struct clk_div_table *table, int div)
188 const struct clk_div_table *clkt;
189 int down = _get_table_mindiv(table);
191 for (clkt = table; clkt->div; clkt++) {
192 if (clkt->div == div)
194 else if (clkt->div > div)
197 if ((div - clkt->div) < (div - down))
204 static int _div_round_up(const struct clk_div_table *table,
205 unsigned long parent_rate, unsigned long rate,
208 int div = DIV_ROUND_UP(parent_rate, rate);
210 if (flags & CLK_DIVIDER_POWER_OF_TWO)
211 div = __roundup_pow_of_two(div);
213 div = _round_up_table(table, div);
218 static int _div_round_closest(const struct clk_div_table *table,
219 unsigned long parent_rate, unsigned long rate,
223 unsigned long up_rate, down_rate;
225 up = down = div = DIV_ROUND_CLOSEST(parent_rate, rate);
227 if (flags & CLK_DIVIDER_POWER_OF_TWO) {
228 up = __roundup_pow_of_two(div);
229 down = __rounddown_pow_of_two(div);
231 up = _round_up_table(table, div);
232 down = _round_down_table(table, div);
235 up_rate = DIV_ROUND_UP(parent_rate, up);
236 down_rate = DIV_ROUND_UP(parent_rate, down);
238 return (rate - up_rate) <= (down_rate - rate) ? up : down;
241 static int _div_round(const struct clk_div_table *table,
242 unsigned long parent_rate, unsigned long rate,
245 if (flags & CLK_DIVIDER_ROUND_CLOSEST)
246 return _div_round_closest(table, parent_rate, rate, flags);
248 return _div_round_up(table, parent_rate, rate, flags);
251 static bool _is_best_div(unsigned long rate, unsigned long now,
252 unsigned long best, unsigned long flags)
254 if (flags & CLK_DIVIDER_ROUND_CLOSEST)
255 return abs(rate - now) < abs(rate - best);
257 return now <= rate && now > best;
260 static int _next_div(const struct clk_div_table *table, int div,
265 if (flags & CLK_DIVIDER_POWER_OF_TWO)
266 return __roundup_pow_of_two(div);
268 return _round_up_table(table, div);
273 static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
274 unsigned long *best_parent_rate,
275 const struct clk_div_table *table, u8 width,
279 unsigned long parent_rate, best = 0, now, maxdiv;
280 unsigned long parent_rate_saved = *best_parent_rate;
285 maxdiv = _get_maxdiv(table, width, flags);
287 if (!(__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT)) {
288 parent_rate = *best_parent_rate;
289 bestdiv = _div_round(table, parent_rate, rate, flags);
290 bestdiv = bestdiv == 0 ? 1 : bestdiv;
291 bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv;
296 * The maximum divider we can use without overflowing
297 * unsigned long in rate * i below
299 maxdiv = min(ULONG_MAX / rate, maxdiv);
301 for (i = 1; i <= maxdiv; i = _next_div(table, i, flags)) {
302 if (!_is_valid_div(table, i, flags))
304 if (rate * i == parent_rate_saved) {
306 * It's the most ideal case if the requested rate can be
307 * divided from parent clock without needing to change
308 * parent rate, so return the divider immediately.
310 *best_parent_rate = parent_rate_saved;
313 parent_rate = __clk_round_rate(__clk_get_parent(hw->clk),
315 now = DIV_ROUND_UP(parent_rate, i);
316 if (_is_best_div(rate, now, best, flags)) {
319 *best_parent_rate = parent_rate;
324 bestdiv = _get_maxdiv(table, width, flags);
325 *best_parent_rate = __clk_round_rate(__clk_get_parent(hw->clk), 1);
331 long divider_round_rate(struct clk_hw *hw, unsigned long rate,
332 unsigned long *prate, const struct clk_div_table *table,
333 u8 width, unsigned long flags)
337 div = clk_divider_bestdiv(hw, rate, prate, table, width, flags);
339 return DIV_ROUND_UP(*prate, div);
341 EXPORT_SYMBOL_GPL(divider_round_rate);
343 static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
344 unsigned long *prate)
346 struct clk_divider *divider = to_clk_divider(hw);
349 /* if read only, just return current value */
350 if (divider->flags & CLK_DIVIDER_READ_ONLY) {
351 bestdiv = readl(divider->reg) >> divider->shift;
352 bestdiv &= div_mask(divider->width);
353 bestdiv = _get_div(divider->table, bestdiv, divider->flags);
354 return DIV_ROUND_UP(*prate, bestdiv);
357 return divider_round_rate(hw, rate, prate, divider->table,
358 divider->width, divider->flags);
361 int divider_get_val(unsigned long rate, unsigned long parent_rate,
362 const struct clk_div_table *table, u8 width,
365 unsigned int div, value;
367 div = DIV_ROUND_UP(parent_rate, rate);
369 if (!_is_valid_div(table, div, flags))
372 value = _get_val(table, div, flags);
374 return min_t(unsigned int, value, div_mask(width));
376 EXPORT_SYMBOL_GPL(divider_get_val);
378 static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
379 unsigned long parent_rate)
381 struct clk_divider *divider = to_clk_divider(hw);
383 unsigned long flags = 0;
386 value = divider_get_val(rate, parent_rate, divider->table,
387 divider->width, divider->flags);
390 spin_lock_irqsave(divider->lock, flags);
392 if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
393 val = div_mask(divider->width) << (divider->shift + 16);
395 val = clk_readl(divider->reg);
396 val &= ~(div_mask(divider->width) << divider->shift);
398 val |= value << divider->shift;
399 clk_writel(val, divider->reg);
402 spin_unlock_irqrestore(divider->lock, flags);
407 const struct clk_ops clk_divider_ops = {
408 .recalc_rate = clk_divider_recalc_rate,
409 .round_rate = clk_divider_round_rate,
410 .set_rate = clk_divider_set_rate,
412 EXPORT_SYMBOL_GPL(clk_divider_ops);
414 static struct clk *_register_divider(struct device *dev, const char *name,
415 const char *parent_name, unsigned long flags,
416 void __iomem *reg, u8 shift, u8 width,
417 u8 clk_divider_flags, const struct clk_div_table *table,
420 struct clk_divider *div;
422 struct clk_init_data init;
424 if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
425 if (width + shift > 16) {
426 pr_warn("divider value exceeds LOWORD field\n");
427 return ERR_PTR(-EINVAL);
431 /* allocate the divider */
432 div = kzalloc(sizeof(struct clk_divider), GFP_KERNEL);
434 pr_err("%s: could not allocate divider clk\n", __func__);
435 return ERR_PTR(-ENOMEM);
439 init.ops = &clk_divider_ops;
440 init.flags = flags | CLK_IS_BASIC;
441 init.parent_names = (parent_name ? &parent_name: NULL);
442 init.num_parents = (parent_name ? 1 : 0);
444 /* struct clk_divider assignments */
448 div->flags = clk_divider_flags;
450 div->hw.init = &init;
453 /* register the clock */
454 clk = clk_register(dev, &div->hw);
463 * clk_register_divider - register a divider clock with the clock framework
464 * @dev: device registering this clock
465 * @name: name of this clock
466 * @parent_name: name of clock's parent
467 * @flags: framework-specific flags
468 * @reg: register address to adjust divider
469 * @shift: number of bits to shift the bitfield
470 * @width: width of the bitfield
471 * @clk_divider_flags: divider-specific flags for this clock
472 * @lock: shared register lock for this clock
474 struct clk *clk_register_divider(struct device *dev, const char *name,
475 const char *parent_name, unsigned long flags,
476 void __iomem *reg, u8 shift, u8 width,
477 u8 clk_divider_flags, spinlock_t *lock)
479 return _register_divider(dev, name, parent_name, flags, reg, shift,
480 width, clk_divider_flags, NULL, lock);
482 EXPORT_SYMBOL_GPL(clk_register_divider);
485 * clk_register_divider_table - register a table based divider clock with
486 * the clock framework
487 * @dev: device registering this clock
488 * @name: name of this clock
489 * @parent_name: name of clock's parent
490 * @flags: framework-specific flags
491 * @reg: register address to adjust divider
492 * @shift: number of bits to shift the bitfield
493 * @width: width of the bitfield
494 * @clk_divider_flags: divider-specific flags for this clock
495 * @table: array of divider/value pairs ending with a div set to 0
496 * @lock: shared register lock for this clock
498 struct clk *clk_register_divider_table(struct device *dev, const char *name,
499 const char *parent_name, unsigned long flags,
500 void __iomem *reg, u8 shift, u8 width,
501 u8 clk_divider_flags, const struct clk_div_table *table,
504 return _register_divider(dev, name, parent_name, flags, reg, shift,
505 width, clk_divider_flags, table, lock);
507 EXPORT_SYMBOL_GPL(clk_register_divider_table);
509 void clk_unregister_divider(struct clk *clk)
511 struct clk_divider *div;
514 hw = __clk_get_hw(clk);
518 div = to_clk_divider(hw);
523 EXPORT_SYMBOL_GPL(clk_unregister_divider);