2 * mmp AXI peripharal clock operation source file
4 * Copyright (C) 2012 Marvell
5 * Chao Xie <xiechao.mail@gmail.com>
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/kernel.h>
13 #include <linux/clk.h>
15 #include <linux/err.h>
16 #include <linux/delay.h>
17 #include <linux/slab.h>
21 #define to_clk_apmu(clk) (container_of(clk, struct clk_apmu, clk))
30 static int clk_apmu_enable(struct clk_hw *hw)
32 struct clk_apmu *apmu = to_clk_apmu(hw);
34 unsigned long flags = 0;
37 spin_lock_irqsave(apmu->lock, flags);
39 data = readl_relaxed(apmu->base) | apmu->enable_mask;
40 writel_relaxed(data, apmu->base);
43 spin_unlock_irqrestore(apmu->lock, flags);
48 static void clk_apmu_disable(struct clk_hw *hw)
50 struct clk_apmu *apmu = to_clk_apmu(hw);
52 unsigned long flags = 0;
55 spin_lock_irqsave(apmu->lock, flags);
57 data = readl_relaxed(apmu->base) & ~apmu->enable_mask;
58 writel_relaxed(data, apmu->base);
61 spin_unlock_irqrestore(apmu->lock, flags);
64 static struct clk_ops clk_apmu_ops = {
65 .enable = clk_apmu_enable,
66 .disable = clk_apmu_disable,
69 struct clk *mmp_clk_register_apmu(const char *name, const char *parent_name,
70 void __iomem *base, u32 enable_mask, spinlock_t *lock)
72 struct clk_apmu *apmu;
74 struct clk_init_data init;
76 apmu = kzalloc(sizeof(*apmu), GFP_KERNEL);
81 init.ops = &clk_apmu_ops;
82 init.flags = CLK_SET_RATE_PARENT;
83 init.parent_names = (parent_name ? &parent_name : NULL);
84 init.num_parents = (parent_name ? 1 : 0);
87 apmu->enable_mask = enable_mask;
89 apmu->hw.init = &init;
91 clk = clk_register(NULL, &apmu->hw);