Merge tag 'regulator-v3.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/brooni...
[firefly-linux-kernel-4.4.55.git] / drivers / clk / rockchip / clk-rockchip.c
1 /*
2  * Copyright (c) 2013 MundoReader S.L.
3  * Author: Heiko Stuebner <heiko@sntech.de>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; either version 2 of the License, or
8  * (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15
16 #include <linux/clk-provider.h>
17 #include <linux/clkdev.h>
18 #include <linux/of.h>
19 #include <linux/of_address.h>
20
21 static DEFINE_SPINLOCK(clk_lock);
22
23 /*
24  * Gate clocks
25  */
26
27 static void __init rk2928_gate_clk_init(struct device_node *node,
28                                          void *data)
29 {
30         struct clk_onecell_data *clk_data;
31         const char *clk_parent;
32         const char *clk_name;
33         void __iomem *reg;
34         void __iomem *reg_idx;
35         int flags;
36         int qty;
37         int reg_bit;
38         int clkflags = CLK_SET_RATE_PARENT;
39         int i;
40
41         qty = of_property_count_strings(node, "clock-output-names");
42         if (qty < 0) {
43                 pr_err("%s: error in clock-output-names %d\n", __func__, qty);
44                 return;
45         }
46
47         if (qty == 0) {
48                 pr_info("%s: nothing to do\n", __func__);
49                 return;
50         }
51
52         reg = of_iomap(node, 0);
53
54         clk_data = kzalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
55         if (!clk_data)
56                 return;
57
58         clk_data->clks = kzalloc(qty * sizeof(struct clk *), GFP_KERNEL);
59         if (!clk_data->clks) {
60                 kfree(clk_data);
61                 return;
62         }
63
64         flags = CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE;
65
66         for (i = 0; i < qty; i++) {
67                 of_property_read_string_index(node, "clock-output-names",
68                                               i, &clk_name);
69
70                 /* ignore empty slots */
71                 if (!strcmp("reserved", clk_name))
72                         continue;
73
74                 clk_parent = of_clk_get_parent_name(node, i);
75
76                 /* keep all gates untouched for now */
77                 clkflags |= CLK_IGNORE_UNUSED;
78
79                 reg_idx = reg + (4 * (i / 16));
80                 reg_bit = (i % 16);
81
82                 clk_data->clks[i] = clk_register_gate(NULL, clk_name,
83                                                       clk_parent, clkflags,
84                                                       reg_idx, reg_bit,
85                                                       flags,
86                                                       &clk_lock);
87                 WARN_ON(IS_ERR(clk_data->clks[i]));
88         }
89
90         clk_data->clk_num = qty;
91
92         of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
93 }
94 CLK_OF_DECLARE(rk2928_gate, "rockchip,rk2928-gate-clk", rk2928_gate_clk_init);