2 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
3 * Copyright (c) 2013 Linaro Ltd.
4 * Author: Thomas Abraham <thomas.ab@samsung.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Common Clock Framework support for all Samsung platforms
13 #ifndef __SAMSUNG_CLK_H
14 #define __SAMSUNG_CLK_H
16 #include <linux/clk.h>
17 #include <linux/clkdev.h>
19 #include <linux/clk-provider.h>
21 #include <linux/of_address.h>
24 * struct samsung_clock_alias: information about mux clock
25 * @id: platform specific id of the clock.
26 * @dev_name: name of the device to which this clock belongs.
27 * @alias: optional clock alias name to be assigned to this clock.
29 struct samsung_clock_alias {
35 #define ALIAS(_id, dname, a) \
43 * struct samsung_fixed_rate_clock: information about fixed-rate clock
44 * @id: platform specific id of the clock.
45 * @name: name of this fixed-rate clock.
46 * @parent_name: optional parent clock name.
47 * @flags: optional fixed-rate clock flags.
48 * @fixed-rate: fixed clock rate of this clock.
50 struct samsung_fixed_rate_clock {
53 const char *parent_name;
55 unsigned long fixed_rate;
58 #define FRATE(_id, cname, pname, f, frate) \
62 .parent_name = pname, \
64 .fixed_rate = frate, \
68 * struct samsung_fixed_factor_clock: information about fixed-factor clock
69 * @id: platform specific id of the clock.
70 * @name: name of this fixed-factor clock.
71 * @parent_name: parent clock name.
72 * @mult: fixed multiplication factor.
73 * @div: fixed division factor.
74 * @flags: optional fixed-factor clock flags.
76 struct samsung_fixed_factor_clock {
79 const char *parent_name;
85 #define FFACTOR(_id, cname, pname, m, d, f) \
89 .parent_name = pname, \
96 * struct samsung_mux_clock: information about mux clock
97 * @id: platform specific id of the clock.
98 * @dev_name: name of the device to which this clock belongs.
99 * @name: name of this mux clock.
100 * @parent_names: array of pointer to parent clock names.
101 * @num_parents: number of parents listed in @parent_names.
102 * @flags: optional flags for basic clock.
103 * @offset: offset of the register for configuring the mux.
104 * @shift: starting bit location of the mux control bit-field in @reg.
105 * @width: width of the mux control bit-field in @reg.
106 * @mux_flags: flags for mux-type clock.
107 * @alias: optional clock alias name to be assigned to this clock.
109 struct samsung_mux_clock {
111 const char *dev_name;
113 const char **parent_names;
116 unsigned long offset;
123 #define __MUX(_id, dname, cname, pnames, o, s, w, f, mf, a) \
128 .parent_names = pnames, \
129 .num_parents = ARRAY_SIZE(pnames), \
138 #define MUX(_id, cname, pnames, o, s, w) \
139 __MUX(_id, NULL, cname, pnames, o, s, w, 0, 0, NULL)
141 #define MUX_A(_id, cname, pnames, o, s, w, a) \
142 __MUX(_id, NULL, cname, pnames, o, s, w, 0, 0, a)
144 #define MUX_F(_id, cname, pnames, o, s, w, f, mf) \
145 __MUX(_id, NULL, cname, pnames, o, s, w, f, mf, NULL)
148 * @id: platform specific id of the clock.
149 * struct samsung_div_clock: information about div clock
150 * @dev_name: name of the device to which this clock belongs.
151 * @name: name of this div clock.
152 * @parent_name: name of the parent clock.
153 * @flags: optional flags for basic clock.
154 * @offset: offset of the register for configuring the div.
155 * @shift: starting bit location of the div control bit-field in @reg.
156 * @div_flags: flags for div-type clock.
157 * @alias: optional clock alias name to be assigned to this clock.
159 struct samsung_div_clock {
161 const char *dev_name;
163 const char *parent_name;
165 unsigned long offset;
170 struct clk_div_table *table;
173 #define __DIV(_id, dname, cname, pname, o, s, w, f, df, a, t) \
178 .parent_name = pname, \
188 #define DIV(_id, cname, pname, o, s, w) \
189 __DIV(_id, NULL, cname, pname, o, s, w, 0, 0, NULL, NULL)
191 #define DIV_A(_id, cname, pname, o, s, w, a) \
192 __DIV(_id, NULL, cname, pname, o, s, w, 0, 0, a, NULL)
194 #define DIV_F(_id, cname, pname, o, s, w, f, df) \
195 __DIV(_id, NULL, cname, pname, o, s, w, f, df, NULL, NULL)
197 #define DIV_T(_id, cname, pname, o, s, w, t) \
198 __DIV(_id, NULL, cname, pname, o, s, w, 0, 0, NULL, t)
201 * struct samsung_gate_clock: information about gate clock
202 * @id: platform specific id of the clock.
203 * @dev_name: name of the device to which this clock belongs.
204 * @name: name of this gate clock.
205 * @parent_name: name of the parent clock.
206 * @flags: optional flags for basic clock.
207 * @offset: offset of the register for configuring the gate.
208 * @bit_idx: bit index of the gate control bit-field in @reg.
209 * @gate_flags: flags for gate-type clock.
210 * @alias: optional clock alias name to be assigned to this clock.
212 struct samsung_gate_clock {
214 const char *dev_name;
216 const char *parent_name;
218 unsigned long offset;
224 #define __GATE(_id, dname, cname, pname, o, b, f, gf, a) \
229 .parent_name = pname, \
237 #define GATE(_id, cname, pname, o, b, f, gf) \
238 __GATE(_id, NULL, cname, pname, o, b, f, gf, NULL)
240 #define GATE_A(_id, cname, pname, o, b, f, gf, a) \
241 __GATE(_id, NULL, cname, pname, o, b, f, gf, a)
243 #define GATE_D(_id, dname, cname, pname, o, b, f, gf) \
244 __GATE(_id, dname, cname, pname, o, b, f, gf, NULL)
246 #define GATE_DA(_id, dname, cname, pname, o, b, f, gf, a) \
247 __GATE(_id, dname, cname, pname, o, b, f, gf, a)
249 #define PNAME(x) static const char *x[] __initdata
252 * struct samsung_clk_reg_dump: register dump of clock controller registers.
253 * @offset: clock register offset from the controller base address.
254 * @value: the value to be register at offset.
256 struct samsung_clk_reg_dump {
261 extern void __init samsung_clk_init(struct device_node *np, void __iomem *base,
262 unsigned long nr_clks, unsigned long *rdump,
263 unsigned long nr_rdump, unsigned long *soc_rdump,
264 unsigned long nr_soc_rdump);
265 extern void __init samsung_clk_of_register_fixed_ext(
266 struct samsung_fixed_rate_clock *fixed_rate_clk,
267 unsigned int nr_fixed_rate_clk,
268 struct of_device_id *clk_matches);
270 extern void samsung_clk_add_lookup(struct clk *clk, unsigned int id);
272 extern void samsung_clk_register_alias(struct samsung_clock_alias *list,
273 unsigned int nr_clk);
274 extern void __init samsung_clk_register_fixed_rate(
275 struct samsung_fixed_rate_clock *clk_list, unsigned int nr_clk);
276 extern void __init samsung_clk_register_fixed_factor(
277 struct samsung_fixed_factor_clock *list, unsigned int nr_clk);
278 extern void __init samsung_clk_register_mux(struct samsung_mux_clock *clk_list,
279 unsigned int nr_clk);
280 extern void __init samsung_clk_register_div(struct samsung_div_clock *clk_list,
281 unsigned int nr_clk);
282 extern void __init samsung_clk_register_gate(
283 struct samsung_gate_clock *clk_list, unsigned int nr_clk);
285 extern unsigned long _get_rate(const char *clk_name);
287 #endif /* __SAMSUNG_CLK_H */