1 /****************************************************************
3 Siano Mobile Silicon, Inc.
4 MDTV receiver kernel modules.
5 Copyright (C) 2006-2008, Uri Shkolnik
7 This program is free software: you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation, either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>.
20 ****************************************************************/
23 #include <linux/kernel.h>
25 //#include <asm/hardware.h>
27 #include <linux/init.h>
28 #include <linux/module.h>
30 #include <linux/interrupt.h>
31 #include <linux/irq.h>
32 #include <linux/dma-mapping.h>
34 #include <linux/module.h>
35 #include <linux/device.h>
36 #include <linux/delay.h>
38 #include "smsdbg_prn.h"
39 #include <linux/spi/spi.h>
40 #include <mach/gpio.h>
41 #include "smscoreapi.h"
43 #include <mach/iomux.h>
47 #define SSP_CKEN CKEN_SSP1
48 #define SMS_IRQ_GPIO MFP_PIN_GPIO5
51 #define SDCMR_RX DRCMRRXSSDR
52 #define SDCMR_TX DRCMRTXSSDR
55 #define SDCMR_RX DRCMR15
56 #define SDCMR_TX DRCMR16
59 #define SDCMR_RX DRCMR66
60 #define SDCMR_TX DRCMR67
63 #define SDCMR_RX DRCMRRXSADR
64 #define SDCMR_TX DRCMRTXSADR
71 /* Macros defining physical layer behaviour*/
73 #define CLOCK_FACTOR 1
74 //#define CLOCK_FACTOR 2
76 #define CLOCK_FACTOR 2
77 #endif /*PXA_310_LV */
79 /* Macros for coding reuse */
81 /*! macro to align the divider to the proper offset in the register bits */
82 #define CLOCK_DIVIDER(i)((i-1)<<8) /* 1-4096 */
84 /*! DMA related macros */
85 #define DMA_INT_MASK (DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERR)
86 #define RESET_DMA_CHANNEL (DCSR_NODESC | DMA_INT_MASK)
88 #define SSP_TIMEOUT_SCALE (769)
89 #define SSP_TIMEOUT(x) ((x*10000)/SSP_TIMEOUT_SCALE)
91 #define SPI_PACKET_SIZE 256
95 // in android platform 2.6.25 , need to check the Reg bit by bit later
96 #define GSDR(x) __REG2(0x40e00400, ((x) & 0x60) >> 3)
97 #define GCDR(x) __REG2(0x40300420, ((x) & 0x60) >> 3)
99 #define GSRER(x) __REG2(0x40e00440, ((x) & 0x60) >> 3)
100 #define GCRER(x) __REG2(0x40e00460, ((x) & 0x60) >> 3)
103 #define GPIO_DIR_IN 0
105 #define SSCR0_P1 __REG(0x41000000) /* SSP Port 1 Control Register 0 */
106 #define SSCR1_P1 __REG(0x41000004) /* SSP Port 1 Control Register 1 */
107 #define SSSR_P1 __REG(0x41000008) /* SSP Port 1 Status Register */
108 #define SSITR_P1 __REG(0x4100000C) /* SSP Port 1 Interrupt Test Register */
109 #define SSDR_P1 __REG(0x41000010) /* (Write / Read) SSP Port 1 Data Write Register/SSP Data Read Register */
111 unsigned long u_irq_count =0;
114 /**********************************************************************/
115 //to support dma 16byte burst size
116 // change SPI TS according to marvel recomendations
118 #define DMA_BURST_SIZE DCMD_BURST16 //DCMD_BURST8
119 #define SPI_RX_FIFO_RFT SSCR1_RxTresh(4) //SSCR1_RxTresh(1)
120 #define SPI_TX_FIFO_TFT SSCR1_TxTresh(3) //SSCR1_TxTresh(1)
123 /**********************************************************************/
125 #include <linux/notifier.h>
127 static unsigned int dma_rxbuf_phy_addr ;
128 static unsigned int dma_txbuf_phy_addr ;
130 static int rx_dma_channel =0 ;
131 static int tx_dma_channel =0 ;
132 static volatile int dma_len = 0 ;
133 static volatile int tx_len = 0 ;
135 static struct ssp_dev* panic_sspdev = NULL ;
138 extern void smscore_panic_print(void);
139 extern void spilog_panic_print(void) ;
140 static void chip_powerdown();
141 extern void smschar_reset_device(void);
143 static int sms_panic_handler(struct notifier_block *this,
147 static int panic_event_handled = 0;
148 if(!panic_event_handled)
150 smscore_panic_print() ;
151 spilog_panic_print() ;
152 printk("last tx_len = %d\n",tx_len) ;
153 printk("last DMA len = %d\n",dma_len) ;
155 printk("rxbuf_addr=[0x%x],Rx DSADR=[0x%x] DTADR=[0x%x] DCSR=[0x%x] DCMD=[0x%x]\n",
156 dma_rxbuf_phy_addr, DSADR(rx_dma_channel),DTADR(rx_dma_channel),
157 DCSR(rx_dma_channel),DCMD(rx_dma_channel) );
159 printk("txbuf_addr=[0x%x],Tx DSADR=[0x%x] DTADR=[0x%x] DCSR[0x%x] DCMD=[0x%x]\n",
160 dma_txbuf_phy_addr, DSADR(tx_dma_channel),DTADR(tx_dma_channel),
161 DCSR(tx_dma_channel),DCMD(tx_dma_channel) );
164 printk("SSCR0 =[0x%x]\n",__raw_readl(panic_sspdev->ssp->mmio_base + SSCR0)) ;
165 printk("SSCR1 =[0x%x]\n",__raw_readl(panic_sspdev->ssp->mmio_base + SSCR1)) ;
166 printk("SSTO =[0x%x]\n",__raw_readl(panic_sspdev->ssp->mmio_base + SSTO)) ;
167 printk("SSPSP =[0x%x]\n",__raw_readl(panic_sspdev->ssp->mmio_base + SSPSP)) ;
168 printk("SSSR =[0x%x]\n",__raw_readl(panic_sspdev->ssp->mmio_base + SSSR)) ;
172 panic_event_handled =1 ;
177 static struct notifier_block sms_panic_notifier = {
178 .notifier_call = sms_panic_handler,
180 .priority = 150 /* priority: INT_MAX >= x >= 0 */
186 /*! GPIO functions for PXA3xx
189 void pxa3xx_gpio_set_rising_edge_detect (int gpio_id, int dir)
193 int gpio = mfp_to_gpio(gpio_id);
195 // if (gpio >= GPIO_EXP_START)
199 // spin_lock_irqsave(&gpio_spin_lock, flags);
200 local_irq_save(flags);
202 if ( dir == GPIO_DIR_IN)
203 GCRER(gpio) =1u << (gpio& 0x1f);
205 GSRER(gpio) =1u << (gpio& 0x1f);
206 local_irq_restore(flags);
210 void pxa3xx_gpio_set_direction(int gpio_id , int dir)
214 int gpio = mfp_to_gpio(gpio_id);
216 local_irq_save(flags);
218 if ( dir == GPIO_DIR_IN)
219 GCDR(gpio) =1u << (gpio& 0x1f);
221 GSDR(gpio) =1u << (gpio& 0x1f);
222 local_irq_restore(flags);
225 //////////////////////////////////////////////////////////
227 /* physical layer variables */
228 /*! global bus data */
229 struct spiphy_dev_s {
230 //struct ssp_dev sspdev; /*!< ssp port configuration */
231 struct completion transfer_in_process;
232 struct spi_device *Smsdevice;
233 void (*interruptHandler) (void *);
235 struct device *dev; /*!< device model stuff */
246 invert the endianness of a single 32it integer
248 \param[in] u: word to invert
250 \return the inverted word
252 static inline u32 invert_bo(u32 u)
254 return ((u & 0xff) << 24) | ((u & 0xff00) << 8) | ((u & 0xff0000) >> 8)
255 | ((u & 0xff000000) >> 24);
259 invert the endianness of a data buffer
261 \param[in] buf: buffer to invert
262 \param[in] len: buffer length
264 \return the inverted word
267 static int invert_endianness(char *buf, int len)
270 u32 *ptr = (u32 *) buf;
273 for (i = 0; i < len; i++, ptr++)
274 *ptr = invert_bo(*ptr);
276 return 4 * ((len + 3) & (~3));
279 /*! Map DMA buffers when request starts
283 static unsigned long dma_map_buf(struct spiphy_dev_s *spiphy_dev, char *buf,
284 int len, int direction)
286 unsigned long phyaddr;
287 /* map dma buffers */
289 PERROR(" NULL buffers to map\n");
293 phyaddr = dma_map_single(spiphy_dev->dev, buf, len, direction);
294 //if (dma_mapping_error(phyaddr)) {
295 // PERROR("exiting with error\n");
301 static irqreturn_t spibus_interrupt(int irq, void *context)
303 struct spiphy_dev_s *spiphy_dev = (struct spiphy_dev_s *) context;
307 // PDEBUG("INT counter = %d\n", u_irq_count);
308 //printk("cmmb siano 1186 int\n");
309 sms_info("spibus_interrupt %d\n", u_irq_count);
311 if (spiphy_dev->interruptHandler)
312 spiphy_dev->interruptHandler(spiphy_dev->intr_context);
318 /*! DMA controller callback - called only on BUS error condition
320 \param[in] channel: DMA channel with error
321 \param[in] data: Unused
322 \param[in] regs: Unused
326 //extern dma_addr_t common_buf_end ;
328 static void spibus_dma_handler(int channel, void *context)
331 struct spiphy_dev_s *spiphy_dev = (struct spiphy_dev_s *) context;
332 u32 irq_status = DCSR(channel) & DMA_INT_MASK;
334 // printk( "recieved interrupt from dma channel %d irq status %x.\n",
335 // channel, irq_status);
336 if (irq_status & DCSR_BUSERR) {
337 printk(KERN_EMERG "bus error!!! resetting channel %d\n", channel);
339 DCSR(spiphy_dev->rx_dma_channel) = RESET_DMA_CHANNEL;
340 DCSR(spiphy_dev->tx_dma_channel) = RESET_DMA_CHANNEL;
342 DCSR(spiphy_dev->rx_dma_channel) = RESET_DMA_CHANNEL;
343 complete(&spiphy_dev->transfer_in_process);
347 void smsspibus_xfer(void *context, unsigned char *txbuf,
348 unsigned long txbuf_phy_addr, unsigned char *rxbuf,
349 unsigned long rxbuf_phy_addr, int len)
351 struct spiphy_dev_s *spiphy_dev = (struct spiphy_dev_s *) context;
352 unsigned char *temp = NULL;
355 //sms_debug(KERN_INFO "smsspibus_xfer \n");
359 // sms_debug("tx_buf:%x,%x,%x,%x,%x,%x", txbuf[0], txbuf[1], txbuf[2], txbuf[3], txbuf[4],txbuf[5]);
361 ret = spi_write(spiphy_dev->Smsdevice, txbuf, len);
367 // sms_err(KERN_INFO "smsspibus_xfer spi write ret=0x%x\n",ret);
369 //memset (rxbuf, 0xff, 256);
370 if ((rxbuf)&&(len != 16))
371 ret = spi_read(spiphy_dev->Smsdevice, rxbuf, len);
373 // sms_debug("rxbuf 4, 5,6,7,8,9=%x,%x,%x,%x,%x,%x\n",rxbuf[4],rxbuf[5],rxbuf[6],rxbuf[7],rxbuf[8],rxbuf[9]);
374 //sms_debug("sms spi read buf=0x%x\n",rxbuf[5]);
378 void smschipreset(void *context)
383 static struct ssp_state sms_ssp_state ;
385 void smsspibus_ssp_suspend(void* context )
387 struct spiphy_dev_s *spiphy_dev ;
388 printk("entering smsspibus_ssp_suspend\n");
391 PERROR("smsspibus_ssp_suspend context NULL \n") ;
394 spiphy_dev = (struct spiphy_dev_s *) context;
396 //ssp_flush(&(spiphy_dev->sspdev)) ;
397 //ssp_save_state(&(spiphy_dev->sspdev) , &sms_ssp_state) ;
398 //ssp_disable(&(spiphy_dev->sspdev));
399 //ssp_exit(&spiphy_dev->sspdev);
400 free_irq(gpio_to_irq(CMMB_1186_SPIIRQ), spiphy_dev);
402 gpio_direction_output(CMMB_1186_SPIIRQ,0);
403 /* release DMA resources */
404 //if (spiphy_dev->rx_dma_channel >= 0)
405 //pxa_free_dma(spiphy_dev->rx_dma_channel);
407 //if (spiphy_dev->tx_dma_channel >= 0)
408 //pxa_free_dma(spiphy_dev->tx_dma_channel);
412 static void chip_poweron()
415 #ifdef CONFIG_MACH_LC6830_PHONE_BOARD_1_0
416 gpio_direction_output(mfp_to_gpio(MFP_PIN_GPIO4), 1);
418 gpio_direction_output(mfp_to_gpio(MFP_PIN_GPIO6), 1);
420 #elif defined CONFIG_MACH_LC6830_PHONE_BOARD_1_1
421 gpio_direction_output(mfp_to_gpio(MFP_PIN_GPIO6), 1);
423 gpio_direction_output(mfp_to_gpio(MFP_PIN_GPIO8), 1);
425 gpio_direction_output(mfp_to_gpio(MFP_PIN_GPIO4), 1);
433 //set the SPI CS mode , zyc
434 //rk2818_mux_api_set(GPIOB4_SPI0CS0_MMC0D4_NAME,1);
436 gpio_direction_output(CMMB_1186_POWER_RESET,0);
437 gpio_direction_output(CMMB_1186_POWER_DOWN,0);
439 gpio_direction_output(CMMB_1186_POWER_ENABLE,0);
441 gpio_direction_output(CMMB_1186_POWER_ENABLE,1);
444 gpio_direction_output(CMMB_1186_POWER_DOWN,1);
446 gpio_direction_output(CMMB_1186_POWER_RESET,1);
449 printk("cmmb chip_poweron !!!!\n");
453 static void chip_powerdown()
456 #ifdef CONFIG_MACH_LC6830_PHONE_BOARD_1_0
457 gpio_direction_output(mfp_to_gpio(MFP_PIN_GPIO4), 0);
459 gpio_direction_output(mfp_to_gpio(MFP_PIN_GPIO6), 0);
460 #elif defined CONFIG_MACH_LC6830_PHONE_BOARD_1_1
461 gpio_direction_output(mfp_to_gpio(MFP_PIN_GPIO4), 0);
463 gpio_direction_output(mfp_to_gpio(MFP_PIN_GPIO8), 0);
465 gpio_direction_output(mfp_to_gpio(MFP_PIN_GPIO6), 0);
473 //1186 cmmb power down
475 gpio_direction_output(CMMB_1186_POWER_ENABLE,0);
476 //set the CS0 as gpio mode
478 // rk2818_mux_api_set(GPIOB4_SPI0CS0_MMC0D4_NAME,0);
479 // gpio_direction_output(GPIOB4_SPI0CS0_MMC0D4_NAME,0);
481 printk("cmmb chip_powerdown !!!!\n");
488 int smsspibus_ssp_resume(void* context)
491 struct spiphy_dev_s *spiphy_dev ;
492 u32 mode = 0, flags = 0, psp_flags = 0, speed = 0;
493 printk("entering smsspibus_ssp_resume\n");
496 PERROR("smsspibus_ssp_resume context NULL \n");
499 spiphy_dev = (struct spiphy_dev_s *) context;
501 free_irq(gpio_to_irq(CMMB_1186_SPIIRQ), spiphy_dev);
502 //printk("siano 1186 request irq\n");
503 // spiirqgpio low , PULLUP , zyc
504 gpio_direction_output(CMMB_1186_SPIIRQ,0);
505 gpio_pull_updown(CMMB_1186_SPIIRQ,GPIOPullUp);
507 //ret = request_gpio_irq(CMMB_1186_SPIIRQ, (pFunc)spibus_interrupt, GPIOEdgelRising, spiphy_dev);
508 request_irq(gpio_to_irq(CMMB_1186_SPIIRQ),spibus_interrupt,IRQF_TRIGGER_RISING,NULL,spiphy_dev);
510 printk("siano1186 request irq failed !!\n");
516 free_irq(CMMB_1186_SPIIRQ,NULL);
522 void *smsspiphy_init(void *context, void (*smsspi_interruptHandler)(void *),void *intr_context)
526 struct spiphy_dev_s *spiphy_dev;
527 u32 mode = 0, flags = 0, psp_flags = 0, speed = 0;
530 sms_debug("smsspiphy_init\n");
532 spiphy_dev = kmalloc(sizeof(struct spiphy_dev_s), GFP_KERNEL);
535 printk("spiphy_dev is null in smsspiphy_init\n") ;
539 //request_cmmb_gpio();
541 spiphy_dev->interruptHandler = smsspi_interruptHandler;
542 spiphy_dev->intr_context = intr_context;
543 spiphy_dev->Smsdevice = (struct spi_device*)context;
545 //gpio_pull_updown(CMMB_1186_SPIIRQ, IRQT_FALLING);
546 //set IRO GPIO as gpio mode ,zyc
547 //rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME,0);
548 error = gpio_request(CMMB_1186_SPIIRQ,"cmmb irq");
550 //dev_err(&pdev->dev, "failed to request play key gpio\n");
552 printk("gpio request error\n");
556 gpio_direction_output(CMMB_1186_SPIIRQ,1);
558 printk("CMMB_1186_SPIIRQ !!!!\n");
560 gpio_direction_output(CMMB_1186_SPIIRQ,0);
564 //ret = request_gpio_irq(CMMB_1186_SPIIRQ, spibus_interrupt, GPIOEdgelRising, spiphy_dev);//
567 gpio_direction_output(CMMB_1186_SPIIRQ,0);
568 gpio_pull_updown(CMMB_1186_SPIIRQ,GPIOPullUp);
570 //ret = request_gpio_irq(CMMB_1186_SPIIRQ, (pFunc)spibus_interrupt, GPIOEdgelRising, spiphy_dev);
571 request_irq(gpio_to_irq(CMMB_1186_SPIIRQ),spibus_interrupt,IRQF_TRIGGER_RISING,NULL,spiphy_dev);
574 printk("siano 1186 request irq failed !!\n");
579 atomic_notifier_chain_register(&panic_notifier_list,&sms_panic_notifier);
580 //panic_sspdev = &(spiphy_dev->sspdev) ;
587 //if (spiphy_dev->tx_dma_channel >= 0)
588 //pxa_free_dma(spiphy_dev->tx_dma_channel);
591 //if (spiphy_dev->rx_dma_channel >= 0)
592 //pxa_free_dma(spiphy_dev->rx_dma_channel);
595 // ssp_exit(&spiphy_dev->sspdev);
597 //PDEBUG("exiting on error\n");
598 printk("exiting on error\n");
600 free_irq(CMMB_1186_SPIIRQ,NULL);
605 int smsspiphy_deinit(void *context)
607 struct spiphy_dev_s *spiphy_dev = (struct spiphy_dev_s *) context;
608 PDEBUG("entering\n");
610 printk("entering smsspiphy_deinit\n");
613 atomic_notifier_chain_unregister(&panic_notifier_list,
614 &sms_panic_notifier);
620 void smsspiphy_set_config(struct spiphy_dev_s *spiphy_dev, int clock_divider)
622 //u32 mode, flags, speed, psp_flags = 0;
623 //ssp_disable(&spiphy_dev->sspdev);
624 /* clock divisor for this mode. */
625 //speed = CLOCK_DIVIDER(clock_divider);
626 /* 32bit words in the fifo */
627 //mode = SSCR0_Motorola | SSCR0_DataSize(16) | SSCR0_EDSS;
628 //flags = SPI_RX_FIFO_RFT |SPI_TX_FIFO_TFT | SSCR1_TSRE |
629 //SSCR1_RSRE | SSCR1_RIE | SSCR1_TRAIL; /* | SSCR1_TIE */
630 //ssp_config(&spiphy_dev->sspdev, mode, flags, psp_flags, speed);
631 //ssp_enable(&spiphy_dev->sspdev);
634 void prepareForFWDnl(void *context)
636 struct spiphy_dev_s *spiphy_dev = (struct spiphy_dev_s *) context;
637 smsspiphy_set_config(spiphy_dev, 3);
641 void fwDnlComplete(void *context, int App)
643 struct spiphy_dev_s *spiphy_dev = (struct spiphy_dev_s *) context;
644 smsspiphy_set_config(spiphy_dev, 1);