drivers/cpufreq/cpufreq-cpu0.c

   1 /*
   2  * Copyright (C) 2012 Freescale Semiconductor, Inc.
   3  *
   4  * Copyright (C) 2014 Linaro.
   5  * Viresh Kumar <viresh.kumar@linaro.org>
   6  *
   7  * The OPP code in function cpu0_set_target() is reused from
   8  * drivers/cpufreq/omap-cpufreq.c
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  16
  17 #include <linux/clk.h>
  18 #include <linux/cpu.h>
  19 #include <linux/cpu_cooling.h>
  20 #include <linux/cpufreq.h>
  21 #include <linux/cpumask.h>
  22 #include <linux/err.h>
  23 #include <linux/module.h>
  24 #include <linux/of.h>
  25 #include <linux/pm_opp.h>
  26 #include <linux/platform_device.h>
  27 #include <linux/regulator/consumer.h>
  28 #include <linux/slab.h>
  29 #include <linux/thermal.h>
  30
  31 struct private_data {
  32         struct device *cpu_dev;
  33         struct regulator *cpu_reg;
  34         struct thermal_cooling_device *cdev;
  35         unsigned int voltage_tolerance; /* in percentage */
  36 };
  37
  38 static int cpu0_set_target(struct cpufreq_policy *policy, unsigned int index)
  39 {
  40         struct dev_pm_opp *opp;
  41         struct cpufreq_frequency_table *freq_table = policy->freq_table;
  42         struct clk *cpu_clk = policy->clk;
  43         struct private_data *priv = policy->driver_data;
  44         struct device *cpu_dev = priv->cpu_dev;
  45         struct regulator *cpu_reg = priv->cpu_reg;
  46         unsigned long volt = 0, volt_old = 0, tol = 0;
  47         unsigned int old_freq, new_freq;
  48         long freq_Hz, freq_exact;
  49         int ret;
  50
  51         freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
  52         if (freq_Hz <= 0)
  53                 freq_Hz = freq_table[index].frequency * 1000;
  54
  55         freq_exact = freq_Hz;
  56         new_freq = freq_Hz / 1000;
  57         old_freq = clk_get_rate(cpu_clk) / 1000;
  58
  59         if (!IS_ERR(cpu_reg)) {
  60                 rcu_read_lock();
  61                 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
  62                 if (IS_ERR(opp)) {
  63                         rcu_read_unlock();
  64                         dev_err(cpu_dev, "failed to find OPP for %ld\n",
  65                                 freq_Hz);
  66                         return PTR_ERR(opp);
  67                 }
  68                 volt = dev_pm_opp_get_voltage(opp);
  69                 rcu_read_unlock();
  70                 tol = volt * priv->voltage_tolerance / 100;
  71                 volt_old = regulator_get_voltage(cpu_reg);
  72         }
  73
  74         dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n",
  75                 old_freq / 1000, volt_old ? volt_old / 1000 : -1,
  76                 new_freq / 1000, volt ? volt / 1000 : -1);
  77
  78         /* scaling up?  scale voltage before frequency */
  79         if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
  80                 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
  81                 if (ret) {
  82                         dev_err(cpu_dev, "failed to scale voltage up: %d\n",
  83                                 ret);
  84                         return ret;
  85                 }
  86         }
  87
  88         ret = clk_set_rate(cpu_clk, freq_exact);
  89         if (ret) {
  90                 dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
  91                 if (!IS_ERR(cpu_reg))
  92                         regulator_set_voltage_tol(cpu_reg, volt_old, tol);
  93                 return ret;
  94         }
  95
  96         /* scaling down?  scale voltage after frequency */
  97         if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
  98                 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
  99                 if (ret) {
 100                         dev_err(cpu_dev, "failed to scale voltage down: %d\n",
 101                                 ret);
 102                         clk_set_rate(cpu_clk, old_freq * 1000);
 103                 }
 104         }
 105
 106         return ret;
 107 }
 108
 109 static int allocate_resources(struct device **cdev,
 110                               struct regulator **creg, struct clk **cclk)
 111 {
 112         struct device *cpu_dev;
 113         struct regulator *cpu_reg;
 114         struct clk *cpu_clk;
 115         int ret = 0;
 116
 117         cpu_dev = get_cpu_device(0);
 118         if (!cpu_dev) {
 119                 pr_err("failed to get cpu0 device\n");
 120                 return -ENODEV;
 121         }
 122
 123         cpu_reg = regulator_get_optional(cpu_dev, "cpu0");
 124         if (IS_ERR(cpu_reg)) {
 125                 /*
 126                  * If cpu0 regulator supply node is present, but regulator is
 127                  * not yet registered, we should try defering probe.
 128                  */
 129                 if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
 130                         dev_dbg(cpu_dev, "cpu0 regulator not ready, retry\n");
 131                         return -EPROBE_DEFER;
 132                 }
 133                 dev_warn(cpu_dev, "failed to get cpu0 regulator: %ld\n",
 134                          PTR_ERR(cpu_reg));
 135         }
 136
 137         cpu_clk = clk_get(cpu_dev, NULL);
 138         if (IS_ERR(cpu_clk)) {
 139                 /* put regulator */
 140                 if (!IS_ERR(cpu_reg))
 141                         regulator_put(cpu_reg);
 142
 143                 ret = PTR_ERR(cpu_clk);
 144
 145                 /*
 146                  * If cpu's clk node is present, but clock is not yet
 147                  * registered, we should try defering probe.
 148                  */
 149                 if (ret == -EPROBE_DEFER)
 150                         dev_dbg(cpu_dev, "cpu0 clock not ready, retry\n");
 151                 else
 152                         dev_err(cpu_dev, "failed to get cpu0 clock: %d\n", ret);
 153         } else {
 154                 *cdev = cpu_dev;
 155                 *creg = cpu_reg;
 156                 *cclk = cpu_clk;
 157         }
 158
 159         return ret;
 160 }
 161
 162 static int cpu0_cpufreq_init(struct cpufreq_policy *policy)
 163 {
 164         struct cpufreq_frequency_table *freq_table;
 165         struct thermal_cooling_device *cdev;
 166         struct device_node *np;
 167         struct private_data *priv;
 168         struct device *cpu_dev;
 169         struct regulator *cpu_reg;
 170         struct clk *cpu_clk;
 171         unsigned int transition_latency;
 172         int ret;
 173
 174         /* We only support cpu0 currently */
 175         ret = allocate_resources(&cpu_dev, &cpu_reg, &cpu_clk);
 176         if (ret) {
 177                 pr_err("%s: Failed to allocate resources\n: %d", __func__, ret);
 178                 return ret;
 179         }
 180
 181         np = of_node_get(cpu_dev->of_node);
 182         if (!np) {
 183                 dev_err(cpu_dev, "failed to find cpu%d node\n", policy->cpu);
 184                 ret = -ENOENT;
 185                 goto out_put_reg_clk;
 186         }
 187
 188         /* OPPs might be populated at runtime, don't check for error here */
 189         of_init_opp_table(cpu_dev);
 190
 191         ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
 192         if (ret) {
 193                 dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret);
 194                 goto out_put_node;
 195         }
 196
 197         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 198         if (!priv) {
 199                 ret = -ENOMEM;
 200                 goto out_free_table;
 201         }
 202
 203         of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance);
 204
 205         if (of_property_read_u32(np, "clock-latency", &transition_latency))
 206                 transition_latency = CPUFREQ_ETERNAL;
 207
 208         if (!IS_ERR(cpu_reg)) {
 209                 struct dev_pm_opp *opp;
 210                 unsigned long min_uV, max_uV;
 211                 int i;
 212
 213                 /*
 214                  * OPP is maintained in order of increasing frequency, and
 215                  * freq_table initialised from OPP is therefore sorted in the
 216                  * same order.
 217                  */
 218                 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
 219                         ;
 220                 rcu_read_lock();
 221                 opp = dev_pm_opp_find_freq_exact(cpu_dev,
 222                                 freq_table[0].frequency * 1000, true);
 223                 min_uV = dev_pm_opp_get_voltage(opp);
 224                 opp = dev_pm_opp_find_freq_exact(cpu_dev,
 225                                 freq_table[i-1].frequency * 1000, true);
 226                 max_uV = dev_pm_opp_get_voltage(opp);
 227                 rcu_read_unlock();
 228                 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
 229                 if (ret > 0)
 230                         transition_latency += ret * 1000;
 231         }
 232
 233         /*
 234          * For now, just loading the cooling device;
 235          * thermal DT code takes care of matching them.
 236          */
 237         if (of_find_property(np, "#cooling-cells", NULL)) {
 238                 cdev = of_cpufreq_cooling_register(np, cpu_present_mask);
 239                 if (IS_ERR(cdev))
 240                         dev_err(cpu_dev,
 241                                 "running cpufreq without cooling device: %ld\n",
 242                                 PTR_ERR(cdev));
 243                 else
 244                         priv->cdev = cdev;
 245         }
 246         of_node_put(np);
 247
 248         priv->cpu_dev = cpu_dev;
 249         priv->cpu_reg = cpu_reg;
 250         policy->driver_data = priv;
 251
 252         policy->clk = cpu_clk;
 253         ret = cpufreq_generic_init(policy, freq_table, transition_latency);
 254         if (ret)
 255                 goto out_cooling_unregister;
 256
 257         return 0;
 258
 259 out_cooling_unregister:
 260         cpufreq_cooling_unregister(priv->cdev);
 261         kfree(priv);
 262 out_free_table:
 263         dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
 264 out_put_node:
 265         of_node_put(np);
 266 out_put_reg_clk:
 267         clk_put(cpu_clk);
 268         if (!IS_ERR(cpu_reg))
 269                 regulator_put(cpu_reg);
 270
 271         return ret;
 272 }
 273
 274 static int cpu0_cpufreq_exit(struct cpufreq_policy *policy)
 275 {
 276         struct private_data *priv = policy->driver_data;
 277
 278         cpufreq_cooling_unregister(priv->cdev);
 279         dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table);
 280         clk_put(policy->clk);
 281         if (!IS_ERR(priv->cpu_reg))
 282                 regulator_put(priv->cpu_reg);
 283         kfree(priv);
 284
 285         return 0;
 286 }
 287
 288 static struct cpufreq_driver cpu0_cpufreq_driver = {
 289         .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
 290         .verify = cpufreq_generic_frequency_table_verify,
 291         .target_index = cpu0_set_target,
 292         .get = cpufreq_generic_get,
 293         .init = cpu0_cpufreq_init,
 294         .exit = cpu0_cpufreq_exit,
 295         .name = "generic_cpu0",
 296         .attr = cpufreq_generic_attr,
 297 };
 298
 299 static int cpu0_cpufreq_probe(struct platform_device *pdev)
 300 {
 301         struct device *cpu_dev;
 302         struct regulator *cpu_reg;
 303         struct clk *cpu_clk;
 304         int ret;
 305
 306         /*
 307          * All per-cluster (CPUs sharing clock/voltages) initialization is done
 308          * from ->init(). In probe(), we just need to make sure that clk and
 309          * regulators are available. Else defer probe and retry.
 310          *
 311          * FIXME: Is checking this only for CPU0 sufficient ?
 312          */
 313         ret = allocate_resources(&cpu_dev, &cpu_reg, &cpu_clk);
 314         if (ret)
 315                 return ret;
 316
 317         clk_put(cpu_clk);
 318         if (!IS_ERR(cpu_reg))
 319                 regulator_put(cpu_reg);
 320
 321         ret = cpufreq_register_driver(&cpu0_cpufreq_driver);
 322         if (ret)
 323                 dev_err(cpu_dev, "failed register driver: %d\n", ret);
 324
 325         return ret;
 326 }
 327
 328 static int cpu0_cpufreq_remove(struct platform_device *pdev)
 329 {
 330         cpufreq_unregister_driver(&cpu0_cpufreq_driver);
 331         return 0;
 332 }
 333
 334 static struct platform_driver cpu0_cpufreq_platdrv = {
 335         .driver = {
 336                 .name   = "cpufreq-cpu0",
 337                 .owner  = THIS_MODULE,
 338         },
 339         .probe          = cpu0_cpufreq_probe,
 340         .remove         = cpu0_cpufreq_remove,
 341 };
 342 module_platform_driver(cpu0_cpufreq_platdrv);
 343
 344 MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>");
 345 MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
 346 MODULE_DESCRIPTION("Generic CPU0 cpufreq driver");
 347 MODULE_LICENSE("GPL");